[llvm-commits] [llvm-gcc-4.2] r41561 - in /llvm-gcc-4.2/trunk/gcc: ada/misc.c c-decl.c cp/except.c except.c expr.h java/decl.c libfuncs.h llvm-convert.cpp llvm-internal.h objc/objc-act.c optabs.c
Author: baldrick
Date: Wed Aug 29 02:01:18 2007
New Revision: 41561
URL: http://llvm.org/viewvc/llvm-project?rev=41561&view=rev
Log:
Use the correct personality and unwind_resume functions for
the language being compiled.
Modified:
llvm-gcc-4.2/trunk/gcc/ada/misc.c
llvm-gcc-4.2/trunk/gcc/c-decl.c
llvm-gcc-4.2/trunk/gcc/cp/except.c
llvm-gcc-4.2/trunk/gcc/except.c
llvm-gcc-4.2/trunk/gcc/expr.h
llvm-gcc-4.2/trunk/gcc/java/decl.c
llvm-gcc-4.2/trunk/gcc/libfuncs.h
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.2/trunk/gcc/llvm-internal.h
llvm-gcc-4.2/trunk/gcc/objc/objc-act.c
llvm-gcc-4.2/trunk/gcc/optabs.c
Modified: llvm-gcc-4.2/trunk/gcc/ada/misc.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ada/misc.c?rev=41561&r1=41560&r2=41561&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/ada/misc.c (original)
+++ llvm-gcc-4.2/trunk/gcc/ada/misc.c Wed Aug 29 02:01:18 2007
@@ -512,8 +512,8 @@
right exception regions. */
using_eh_for_cleanups ();
- eh_personality_libfunc = init_one_libfunc ("__gnat_eh_personality");
/* LLVM LOCAL begin */
+ llvm_eh_personality_libfunc = llvm_init_one_libfunc
("__gnat_eh_personality");
default_init_unwind_resume_libfunc ();
/* LLVM LOCAL end */
lang_eh_type_covers = gnat_eh_type_covers;
Modified: llvm-gcc-4.2/trunk/gcc/c-decl.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-decl.c?rev=41561&r1=41560&r2=41561&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/c-decl.c (original)
+++ llvm-gcc-4.2/trunk/gcc/c-decl.c Wed Aug 29 02:01:18 2007
@@ -3550,10 +3550,12 @@
return;
c_eh_initialized_p = true;
- eh_personality_libfunc
-= init_one_libfunc (USING_SJLJ_EXCEPTIONS
- ? "__gcc_personality_sj0"
- : "__gcc_personality_v0");
+ /* LLVM local begin */
+ llvm_eh_personality_libfunc
+= llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS
+ ? "__gcc_personality_sj0"
+ : "__gcc_personality_v0");
+ /* LLVM local end */
default_init_unwind_resume_libfunc ();
using_eh_for_cleanups ();
}
Modified: llvm-gcc-4.2/trunk/gcc/cp/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/except.c?rev=41561&r1=41560&r2=41561&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/cp/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/except.c Wed Aug 29 02:01:18 2007
@@ -78,11 +78,15 @@
call_unexpected_node
= push_throw_library_fn (get_identifier ("__cxa_call_unexpected"), tmp);
- eh_personality_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS
-? "__gxx_personality_sj0"
-: "__gxx_personality_v0");
+ /* LLVM local begin */
+ llvm_eh_personality_libfunc
+= llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS
+ ? "__gxx_personality_sj0"
+ : "__gxx_personality_v0");
+ /* LLVM local end */
if (targetm.arm_eabi_unwinder)
-unwind_resume_libfunc = init_one_libfunc ("__cxa_end_cleanup");
+/* LLVM local */
+llvm_unwind_resume_libfunc = llvm_init_one_libfunc ("__cxa_end_cleanup");
else
default_init_unwind_resume_libfunc ();
@@ -354,9 +358,12 @@
case lang_java:
state = chose_java;
- eh_personality_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS
-? "__gcj_personality_sj0"
-: "__gcj_personality_v0");
+ /* LLVM local begin */
+ llvm_eh_personality_libfunc
+= llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS
+ ? "__gcj_personality_sj0"
+ : "__gcj_personality_v0");
+ /* LLVM local end */
break;
default:
Modified: llvm-gcc-4.2/trunk/gcc/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41561&r1=41560&r2=41561&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/except.c Wed Aug 29 02:01:18 2007
@@ -4007,9 +4007,11 @@
default_init_unwind_resume_libfunc (void)
{
/* The default c++ routines aren't actually c++ specific, so use those. */
- unwind_resume_libfunc =
-init_one_libfunc ( USING_SJLJ_EXCEPTIONS ? "_Unwind_SjLj_Resume"
-: "_Unwind_Resume");
+ /* LLVM local begin */
+ llvm_unwind_resume_libfunc = llvm_init_one_libfunc ( USING_SJLJ_EXCEPTIONS ?
+ "_Unwind_SjLj_Resume"
+ : "_Unwind_Resume");
[llvm-commits] [llvm-gcc-4.0] r41562 - /llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h
Author: asl Date: Wed Aug 29 04:27:52 2007 New Revision: 41562 URL: http://llvm.org/viewvc/llvm-project?rev=41562&view=rev Log: Unbreak sparc builds Modified: llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h Modified: llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h?rev=41562&r1=41561&r2=41562&view=diff == --- llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h (original) +++ llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h Wed Aug 29 04:27:52 2007 @@ -1547,7 +1547,7 @@ is at the high-address end of the local variables; that is, each additional local variable allocated goes at a more negative offset in the frame. */ -#define FRAME_GROWS_DOWNWARD +#define FRAME_GROWS_DOWNWARD 1 /* Offset within stack frame to start allocating local variables at. If FRAME_GROWS_DOWNWARD, this is the offset to the END of the ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r41563 - in /llvm-gcc-4.2/trunk/gcc: cp/except.c except.c except.h llvm-convert.cpp
Author: baldrick
Date: Wed Aug 29 09:34:36 2007
New Revision: 41563
URL: http://llvm.org/viewvc/llvm-project?rev=41563&view=rev
Log:
Let languages specify how to add a catch-all to the
end of an eh_selector call.
Modified:
llvm-gcc-4.2/trunk/gcc/cp/except.c
llvm-gcc-4.2/trunk/gcc/except.c
llvm-gcc-4.2/trunk/gcc/except.h
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/cp/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/except.c?rev=41563&r1=41562&r2=41563&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/cp/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/except.c Wed Aug 29 09:34:36 2007
@@ -56,6 +56,16 @@
static int can_convert_eh (tree, tree);
static tree cp_protect_cleanup_actions (void);
+/* LLVM local begin */
+/* Do nothing (return NULL_TREE). */
+
+tree
+return_null_tree (void)
+{
+ return NULL_TREE;
+}
+/* LLVM local end */
+
/* Sets up all the global eh stuff that needs to be initialized at the
start of compilation. */
@@ -92,6 +102,8 @@
lang_eh_runtime_type = build_eh_type_type;
lang_protect_cleanup_actions = &cp_protect_cleanup_actions;
+ /* LLVM local */
+ lang_eh_catch_all = return_null_tree;
}
/* Returns an expression to be executed if an unhandled exception is
Modified: llvm-gcc-4.2/trunk/gcc/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41563&r1=41562&r2=41563&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/except.c Wed Aug 29 09:34:36 2007
@@ -95,6 +95,11 @@
/* Map a type to a runtime object to match type. */
tree (*lang_eh_runtime_type) (tree);
+/* LLVM local begin */
+/* Return a type that catches all others */
+tree (*lang_eh_catch_all) (void);
+/* LLVM local end */
+
/* A hash table of label to region number. */
struct ehl_map_entry GTY(())
Modified: llvm-gcc-4.2/trunk/gcc/except.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.h?rev=41563&r1=41562&r2=41563&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/except.h (original)
+++ llvm-gcc-4.2/trunk/gcc/except.h Wed Aug 29 09:34:36 2007
@@ -139,6 +139,13 @@
/* Map a type to a runtime object to match type. */
extern tree (*lang_eh_runtime_type) (tree);
+/* LLVM local begin */
+/* If non-NULL, this function returns a type that covers all others,
+ a "catch-all" type. It may also return NULL_TREE, indicating that
+ the null runtime object catches all types, as in C++. */
+extern tree (*lang_eh_catch_all) (void);
+/* LLVM local end */
+
/* Just because the user configured --with-sjlj-exceptions=no doesn't
mean that we can use call frame exceptions. Detect that the target
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41563&r1=41562&r2=41563&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 29 09:34:36 2007
@@ -1840,12 +1840,27 @@
}
}
-if (can_throw_external_1(i, false))
+if (can_throw_external_1(i, false)) {
// Some exceptions from this region may not be caught by any handler.
// Since invokes are required to branch to the unwind label no matter
// what exception is being unwound, append a catch-all.
- // FIXME: The use of null as catch-all is C++ specific.
- Args.push_back(Constant::getNullValue(PointerType::get(Type::Int8Ty)));
+
+ // The representation of a catch-all is language specific.
+ Value *Catch_All;
+ if (!lang_eh_catch_all) {
+// Use a "cleanup" - this should be good enough for most languages.
+Catch_All = ConstantInt::get(Type::Int32Ty, 0);
+ } else {
+tree catch_all_type = lang_eh_catch_all();
+if (catch_all_type == NULL_TREE)
+ // Use a C++ style null catch-all object.
+ Catch_All = Constant::getNullValue(PointerType::get(Type::Int8Ty));
+else
+ // This language has a type that catches all others.
+ Catch_All = Emit(lookup_type_for_runtime(catch_all_type), 0);
+ }
+ Args.push_back(Catch_All);
+}
// Emit the selector call.
Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(),
Args.end(),
___
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[llvm-commits] [llvm] r41566 - /llvm/trunk/include/llvm/ADT/APInt.h
Author: lattner
Date: Wed Aug 29 11:21:18 2007
New Revision: 41566
URL: http://llvm.org/viewvc/llvm-project?rev=41566&view=rev
Log:
getMinSignedBits needs to take into consider the sign bit when the value is
positive.
Modified:
llvm/trunk/include/llvm/ADT/APInt.h
Modified: llvm/trunk/include/llvm/ADT/APInt.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=41566&r1=41565&r2=41566&view=diff
==
--- llvm/trunk/include/llvm/ADT/APInt.h (original)
+++ llvm/trunk/include/llvm/ADT/APInt.h Wed Aug 29 11:21:18 2007
@@ -856,7 +856,7 @@
inline uint32_t getMinSignedBits() const {
if (isNegative())
return BitWidth - countLeadingOnes() + 1;
-return getActiveBits();
+return getActiveBits()+1;
}
/// This method attempts to return the value of this APInt as a zero extended
___
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[llvm-commits] [llvm] r41565 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.y.cvs
Author: lattner Date: Wed Aug 29 11:15:23 2007 New Revision: 41565 URL: http://llvm.org/viewvc/llvm-project?rev=41565&view=rev Log: update these Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=41565&r1=41564&r2=41565&view=diff == --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Wed Aug 29 11:15:23 2007 @@ -4549,7 +4549,7 @@ } // Create the InvokeInst -InvokeInst *II = new InvokeInst(V, Normal, Except, &Args[0], Args.size()); +InvokeInst *II = new InvokeInst(V, Normal, Except, Args.begin(), Args.end()); II->setCallingConv(yyvsp[-12].UIntVal); yyval.TermInstVal = II; delete yyvsp[-8].ValueRefList; Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=41565&r1=41564&r2=41565&view=diff == --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Wed Aug 29 11:15:23 2007 @@ -2652,7 +2652,7 @@ } // Create the InvokeInst -InvokeInst *II = new InvokeInst(V, Normal, Except, &Args[0], Args.size()); +InvokeInst *II = new InvokeInst(V, Normal, Except, Args.begin(), Args.end()); II->setCallingConv($2); $$ = II; delete $6; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41567 - /llvm/trunk/include/llvm/Instructions.h
Author: lattner
Date: Wed Aug 29 11:32:50 2007
New Revision: 41567
URL: http://llvm.org/viewvc/llvm-project?rev=41567&view=rev
Log:
Silence implicit 64->32-bit conversion warnings.
Modified:
llvm/trunk/include/llvm/Instructions.h
Modified: llvm/trunk/include/llvm/Instructions.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=41567&r1=41566&r2=41567&view=diff
==
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Wed Aug 29 11:32:50 2007
@@ -762,17 +762,10 @@
// This argument ensures that we have an iterator we can
// do arithmetic on in constant time
std::random_access_iterator_tag) {
-typename std::iterator_traits::difference_type NumArgs =
- std::distance(ArgBegin, ArgEnd);
-
-if (NumArgs > 0) {
- // This requires that the iterator points to contiguous memory.
- init(Func, &*ArgBegin, NumArgs);
-}
-else {
- init(Func, 0, NumArgs);
-}
+unsigned NumArgs = (unsigned)std::distance(ArgBegin, ArgEnd);
+// This requires that the iterator points to contiguous memory.
+init(Func, NumArgs ? &*ArgBegin : 0, NumArgs);
setName(Name);
}
@@ -1552,17 +1545,10 @@
// This argument ensures that we have an iterator we can
// do arithmetic on in constant time
std::random_access_iterator_tag) {
-typename std::iterator_traits::difference_type NumArgs =
- std::distance(ArgBegin, ArgEnd);
-
-if (NumArgs > 0) {
- // This requires that the iterator points to contiguous memory.
- init(Func, IfNormal, IfException, &*ArgBegin, NumArgs);
-}
-else {
- init(Func, IfNormal, IfException, 0, NumArgs);
-}
+unsigned NumArgs = (unsigned)std::distance(ArgBegin, ArgEnd);
+// This requires that the iterator points to contiguous memory.
+init(Func, IfNormal, IfException, NumArgs ? &*ArgBegin : 0, NumArgs);
setName(Name);
}
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[llvm-commits] [llvm] r41568 - /llvm/trunk/configure
Author: tbrethou
Date: Wed Aug 29 11:38:16 2007
New Revision: 41568
URL: http://llvm.org/viewvc/llvm-project?rev=41568&view=rev
Log:
Updating configure script to enable MIPS.
Modified:
llvm/trunk/configure
Modified: llvm/trunk/configure
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=41568&r1=41567&r2=41568&view=diff
==
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Wed Aug 29 11:38:16 2007
@@ -2360,6 +2360,7 @@
alpha*-*) llvm_cv_target_arch="Alpha" ;;
ia64-*) llvm_cv_target_arch="IA64" ;;
arm-*) llvm_cv_target_arch="ARM" ;;
+ mips-*) llvm_cv_target_arch="Mips" ;;
*) llvm_cv_target_arch="Unknown" ;;
esac
fi
@@ -4645,6 +4646,8 @@
;;
ARM) TARGET_HAS_JIT=0
;;
+Mips)TARGET_HAS_JIT=0
+ ;;
*) TARGET_HAS_JIT=0
;;
esac
@@ -4726,7 +4729,7 @@
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips" ;;
host-only)
case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86" ;;
@@ -4736,6 +4739,7 @@
Alpha) TARGETS_TO_BUILD="Alpha" ;;
IA64)TARGETS_TO_BUILD="IA64" ;;
ARM) TARGETS_TO_BUILD="ARM" ;;
+ Mips)TARGETS_TO_BUILD="Mips" ;;
*) { { echo "$as_me:$LINENO: error: Can not set target to build"
>&5
echo "$as_me: error: Can not set target to build" >&2;}
{ (exit 1); exit 1; }; } ;;
@@ -4750,6 +4754,7 @@
alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
ia64)TARGETS_TO_BUILD="IA64 $TARGETS_TO_BUILD" ;;
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
+mips)TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
*) { { echo "$as_me:$LINENO: error: Unrecognized target $a_target" >&5
echo "$as_me: error: Unrecognized target $a_target" >&2;}
{ (exit 1); exit 1; }; } ;;
@@ -10369,7 +10374,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext < conftest.$ac_ext
+ echo '#line 12521 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -14231,11 +14236,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
- (eval echo "\"\$as_me:14234: $lt_compile\"" >&5)
+ (eval echo "\"\$as_me:14239: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
- echo "$as_me:14238: \$? = $ac_status" >&5
+ echo "$as_me:14243: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
@@ -14499,11 +14504,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
- (eval echo "\"\$as_me:14502: $lt_compile\"" >&5)
+ (eval echo "\"\$as_me:14507: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
- echo "$as_me:14506: \$? = $ac_status" >&5
+ echo "$as_me:14511: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
@@ -14603,11 +14608,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
- (eval echo "\"\$as_me:14606: $lt_compile\"" >&5)
+ (eval echo "\"\$as_me:14611: $lt_compile\"" >&5)
(eval "$lt_compile" 2>out/conftest.err)
ac_status=$?
cat out/conftest.err >&5
- echo "$as_me:14610: \$? = $ac_status" >&5
+ echo "$as_me:14615: \$? = $ac_status" >&5
if (exit $ac_status) && test -s out/conftest2.$ac_objext
then
# The compiler can only warn and ignore the option if not recognized
@@ -17055,7 +17060,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext < conftest.$ac_ext <&5)
+ (eval echo "\"\$as_me:19531: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
- echo "$as_me:19530: \$? = $ac_status" >&5
+ echo "$as_me:19535: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
@@ -19627,11 +19632,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_com
[llvm-commits] [llvm] r41569 - /llvm/trunk/CREDITS.TXT
Author: raulherbster Date: Wed Aug 29 11:51:52 2007 New Revision: 41569 URL: http://llvm.org/viewvc/llvm-project?rev=41569&view=rev Log: New contributor added Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=41569&r1=41568&r2=41569&view=diff == --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Wed Aug 29 11:51:52 2007 @@ -240,4 +240,6 @@ D: MMX & SSSE3 instructions D: SPEC2006 support - +N: Raul Fernandes Herbster +E: [EMAIL PROTECTED] +D: JIT support for ARM ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r41573 - /llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
Author: evancheng
Date: Wed Aug 29 12:55:47 2007
New Revision: 41573
URL: http://llvm.org/viewvc/llvm-project?rev=41573&view=rev
Log:
Added missing x86 feature string for 64-bit mode.
Modified:
llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/i386/i386.h?rev=41573&r1=41572&r2=41573&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/config/i386/i386.h (original)
+++ llvm-gcc-4.0/trunk/gcc/config/i386/i386.h Wed Aug 29 12:55:47 2007
@@ -4037,6 +4037,7 @@
F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \
else \
F.setCPU(ix86_arch_string); \
+if (TARGET_64BIT) F.AddFeature("64bit"); \
if (TARGET_MMX) F.AddFeature("mmx");\
if (TARGET_SSE) F.AddFeature("sse");\
if (TARGET_SSE2) F.AddFeature("sse2"); \
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Re: [llvm-commits] [llvm-gcc-4.0] r41573 - /llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
Thanks Evan, don't forget to apply this to 4.2 also :)
-Chris
On Aug 29, 2007, at 10:55 AM, Evan Cheng wrote:
> Author: evancheng
> Date: Wed Aug 29 12:55:47 2007
> New Revision: 41573
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41573&view=rev
> Log:
> Added missing x86 feature string for 64-bit mode.
>
> Modified:
> llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
>
> Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/
> config/i386/i386.h?rev=41573&r1=41572&r2=41573&view=diff
>
> ==
>
> --- llvm-gcc-4.0/trunk/gcc/config/i386/i386.h (original)
> +++ llvm-gcc-4.0/trunk/gcc/config/i386/i386.h Wed Aug 29 12:55:47 2007
> @@ -4037,6 +4037,7 @@
>F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \
> else \
>F.setCPU(ix86_arch_string); \
> +if (TARGET_64BIT) F.AddFeature("64bit"); \
> if (TARGET_MMX) F.AddFeature("mmx");\
> if (TARGET_SSE) F.AddFeature("sse");\
> if (TARGET_SSE2) F.AddFeature("sse2"); \
>
>
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Re: [llvm-commits] Trampoline support (pointers nested funtions)
On Aug 28, 2007, at 11:46 AM, Duncan Sands wrote:
> Hi Evan, thanks for your comments.
>
3. In X86TargetLowering::LowerTRAMPOLINE():
+case CallingConv::X86_StdCall: {
+ Move = 0xb9; // Pass chain in ECX
I assume this is the ModR/M byte?
>>>
>>> Well, it's MOV32ri.
>>
>> Then it should be 0xb8?
>
> It already had ECX or'd in.
Then plz write something like "0xb8 | 1" and comment it so it's more
clear (to me at least :-).
>
>> Please factor out getX86RegNum() as well. Perhaps put them in
>> X86RegisterInfo.cpp (since lowering really shouldn't depend on
>> codeemitter...) Do getX86RegNum(X86::EAX) rather than make use
>> N86::EAX directly.
> ...
>> Please go through X86InstrInfo to get the opcode numbers instead of
>> hard coding it.
>
> Does the attached patch seem OK?
Yes, thx.
Evan
>
> Ciao,
>
> Duncan.
>
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Re: [llvm-commits] [llvm] r41569 - /llvm/trunk/CREDITS.TXT
On 8/29/07, Raul Herbster <[EMAIL PROTECTED]> wrote: > --- llvm/trunk/CREDITS.TXT (original) > +++ llvm/trunk/CREDITS.TXT Wed Aug 29 11:51:52 2007 > @@ -240,4 +240,6 @@ > D: MMX & SSSE3 instructions > D: SPEC2006 support > > - > +N: Raul Fernandes Herbster > +E: [EMAIL PROTECTED] > +D: JIT support for ARM > Please alphabetize. Thanks! -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r41575 - /llvm-gcc-4.2/trunk/gcc/config/i386/i386.h
Author: evancheng
Date: Wed Aug 29 13:19:23 2007
New Revision: 41575
URL: http://llvm.org/viewvc/llvm-project?rev=41575&view=rev
Log:
Merge -r41572:41573 llvm-gcc-4.0/trunk
Modified:
llvm-gcc-4.2/trunk/gcc/config/i386/i386.h
Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/i386.h?rev=41575&r1=41574&r2=41575&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/config/i386/i386.h (original)
+++ llvm-gcc-4.2/trunk/gcc/config/i386/i386.h Wed Aug 29 13:19:23 2007
@@ -3707,6 +3707,7 @@
F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \
else \
F.setCPU(ix86_arch_string); \
+if (TARGET_64BIT) F.AddFeature("64bit"); \
if (TARGET_MMX) F.AddFeature("mmx");\
if (TARGET_SSE) F.AddFeature("sse");\
if (TARGET_SSE2) F.AddFeature("sse2"); \
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[llvm-commits] [llvm] r41576 - /llvm/trunk/CREDITS.TXT
Author: raulherbster Date: Wed Aug 29 13:21:29 2007 New Revision: 41576 URL: http://llvm.org/viewvc/llvm-project?rev=41576&view=rev Log: Alphabetize Raul's entry. Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=41576&r1=41575&r2=41576&view=diff == --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Wed Aug 29 13:21:29 2007 @@ -105,6 +105,10 @@ D: Miscellaneous bug fixes D: Register allocation refactoring +N: Raul Fernandes Herbster +E: [EMAIL PROTECTED] +D: JIT support for ARM + N: Paolo Invernizzi E: [EMAIL PROTECTED] D: Visual C++ compatibility fixes @@ -240,6 +244,3 @@ D: MMX & SSSE3 instructions D: SPEC2006 support -N: Raul Fernandes Herbster -E: [EMAIL PROTECTED] -D: JIT support for ARM ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41577 - in /llvm/trunk/lib/Target/X86: X86CodeEmitter.cpp X86CodeEmitter.h X86ISelLowering.cpp X86InstrInfo.h X86RegisterInfo.cpp X86RegisterInfo.h
Author: baldrick
Date: Wed Aug 29 14:01:20 2007
New Revision: 41577
URL: http://llvm.org/viewvc/llvm-project?rev=41577&view=rev
Log:
Move getX86RegNum into X86RegisterInfo and use it
in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
Removed:
llvm/trunk/lib/Target/X86/X86CodeEmitter.h
Modified:
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
llvm/trunk/lib/Target/X86/X86RegisterInfo.h
Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=41577&r1=41576&r2=41577&view=diff
==
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Wed Aug 29 14:01:20 2007
@@ -13,7 +13,6 @@
//===--===//
#define DEBUG_TYPE "x86-emitter"
-#include "X86CodeEmitter.h"
#include "X86InstrInfo.h"
#include "X86Subtarget.h"
#include "X86TargetMachine.h"
@@ -193,60 +192,8 @@
MCE.emitWordLE(0); // The relocated value will be added to the displacement
}
-// getX86RegNum - This function maps LLVM register identifiers to their X86
-// specific numbering, which is used in various places encoding instructions.
-//
unsigned Emitter::getX86RegNum(unsigned RegNo) {
- switch(RegNo) {
- case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
- case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
- case X86::RDX: case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
- case X86::RBX: case X86::EBX: case X86::BX: case X86::BL: return N86::EBX;
- case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: case X86::AH:
-return N86::ESP;
- case X86::RBP: case X86::EBP: case X86::BP: case X86::BPL: case X86::CH:
-return N86::EBP;
- case X86::RSI: case X86::ESI: case X86::SI: case X86::SIL: case X86::DH:
-return N86::ESI;
- case X86::RDI: case X86::EDI: case X86::DI: case X86::DIL: case X86::BH:
-return N86::EDI;
-
- case X86::R8: case X86::R8D: case X86::R8W: case X86::R8B:
-return N86::EAX;
- case X86::R9: case X86::R9D: case X86::R9W: case X86::R9B:
-return N86::ECX;
- case X86::R10: case X86::R10D: case X86::R10W: case X86::R10B:
-return N86::EDX;
- case X86::R11: case X86::R11D: case X86::R11W: case X86::R11B:
-return N86::EBX;
- case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B:
-return N86::ESP;
- case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B:
-return N86::EBP;
- case X86::R14: case X86::R14D: case X86::R14W: case X86::R14B:
-return N86::ESI;
- case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B:
-return N86::EDI;
-
- case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3:
- case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
-return RegNo-X86::ST0;
-
- case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3:
- case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7:
-return II->getRegisterInfo().getDwarfRegNum(RegNo) -
- II->getRegisterInfo().getDwarfRegNum(X86::XMM0);
- case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11:
- case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15:
-return II->getRegisterInfo().getDwarfRegNum(RegNo) -
- II->getRegisterInfo().getDwarfRegNum(X86::XMM8);
-
- default:
-assert(MRegisterInfo::isVirtualRegister(RegNo) &&
- "Unknown physical register!");
-assert(0 && "Register allocator hasn't allocated reg correctly yet!");
-return 0;
- }
+ return ((X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo);
}
inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
Removed: llvm/trunk/lib/Target/X86/X86CodeEmitter.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.h?rev=41576&view=auto
==
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.h (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.h (removed)
@@ -1,25 +0,0 @@
-//===-- X86CodeEmitter.h - X86 DAG Lowering Interface ---*- C++
-*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file was developed by Duncan Sands and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===--===//
-//
-// This file defines utilities for X86 code emission.
-//
-//===--===//
-
-#ifndef X86CODEEMITTER_H
-#define X86CODEEMITTER_H
-
-/// N86 namespa
Re: [llvm-commits] Trampoline support (pointers nested funtions)
Hi Evan, > > It already had ECX or'd in. > > Then plz write something like "0xb8 | 1" and comment it so it's more > clear (to me at least :-). this is from the original version - the version I committed before the holidays already did 0xb8 | 1, and the version I just committed does it even better :) > > Does the attached patch seem OK? > > Yes, thx. Thanks for the review! I just committed it. Ciao, Duncan. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41578 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Author: asl
Date: Wed Aug 29 14:28:29 2007
New Revision: 41578
URL: http://llvm.org/viewvc/llvm-project?rev=41578&view=rev
Log:
Lower FRAME_TO_ADDR_OFFSET to zero by default (if not custom lowered)
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41578&r1=41577&r2=41578&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 29 14:28:29 2007
@@ -733,7 +733,6 @@
break;
case ISD::FRAMEADDR:
case ISD::RETURNADDR:
- case ISD::FRAME_TO_ARGS_OFFSET:
// The only option for these nodes is to custom lower them. If the target
// does not custom lower them, then return zero.
Tmp1 = TLI.LowerOperation(Op, DAG);
@@ -742,6 +741,19 @@
else
Result = DAG.getConstant(0, TLI.getPointerTy());
break;
+ case ISD::FRAME_TO_ARGS_OFFSET:
+MVT::ValueType VT = Node->getValueType(0);
+switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
+default: assert(0 && "This action is not supported yet!");
+case TargetLowering::Custom:
+ Result = TLI.LowerOperation(Op, DAG);
+ if (Result.Val) break;
+ // Fall Thru
+case TargetLowering::Legal:
+ Result = DAG.getConstant(0, VT);
+ break;
+}
+break;
case ISD::EXCEPTIONADDR: {
Tmp1 = LegalizeOp(Node->getOperand(0));
MVT::ValueType VT = Node->getValueType(0);
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[llvm-commits] [llvm] r41584 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Author: asl
Date: Wed Aug 29 18:18:48 2007
New Revision: 41584
URL: http://llvm.org/viewvc/llvm-project?rev=41584&view=rev
Log:
Fix use of declaration inside case block
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41584&r1=41583&r2=41584&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 29 18:18:48 2007
@@ -741,7 +741,7 @@
else
Result = DAG.getConstant(0, TLI.getPointerTy());
break;
- case ISD::FRAME_TO_ARGS_OFFSET:
+ case ISD::FRAME_TO_ARGS_OFFSET: {
MVT::ValueType VT = Node->getValueType(0);
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
default: assert(0 && "This action is not supported yet!");
@@ -753,6 +753,7 @@
Result = DAG.getConstant(0, VT);
break;
}
+}
break;
case ISD::EXCEPTIONADDR: {
Tmp1 = LegalizeOp(Node->getOperand(0));
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[llvm-commits] [llvm] r41587 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/Constants.h include/llvm/Target/TargetLowering.h lib/CodeGen/Se
Author: johannes
Date: Wed Aug 29 19:23:21 2007
New Revision: 41587
URL: http://llvm.org/viewvc/llvm-project?rev=41587&view=rev
Log:
Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/trunk/include/llvm/Constants.h
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/trunk/lib/Support/APFloat.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/VMCore/Constants.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=41587&r1=41586&r2=41587&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Wed Aug 29 19:23:21 2007
@@ -174,9 +174,14 @@
return getConstant(Val, VT, true);
}
SDOperand getConstantFP(double Val, MVT::ValueType VT, bool isTarget =
false);
+ SDOperand getConstantFP(const APFloat& Val, MVT::ValueType VT,
+ bool isTarget = false);
SDOperand getTargetConstantFP(double Val, MVT::ValueType VT) {
return getConstantFP(Val, VT, true);
}
+ SDOperand getTargetConstantFP(const APFloat& Val, MVT::ValueType VT) {
+return getConstantFP(Val, VT, true);
+ }
SDOperand getGlobalAddress(const GlobalValue *GV, MVT::ValueType VT,
int offset = 0, bool isTargetGA = false);
SDOperand getTargetGlobalAddress(const GlobalValue *GV, MVT::ValueType VT,
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=41587&r1=41586&r2=41587&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Aug 29 19:23:21 2007
@@ -1182,6 +1182,8 @@
}
bool isExactlyValue(const APFloat& V) const;
+ bool isValueValidForType(MVT::ValueType VT, const APFloat& Val);
+
static bool classof(const ConstantFPSDNode *) { return true; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::ConstantFP ||
Modified: llvm/trunk/include/llvm/Constants.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=41587&r1=41586&r2=41587&view=diff
==
--- llvm/trunk/include/llvm/Constants.h (original)
+++ llvm/trunk/include/llvm/Constants.h Wed Aug 29 19:23:21 2007
@@ -218,12 +218,20 @@
ConstantFP(const ConstantFP &); // DO NOT IMPLEMENT
protected:
ConstantFP(const Type *Ty, double V);
+ ConstantFP(const Type *Ty, const APFloat& V);
public:
/// get() - Static factory methods - Return objects of the specified value
static ConstantFP *get(const Type *Ty, double V);
+ static ConstantFP *get(const Type *Ty, const APFloat& V);
/// isValueValidForType - return true if Ty is big enough to represent V.
- static bool isValueValidForType(const Type *Ty, double V);
+ static bool isValueValidForType(const Type *Ty, const APFloat& V);
+ static bool isValueValidForType(const Type *Ty, double V) {
+if (Ty == Type::FloatTy)
+ return isValueValidForType(Ty, APFloat((float)V));
+else
+ return isValueValidForType(Ty, APFloat(V));
+ }
inline double getValue() const {
if (&Val.getSemantics() == &APFloat::IEEEdouble)
return Val.convertToDouble();
@@ -232,6 +240,7 @@
else
assert(0);
}
+ inline const APFloat& getValueAPF() const { return Val; }
/// isNullValue - Return true if this is the value that would be returned by
/// getNullValue. Don't depend on == for doubles to tell us it's zero, it
@@ -242,8 +251,15 @@
/// it returns true for things that are clearly not equal, like -0.0 and 0.0.
/// As such, this method can be used to do an exact bit-for-bit comparison of
/// two floating point values.
- bool isExactlyValue(double V) const;
-
+ bool isExactlyValue(const APFloat& V) const;
+ bool isExactlyValue(double V) const {
+if (&Val.getSemantics() == &APFloat::IEEEdouble)
+ return isExactlyValue(APFloat(V));
+else if (&Val.getSemantics() == &APFloat::IEEEsingle)
+ return isExactlyValue(APFloat((float)V));
+else
+ assert(0);
+ }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static
[llvm-commits] [llvm] r41590 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Author: void Date: Wed Aug 29 19:59:19 2007 New Revision: 41590 URL: http://llvm.org/viewvc/llvm-project?rev=41590&view=rev Log: Use i64 on a PPC64 machine Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=41590&r1=41589&r2=41590&view=diff == --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Aug 29 19:59:19 2007 @@ -3466,7 +3466,7 @@ if (isPPC64) return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::X31 : PPC::X1, - MVT::i32); + MVT::i64); else return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::R31 : PPC::R1, MVT::i32); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r41593 - /llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Author: void
Date: Wed Aug 29 20:10:18 2007
New Revision: 41593
URL: http://llvm.org/viewvc/llvm-project?rev=41593&view=rev
Log:
Enable exception handling by default.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=41593&r1=41592&r2=41593&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Wed Aug 29 20:10:18 2007
@@ -122,9 +122,8 @@
Args.push_back("--debug-pass=Structure");
if (flag_debug_pass_arguments)
Args.push_back("--debug-pass=Arguments");
-// Breaks the x86-darwin build
-// if (flag_exceptions)
-//Args.push_back("--enable-eh");
+ if (flag_exceptions)
+Args.push_back("--enable-eh");
// If there are options that should be passed through to the LLVM backend
// directly from the command line, do so now. This is mainly for debugging
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[llvm-commits] [llvm-gcc-4.2] r41594 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Author: void
Date: Wed Aug 29 20:14:03 2007
New Revision: 41594
URL: http://llvm.org/viewvc/llvm-project?rev=41594&view=rev
Log:
Enable EH by default
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=41594&r1=41593&r2=41594&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Aug 29 20:14:03 2007
@@ -123,9 +123,8 @@
Args.push_back("--debug-pass=Structure");
if (flag_debug_pass_arguments)
Args.push_back("--debug-pass=Arguments");
-// Breaks the x86-darwin build
-// if (flag_exceptions)
-//Args.push_back("--enable-eh");
+ if (flag_exceptions)
+Args.push_back("--enable-eh");
// If there are options that should be passed through to the LLVM backend
// directly from the command line, do so now. This is mainly for debugging
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[llvm-commits] [llvm] r41595 - in /llvm/trunk/lib/Target/X86: X86InstrFPStack.td X86InstrInfo.td X86InstrMMX.td X86InstrSSE.td X86InstrX86-64.td
Author: evancheng
Date: Thu Aug 30 00:49:43 2007
New Revision: 41595
URL: http://llvm.org/viewvc/llvm-project?rev=41595&view=rev
Log:
Mark load instructions with isLoad = 1.
Modified:
llvm/trunk/lib/Target/X86/X86InstrFPStack.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86InstrMMX.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
llvm/trunk/lib/Target/X86/X86InstrX86-64.td
Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=41595&r1=41594&r2=41595&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Thu Aug 30 00:49:43 2007
@@ -334,12 +334,14 @@
"fcmovnu\t{$op, %st(0)|%ST(0), $op}">, DB;
// Floating point loads & stores.
+let isLoad = 1 in {
def LD_Fp32m : FpI<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP,
[(set RFP32:$dst, (loadf32 addr:$src))]>;
def LD_Fp64m : FpI<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP,
[(set RFP64:$dst, (loadf64 addr:$src))]>;
def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP,
[(set RFP80:$dst, (loadf80 addr:$src))]>;
+}
def LD_Fp32m64 : FpI<(outs RFP64:$dst), (ins f32mem:$src), ZeroArgFP,
[(set RFP64:$dst, (f64 (extloadf32 addr:$src)))]>;
def LD_Fp64m80 : FpI_<(outs RFP80:$dst), (ins f64mem:$src), ZeroArgFP,
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=41595&r1=41594&r2=41595&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Aug 30 00:49:43 2007
@@ -521,6 +521,7 @@
"mov{l}\t{$src, $dst|$dst, $src}",
[(store (i32 imm:$src), addr:$dst)]>;
+let isLoad = 1 in {
def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src),
"mov{b}\t{$src, $dst|$dst, $src}",
[(set GR8:$dst, (load addr:$src))]>;
@@ -530,6 +531,7 @@
def MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"mov{l}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (load addr:$src))]>;
+}
def MOV8mr : I<0x88, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src),
"mov{b}\t{$src, $dst|$dst, $src}",
@@ -2332,10 +2334,12 @@
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32_rr : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32_:$src),
"mov{l}\t{$src, $dst|$dst, $src}", []>;
+let isLoad = 1 in {
def MOV16_rm : I<0x8B, MRMSrcMem, (outs GR16_:$dst), (ins i16mem:$src),
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32_rm : I<0x8B, MRMSrcMem, (outs GR32_:$dst), (ins i32mem:$src),
"mov{l}\t{$src, $dst|$dst, $src}", []>;
+}
def MOV16_mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16_:$src),
"mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
def MOV32_mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32_:$src),
Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=41595&r1=41594&r2=41595&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Thu Aug 30 00:49:43 2007
@@ -157,7 +157,7 @@
// Data Transfer Instructions
def MMX_MOVD64rr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src),
"movd\t{$src, $dst|$dst, $src}", []>;
-let isReMaterializable = 1 in
+let isLoad = 1, isReMaterializable = 1 in
def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src),
"movd\t{$src, $dst|$dst, $src}", []>;
def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src),
@@ -168,7 +168,7 @@
def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src),
"movq\t{$src, $dst|$dst, $src}", []>;
-let isReMaterializable = 1 in
+let isLoad = 1, isReMaterializable = 1 in
def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src),
"movq\t{$src, $dst|$dst, $src}",
[(set VR64:$dst, (load_mmx addr:$src))]>;
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=41595&r1=41594&r2=41595&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td
[llvm-commits] [llvm] r41596 - /llvm/trunk/include/llvm/CodeGen/MachineInstr.h
Author: evancheng
Date: Thu Aug 30 00:50:32 2007
New Revision: 41596
URL: http://llvm.org/viewvc/llvm-project?rev=41596&view=rev
Log:
Added CreateFrameIndex to create a FrameIndex MachineOperand without a
MachineInstr.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineInstr.h
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=41596&r1=41595&r2=41596&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Thu Aug 30 00:50:32 2007
@@ -102,6 +102,18 @@
return Op;
}
+ static MachineOperand CreateFrameIndex(unsigned Idx) {
+MachineOperand Op;
+Op.opType = MachineOperand::MO_FrameIndex;
+Op.contents.immedVal = Idx;
+Op.IsDef = false;
+Op.IsImp = false;
+Op.IsKill = false;
+Op.IsDead = false;
+Op.auxInfo.offset = 0;
+return Op;
+ }
+
const MachineOperand &operator=(const MachineOperand &MO) {
contents = MO.contents;
IsDef= MO.IsDef;
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[llvm-commits] [llvm] r41597 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h include/llvm/Target/MRegisterInfo.h lib/Target/ARM/ARMRegisterInfo.h lib/Target/Alpha/AlphaRegisterInfo.h lib
Author: evancheng
Date: Thu Aug 30 00:52:20 2007
New Revision: 41597
URL: http://llvm.org/viewvc/llvm-project?rev=41597&view=rev
Log:
Add a variant of foldMemoryOperand to fold any load / store, not just load /
store from / to stack slots.
Modified:
llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
llvm/trunk/include/llvm/Target/MRegisterInfo.h
llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h
llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h
llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h
llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h
llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h
Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=41597&r1=41596&r2=41597&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Thu Aug 30 00:52:20
2007
@@ -242,11 +242,13 @@
bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo,
MachineInstr *MI);
-/// tryFoldMemoryOperand - Attempts to fold a spill / restore from slot
-/// to reg into ith operand of specified MI. If it is successul, MI is
-/// updated with the newly created MI and returns true.
-bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, unsigned
index,
- unsigned i, int slot, unsigned reg);
+/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from
+/// slot / to reg or any rematerialized load into ith operand of specified
+/// MI. If it is successul, MI is updated with the newly created MI and
+/// returns true.
+bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
+ unsigned index, unsigned i, bool isSS,
+ MachineInstr *DefMI, int slot, unsigned reg);
static LiveInterval createInterval(unsigned Reg);
Modified: llvm/trunk/include/llvm/Target/MRegisterInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/MRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff
==
--- llvm/trunk/include/llvm/Target/MRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/Target/MRegisterInfo.h Thu Aug 30 00:52:20 2007
@@ -521,6 +521,15 @@
return 0;
}
+ /// foldMemoryOperand - Same as the previous version except it allows folding
+ /// of any load and store from / to any address, not just from a specific
+ /// stack slot.
+ virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
+ unsigned OpNum,
+ MachineInstr* LoadMI) const {
+return 0;
+ }
+
/// targetHandlesStackFrameRounding - Returns true if the target is
responsible
/// for rounding up the stack frame (probably at emitPrologue time).
virtual bool targetHandlesStackFrameRounding() const {
Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff
==
--- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h Thu Aug 30 00:52:20 2007
@@ -66,6 +66,11 @@
MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
int FrameIndex) const;
+ MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
+ MachineInstr* LoadMI) const {
+return 0;
+ }
+
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
const TargetRegisterClass* const*
Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff
==
--- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h Thu Aug 30 00:52:20 2007
@@ -41,6 +41,11 @@
MachineInstr* foldMemoryOperand(MachineInstr *MI, unsigned OpNum,
int FrameIndex) const;
+ MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
+ MachineInstr* LoadMI) const {
+return 0;
+ }
+
void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegi
[llvm-commits] [llvm] r41598 - /llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
Author: evancheng
Date: Thu Aug 30 00:53:02 2007
New Revision: 41598
URL: http://llvm.org/viewvc/llvm-project?rev=41598&view=rev
Log:
Try fold re-materialized load instructions into its uses.
Modified:
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=41598&r1=41597&r2=41598&view=diff
==
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Aug 30 00:53:02 2007
@@ -236,10 +236,17 @@
return true;
}
+/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from
+/// slot / to reg or any rematerialized load into ith operand of specified
+/// MI. If it is successul, MI is updated with the newly created MI and
+/// returns true.
bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
unsigned index, unsigned i,
+ bool isSS, MachineInstr *DefMI,
int slot, unsigned reg) {
- MachineInstr *fmi = mri_->foldMemoryOperand(MI, i, slot);
+ MachineInstr *fmi = isSS
+? mri_->foldMemoryOperand(MI, i, slot)
+: mri_->foldMemoryOperand(MI, i, DefMI);
if (fmi) {
// Attempt to fold the memory reference into the instruction. If
// we can do this, we don't need to insert spill code.
@@ -340,6 +347,8 @@
bool CanDelete = ReMatDelete[I->valno->id];
int LdSlot = 0;
bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(DefMI, LdSlot);
+bool isLoad = isLoadSS ||
+ (DefIsReMat && (DefMI->getInstrDescriptor()->Flags & M_LOAD_FLAG));
unsigned index = getBaseIndex(I->start);
unsigned end = getBaseIndex(I->end-1) + InstrSlots::NUM;
for (; index != end; index += InstrSlots::NUM) {
@@ -362,20 +371,22 @@
RemoveMachineInstrFromMaps(MI);
MI->eraseFromParent();
break;
- } else if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg))
+ } else if (tryFoldMemoryOperand(MI, vrm, index, i, true,
+ DefMI, slot, li.reg)) {
// Folding the load/store can completely change the instruction
// in unpredictable ways, rescan it from the beginning.
goto RestartInstruction;
-} else if (isLoadSS &&
- tryFoldMemoryOperand(MI, vrm, index, i, LdSlot,
li.reg)){
- // FIXME: Other rematerializable loads can be folded as well.
- // Folding the load/store can completely change the
- // instruction in unpredictable ways, rescan it from
- // the beginning.
- goto RestartInstruction;
-}
+ }
+} else if (isLoad &&
+ tryFoldMemoryOperand(MI, vrm, index, i, isLoadSS,
+DefMI, LdSlot, li.reg))
+// Folding the load/store can completely change the
+// instruction in unpredictable ways, rescan it from
+// the beginning.
+goto RestartInstruction;
} else {
-if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg))
+if (tryFoldMemoryOperand(MI, vrm, index, i, true, DefMI,
+ slot, li.reg))
// Folding the load/store can completely change the instruction
in
// unpredictable ways, rescan it from the beginning.
goto RestartInstruction;
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[llvm-commits] [llvm] r41599 - in /llvm/trunk: lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86RegisterInfo.h test/CodeGen/X86/constant-pool-remat-0.ll
Author: evancheng
Date: Thu Aug 30 00:54:07 2007
New Revision: 41599
URL: http://llvm.org/viewvc/llvm-project?rev=41599&view=rev
Log:
Added support to fold X86 load / store instructions. This allow rematerialized
loads to be folded into their uses.
Modified:
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
llvm/trunk/lib/Target/X86/X86RegisterInfo.h
llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=41599&r1=41598&r2=41599&view=diff
==
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Thu Aug 30 00:54:07 2007
@@ -270,63 +270,81 @@
MBB.insert(I, MI);
}
-static MachineInstr *FuseTwoAddrInst(unsigned Opcode, unsigned FrameIndex,
- MachineInstr *MI,
- const TargetInstrInfo &TII) {
+static const MachineInstrBuilder &FuseInstrAddOperand(MachineInstrBuilder &MIB,
+ MachineOperand &MO) {
+ if (MO.isReg())
+MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
+ else if (MO.isImm())
+MIB = MIB.addImm(MO.getImm());
+ else if (MO.isFrameIndex())
+MIB = MIB.addFrameIndex(MO.getFrameIndex());
+ else if (MO.isGlobalAddress())
+MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset());
+ else if (MO.isConstantPoolIndex())
+MIB = MIB.addConstantPoolIndex(MO.getConstantPoolIndex(), MO.getOffset());
+ else if (MO.isJumpTableIndex())
+MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex());
+ else if (MO.isExternalSymbol())
+MIB = MIB.addExternalSymbol(MO.getSymbolName());
+ else
+assert(0 && "Unknown operand for FuseInst!");
+
+ return MIB;
+}
+
+static MachineInstr *FuseTwoAddrInst(unsigned Opcode,
+ SmallVector &MOs,
+ MachineInstr *MI, const TargetInstrInfo &TII)
{
unsigned NumOps = TII.getNumOperands(MI->getOpcode())-2;
+
// Create the base instruction with the memory operand as the first part.
- MachineInstrBuilder MIB = addFrameReference(BuildMI(TII.get(Opcode)),
- FrameIndex);
+ MachineInstrBuilder MIB = BuildMI(TII.get(Opcode));
+ unsigned NumAddrOps = MOs.size();
+ for (unsigned i = 0; i != NumAddrOps; ++i)
+MIB = FuseInstrAddOperand(MIB, MOs[i]);
+ if (NumAddrOps < 4) // FrameIndex only
+MIB.addImm(1).addReg(0).addImm(0);
// Loop over the rest of the ri operands, converting them over.
for (unsigned i = 0; i != NumOps; ++i) {
MachineOperand &MO = MI->getOperand(i+2);
-if (MO.isReg())
- MIB = MIB.addReg(MO.getReg(), false, MO.isImplicit());
-else if (MO.isImm())
- MIB = MIB.addImm(MO.getImm());
-else if (MO.isGlobalAddress())
- MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset());
-else if (MO.isJumpTableIndex())
- MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex());
-else if (MO.isExternalSymbol())
- MIB = MIB.addExternalSymbol(MO.getSymbolName());
-else
- assert(0 && "Unknown operand type!");
+MIB = FuseInstrAddOperand(MIB, MO);
}
return MIB;
}
static MachineInstr *FuseInst(unsigned Opcode, unsigned OpNo,
- unsigned FrameIndex, MachineInstr *MI,
- const TargetInstrInfo &TII) {
+ SmallVector &MOs,
+ MachineInstr *MI, const TargetInstrInfo &TII) {
MachineInstrBuilder MIB = BuildMI(TII.get(Opcode));
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (i == OpNo) {
assert(MO.isReg() && "Expected to fold into reg operand!");
- MIB = addFrameReference(MIB, FrameIndex);
-} else if (MO.isReg())
- MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
-else if (MO.isImm())
- MIB = MIB.addImm(MO.getImm());
-else if (MO.isGlobalAddress())
- MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset());
-else if (MO.isJumpTableIndex())
- MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex());
-else if (MO.isExternalSymbol())
- MIB = MIB.addExternalSymbol(MO.getSymbolName());
-else
- assert(0 && "Unknown operand for FuseInst!");
+ unsigned NumAddrOps = MOs.size();
+ for (unsigned i = 0; i != NumAddrOps; ++i)
+MIB = FuseInstrAddOperand(MIB, MOs[i]);
+ if (NumAddrOps < 4) // FrameIndex only
+MIB.addImm(1).addReg(0).addImm(0);
+} else {
+ MIB = FuseInstrAddOperand(MIB, MO);
+}
}
return MIB;
}
-static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII,
-unsigned Opcode, unsigned FrameIndex,
+static MachineInstr
Re: [llvm-commits] [llvm] r40736 - in /llvm/trunk: lib/Target/X86/X86InstrMMX.td lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/constant-pool-remat-0.ll
This is done. Now we emit this:
_array:
subq$8, %rsp
mulss LCPI1_0(%rip), %xmm0
call_qux
mulss LCPI1_0(%rip), %xmm0
addq$8, %rsp
ret
Evan
On Aug 2, 2007, at 8:50 AM, Chris Lattner wrote:
>> Mark the SSE and MMX load instructions that
>> X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
>> with the isReMaterializable flag so that it is given a chance to
>> handle
>> them. Without hoisting constant-pool loads from loops this isn't very
>> visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll
>> from
>> making a copy of the constant pool on the stack.
>>
>> @@ -0,0 +1,10 @@
>> +; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | wc -l | grep 3
>> +
>> +declare float @qux(float %y)
>> +
>> +define float @array(float %a) {
>> + %n = mul float %a, 9.0
>> + %m = call float @qux(float %n)
>> + %o = mul float %m, 9.0
>> + ret float %o
>> +}
>
> Interesting testcase. I'm now getting:
>
> _array:
> subq$8, %rsp
> movss LCPI1_0(%rip), %xmm1
> mulss %xmm1, %xmm0
> call_qux
> movss LCPI1_0(%rip), %xmm1
> mulss %xmm1, %xmm0
> addq$8, %rsp
> ret
>
> for this. Both loads should be folded into the mulss's. Because the
> load is shared at isel time, this can't be done there, but it can be
> done after the remat. Maybe the register allocator needs to call
> MRegisterInfo::foldMemoryOperand if the remat is a load that has a
> single use?
>
> -Chris
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