[llvm-commits] [llvm] r41479 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2004-02-12-Memcpy.llx
Author: rafael
Date: Mon Aug 27 05:18:20 2007
New Revision: 41479
URL: http://llvm.org/viewvc/llvm-project?rev=41479&view=rev
Log:
call libc memcpy/memset if array size is bigger then threshold.
Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41479&r1=41478&r2=41479&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 27 05:18:20 2007
@@ -3753,10 +3753,10 @@
if (Align == 0) Align = 1;
ConstantSDNode *I = dyn_cast(Op.getOperand(3));
- // If not DWORD aligned, call memset if size is less than the threshold.
+ // If not DWORD aligned or size is more than the threshold, call memset.
// It knows how to align to the right boundary first.
if ((Align & 3) != 0 ||
- (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) {
+ (I && I->getValue() > Subtarget->getMinRepStrSizeThreshold())) {
MVT::ValueType IntPtr = getPointerTy();
const Type *IntPtrTy = getTargetData()->getIntPtrType();
TargetLowering::ArgListTy Args;
@@ -3909,10 +3909,10 @@
if (Align == 0) Align = 1;
ConstantSDNode *I = dyn_cast(Op.getOperand(3));
- // If not DWORD aligned, call memcpy if size is less than the threshold.
+ // If not DWORD aligned or size is more than the threshold, call memcpy.
// It knows how to align to the right boundary first.
if ((Align & 3) != 0 ||
- (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) {
+ (I && I->getValue() > Subtarget->getMinRepStrSizeThreshold())) {
MVT::ValueType IntPtr = getPointerTy();
TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry;
Modified: llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx?rev=41479&r1=41478&r2=41479&view=diff
==
--- llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx (original)
+++ llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx Mon Aug 27 05:18:20 2007
@@ -1,24 +1,26 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movs
-declare void %llvm.memcpy.i32(sbyte* %A, sbyte* %B, uint %amt, uint %align)
+; RUN: llvm-as < %s | llc -march=x86 | grep movs | count 1
+; RUN: llvm-as < %s | llc -march=x86 | grep memcpy | count 2
-%A = global [1000 x int] zeroinitializer
-%B = global [1000 x int] zeroinitializer
[EMAIL PROTECTED] = global [32 x i32] zeroinitializer
[EMAIL PROTECTED] = global [32 x i32] zeroinitializer
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
-void %main() {
+define void @main() {
; dword copy
- call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]*
%A, long 0, long 0) to sbyte*),
- sbyte* cast (int* getelementptr ([1000 x int]* %B,
long 0, long 0) to sbyte*),
- uint 4000, uint 4)
+ call void @llvm.memcpy.i32(i8* bitcast ([32 x i32]* @A to i8*),
+ i8* bitcast ([32 x i32]* @B to i8*),
+ i32 128, i32 4 )
; word copy
- call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]*
%A, long 0, long 0) to sbyte*),
- sbyte* cast (int* getelementptr ([1000 x int]* %B,
long 0, long 0) to sbyte*),
- uint 4000, uint 2)
+ call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*),
+ i8* bitcast ([32 x i32]* @B to i8*),
+ i32 128, i32 2 )
; byte copy
- call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr ([1000 x int]*
%A, long 0, long 0) to sbyte*),
- sbyte* cast (int* getelementptr ([1000 x int]* %B,
long 0, long 0) to sbyte*),
- uint 4000, uint 1)
+ call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*),
+ i8* bitcast ([32 x i32]* @B to i8*),
+i32 128, i32 1 )
+
ret void
}
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[llvm-commits] [llvm-gcc-4.0] r41480 - /llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Author: baldrick
Date: Mon Aug 27 07:53:48 2007
New Revision: 41480
URL: http://llvm.org/viewvc/llvm-project?rev=41480&view=rev
Log:
Turn on exception handling code generation.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=41480&r1=41479&r2=41480&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Mon Aug 27 07:53:48 2007
@@ -122,9 +122,8 @@
Args.push_back("--debug-pass=Structure");
if (flag_debug_pass_arguments)
Args.push_back("--debug-pass=Arguments");
-// Disabled until PR1224 is resolved.
- //if (flag_exceptions)
- // Args.push_back("--enable-eh");
+ if (flag_exceptions)
+Args.push_back("--enable-eh");
// If there are options that should be passed through to the LLVM backend
// directly from the command line, do so now. This is mainly for debugging
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[llvm-commits] [llvm-gcc-4.2] r41481 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Author: baldrick
Date: Mon Aug 27 07:56:28 2007
New Revision: 41481
URL: http://llvm.org/viewvc/llvm-project?rev=41481&view=rev
Log:
Turn on exception handling codegen.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=41481&r1=41480&r2=41481&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Aug 27 07:56:28 2007
@@ -123,9 +123,8 @@
Args.push_back("--debug-pass=Structure");
if (flag_debug_pass_arguments)
Args.push_back("--debug-pass=Arguments");
-// Disabled until PR1224 is resolved.
- //if (flag_exceptions)
- // Args.push_back("--enable-eh");
+ if (flag_exceptions)
+Args.push_back("--enable-eh");
// If there are options that should be passed through to the LLVM backend
// directly from the command line, do so now. This is mainly for debugging
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Re: [llvm-commits] [llvm] r41479 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2004-02-12-Memcpy.llx
On Aug 27, 2007, at 3:18 AM, Rafael Espindola wrote: > Coping 100MB array (after a warmup) shows that glibc 2.6.1 > implementation on > x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s) Please record this information in a comment? It is likely other people will want to revise this area later for their target of interest. Don't want them to break yours. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41482 - in /llvm/trunk: include/llvm/ADT/FoldingSet.h include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/MachineConstantPool.h include/llvm/CodeGen/MachineFunction.h inclu
Author: djg
Date: Mon Aug 27 09:50:10 2007
New Revision: 41482
URL: http://llvm.org/viewvc/llvm-project?rev=41482&view=rev
Log:
Add explicit keywords and remove spurious trailing semicolons.
Modified:
llvm/trunk/include/llvm/ADT/FoldingSet.h
llvm/trunk/include/llvm/CodeGen/LiveInterval.h
llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
llvm/trunk/include/llvm/CodeGen/MachineFunction.h
llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h
llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h
llvm/trunk/include/llvm/Support/FileUtilities.h
llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/DwarfWriter.cpp
llvm/trunk/lib/CodeGen/PhysRegTracker.h
Modified: llvm/trunk/include/llvm/ADT/FoldingSet.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/FoldingSet.h?rev=41482&r1=41481&r2=41482&view=diff
==
--- llvm/trunk/include/llvm/ADT/FoldingSet.h (original)
+++ llvm/trunk/include/llvm/ADT/FoldingSet.h Mon Aug 27 09:50:10 2007
@@ -119,7 +119,7 @@
unsigned NumNodes;
public:
- FoldingSetImpl(unsigned Log2InitSize = 6);
+ explicit FoldingSetImpl(unsigned Log2InitSize = 6);
virtual ~FoldingSetImpl();
// Forward declaration.
@@ -232,7 +232,7 @@
}
public:
- FoldingSet(unsigned Log2InitSize = 6)
+ explicit FoldingSet(unsigned Log2InitSize = 6)
: FoldingSetImpl(Log2InitSize)
{}
Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41482&r1=41481&r2=41482&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Mon Aug 27 09:50:10 2007
@@ -96,8 +96,8 @@
unsigned def;
unsigned reg;
SmallVector kills;
- VNInfo() : def(~1U), reg(0) {};
- VNInfo(unsigned d, unsigned r) : def(d), reg(r) {};
+ VNInfo() : def(~1U), reg(0) {}
+ VNInfo(unsigned d, unsigned r) : def(d), reg(r) {}
};
private:
SmallVector ValueNumberInfo;
Modified: llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h?rev=41482&r1=41481&r2=41482&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h Mon Aug 27 09:50:10
2007
@@ -36,7 +36,7 @@
public:
explicit MachineConstantPoolValue(const Type *ty) : Ty(ty) {}
- virtual ~MachineConstantPoolValue() {};
+ virtual ~MachineConstantPoolValue() {}
/// getType - get type of this MachineConstantPoolValue.
///
Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=41482&r1=41481&r2=41482&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Mon Aug 27 09:50:10 2007
@@ -73,7 +73,7 @@
/// of type are accessed/created with MF::getInfo and destroyed when the
/// MachineFunction is destroyed.
struct MachineFunctionInfo {
- virtual ~MachineFunctionInfo() {};
+ virtual ~MachineFunctionInfo() {}
};
class MachineFunction : private Annotation {
Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=41482&r1=41481&r2=41482&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Mon Aug 27 09:50:10
2007
@@ -55,11 +55,11 @@
public:
RegScavenger()
: MBB(NULL), NumPhysRegs(0), Tracking(false),
- ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
+ ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
explicit RegScavenger(MachineBasicBlock *mbb)
: MBB(mbb), NumPhysRegs(0), Tracking(false),
- ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
+ ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
/// enterBasicBlock - Start tracking liveness from the begin of the specific
/// basic block.
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=41482&r1=41481&r2=41482&view=diff
=
[llvm-commits] [llvm] r41484 - in /llvm/trunk: docs/ExceptionHandling.html include/llvm/CodeGen/MachineModuleInfo.h lib/CodeGen/MachineModuleInfo.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Author: baldrick Date: Mon Aug 27 10:47:50 2007 New Revision: 41484 URL: http://llvm.org/viewvc/llvm-project?rev=41484&view=rev Log: There is an impedance matching problem between LLVM and gcc exception handling: if an exception unwinds through an invoke, then execution must branch to the invoke's unwind target. We previously tried to enforce this by appending a cleanup action to every selector, however this does not always work correctly due to an optimization in the C++ unwinding runtime: if only cleanups would be run while unwinding an exception, then the program just terminates without actually executing the cleanups, as invoke semantics would require. I was hoping this wouldn't be a problem, but in fact it turns out to be the cause of all the remaining failures in the LLVM testsuite (these also fail with -enable-correct-eh-support, so turning on -enable-eh didn't make things worse!). Instead we need to append a full-blown catch-all to the end of each selector. The correct way of doing this depends on the personality function, i.e. it is language dependent, so can only be done by gcc. Thus this patch which generalizes the eh.selector intrinsic so that it can handle all possible kinds of action table entries (before it didn't accomodate cleanups): now 0 indicates a cleanup, and filters have to be specified using the number of type infos plus one rather than the number of type infos. Related gcc patches will cause Ada to pass a cleanup (0) to force the selector to always fire, while C++ will use a C++ catch-all (null). Modified: llvm/trunk/docs/ExceptionHandling.html llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/docs/ExceptionHandling.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExceptionHandling.html?rev=41484&r1=41483&r2=41484&view=diff == --- llvm/trunk/docs/ExceptionHandling.html (original) +++ llvm/trunk/docs/ExceptionHandling.html Mon Aug 27 10:47:50 2007 @@ -22,8 +22,9 @@ Throw Try/Catch -Finallys +Cleanups Throw Filters +Restrictions Exception Handling Intrinsics @@ -212,17 +213,19 @@ three arguments. The first argument is the reference to the exception structure. The second argument is a reference to the personality function to be used for this try catch sequence. Each of the remaining arguments is either a -reference to the type info for a catch statement, or a non-negative integer -followed by that many type info references, representing a -filter. +reference to the type info for a catch statement, +a filter expression, +or the number zero representing a cleanup. The exception is tested against the arguments sequentially from first to last. -The catch all (...) is represented with a null i8*. The result -of the llvm.eh.selector is a positive -number if the exception matched a type info, a negative number if it matched a -filter, and zero if it didn't match anything. If a type info matched then the -returned value is the index of the type info in the exception table. -The LLVM C++ front end generates code to save this value in an alloca location -for further use in the landing pad and catch code. +The result of the llvm.eh.selector is a +positive number if the exception matched a type info, a negative number if it matched +a filter, and zero if it matched a cleanup. If nothing is matched, the behaviour of +the program is undefined. +The LLVM C++ front end generates code to save the selector value in an alloca +location for further use in the landing pad and catch code. +If a type info matched then the selector value is the index of the type info in +the exception table, which can be obtained using the +llvm.eh.typeid.for intrinsic. Once the landing pad has the type info selector, the code branches to the code for the first catch. The catch then checks the value of the type info @@ -249,7 +252,7 @@ - Finallys + Cleanups @@ -258,7 +261,12 @@ from a landing pad to the first catch. Control may actually flow from the landing pad to clean up code and then to the first catch. Since the required clean up for each invoke in a try may be different (ex., intervening -constructor), there may be several landing pads for a given try. +constructor), there may be several landing pads for a given try. If cleanups +need to be run, the number zero should be passed as the last +llvm.eh.selector argument. +However for C++ a null i8* must be passed +instead. + @@ -273,8 +281,8 @@ a function. To represent this a top level landing pad may exist to filter out invalid types. To express this in LLVM code the landing pad will call llvm.eh.selector. The arguments are the -number of different type infos the function may throw, followed by the type -infos themselves. +length of the filter expr
[llvm-commits] [llvm-gcc-4.0] r41485 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Author: baldrick
Date: Mon Aug 27 10:51:13 2007
New Revision: 41485
URL: http://llvm.org/viewvc/llvm-project?rev=41485&view=rev
Log:
Filters are now specified by using the number of type infos
plus one. Always append a catch-all to the selector call,
unless it is pointless.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=41485&r1=41484&r2=41485&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Mon Aug 27 10:51:13 2007
@@ -2039,6 +2039,7 @@
Args.push_back(CastToType(Instruction::BitCast, FuncCPPPersonality,
PointerType::get(Type::Int8Ty)));
+ bool CaughtAll = false;
for (std::vector::reverse_iterator I = CurrentEHScopes.rbegin(),
E = CurrentEHScopes.rend(); I != E; ++I) {
if (I->CatchExpr) {
@@ -2051,16 +2052,30 @@
EH_FILTER_EXPR) ? FilterExpr : CatchList;
}
- if (I->InfosType == FilterExpr)
+ if (I->InfosType == FilterExpr) {
// Filter - note the size.
-Args.push_back(ConstantInt::get(Type::Int32Ty, I->TypeInfos.size()));
+Args.push_back(ConstantInt::get(Type::Int32Ty, I->TypeInfos.size()+1));
+// An empty filter catches all exceptions.
+if ((CaughtAll = !I->TypeInfos.size()))
+ break;
+ }
Args.reserve(Args.size() + I->TypeInfos.size());
- for (unsigned j = 0, N = I->TypeInfos.size(); j < N; ++j)
+ for (unsigned j = 0, N = I->TypeInfos.size(); j < N; ++j) {
Args.push_back(I->TypeInfos[j]);
+// A null typeinfo indicates a catch-all.
+if ((CaughtAll = I->TypeInfos[j]->isNullValue()))
+ break;
+ }
}
}
+ // Invokes are required to branch to the unwind label no matter what
exception
+ // is being unwound. Enforce this by appending a catch-all.
+ // FIXME: The use of null as catch-all is C++ specific.
+ if (!CaughtAll)
+Args.push_back(Constant::getNullValue(PointerType::get(Type::Int8Ty)));
+
Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(), Args.end(),
"eh_select");
Builder.CreateStore(Select, ExceptionSelectorValue);
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[llvm-commits] [llvm-gcc-4.2] r41486 - /llvm-gcc-4.2/trunk/gcc/except.c
Author: baldrick
Date: Mon Aug 27 11:08:37 2007
New Revision: 41486
URL: http://llvm.org/viewvc/llvm-project?rev=41486&view=rev
Log:
Fix a mismatch between can_throw_external_1 (CTE) and
foreach_reachable_handler (FRH): CTE should visit the
same handlers as FRE (indeed it could have been implemented
using FRE but seems to have been open-coded as an
optimization) but is missing one piece of FRH logic.
This causes problems in the case of cleanups contained
inside an empty filter (i.e. a filter that catches
everything): FRH didn't visit the filter while CTE did.
The testcase is gcc's crossjump1.C, which produced
eh.selectors with only the exception and personality
arguments.
Modified:
llvm-gcc-4.2/trunk/gcc/except.c
Modified: llvm-gcc-4.2/trunk/gcc/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41486&r1=41485&r2=41486&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/except.c Mon Aug 27 11:08:37 2007
@@ -2800,9 +2800,21 @@
/* If the exception is caught or blocked by any containing region,
then it is not seen by any calling function. */
- for (; region ; region = region->outer)
-if (reachable_next_level (region, type_thrown, NULL) >= RNL_CAUGHT)
- return false;
+ /* LLVM local begin */
+ while (region)
+{
+ if (reachable_next_level (region, type_thrown, NULL) >= RNL_CAUGHT)
+return false;
+ /* If we have processed one cleanup, there is no point in
+ processing any more of them. Each cleanup will have an edge
+ to the next outer cleanup region, so the flow graph will be
+ accurate. */
+ if (region->type == ERT_CLEANUP)
+region = region->u.cleanup.prev_try;
+ else
+region = region->outer;
+}
+ /* LLVM local end */
return true;
}
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[llvm-commits] [llvm-gcc-4.2] r41487 - in /llvm-gcc-4.2/trunk/gcc: llvm-convert.cpp llvm-internal.h
Author: baldrick
Date: Mon Aug 27 11:11:09 2007
New Revision: 41487
URL: http://llvm.org/viewvc/llvm-project?rev=41487&view=rev
Log:
Filters are now specified using the number of type infos
plus one. If an eh.selector call isn't guaranteed to
match, append a catch-all. Also, some trivial cleanups.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.2/trunk/gcc/llvm-internal.h
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41487&r1=41486&r2=41487&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Aug 27 11:11:09 2007
@@ -1757,18 +1757,6 @@
}
-/// getLandingPad - Return the landing pad for the given exception handling
-/// region, creating it if necessary.
-BasicBlock *TreeToLLVM::getLandingPad(unsigned RegionNo) {
- LandingPads.grow(RegionNo);
- BasicBlock *&LandingPad = LandingPads[RegionNo];
-
- if (!LandingPad)
-LandingPad = new BasicBlock("lpad");
-
- return LandingPad;
-}
-
/// getPostPad - Return the post landing pad for the given exception handling
/// region, creating it if necessary.
BasicBlock *TreeToLLVM::getPostPad(unsigned RegionNo) {
@@ -1829,7 +1817,7 @@
tree TypeList = get_eh_type_list(region);
unsigned Length = list_length(TypeList);
Args.reserve(Args.size() + Length + 1);
-Args.push_back(ConstantInt::get(Type::Int32Ty, Length));
+Args.push_back(ConstantInt::get(Type::Int32Ty, Length + 1));
// Add the type infos.
for (; TypeList; TypeList = TREE_CHAIN(TypeList)) {
@@ -1855,6 +1843,13 @@
}
}
+if (can_throw_external_1(i, false))
+ // Some exceptions from this region may not be caught by any handler.
+ // Since invokes are required to branch to the unwind label no matter
+ // what exception is being unwound, append a catch-all.
+ // FIXME: The use of null as catch-all is C++ specific.
+ Args.push_back(Constant::getNullValue(PointerType::get(Type::Int8Ty)));
+
// Emit the selector call.
Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(),
Args.end(),
"eh_select");
@@ -2250,12 +2245,23 @@
if (!NoUnwind) {
int RegionNo = lookup_stmt_eh_region(exp);
+ // Is the call contained in an exception handling region?
if (RegionNo > 0) {
-if (can_throw_internal_1(RegionNo, false))
+// Are there any exception handlers for this region?
+if (can_throw_internal_1(RegionNo, false)) {
// Turn the call into an invoke.
- LandingPad = getLandingPad(RegionNo);
-else
+ LandingPads.grow(RegionNo);
+ BasicBlock *&ThisPad = LandingPads[RegionNo];
+
+ // Create a landing pad if one didn't exist already.
+ if (!ThisPad)
+ThisPad = new BasicBlock("lpad");
+
+ LandingPad = ThisPad;
+} else {
+ // Can this call unwind out of the current function?
NoUnwind = !can_throw_external_1(RegionNo, false);
+}
}
}
}
Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=41487&r1=41486&r2=41487&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Mon Aug 27 11:11:09 2007
@@ -242,8 +242,6 @@
bool isBitfield() const { return BitStart != 255; }
};
-typedef IndexedMap RegionMapType;
-
/// TreeToLLVM - An instance of this class is created and used to convert the
/// body of each function to LLVM.
///
@@ -268,10 +266,10 @@
//===-- Exception Handling
--===//
/// LandingPads - The landing pad for a given EH region.
- RegionMapType LandingPads;
+ IndexedMap LandingPads;
/// PostPads - The post landing pad for a given EH region.
- RegionMapType PostPads;
+ IndexedMap PostPads;
/// ExceptionValue - Is the local to receive the current exception.
Value *ExceptionValue;
@@ -421,10 +419,6 @@
/// handling.
void CreateExceptionValues();
- /// getLandingPad - Return the landing pad for the given exception handling
- /// region, creating it if necessary.
- BasicBlock *getLandingPad(unsigned RegionNo);
-
/// getPostPad - Return the post landing pad for the given exception handling
/// region, creating it if necessary.
BasicBlock *getPostPad(unsigned RegionNo);
___
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[llvm-commits] [llvm] r41488 - /llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp
Author: djg
Date: Mon Aug 27 11:11:48 2007
New Revision: 41488
URL: http://llvm.org/viewvc/llvm-project?rev=41488&view=rev
Log:
Change comments to refer to @malloc and @free instead of %malloc and %free.
Modified:
llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp
Modified: llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp?rev=41488&r1=41487&r2=41488&view=diff
==
--- llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp Mon Aug 27 11:11:48 2007
@@ -1,4 +1,4 @@
-//===- RaiseAllocations.cpp - Convert %malloc & %free calls to insts
--===//
+//===- RaiseAllocations.cpp - Convert @malloc & @free calls to insts
--===//
//
// The LLVM Compiler Infrastructure
//
@@ -28,7 +28,7 @@
STATISTIC(NumRaised, "Number of allocations raised");
namespace {
- // RaiseAllocations - Turn %malloc and %free calls into the appropriate
+ // RaiseAllocations - Turn @malloc and @free calls into the appropriate
// instruction.
//
class VISIBILITY_HIDDEN RaiseAllocations : public ModulePass {
@@ -65,7 +65,7 @@
// free functions. If this is the case, grab the method pointers that the
// module is using.
//
-// Lookup %malloc and %free in the symbol table, for later use. If they don't
+// Lookup @malloc and @free in the symbol table, for later use. If they don't
// exist, or are not external, we do not worry about converting calls to that
// function into the appropriate instruction.
//
___
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[llvm-commits] [llvm] r41489 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/memmove-0.ll test/CodeGen/X86/memmove-1.ll test/Co
Author: djg
Date: Mon Aug 27 11:26:13 2007
New Revision: 41489
URL: http://llvm.org/viewvc/llvm-project?rev=41489&view=rev
Log:
If the source and destination pointers in an llvm.memmove are known
to not alias each other, it can be translated as an llvm.memcpy.
Added:
llvm/trunk/test/CodeGen/X86/memmove-0.ll
llvm/trunk/test/CodeGen/X86/memmove-1.ll
llvm/trunk/test/CodeGen/X86/memmove-2.ll
llvm/trunk/test/CodeGen/X86/memmove-3.ll
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=41489&r1=41488&r2=41489&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Mon Aug 27 11:26:13 2007
@@ -39,6 +39,7 @@
SSARegMap *RegMap;
SelectionDAG *CurDAG;
MachineBasicBlock *BB;
+ AliasAnalysis *AA;
std::vector TopOrder;
unsigned DAGSize;
static char ID;
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=41489&r1=41488&r2=41489&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Aug 27
11:26:13 2007
@@ -409,6 +409,7 @@
TargetLowering &TLI;
SelectionDAG &DAG;
const TargetData *TD;
+ AliasAnalysis &AA;
/// SwitchCases - Vector of CaseBlock structures used to communicate
/// SwitchInst code generation information.
@@ -423,8 +424,9 @@
FunctionLoweringInfo &FuncInfo;
SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli,
+ AliasAnalysis &aa,
FunctionLoweringInfo &funcinfo)
-: TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()),
+: TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()), AA(aa),
FuncInfo(funcinfo) {
}
@@ -4196,6 +4198,17 @@
unsigned Align = (unsigned)cast(Op4)->getValue();
if (Align == 0) Align = 1;
+ // If the source and destination are known to not be aliases, we can
+ // lower memmove as memcpy.
+ if (Op == ISD::MEMMOVE) {
+uint64_t Size = -1;
+if (ConstantSDNode *C = dyn_cast(Op3))
+ Size = C->getValue();
+if (AA.alias(I.getOperand(1), Size, I.getOperand(2), Size) ==
+AliasAnalysis::NoAlias)
+ Op = ISD::MEMCPY;
+ }
+
if (ConstantSDNode *Size = dyn_cast(Op3)) {
std::vector MemOps;
@@ -4307,6 +4320,9 @@
bool SelectionDAGISel::runOnFunction(Function &Fn) {
+ // Get alias analysis for load/store combining.
+ AA = &getAnalysis();
+
MachineFunction &MF = MachineFunction::construct(&Fn,
TLI.getTargetMachine());
RegMap = MF.getSSARegMap();
DOUT << "\n\n\n=== " << Fn.getName() << "\n";
@@ -4404,7 +4420,7 @@
void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
std::vector > &PHINodesToUpdate,
FunctionLoweringInfo &FuncInfo) {
- SelectionDAGLowering SDL(DAG, TLI, FuncInfo);
+ SelectionDAGLowering SDL(DAG, TLI, *AA, FuncInfo);
std::vector UnorderedChains;
@@ -4581,11 +4597,8 @@
}
void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
- // Get alias analysis for load/store combining.
- AliasAnalysis &AA = getAnalysis();
-
// Run the DAG combiner in pre-legalize mode.
- DAG.Combine(false, AA);
+ DAG.Combine(false, *AA);
DOUT << "Lowered selection DAG:\n";
DEBUG(DAG.dump());
@@ -4598,7 +4611,7 @@
DEBUG(DAG.dump());
// Run the DAG combiner in post-legalize mode.
- DAG.Combine(true, AA);
+ DAG.Combine(true, *AA);
if (ViewISelDAGs) DAG.viewGraph();
@@ -4649,7 +4662,7 @@
if (!BitTestCases[i].Emitted) {
SelectionDAG HSDAG(TLI, MF, getAnalysisToUpdate());
CurDAG = &HSDAG;
- SelectionDAGLowering HSDL(HSDAG, TLI, FuncInfo);
+ SelectionDAGLowering HSDL(HSDAG, TLI, *AA, FuncInfo);
// Set the current basic block to the mbb we wish to insert the code into
BB = BitTestCases[i].Parent;
HSDL.setCurrentBasicBlock(BB);
@@ -4662,7 +4675,7 @@
for (unsigned j = 0, ej = BitTestCases[i].Cases.size(); j != ej; ++j) {
SelectionDAG BSDAG(TLI, MF, getAnalysisToUpdate());
CurDAG = &BSDAG;
- SelectionDAGLowering BSDL(BSDAG, TLI, FuncInfo);
+ SelectionDAGLowering BSDL(BSDAG, TLI, *AA, FuncInfo);
// Set the current basic block to the mbb we wish to insert the code into
BB = BitTestCases[i].Cases[j].ThisBB;
BSDL.setCurrentBasicBlock(BB);
@@ -4715,7 +4728,7 @@
if (!JTCases[i].first.Emitted) {
SelectionDAG HSDAG(TLI, MF, getAnalysisT
[llvm-commits] [llvm] r41490 - /llvm/trunk/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll
Author: baldrick
Date: Mon Aug 27 11:30:05 2007
New Revision: 41490
URL: http://llvm.org/viewvc/llvm-project?rev=41490&view=rev
Log:
Now that we don't output cleanups by default, the action
offset needs to be adjusted in this test.
Modified:
llvm/trunk/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll
Modified: llvm/trunk/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll?rev=41490&r1=41489&r2=41490&view=diff
==
--- llvm/trunk/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll
(original)
+++ llvm/trunk/test/CodeGen/Generic/2007-06-06-CriticalEdgeLandingPad.ll Mon
Aug 27 11:30:05 2007
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -enable-eh -asm-verbose -o - | \
-; RUN: grep -A 3 {Llabel137.*Region start} | grep {5.*Action}
+; RUN: grep -A 3 {Llabel137.*Region start} | grep {3.*Action}
; PR1422
; PR1508
___
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[llvm-commits] [llvm] r41491 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Author: djg
Date: Mon Aug 27 11:32:11 2007
New Revision: 41491
URL: http://llvm.org/viewvc/llvm-project?rev=41491&view=rev
Log:
Make DAGCombiner's global alias analysis query more precise in the case
where both pointers have non-zero offsets.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=41491&r1=41490&r2=41491&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Aug 27 11:32:11 2007
@@ -4606,8 +4606,9 @@
if (CombinerGlobalAA) {
// Use alias analysis information.
-int Overlap1 = Size1 + SrcValueOffset1;
-int Overlap2 = Size2 + SrcValueOffset2;
+int64_t MinOffset = std::min(SrcValueOffset1, SrcValueOffset2);
+int64_t Overlap1 = Size1 + SrcValueOffset1 - MinOffset;
+int64_t Overlap2 = Size2 + SrcValueOffset2 - MinOffset;
AliasAnalysis::AliasResult AAResult =
AA.alias(SrcValue1, Overlap1, SrcValue2,
Overlap2);
if (AAResult == AliasAnalysis::NoAlias)
___
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Re: [llvm-commits] [llvm] r41489 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/memmove-0.ll test/CodeGen/X86/memmove-1.ll tes
On Aug 27, 2007, at 9:26 AM, Dan Gohman wrote:
> Author: djg
> Date: Mon Aug 27 11:26:13 2007
> New Revision: 41489
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41489&view=rev
> Log:
> If the source and destination pointers in an llvm.memmove are known
> to not alias each other, it can be translated as an llvm.memcpy.
This is nifty, but shouldn't this be done at the LLVM IR level? I
can't think of cases where lowering would create new memmove calls.
-Chris
> Added:
> llvm/trunk/test/CodeGen/X86/memmove-0.ll
> llvm/trunk/test/CodeGen/X86/memmove-1.ll
> llvm/trunk/test/CodeGen/X86/memmove-2.ll
> llvm/trunk/test/CodeGen/X86/memmove-3.ll
> Modified:
> llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/
> CodeGen/SelectionDAGISel.h?rev=41489&r1=41488&r2=41489&view=diff
>
> ==
>
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Mon Aug 27
> 11:26:13 2007
> @@ -39,6 +39,7 @@
>SSARegMap *RegMap;
>SelectionDAG *CurDAG;
>MachineBasicBlock *BB;
> + AliasAnalysis *AA;
>std::vector TopOrder;
>unsigned DAGSize;
>static char ID;
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/
> SelectionDAG/SelectionDAGISel.cpp?
> rev=41489&r1=41488&r2=41489&view=diff
>
> ==
>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon
> Aug 27 11:26:13 2007
> @@ -409,6 +409,7 @@
>TargetLowering &TLI;
>SelectionDAG &DAG;
>const TargetData *TD;
> + AliasAnalysis &AA;
>
>/// SwitchCases - Vector of CaseBlock structures used to
> communicate
>/// SwitchInst code generation information.
> @@ -423,8 +424,9 @@
>FunctionLoweringInfo &FuncInfo;
>
>SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli,
> + AliasAnalysis &aa,
> FunctionLoweringInfo &funcinfo)
> -: TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()),
> +: TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()), AA
> (aa),
>FuncInfo(funcinfo) {
>}
>
> @@ -4196,6 +4198,17 @@
>unsigned Align = (unsigned)cast(Op4)->getValue();
>if (Align == 0) Align = 1;
>
> + // If the source and destination are known to not be aliases, we
> can
> + // lower memmove as memcpy.
> + if (Op == ISD::MEMMOVE) {
> +uint64_t Size = -1;
> +if (ConstantSDNode *C = dyn_cast(Op3))
> + Size = C->getValue();
> +if (AA.alias(I.getOperand(1), Size, I.getOperand(2), Size) ==
> +AliasAnalysis::NoAlias)
> + Op = ISD::MEMCPY;
> + }
> +
>if (ConstantSDNode *Size = dyn_cast(Op3)) {
> std::vector MemOps;
>
> @@ -4307,6 +4320,9 @@
>
>
> bool SelectionDAGISel::runOnFunction(Function &Fn) {
> + // Get alias analysis for load/store combining.
> + AA = &getAnalysis();
> +
>MachineFunction &MF = MachineFunction::construct(&Fn,
> TLI.getTargetMachine());
>RegMap = MF.getSSARegMap();
>DOUT << "\n\n\n=== " << Fn.getName() << "\n";
> @@ -4404,7 +4420,7 @@
> void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG,
> BasicBlock *LLVMBB,
> std::vector >
> &PHINodesToUpdate,
> FunctionLoweringInfo
> &FuncInfo) {
> - SelectionDAGLowering SDL(DAG, TLI, FuncInfo);
> + SelectionDAGLowering SDL(DAG, TLI, *AA, FuncInfo);
>
>std::vector UnorderedChains;
>
> @@ -4581,11 +4597,8 @@
> }
>
> void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
> - // Get alias analysis for load/store combining.
> - AliasAnalysis &AA = getAnalysis();
> -
>// Run the DAG combiner in pre-legalize mode.
> - DAG.Combine(false, AA);
> + DAG.Combine(false, *AA);
>
>DOUT << "Lowered selection DAG:\n";
>DEBUG(DAG.dump());
> @@ -4598,7 +4611,7 @@
>DEBUG(DAG.dump());
>
>// Run the DAG combiner in post-legalize mode.
> - DAG.Combine(true, AA);
> + DAG.Combine(true, *AA);
>
>if (ViewISelDAGs) DAG.viewGraph();
>
> @@ -4649,7 +4662,7 @@
> if (!BitTestCases[i].Emitted) {
>SelectionDAG HSDAG(TLI, MF,
> getAnalysisToUpdate());
>CurDAG = &HSDAG;
> - SelectionDAGLowering HSDL(HSDAG, TLI, FuncInfo);
> + SelectionDAGLowering HSDL(HSDAG, TLI, *AA, FuncInfo);
>// Set the current basic block to the mbb we wish to insert
> the code into
>BB = BitTestCases[i].Parent;
>HSDL.setCurrentBasicBlock(BB);
> @@ -4662,7 +4675,7 @@
> for (unsigned j = 0, ej = BitTestCases[i].Cases.size(); j !=
> ej; ++j)
[llvm-commits] [llvm] r41494 - /llvm/trunk/test/C++Frontend/2007-07-04-NestedCatches.cpp
Author: baldrick
Date: Mon Aug 27 11:47:32 2007
New Revision: 41494
URL: http://llvm.org/viewvc/llvm-project?rev=41494&view=rev
Log:
Fix this test: llvm-gcc-4.2 optimizes almost everything away,
resulting in zero matches, while llvm-gcc-4.1 manages to
remove one pointless selector changing the number of matches.
Modified:
llvm/trunk/test/C++Frontend/2007-07-04-NestedCatches.cpp
Modified: llvm/trunk/test/C++Frontend/2007-07-04-NestedCatches.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-07-04-NestedCatches.cpp?rev=41494&r1=41493&r2=41494&view=diff
==
--- llvm/trunk/test/C++Frontend/2007-07-04-NestedCatches.cpp (original)
+++ llvm/trunk/test/C++Frontend/2007-07-04-NestedCatches.cpp Mon Aug 27
11:47:32 2007
@@ -1,6 +1,6 @@
-// RUN: %llvmgxx %s -S -emit-llvm -O2 -o - | \
+// RUN: %llvmgxx %s -S -O2 -o - | \
// RUN: ignore grep {eh\.selector.*One.*Two.*Three.*Four.*Five.*Six.*null} |
\
-// RUN: wc -l | grep {\[02\]}
+// RUN: wc -l | grep {\[01\]}
extern void X(void);
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Re: [llvm-commits] [llvm] r41489 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/memmove-0.ll test/CodeGen/X86/memmove-1.ll tes
> This is nifty, but shouldn't this be done at the LLVM IR level? I > can't think of cases where lowering would create new memmove calls. I'm not aware of any cases where memmove vs. memcpy matters before codegen currently. If it were done at the LLVM IR level, would it be too trivial to be in a pass by itself, or would you want to add it, along with an addRequired, to some existing pass? Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41502 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Author: rafael
Date: Mon Aug 27 12:48:26 2007
New Revision: 41502
URL: http://llvm.org/viewvc/llvm-project?rev=41502&view=rev
Log:
Add a comment about using libc memset/memcpy or generating inline code.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41502&r1=41501&r2=41502&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 27 12:48:26 2007
@@ -3754,7 +3754,8 @@
ConstantSDNode *I = dyn_cast(Op.getOperand(3));
// If not DWORD aligned or size is more than the threshold, call memset.
- // It knows how to align to the right boundary first.
+ // The libc version is likely to be faster for these cases. It can use the
+ // address value and run time information about the CPU.
if ((Align & 3) != 0 ||
(I && I->getValue() > Subtarget->getMinRepStrSizeThreshold())) {
MVT::ValueType IntPtr = getPointerTy();
@@ -3910,7 +3911,9 @@
ConstantSDNode *I = dyn_cast(Op.getOperand(3));
// If not DWORD aligned or size is more than the threshold, call memcpy.
- // It knows how to align to the right boundary first.
+ // The libc version is likely to be faster for these cases. It can use the
+ // address value and run time information about the CPU.
+ // With glibc 2.6.1 on a core 2, coping an array of 100M longs was 30% faster
if ((Align & 3) != 0 ||
(I && I->getValue() > Subtarget->getMinRepStrSizeThreshold())) {
MVT::ValueType IntPtr = getPointerTy();
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Re: [llvm-commits] [PATCH] JIT support for ARM
On Aug 17, 2007, at 5:28 PM, Raul Fernandes Herbster wrote:
2007/8/17, Evan Cheng <[EMAIL PROTECTED]>:
Very good progress. Thanks!
Comments inline.
Evan
...
Please use abort() instead so it does what's expected in non-debug
build.
OK
...
i s -> is :-)
OK
Also, why the name "ARMCompilationCallbackC"? Is it language specific?
I used the same naming convention of PPCJITInfo.cpp
("PPCCompilationCallbackC"). I can also use naming convention of
X86ITInfo.cpp, which uses "X86CompilationCallback2").
No big deal either way. I just want better comments if it's language
specific in any way.
...
Does a similar assertion makes sense here?
I dont think so. Such code is only called for branch and link
instruction. In fact, the stub calls a function with MOV and LDR,
instead of BL/B (because that problem of 24-bits field).
...
This is ok But I would rather see you refactor
getBinaryCodeForInstr() so you can "manufacture" the value by
passing it ARM::LDR, ARM::PC, etc.? Do you think that's possible?
I don't think it is possible. If I "manufacture" the value by
passing the opcode (ARM::LDR, ARM::PC...), I'll have to implement a
big switch table as I did before (you have already comment this
solution before). Generating the instructions using its classes it's
better.
Ok.
Also, in Emitter::getBinaryCodeForInstr():
unsigned Emitter::getBinaryCodeForInstr(const MachineInstr &MI) {
const TargetInstrDescriptor *Desc = MI.getInstrDescriptor();
const unsigned opcode = MI.getOpcode();
unsigned Value = 0xE000;
Comments? What is 0xe00?
Ok. I'll comment. It is an initial instruction mask.
Thx.
Can 12 (and all the magic shift amounts in this function) be defined
in ARMII enum? So you add comments there rather than in this code.
You're rigth. I'll define them in ARMII enum.
+MCE.emitWordLE(addr);
} else {
-MCE.startFunctionStub(5, 2);
-MCE.emitByte(0xEB); // branch and link to the corresponding
function addr
+// branch and link to the corresponding function addr
+MCE.startFunctionStub(20, 4);
+MCE.emitWordLE(0xE92D4800); // STMFD SP!, [R11, LR]
+MCE.emitWordLE(0xE28FE004); // ADD LR, PC, #4
+MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4]
+MCE.emitWordLE(addr);
+MCE.emitWordLE(0xE8BD8800); // LDMFD SP!, [R11, PC]
Ditto.
There are comments for the hexa numbers emitted (MCE.emitWordLE). In
such code, I'd better comment instructionsMCE.startFunctionStub().
switch ((ARM::RelocationType)MR->getRelocationType()) {
case ARM::reloc_arm_relative: {
// PC relative relocation
- *((unsigned*)RelocPos) += (unsigned)ResultPtr;
+ ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
+ if (ResultPtr >= 0)
+*((unsigned*)RelocPos) |= 1 << 23;
+ else {
+ResultPtr *= -1;
+*((unsigned*)RelocPos) &= 0xFF7F;
Please explain what's going on here? :-)
:-). OK. Evan, sorry for not making comments. In certain functions
of files PPCJITInfo.cpp and X86JITInfo.cpp , I did not see any
comments so I though that I could ignore them. I'll explain it.
Hehe. I'll go bug folks responsible for those. :-)
Instead of special casing it for LDRD, perhaps add a LB (L bit)
class and attach to the other instructions that need it?
LdFrm/StFrm is used to set bit L. However, the instruction LDRD is
an "Enhanced DSP Extension" instruction (page A10-8) and it doesn't
have an L bit to be set (neither STRD).
I'd like to see PUWLSH bits modeled more clearly.
In order to model bits PUWLSH, I'll have to create more classes.
However, some information about such bits can be retrieved from some
other information:
bit P: there are three classes of addr. I check if it is
IndexModePost to set it to 1.
bit U: I have to check immed value (U=1 is possitive, U=0 it is
possitive)
bit L: cI've created classes for it (ARMII::StFrm, ARMII::LdFrm).
bit S: I've created classes for it
(ARMII::DPRImS,ARMII::DPRRegS,ARMII::DPRSoRegS).
bit W: is set according to addr mode.
Couldn't you just reserve a few bits in TSFlags for these? Then you
add some classes to set these bits. Take a look at how X86 handles TB,
XS, etc. I'd rather have them explicitly spelled out for each
instruction. If this makes sense, please commit your patch first and
handle PUWLSH as a follow on patch.
Thanks.
Evan
--
Raul Fernandes Herbster
Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br
Electrical Engineering Department - DEE - www.ee.ufcg.edu.br
Electrical Engineering and Informatics Center - CEEI
Federal University of Campina Grande - UFCG - www.ufcg.edu.br
Caixa Postal 10105
58109-970 Campina Grande - PB - Brasil
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[llvm-commits] [llvm-gcc-4.2] r41504 - /llvm-gcc-4.2/trunk/gcc/fortran/lang-specs.h
Author: asl
Date: Mon Aug 27 13:44:54 2007
New Revision: 41504
URL: http://llvm.org/viewvc/llvm-project?rev=41504&view=rev
Log:
Teach gfortran about LLVM options
Modified:
llvm-gcc-4.2/trunk/gcc/fortran/lang-specs.h
Modified: llvm-gcc-4.2/trunk/gcc/fortran/lang-specs.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/fortran/lang-specs.h?rev=41504&r1=41503&r2=41504&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/fortran/lang-specs.h (original)
+++ llvm-gcc-4.2/trunk/gcc/fortran/lang-specs.h Mon Aug 27 13:44:54 2007
@@ -15,6 +15,8 @@
%{E|M|MM:%(cpp_debug_options)}\
%{!M:%{!MM:%{!E: -o %|.f |\n\
f951 %|.f %{!ffree-form:-ffixed-form} %(cc1_options) %{J*} %{I*}\
+ "/* LLVM LOCAL */" \
+ %(llvm_options) \
-fpreprocessed %{!nostdinc:-I finclude%s}
%{!fsyntax-only:%(invoke_as)", 0, 0, 0},
{".F90", "@f95-cpp-input", 0, 0, 0},
{".F95", "@f95-cpp-input", 0, 0, 0},
@@ -24,14 +26,20 @@
%{E|M|MM:%(cpp_debug_options)}\
%{!M:%{!MM:%{!E: -o %|.f95 |\n\
f951 %|.f95 %{!ffixed-form:-ffree-form} %(cc1_options) %{J*} %{I*}\
+ "/* LLVM LOCAL */" \
+ %(llvm_options) \
-fpreprocessed %{!nostdinc:-I finclude%s}
%{!fsyntax-only:%(invoke_as)", 0, 0, 0},
{".f90", "@f95", 0, 0, 0},
{".f95", "@f95", 0, 0, 0},
{".f03", "@f95", 0, 0, 0},
{"@f95", "%{!E:f951 %i %(cc1_options) %{J*} %{I*}\
+ "/* LLVM LOCAL */" \
+ %(llvm_options) \
%{!nostdinc:-I finclude%s} %{!fsyntax-only:%(invoke_as)}}", 0, 0, 0},
{".f", "@f77", 0, 0, 0},
{".for", "@f77", 0, 0, 0},
{".FOR", "@f77", 0, 0, 0},
{"@f77", "%{!E:f951 %i %{!ffree-form:-ffixed-form} %(cc1_options) %{J*} %{I*}\
+ "/* LLVM LOCAL */" \
+ %(llvm_options) \
%{!nostdinc:-I finclude%s} %{!fsyntax-only:%(invoke_as)}}", 0, 0, 0},
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[llvm-commits] [llvm] r41506 - in /llvm/trunk: include/llvm/Instructions.h include/llvm/Support/LLVMBuilder.h lib/AsmParser/llvmAsmParser.y lib/Bitcode/Reader/BitcodeReader.cpp lib/Transforms/IPO/Argu
Author: greened
Date: Mon Aug 27 14:04:21 2007
New Revision: 41506
URL: http://llvm.org/viewvc/llvm-project?rev=41506&view=rev
Log:
Update InvokeInst to work like CallInst
Modified:
llvm/trunk/include/llvm/Instructions.h
llvm/trunk/include/llvm/Support/LLVMBuilder.h
llvm/trunk/lib/AsmParser/llvmAsmParser.y
llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp
llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp
llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
llvm/trunk/lib/VMCore/Instructions.cpp
llvm/trunk/tools/llvm-upgrade/UpgradeParser.y
llvm/trunk/tools/llvm2cpp/CppWriter.cpp
Modified: llvm/trunk/include/llvm/Instructions.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=41506&r1=41505&r2=41506&view=diff
==
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Mon Aug 27 14:04:21 2007
@@ -1544,13 +1544,65 @@
InvokeInst(const InvokeInst &BI);
void init(Value *Fn, BasicBlock *IfNormal, BasicBlock *IfException,
Value* const *Args, unsigned NumArgs);
+
+ template
+ void init(Value *Func, BasicBlock *IfNormal, BasicBlock *IfException,
+InputIterator ArgBegin, InputIterator ArgEnd,
+const std::string &Name,
+// This argument ensures that we have an iterator we can
+// do arithmetic on in constant time
+std::random_access_iterator_tag) {
+typename std::iterator_traits::difference_type NumArgs =
+ std::distance(ArgBegin, ArgEnd);
+
+if (NumArgs > 0) {
+ // This requires that the iterator points to contiguous memory.
+ init(Func, IfNormal, IfException, &*ArgBegin, NumArgs);
+}
+else {
+ init(Func, IfNormal, IfException, 0, NumArgs);
+}
+
+setName(Name);
+ }
+
public:
- InvokeInst(Value *Fn, BasicBlock *IfNormal, BasicBlock *IfException,
- Value* const* Args, unsigned NumArgs, const std::string &Name =
"",
- Instruction *InsertBefore = 0);
- InvokeInst(Value *Fn, BasicBlock *IfNormal, BasicBlock *IfException,
- Value* const* Args, unsigned NumArgs, const std::string &Name,
- BasicBlock *InsertAtEnd);
+ /// Construct an InvokeInst given a range of arguments.
+ /// InputIterator must be a random-access iterator pointing to
+ /// contiguous storage (e.g. a std::vector<>::iterator). Checks are
+ /// made for random-accessness but not for contiguous storage as
+ /// that would incur runtime overhead.
+ ///
+ /// @brief Construct an InvokeInst from a range of arguments
+ template
+ InvokeInst(Value *Func, BasicBlock *IfNormal, BasicBlock *IfException,
+ InputIterator ArgBegin, InputIterator ArgEnd,
+ const std::string &Name = "", Instruction *InsertBefore = 0)
+ : TerminatorInst(cast(cast(Func->getType())
+ ->getElementType())->getReturnType(),
+ Instruction::Invoke, 0, 0, InsertBefore) {
+init(Func, IfNormal, IfException, ArgBegin, ArgEnd, Name,
+ typename std::iterator_traits::iterator_category());
+ }
+
+ /// Construct an InvokeInst given a range of arguments.
+ /// InputIterator must be a random-access iterator pointing to
+ /// contiguous storage (e.g. a std::vector<>::iterator). Checks are
+ /// made for random-accessness but not for contiguous storage as
+ /// that would incur runtime overhead.
+ ///
+ /// @brief Construct an InvokeInst from a range of arguments
+ template
+ InvokeInst(Value *Func, BasicBlock *IfNormal, BasicBlock *IfException,
+ InputIterator ArgBegin, InputIterator ArgEnd,
+ const std::string &Name, BasicBlock *InsertAtEnd)
+ : TerminatorInst(cast(cast(Func->getType())
+ ->getElementType())->getReturnType(),
+ Instruction::Invoke, 0, 0, InsertAtEnd) {
+init(Func, IfNormal, IfException, ArgBegin, ArgEnd, Name,
+ typename std::iterator_traits::iterator_category());
+ }
+
~InvokeInst();
virtual InvokeInst *clone() const;
Modified: llvm/trunk/include/llvm/Support/LLVMBuilder.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/LLVMBuilder.h?rev=41506&r1=41505&r2=41506&view=diff
==
--- llvm/trunk/include/llvm/Support/LLVMBuilder.h (original)
+++ llvm/trunk/include/llvm/Support/LLVMBuilder.h Mon Aug 27 14:04:21 2007
@@ -115,12 +115,12 @@
}
/// CreateInvoke - Create an invoke instruction.
+ template
InvokeInst *CreateInvoke(Value *Callee, BasicBlock *NormalDest
[llvm-commits] [llvm-gcc-4.0] r41505 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Author: greened
Date: Mon Aug 27 14:04:17 2007
New Revision: 41505
URL: http://llvm.org/viewvc/llvm-project?rev=41505&view=rev
Log:
Update for new InvokeInst constructor
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=41505&r1=41504&r2=41505&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Mon Aug 27 14:04:17 2007
@@ -2812,7 +2812,7 @@
} else {
BasicBlock *NextBlock = new BasicBlock("invcont");
Call = Builder.CreateInvoke(Callee, NextBlock, UnwindBlock,
-&CallOperands[0], CallOperands.size());
+CallOperands.begin(), CallOperands.end());
cast(Call)->setCallingConv(CallingConvention);
// Lazily create an unwind block for this scope, which we can emit a fixup
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[llvm-commits] [llvm-gcc-4.2] r41507 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: greened
Date: Mon Aug 27 14:05:22 2007
New Revision: 41507
URL: http://llvm.org/viewvc/llvm-project?rev=41507&view=rev
Log:
Update for new InvokeInst constructor
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41507&r1=41506&r2=41507&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Aug 27 14:05:22 2007
@@ -2343,7 +2343,7 @@
} else {
BasicBlock *NextBlock = new BasicBlock("invcont");
Call = Builder.CreateInvoke(Callee, NextBlock, LandingPad,
-&CallOperands[0], CallOperands.size());
+CallOperands.begin(), CallOperands.end());
cast(Call)->setCallingConv(CallingConvention);
EmitBlock(NextBlock);
}
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Re: [llvm-commits] [llvm] r41150 - /llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
Hi Bruno,
Sparc backend also has a delay slot filler that does exactly the same
thing. Can you change this into a target independent pass instead
(then you just need to add a target hook to emit nop)?
Evan
On Aug 17, 2007, at 6:50 PM, Bruno Cardoso Lopes wrote:
> Author: bruno
> Date: Fri Aug 17 20:50:47 2007
> New Revision: 41150
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41150&view=rev
> Log:
> A Pass to insert Nops on intructions with DelaySlot
>
> Added:
>llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
>
> Added: llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp?rev=41150&view=auto
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp (added)
> +++ llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp Fri Aug 17
> 20:50:47 2007
> @@ -0,0 +1,77 @@
> +//===-- DelaySlotFiller.cpp - Mips delay slot filler
> -===//
> +//
> +// The LLVM Compiler Infrastructure
> +//
> +// This file was developed by Bruno Cardoso Lopes and is
> distributed under
> +// the University of Illinois Open Source License. See LICENSE.TXT
> for details.
> +//
> +//
> =
> =
> =
> --=
> ==//
> +//
> +// Simple pass to fills delay slots with NOPs.
> +//
> +//
> =
> =
> =
> --=
> ==//
> +
> +#define DEBUG_TYPE "delay-slot-filler"
> +
> +#include "Mips.h"
> +#include "MipsTargetMachine.h"
> +#include "llvm/CodeGen/MachineFunctionPass.h"
> +#include "llvm/CodeGen/MachineInstrBuilder.h"
> +#include "llvm/Target/TargetInstrInfo.h"
> +#include "llvm/ADT/Statistic.h"
> +
> +using namespace llvm;
> +
> +STATISTIC(FilledSlots, "Number of delay slots filled");
> +
> +namespace {
> + struct Filler : public MachineFunctionPass {
> +
> +TargetMachine &TM;
> +const TargetInstrInfo *TII;
> +
> +static char ID;
> +Filler(TargetMachine &tm)
> + : MachineFunctionPass((intptr_t)&ID), TM(tm),
> TII(tm.getInstrInfo()) { }
> +
> +virtual const char *getPassName() const {
> + return "Mips Delay Slot Filler";
> +}
> +
> +bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
> +bool runOnMachineFunction(MachineFunction &F) {
> + bool Changed = false;
> + for (MachineFunction::iterator FI = F.begin(), FE = F.end();
> + FI != FE; ++FI)
> +Changed |= runOnMachineBasicBlock(*FI);
> + return Changed;
> +}
> +
> + };
> + char Filler::ID = 0;
> +} // end of anonymous namespace
> +
> +/// runOnMachineBasicBlock - Fill in delay slots for the given
> basic block.
> +/// Currently, we fill delay slots with NOPs. We assume there is
> only one
> +/// delay slot per delayed instruction.
> +bool Filler::
> +runOnMachineBasicBlock(MachineBasicBlock &MBB)
> +{
> + bool Changed = false;
> + for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end();
> ++I)
> +if (TII->hasDelaySlot(I->getOpcode())) {
> + MachineBasicBlock::iterator J = I;
> + ++J;
> + BuildMI(MBB, J, TII->get(Mips::NOP));
> + ++FilledSlots;
> + Changed = true;
> +}
> + return Changed;
> +}
> +
> +/// createMipsDelaySlotFillerPass - Returns a pass that fills in
> delay
> +/// slots in Mips MachineFunctions
> +FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine
> &tm) {
> + return new Filler(tm);
> +}
> +
>
>
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[llvm-commits] [llvm-gcc-4.2] r41509 - /llvm-gcc-4.2/trunk/gcc/except.c
Author: baldrick
Date: Mon Aug 27 14:58:09 2007
New Revision: 41509
URL: http://llvm.org/viewvc/llvm-project?rev=41509&view=rev
Log:
After further thought and testing, it seems that
it is foreach_reachable_handler that should be
modified to agree with can_throw_external_1, and
not the other way round.
Modified:
llvm-gcc-4.2/trunk/gcc/except.c
Modified: llvm-gcc-4.2/trunk/gcc/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41509&r1=41508&r2=41509&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/except.c Mon Aug 27 14:58:09 2007
@@ -2663,9 +2663,13 @@
processing any more of them. Each cleanup will have an edge
to the next outer cleanup region, so the flow graph will be
accurate. */
+/* LLVM local */
+#ifndef ENABLE_LLVM
if (region->type == ERT_CLEANUP)
region = region->u.cleanup.prev_try;
else
+/* LLVM local */
+#endif
region = region->outer;
}
}
@@ -2800,21 +2804,9 @@
/* If the exception is caught or blocked by any containing region,
then it is not seen by any calling function. */
- /* LLVM local begin */
- while (region)
-{
- if (reachable_next_level (region, type_thrown, NULL) >= RNL_CAUGHT)
-return false;
- /* If we have processed one cleanup, there is no point in
- processing any more of them. Each cleanup will have an edge
- to the next outer cleanup region, so the flow graph will be
- accurate. */
- if (region->type == ERT_CLEANUP)
-region = region->u.cleanup.prev_try;
- else
-region = region->outer;
-}
- /* LLVM local end */
+ for (; region ; region = region->outer)
+if (reachable_next_level (region, type_thrown, NULL) >= RNL_CAUGHT)
+ return false;
return true;
}
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Re: [llvm-commits] [llvm] r41489 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/memmove-0.ll test/CodeGen/X86/memmove-1.ll tes
Dan,
The memmove tests you added are failing on x86 darwin.
Here is the output from one of the tests:
lattner% llvm-as < test/CodeGen/X86/memmove-0.ll | llc -march=x86
.text
.align 4,0x90
.globl _foo
_foo:
subl$12, %esp
movl20(%esp), %eax
movl%eax, 4(%esp)
movl24(%esp), %eax
movl%eax, 8(%esp)
movl16(%esp), %eax
movl%eax, (%esp)
callL_memcpy$stub
addl$12, %esp
ret
.section __IMPORT,__jump_table,symbol_stubs,self_modifying_code
+pure_instructions,5
L_memcpy$stub:
.indirect_symbol _memcpy
hlt ; hlt ; hlt ; hlt ; hlt
.subsections_via_symbols
-Tanya
On Aug 27, 2007, at 9:26 AM, Dan Gohman wrote:
> Author: djg
> Date: Mon Aug 27 11:26:13 2007
> New Revision: 41489
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41489&view=rev
> Log:
> If the source and destination pointers in an llvm.memmove are known
> to not alias each other, it can be translated as an llvm.memcpy.
>
> Added:
> llvm/trunk/test/CodeGen/X86/memmove-0.ll
> llvm/trunk/test/CodeGen/X86/memmove-1.ll
> llvm/trunk/test/CodeGen/X86/memmove-2.ll
> llvm/trunk/test/CodeGen/X86/memmove-3.ll
> Modified:
> llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/
> CodeGen/SelectionDAGISel.h?rev=41489&r1=41488&r2=41489&view=diff
>
> ==
>
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Mon Aug 27
> 11:26:13 2007
> @@ -39,6 +39,7 @@
>SSARegMap *RegMap;
>SelectionDAG *CurDAG;
>MachineBasicBlock *BB;
> + AliasAnalysis *AA;
>std::vector TopOrder;
>unsigned DAGSize;
>static char ID;
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/
> SelectionDAG/SelectionDAGISel.cpp?
> rev=41489&r1=41488&r2=41489&view=diff
>
> ==
>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon
> Aug 27 11:26:13 2007
> @@ -409,6 +409,7 @@
>TargetLowering &TLI;
>SelectionDAG &DAG;
>const TargetData *TD;
> + AliasAnalysis &AA;
>
>/// SwitchCases - Vector of CaseBlock structures used to
> communicate
>/// SwitchInst code generation information.
> @@ -423,8 +424,9 @@
>FunctionLoweringInfo &FuncInfo;
>
>SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli,
> + AliasAnalysis &aa,
> FunctionLoweringInfo &funcinfo)
> -: TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()),
> +: TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()), AA
> (aa),
>FuncInfo(funcinfo) {
>}
>
> @@ -4196,6 +4198,17 @@
>unsigned Align = (unsigned)cast(Op4)->getValue();
>if (Align == 0) Align = 1;
>
> + // If the source and destination are known to not be aliases, we
> can
> + // lower memmove as memcpy.
> + if (Op == ISD::MEMMOVE) {
> +uint64_t Size = -1;
> +if (ConstantSDNode *C = dyn_cast(Op3))
> + Size = C->getValue();
> +if (AA.alias(I.getOperand(1), Size, I.getOperand(2), Size) ==
> +AliasAnalysis::NoAlias)
> + Op = ISD::MEMCPY;
> + }
> +
>if (ConstantSDNode *Size = dyn_cast(Op3)) {
> std::vector MemOps;
>
> @@ -4307,6 +4320,9 @@
>
>
> bool SelectionDAGISel::runOnFunction(Function &Fn) {
> + // Get alias analysis for load/store combining.
> + AA = &getAnalysis();
> +
>MachineFunction &MF = MachineFunction::construct(&Fn,
> TLI.getTargetMachine());
>RegMap = MF.getSSARegMap();
>DOUT << "\n\n\n=== " << Fn.getName() << "\n";
> @@ -4404,7 +4420,7 @@
> void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG,
> BasicBlock *LLVMBB,
> std::vector >
> &PHINodesToUpdate,
> FunctionLoweringInfo
> &FuncInfo) {
> - SelectionDAGLowering SDL(DAG, TLI, FuncInfo);
> + SelectionDAGLowering SDL(DAG, TLI, *AA, FuncInfo);
>
>std::vector UnorderedChains;
>
> @@ -4581,11 +4597,8 @@
> }
>
> void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
> - // Get alias analysis for load/store combining.
> - AliasAnalysis &AA = getAnalysis();
> -
>// Run the DAG combiner in pre-legalize mode.
> - DAG.Combine(false, AA);
> + DAG.Combine(false, *AA);
>
>DOUT << "Lowered selection DAG:\n";
>DEBUG(DAG.dump());
> @@ -4598,7 +4611,7 @@
>DEBUG(DAG.dump());
>
>// Run the DAG combiner in post-legalize mode.
> - DAG.Combine(true, AA);
> + DAG.Combine(true,
Re: [llvm-commits] [llvm] r41479 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2004-02-12-Memcpy.llx
Rafael,
test/CodeGen/X86/2004-02-12-Memcpy.llx is failing on x86 darwin:
Here is the output in case it helps:
lattner% llvm-as < test/CodeGen/X86/2004-02-12-Memcpy.llx | llc -
march=x86
.text
.align 4,0x90
.globl _main
_main:
pushl %edi
pushl %esi
subl$20, %esp
fnstcw 18(%esp)
movb$2, 19(%esp)
fldcw 18(%esp)
movl$_B, %esi
movl$_A, %edi
movl$32, %ecx
rep;movsl
movl$128, 8(%esp)
movl$_B, 4(%esp)
movl$_A, (%esp)
callL_memcpy$stub
movl$128, 8(%esp)
movl$_B, 4(%esp)
movl$_A, (%esp)
callL_memcpy$stub
addl$20, %esp
popl%esi
popl%edi
ret
.globl _A
.zerofill __DATA__, __common, _A, 128, 2
.globl _B
.zerofill __DATA__, __common, _B, 128, 2
.section __IMPORT,__jump_table,symbol_stubs,self_modifying_code
+pure_instructions,5
L_memcpy$stub:
.indirect_symbol _memcpy
hlt ; hlt ; hlt ; hlt ; hlt
.subsections_via_symbols
-Tanya
On Aug 27, 2007, at 3:18 AM, Rafael Espindola wrote:
> Author: rafael
> Date: Mon Aug 27 05:18:20 2007
> New Revision: 41479
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41479&view=rev
> Log:
> call libc memcpy/memset if array size is bigger then threshold.
>
> Coping 100MB array (after a warmup) shows that glibc 2.6.1
> implementation on
> x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
>
>
> Modified:
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
> X86ISelLowering.cpp?rev=41479&r1=41478&r2=41479&view=diff
>
> ==
>
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 27
> 05:18:20 2007
> @@ -3753,10 +3753,10 @@
>if (Align == 0) Align = 1;
>
>ConstantSDNode *I = dyn_cast(Op.getOperand(3));
> - // If not DWORD aligned, call memset if size is less than the
> threshold.
> + // If not DWORD aligned or size is more than the threshold, call
> memset.
>// It knows how to align to the right boundary first.
>if ((Align & 3) != 0 ||
> - (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold
> ())) {
> + (I && I->getValue() > Subtarget->getMinRepStrSizeThreshold
> ())) {
> MVT::ValueType IntPtr = getPointerTy();
> const Type *IntPtrTy = getTargetData()->getIntPtrType();
> TargetLowering::ArgListTy Args;
> @@ -3909,10 +3909,10 @@
>if (Align == 0) Align = 1;
>
>ConstantSDNode *I = dyn_cast(Op.getOperand(3));
> - // If not DWORD aligned, call memcpy if size is less than the
> threshold.
> + // If not DWORD aligned or size is more than the threshold, call
> memcpy.
>// It knows how to align to the right boundary first.
>if ((Align & 3) != 0 ||
> - (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold
> ())) {
> + (I && I->getValue() > Subtarget->getMinRepStrSizeThreshold
> ())) {
> MVT::ValueType IntPtr = getPointerTy();
> TargetLowering::ArgListTy Args;
> TargetLowering::ArgListEntry Entry;
>
> Modified: llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
> X86/2004-02-12-Memcpy.llx?rev=41479&r1=41478&r2=41479&view=diff
>
> ==
>
> --- llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx (original)
> +++ llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx Mon Aug 27
> 05:18:20 2007
> @@ -1,24 +1,26 @@
> -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep movs
> -declare void %llvm.memcpy.i32(sbyte* %A, sbyte* %B, uint %amt,
> uint %align)
> +; RUN: llvm-as < %s | llc -march=x86 | grep movs | count 1
> +; RUN: llvm-as < %s | llc -march=x86 | grep memcpy | count 2
>
> -%A = global [1000 x int] zeroinitializer
> -%B = global [1000 x int] zeroinitializer
> [EMAIL PROTECTED] = global [32 x i32] zeroinitializer
> [EMAIL PROTECTED] = global [32 x i32] zeroinitializer
>
> +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
>
> -void %main() {
> +define void @main() {
>; dword copy
> - call void %llvm.memcpy.i32(sbyte* cast (int* getelementptr
> ([1000 x int]* %A, long 0, long 0) to sbyte*),
> - sbyte* cast (int* getelementptr ([1000
> x int]* %B, long 0, long 0) to sbyte*),
> - uint 4000, uint 4)
> + call void @llvm.memcpy.i32(i8* bitcast ([32 x i32]* @A to i8*),
> + i8* bitcast ([32 x i32]* @B to i8*),
> + i32 128, i32 4 )
[llvm-commits] [llvm] r41510 - in /llvm/trunk/test/CodeGen/X86: memmove-0.ll memmove-1.ll memmove-2.ll memmove-3.ll
Author: djg
Date: Mon Aug 27 15:54:48 2007
New Revision: 41510
URL: http://llvm.org/viewvc/llvm-project?rev=41510&view=rev
Log:
Add explicit triples to avoid default behavior that varies by host.
Modified:
llvm/trunk/test/CodeGen/X86/memmove-0.ll
llvm/trunk/test/CodeGen/X86/memmove-1.ll
llvm/trunk/test/CodeGen/X86/memmove-2.ll
llvm/trunk/test/CodeGen/X86/memmove-3.ll
Modified: llvm/trunk/test/CodeGen/X86/memmove-0.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memmove-0.ll?rev=41510&r1=41509&r2=41510&view=diff
==
--- llvm/trunk/test/CodeGen/X86/memmove-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memmove-0.ll Mon Aug 27 15:54:48 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {call memcpy}
+; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call
memcpy}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
Modified: llvm/trunk/test/CodeGen/X86/memmove-1.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memmove-1.ll?rev=41510&r1=41509&r2=41510&view=diff
==
--- llvm/trunk/test/CodeGen/X86/memmove-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memmove-1.ll Mon Aug 27 15:54:48 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {call memmove}
+; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call
memmove}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
Modified: llvm/trunk/test/CodeGen/X86/memmove-2.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memmove-2.ll?rev=41510&r1=41509&r2=41510&view=diff
==
--- llvm/trunk/test/CodeGen/X86/memmove-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memmove-2.ll Mon Aug 27 15:54:48 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | not grep call
+; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | not grep call
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
Modified: llvm/trunk/test/CodeGen/X86/memmove-3.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memmove-3.ll?rev=41510&r1=41509&r2=41510&view=diff
==
--- llvm/trunk/test/CodeGen/X86/memmove-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memmove-3.ll Mon Aug 27 15:54:48 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {call memmove}
+; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call
memmove}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
___
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[llvm-commits] [llvm] r41516 - /llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
Author: dpatel Date: Mon Aug 27 16:34:31 2007 New Revision: 41516 URL: http://llvm.org/viewvc/llvm-project?rev=41516&view=rev Log: Use simpler test to filter loops. Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=41516&r1=41515&r2=41516&view=diff == --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Mon Aug 27 16:34:31 2007 @@ -752,21 +752,10 @@ && (Latch == Succ0 || Latch == Succ1)) return false; - // If one of the split condition branch is post dominating other then loop - // index split is not appropriate. - if (DT->dominates(Succ0, Latch) || DT->dominates(Succ1, Latch)) + // If split condition branches heads do not have single predecessor, + // SplitCondBlock, then is not possible to remove inactive branch. + if (!Succ0->getSinglePredecessor() || !Succ1->getSinglePredecessor()) return false; - - // If one of the split condition branch is a predecessor of the other - // split condition branch head then do not split loop on this condition. - for(pred_iterator PI = pred_begin(Succ0), PE = pred_end(Succ0); - PI != PE; ++PI) -if (Succ1 == *PI) - return false; - for(pred_iterator PI = pred_begin(Succ1), PE = pred_end(Succ1); - PI != PE; ++PI) -if (Succ0 == *PI) - return false; // Finally this split condition is safe only if merge point for // split condition branch is loop latch. This check along with previous ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41519 - /llvm/tags/Apple/llvm-1200-10/
Author: void Date: Mon Aug 27 16:53:31 2007 New Revision: 41519 URL: http://llvm.org/viewvc/llvm-project?rev=41519&view=rev Log: Creating llvm-1200-10 branch Added: llvm/tags/Apple/llvm-1200-10/ - copied from r41518, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r41518 - /llvm-gcc-4.0/tags/llvm-gcc-1200-10/
Author: void Date: Mon Aug 27 16:53:25 2007 New Revision: 41518 URL: http://llvm.org/viewvc/llvm-project?rev=41518&view=rev Log: Creating llvm-gcc-1200-10 branch Added: llvm-gcc-4.0/tags/llvm-gcc-1200-10/ - copied from r41517, llvm-gcc-4.0/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r41481 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Hi Duncan,
Could you back this patch out please? It's breaking builds on Darwin.
-bw
On 8/27/07, Duncan Sands <[EMAIL PROTECTED]> wrote:
> Author: baldrick
> Date: Mon Aug 27 07:56:28 2007
> New Revision: 41481
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41481&view=rev
> Log:
> Turn on exception handling codegen.
>
> Modified:
> llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
>
> Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=41481&r1=41480&r2=41481&view=diff
>
> ==
> --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
> +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Aug 27 07:56:28 2007
> @@ -123,9 +123,8 @@
> Args.push_back("--debug-pass=Structure");
>if (flag_debug_pass_arguments)
> Args.push_back("--debug-pass=Arguments");
> -// Disabled until PR1224 is resolved.
> - //if (flag_exceptions)
> - // Args.push_back("--enable-eh");
> + if (flag_exceptions)
> +Args.push_back("--enable-eh");
>
>// If there are options that should be passed through to the LLVM backend
>// directly from the command line, do so now. This is mainly for debugging
>
>
> ___
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>
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Re: [llvm-commits] [llvm] r41489 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/memmove-0.ll test/CodeGen/X86/memmove-1.ll tes
On Aug 27, 2007, at 10:46 AM, Dan Gohman wrote: >> This is nifty, but shouldn't this be done at the LLVM IR level? I >> can't think of cases where lowering would create new memmove calls. > > I'm not aware of any cases where memmove vs. memcpy matters before > codegen currently. If it were done at the LLVM IR level, would it be > too trivial to be in a pass by itself, or would you want to add it, > along with an addRequired, to some existing pass? I'm not really sure that there is any place that is truly natural. I suspect that the best place would be the new GVN pass that Owen should be turning on "real soon now", as it already uses alias info. Owen, how's that going? :) -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.0] r41480 - /llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Thank you. I'm going to be working on it this week and hope to have
the failure fixed soon.
-bw
On Aug 27, 2007, at 5:53 AM, Duncan Sands wrote:
> Author: baldrick
> Date: Mon Aug 27 07:53:48 2007
> New Revision: 41480
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41480&view=rev
> Log:
> Turn on exception handling code generation.
>
> Modified:
> llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
>
> Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/
> llvm-backend.cpp?rev=41480&r1=41479&r2=41480&view=diff
>
> ==
>
> --- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original)
> +++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Mon Aug 27 07:53:48 2007
> @@ -122,9 +122,8 @@
> Args.push_back("--debug-pass=Structure");
>if (flag_debug_pass_arguments)
> Args.push_back("--debug-pass=Arguments");
> -// Disabled until PR1224 is resolved.
> - //if (flag_exceptions)
> - // Args.push_back("--enable-eh");
> + if (flag_exceptions)
> +Args.push_back("--enable-eh");
>
>// If there are options that should be passed through to the
> LLVM backend
>// directly from the command line, do so now. This is mainly
> for debugging
>
>
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Re: [llvm-commits] [patch] fix the alignment of i64 and f64 on linux x86-64
On Aug 24, 2007, at 6:31 AM, Rafael Espindola wrote: > According to table 3.1 of http://www.x86-64.org/documentation/abi.pdf, > the i64 and f64 types should have 8 byte alignment. > > The attached patch changes this for targets that are not darwin. Dan, Evan, is this ok? Evan, doesn't darwin follow the same ABI on x86-64? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41522 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Author: lattner Date: Mon Aug 27 23:23:55 2007 New Revision: 41522 URL: http://llvm.org/viewvc/llvm-project?rev=41522&view=rev Log: Cut off crazy computation. This helps PR1622 slightly. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=41522&r1=41521&r2=41522&view=diff == --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Aug 27 23:23:55 2007 @@ -8283,6 +8283,10 @@ // Remember this node, and if we find the cycle, return. if (!PotentiallyDeadPHIs.insert(PN)) return true; + + // Don't scan crazily complex things. + if (PotentiallyDeadPHIs.size() == 16) +return false; if (PHINode *PU = dyn_cast(PN->use_back())) return DeadPHICycle(PU, PotentiallyDeadPHIs); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r41525 - /llvm/trunk/lib/Target/Mips/MipsMachineFunction.h
Author: bruno
Date: Tue Aug 28 00:04:41 2007
New Revision: 41525
URL: http://llvm.org/viewvc/llvm-project?rev=41525&view=rev
Log:
Added methods to record SPOffsets from LowerFORMAL_ARGUMENTS
Modified:
llvm/trunk/lib/Target/Mips/MipsMachineFunction.h
Modified: llvm/trunk/lib/Target/Mips/MipsMachineFunction.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMachineFunction.h?rev=41525&r1=41524&r2=41525&view=diff
==
--- llvm/trunk/lib/Target/Mips/MipsMachineFunction.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsMachineFunction.h Tue Aug 28 00:04:41 2007
@@ -14,7 +14,9 @@
#ifndef MIPS_MACHINE_FUNCTION_INFO_H
#define MIPS_MACHINE_FUNCTION_INFO_H
+#include "llvm/ADT/VectorExtras.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
namespace llvm {
@@ -31,9 +33,34 @@
/// the Return Address must be saved
int RAStackOffset;
+ /// MipsFIHolder - Holds a FrameIndex and it's Stack Pointer Offset
+ struct MipsFIHolder {
+
+int FI;
+int SPOffset;
+
+MipsFIHolder(int FrameIndex, int StackPointerOffset)
+ : FI(FrameIndex), SPOffset(StackPointerOffset) {}
+ };
+
+ // On LowerFORMAL_ARGUMENTS the stack size is unknown,
+ // so the Stack Pointer Offset calculation of "not in
+ // register arguments" must be postponed to emitPrologue.
+ SmallVector FnLoadArgs;
+ bool HasLoadArgs;
+
+ // When VarArgs, we must write registers back to caller
+ // stack, preserving on register arguments. Since the
+ // stack size is unknown on LowerFORMAL_ARGUMENTS,
+ // the Stack Pointer Offset calculation must be
+ // postponed to emitPrologue.
+ SmallVector FnStoreVarArgs;
+ bool HasStoreVarArgs;
+
public:
MipsFunctionInfo(MachineFunction& MF)
- : FPStackOffset(0), RAStackOffset(0)
+ : FPStackOffset(0), RAStackOffset(0),
+HasLoadArgs(false), HasStoreVarArgs(false)
{}
int getFPStackOffset() const { return FPStackOffset; }
@@ -46,9 +73,32 @@
return (RAStackOffset > FPStackOffset) ?
(RAStackOffset) : (FPStackOffset);
}
+
+ bool hasLoadArgs() const { return HasLoadArgs; }
+ bool hasStoreVarArgs() const { return HasStoreVarArgs; }
+
+ void recordLoadArgsFI(int FI, int SPOffset) {
+if (!HasLoadArgs) HasLoadArgs=true;
+FnLoadArgs.push_back(MipsFIHolder(FI, SPOffset));
+ }
+ void recordStoreVarArgsFI(int FI, int SPOffset) {
+if (!HasStoreVarArgs) HasStoreVarArgs=true;
+FnStoreVarArgs.push_back(MipsFIHolder(FI, SPOffset));
+ }
+
+ void adjustLoadArgsFI(MachineFrameInfo *MFI) const {
+if (!hasLoadArgs()) return;
+for (unsigned i = 0, e = FnLoadArgs.size(); i != e; ++i)
+ MFI->setObjectOffset( FnLoadArgs[i].FI, FnLoadArgs[i].SPOffset );
+ }
+ void adjustStoreVarArgsFI(MachineFrameInfo *MFI) const {
+if (!hasStoreVarArgs()) return;
+for (unsigned i = 0, e = FnStoreVarArgs.size(); i != e; ++i)
+ MFI->setObjectOffset( FnStoreVarArgs[i].FI, FnStoreVarArgs[i].SPOffset );
+ }
+
};
} // end of namespace llvm
-
-#endif
+#endif // MIPS_MACHINE_FUNCTION_INFO_H
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[llvm-commits] [llvm] r41527 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
Author: bruno
Date: Tue Aug 28 00:08:16 2007
New Revision: 41527
URL: http://llvm.org/viewvc/llvm-project?rev=41527&view=rev
Log:
Changed stack allocation On LowerFORMAL_ARGUMENTS.
Added comments about new stack allocation.
Expand SelectCC for i32 results
Modified:
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=41527&r1=41526&r2=41527&view=diff
==
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Aug 28 00:08:16 2007
@@ -15,12 +15,12 @@
#define DEBUG_TYPE "mips-lower"
#include "MipsISelLowering.h"
+#include "MipsMachineFunction.h"
#include "MipsTargetMachine.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/Intrinsics.h"
#include "llvm/CallingConv.h"
-#include "llvm/ADT/VectorExtras.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
@@ -76,8 +76,9 @@
setOperationAction(ISD::BR_JT, MVT::Other, Expand);
setOperationAction(ISD::BR_CC, MVT::Other, Expand);
setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
+ setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
+ setOperationAction(ISD::SELECT,MVT::i32, Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
- setOperationAction(ISD::SELECT, MVT::i32, Expand);
// Mips not supported intrinsics.
setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
@@ -224,7 +225,7 @@
// To meet ABI, Mips must always allocate 16 bytes on
// the stack (even if less than 4 are used as arguments)
int VTsize = MVT::getSizeInBits(MVT::i32)/8;
- MFI->CreateFixedObject(VTsize, -(VTsize*3));
+ MFI->CreateFixedObject(VTsize, (VTsize*3));
CCInfo.AnalyzeCallOperands(Op.Val, CC_Mips);
@@ -272,10 +273,10 @@
StackPtr = DAG.getRegister(StackReg, getPointerTy());
// Create the frame index object for this incoming parameter
- // This guarantees that when allocating Local Area our room
- // will not be overwritten.
+ // This guarantees that when allocating Local Area the firsts
+ // 16 bytes which are alwayes reserved won't be overwritten.
int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
- -(16 + VA.getLocMemOffset()) );
+ (16 + VA.getLocMemOffset()));
SDOperand PtrOff = DAG.getFrameIndex(FI,getPointerTy());
@@ -364,10 +365,6 @@
CCInfo.AnalyzeCallResult(TheCall, RetCC_Mips);
SmallVector ResultVals;
- // Returns void
- //if (!RVLocs.size())
- // return Chain.Val;
-
// Copy all of the result registers out of their specified physreg.
for (unsigned i = 0; i != RVLocs.size(); ++i) {
Chain = DAG.getCopyFromReg(Chain, RVLocs[i].getLocReg(),
@@ -410,6 +407,7 @@
SDOperand Root= Op.getOperand(0);
MachineFunction &MF = DAG.getMachineFunction();
MachineFrameInfo *MFI = MF.getFrameInfo();
+ MipsFunctionInfo *MipsFI = MF.getInfo();
bool isVarArg = cast(Op.getOperand(2))->getValue() != 0;
unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv();
@@ -437,7 +435,6 @@
RC = Mips::CPURegsRegisterClass;
else
assert(0 && "support only Mips::CPURegsRegisterClass");
-
// Transform the arguments stored on
// physical registers into virtual ones
@@ -460,17 +457,22 @@
ArgValues.push_back(ArgValue);
// To meet ABI, when VARARGS are passed on registers, the registers
- // containt must be written to the their always reserved home location
- // on the stack.
+ // must have their values written to the caller stack frame.
if (isVarArg) {
if (StackPtr.Val == 0)
StackPtr = DAG.getRegister(StackReg, getPointerTy());
-// Create the frame index object for this incoming parameter
-// The first 16 bytes are reserved.
-int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
-i*4);
+// The stack pointer offset is relative to the caller stack frame.
+// Since the real stack size is unknown here, a negative SPOffset
+// is used so there's a way to adjust these offsets when the stack
+// size get known (on EliminateFrameIndex). A dummy SPOffset is
+// used instead of a direct negative address (which is recorded to
+// be used on emitPrologue) to avoid mis-calc of the first stack
+// offset on PEI::calculateFrameObjectOffsets.
+// Arguments are always 32-bit.
+int FI = MFI->CreateFixedObject(4, 0);
+MipsFI->recordStoreVarArgsFI(FI, -(4+(i*4)));
SDOp
[llvm-commits] [llvm] r41529 - in /llvm/trunk/lib/Target/Mips: MipsRegisterInfo.cpp MipsRegisterInfo.h MipsTargetMachine.cpp
Author: bruno
Date: Tue Aug 28 00:13:42 2007
New Revision: 41529
URL: http://llvm.org/viewvc/llvm-project?rev=41529&view=rev
Log:
Added method to get Mips register numbers
Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack.
Stack offset calculation bug fixed!
Modified:
llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=41529&r1=41528&r2=41529&view=diff
==
--- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Tue Aug 28 00:13:42 2007
@@ -41,6 +41,48 @@
: MipsGenRegisterInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
TII(tii) {}
+/// getRegisterNumbering - Given the enum value for some register, e.g.
+/// Mips::RA, return the number that it corresponds to (e.g. 31).
+unsigned MipsRegisterInfo::
+getRegisterNumbering(unsigned RegEnum)
+{
+ switch (RegEnum) {
+case Mips::ZERO : return 0;
+case Mips::AT : return 1;
+case Mips::V0 : return 2;
+case Mips::V1 : return 3;
+case Mips::A0 : return 4;
+case Mips::A1 : return 5;
+case Mips::A2 : return 6;
+case Mips::A3 : return 7;
+case Mips::T0 : return 8;
+case Mips::T1 : return 9;
+case Mips::T2 : return 10;
+case Mips::T3 : return 11;
+case Mips::T4 : return 12;
+case Mips::T5 : return 13;
+case Mips::T6 : return 14;
+case Mips::T7 : return 15;
+case Mips::T8 : return 16;
+case Mips::T9 : return 17;
+case Mips::S0 : return 18;
+case Mips::S1 : return 19;
+case Mips::S2 : return 20;
+case Mips::S3 : return 21;
+case Mips::S4 : return 22;
+case Mips::S5 : return 23;
+case Mips::S6 : return 24;
+case Mips::S7 : return 25;
+case Mips::K0 : return 26;
+case Mips::K1 : return 27;
+case Mips::GP : return 28;
+case Mips::SP : return 29;
+case Mips::FP : return 30;
+case Mips::RA : return 31;
+default: assert(0 && "Unknown register number!");
+ }
+}
+
void MipsRegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, int FI,
@@ -114,6 +156,12 @@
return NewMI;
}
+//===--===//
+//
+// Callee Saved Registers methods
+//
+//===--===//
+
/// Mips Callee Saved Registers
const unsigned* MipsRegisterInfo::
getCalleeSavedRegs(const MachineFunction *MF) const
@@ -159,49 +207,50 @@
// Stack Frame Processing methods
// ++
//
-// Too meet ABI, we construct the frame on the reverse
-// of natural order.
-//
-// The LLVM Frame will look like this:
+// The stack is allocated decrementing the stack pointer on
+// the first instruction of a function prologue. Once decremented,
+// all stack referencesare are done thought a positive offset
+// from the stack/frame pointer, so the stack is considering
+// to grow up! Otherwise terrible hacks would have to be made
+// to get this stack ABI compliant :)
+//
+// The stack frame required by the ABI:
+// Offset
+//
+// 0 --
+// 4 Args to pass
+// . saved $GP (used in PIC - not supported yet)
+// . Local Area
+// . saved "Callee Saved" Registers
+// . saved FP
+// . saved RA
+// StackSize ---
//
-// As the stack grows down, we start at 0, and the reference
-// is decrement.
-//
-// 0 --
-// -4 Args to pass
-// . saved "Callee Saved" Registers
-// . Local Area
-// . saved FP
-// . saved RA
-// -StackSize ---
-//
-// On the EliminateFrameIndex we just negate the address above
-// and we get the stack frame required by the ABI, which is:
-//
-// sp + stacksize -
-// saved $RA (only on non-leaf functions)
-// saved $FP (only with frame pointer)
-// saved "Callee Saved" Registers
-// Local Area
-// saved $GP (used in PIC - not supported yet)
-// Args to pass area
-// sp -
+// Offset - offset from sp after stack allocation on function prologue
//
// The sp is the stack pointer subtracted/added from the stack size
// at the Prologue/Epilogue
//
// References to the previous stack (to obtain arguments) are done
-// with fixed location stack frames using positive stack offsets.
+// with offsets that exceeds the stack size: (stacksize+(4
[llvm-commits] CVS: llvm-www/pubs/index.html
Changes in directory llvm-www/pubs: index.html updated: 1.57 -> 1.58 --- Log message: add a paper --- Diffs of the changes: (+5 -0) index.html |5 + 1 files changed, 5 insertions(+) Index: llvm-www/pubs/index.html diff -u llvm-www/pubs/index.html:1.57 llvm-www/pubs/index.html:1.58 --- llvm-www/pubs/index.html:1.57 Thu Jul 26 01:09:19 2007 +++ llvm-www/pubs/index.htmlTue Aug 28 00:17:12 2007 @@ -3,6 +3,11 @@ +"Transactifying Applications +Using an Open Compiler Framework"Pascal Felber, Christof Fetzer, +Ulrich Mueller, Torvald Riegel, Martin Suesskraut, and Heiko Sturzrehm +TRANSACT 2007, August 2007. + "LLVM 2.0 and Beyond!" Chris Lattner ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2007-08-16-TRANSACT-Tanger-Slides.pdf 2007-08-16-TRANSACT-Tanger.html 2007-08-16-TRANSACT-Tanger.pdf
Changes in directory llvm-www/pubs:
2007-08-16-TRANSACT-Tanger-Slides.pdf added (r1.1)
2007-08-16-TRANSACT-Tanger.html added (r1.1)
2007-08-16-TRANSACT-Tanger.pdf added (r1.1)
---
Log message:
Add Torvald's STM paper.
---
Diffs of the changes: (+60 -0)
2007-08-16-TRANSACT-Tanger-Slides.pdf |0
2007-08-16-TRANSACT-Tanger.html | 60 ++
2007-08-16-TRANSACT-Tanger.pdf|0
3 files changed, 60 insertions(+)
Index: llvm-www/pubs/2007-08-16-TRANSACT-Tanger-Slides.pdf
Index: llvm-www/pubs/2007-08-16-TRANSACT-Tanger.html
diff -c /dev/null llvm-www/pubs/2007-08-16-TRANSACT-Tanger.html:1.1
*** /dev/null Tue Aug 28 00:16:02 2007
--- llvm-www/pubs/2007-08-16-TRANSACT-Tanger.html Tue Aug 28 00:15:26 2007
***
*** 0
--- 1,60
+
+
+
+
+
+ Transactifying Applications Using an Open Compiler Framework
+
+
+
+
+ Transactifying Applications Using an Open Compiler Framework
+
+
+ Pascal Felber, Christof Fetzer, Ulrich Mueller, Torvald Riegel,
+ Martin Suesskraut, and Heiko Sturzrehm
+
+
+ Abstract:
+
+ Transactional memory dramatically reduces the complexity of writing concurrent
+ code. Yet, seamless integration of transactional constructs in application
code
+ typically comes with a significant performance penalty. Recent studies have
+ shown that compiler support allows producing highly efficient STM-based
+ applications without putting the hassle on the programmer. So far, STM
+ integration has been partially implemented in custom, proprietary compiler
+ infrastructures. In this paper, we propose and evaluate the use of the LLVM
+ open compiler framework to generate efficient concurrent applications using
+ word-based STM libraries. Since LLVM uses the GCC compiler suite as front-end,
+ it can process code written in C or C++ (with partial support for other
+ languages). We also present a tool that allows ``transactifying'' assembly
code
+ and can complement LLVM for legacy code and libraries. Experiments using a
+ lightweight C word-based STM library show that LLVM integration performs as
+ well as hand-optimized calls to the STM library and better than assembly code
+ instrumentation of the application code.
+
+
+ Bibtex:
+
+ @inproceedings { felber2007tanger,
+ title = {Transactifying Applications using an Open Compiler Framework},
+ author = {Pascal Felber and Christof Fetzer and Ulrich M\"uller and
+ Torvald Riegel and Martin S\"u{\ss}kraut and Heiko Sturzrehm },
+ booktitle = {TRANSACT},
+ month = {August},
+ year = {2007},
+ }
+
+
+ Download:
+
+ http://tinystm.org";>tinystm.org The tool, including source
+ code
+ Transactifying Applications
+ Using an Open Compiler Framework (PDF)
+ Transactifying
+ Applications Using an Open Compiler Framework (Slides)
+
+
+
+
Index: llvm-www/pubs/2007-08-16-TRANSACT-Tanger.pdf
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[llvm-commits] [llvm] r41526 - in /llvm/trunk/lib/Target/Mips: MipsAsmPrinter.cpp MipsInstrInfo.h
Author: bruno
Date: Tue Aug 28 00:06:17 2007
New Revision: 41526
URL: http://llvm.org/viewvc/llvm-project?rev=41526&view=rev
Log:
Mask directive completed with CalleeSave info
Comments for Mips directives added.
Modified:
llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=41526&r1=41525&r2=41526&view=diff
==
--- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Tue Aug 28 00:06:17 2007
@@ -31,6 +31,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/CommandLine.h"
@@ -62,12 +63,14 @@
void printMemOperand(const MachineInstr *MI, int opNum,
const char *Modifier = 0);
+unsigned int getSavedRegsBitmask(bool isFloat, MachineFunction &MF);
void printHex32(unsigned int Value);
+
void emitFunctionStart(MachineFunction &MF);
void emitFunctionEnd();
void emitFrameDirective(MachineFunction &MF);
void emitMaskDirective(MachineFunction &MF);
-void emitFMaskDirective();
+void emitFMaskDirective(MachineFunction &MF);
void emitSetDirective(SetDirectiveFlags Flag);
bool printInstruction(const MachineInstr *MI); // autogenerated.
@@ -89,96 +92,92 @@
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo());
}
-/// This pattern will be emitted :
-/// .frame reg1, size, reg2
-/// It describes the stack frame.
-/// reg1 - stack pointer
-/// size - stack size allocated for the function
-/// reg2 - return address register
-void MipsAsmPrinter::
-emitFrameDirective(MachineFunction &MF)
-{
- const MRegisterInfo &RI = *TM.getRegisterInfo();
-
- unsigned stackReg = RI.getFrameRegister(MF);
- unsigned returnReg = RI.getRARegister();
- unsigned stackSize = MF.getFrameInfo()->getStackSize();
-
-
- O << "\t.frame\t" << "$" << LowercaseString(RI.get(stackReg).Name)
-<< "," << stackSize << ","
-<< "$" << LowercaseString(RI.get(returnReg).Name)
-<< "\n";
-}
+//===--===//
+//
+// Mips Asm Directives
+//
+// -- Frame directive "frame Stackpointer, Stacksize, RARegister"
+// Describe the stack frame.
+//
+// -- Mask directives "(f)mask bitmask, offset"
+// Tells the assembler which registers are saved and where.
+// bitmask - contain a little endian bitset indicating which registers are
+//saved on function prologue (e.g. with a 0x8000 mask, the
+//assembler knows the register 31 (RA) is saved at prologue.
+// offset - the position before stack pointer subtraction indicating where
+//the first saved register on prologue is located. (e.g. with a
+//
+// Consider the following function prologue:
+//
+//.frame $fp,48,$ra
+//.mask 0xc000,-8
+// addiu $sp, $sp, -48
+// sw $ra, 40($sp)
+// sw $fp, 36($sp)
+//
+//With a 0xc000 mask, the assembler knows the register 31 (RA) and
+//30 (FP) are saved at prologue. As the save order on prologue is from
+//left to right, RA is saved first. A -8 offset means that after the
+//stack pointer subtration, the first register in the mask (RA) will be
+//saved at address 48-8=40.
+//
+//===--===//
-/// This pattern will be emitted :
-/// .mask bitmask, offset
-/// Tells the assembler (and possibly linker) which registers are saved and
where.
-/// bitmask - mask of all GPRs (little endian)
-/// offset - negative value. offset+stackSize should give where on the stack
-/// the first GPR is saved.
-/// TODO: consider calle saved GPR regs here, not hardcode register numbers.
+/// Mask directive for GPR
void MipsAsmPrinter::
emitMaskDirective(MachineFunction &MF)
{
- const MRegisterInfo &RI = *TM.getRegisterInfo();
MipsFunctionInfo *MipsFI = MF.getInfo();
- bool hasFP = RI.hasFP(MF);
- bool saveRA = MF.getFrameInfo()->hasCalls();
-
- int offset;
-
- if (!MipsFI->getTopSavedRegOffset())
-offset = 0;
- else
-offset = -(MF.getFrameInfo()->getStackSize()
- -MipsFI->getTopSavedRegOffset());
-
+ int StackSize = MF.getFrameInfo()->getStackSize();
+ int Offset= (!MipsFI->getTopSavedRegOffset()) ? 0 :
+ (-(StackSize-MipsFI->getTopSavedRegOffset()));
+
#ifndef NDEBUG
- DOUT << "<--ASM PRINTER--emitMaskDirective-->" << "\n";
- DOUT << "StackSize : " << MF.getFrameInfo()->getStackSize() << "\n";
- DOUT << "getTopSavedRe
[llvm-commits] [llvm-gcc-4.0] r41534 - /llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Author: baldrick
Date: Tue Aug 28 01:36:41 2007
New Revision: 41534
URL: http://llvm.org/viewvc/llvm-project?rev=41534&view=rev
Log:
Turn off eh codegen because it breaks the x86
darwin build.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=41534&r1=41533&r2=41534&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Tue Aug 28 01:36:41 2007
@@ -122,8 +122,9 @@
Args.push_back("--debug-pass=Structure");
if (flag_debug_pass_arguments)
Args.push_back("--debug-pass=Arguments");
- if (flag_exceptions)
-Args.push_back("--enable-eh");
+// Breaks the x86-darwin build
+// if (flag_exceptions)
+//Args.push_back("--enable-eh");
// If there are options that should be passed through to the LLVM backend
// directly from the command line, do so now. This is mainly for debugging
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[llvm-commits] [llvm-gcc-4.2] r41535 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Author: baldrick
Date: Tue Aug 28 01:40:16 2007
New Revision: 41535
URL: http://llvm.org/viewvc/llvm-project?rev=41535&view=rev
Log:
Turn off eh codegen because it breaks the x86
darwin build.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=41535&r1=41534&r2=41535&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Aug 28 01:40:16 2007
@@ -123,8 +123,9 @@
Args.push_back("--debug-pass=Structure");
if (flag_debug_pass_arguments)
Args.push_back("--debug-pass=Arguments");
- if (flag_exceptions)
-Args.push_back("--enable-eh");
+// Breaks the x86-darwin build
+// if (flag_exceptions)
+//Args.push_back("--enable-eh");
// If there are options that should be passed through to the LLVM backend
// directly from the command line, do so now. This is mainly for debugging
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