[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp DwarfWriter.cpp
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.138 -> 1.139
DwarfWriter.cpp updated: 1.113 -> 1.114
---
Log message:
Migrate print routines to asm to be shared by exception handling.
---
Diffs of the changes: (+382 -369)
AsmPrinter.cpp | 223 ---
DwarfWriter.cpp | 528 +++-
2 files changed, 382 insertions(+), 369 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.138
llvm/lib/CodeGen/AsmPrinter.cpp:1.139
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.138 Mon Jan 22 18:36:17 2007
+++ llvm/lib/CodeGen/AsmPrinter.cpp Thu Jan 25 09:12:02 2007
@@ -18,6 +18,7 @@
#include "llvm/Module.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
@@ -28,6 +29,9 @@
#include
using namespace llvm;
+static cl::opt
+AsmVerbose("asm-verbose", cl::Hidden, cl::desc("Add comments to directives."));
+
AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm,
const TargetAsmInfo *T)
: FunctionNumber(0), O(o), TM(tm), TAI(T)
@@ -366,6 +370,196 @@
return LinkName;
}
+//===--===//
+/// LEB 128 number encoding.
+
+/// PrintULEB128 - Print a series of hexidecimal values (separated by commas)
+/// representing an unsigned leb128 value.
+void AsmPrinter::PrintULEB128(unsigned Value) const {
+ do {
+unsigned Byte = Value & 0x7f;
+Value >>= 7;
+if (Value) Byte |= 0x80;
+O << "0x" << std::hex << Byte << std::dec;
+if (Value) O << ", ";
+ } while (Value);
+}
+
+/// SizeULEB128 - Compute the number of bytes required for an unsigned leb128
+/// value.
+unsigned AsmPrinter::SizeULEB128(unsigned Value) {
+ unsigned Size = 0;
+ do {
+Value >>= 7;
+Size += sizeof(int8_t);
+ } while (Value);
+ return Size;
+}
+
+/// PrintSLEB128 - Print a series of hexidecimal values (separated by commas)
+/// representing a signed leb128 value.
+void AsmPrinter::PrintSLEB128(int Value) const {
+ int Sign = Value >> (8 * sizeof(Value) - 1);
+ bool IsMore;
+
+ do {
+unsigned Byte = Value & 0x7f;
+Value >>= 7;
+IsMore = Value != Sign || ((Byte ^ Sign) & 0x40) != 0;
+if (IsMore) Byte |= 0x80;
+O << "0x" << std::hex << Byte << std::dec;
+if (IsMore) O << ", ";
+ } while (IsMore);
+}
+
+/// SizeSLEB128 - Compute the number of bytes required for a signed leb128
+/// value.
+unsigned AsmPrinter::SizeSLEB128(int Value) {
+ unsigned Size = 0;
+ int Sign = Value >> (8 * sizeof(Value) - 1);
+ bool IsMore;
+
+ do {
+unsigned Byte = Value & 0x7f;
+Value >>= 7;
+IsMore = Value != Sign || ((Byte ^ Sign) & 0x40) != 0;
+Size += sizeof(int8_t);
+ } while (IsMore);
+ return Size;
+}
+
+//======//
+// Emission and print routines
+//
+
+/// PrintHex - Print a value as a hexidecimal value.
+///
+void AsmPrinter::PrintHex(int Value) const {
+ O << "0x" << std::hex << Value << std::dec;
+}
+
+/// EOL - Print a newline character to asm stream. If a comment is present
+/// then it will be printed first. Comments should not contain '\n'.
+void AsmPrinter::EOL(const std::string &Comment) const {
+ if (AsmVerbose && !Comment.empty()) {
+O << "\t"
+ << TAI->getCommentString()
+ << " "
+ << Comment;
+ }
+ O << "\n";
+}
+
+/// EmitULEB128Bytes - Emit an assembler byte data directive to compose an
+/// unsigned leb128 value.
+void AsmPrinter::EmitULEB128Bytes(unsigned Value) const {
+ if (TAI->hasLEB128()) {
+O << "\t.uleb128\t"
+ << Value;
+ } else {
+O << TAI->getData8bitsDirective();
+PrintULEB128(Value);
+ }
+}
+
+/// EmitSLEB128Bytes - print an assembler byte data directive to compose a
+/// signed leb128 value.
+void AsmPrinter::EmitSLEB128Bytes(int Value) const {
+ if (TAI->hasLEB128()) {
+O << "\t.sleb128\t"
+ << Value;
+ } else {
+O << TAI->getData8bitsDirective();
+PrintSLEB128(Value);
+ }
+}
+
+/// EmitInt8 - Emit a byte directive and value.
+///
+void AsmPrinter::EmitInt8(int Value) const {
+ O << TAI->getData8bitsDirective();
+ PrintHex(Value & 0xFF);
+}
+
+/// EmitInt16 - Emit a short directive and value.
+///
+void AsmPrinter::EmitInt16(int Value) const {
+ O << TAI->getData16bitsDirective();
+ PrintHex(Value & 0x);
+}
+
+/// EmitInt32 - Emit a long directive and value.
+///
+void AsmPrinter::EmitInt32(int Value) const {
+ O << TAI->getData32bitsDirective();
+ PrintHex(Value);
+}
+
+/// EmitInt64 - Emit a long long directive and value.
+///
+void AsmPrinter::EmitInt64(uint64_t Value) const {
+ if (TAI->getData64bitsDirective()) {
+O << TAI->getData64bitsDirective();
+PrintHex(Value);
+ } else {
+if (TM.ge
[llvm-commits] CVS: llvm/include/llvm/CodeGen/AsmPrinter.h
Changes in directory llvm/include/llvm/CodeGen: AsmPrinter.h updated: 1.59 -> 1.60 --- Log message: Migrate print routines to asm to be shared by exception handling. --- Diffs of the changes: (+62 -0) AsmPrinter.h | 62 +++ 1 files changed, 62 insertions(+) Index: llvm/include/llvm/CodeGen/AsmPrinter.h diff -u llvm/include/llvm/CodeGen/AsmPrinter.h:1.59 llvm/include/llvm/CodeGen/AsmPrinter.h:1.60 --- llvm/include/llvm/CodeGen/AsmPrinter.h:1.59 Wed Jan 24 07:12:32 2007 +++ llvm/include/llvm/CodeGen/AsmPrinter.h Thu Jan 25 09:12:02 2007 @@ -175,6 +175,68 @@ bool EmitSpecialLLVMGlobal(const GlobalVariable *GV); public: + //===--===// +/// LEB 128 number encoding. + +/// PrintULEB128 - Print a series of hexidecimal values(separated by commas) +/// representing an unsigned leb128 value. +void PrintULEB128(unsigned Value) const; + +/// SizeULEB128 - Compute the number of bytes required for an unsigned +/// leb128 value. +static unsigned SizeULEB128(unsigned Value); + +/// PrintSLEB128 - Print a series of hexidecimal values(separated by commas) +/// representing a signed leb128 value. +void PrintSLEB128(int Value) const; + +/// SizeSLEB128 - Compute the number of bytes required for a signed leb128 +/// value. +static unsigned SizeSLEB128(int Value); + + //===--===// +// Emission and print routines +// + +/// PrintHex - Print a value as a hexidecimal value. +/// +void PrintHex(int Value) const; + +/// EOL - Print a newline character to asm stream. If a comment is present +/// then it will be printed first. Comments should not contain '\n'. +void EOL(const std::string &Comment) const; + +/// EmitULEB128Bytes - Emit an assembler byte data directive to compose an +/// unsigned leb128 value. +void EmitULEB128Bytes(unsigned Value) const; + +/// EmitSLEB128Bytes - print an assembler byte data directive to compose a +/// signed leb128 value. +void EmitSLEB128Bytes(int Value) const; + +/// EmitInt8 - Emit a byte directive and value. +/// +void EmitInt8(int Value) const; + +/// EmitInt16 - Emit a short directive and value. +/// +void EmitInt16(int Value) const; + +/// EmitInt32 - Emit a long directive and value. +/// +void EmitInt32(int Value) const; + +/// EmitInt64 - Emit a long long directive and value. +/// +void EmitInt64(uint64_t Value) const; + +/// EmitString - Emit a string with quotes and a null terminator. +/// Special characters are emitted properly. +/// \literal (Eg. '\t') \endliteral +void EmitString(const std::string &String) const; + + //===--===// + /// EmitAlignment - Emit an alignment directive to the specified power of /// two boundary. For example, if you pass in 3 here, you will get an 8 /// byte alignment. If a global value is specified, and if that global has ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.114 -> 1.115
---
Log message:
1. Remove dwarf-verbose option (now asm-verbose.)
2. Clean up end of lines.
---
Diffs of the changes: (+24 -36)
DwarfWriter.cpp | 60 ++--
1 files changed, 24 insertions(+), 36 deletions(-)
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.114
llvm/lib/CodeGen/DwarfWriter.cpp:1.115
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.114 Thu Jan 25 09:12:02 2007
+++ llvm/lib/CodeGen/DwarfWriter.cppThu Jan 25 09:45:58 2007
@@ -36,10 +36,6 @@
using namespace llvm;
using namespace llvm::dwarf;
-static cl::opt
-DwarfVerbose("dwarf-verbose", cl::Hidden,
- cl::desc("Add comments to Dwarf directives."));
-
namespace llvm {
//===--===//
@@ -1815,7 +1811,7 @@
unsigned AbbrevNumber = Die->getAbbrevNumber();
const DIEAbbrev *Abbrev = Abbreviations[AbbrevNumber - 1];
-O << "\n";
+Asm->EOL("");
// Emit the code (index) for the abbreviation.
Asm->EmitULEB128Bytes(AbbrevNumber);
@@ -2045,7 +2041,7 @@
Asm->EmitInt8(0); Asm->EOL("Extra Pad For GDB");
EmitLabel("info_end", Unit->getID());
-O << "\n";
+Asm->EOL("");
}
/// EmitAbbreviations - Emit the abbreviation section.
@@ -2070,12 +2066,12 @@
// Emit the abbreviations data.
Abbrev->Emit(*this);
-O << "\n";
+Asm->EOL("");
}
EmitLabel("abbrev_end", 0);
- O << "\n";
+ Asm->EOL("");
}
}
@@ -2156,12 +2152,7 @@
// Isolate current sections line info.
const std::vector &LineInfos = SectionSourceLines[j];
- if (DwarfVerbose) {
-O << "\t"
- << TAI->getCommentString() << " "
- << "Section "
- << SectionMap[j + 1].c_str() << "\n";
- }
+ Asm->EOL(std::string("Section ") + SectionMap[j + 1]);
// Dwarf assumes we start with first line of first source file.
unsigned Source = 1;
@@ -2173,16 +2164,13 @@
unsigned LabelID = DebugInfo->MappedLabel(LineInfo.getLabelID());
if (!LabelID) continue;
-if (DwarfVerbose) {
- unsigned SourceID = LineInfo.getSourceID();
- const SourceFileInfo &SourceFile = SourceFiles[SourceID];
- unsigned DirectoryID = SourceFile.getDirectoryID();
- O << "\t"
-<< TAI->getCommentString() << " "
-<< Directories[DirectoryID]
-<< SourceFile.getName() << ":"
-<< LineInfo.getLine() << "\n";
-}
+unsigned SourceID = LineInfo.getSourceID();
+const SourceFileInfo &SourceFile = SourceFiles[SourceID];
+unsigned DirectoryID = SourceFile.getDirectoryID();
+Asm->EOL(Directories[DirectoryID]
+ + SourceFile.getName()
+ + ":"
+ + utostr_32(LineInfo.getLine()));
// Define the line address.
Asm->EmitInt8(0); Asm->EOL("Extended Op");
@@ -2230,13 +2218,13 @@
// Mark end of matrix.
Asm->EmitInt8(0); Asm->EOL("DW_LNE_end_sequence");
- Asm->EmitULEB128Bytes(1); O << "\n";
- Asm->EmitInt8(1); O << "\n";
+ Asm->EmitULEB128Bytes(1); Asm->EOL("");
+ Asm->EmitInt8(1); Asm->EOL("");
}
EmitLabel("line_end", 0);
-O << "\n";
+Asm->EOL("");
}
/// EmitInitialDebugFrame - Emit common frame info into a debug frame
section.
@@ -2279,7 +2267,7 @@
Asm->EmitAlignment(2);
EmitLabel("frame_common_end", 0);
-O << "\n";
+Asm->EOL("");
}
/// EmitFunctionDebugFrame - Emit per function frame info into a debug frame
@@ -2313,7 +2301,7 @@
Asm->EmitAlignment(2);
EmitLabel("frame_end", SubprogramCount);
-O << "\n";
+Asm->EOL("");
}
/// EmitDebugPubNames - Emit visible names into a debug pubnames section.
@@ -2353,7 +2341,7 @@
Asm->EmitInt32(0); Asm->EOL("End Mark");
EmitLabel("pubnames_end", Unit->getID());
-O << "\n";
+Asm->EOL("");
}
/// EmitDebugStr - Emit visible names into a debug str section.
@@ -2371,10 +2359,10 @@
EmitLabel("string", StringID);
// Emit the string itself.
const std::string &String = StringPool[StringID];
-Asm->EmitString(String); O << "\n";
+Asm->EmitString(String); Asm->EOL("");
}
- O << "\n";
+ Asm->EOL("");
}
}
@@ -2384,7 +2372,7 @@
// Start the dwarf loc section.
Asm->SwitchToDataSection(TAI->getDwarfLocSection());
-O << "\n";
+Asm->EOL("");
}
/// EmitDebugARanges - Emit visible names into a debug aranges section.
@@ -2419,7 +2407,7 @@
Asm->EmitInt32(0); Asm->EOL("EOM (1)");
Asm->EmitInt32(0); Asm->EOL("EOM (2)");
-O << "\n";
+Asm->EOL("");
#endif
}
@@
[llvm-commits] CVS: llvm/lib/Transforms/IPO/ExtractFunction.cpp
Changes in directory llvm/lib/Transforms/IPO:
ExtractFunction.cpp updated: 1.14 -> 1.15
---
Log message:
Make llvm-extract preserve the callingconv of prototypes in the extracted
code.
---
Diffs of the changes: (+1 -0)
ExtractFunction.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Transforms/IPO/ExtractFunction.cpp
diff -u llvm/lib/Transforms/IPO/ExtractFunction.cpp:1.14
llvm/lib/Transforms/IPO/ExtractFunction.cpp:1.15
--- llvm/lib/Transforms/IPO/ExtractFunction.cpp:1.14Fri Oct 20 16:35:41 2006
+++ llvm/lib/Transforms/IPO/ExtractFunction.cpp Thu Jan 25 11:38:26 2007
@@ -70,6 +70,7 @@
Function *New = new Function(I->getFunctionType(),
GlobalValue::ExternalLinkage,
I->getName());
+ New->setCallingConv(I->getCallingConv());
I->setName(""); // Remove Old name
// If it's not the named function, delete the body of the function
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.3 -> 1.4
---
Log message:
Doh. Skip JT branches.
---
Diffs of the changes: (+2 -1)
ARMConstantIslandPass.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.3
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.4
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.3 Wed Jan 24 21:12:46 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Thu Jan 25 13:43:52 2007
@@ -238,7 +238,8 @@
unsigned Scale = 1;
int UOpc = Opc;
switch (Opc) {
-default: break; // Ignore JT branches
+default:
+ continue; // Ignore JT branches
case ARM::Bcc:
isCond = true;
UOpc = ARM::B;
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.47 -> 1.48
---
Log message:
Fix elf object definition.
---
Diffs of the changes: (+1 -1)
ARMAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.47
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.48
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.47 Wed Jan 24 21:07:27 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Jan 25 14:11:04 2007
@@ -725,7 +725,7 @@
if (const char *Directive = TAI->getHiddenDirective())
O << Directive << name << "\n";
if (Subtarget->isTargetELF())
- O << "\t.type " << name << ",@object\n";
+ O << "\t.type " << name << ",%object\n";
if (C->isNullValue()) {
if (I->hasExternalLinkage()) {
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[llvm-commits] [patch] Intruction Constraint DestReg!=SrcReg (for review)
This patch implements the instruction constraint DestReg!=SrcReg. It
is needed by ARM backend.
A sample of use of this constraint is following:
class RegConstraint {
string Constraints = C;
}
// AI_orr - Defines a (op r, r) pattern.
class AI_orr
: AI<(ops GPR:$dst, GPR:$a, GPR:$b),
!strconcat(opc, " $dst, $a, $b"),
[(set GPR:$dst, (opnode GPR:$a, GPR:$b))]>,
RegConstraint<"$dst != $a">;
Lauro
Index: include/llvm/Target/TargetInstrInfo.h
===
RCS file: /var/cvs/llvm/llvm/include/llvm/Target/TargetInstrInfo.h,v
retrieving revision 1.110
diff -u -r1.110 TargetInstrInfo.h
--- include/llvm/Target/TargetInstrInfo.h 15 Dec 2006 06:37:08 - 1.110
+++ include/llvm/Target/TargetInstrInfo.h 25 Jan 2007 21:20:32 -
@@ -94,9 +94,10 @@
const unsigned M_PREDICATE_OPERAND = 1 << 1;
namespace TOI {
- // Operand constraints: only "tied_to" for now.
+ // Operand constraints: only "tied_to" and "not_tied_to" for now.
enum OperandConstraint {
-TIED_TO = 0 // Must be allocated the same register as.
+TIED_TO = 0, // Must be allocated the same register as.
+NOT_TIED_TO = 1 // Must not be allocated the same register as.
};
}
@@ -142,9 +143,22 @@
return -1;
}
- /// findTiedToSrcOperand - Returns the operand that is tied to the specified
+ /// findTiedToOperand - Returns the operand that is tied to the specified
/// dest operand. Returns -1 if there isn't one.
- int findTiedToSrcOperand(unsigned OpNum) const;
+ int findTiedToOperand(unsigned OpNum) const;
+
+ /// findTiedToOperand - Returns the operand that is "not tied" to the
+ /// specified operand. Returns -1 if there isn't one.
+ int findNotTiedToOperand(unsigned OpNum) const;
+
+ /// isNotTiedToAnyOperand - Returns true if the operand is "not tied" to any
+ /// operand.
+ bool isNotTiedToAnyOperand(unsigned OpNum) const {
+if (findNotTiedToOperand(OpNum) != -1)
+ return true;
+else
+ return false;
+ }
};
Index: lib/CodeGen/LiveIntervalAnalysis.cpp
===
RCS file: /var/cvs/llvm/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp,v
retrieving revision 1.204
diff -u -r1.204 LiveIntervalAnalysis.cpp
--- lib/CodeGen/LiveIntervalAnalysis.cpp 19 Dec 2006 22:41:21 - 1.204
+++ lib/CodeGen/LiveIntervalAnalysis.cpp 25 Jan 2007 21:20:33 -
@@ -441,6 +441,20 @@
DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
+ std::vector IsKillAfterInstr(vi.Kills.size());
+
+ for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i){
+const TargetInstrDescriptor *instrDescriptor =
+ vi.Kills[i]->getInstrDescriptor();
+IsKillAfterInstr[i] = false;
+for (unsigned j = 0, f = vi.Kills[i]->getNumOperands(); j != f; ++j){
+ MachineOperand op = vi.Kills[i]->getOperand(j);
+ if (op.isRegister() && op.isUse() && (op.getReg() == interval.reg) &&
+ instrDescriptor->isNotTiedToAnyOperand(j))
+IsKillAfterInstr[i] = true;
+}
+ }
+
// Virtual registers may be defined multiple times (due to phi
// elimination and 2-addr elimination). Much of what we do only has to be
// done once for the vreg. We use an empty interval to detect the first
@@ -467,9 +481,10 @@
// FIXME: what about dead vars?
unsigned killIdx;
if (vi.Kills[0] != mi)
-killIdx = getUseIndex(getInstructionIndex(vi.Kills[0]))+1;
+killIdx = getUseIndex(getInstructionIndex(vi.Kills[0])) +
+ (IsKillAfterInstr[0]?2:1);
else
-killIdx = defIndex+1;
+killIdx = defIndex + (IsKillAfterInstr[0]?2:1);
// If the kill happens after the definition, we have an intra-block
// live range.
@@ -514,8 +529,8 @@
for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i) {
MachineInstr *Kill = vi.Kills[i];
LiveRange LR(getMBBStartIdx(Kill->getParent()),
- getUseIndex(getInstructionIndex(Kill))+1,
- ValNum);
+ getUseIndex(getInstructionIndex(Kill)) +
+ (IsKillAfterInstr[i]?2:1), ValNum);
interval.addRange(LR);
DOUT << " +" << LR;
}
@@ -574,7 +589,8 @@
// Remove the old range that we now know has an incorrect number.
MachineInstr *Killer = vi.Kills[0];
unsigned Start = getMBBStartIdx(Killer->getParent());
-unsigned End = getUseIndex(getInstructionIndex(Killer))+1;
+unsigned End = getUseIndex(getInstructionIndex(Killer)) +
+ (IsKillAfterInstr[0]?2:1);
DOUT << "Removing [" << Start << "," << End << "] from: ";
interval.print(DOUT, mri_); DOUT << "\n";
interval.removeRange(Start, End);
Index: lib/CodeGen/RegAllocLocal.cpp
===
RCS file: /var/cvs/llvm/llvm/lib/CodeGen/RegAllocLocal.cpp,v
retrievin
[llvm-commits] CVS: llvm/test/CodeGen/ARM/fcopysign.ll
Changes in directory llvm/test/CodeGen/ARM:
fcopysign.ll updated: 1.4 -> 1.5
---
Log message:
fix fcopysign test
---
Diffs of the changes: (+4 -4)
fcopysign.ll |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/test/CodeGen/ARM/fcopysign.ll
diff -u llvm/test/CodeGen/ARM/fcopysign.ll:1.4
llvm/test/CodeGen/ARM/fcopysign.ll:1.5
--- llvm/test/CodeGen/ARM/fcopysign.ll:1.4 Fri Jan 19 03:20:23 2007
+++ llvm/test/CodeGen/ARM/fcopysign.ll Thu Jan 25 16:11:02 2007
@@ -1,7 +1,7 @@
-; RUN: llvm-as < fcopysign.ll | llc -march=arm &&
-; RUN: llvm-as < fcopysign.ll | llc -march=arm | grep bic | wc -l | grep 2 &&
-; RUN: llvm-as < fcopysign.ll | llc -march=arm -mattr=+v6,+vfp2 &&
-; RUN: llvm-as < fcopysign.ll | llc -march=arm -mattr=+v6,+vfp2 | grep fneg |
wc -l | grep 2
+; RUN: llvm-as < %s | llc -march=arm &&
+; RUN: llvm-as < %s | llc -march=arm | grep bic | wc -l | grep 2 &&
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 &&
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fneg | wc -l |
grep 2
define float %test1(float %x, double %y) {
%tmp = fpext float %x to double
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[llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
Changes in directory llvm/lib/CodeGen:
PrologEpilogInserter.cpp updated: 1.66 -> 1.67
---
Log message:
Added a MRegisterInfo hook that tells PEI the target is responsible for
rounding the stack frame to a multiple of stack alignment.
---
Diffs of the changes: (+3 -2)
PrologEpilogInserter.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.66
llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.67
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.66 Tue Jan 23 03:36:03 2007
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp Thu Jan 25 16:12:41 2007
@@ -389,11 +389,12 @@
// Round up the size to a multiple of the alignment, but only if there are
// calls or alloca's in the function. This ensures that any calls to
// subroutines have their stack frames suitable aligned.
- if (FFI->hasCalls() || FFI->hasVarSizedObjects()) {
+ const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
+ if (!RegInfo->targetHandlesStackFrameRounding() &&
+ (FFI->hasCalls() || FFI->hasVarSizedObjects())) {
// When we have no frame pointer, we reserve argument space for call sites
// in the function immediately on entry to the current function. This
// eliminates the need for add/sub sp brackets around call sites.
-const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
if (!RegInfo->hasFP(Fn))
Offset += FFI->getMaxCallFrameSize();
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[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.88 -> 1.89
---
Log message:
Added a MRegisterInfo hook that tells PEI the target is responsible for
rounding the stack frame to a multiple of stack alignment.
---
Diffs of the changes: (+6 -0)
MRegisterInfo.h |6 ++
1 files changed, 6 insertions(+)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.88
llvm/include/llvm/Target/MRegisterInfo.h:1.89
--- llvm/include/llvm/Target/MRegisterInfo.h:1.88 Wed Jan 24 12:45:12 2007
+++ llvm/include/llvm/Target/MRegisterInfo.hThu Jan 25 16:12:41 2007
@@ -367,6 +367,12 @@
return 0;
}
+ /// targetHandlesStackFrameRounding - Returns true if the target is
responsible
+ /// for rounding up the stack frame (probably at emitPrologue time).
+ virtual bool targetHandlesStackFrameRounding() const {
+return false;
+ }
+
/// hasFP - Return true if the specified function should have a dedicated
frame
/// pointer register. For most targets this is true only if the function has
/// variable sized allocas or if frame pointer elimination is disabled.
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.97 -> 1.98
PPCRegisterInfo.h updated: 1.23 -> 1.24
---
Log message:
- Tell PEI that PPC will handle stack frame rounding itself.
- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
---
Diffs of the changes: (+7 -7)
PPCRegisterInfo.cpp |9 ++---
PPCRegisterInfo.h |5 +
2 files changed, 7 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.97
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.98
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.97Wed Jan 24 12:45:13 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Jan 25 16:25:04 2007
@@ -451,9 +451,6 @@
// Determine the maximum call stack size. maxCallFrameSize may be
// less than the minimum.
unsigned maxCallFrameSize = MFI->getMaxCallFrameSize();
- unsigned getMinCallFrameSize =
-PPCFrameInfo::getMinCallFrameSize(LP64);
- maxCallFrameSize = std::max(maxCallFrameSize, getMinCallFrameSize);
// Get the total frame size.
unsigned FrameSize = MFI->getStackSize();
@@ -712,11 +709,9 @@
// Get the alignments provided by the target, and the maximum alignment
// (if any) of the fixed frame objects.
- unsigned TargetAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
unsigned MaxAlign = MFI->getMaxAlignment();
- unsigned Align = std::max(TargetAlign, MaxAlign);
- assert(isPowerOf2_32(Align) && "Alignment is not power of 2");
- unsigned AlignMask = Align - 1; //
+ unsigned TargetAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
+ unsigned AlignMask = TargetAlign - 1; //
// If we are a leaf function, and use up to 224 bytes of stack space,
// don't have a frame pointer, calls, or dynamic alloca then we do not need
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.23
llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.24
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.23 Wed Jan 24 12:45:13 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Thu Jan 25 16:25:04 2007
@@ -58,6 +58,11 @@
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ /// targetHandlesStackFrameRounding - Returns true if the target is
+ /// responsible for rounding up the stack frame (probably at emitPrologue
+ /// time).
+ bool targetHandlesStackFrameRounding() const { return true; }
+
bool hasFP(const MachineFunction &MF) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
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[llvm-commits] CVS: llvm/include/llvm/Pass.h
Changes in directory llvm/include/llvm:
Pass.h updated: 1.76 -> 1.77
---
Log message:
Remove dead code.
---
Diffs of the changes: (+0 -7)
Pass.h |7 ---
1 files changed, 7 deletions(-)
Index: llvm/include/llvm/Pass.h
diff -u llvm/include/llvm/Pass.h:1.76 llvm/include/llvm/Pass.h:1.77
--- llvm/include/llvm/Pass.h:1.76 Wed Jan 17 14:30:17 2007
+++ llvm/include/llvm/Pass.hThu Jan 25 16:27:00 2007
@@ -46,9 +46,7 @@
class AnalysisUsage;
class PassInfo;
class ImmutablePass;
-template class PassManagerT;
class BasicBlockPassManager;
-class FunctionPassManagerT;
class ModulePassManager;
class PMStack;
class AnalysisResolver;
@@ -190,11 +188,6 @@
template
AnalysisType &getAnalysisID(const PassInfo *PI) const;
-private:
- template friend class PassManagerT;
- friend class ModulePassManager;
- friend class FunctionPassManagerT;
- friend class BasicBlockPassManager;
};
inline std::ostream &operator<<(std::ostream &OS, const Pass &P) {
___
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[llvm-commits] CVS: llvm/test/CodeGen/PowerPC/Frames-align.ll
Changes in directory llvm/test/CodeGen/PowerPC: Frames-align.ll updated: 1.3 -> 1.4 --- Log message: Fix test case. --- Diffs of the changes: (+1 -1) Frames-align.ll |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CodeGen/PowerPC/Frames-align.ll diff -u llvm/test/CodeGen/PowerPC/Frames-align.ll:1.3 llvm/test/CodeGen/PowerPC/Frames-align.ll:1.4 --- llvm/test/CodeGen/PowerPC/Frames-align.ll:1.3 Wed Dec 20 18:01:42 2006 +++ llvm/test/CodeGen/PowerPC/Frames-align.ll Thu Jan 25 16:28:32 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'rlwinm r0, r1, 0, 22, 31' && -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'subfic r0, r0, -17408' && +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep 'subfic r0, r0, -16448' && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | grep 'rldicl r0, r1, 0, 54' ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h
On 25-Jan-07, at 06:25 PM, Evan Cheng wrote: Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.97 llvm/lib/ Target/PowerPC/PPCRegisterInfo.cpp:1.98 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.97 Wed Jan 24 12:45:13 2007 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Jan 25 16:25:04 2007 @@ -451,9 +451,6 @@ // Determine the maximum call stack size. maxCallFrameSize may be // less than the minimum. unsigned maxCallFrameSize = MFI->getMaxCallFrameSize(); - unsigned getMinCallFrameSize = -PPCFrameInfo::getMinCallFrameSize(LP64); - maxCallFrameSize = std::max(maxCallFrameSize, getMinCallFrameSize); // Get the total frame size. unsigned FrameSize = MFI->getStackSize(); Why did you remove this? -- Jim smime.p7s Description: S/MIME cryptographic signature ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h
NVM. I forgot this was redundant. -- Jim On 25-Jan-07, at 06:40 PM, Jim Laskey wrote: On 25-Jan-07, at 06:25 PM, Evan Cheng wrote: Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.97 llvm/lib/ Target/PowerPC/PPCRegisterInfo.cpp:1.98 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.97 Wed Jan 24 12:45:13 2007 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Jan 25 16:25:04 2007 @@ -451,9 +451,6 @@ // Determine the maximum call stack size. maxCallFrameSize may be // less than the minimum. unsigned maxCallFrameSize = MFI->getMaxCallFrameSize(); - unsigned getMinCallFrameSize = -PPCFrameInfo::getMinCallFrameSize(LP64); - maxCallFrameSize = std::max(maxCallFrameSize, getMinCallFrameSize); // Get the total frame size. unsigned FrameSize = MFI->getStackSize(); Why did you remove this? -- Jim ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits smime.p7s Description: S/MIME cryptographic signature ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Changes in directory llvm/lib/Target/PowerPC: PPCRegisterInfo.cpp updated: 1.98 -> 1.99 --- Log message: Fix comment. --- Diffs of the changes: (+1 -2) PPCRegisterInfo.cpp |3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.98 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.99 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.98Thu Jan 25 16:25:04 2007 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Jan 25 16:48:25 2007 @@ -448,8 +448,7 @@ // Determine whether 64-bit pointers are used. bool LP64 = Subtarget.isPPC64(); - // Determine the maximum call stack size. maxCallFrameSize may be - // less than the minimum. + // Get the maximum call stack size. unsigned maxCallFrameSize = MFI->getMaxCallFrameSize(); // Get the total frame size. unsigned FrameSize = MFI->getStackSize(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.40 -> 1.41
---
Log message:
I am an idiot.
---
Diffs of the changes: (+1 -1)
ARMRegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.40
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.41
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.40Tue Jan 23 03:37:21 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Thu Jan 25 17:18:16 2007
@@ -984,7 +984,7 @@
AFI->getGPRCalleeSavedArea2Size() +
AFI->getDPRCalleeSavedAreaSize());
if (isThumb)
- emitSPUpdate(MBB, MBBI, -NumBytes, isThumb, TII);
+ emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII);
else {
if (STI.isTargetDarwin()) {
NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.4 -> 1.5
---
Log message:
Add comment, fix typo, reduce memory usage, etc.
---
Diffs of the changes: (+14 -9)
ARMConstantIslandPass.cpp | 23 ++-
1 files changed, 14 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.4
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.5
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.4 Thu Jan 25 13:43:52 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Thu Jan 25 17:18:59 2007
@@ -79,14 +79,14 @@
/// opcode.
struct ImmBranch {
MachineInstr *MI;
- bool isCond;
+ unsigned MaxDisp : 31;
+ bool isCond : 1;
int UncondBr;
- unsigned MaxDisp;
- ImmBranch(MachineInstr *mi, bool cond, int ubr, unsigned maxdisp)
-: MI(mi), isCond(cond), UncondBr(ubr), MaxDisp(maxdisp) {}
+ ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
+: MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
};
-/// Branches - Keep track of all the immediate branche instructions.
+/// Branches - Keep track of all the immediate branch instructions.
///
std::vector ImmBranches;
@@ -107,7 +107,7 @@
void SplitBlockBeforeInstr(MachineInstr *MI);
void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
bool HandleConstantPoolUser(MachineFunction &Fn, CPUser &U);
-bool ShortenImmediateBranch(MachineFunction &Fn, ImmBranch &Br);
+bool FixUpImmediateBranch(MachineFunction &Fn, ImmBranch &Br);
unsigned GetInstSize(MachineInstr *MI) const;
unsigned GetOffsetOf(MachineInstr *MI) const;
@@ -154,7 +154,7 @@
for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
MadeChange |= HandleConstantPoolUser(Fn, CPUsers[i]);
for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
- MadeChange |= ShortenImmediateBranch(Fn, ImmBranches[i]);
+ MadeChange |= FixUpImmediateBranch(Fn, ImmBranches[i]);
} while (MadeChange);
BBSizes.clear();
@@ -260,7 +260,7 @@
break;
}
unsigned MaxDisp = (1 << (Bits-1)) * Scale;
-ImmBranches.push_back(ImmBranch(I, isCond, UOpc, MaxDisp));
+ImmBranches.push_back(ImmBranch(I, MaxDisp, isCond, UOpc));
}
// Scan the instructions for constant pool operands.
@@ -560,8 +560,13 @@
return true;
}
+/// FixUpImmediateBranch - Fix up immediate branches whose destination is too
+/// far away to fit in its displacement field. If it is a conditional branch,
+/// then it is converted to an inverse conditional branch + an unconditional
+/// branch to the destination. If it is an unconditional branch, then it is
+/// converted to a branch to a branch.
bool
-ARMConstantIslands::ShortenImmediateBranch(MachineFunction &Fn, ImmBranch &Br)
{
+ARMConstantIslands::FixUpImmediateBranch(MachineFunction &Fn, ImmBranch &Br) {
MachineInstr *MI = Br.MI;
MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/DCE.cpp
Changes in directory llvm/lib/Transforms/Scalar:
DCE.cpp updated: 1.61 -> 1.62
---
Log message:
Inherit BasicBlockPass directly from Pass.
---
Diffs of the changes: (+1 -1)
DCE.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/DCE.cpp
diff -u llvm/lib/Transforms/Scalar/DCE.cpp:1.61
llvm/lib/Transforms/Scalar/DCE.cpp:1.62
--- llvm/lib/Transforms/Scalar/DCE.cpp:1.61 Tue Dec 19 15:40:18 2006
+++ llvm/lib/Transforms/Scalar/DCE.cpp Thu Jan 25 17:23:25 2007
@@ -53,7 +53,7 @@
RegisterPass X("die", "Dead Instruction Elimination");
}
-FunctionPass *llvm::createDeadInstEliminationPass() {
+Pass *llvm::createDeadInstEliminationPass() {
return new DeadInstElimination();
}
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[llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h
Changes in directory llvm/include/llvm/Transforms:
Scalar.h updated: 1.69 -> 1.70
---
Log message:
Inherit BasicBlockPass directly from Pass.
---
Diffs of the changes: (+3 -3)
Scalar.h |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/Transforms/Scalar.h
diff -u llvm/include/llvm/Transforms/Scalar.h:1.69
llvm/include/llvm/Transforms/Scalar.h:1.70
--- llvm/include/llvm/Transforms/Scalar.h:1.69 Fri Oct 13 15:53:50 2006
+++ llvm/include/llvm/Transforms/Scalar.h Thu Jan 25 17:23:25 2007
@@ -19,8 +19,8 @@
namespace llvm {
-class ModulePass;
class FunctionPass;
+class Pass;
class GetElementPtrInst;
class PassInfo;
class TerminatorInst;
@@ -52,7 +52,7 @@
// without modifying the CFG of the function. It is a BasicBlockPass, so it
// runs efficiently when queued next to other BasicBlockPass's.
//
-FunctionPass *createDeadInstEliminationPass();
+Pass *createDeadInstEliminationPass();
//===--===//
//
@@ -249,7 +249,7 @@
//
// AU.addRequiredID(LowerAllocationsID);
//
-FunctionPass *createLowerAllocationsPass(bool LowerMallocArgToInteger = false);
+Pass *createLowerAllocationsPass(bool LowerMallocArgToInteger = false);
extern const PassInfo *LowerAllocationsID;
//===--===//
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[llvm-commits] CVS: llvm/include/llvm/Pass.h
Changes in directory llvm/include/llvm:
Pass.h updated: 1.77 -> 1.78
---
Log message:
Inherit BasicBlockPass directly from Pass.
---
Diffs of the changes: (+1 -1)
Pass.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/Pass.h
diff -u llvm/include/llvm/Pass.h:1.77 llvm/include/llvm/Pass.h:1.78
--- llvm/include/llvm/Pass.h:1.77 Thu Jan 25 16:27:00 2007
+++ llvm/include/llvm/Pass.hThu Jan 25 17:23:25 2007
@@ -291,7 +291,7 @@
/// other basic block in the function.
/// 3. Optimizations conform to all of the constraints of FunctionPasses.
///
-class BasicBlockPass : public FunctionPass {
+class BasicBlockPass : public Pass {
public:
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary per-module initialization.
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[llvm-commits] CVS: llvm/lib/Transforms/Utils/LowerAllocations.cpp
Changes in directory llvm/lib/Transforms/Utils:
LowerAllocations.cpp updated: 1.70 -> 1.71
---
Log message:
Inherit BasicBlockPass directly from Pass.
---
Diffs of the changes: (+1 -1)
LowerAllocations.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Transforms/Utils/LowerAllocations.cpp
diff -u llvm/lib/Transforms/Utils/LowerAllocations.cpp:1.70
llvm/lib/Transforms/Utils/LowerAllocations.cpp:1.71
--- llvm/lib/Transforms/Utils/LowerAllocations.cpp:1.70 Sun Jan 7 02:12:01 2007
+++ llvm/lib/Transforms/Utils/LowerAllocations.cpp Thu Jan 25 17:23:25 2007
@@ -73,7 +73,7 @@
// Publically exposed interface to pass...
const PassInfo *llvm::LowerAllocationsID = X.getPassInfo();
// createLowerAllocationsPass - Interface to this file...
-FunctionPass *llvm::createLowerAllocationsPass(bool LowerMallocArgToInteger) {
+Pass *llvm::createLowerAllocationsPass(bool LowerMallocArgToInteger) {
return new LowerAllocations(LowerMallocArgToInteger);
}
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.5 -> 1.6 --- Log message: Forgot to update this. --- Diffs of the changes: (+1 -1) ARMConstantIslandPass.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.5 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.6 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.5 Thu Jan 25 17:18:59 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Thu Jan 25 17:31:04 2007 @@ -613,7 +613,7 @@ Br.MI = &MBB->back(); BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB); unsigned MaxDisp = (Br.UncondBr == ARM::tB) ? (1<<10)*2 : (1<<23)*4; - ImmBranches.push_back(ImmBranch(&MBB->back(), false, Br.UncondBr, MaxDisp)); + ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); MI->eraseFromParent(); // Increase the size of MBB to account for the new unconditional branch. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Pass.h
Changes in directory llvm/include/llvm:
Pass.h updated: 1.78 -> 1.79
---
Log message:
Inherit FunctionPass directly from Pass.
---
Diffs of the changes: (+1 -1)
Pass.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/Pass.h
diff -u llvm/include/llvm/Pass.h:1.78 llvm/include/llvm/Pass.h:1.79
--- llvm/include/llvm/Pass.h:1.78 Thu Jan 25 17:23:25 2007
+++ llvm/include/llvm/Pass.hThu Jan 25 18:23:00 2007
@@ -247,7 +247,7 @@
/// 2. Optimizing a function does not cause the addition or removal of any
/// functions in the module
///
-class FunctionPass : public ModulePass {
+class FunctionPass : public Pass {
public:
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary per-module initialization.
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Re: [llvm-commits] [patch] Intruction Constraint DestReg!=SrcReg (for review)
Hi Lauro,
Thanks for taking a crack at this! Your work is much appreciated.
However, I have some comments. :-)
1. I think rather than adding a constraint that says a source operand
must not be assigned the same register as another. It would be better
if you add a constraint that says a source operand "can be killed at
issue cycle + n". The live range analysis current assumes every
source operand read is completed at issue cycle + 0 and write back
happens at issue cycle + 2. By changing the read latency to 2 you can
force a source operand to conflict with a destination operand.
2. Please write more comments. :-)
Thanks,
Evan
On Jan 25, 2007, at 1:54 PM, Lauro Ramos Venancio wrote:
> This patch implements the instruction constraint DestReg!=SrcReg. It
> is needed by ARM backend.
>
> A sample of use of this constraint is following:
>
> class RegConstraint {
> string Constraints = C;
> }
>
> // AI_orr - Defines a (op r, r) pattern.
> class AI_orr
> : AI<(ops GPR:$dst, GPR:$a, GPR:$b),
> !strconcat(opc, " $dst, $a, $b"),
> [(set GPR:$dst, (opnode GPR:$a, GPR:$b))]>,
>RegConstraint<"$dst != $a">;
>
>
> Lauro
>
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Re: [llvm-commits] InReg patch for review
Comments:
diff -r bdd0e76350e4 lib/Target/PowerPC/PPCISelLowering.cpp
--- a/lib/Target/PowerPC/PPCISelLowering.cppTue Jan 23 13:34:14 2007
+0300
+++ b/lib/Target/PowerPC/PPCISelLowering.cppTue Jan 23 01:12:46 2007
+0300
@@ -1360,9 +1360,10 @@ static SDOperand LowerCALL(SDOperand Op,
// On PPC64, promote integers to 64-bit values.
if (isPPC64 && Arg.getValueType() == MVT::i32) {
- unsigned ExtOp = ISD::ZERO_EXTEND;
- if (cast(Op.getOperand(5+2*i+1))->getValue())
-ExtOp = ISD::SIGN_EXTEND;
+ unsigned Flags =
+dyn_cast(Op.getOperand(5+2*i+1))->getValue();
+ unsigned ExtOp = (Flags & 1) ? ISD::SIGN_EXTEND :
ISD::ZERO_EXTEND;
+
Arg = DAG.getNode(ExtOp, MVT::i64, Arg);
}
Please use cast<> not dyn_cast<> here.
// Add one result value for each formal argument.
std::vector RetVals;
+ unsigned j = 0;
for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
I != E; ++I) {
MVT::ValueType VT = getValueType(I->getType());
+bool isInReg = FTy->paramHasAttr(++j,
FunctionType::InRegAttribute);
+unsigned Flags = (isInReg << 1);
+ // Handle regparm attribute
+ std::vector ArgInRegs(NumArgs, false);
+ if (!isVarArg) {
+for (unsigned i = 0; i(Op.getOperand(3+i))-
>getValue();
+ if ((Flags >> 1) & 1)
+ArgInRegs[i] = true;
+}
+ }
Please add getter / setter routines for these attributes.
In LowerFastCCArguments():
- if (ObjectVT == MVT::i64 && ObjIntRegs) {
-SDOperand ArgValue2 = DAG.getLoad(Op.Val->getValueType(i),
Root, FIN,
- NULL, 0);
-ArgValue = DAG.getNode(ISD::BUILD_PAIR, MVT::i64, ArgValue,
ArgValue2);
- } else
-ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN,
NULL, 0);
+ ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN,
NULL, 0);
+
I am not following. How are you passing i64 values? It has to take 2
registers, right?
-Entry.isSigned = false;
+Entry.isSigned = false; Entry.isInReg = false;
Args.push_back(Entry);
// Extend the unsigned i8 argument to be an int value for the
call.
Entry.Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32,
Op.getOperand(2));
Entry.Ty = IntPtrTy;
-Entry.isSigned = false;
+Entry.isSigned = false; Entry.isInReg = false;
Please separate each statement to its own line. :-)
The rest looks good! Thanks.
Evan
On Jan 23, 2007, at 5:13 AM, Anton Korobeynikov wrote:
> Hello, Everyone.
>
> Attached patch will implement "inreg" function argument attribute,
> which
> is used to tell backend "place this argument in register, if
> possible".
> The needed changes in x86 backend were made as well.
>
> This also allowed to merge C & StdCall CCs and Fast & FastCall CCs
> inside x86 backend.
>
> This patch is first step for supporting gcc's "regparm" function
> attribute.
>
> --
> With best regards, Anton Korobeynikov.
>
> Faculty of Mathematics & Mechanics, Saint Petersburg State University.
>
>
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[llvm-commits] CVS: llvm/include/llvm/CallGraphSCCPass.h
Changes in directory llvm/include/llvm:
CallGraphSCCPass.h updated: 1.8 -> 1.9
---
Log message:
Inherit CallGraphSCCPass directly from Pass.
---
Diffs of the changes: (+1 -1)
CallGraphSCCPass.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/CallGraphSCCPass.h
diff -u llvm/include/llvm/CallGraphSCCPass.h:1.8
llvm/include/llvm/CallGraphSCCPass.h:1.9
--- llvm/include/llvm/CallGraphSCCPass.h:1.8Tue Jan 23 15:52:35 2007
+++ llvm/include/llvm/CallGraphSCCPass.hThu Jan 25 18:47:38 2007
@@ -29,7 +29,7 @@
class CallGraph;
class PMStack;
-struct CallGraphSCCPass : public ModulePass {
+struct CallGraphSCCPass : public Pass {
/// doInitialization - This method is called before the SCC's of the program
/// has been processed, allowing the pass to do initialization as necessary.
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[llvm-commits] CVS: llvm/include/llvm/Transforms/IPO.h
Changes in directory llvm/include/llvm/Transforms: IPO.h updated: 1.46 -> 1.47 --- Log message: Inherit CallGraphSCCPass directly from Pass. --- Diffs of the changes: (+4 -3) IPO.h |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/include/llvm/Transforms/IPO.h diff -u llvm/include/llvm/Transforms/IPO.h:1.46 llvm/include/llvm/Transforms/IPO.h:1.47 --- llvm/include/llvm/Transforms/IPO.h:1.46 Thu Jul 20 12:48:05 2006 +++ llvm/include/llvm/Transforms/IPO.h Thu Jan 25 18:47:38 2007 @@ -21,6 +21,7 @@ class FunctionPass; class ModulePass; +class Pass; class Function; class BasicBlock; @@ -101,13 +102,13 @@ /// createFunctionInliningPass - Return a new pass object that uses a heuristic /// to inline direct function calls to small functions. /// -ModulePass *createFunctionInliningPass(); +Pass *createFunctionInliningPass(); //===--===// /// createPruneEHPass - Return a new pass object which transforms invoke /// instructions into calls, if the callee can _not_ unwind the stack. /// -ModulePass *createPruneEHPass(); +Pass *createPruneEHPass(); //===--===// /// createInternalizePass - This pass loops over all of the functions in the @@ -134,7 +135,7 @@ /// createArgumentPromotionPass - This pass promotes "by reference" arguments to /// be passed by value. /// -ModulePass *createArgumentPromotionPass(); +Pass *createArgumentPromotionPass(); //===--===// /// createIPConstantPropagationPass - This pass propagates constants from call ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/IPO/ArgumentPromotion.cpp InlineSimple.cpp PruneEH.cpp
Changes in directory llvm/lib/Transforms/IPO:
ArgumentPromotion.cpp updated: 1.33 -> 1.34
InlineSimple.cpp updated: 1.76 -> 1.77
PruneEH.cpp updated: 1.26 -> 1.27
---
Log message:
Inherit CallGraphSCCPass directly from Pass.
---
Diffs of the changes: (+3 -3)
ArgumentPromotion.cpp |2 +-
InlineSimple.cpp |2 +-
PruneEH.cpp |2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
diff -u llvm/lib/Transforms/IPO/ArgumentPromotion.cpp:1.33
llvm/lib/Transforms/IPO/ArgumentPromotion.cpp:1.34
--- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp:1.33 Sat Dec 30 23:48:39 2006
+++ llvm/lib/Transforms/IPO/ArgumentPromotion.cpp Thu Jan 25 18:47:38 2007
@@ -72,7 +72,7 @@
"Promote 'by reference' arguments to scalars");
}
-ModulePass *llvm::createArgumentPromotionPass() {
+Pass *llvm::createArgumentPromotionPass() {
return new ArgPromotion();
}
Index: llvm/lib/Transforms/IPO/InlineSimple.cpp
diff -u llvm/lib/Transforms/IPO/InlineSimple.cpp:1.76
llvm/lib/Transforms/IPO/InlineSimple.cpp:1.77
--- llvm/lib/Transforms/IPO/InlineSimple.cpp:1.76 Sun Nov 26 19:05:10 2006
+++ llvm/lib/Transforms/IPO/InlineSimple.cppThu Jan 25 18:47:38 2007
@@ -58,7 +58,7 @@
RegisterPass X("inline", "Function Integration/Inlining");
}
-ModulePass *llvm::createFunctionInliningPass() { return new SimpleInliner(); }
+Pass *llvm::createFunctionInliningPass() { return new SimpleInliner(); }
// CountCodeReductionForConstant - Figure out an approximation for how many
// instructions will be constant folded if the specified value is constant.
Index: llvm/lib/Transforms/IPO/PruneEH.cpp
diff -u llvm/lib/Transforms/IPO/PruneEH.cpp:1.26
llvm/lib/Transforms/IPO/PruneEH.cpp:1.27
--- llvm/lib/Transforms/IPO/PruneEH.cpp:1.26Tue Dec 19 16:09:18 2006
+++ llvm/lib/Transforms/IPO/PruneEH.cpp Thu Jan 25 18:47:38 2007
@@ -50,7 +50,7 @@
RegisterPass X("prune-eh", "Remove unused exception handling info");
}
-ModulePass *llvm::createPruneEHPass() { return new PruneEH(); }
+Pass *llvm::createPruneEHPass() { return new PruneEH(); }
bool PruneEH::runOnSCC(const std::vector &SCC) {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.6 -> 1.7
---
Log message:
Need to scan the function for branches even if there aren't any constants.
---
Diffs of the changes: (+2 -3)
ARMConstantIslandPass.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.6
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.7
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.6 Thu Jan 25 17:31:04 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Thu Jan 25 19:04:44 2007
@@ -122,9 +122,7 @@
}
bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
- // If there are no constants, there is nothing to do.
MachineConstantPool &MCP = *Fn.getConstantPool();
- if (MCP.isEmpty()) return false;
TII = Fn.getTarget().getInstrInfo();
TAI = Fn.getTarget().getTargetAsmInfo();
@@ -136,7 +134,8 @@
// Perform the initial placement of the constant pool entries. To start
with,
// we put them all at the end of the function.
std::vector CPEMIs;
- DoInitialPlacement(Fn, CPEMIs);
+ if (!MCP.isEmpty())
+DoInitialPlacement(Fn, CPEMIs);
/// The next UID to take is the first unused one.
NextUID = CPEMIs.size();
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[llvm-commits] CVS: llvm/include/llvm/CallGraphSCCPass.h
Changes in directory llvm/include/llvm: CallGraphSCCPass.h updated: 1.9 -> 1.10 --- Log message: Remove dead code. CallGraphSCCPass does not need to implement runOnModule(). It supports runOnSCC(). --- Diffs of the changes: (+0 -5) CallGraphSCCPass.h |5 - 1 files changed, 5 deletions(-) Index: llvm/include/llvm/CallGraphSCCPass.h diff -u llvm/include/llvm/CallGraphSCCPass.h:1.9 llvm/include/llvm/CallGraphSCCPass.h:1.10 --- llvm/include/llvm/CallGraphSCCPass.h:1.9Thu Jan 25 18:47:38 2007 +++ llvm/include/llvm/CallGraphSCCPass.hThu Jan 25 19:08:18 2007 @@ -50,11 +50,6 @@ return false; } - /// run - Run this pass, returning true if a modification was made to the - /// module argument. This is implemented in terms of the runOnSCC method. - /// - virtual bool runOnModule(Module &M); - /// Assign pass manager to manager this pass virtual void assignPassManager(PMStack &PMS, PassManagerType PMT = PMT_CallGraphPassManager); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp
Changes in directory llvm/lib/Analysis/IPA:
CallGraphSCCPass.cpp updated: 1.13 -> 1.14
---
Log message:
Remove dead code.
CallGraphSCCPass does not need to implement runOnModule().
It supports runOnSCC().
---
Diffs of the changes: (+0 -9)
CallGraphSCCPass.cpp |9 -
1 files changed, 9 deletions(-)
Index: llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp
diff -u llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.13
llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.14
--- llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.13 Tue Jan 23 15:55:17 2007
+++ llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp Thu Jan 25 19:08:18 2007
@@ -189,12 +189,3 @@
AU.addRequired();
AU.addPreserved();
}
-
-bool CallGraphSCCPass::runOnModule(Module &M) {
- CallGraph &CG = getAnalysis();
- bool Changed = doInitialization(CG);
- for (scc_iterator I = scc_begin(&CG), E = scc_end(&CG);
- I != E; ++I)
-Changed = runOnSCC(*I);
- return Changed | doFinalization(CG);
-}
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.7 -> 1.8
---
Log message:
SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This
is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
---
Diffs of the changes: (+6 -2)
ARMConstantIslandPass.cpp |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.7
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.8
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.7 Thu Jan 25 19:04:44 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Thu Jan 25 20:02:39 2007
@@ -602,13 +602,17 @@
// direct the updated conditional branch to the fall-through block.
Otherwise,
// split the MBB before the next instruction.
MachineBasicBlock *MBB = MI->getParent();
- if (&MBB->back() != MI || !BBHasFallthrough(MBB))
+ if (&MBB->back() != MI || !BBHasFallthrough(MBB)) {
SplitBlockBeforeInstr(MI);
+// No need for the branch to the next block. We're adding a unconditional
+// branch to the destination.
+MBB->back().eraseFromParent();
+ }
MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
// Insert a unconditional branch and replace the conditional branch.
// Also update the ImmBranch as well as adding a new entry for the new
branch.
- BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm((unsigned)CC);
+ BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
Br.MI = &MBB->back();
BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
unsigned MaxDisp = (Br.UncondBr == ARM::tB) ? (1<<10)*2 : (1<<23)*4;
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[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/trunc.c trunc.reference_output general-test.c matrix.c matrix.h matrix.reference_output
Changes in directory llvm-test/SingleSource/UnitTests/Integer:
trunc.c added (r1.1)
trunc.reference_output added (r1.1)
general-test.c updated: 1.5 -> 1.6
matrix.c updated: 1.7 -> 1.8
matrix.h updated: 1.1 -> 1.2
matrix.reference_output updated: 1.2 -> 1.3
---
Log message:
Add trunc.c for cbe test.
Modify matrix.c to avoid overflow problem.
---
Diffs of the changes: (+71 -17)
general-test.c |2 -
matrix.c| 14 ++---
matrix.h|2 -
matrix.reference_output | 16 +++
trunc.c | 50
trunc.reference_output |4 +++
6 files changed, 71 insertions(+), 17 deletions(-)
Index: llvm-test/SingleSource/UnitTests/Integer/trunc.c
diff -c /dev/null llvm-test/SingleSource/UnitTests/Integer/trunc.c:1.1
*** /dev/null Thu Jan 25 21:10:27 2007
--- llvm-test/SingleSource/UnitTests/Integer/trunc.cThu Jan 25 21:10:17 2007
***
*** 0
--- 1,50
+ //===--- trunc.c --- Test Cases for Bit Accurate Types
===//
+ //
+ // This file was developed by Guoling Han and is distributed under the
+ // University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+
//===--===//
+ //
+ // This is used to test trunc and sext instructions.
+ //
+
//===--===//
+
+ #include
+
+ typedef int __attribute__ ((bitwidth(24))) int24;
+
+ int
+ test(int24 v)
+ {
+ int y;
+
+ y = v * (-1);
+ printf("test() y = %d\n", y);
+
+ return 0;
+ }
+
+ int
+ main ( int argc, char** argv)
+ {
+ int num;
+ int24 x;
+
+ if (argc > 1)
+ num = atoi(argv[1]);
+
+ test(num);
+
+ num = num - 0xdf5e75; //0x10001
+
+ x = num;
+
+ printf("x=%x\n", x);
+
+ if(x != 1)
+ printf("error\n");
+
+ test(x);
+
+ return 0;
+ }
Index: llvm-test/SingleSource/UnitTests/Integer/trunc.reference_output
diff -c /dev/null
llvm-test/SingleSource/UnitTests/Integer/trunc.reference_output:1.1
*** /dev/null Thu Jan 25 21:10:33 2007
--- llvm-test/SingleSource/UnitTests/Integer/trunc.reference_output Thu Jan
25 21:10:17 2007
***
*** 0
--- 1,4
+ test() y = 2138506
+ x=1
+ test() y = -1
+ exit 0
Index: llvm-test/SingleSource/UnitTests/Integer/general-test.c
diff -u llvm-test/SingleSource/UnitTests/Integer/general-test.c:1.5
llvm-test/SingleSource/UnitTests/Integer/general-test.c:1.6
--- llvm-test/SingleSource/UnitTests/Integer/general-test.c:1.5 Mon Jan 22
15:07:53 2007
+++ llvm-test/SingleSource/UnitTests/Integer/general-test.c Thu Jan 25
21:10:17 2007
@@ -41,7 +41,7 @@
*result = sizeof(My17BitInt) + sizeof(j) + sizeof(struct MyStruct);
Data1.i4Field = num;
Data1.i12Field = num + 1;
- Data1.i17Field = num + 2;
+ Data1.i17Field = num + 2;
Data1.i37Field = num + 3;
Data1.next = 0;
Data2 = Data1;
Index: llvm-test/SingleSource/UnitTests/Integer/matrix.c
diff -u llvm-test/SingleSource/UnitTests/Integer/matrix.c:1.7
llvm-test/SingleSource/UnitTests/Integer/matrix.c:1.8
--- llvm-test/SingleSource/UnitTests/Integer/matrix.c:1.7 Mon Jan 22
18:17:21 2007
+++ llvm-test/SingleSource/UnitTests/Integer/matrix.c Thu Jan 25 21:10:17 2007
@@ -19,10 +19,10 @@
typedef enum bool{false=0, true=1} bool;
-void mysort(const int17 X[8], int17 Y[8])
+void mysort(const int24 X[8], int24 Y[8])
{
unsigned int i, j;
- int17 temp;
+ int24 temp;
{
j = 0;
for ( ; ; ) {
@@ -69,11 +69,11 @@
-int my_test(int17 A[8][8], int17 B[8][8])
+int my_test(int24 A[8][8], int24 B[8][8])
{
unsigned int i, j, k, dd;
- int17 C[8][8];
- int17 D[8];
+ int24 C[8][8];
+ int24 D[8];
int t;
{
i = 0;
@@ -118,8 +118,8 @@
{
int i, j;
- int17 X[8][8];
- int17 Y[8][8];
+ int24 X[8][8];
+ int24 Y[8][8];
for(i=0; i<8; i++)
for(j=0; j<8; j++){
Index: llvm-test/SingleSource/UnitTests/Integer/matrix.h
diff -u llvm-test/SingleSource/UnitTests/Integer/matrix.h:1.1
llvm-test/SingleSource/UnitTests/Integer/matrix.h:1.2
--- llvm-test/SingleSource/UnitTests/Integer/matrix.h:1.1 Thu Jan 18
20:22:46 2007
+++ llvm-test/SingleSource/UnitTests/Integer/matrix.h Thu Jan 25 21:10:17 2007
@@ -2,5 +2,5 @@
// Date: Fri Jan 12 17:32:33 CST 2007
#ifndef DATATYPE_DEFINE
#define DATATYPE_DEFINE
-typedef int __attribute__ ((bitwidth(17))) int17;
+typedef int __attribute__ ((bitwidth(24))) int24;
#endif
Index: llvm-test/SingleSource/UnitTests/Integer/matrix.reference_output
diff -u llvm-test/SingleSource/UnitTests/Integer/matrix.reference_output:1.2
llvm-test/SingleSource/UnitTests/Integer/matrix.reference_output:1.3
--- llvm-test/SingleSource/UnitTests/Integer/matrix.reference_output:1.2
Mon Jan 22 14:47:27 2007
+++ llvm-test/SingleSource/UnitTests/Integer/matrix.reference_outputThu Jan
25 21:10:1
[llvm-commits] CVS: llvm/lib/VMCore/Instructions.cpp
Changes in directory llvm/lib/VMCore: Instructions.cpp updated: 1.65 -> 1.66 --- Log message: Fix an assertion message. --- Diffs of the changes: (+1 -1) Instructions.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/VMCore/Instructions.cpp diff -u llvm/lib/VMCore/Instructions.cpp:1.65 llvm/lib/VMCore/Instructions.cpp:1.66 --- llvm/lib/VMCore/Instructions.cpp:1.65 Sat Jan 20 18:29:26 2007 +++ llvm/lib/VMCore/Instructions.cppFri Jan 26 00:30:34 2007 @@ -518,7 +518,7 @@ assert(!isa(Amt) && "Passed basic block into allocation size parameter! Ue other ctor"); assert(Amt->getType() == Type::Int32Ty && - "Malloc/Allocation array size != UIntTy!"); + "Malloc/Allocation array size is not a 32-bit integer!"); } return Amt; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Constants.cpp
Changes in directory llvm/lib/VMCore:
Constants.cpp updated: 1.204 -> 1.205
---
Log message:
Clean up comments and assert messages that still refer to the old type names.
---
Diffs of the changes: (+12 -12)
Constants.cpp | 24
1 files changed, 12 insertions(+), 12 deletions(-)
Index: llvm/lib/VMCore/Constants.cpp
diff -u llvm/lib/VMCore/Constants.cpp:1.204 llvm/lib/VMCore/Constants.cpp:1.205
--- llvm/lib/VMCore/Constants.cpp:1.204 Sat Jan 20 20:29:10 2007
+++ llvm/lib/VMCore/Constants.cpp Fri Jan 26 01:37:34 2007
@@ -1004,10 +1004,10 @@
return ConstantArray::get(ATy, ElementVals);
}
-/// isString - This method returns true if the array is an array of sbyte or
-/// ubyte, and if the elements of the array are all ConstantInt's.
+/// isString - This method returns true if the array is an array of i8, and
+/// if the elements of the array are all ConstantInt's.
bool ConstantArray::isString() const {
- // Check the element type for sbyte or ubyte...
+ // Check the element type for i8...
if (getType()->getElementType() != Type::Int8Ty)
return false;
// Check the elements to make sure they are all integers, not constant
@@ -1022,7 +1022,7 @@
/// isString) and it ends in a null byte \0 and does not contains any other
/// null bytes except its terminator.
bool ConstantArray::isCString() const {
- // Check the element type for sbyte or ubyte...
+ // Check the element type for i8...
if (getType()->getElementType() != Type::Int8Ty)
return false;
Constant *Zero = Constant::getNullValue(getOperand(0)->getType());
@@ -1040,7 +1040,7 @@
}
-// getAsString - If the sub-element type of this array is either sbyte or
ubyte,
+// getAsString - If the sub-element type of this array is i8
// then this method converts the array to an std::string and returns it.
// Otherwise, it asserts out.
//
@@ -1536,7 +1536,7 @@
Constant *ConstantExpr::getUIToFP(Constant *C, const Type *Ty) {
assert(C->getType()->isInteger() && Ty->isFloatingPoint() &&
- "This is an illegal uint to floating point cast!");
+ "This is an illegal i32 to floating point cast!");
return getFoldedCast(Instruction::UIToFP, C, Ty);
}
@@ -1548,13 +1548,13 @@
Constant *ConstantExpr::getFPToUI(Constant *C, const Type *Ty) {
assert(C->getType()->isFloatingPoint() && Ty->isInteger() &&
- "This is an illegal floating point to uint cast!");
+ "This is an illegal floating point to i32 cast!");
return getFoldedCast(Instruction::FPToUI, C, Ty);
}
Constant *ConstantExpr::getFPToSI(Constant *C, const Type *Ty) {
assert(C->getType()->isFloatingPoint() && Ty->isInteger() &&
- "This is an illegal floating point to sint cast!");
+ "This is an illegal floating point to i32 cast!");
return getFoldedCast(Instruction::FPToSI, C, Ty);
}
@@ -1688,7 +1688,7 @@
case Instruction::Shl:
case Instruction::LShr:
case Instruction::AShr:
-assert(C2->getType() == Type::Int8Ty && "Shift should be by ubyte!");
+assert(C2->getType() == Type::Int8Ty && "Shift should be by i8!");
assert(C1->getType()->isInteger() &&
"Tried to create a shift operation on a non-integer type!");
break;
@@ -1708,7 +1708,7 @@
Constant *ConstantExpr::getSelectTy(const Type *ReqTy, Constant *C,
Constant *V1, Constant *V2) {
- assert(C->getType() == Type::Int1Ty && "Select condition must be bool!");
+ assert(C->getType() == Type::Int1Ty && "Select condition must be i1!");
assert(V1->getType() == V2->getType() && "Select value types must match!");
assert(V1->getType()->isFirstClassType() && "Cannot select aggregate type!");
@@ -1833,7 +1833,7 @@
assert(isa(Val->getType()) &&
"Tried to create extractelement operation on non-packed type!");
assert(Idx->getType() == Type::Int32Ty &&
- "Extractelement index must be uint type!");
+ "Extractelement index must be i32 type!");
return
getExtractElementTy(cast(Val->getType())->getElementType(),
Val, Idx);
}
@@ -1857,7 +1857,7 @@
assert(Elt->getType() == cast(Val->getType())->getElementType()
&& "Insertelement types must match!");
assert(Idx->getType() == Type::Int32Ty &&
- "Insertelement index must be uint type!");
+ "Insertelement index must be i32 type!");
return getInsertElementTy(cast(Val->getType())->getElementType(),
Val, Elt, Idx);
}
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[llvm-commits] CVS: llvm/lib/VMCore/Type.cpp
Changes in directory llvm/lib/VMCore:
Type.cpp updated: 1.165 -> 1.166
---
Log message:
IntegerType is a sized DerivedType too.
---
Diffs of the changes: (+3 -0)
Type.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/VMCore/Type.cpp
diff -u llvm/lib/VMCore/Type.cpp:1.165 llvm/lib/VMCore/Type.cpp:1.166
--- llvm/lib/VMCore/Type.cpp:1.165 Fri Jan 19 15:25:12 2007
+++ llvm/lib/VMCore/Type.cppFri Jan 26 01:51:36 2007
@@ -139,6 +139,9 @@
/// iff all of the members of the type are sized as well. Since asking for
/// their size is relatively uncommon, move this operation out of line.
bool Type::isSizedDerivedType() const {
+ if (isa(this))
+return true;
+
if (const ArrayType *ATy = dyn_cast(this))
return ATy->getElementType()->isSized();
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