[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp MachineDebugInfo.cpp
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.84 -> 1.85
MachineDebugInfo.cpp updated: 1.52 -> 1.53
---
Log message:
Tighter data structure for deleted debug labels.
---
Diffs of the changes: (+20 -4)
DwarfWriter.cpp |3 +--
MachineDebugInfo.cpp | 21 +++--
2 files changed, 20 insertions(+), 4 deletions(-)
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.84
llvm/lib/CodeGen/DwarfWriter.cpp:1.85
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.84 Mon Oct 23 09:56:37 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppTue Oct 24 06:50:43 2006
@@ -2207,8 +2207,7 @@
const SourceLineInfo &LineInfo = LineInfos[i];
unsigned LabelID = LineInfo.getLabelID();
- // Throw out line info if label is invalid.
- if (!DebugInfo->isLabelValid(LabelID)) continue;
+ // Source line labels are validated at the MachineDebugInfo level.
if (DwarfVerbose) {
unsigned SourceID = LineInfo.getSourceID();
Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.52
llvm/lib/CodeGen/MachineDebugInfo.cpp:1.53
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.52 Mon Oct 23 09:56:37 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp Tue Oct 24 06:50:43 2006
@@ -1544,16 +1544,33 @@
return ID;
}
+static bool LabelUIDComparison(const SourceLineInfo &LI, unsigned UID) {
+ return LI.getLabelID() < UID;
+}
+
/// InvalidateLabel - Inhibit use of the specified label # from
/// MachineDebugInfo, for example because the code was deleted.
void MachineDebugInfo::InvalidateLabel(unsigned LabelID) {
- DeletedLabelIDs.insert(LabelID);
+ // Check source line list first. SourceLineInfo is sorted by LabelID.
+ std::vector::iterator I =
+std::lower_bound(Lines.begin(), Lines.end(), LabelID, LabelUIDComparison);
+ if (I != Lines.end() && I->getLabelID() == LabelID) {
+Lines.erase(I);
+return;
+ }
+
+ // Otherwise add for use by isLabelValid.
+ std::vector::iterator J =
+std::lower_bound(DeletedLabelIDs.begin(), DeletedLabelIDs.end(), LabelID);
+ DeletedLabelIDs.insert(J, LabelID);
}
/// isLabelValid - Check to make sure the label is still valid before
/// attempting to use.
bool MachineDebugInfo::isLabelValid(unsigned LabelID) {
- return DeletedLabelIDs.find(LabelID) == DeletedLabelIDs.end();
+ std::vector::iterator I =
+std::lower_bound(DeletedLabelIDs.begin(), DeletedLabelIDs.end(), LabelID);
+ return I != DeletedLabelIDs.end() && *I == LabelID;
}
/// RecordSource - Register a source file with debug info. Returns an source
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h
Changes in directory llvm/include/llvm/CodeGen: MachineDebugInfo.h updated: 1.43 -> 1.44 --- Log message: Tighter data structure for deleted debug labels. --- Diffs of the changes: (+2 -4) MachineDebugInfo.h |6 ++ 1 files changed, 2 insertions(+), 4 deletions(-) Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.43 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.44 --- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.43 Mon Oct 23 09:56:37 2006 +++ llvm/include/llvm/CodeGen/MachineDebugInfo.hTue Oct 24 06:50:43 2006 @@ -30,8 +30,6 @@ #ifndef LLVM_CODEGEN_MACHINEDEBUGINFO_H #define LLVM_CODEGEN_MACHINEDEBUGINFO_H -#include - #include "llvm/Support/Dwarf.h" #include "llvm/Support/DataTypes.h" #include "llvm/ADT/UniqueVector.h" @@ -981,9 +979,9 @@ // DebugScope *RootScope; - // DeletedLabelIDs - List of label IDs that have been removed from the + // DeletedLabelIDs - Sorted list of label IDs that have been removed from the // module. - std::set DeletedLabelIDs; + std::vector DeletedLabelIDs; // FrameMoves - List of moves done by a function's prolog. Used to construct // frame maps by debug consumers. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocLinearScan.cpp updated: 1.128 -> 1.129
---
Log message:
LinearScanner hotspot.
---
Diffs of the changes: (+2 -3)
RegAllocLinearScan.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.128
llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.129
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.128 Sun Aug 27 07:54:01 2006
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Tue Oct 24 09:35:25 2006
@@ -460,11 +460,10 @@
bool ConflictsWithFixed = false;
for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
- if (physReg == fixed_[i].first->reg ||
- RegAliases.count(fixed_[i].first->reg)) {
+ IntervalPtr &IP = fixed_[i];
+ if (physReg == IP.first->reg || RegAliases.count(IP.first->reg)) {
// Okay, this reg is on the fixed list. Check to see if we actually
// conflict.
-IntervalPtr &IP = fixed_[i];
LiveInterval *I = IP.first;
if (I->endNumber() > StartPosition) {
LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.96 -> 1.97
---
Log message:
fix assert comment
---
Diffs of the changes: (+1 -1)
TargetInstrInfo.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.96
llvm/include/llvm/Target/TargetInstrInfo.h:1.97
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.96 Tue Oct 17 17:39:05 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h Tue Oct 24 09:47:28 2006
@@ -314,7 +314,7 @@
virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector &Cond) const {
-assert(0 && "Target didn't implement TargetInstrInfo::RemoveBranch!");
+assert(0 && "Target didn't implement TargetInstrInfo::InsertBranch!");
}
/// ReverseBranchCondition - Reverses the branch condition of the specified
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[llvm-commits] CVS: llvm/lib/CodeGen/LLVMTargetMachine.cpp
Changes in directory llvm/lib/CodeGen: LLVMTargetMachine.cpp updated: 1.3 -> 1.4 --- Log message: Don't do dead block elimination in fast mode. --- Diffs of the changes: (+2 -1) LLVMTargetMachine.cpp |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/LLVMTargetMachine.cpp diff -u llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.3 llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.4 --- llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.3 Fri Oct 13 15:45:56 2006 +++ llvm/lib/CodeGen/LLVMTargetMachine.cpp Tue Oct 24 11:11:49 2006 @@ -64,7 +64,8 @@ PM.add(createPrologEpilogCodeInserter()); // Branch folding must be run after regalloc and prolog/epilog insertion. - PM.add(createBranchFoldingPass()); + if (!Fast) +PM.add(createBranchFoldingPass()); if (PrintMachineCode) // Print the register-allocated code PM.add(createMachineFunctionPrinterPass(&std::cerr)); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/README.txt
Changes in directory llvm/lib/Target:
README.txt updated: 1.42 -> 1.43
---
Log message:
new bad case
---
Diffs of the changes: (+19 -0)
README.txt | 19 +++
1 files changed, 19 insertions(+)
Index: llvm/lib/Target/README.txt
diff -u llvm/lib/Target/README.txt:1.42 llvm/lib/Target/README.txt:1.43
--- llvm/lib/Target/README.txt:1.42 Thu Sep 28 01:01:17 2006
+++ llvm/lib/Target/README.txt Tue Oct 24 11:12:47 2006
@@ -300,3 +300,22 @@
}
//===-===//
+
+-scalarrepl should promote this to be a vector scalar.
+
+%struct..0anon = type { <4 x float> }
+implementation ; Functions:
+void %test1(<4 x float> %V, float* %P) {
+entry:
+%u = alloca %struct..0anon, align 16; <%struct..0anon*>
[#uses=2]
+%tmp = getelementptr %struct..0anon* %u, int 0, uint 0 ; <<4
x float>*> [#uses=1]
+store <4 x float> %V, <4 x float>* %tmp
+%tmp1 = cast %struct..0anon* %u to [4 x float]* ; <[4 x
float]*> [#uses=1]
+%tmp = getelementptr [4 x float]* %tmp1, int 0, int 1 ;
[#uses=1]
+%tmp = load float* %tmp ; [#uses=1]
+%tmp3 = mul float %tmp, 2.00e+00; [#uses=1]
+store float %tmp3, float* %P
+ret void
+}
+
+//===-===//
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.cpp IA64InstrInfo.h
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.cpp updated: 1.4 -> 1.5
IA64InstrInfo.h updated: 1.2 -> 1.3
---
Log message:
implement uncond branch insertion for the branch folding pass
---
Diffs of the changes: (+11 -5)
IA64InstrInfo.cpp |7 +++
IA64InstrInfo.h |9 -
2 files changed, 11 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/IA64/IA64InstrInfo.cpp
diff -u llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.4
llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.5
--- llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.4 Tue Jan 24 20:23:38 2006
+++ llvm/lib/Target/IA64/IA64InstrInfo.cpp Tue Oct 24 11:44:55 2006
@@ -46,3 +46,10 @@
// move instruction
}
+void IA64InstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
+ MachineBasicBlock *FBB,
+ const std::vector &Cond)const
{
+ // Can only insert uncond branches so far.
+ assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
+ BuildMI(&MBB, IA64::BRL_NOTCALL, 1).addMBB(TBB);
+}
\ No newline at end of file
Index: llvm/lib/Target/IA64/IA64InstrInfo.h
diff -u llvm/lib/Target/IA64/IA64InstrInfo.h:1.2
llvm/lib/Target/IA64/IA64InstrInfo.h:1.3
--- llvm/lib/Target/IA64/IA64InstrInfo.h:1.2Thu Apr 21 18:13:11 2005
+++ llvm/lib/Target/IA64/IA64InstrInfo.hTue Oct 24 11:44:55 2006
@@ -19,11 +19,7 @@
namespace llvm {
-/// IA64II - This namespace holds all of the target specific flags that
-/// instruction info tracks.
-/// FIXME: now gone!
-
- class IA64InstrInfo : public TargetInstrInfo {
+class IA64InstrInfo : public TargetInstrInfo {
const IA64RegisterInfo RI;
public:
IA64InstrInfo();
@@ -41,6 +37,9 @@
virtual bool isMoveInstr(const MachineInstr& MI,
unsigned& sourceReg,
unsigned& destReg) const;
+ virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+MachineBasicBlock *FBB,
+const std::vector &Cond) const;
};
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.cpp ARMInstrInfo.h ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.7 -> 1.8
ARMInstrInfo.h updated: 1.3 -> 1.4
ARMInstrInfo.td updated: 1.70 -> 1.71
---
Log message:
implement uncond branch insertion, mark branches with isBranch.
---
Diffs of the changes: (+13 -1)
ARMInstrInfo.cpp |8
ARMInstrInfo.h |4
ARMInstrInfo.td |2 +-
3 files changed, 13 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.7
llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.8
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.7Wed Sep 13 07:09:43 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.cppTue Oct 24 11:47:57 2006
@@ -48,3 +48,11 @@
}
return false;
}
+
+void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
+ MachineBasicBlock *FBB,
+ const std::vector
&Cond)const{
+ // Can only insert uncond branches so far.
+ assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
+ BuildMI(&MBB, ARM::b, 1).addMBB(TBB);
+}
\ No newline at end of file
Index: llvm/lib/Target/ARM/ARMInstrInfo.h
diff -u llvm/lib/Target/ARM/ARMInstrInfo.h:1.3
llvm/lib/Target/ARM/ARMInstrInfo.h:1.4
--- llvm/lib/Target/ARM/ARMInstrInfo.h:1.3 Tue Aug 8 15:35:03 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.h Tue Oct 24 11:47:57 2006
@@ -40,6 +40,10 @@
///
virtual bool isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const;
+
+ virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+MachineBasicBlock *FBB,
+const std::vector &Cond) const;
};
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.70
llvm/lib/Target/ARM/ARMInstrInfo.td:1.71
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.70Mon Oct 23 15:34:26 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Oct 24 11:47:57 2006
@@ -227,7 +227,7 @@
def UMULL : IntBinOp<"umull r12,", mulhu>;
}
-let isTerminator = 1 in {
+let isTerminator = 1, isBranch = 1 in {
def bcond : InstARM<(ops brtarget:$dst, CCOp:$cc),
"b$cc $dst",
[(armbr bb:$dst, imm:$cc)]>;
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[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrInfo.cpp SparcInstrInfo.h
Changes in directory llvm/lib/Target/Sparc:
SparcInstrInfo.cpp updated: 1.13 -> 1.14
SparcInstrInfo.h updated: 1.9 -> 1.10
---
Log message:
implement uncond branch insertion for sparc to fix regressions from last night
due to branchfolding
---
Diffs of the changes: (+13 -0)
SparcInstrInfo.cpp |8
SparcInstrInfo.h |5 +
2 files changed, 13 insertions(+)
Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.13
llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.14
--- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.13 Sat Feb 4 23:50:24 2006
+++ llvm/lib/Target/Sparc/SparcInstrInfo.cppTue Oct 24 11:39:19 2006
@@ -96,3 +96,11 @@
}
return 0;
}
+
+void SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock
*TBB,
+ MachineBasicBlock *FBB,
+ const std::vector
&Cond)const{
+ // Can only insert uncond branches so far.
+ assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
+ BuildMI(&MBB, SP::BA, 1).addMBB(TBB);
+}
\ No newline at end of file
Index: llvm/lib/Target/Sparc/SparcInstrInfo.h
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.h:1.9
llvm/lib/Target/Sparc/SparcInstrInfo.h:1.10
--- llvm/lib/Target/Sparc/SparcInstrInfo.h:1.9 Wed May 24 12:04:04 2006
+++ llvm/lib/Target/Sparc/SparcInstrInfo.h Tue Oct 24 11:39:19 2006
@@ -61,6 +61,11 @@
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than storing to the stack slot.
virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+
+
+ virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+MachineBasicBlock *FBB,
+const std::vector &Cond) const;
};
}
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp AlphaInstrInfo.h
Changes in directory llvm/lib/Target/Alpha:
AlphaInstrInfo.cpp updated: 1.9 -> 1.10
AlphaInstrInfo.h updated: 1.5 -> 1.6
---
Log message:
implement uncond branch insertion so alpha works work branchfolding.
---
Diffs of the changes: (+11 -0)
AlphaInstrInfo.cpp |7 +++
AlphaInstrInfo.h |4
2 files changed, 11 insertions(+)
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.9
llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.10
--- llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.9Thu Mar 9 12:18:51 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.cppTue Oct 24 11:41:36 2006
@@ -83,3 +83,10 @@
return 0;
}
+void AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock
*TBB,
+ MachineBasicBlock *FBB,
+ const std::vector
&Cond)const{
+ // Can only insert uncond branches so far.
+ assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
+ BuildMI(&MBB, Alpha::BR, 1).addMBB(TBB);
+}
\ No newline at end of file
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.h
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.h:1.5
llvm/lib/Target/Alpha/AlphaInstrInfo.h:1.6
--- llvm/lib/Target/Alpha/AlphaInstrInfo.h:1.5 Thu Feb 2 21:07:37 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.h Tue Oct 24 11:41:36 2006
@@ -38,6 +38,10 @@
virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex)
const;
virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+
+ virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+MachineBasicBlock *FBB,
+const std::vector &Cond) const;
};
}
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.295 -> 1.296
---
Log message:
generalize 'CaseBlock'. It really allows any comparison to be inserted.
---
Diffs of the changes: (+2 -3)
SelectionDAGISel.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.295
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.296
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.295Mon Oct 23
13:38:22 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Oct 24 12:03:35 2006
@@ -819,9 +819,8 @@
/// visitSwitchCase - Emits the necessary code to represent a single node in
/// the binary search tree resulting from lowering a switch instruction.
void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
- SDOperand SwitchOp = getValue(CB.SwitchV);
- SDOperand CaseOp = getValue(CB.CaseC);
- SDOperand Cond = DAG.getSetCC(MVT::i1, SwitchOp, CaseOp, CB.CC);
+ SDOperand Cond = DAG.getSetCC(MVT::i1, getValue(CB.CmpLHS),
+getValue(CB.CmpRHS), CB.CC);
// Set NextBlock to be the MBB immediately after the current one, if any.
// This is used to avoid emitting unnecessary branches to the next block.
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64InstrInfo.cpp
Changes in directory llvm/lib/Target/IA64: IA64InstrInfo.cpp updated: 1.5 -> 1.6 --- Log message: fix warning about missing newline at end of file --- Diffs of the changes: (+1 -1) IA64InstrInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/IA64/IA64InstrInfo.cpp diff -u llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.5 llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.6 --- llvm/lib/Target/IA64/IA64InstrInfo.cpp:1.5 Tue Oct 24 11:44:55 2006 +++ llvm/lib/Target/IA64/IA64InstrInfo.cpp Tue Oct 24 12:07:11 2006 @@ -52,4 +52,4 @@ // Can only insert uncond branches so far. assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!"); BuildMI(&MBB, IA64::BRL_NOTCALL, 1).addMBB(TBB); -} \ No newline at end of file +} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.58 -> 1.59
---
Log message:
Fix CodeGen/IA64/ret-0.ll, which has apparently been broken since some of the
isel changes happened months ago.
---
Diffs of the changes: (+6 -2)
IA64ISelDAGToDAG.cpp |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.58
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.59
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.58 Fri Oct 13 16:14:26 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Tue Oct 24 12:09:43 2006
@@ -408,12 +408,16 @@
case ISD::TargetConstantFP: {
SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so..
+SDOperand V;
if (cast(N)->isExactlyValue(+0.0)) {
- return CurDAG->getCopyFromReg(Chain, IA64::F0, MVT::f64).Val;
+ V = CurDAG->getCopyFromReg(Chain, IA64::F0, MVT::f64);
} else if (cast(N)->isExactlyValue(+1.0)) {
- return CurDAG->getCopyFromReg(Chain, IA64::F1, MVT::f64).Val;
+ V = CurDAG->getCopyFromReg(Chain, IA64::F1, MVT::f64);
} else
assert(0 && "Unexpected FP constant!");
+
+ReplaceUses(SDOperand(N, 0), V);
+return 0;
}
case ISD::FrameIndex: { // TODO: reduce creepyness
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
Changes in directory llvm/lib/Target/Alpha: AlphaInstrInfo.cpp updated: 1.10 -> 1.11 --- Log message: fix warning about missing newline at end of file --- Diffs of the changes: (+1 -1) AlphaInstrInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaInstrInfo.cpp diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.10 llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.11 --- llvm/lib/Target/Alpha/AlphaInstrInfo.cpp:1.10 Tue Oct 24 11:41:36 2006 +++ llvm/lib/Target/Alpha/AlphaInstrInfo.cppTue Oct 24 12:07:11 2006 @@ -89,4 +89,4 @@ // Can only insert uncond branches so far. assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!"); BuildMI(&MBB, Alpha::BR, 1).addMBB(TBB); -} \ No newline at end of file +} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review
On Mon, 2006-10-23 at 22:57 -0700, Chris Lattner wrote: > n Oct 23, 2006, at 10:52 PM, Chris Lattner wrote: > > On Oct 22, 2006, at 7:50 PM, Reid Spencer wrote: > > > >> Attached is a patch to implement splitting the signless DIV > >> instruction > >> into UDiv (unsigned), SDiv (signed), and FDiv (floating point) > >> instructions. This is part of the Signless Types work I'm doing. > > > > Overall, this patch looks like a great first step > > Crap, that was obviously supposed to just go to Reid. :( No worries. I learned a lot from it. Hopefully someone else will too. :) Reid. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGISel.h
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.27 -> 1.28
---
Log message:
generalize 'CaseBlock'. It really allows any comparison to be inserted.
---
Diffs of the changes: (+7 -8)
SelectionDAGISel.h | 15 +++
1 files changed, 7 insertions(+), 8 deletions(-)
Index: llvm/include/llvm/CodeGen/SelectionDAGISel.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.27
llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.28
--- llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.27 Sat Oct 14 03:30:53 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGISel.hTue Oct 24 12:03:35 2006
@@ -82,20 +82,19 @@
/// SDISel for the code generation of additional basic blocks needed by
multi-
/// case switch statements.
struct CaseBlock {
-CaseBlock(ISD::CondCode cc, Value *s, Constant *c, MachineBasicBlock *lhs,
- MachineBasicBlock *rhs, MachineBasicBlock *me) :
-CC(cc), SwitchV(s), CaseC(c), LHSBB(lhs), RHSBB(rhs), ThisBB(me) {}
+CaseBlock(ISD::CondCode cc, Value *cmplhs, Value *cmprhs,
+ MachineBasicBlock *lhs, MachineBasicBlock *rhs,
+ MachineBasicBlock *me) :
+CC(cc), CmpLHS(cmplhs), CmpRHS(cmprhs), LHSBB(lhs), RHSBB(rhs),
ThisBB(me){}
// CC - the condition code to use for the case block's setcc node
ISD::CondCode CC;
-// SwitchV - the value to be switched on, 'foo' in switch(foo)
-Value *SwitchV;
-// CaseC - the constant the setcc node will compare against SwitchV
-Constant *CaseC;
+// CmpLHS/CmpRHS - The LHS/RHS of the comparison to emit.
+Value *CmpLHS, *CmpRHS;
// LHSBB - the block to branch to if the setcc is true
MachineBasicBlock *LHSBB;
// RHSBB - the block to branch to if the setcc is false
MachineBasicBlock *RHSBB;
-// ThisBB - the blcok into which to emit the code for the setcc and
branches
+// ThisBB - the block into which to emit the code for the setcc and
branches
MachineBasicBlock *ThisBB;
};
struct JumpTable {
___
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[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrInfo.cpp
Changes in directory llvm/lib/Target/Sparc: SparcInstrInfo.cpp updated: 1.14 -> 1.15 --- Log message: fix warning about missing newline at end of file --- Diffs of the changes: (+1 -1) SparcInstrInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.14 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.15 --- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.14 Tue Oct 24 11:39:19 2006 +++ llvm/lib/Target/Sparc/SparcInstrInfo.cppTue Oct 24 12:07:11 2006 @@ -103,4 +103,4 @@ // Can only insert uncond branches so far. assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!"); BuildMI(&MBB, SP::BA, 1).addMBB(TBB); -} \ No newline at end of file +} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review
Chris,
Thanks for your detailed review. Obviously there's still much I need to
learn about InstCombine. I'll try to slow down a bit and review things
myself on the next patches.
Below are some comments on your comments. I've made all the changes
except for InstCombine. That will take a little more thought so I'll
follow up on InstCombine separately.
On Mon, 2006-10-23 at 22:52 -0700, Chris Lattner wrote:
>
> On Oct 22, 2006, at 7:50 PM, Reid Spencer wrote:
>
> > Attached is a patch to implement splitting the signless DIV
> > instruction
> > into UDiv (unsigned), SDiv (signed), and FDiv (floating point)
> > instructions. This is part of the Signless Types work I'm doing.
>
> Overall, this patch looks like a great first step, but it has
> significant flaws. In particular, the patch seems unable to produce a
> [su]div instruction with operands of the opposite sign from that of
> the instruction.
Well, I didn't think it was a requirement. However, I can see why it is
because of the pending removal of signedness from types.
> Further, handling of this (very important) case is seriously buggy in
> many cases.
I will look into it.
> I strongly recommend adding a transformation to instcombine that will
> produce more divs with such operands. For example, changing something
> like:
>
>
> %X = cast uint %A to int
> %Y = sdiv int %X, 1234
> %Z = cast int %Y to uint
>
>
> into:
>
>
>%Z = sdiv uint %A, 1234
>
>
> Fortunately, instcombine already does this for other operations
> (mul/add/and/or/xor, etc) at line 5658 of Instcombine in CVS. Please
> add a case there for UDIV/SDIV. This will hopefully help flush out
> bugs in the patch that I didn't catch.
My goal is not to add any new functionality and make the smallest change
set possible to get existing functionality working with the the new
instructions. However, I see your point. This transform could help
locate bugs elsewhere. I'll add this transform.
> When you get the comments in this email address and things retested,
> please resend the patch for review.
Okay.
> Comments preceded with ***'s
>
>
> --- include/llvm/Instruction.def 8 Apr 2006 01:15:18 - 1.19
> +++ include/llvm/Instruction.def 23 Oct 2006 02:43:18 -
> @@ -88,52 +88,50 @@ HANDLE_TERM_INST ( 5, Unwind , Unwi
> ...
>
>
> *** Why not reserve some space for all the new instructions you plan
> to add? That way the CVS bc format won't be changing as much.
>
>
> -HANDLE_BINARY_INST( 7, Add , BinaryOperator)
> -HANDLE_BINARY_INST( 8, Sub , BinaryOperator)
> -HANDLE_BINARY_INST( 9, Mul , BinaryOperator)
> +HANDLE_BINARY_INST( 7, Add , BinaryOperator)
> +HANDLE_BINARY_INST( 8, Sub , BinaryOperator)
> +HANDLE_BINARY_INST( 9, Mul , BinaryOperator)
>
>
> *** Why remove the space?
>
>
> --- lib/Analysis/ScalarEvolution.cpp 20 Oct 2006 07:07:24 - 1.54
> +++ lib/Analysis/ScalarEvolution.cpp 23 Oct 2006 02:43:20 -
> @@ -1382,12 +1382,12 @@ SCEVHandle ScalarEvolutionsImpl::createS
>return SCEVAddExpr::get(getSCEV(I->getOperand(0)),
>getSCEV(I->getOperand(1)));
> case Instruction::Mul:
>return SCEVMulExpr::get(getSCEV(I->getOperand(0)),
>getSCEV(I->getOperand(1)));
> -case Instruction::Div:
> - if (V->getType()->isInteger() && V->getType()->isSigned())
> +case Instruction::SDiv:
> + if (V->getType()->isInteger())
> return SCEVSDivExpr::get(getSCEV(I->getOperand(0)),
> getSCEV(I->getOperand(1)));
>break;
>
>
> *** No need to check for isInteger anymore.
Done.
>
>
> ===
> RCS file: /var/cvs/llvm/llvm/lib/AsmParser/llvmAsmParser.y,v
> retrieving revision 1.269
> diff -t -d -u -p -5 -r1.269 llvmAsmParser.y
> --- lib/AsmParser/llvmAsmParser.y 22 Oct 2006 07:03:09 - 1.269
> +++ lib/AsmParser/llvmAsmParser.y 23 Oct 2006 02:43:24 -
> @@ -811,10 +811,41 @@ static PATypeHolder HandleUpRefs(const T
> +// This template function is used to obtain the correct opcode for
> an
> +// instruction when an obsolete opcode is encountered. The OpcodeInfo
> template
> +// keeps track of the opcode and the "obsolete" flag. These are
> generated by
> +// the lexer and obsolete will be true when the lexer encounters the
> token for
> +// an obsolete opcode. For example, "div" was replaced by [usf]div
> but we need
> +// to maintain backwards compatibility for asm files that still have
> the "div"
> +// instruction. This function handles converting div -> [usf]div
> appropriately.
> +template
> +static void sanitizeOpCode(OpcodeInfo &OI, const
> PATypeHolder& Ty) {
> + if (OI.obsolete) {
> +switch (OI.opcode) {
> + default:
> +GenerateError("Invalid Obsolete OpCode");
> +break;
> + case Instruction::UDiv:
> +if (Ty->isFloatingPoint())
> + OI.opcode = Instruction::FDiv;
> +else if
[llvm-commits] CVS: llvm/test/Regression/CodeGen/IA64/ret-0.ll
Changes in directory llvm/test/Regression/CodeGen/IA64:
ret-0.ll added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+5 -0)
ret-0.ll |5 +
1 files changed, 5 insertions(+)
Index: llvm/test/Regression/CodeGen/IA64/ret-0.ll
diff -c /dev/null llvm/test/Regression/CodeGen/IA64/ret-0.ll:1.1
*** /dev/null Tue Oct 24 12:09:30 2006
--- llvm/test/Regression/CodeGen/IA64/ret-0.ll Tue Oct 24 12:09:20 2006
***
*** 0
--- 1,5
+ ; RUN: llvm-as < %s | llc -march=ia64
+
+ double %test() {
+ ret double 0.0
+ }
___
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.97 -> 1.98
---
Log message:
update comment
---
Diffs of the changes: (+3 -2)
TargetInstrInfo.h |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.97
llvm/include/llvm/Target/TargetInstrInfo.h:1.98
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.97 Tue Oct 24 09:47:28 2006
+++ llvm/include/llvm/Target/TargetInstrInfo.h Tue Oct 24 12:41:22 2006
@@ -309,8 +309,9 @@
/// InsertBranch - Insert a branch into the end of the specified
/// MachineBasicBlock. This operands to this method are the same as those
- /// returned by AnalyzeBranch. This nis invoked in cases where AnalyzeBranch
- /// returns success.
+ /// returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch
+ /// returns success and when an unconditional branch (TBB is non-null, FBB is
+ /// null, Cond is empty) needs to be inserted.
virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector &Cond) const {
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.cpp
Changes in directory llvm/lib/Target/ARM: ARMInstrInfo.cpp updated: 1.8 -> 1.9 --- Log message: fix warning about missing newline at end of file --- Diffs of the changes: (+1 -1) ARMInstrInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.8 llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.9 --- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.8Tue Oct 24 11:47:57 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.cppTue Oct 24 12:07:11 2006 @@ -55,4 +55,4 @@ // Can only insert uncond branches so far. assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!"); BuildMI(&MBB, ARM::b, 1).addMBB(TBB); -} \ No newline at end of file +} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.296 -> 1.297
---
Log message:
Generalize CaseBlock a bit more:
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null,
in which case the LHS is treated as a bool.
---
Diffs of the changes: (+74 -57)
SelectionDAGISel.cpp | 131 ---
1 files changed, 74 insertions(+), 57 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.296
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.297
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.296Tue Oct 24
12:03:35 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Oct 24 12:57:59 2006
@@ -766,7 +766,6 @@
void SelectionDAGLowering::visitBr(BranchInst &I) {
// Update machine-CFG edges.
MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[I.getSuccessor(0)];
- CurMBB->addSuccessor(Succ0MBB);
// Figure out which block is immediately after the current one.
MachineBasicBlock *NextBlock = 0;
@@ -779,48 +778,67 @@
if (Succ0MBB != NextBlock)
DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, getRoot(),
DAG.getBasicBlock(Succ0MBB)));
- } else {
-MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
-CurMBB->addSuccessor(Succ1MBB);
-SDOperand Cond = getValue(I.getCondition());
-if (Succ1MBB == NextBlock) {
- // If the condition is false, fall through. This means we should branch
- // if the condition is true to Succ #0.
- DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
- Cond, DAG.getBasicBlock(Succ0MBB)));
-} else if (Succ0MBB == NextBlock) {
- // If the condition is true, fall through. This means we should branch
if
- // the condition is false to Succ #1. Invert the condition first.
+// Update machine-CFG edges.
+CurMBB->addSuccessor(Succ0MBB);
+
+return;
+ }
+
+ // If this condition is one of the special cases we handle, do special stuff
+ // now.
+ Value *CondVal = I.getCondition();
+
+
+ // Update machine-CFG edges.
+ CurMBB->addSuccessor(Succ0MBB);
+ MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
+ CurMBB->addSuccessor(Succ1MBB);
+
+ SDOperand Cond = getValue(CondVal);
+ if (Succ1MBB == NextBlock) {
+// If the condition is false, fall through. This means we should branch
+// if the condition is true to Succ #0.
+DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
+Cond, DAG.getBasicBlock(Succ0MBB)));
+ } else if (Succ0MBB == NextBlock) {
+// If the condition is true, fall through. This means we should branch if
+// the condition is false to Succ #1. Invert the condition first.
+SDOperand True = DAG.getConstant(1, Cond.getValueType());
+Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
+DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
+Cond, DAG.getBasicBlock(Succ1MBB)));
+ } else {
+std::vector Ops;
+Ops.push_back(getRoot());
+// If the false case is the current basic block, then this is a self
+// loop. We do not want to emit "Loop: ... brcond Out; br Loop", as it
+// adds an extra instruction in the loop. Instead, invert the
+// condition and emit "Loop: ... br!cond Loop; br Out.
+if (CurMBB == Succ1MBB) {
+ std::swap(Succ0MBB, Succ1MBB);
SDOperand True = DAG.getConstant(1, Cond.getValueType());
Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
- DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
- Cond, DAG.getBasicBlock(Succ1MBB)));
-} else {
- std::vector Ops;
- Ops.push_back(getRoot());
- // If the false case is the current basic block, then this is a self
- // loop. We do not want to emit "Loop: ... brcond Out; br Loop", as it
- // adds an extra instruction in the loop. Instead, invert the
- // condition and emit "Loop: ... br!cond Loop; br Out.
- if (CurMBB == Succ1MBB) {
-std::swap(Succ0MBB, Succ1MBB);
-SDOperand True = DAG.getConstant(1, Cond.getValueType());
-Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
- }
- SDOperand True = DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(), Cond,
- DAG.getBasicBlock(Succ0MBB));
- DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, True,
- DAG.getBasicBlock(Succ1MBB)));
}
+SDOperand True = DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(), Cond,
+ DAG.getBasicBlock(Succ0MBB));
+DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, True,
+DAG.getBasicBlock(Succ1MBB)));
}
}
/// visitSwitchCase - Emits the necessary code to represent a
[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGISel.h
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.28 -> 1.29
---
Log message:
Generalize CaseBlock a bit more:
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null,
in which case the LHS is treated as a bool.
---
Diffs of the changes: (+8 -8)
SelectionDAGISel.h | 16
1 files changed, 8 insertions(+), 8 deletions(-)
Index: llvm/include/llvm/CodeGen/SelectionDAGISel.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.28
llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.29
--- llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.28 Tue Oct 24 12:03:35 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGISel.hTue Oct 24 12:57:59 2006
@@ -83,17 +83,17 @@
/// case switch statements.
struct CaseBlock {
CaseBlock(ISD::CondCode cc, Value *cmplhs, Value *cmprhs,
- MachineBasicBlock *lhs, MachineBasicBlock *rhs,
- MachineBasicBlock *me) :
-CC(cc), CmpLHS(cmplhs), CmpRHS(cmprhs), LHSBB(lhs), RHSBB(rhs),
ThisBB(me){}
+ MachineBasicBlock *truebb, MachineBasicBlock *falsebb,
+ MachineBasicBlock *me)
+ : CC(cc), CmpLHS(cmplhs), CmpRHS(cmprhs),
+TrueBB(truebb), FalseBB(falsebb), ThisBB(me) {}
// CC - the condition code to use for the case block's setcc node
ISD::CondCode CC;
-// CmpLHS/CmpRHS - The LHS/RHS of the comparison to emit.
+// CmpLHS/CmpRHS - The LHS/RHS of the comparison to emit. If CmpRHS is
+// null, CmpLHS is treated as a bool condition for the branch.
Value *CmpLHS, *CmpRHS;
-// LHSBB - the block to branch to if the setcc is true
-MachineBasicBlock *LHSBB;
-// RHSBB - the block to branch to if the setcc is false
-MachineBasicBlock *RHSBB;
+// TrueBB/FalseBB - the block to branch to if the setcc is true/false.
+MachineBasicBlock *TrueBB, *FalseBB;
// ThisBB - the block into which to emit the code for the setcc and
branches
MachineBasicBlock *ThisBB;
};
___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.297 -> 1.298
---
Log message:
visitSwitchCase knows how to insert conditional branches well. Change
visitBr to just call visitSwitchCase, eliminating duplicate logic.
---
Diffs of the changes: (+8 -37)
SelectionDAGISel.cpp | 45 -
1 files changed, 8 insertions(+), 37 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.297
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.298
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.297Tue Oct 24
12:57:59 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Oct 24 13:07:37 2006
@@ -788,43 +788,14 @@
// If this condition is one of the special cases we handle, do special stuff
// now.
Value *CondVal = I.getCondition();
-
-
- // Update machine-CFG edges.
- CurMBB->addSuccessor(Succ0MBB);
MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
- CurMBB->addSuccessor(Succ1MBB);
-
- SDOperand Cond = getValue(CondVal);
- if (Succ1MBB == NextBlock) {
-// If the condition is false, fall through. This means we should branch
-// if the condition is true to Succ #0.
-DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
-Cond, DAG.getBasicBlock(Succ0MBB)));
- } else if (Succ0MBB == NextBlock) {
-// If the condition is true, fall through. This means we should branch if
-// the condition is false to Succ #1. Invert the condition first.
-SDOperand True = DAG.getConstant(1, Cond.getValueType());
-Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
-DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
-Cond, DAG.getBasicBlock(Succ1MBB)));
- } else {
-std::vector Ops;
-Ops.push_back(getRoot());
-// If the false case is the current basic block, then this is a self
-// loop. We do not want to emit "Loop: ... brcond Out; br Loop", as it
-// adds an extra instruction in the loop. Instead, invert the
-// condition and emit "Loop: ... br!cond Loop; br Out.
-if (CurMBB == Succ1MBB) {
- std::swap(Succ0MBB, Succ1MBB);
- SDOperand True = DAG.getConstant(1, Cond.getValueType());
- Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
-}
-SDOperand True = DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(), Cond,
- DAG.getBasicBlock(Succ0MBB));
-DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, True,
-DAG.getBasicBlock(Succ1MBB)));
- }
+
+ // Create a CaseBlock record representing this branch.
+ SelectionDAGISel::CaseBlock CB(ISD::SETEQ, CondVal, 0,
+ Succ0MBB, Succ1MBB, CurMBB);
+ // Use visitSwitchCase to actually insert the fast branch sequence for this
+ // cond branch.
+ visitSwitchCase(CB);
}
/// visitSwitchCase - Emits the necessary code to represent a single node in
@@ -3769,7 +3740,7 @@
SwitchCases[i].FalseBB = 0;
// If we haven't handled the RHS, do so now. Otherwise, we're done.
- SwitchCases[i].TrueBB = SwitchCases[i].TrueBB;
+ SwitchCases[i].TrueBB = SwitchCases[i].FalseBB;
SwitchCases[i].FalseBB = 0;
}
assert(SwitchCases[i].TrueBB == 0 && SwitchCases[i].FalseBB == 0);
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[llvm-commits] CVS: llvm/include/llvm/LinkTimeOptimizer.h
Changes in directory llvm/include/llvm:
LinkTimeOptimizer.h updated: 1.9 -> 1.10
---
Log message:
Instead of hard coding global prefix, use TargetAsmInfo.
Add LTO destructor.
---
Diffs of the changes: (+12 -0)
LinkTimeOptimizer.h | 12
1 files changed, 12 insertions(+)
Index: llvm/include/llvm/LinkTimeOptimizer.h
diff -u llvm/include/llvm/LinkTimeOptimizer.h:1.9
llvm/include/llvm/LinkTimeOptimizer.h:1.10
--- llvm/include/llvm/LinkTimeOptimizer.h:1.9 Mon Oct 23 18:12:26 2006
+++ llvm/include/llvm/LinkTimeOptimizer.h Tue Oct 24 13:41:02 2006
@@ -24,6 +24,7 @@
class Module;
class GlobalValue;
+ class TargetMachine;
enum LTOStatus {
LTO_UNKNOWN,
@@ -114,13 +115,24 @@
void getTargetTriple(const std::string &InputFilename, std::string
&targetTriple);
void removeModule (const std::string &InputFilename);
+// Constructors and destructors
+LTO() {
+ /// TODO: Use Target info, it is available at this time.
+ Target = NULL;
+}
+~LTO();
+
private:
Module *getModule (const std::string &InputFilename);
+enum LTOStatus optimize(Module *, std::ostream &,
+std::vector &);
+void getTarget(Module *);
private:
std::vector modules;
NameToSymbolMap allSymbols;
NameToModuleMap allModules;
+TargetMachine *Target;
};
} // End llvm namespace
___
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[llvm-commits] CVS: llvm/tools/lto/lto.cpp
Changes in directory llvm/tools/lto:
lto.cpp updated: 1.22 -> 1.23
---
Log message:
Instead of hard coding global prefix, use TargetAsmInfo.
Add LTO destructor.
---
Diffs of the changes: (+55 -31)
lto.cpp | 86
1 files changed, 55 insertions(+), 31 deletions(-)
Index: llvm/tools/lto/lto.cpp
diff -u llvm/tools/lto/lto.cpp:1.22 llvm/tools/lto/lto.cpp:1.23
--- llvm/tools/lto/lto.cpp:1.22 Mon Oct 23 18:57:53 2006
+++ llvm/tools/lto/lto.cpp Tue Oct 24 13:41:02 2006
@@ -32,6 +32,7 @@
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Analysis/LoadValueNumbering.h"
@@ -56,16 +57,6 @@
gv->setLinkage(GlobalValue::InternalLinkage);
}
-// Helper routine
-// FIXME : Take advantage of GlobalPrefix from AsmPrinter
-static const char *addUnderscore(const char *name) {
- size_t namelen = strlen(name);
- char *symName = (char*)malloc(namelen+2);
- symName[0] = '_';
- strcpy(&symName[1], name);
- return symName;
-}
-
// Map LLVM LinkageType to LTO LinakgeType
static LTOLinkageTypes
getLTOLinkageType(GlobalValue *v)
@@ -157,10 +148,16 @@
if (!m)
return LTO_READ_FAILURE;
+ // Collect Target info
+ if (!Target)
+getTarget(m);
+
+ if (!Target)
+return LTO_READ_FAILURE;
+
// Use mangler to add GlobalPrefix to names to match linker names.
// FIXME : Instead of hard coding "-" use GlobalPrefix.
- Mangler mangler(*m, "_");
-
+ Mangler mangler(*m, Target->getTargetAsmInfo()->getGlobalPrefix());
modules.push_back(m);
for (Module::iterator f = m->begin(), e = m->end(); f != e; ++f) {
@@ -204,37 +201,46 @@
return LTO_READ_SUCCESS;
}
+/// Get TargetMachine.
+/// Use module M to find appropriate Target.
+void
+LTO::getTarget (Module *M) {
+
+ std::string Err;
+ const TargetMachineRegistry::Entry* March =
+TargetMachineRegistry::getClosestStaticTargetForModule(*M, Err);
+
+ if (March == 0)
+return;
+
+ // Create target
+ std::string Features;
+ Target = March->CtorFn(*M, Features);
+}
+
/// Optimize module M using various IPO passes. Use exportList to
/// internalize selected symbols. Target platform is selected
/// based on information available to module M. No new target
/// features are selected.
-static enum LTOStatus lto_optimize(Module *M, std::ostream &Out,
- std::vector &exportList)
+enum LTOStatus
+LTO::optimize(Module *M, std::ostream &Out,
+ std::vector &exportList)
{
// Instantiate the pass manager to organize the passes.
PassManager Passes;
// Collect Target info
- std::string Err;
- const TargetMachineRegistry::Entry* March =
-TargetMachineRegistry::getClosestStaticTargetForModule(*M, Err);
-
- if (March == 0)
-return LTO_NO_TARGET;
-
- // Create target
- std::string Features;
- std::auto_ptr target(March->CtorFn(*M, Features));
- if (!target.get())
+ if (!Target)
+getTarget(M);
+
+ if (!Target)
return LTO_NO_TARGET;
- TargetMachine &Target = *target.get();
-
// Start off with a verification pass.
Passes.add(createVerifierPass());
// Add an appropriate TargetData instance for this module...
- Passes.add(new TargetData(*Target.getTargetData()));
+ Passes.add(new TargetData(*Target->getTargetData()));
// Often if the programmer does not specify proper prototypes for the
// functions they are calling, they end up calling a vararg version of the
@@ -302,8 +308,8 @@
FunctionPassManager *CodeGenPasses =
new FunctionPassManager(new ExistingModuleProvider(M));
- CodeGenPasses->add(new TargetData(*Target.getTargetData()));
- Target.addPassesToEmitFile(*CodeGenPasses, Out, TargetMachine::AssemblyFile,
+ CodeGenPasses->add(new TargetData(*Target->getTargetData()));
+ Target->addPassesToEmitFile(*CodeGenPasses, Out,
TargetMachine::AssemblyFile,
true);
// Run our queue of passes all at once now, efficiently.
@@ -384,7 +390,7 @@
return LTO_WRITE_FAILURE;
}
- enum LTOStatus status = lto_optimize(bigOne, asmFile, exportList);
+ enum LTOStatus status = optimize(bigOne, asmFile, exportList);
asmFile.close();
if (status != LTO_OPT_SUCCESS) {
tmpAsmFilePath.eraseFromDisk();
@@ -427,3 +433,21 @@
return LTO_OPT_SUCCESS;
}
+
+/// Destruct LTO. Delete all modules, symbols and target.
+LTO::~LTO() {
+
+ for (std::vector::iterator itr = modules.begin(), e =
modules.end();
+ itr != e; ++itr)
+delete *itr;
+
+ modules.clear();
+
+ for (NameToSymbolMap::iterator itr = allSymbols.begin(), e =
allSymbols.end();
+ itr != e; ++itr)
+delete itr->second;
+
+ allSymbols.clear();
+
+ delete Target;
+}
___
llvm-commit
[llvm-commits] CVS: llvm/lib/AsmParser/llvmAsmParser.y llvmAsmParser.y.cvs
Changes in directory llvm/lib/AsmParser:
llvmAsmParser.y updated: 1.269 -> 1.270
llvmAsmParser.y.cvs updated: 1.21 -> 1.22
---
Log message:
Removed extraneous semi-colon; this was prevening the grammar file from
bison'ing correctly.
---
Diffs of the changes: (+2 -2)
llvmAsmParser.y |2 +-
llvmAsmParser.y.cvs |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/AsmParser/llvmAsmParser.y
diff -u llvm/lib/AsmParser/llvmAsmParser.y:1.269
llvm/lib/AsmParser/llvmAsmParser.y:1.270
--- llvm/lib/AsmParser/llvmAsmParser.y:1.269Sun Oct 22 02:03:09 2006
+++ llvm/lib/AsmParser/llvmAsmParser.y Tue Oct 24 14:09:48 2006
@@ -1872,7 +1872,7 @@
| TRIPLE '=' STRINGCONSTANT {
CurModule.CurrentModule->setTargetTriple($3);
free($3);
- };
+ }
| DATALAYOUT '=' STRINGCONSTANT {
CurModule.CurrentModule->setDataLayout($3);
free($3);
Index: llvm/lib/AsmParser/llvmAsmParser.y.cvs
diff -u llvm/lib/AsmParser/llvmAsmParser.y.cvs:1.21
llvm/lib/AsmParser/llvmAsmParser.y.cvs:1.22
--- llvm/lib/AsmParser/llvmAsmParser.y.cvs:1.21 Sun Oct 22 02:03:43 2006
+++ llvm/lib/AsmParser/llvmAsmParser.y.cvs Tue Oct 24 14:09:48 2006
@@ -1872,7 +1872,7 @@
| TRIPLE '=' STRINGCONSTANT {
CurModule.CurrentModule->setTargetTriple($3);
free($3);
- };
+ }
| DATALAYOUT '=' STRINGCONSTANT {
CurModule.CurrentModule->setDataLayout($3);
free($3);
___
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[llvm-commits] CVS: llvm/test/Regression/CodeGen/ARM/vargs2.ll
Changes in directory llvm/test/Regression/CodeGen/ARM:
vargs2.ll updated: 1.1 -> 1.2
---
Log message:
expand ISD::VACOPY
---
Diffs of the changes: (+35 -17)
vargs2.ll | 52 +++-
1 files changed, 35 insertions(+), 17 deletions(-)
Index: llvm/test/Regression/CodeGen/ARM/vargs2.ll
diff -u llvm/test/Regression/CodeGen/ARM/vargs2.ll:1.1
llvm/test/Regression/CodeGen/ARM/vargs2.ll:1.2
--- llvm/test/Regression/CodeGen/ARM/vargs2.ll:1.1 Fri Aug 25 12:57:36 2006
+++ llvm/test/Regression/CodeGen/ARM/vargs2.ll Tue Oct 24 15:15:21 2006
@@ -1,33 +1,51 @@
; RUN: llvm-as < %s | llc -march=arm
-%str = internal constant [4 x sbyte] c"%d\0A\00" ; <[4 x
sbyte]*> [#uses=1]
+%str = internal constant [7 x ubyte] c"%d %d\0A\00"; <[7 x
ubyte]*> [#uses=1]
implementation ; Functions:
void %f(int %a, ...) {
entry:
- %va = alloca sbyte*, align 4; [#uses=4]
- call void %llvm.va_start( sbyte** %va )
- br label %bb
+ %a = cast int %a to uint; [#uses=1]
+ %l1 = alloca sbyte*, align 4; [#uses=5]
+ %l2 = alloca sbyte*, align 4; [#uses=4]
+ %memtmp = alloca sbyte* ; [#uses=2]
+ call void %llvm.va_start( sbyte** %l1 )
+ %tmp22 = seteq int %a, 0; [#uses=1]
+ %tmp23 = volatile load sbyte** %l1 ; [#uses=2]
+ br bool %tmp22, label %bb8, label %bb
bb:; preds = %bb, %entry
- %a_addr.0 = phi int [ %a, %entry ], [ %tmp5, %bb ] ;
[#uses=2]
- %tmp = volatile load sbyte** %va; [#uses=2]
- %tmp2 = getelementptr sbyte* %tmp, int 4;
[#uses=1]
- volatile store sbyte* %tmp2, sbyte** %va
- %tmp5 = add int %a_addr.0, -1 ; [#uses=1]
- %tmp = seteq int %a_addr.0, 1 ; [#uses=1]
- br bool %tmp, label %bb7, label %bb
-
-bb7: ; preds = %bb
- %tmp3 = cast sbyte* %tmp to int*; [#uses=1]
+ %indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] ;
[#uses=1]
+ %tmp.0 = phi sbyte* [ %tmp23, %entry ], [ %tmp, %bb ] ;
[#uses=2]
+ %tmp2 = getelementptr sbyte* %tmp.0, int 4 ;
[#uses=1]
+ volatile store sbyte* %tmp2, sbyte** %l1
+ %tmp3 = cast sbyte* %tmp.0 to int* ; [#uses=1]
%tmp = load int* %tmp3 ; [#uses=1]
- %tmp10 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([4 x
sbyte]* %str, int 0, uint 0), int %tmp ) ; [#uses=0]
- call void %llvm.va_end( sbyte** %va )
+ %tmp = volatile load sbyte** %l1; [#uses=2]
+ %indvar.next = add uint %indvar, 1 ; [#uses=2]
+ %exitcond = seteq uint %indvar.next, %a ; [#uses=1]
+ br bool %exitcond, label %bb8, label %bb
+
+bb8: ; preds = %bb, %entry
+ %p1.0.1 = phi int [ undef, %entry ], [ %tmp, %bb ] ;
[#uses=1]
+ %tmp.1 = phi sbyte* [ %tmp23, %entry ], [ %tmp, %bb ] ;
[#uses=1]
+ store sbyte* %tmp.1, sbyte** %memtmp
+ call void %llvm.va_copy( sbyte** %l2, sbyte** %memtmp )
+ %tmp10 = volatile load sbyte** %l2 ; [#uses=2]
+ %tmp12 = getelementptr sbyte* %tmp10, int 4 ;
[#uses=1]
+ volatile store sbyte* %tmp12, sbyte** %l2
+ %tmp13 = cast sbyte* %tmp10 to int* ; [#uses=1]
+ %tmp14 = load int* %tmp13 ; [#uses=1]
+ %tmp17 = call int (ubyte*, ...)* %printf( ubyte* getelementptr ([7 x
ubyte]* %str, int 0, uint 0), int %p1.0.1, int %tmp14 );
[#uses=0]
+ call void %llvm.va_end( sbyte** %l1 )
+ call void %llvm.va_end( sbyte** %l2 )
ret void
}
declare void %llvm.va_start(sbyte**)
-declare int %printf(sbyte*, ...)
+declare void %llvm.va_copy(sbyte**, sbyte**)
+
+declare int %printf(ubyte*, ...)
declare void %llvm.va_end(sbyte**)
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelDAGToDAG.cpp updated: 1.78 -> 1.79 --- Log message: expand ISD::VACOPY --- Diffs of the changes: (+1 -0) ARMISelDAGToDAG.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.78 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.79 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.78Mon Oct 23 15:08:22 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Oct 24 15:15:21 2006 @@ -89,6 +89,7 @@ setOperationAction(ISD::UREM, MVT::i32, Expand); setOperationAction(ISD::VASTART, MVT::Other, Custom); + setOperationAction(ISD::VACOPY,MVT::Other, Expand); setOperationAction(ISD::VAEND, MVT::Other, Expand); setOperationAction(ISD::ConstantFP, MVT::f64, Expand); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/AsmPrinter.h
Changes in directory llvm/include/llvm/CodeGen: AsmPrinter.h updated: 1.54 -> 1.55 --- Log message: Move getPreferredAlignmentLog from AsmPrinter to TargetData --- Diffs of the changes: (+0 -5) AsmPrinter.h |5 - 1 files changed, 5 deletions(-) Index: llvm/include/llvm/CodeGen/AsmPrinter.h diff -u llvm/include/llvm/CodeGen/AsmPrinter.h:1.54 llvm/include/llvm/CodeGen/AsmPrinter.h:1.55 --- llvm/include/llvm/CodeGen/AsmPrinter.h:1.54 Tue Oct 17 12:17:24 2006 +++ llvm/include/llvm/CodeGen/AsmPrinter.h Tue Oct 24 15:32:14 2006 @@ -95,11 +95,6 @@ /// void SwitchToDataSection(const char *NewSection, const GlobalValue *GV); -/// getPreferredAlignmentLog - Return the preferred alignment of the -/// specified global, returned in log form. This includes an explicitly -/// requested alignment (if the global has one). -unsigned getPreferredAlignmentLog(const GlobalVariable *GV) const; - /// getGlobalLinkName - Returns the asm/link name of of the specified /// global variable. Should be overridden by each target asm printer to /// generate the appropriate value. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
Changes in directory llvm/lib/Target/Alpha: AlphaAsmPrinter.cpp updated: 1.52 -> 1.53 --- Log message: Move getPreferredAlignmentLog from AsmPrinter to TargetData --- Diffs of the changes: (+1 -1) AlphaAsmPrinter.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.52 llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.53 --- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.52 Wed Oct 4 22:01:21 2006 +++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Tue Oct 24 15:32:14 2006 @@ -232,7 +232,7 @@ Constant *C = I->getInitializer(); unsigned Size = TD->getTypeSize(C->getType()); // unsigned Align = TD->getTypeAlignmentShift(C->getType()); - unsigned Align = getPreferredAlignmentLog(I); + unsigned Align = TD->getPreferredAlignmentLog(I); if (C->isNullValue() && (I->hasLinkOnceLinkage() || I->hasInternalLinkage() || ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp X86IntelAsmPrinter.cpp
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.204 -> 1.205
X86IntelAsmPrinter.cpp updated: 1.61 -> 1.62
---
Log message:
Move getPreferredAlignmentLog from AsmPrinter to TargetData
---
Diffs of the changes: (+2 -2)
X86AsmPrinter.cpp |2 +-
X86IntelAsmPrinter.cpp |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86AsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.204
llvm/lib/Target/X86/X86AsmPrinter.cpp:1.205
--- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.204 Sun Oct 22 16:37:13 2006
+++ llvm/lib/Target/X86/X86AsmPrinter.cpp Tue Oct 24 15:32:14 2006
@@ -139,7 +139,7 @@
std::string name = Mang->getValueName(I);
Constant *C = I->getInitializer();
unsigned Size = TD->getTypeSize(C->getType());
-unsigned Align = getPreferredAlignmentLog(I);
+unsigned Align = TD->getPreferredAlignmentLog(I);
if (C->isNullValue() && /* FIXME: Verify correct */
(I->hasInternalLinkage() || I->hasWeakLinkage() ||
Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.61
llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.62
--- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.61 Fri Oct 20 02:07:24 2006
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Tue Oct 24 15:32:14 2006
@@ -387,7 +387,7 @@
std::string name = Mang->getValueName(I);
Constant *C = I->getInitializer();
unsigned Size = TD->getTypeSize(C->getType());
-unsigned Align = getPreferredAlignmentLog(I);
+unsigned Align = TD->getPreferredAlignmentLog(I);
bool bCustomSegment = false;
switch (I->getLinkage()) {
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[llvm-commits] CVS: llvm/Makefile.rules
Changes in directory llvm: Makefile.rules updated: 1.406 -> 1.407 --- Log message: Targets should depend on all the intrinsics.td files also, otherwise they will compute a locally wrong numbering for the intrinsics. This fixes a nasty issue where the x86 backend started miscompiling stuff in a 'cvs up'd build after the altivec intrinsics were added. --- Diffs of the changes: (+2 -1) Makefile.rules |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/Makefile.rules diff -u llvm/Makefile.rules:1.406 llvm/Makefile.rules:1.407 --- llvm/Makefile.rules:1.406 Fri Sep 29 13:47:13 2006 +++ llvm/Makefile.rules Tue Oct 24 15:32:44 2006 @@ -1129,7 +1129,8 @@ TDFiles := $(strip $(wildcard $(PROJ_SRC_DIR)/*.td) \ $(LLVM_SRC_ROOT)/lib/Target/Target.td \ $(LLVM_SRC_ROOT)/lib/Target/TargetSelectionDAG.td \ - $(LLVM_SRC_ROOT)/include/llvm/CodeGen/ValueTypes.td) + $(LLVM_SRC_ROOT)/include/llvm/CodeGen/ValueTypes.td) \ + $(wildcard $(LLVM_SRC_ROOT)/include/llvm/Intrinsics*.td) INCFiles := $(filter %.inc,$(BUILT_SOURCES)) INCTMPFiles := $(INCFiles:%=$(ObjDir)/%.tmp) .PRECIOUS: $(INCTMPFiles) $(INCFiles) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h
Changes in directory llvm/include/llvm/Target:
TargetData.h updated: 1.40 -> 1.41
---
Log message:
Move getPreferredAlignmentLog from AsmPrinter to TargetData
---
Diffs of the changes: (+6 -0)
TargetData.h |6 ++
1 files changed, 6 insertions(+)
Index: llvm/include/llvm/Target/TargetData.h
diff -u llvm/include/llvm/Target/TargetData.h:1.40
llvm/include/llvm/Target/TargetData.h:1.41
--- llvm/include/llvm/Target/TargetData.h:1.40 Fri Jun 16 13:21:53 2006
+++ llvm/include/llvm/Target/TargetData.h Tue Oct 24 15:32:14 2006
@@ -31,6 +31,7 @@
class Type;
class StructType;
class StructLayout;
+class GlobalVariable;
class TargetData : public ImmutablePass {
bool LittleEndian; // Defaults to false
@@ -142,6 +143,11 @@
/// removed, this method must be called whenever a StructType is removed to
/// avoid a dangling pointer in this cache.
void InvalidateStructLayoutInfo(const StructType *Ty) const;
+
+ /// getPreferredAlignmentLog - Return the preferred alignment of the
+ /// specified global, returned in log form. This includes an explicitly
+ /// requested alignment (if the global has one).
+ virtual unsigned getPreferredAlignmentLog(const GlobalVariable *GV) const;
};
/// StructLayout - used to lazily calculate structure layout information for a
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[llvm-commits] CVS: llvm/lib/Target/TargetData.cpp
Changes in directory llvm/lib/Target:
TargetData.cpp updated: 1.71 -> 1.72
---
Log message:
Move getPreferredAlignmentLog from AsmPrinter to TargetData
---
Diffs of the changes: (+23 -0)
TargetData.cpp | 23 +++
1 files changed, 23 insertions(+)
Index: llvm/lib/Target/TargetData.cpp
diff -u llvm/lib/Target/TargetData.cpp:1.71 llvm/lib/Target/TargetData.cpp:1.72
--- llvm/lib/Target/TargetData.cpp:1.71 Fri Oct 20 02:07:24 2006
+++ llvm/lib/Target/TargetData.cpp Tue Oct 24 15:32:14 2006
@@ -354,3 +354,26 @@
return Result;
}
+/// getPreferredAlignmentLog - Return the preferred alignment of the
+/// specified global, returned in log form. This includes an explicitly
+/// requested alignment (if the global has one).
+unsigned TargetData::getPreferredAlignmentLog(const GlobalVariable *GV) const {
+ const Type *ElemType = GV->getType()->getElementType();
+ unsigned Alignment = getTypeAlignmentShift(ElemType);
+ if (GV->getAlignment() > (1U << Alignment))
+Alignment = Log2_32(GV->getAlignment());
+
+ if (GV->hasInitializer()) {
+// Always round up alignment of global doubles to 8 bytes.
+if (GV->getType()->getElementType() == Type::DoubleTy && Alignment < 3)
+ Alignment = 3;
+if (Alignment < 4) {
+ // If the global is not external, see if it is large. If so, give it a
+ // larger alignment.
+ if (getTypeSize(ElemType) > 128)
+Alignment = 4;// 16-byte alignment.
+}
+ }
+ return Alignment;
+}
+
___
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.201 -> 1.202 --- Log message: Move getPreferredAlignmentLog from AsmPrinter to TargetData --- Diffs of the changes: (+1 -1) PPCAsmPrinter.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.201 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.202 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.201 Wed Oct 4 22:01:21 2006 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Tue Oct 24 15:32:14 2006 @@ -513,7 +513,7 @@ std::string name = Mang->getValueName(I); Constant *C = I->getInitializer(); unsigned Size = TD->getTypeSize(C->getType()); -unsigned Align = getPreferredAlignmentLog(I); +unsigned Align = TD->getPreferredAlignmentLog(I); if (C->isNullValue() && /* FIXME: Verify correct */ (I->hasInternalLinkage() || I->hasWeakLinkage() || ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.112 -> 1.113
---
Log message:
Move getPreferredAlignmentLog from AsmPrinter to TargetData
---
Diffs of the changes: (+0 -23)
AsmPrinter.cpp | 23 ---
1 files changed, 23 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.112
llvm/lib/CodeGen/AsmPrinter.cpp:1.113
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.112 Fri Oct 20 02:07:24 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp Tue Oct 24 15:32:14 2006
@@ -326,29 +326,6 @@
}
}
-/// getPreferredAlignmentLog - Return the preferred alignment of the
-/// specified global, returned in log form. This includes an explicitly
-/// requested alignment (if the global has one).
-unsigned AsmPrinter::getPreferredAlignmentLog(const GlobalVariable *GV) const {
- const Type *ElemType = GV->getType()->getElementType();
- unsigned Alignment = TM.getTargetData()->getTypeAlignmentShift(ElemType);
- if (GV->getAlignment() > (1U << Alignment))
-Alignment = Log2_32(GV->getAlignment());
-
- if (GV->hasInitializer()) {
-// Always round up alignment of global doubles to 8 bytes.
-if (GV->getType()->getElementType() == Type::DoubleTy && Alignment < 3)
- Alignment = 3;
-if (Alignment < 4) {
- // If the global is not external, see if it is large. If so, give it a
- // larger alignment.
- if (TM.getTargetData()->getTypeSize(ElemType) > 128)
-Alignment = 4;// 16-byte alignment.
-}
- }
- return Alignment;
-}
-
/// getGlobalLinkName - Returns the asm/link name of of the specified
/// global variable. Should be overridden by each target asm printer to
/// generate the appropriate value.
___
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h
Changes in directory llvm/include/llvm/Target: TargetData.h updated: 1.41 -> 1.42 --- Log message: TargetData is not subclassed. So no need to have virtual method. --- Diffs of the changes: (+1 -1) TargetData.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Target/TargetData.h diff -u llvm/include/llvm/Target/TargetData.h:1.41 llvm/include/llvm/Target/TargetData.h:1.42 --- llvm/include/llvm/Target/TargetData.h:1.41 Tue Oct 24 15:32:14 2006 +++ llvm/include/llvm/Target/TargetData.h Tue Oct 24 15:48:29 2006 @@ -147,7 +147,7 @@ /// getPreferredAlignmentLog - Return the preferred alignment of the /// specified global, returned in log form. This includes an explicitly /// requested alignment (if the global has one). - virtual unsigned getPreferredAlignmentLog(const GlobalVariable *GV) const; + unsigned getPreferredAlignmentLog(const GlobalVariable *GV) const; }; /// StructLayout - used to lazily calculate structure layout information for a ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-poolalloc/lib/Macroscopic/DeadFieldElimination.cpp
Changes in directory llvm-poolalloc/lib/Macroscopic:
DeadFieldElimination.cpp updated: 1.3 -> 1.4
---
Log message:
Updated to newer LLVM API:
1) Changed RegisterOpt to RegisterPass
2) Changed Constant[U|S]Int to ConstantInt
---
Diffs of the changes: (+1 -1)
DeadFieldElimination.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-poolalloc/lib/Macroscopic/DeadFieldElimination.cpp
diff -u llvm-poolalloc/lib/Macroscopic/DeadFieldElimination.cpp:1.3
llvm-poolalloc/lib/Macroscopic/DeadFieldElimination.cpp:1.4
--- llvm-poolalloc/lib/Macroscopic/DeadFieldElimination.cpp:1.3 Wed May 18
14:56:26 2005
+++ llvm-poolalloc/lib/Macroscopic/DeadFieldElimination.cpp Tue Oct 24
16:43:47 2006
@@ -43,7 +43,7 @@
AU.addPreserved();
}
};
- RegisterOpt
+ RegisterPass
X("rds-deadfieldelim", "Macroscopic Dead Field Elimination");
} // end anonymous namespace
___
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[llvm-commits] CVS: llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp PointerCompress.cpp PoolAllocate.cpp PoolOptimize.cpp TransformFunctionBody.cpp
Changes in directory llvm-poolalloc/lib/PoolAllocate:
AccessTrace.cpp updated: 1.5 -> 1.6
PointerCompress.cpp updated: 1.70 -> 1.71
PoolAllocate.cpp updated: 1.125 -> 1.126
PoolOptimize.cpp updated: 1.6 -> 1.7
TransformFunctionBody.cpp updated: 1.56 -> 1.57
---
Log message:
Updated to newer LLVM API:
1) Changed RegisterOpt to RegisterPass
2) Changed Constant[U|S]Int to ConstantInt
---
Diffs of the changes: (+23 -23)
AccessTrace.cpp |2 +-
PointerCompress.cpp | 18 +-
PoolAllocate.cpp | 12 ++--
PoolOptimize.cpp |2 +-
TransformFunctionBody.cpp | 12 ++--
5 files changed, 23 insertions(+), 23 deletions(-)
Index: llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp
diff -u llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp:1.5
llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp:1.6
--- llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp:1.5 Wed Jul 26 10:07:40 2006
+++ llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp Tue Oct 24 16:43:50 2006
@@ -45,7 +45,7 @@
PA::FuncInfo *FI, DSGraph &DSG);
};
- RegisterOpt
+ RegisterPass
X("poolaccesstrace", "Instrument program to print trace of accesses");
}
Index: llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp
diff -u llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.70
llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.71
--- llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp:1.70Wed Jul 26
10:07:40 2006
+++ llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp Tue Oct 24 16:43:50 2006
@@ -163,7 +163,7 @@
Function &F, DSGraph &DSG, PA::FuncInfo *FI);
};
- RegisterOpt
+ RegisterPass
X("pointercompress", "Compress type-safe data structures");
}
@@ -682,11 +682,11 @@
for (unsigned i = 1, e = GEPI.getNumOperands(); i != e; ++i, ++GTI) {
Value *Idx = GEPI.getOperand(i);
if (const StructType *STy = dyn_cast(*GTI)) {
- unsigned Field = (unsigned)cast(Idx)->getValue();
+ uint64_t Field = (unsigned)cast(Idx)->getZExtValue();
if (Field) {
uint64_t FieldOffs = TD.getStructLayout(cast(NTy))
->MemberOffsets[Field];
-Constant *FieldOffsCst = ConstantUInt::get(SCALARUINTTYPE, FieldOffs);
+Constant *FieldOffsCst = ConstantInt::get(SCALARUINTTYPE, FieldOffs);
Val = BinaryOperator::createAdd(Val, FieldOffsCst,
GEPI.getName(), &GEPI);
}
@@ -705,7 +705,7 @@
if (Idx->getType() != SCALARUINTTYPE)
Idx = new CastInst(Idx, SCALARUINTTYPE, Idx->getName(), &GEPI);
-Constant *Scale = ConstantUInt::get(SCALARUINTTYPE,
+Constant *Scale = ConstantInt::get(SCALARUINTTYPE,
TD.getTypeSize(ElTy));
Idx = BinaryOperator::createMul(Idx, Scale, "fieldidx", &GEPI);
Val = BinaryOperator::createAdd(Val, Idx, GEPI.getName(), &GEPI);
@@ -836,11 +836,11 @@
std::vector Ops;
Ops.push_back(CI.getOperand(1));
// Transform to pass in the compressed size.
- Ops.push_back(ConstantUInt::get(Type::UIntTy, PI->getNewSize()));
+ Ops.push_back(ConstantInt::get(Type::UIntTy, PI->getNewSize()));
// Pointer compression can reduce the alignment restriction to 4 bytes from
8.
// Reevaluate the desired alignment.
- Ops.push_back(ConstantUInt::get(Type::UIntTy,
+ Ops.push_back(ConstantInt::get(Type::UIntTy,
PA::Heuristic::getRecommendedAlignment(PI->getNewType(), TD)));
// TODO: Compression could reduce the alignment restriction for the pool!
Value *PB = new CallInst(PtrComp.PoolInitPC, Ops, "", &CI);
@@ -880,11 +880,11 @@
if (OldSizeV != PI->getNewSize()) {
// Emit code to scale the allocated size down by the old size then up by
// the new size. We actually compute (N+OS-1)/OS * NS.
- Value *OldSize = ConstantUInt::get(Type::UIntTy, OldSizeV);
- Value *NewSize = ConstantUInt::get(Type::UIntTy, PI->getNewSize());
+ Value *OldSize = ConstantInt::get(Type::UIntTy, OldSizeV);
+ Value *NewSize = ConstantInt::get(Type::UIntTy, PI->getNewSize());
Size = BinaryOperator::createAdd(Size,
- ConstantUInt::get(Type::UIntTy, OldSizeV-1),
+ ConstantInt::get(Type::UIntTy, OldSizeV-1),
"roundup", &CI);
Size = BinaryOperator::createDiv(Size, OldSize, "numnodes", &CI);
Size = BinaryOperator::createMul(Size, NewSize, "newbytes", &CI);
Index: llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp
diff -u llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.125
llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.126
--- llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp:1.125 Wed Jul 26
10:07:40 2006
+++ llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cppTue Oct 24 16:43:50 2006
@@ -52,9 +52,9 @@
#endif
namespac
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/SignlessTypes/
Changes in directory llvm-test/SingleSource/UnitTests/SignlessTypes: --- Log message: Directory /var/cvs/llvm/llvm-test/SingleSource/UnitTests/SignlessTypes added to the repository --> Using per-directory sticky tag `SignlessTypes' --- Diffs of the changes: (+0 -0) 0 files changed ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile div.c
Changes in directory llvm-test/SingleSource/UnitTests/SignlessTypes:
Makefile added (r1.1)
div.c added (r1.1)
---
Log message:
Add a unit test directory for testing basic operations affected by the
Signless Types feature. This unit tests are aimed at making sure that
various InstCombine transforms continue to work correctly after the
SignlessTypes feature is implemented.
---
Diffs of the changes: (+63 -0)
Makefile |5 +
div.c| 58 ++
2 files changed, 63 insertions(+)
Index: llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile
diff -c /dev/null llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile:1.1
*** /dev/null Tue Oct 24 19:27:58 2006
--- llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile Tue Oct 24
19:27:48 2006
***
*** 0
--- 1,5
+ # SingleSource/UnitTests/Vector/Makefile
+ LEVEL = ../../..
+
+ include $(LEVEL)/Makefile.config
+ include $(LEVEL)/SingleSource/Makefile.singlesrc
Index: llvm-test/SingleSource/UnitTests/SignlessTypes/div.c
diff -c /dev/null llvm-test/SingleSource/UnitTests/SignlessTypes/div.c:1.1
*** /dev/null Tue Oct 24 19:28:03 2006
--- llvm-test/SingleSource/UnitTests/SignlessTypes/div.cTue Oct 24
19:27:48 2006
***
*** 0
--- 1,58
+ /*
+ * This file is used to test division operations in conjunction with
+ * the Signless Types feature. The DIV instruction was replaced with
+ * UDIV, SDIV and FDIV instructions. The tests here are aimed at
+ * triggering InstructionCombining transforms to exercise them and
+ * ensure they are not altering the computed values.
+ */
+
+ #include
+
+ unsigned
+ udivTest1(unsigned X, unsigned Y) {
+
+ unsigned Tally = 0;
+ /* 0 / X == 0 */
+ Tally += 0 / X;
+
+ /* div X, 1 == X */
+ Tally += X / 1;
+
+ /* div X, -1 == -X */
+ Tally += X / -1;
+
+ /* div X, (Cond ? 0 : Y) -> div X, Y. */
+ Tally += ( X == Y ? 0 : Y );
+ Tally += ( X == Y ? ((unsigned)0) : Y );
+
+ /* div X, (Cond ? Y : 0) -> div X, Y */
+ Tally += ( X != Y ? Y : 0 );
+ Tally += ( X != Y ? Y : ((unsigned)0) );
+
+ /* (X / C1) / C2 -> X / (C1*C2) */
+ Tally += ( X / 2 ) / 4;
+ Tally += ( X / ((unsigned)2)) / ((unsigned)4);
+
+ /* X udiv C^2 -> X >> C */
+ Tally += X / 4;
+ Tally += X / ((unsigned)4);
+
+ /* X udiv (C1 << N), where C1 is "1< X >> (N+C2) */
+ Tally += X / (4 << Y);
+ Tally += X / (((unsigned)4) << Y);
+
+ /* udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2)
*/
+ Tally += X / (X == Y, 2, 4);
+ Tally += X / (X == Y, ((unsigned)2), ((unsigned)4));
+
+ /* -X/C -> X/-C */
+ Tally += -X / 2;
+ Tally += -X / ((unsigned)2);
+
+ return Tally;
+ }
+
+ int main(int argc, char**argv) {
+ unsigned result = udivTest1(42, 3);
+ printf("udivTest1(42,17) = %u\n", udivTest1(42,17));
+ }
___
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[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile div.c
Changes in directory llvm-test/SingleSource/UnitTests/SignlessTypes:
Makefile updated: 1.1 -> 1.2
div.c updated: 1.1 -> 1.2
---
Log message:
Fine-grainify the tests so the output will tell us specifically which
optimization is failing.
---
Diffs of the changes: (+76 -35)
Makefile |2 -
div.c| 109 +++
2 files changed, 76 insertions(+), 35 deletions(-)
Index: llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile
diff -u llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile:1.1
llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile:1.2
--- llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile:1.1 Tue Oct 24
19:27:48 2006
+++ llvm-test/SingleSource/UnitTests/SignlessTypes/Makefile Tue Oct 24
19:59:01 2006
@@ -1,5 +1,5 @@
# SingleSource/UnitTests/Vector/Makefile
LEVEL = ../../..
-
+PROG=div
include $(LEVEL)/Makefile.config
include $(LEVEL)/SingleSource/Makefile.singlesrc
Index: llvm-test/SingleSource/UnitTests/SignlessTypes/div.c
diff -u llvm-test/SingleSource/UnitTests/SignlessTypes/div.c:1.1
llvm-test/SingleSource/UnitTests/SignlessTypes/div.c:1.2
--- llvm-test/SingleSource/UnitTests/SignlessTypes/div.c:1.1Tue Oct 24
19:27:48 2006
+++ llvm-test/SingleSource/UnitTests/SignlessTypes/div.cTue Oct 24
19:59:01 2006
@@ -8,51 +8,92 @@
#include
-unsigned
-udivTest1(unsigned X, unsigned Y) {
-
- unsigned Tally = 0;
+unsigned uDivTest1(unsigned X, unsigned Y) {
/* 0 / X == 0 */
- Tally += 0 / X;
-
+ return 0 / X;
+}
+unsigned uDivTest2(unsigned X, unsigned Y) {
/* div X, 1 == X */
- Tally += X / 1;
-
+ return X / 1;
+}
+unsigned uDivTest3(unsigned X, unsigned Y) {
/* div X, -1 == -X */
- Tally += X / -1;
-
+ return X / -1;
+}
+unsigned uDivTest4(unsigned X, unsigned Y) {
/* div X, (Cond ? 0 : Y) -> div X, Y. */
- Tally += ( X == Y ? 0 : Y );
- Tally += ( X == Y ? ((unsigned)0) : Y );
-
+ return ( X == Y ? 0 : Y );
+}
+unsigned uDivTest5(unsigned X, unsigned Y) {
+ /* div X, (Cond ? 0 : Y) -> div X, Y. */
+ return ( X == Y ? ((unsigned)0) : Y );
+}
+unsigned uDivTest6(unsigned X, unsigned Y) {
/* div X, (Cond ? Y : 0) -> div X, Y */
- Tally += ( X != Y ? Y : 0 );
- Tally += ( X != Y ? Y : ((unsigned)0) );
-
+ return ( X != Y ? Y : 0 );
+}
+unsigned uDivTest7(unsigned X, unsigned Y) {
+ /* div X, (Cond ? Y : 0) -> div X, Y */
+ return ( X != Y ? Y : ((unsigned)0) );
+}
+unsigned uDivTest8(unsigned X, unsigned Y) {
/* (X / C1) / C2 -> X / (C1*C2) */
- Tally += ( X / 2 ) / 4;
- Tally += ( X / ((unsigned)2)) / ((unsigned)4);
-
+ return ( X / 2 ) / 4;
+}
+unsigned uDivTest9(unsigned X, unsigned Y) {
+ /* (X / C1) / C2 -> X / (C1*C2) */
+ return ( X / ((unsigned)2)) / ((unsigned)4);
+}
+unsigned uDivTest10(unsigned X, unsigned Y) {
/* X udiv C^2 -> X >> C */
- Tally += X / 4;
- Tally += X / ((unsigned)4);
-
+ return X / 4;
+}
+unsigned uDivTest11(unsigned X, unsigned Y) {
+ /* X udiv C^2 -> X >> C */
+ return X / ((unsigned)4);
+}
+unsigned uDivTest12(unsigned X, unsigned Y) {
/* X udiv (C1 << N), where C1 is "1< X >> (N+C2) */
- Tally += X / (4 << Y);
- Tally += X / (((unsigned)4) << Y);
-
+ return X / (4 << Y);
+}
+unsigned uDivTest13(unsigned X, unsigned Y) {
+ /* X udiv (C1 << N), where C1 is "1< X >> (N+C2) */
+ return X / (((unsigned)4) << Y);
+}
+unsigned uDivTest14(unsigned X, unsigned Y) {
/* udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) */
- Tally += X / (X == Y, 2, 4);
- Tally += X / (X == Y, ((unsigned)2), ((unsigned)4));
-
+ return X / (X == Y, 2, 4);
+}
+unsigned uDivTest15(unsigned X, unsigned Y) {
+ /* udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2) */
+ return X / (X == Y, ((unsigned)2), ((unsigned)4));
+}
+unsigned uDivTest16(unsigned X, unsigned Y) {
/* -X/C -> X/-C */
- Tally += -X / 2;
- Tally += -X / ((unsigned)2);
-
- return Tally;
+ return -X / 2;
+}
+unsigned uDivTest17(unsigned X, unsigned Y) {
+ /* -X/C -> X/-C */
+ return -X / ((unsigned)2);
}
int main(int argc, char**argv) {
- unsigned result = udivTest1(42, 3);
- printf("udivTest1(42,17) = %u\n", udivTest1(42,17));
+ printf("uDivTest1(42,3) = %u\n", uDivTest1(42,3));
+ printf("uDivTest2(42,3) = %u\n", uDivTest2(42,3));
+ printf("uDivTest3(42,3) = %u\n", uDivTest3(42,3));
+ printf("uDivTest4(42,3) = %u\n", uDivTest4(42,3));
+ printf("uDivTest5(42,3) = %u\n", uDivTest5(42,3));
+ printf("uDivTest6(42,3) = %u\n", uDivTest6(42,3));
+ printf("uDivTest7(42,3) = %u\n", uDivTest7(42,3));
+ printf("uDivTest8(42,3) = %u\n", uDivTest8(42,3));
+ printf("uDivTest9(42,3) = %u\n", uDivTest9(42,3));
+ printf("uDivTest10(42,3) = %u\n", uDivTest10(42,3));
+ printf("uDivTest11(42,3) = %u\n", uDivTest11(42,3));
+ printf("uDivTest12(42,3) = %u\n", uDivTest12(42,3));
+ printf("uDivTest13(42,3) = %u\n", uDivTest13(42,3));
+ printf("uDivTest14(42,3) = %u\n", uDivTest14(42,3));
+ printf("uDivTest15(42,3
Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review (Followup)
Chris,
Here's my InstCombine feedback ..
On Mon, 2006-10-23 at 22:52 -0700, Chris Lattner wrote:
>
> Index: lib/Transforms/Scalar/InstructionCombining.cpp
> ===
> RCS
> file: /var/cvs/llvm/llvm/lib/Transforms/Scalar/InstructionCombining.cpp,v
> retrieving revision 1.527
> diff -t -d -u -p -5 -r1.527 InstructionCombining.cpp
> --- lib/Transforms/Scalar/InstructionCombining.cpp 20 Oct 2006
> 18:20:21 - 1.527
> +++ lib/Transforms/Scalar/InstructionCombining.cpp 23 Oct 2006
> 02:43:34 -
> @@ -1973,15 +1979,15 @@ Instruction *InstCombiner::visitSub(Bina
>InsertNewInstBefore(BinaryOperator::createNot(OtherOp,
> "B.not"), I);
> return BinaryOperator::createAnd(Op0, NewNot);
>}
>
>
>// 0 - (X sdiv C) -> (X sdiv -C)
> - if (Op1I->getOpcode() == Instruction::Div)
> + if (Op1I->getOpcode() == Instruction::SDiv)
> if (ConstantInt *CSI = dyn_cast(Op0))
>if (CSI->getType()->isSigned() && CSI->isNullValue())
> if (Constant *DivRHS =
> dyn_cast(Op1I->getOperand(1)))
> - return BinaryOperator::createDiv(Op1I->getOperand(0),
> + return BinaryOperator::createSDiv(Op1I->getOperand(0),
>
> ConstantExpr::getNeg(DivRHS));
>
>
> *** You should be able to drop the 'CSI->getType()->isSigned()' check.
Yup. Done.
>
>
>
>
> +// (X / C1) / C2 -> X / (C1*C2)
> if (Instruction *LHS = dyn_cast(Op0))
> - if (LHS->getOpcode() == Instruction::Div)
> + if (LHS->getOpcode() == Instruction::SDiv ||
> + LHS->getOpcode()==Instruction::UDiv ||
> + LHS->getOpcode()==Instruction::FDiv)
>
>
> *** This isn't quite right. This will miscompile ((X sdiv C1) udiv
> C2). You want something like:
>
>
> // (X / C1) / C2 -> X / (C1*C2)
> if (Instruction *LHS = dyn_cast(Op0))
> if (LHS->getOpcode() == I.getOpcode())
>
>
> which is also simpler.
Right. Done.
>
>
> if (ConstantInt *LHSRHS =
> dyn_cast(LHS->getOperand(1))) {
> - // (X / C1) / C2 -> X / (C1*C2)
> - return BinaryOperator::createDiv(LHS->getOperand(0),
> - ConstantExpr::getMul(RHS,
> LHSRHS));
> + return BinaryOperator::create(
> +Instruction::BinaryOps(LHS->getOpcode()),
> LHS->getOperand(0),
> + ConstantExpr::getMul(RHS,
> LHSRHS));
> }
>
>
> *** If you use I.getOpcode(), you can drop the BinaryOps cast.
>
>
Done.
>
>
> *** Why not have commonIDivTransforms call commonDivTransforms? It
> would be nicer to just have:
>
>
> + if (Instruction *Common = commonIDivTransforms(I))
> +return Common;
>
Done.
>
> Also, please try to stick with the established style when modifying
> existing code. In this case, putting the '*' in the right place,
> capitalizing variables, etc.
>
Old habits die hard. I've had it drilled into my head for decades that
putting the * next to the var name is the *wrong* place to put it as the
* modifies the type not the var. I'll try to retain style consistency,
however.
>
> + // Check to see if this is an unsigned division with an exact power
> of 2,
> + // if so, convert to a right shift.
> + // X udiv C^2 -> X >> C
> + if (ConstantInt *C = dyn_cast(Op1)) {
> +if (uint64_t Val = C->getZExtValue())// Don't break X / 0
> + if (isPowerOf2_64(Val)) {
> +uint64_t C = Log2_64(Val);
> +return new ShiftInst(Instruction::Shr, Op0,
> + ConstantInt::get(Type::UByteTy, C));
> + }
> + }
>
>
> *** This will assert and die on something like 'udiv int %C, 64'. You
> need to insert casts of the input value and of the output result if
> the operands/result is signed. This specific issue goes away when
> shifts are split up.
Okay.
>
>
> + if (Instruction *RHSI = dyn_cast(I.getOperand(1))) {
> +// Turn A / (C1 << N), where C1 is "1<> (N+C2) [udiv
> only].
> +if (RHSI->getOpcode() == Instruction::Shl &&
> +isa(RHSI->getOperand(0)) &&
> +RHSI->getOperand(0)->getType()->isUnsigned()) {
> + uint64_t C1 =
> cast(RHSI->getOperand(0))->getZExtValue();
> + if (isPowerOf2_64(C1)) {
> +uint64_t C2 = Log2_64(C1);
> +Value *Add = RHSI->getOperand(1);
> +if (C2) {
> + Constant *C2V = ConstantInt::get(Add->getType(), C2);
> + Add = InsertNewInstBefore(BinaryOperator::createAdd(Add,
> C2V,
> + "tmp"),
> I);
> }
> +return new ShiftInst(Instruction::Shr, Op0, Add);
>}
> }
>}
>
>
> *** This code doesn't need to check
> 'RHSI->getOperand(0)->getType()->isUnsigned()', but that will make you
> have to handle the signed case right (inserting casts).
Okay.
>
>
> + // If the sign bits of both operands are zero (i.e. we can prove
> they are
> + // unsigned i
Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review
>
>> It would be more clear to return 0 here explicitly and mention in the
>> method comment that this returns null if no upgrading is needed.
>
> Except that's not quite the case. The function can return 0 but alter
> the OpCode argument. I'll fix the comment to explain in more detail.
Great, thx.
>> *** This is flat out incorrect. It should have separate
>> execute*DivInst functions that do the operation not based on the
>> type.
>> This would misinterpret 'udiv int -4, 2' for example. This must be
>> fixed before you checkin.
>>
> Another casualty of thinking the operand types had to match the
> instruction type. I've created the three functions. The SDiv case now
> looks like:
>
> static GenericValue executeSDivInst(GenericValue Src1, GenericValue
> Src2,
>const Type *Ty) {
*snip*
Looks good.
>> *** The CBE has the same problem. You need to force the operands to
>> the right sign in the C output so that the C compiler will generate
>> the appropriately signed operation. This must be fixed before you
>> checkin.
>
> Yes. Done. I added a writeOperandWithCast(Value*, unsigned opcode)
> method to the CWriter. It writes the operand with the correct cast
> based
> on the opcode the value is used with. I call this instead of
> writeOperand(Value*) to write the operands for these binary operators
> (just before and after the switch statement you quoted above).
Sounds good. Make sure that the result also ends up as the right
type though.
>> You properly sign/zero extend the values here, but then proceed to do
>> the wrong division. For example, this will do signed division for
>> 'udiv int -2, 2'. What does the -constfold pass produce for:
>>
>>
>> int %test() { %X = udiv int -2, 2 ret int %X }
>>
>>
>> I bet it is folded to -1, which is incorrect.
>
> There's no -constfold pass on opt, but I ran it through gccas and yes,
> it does produce -1. I fixed it by changing:
Sorry, -constprop.
> BuiltinType R =
>> (BuiltinType)V1->getSExtValue() / (BuiltinType)V2->getSExtValue();
>
> to:
>
> BuiltinType R = (BuiltinType)(V1->getSExtValue() / V2->getSExtValue
> ());
>
> That produced the value of 2147483647 ((MAX_UINT-1)/2) for your test
> case which I think is correct. Please confirm.
Sounds right. getSExtValue returns a signed type, forcing a signed
operation. You do the same for udiv, right?
>> Constant *ConstantExpr::getAnd(Constant *C1, Constant *C2) {
>>
>>
>> *** This would be an excellent place to assert that the arguments are
>> integer or fp (or vectors of) as appropriate.
>
> All of these cases call ConstantExpr::get(Opcode, C1, C2). That
> function
> provides copious asserts. I didn't think it was reasonable to double
> them up, especially since the asserts in ConstantExpr::get are ifdef'd
> for debug only. I took that to mean that they were performance
> sensitive
> for a release+asserts build. Let me know if that's not the case (i.e.
> if I should remove the #ifndef DEBUG code in ConstantExpr::get).
>
> I looked at ConstantExpr::get and tightened up the asserts there.
> It was
> allowing FP for UDiv and SDiv and integer for FDiv. Now it doesn't.
Sounds good!
-Chris
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Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review (Followup #2)
On Mon, 2006-10-23 at 22:52 -0700, Chris Lattner wrote: > I strongly recommend adding a transformation to instcombine that will > produce more divs with such operands. For example, changing something > like: > > %X = cast uint %A to int > %Y = sdiv int %X, 1234 > %Z = cast int %Y to uint > into: >%Z = sdiv uint %A, 1234 > Fortunately, instcombine already does this for other operations > (mul/add/and/or/xor, etc) at line 5658 of Instcombine in CVS. Please > add a case there for UDIV/SDIV. This will hopefully help flush out > bugs in the patch that I didn't catch. I took a look at doing this but there are corner cases I'm dealing with. If the input is: %X = cast uint %A to int %Y = sdiv int %X, -1234 %Z = cast int %Y to uint then its a little more challenging to make the sdiv work with unsigned operands. So I'm assuming this only works with positive constants. There are other corner cases too, like if the 2nd operand isn't a constant but an instruction. I would rather not risk breaking things now by trying to add a new transform. After implementing all your other suggestions the patch is passing all the tests. Can we implement this later? Reid. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review (Followup)
>> Also, please try to stick with the established style when modifying >> existing code. In this case, putting the '*' in the right place, >> capitalizing variables, etc. >> > Old habits die hard. I've had it drilled into my head for decades that > putting the * next to the var name is the *wrong* place to put it > as the > * modifies the type not the var. I'll try to retain style consistency, > however. I agree with the theoretical idea behind that style, but... :) >> The cast sequence *is* needed for converting stuff to shifts etc, >> above. > > I'm not following this comment. What cast sequence? The one where > we're > trying to turn it into a udiv if the sign bits are zero? If so, that > contradicts your simplification for this transform. The specific transform this was attached to get simpler (no casts) but others get temporarily nastier (new casts) until other operations become signless. >> in the commonIDivTransforms method, but it is specific to udiv. >> Please move it to the udiv case, and make it insert casts etc as >> needed. > > Actually, I think I lost it completely. I don't see this in my file. I > added it back to the udiv case as a separate transform. It now checks > for the STO==0 and SFO==0 cases because they are no longer "handled > above" (the "above" code is in commonDivTransforms). Ok. >> *** This is subtly buggy. If you look at how MulWithOverflow is >> used, >> it is called from the "Fold: (div X, C1) op C2 -> range check" case. >> You need to pass in whether or not the *operation* is signed or >> unsigned, ignoring the sign of the values. > > MulWithOverflow isn't used elsewhere in the file so I merged it into > visitSelectCC so its a little more clear what's going on. No point > making a function with 4 arguments called from only one place. Ok, though sometimes names do give useful info to the reader. A comment does just the same though. Thx Reid, -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] DIV -> U/S/FDiv Patch For Review (Followup #2)
On Oct 24, 2006, at 9:45 PM, Reid Spencer wrote: > On Mon, 2006-10-23 at 22:52 -0700, Chris Lattner wrote: > >> I strongly recommend adding a transformation to instcombine that will >> produce more divs with such operands. For example, changing >> something >> like: >> >> %X = cast uint %A to int >> %Y = sdiv int %X, 1234 >> %Z = cast int %Y to uint >> into: >>%Z = sdiv uint %A, 1234 >> Fortunately, instcombine already does this for other operations >> (mul/add/and/or/xor, etc) at line 5658 of Instcombine in CVS. Please >> add a case there for UDIV/SDIV. This will hopefully help flush out >> bugs in the patch that I didn't catch. > > I took a look at doing this but there are corner cases I'm dealing > with. > If the input is: > > %X = cast uint %A to int > %Y = sdiv int %X, -1234 > %Z = cast int %Y to uint > > then its a little more challenging to make the sdiv work with unsigned > operands. So I'm assuming this only works with positive constants. > There are other corner cases too, like if the 2nd operand isn't a > constant but an instruction. > > I would rather not risk breaking things now by trying to add a new > transform. After implementing all your other suggestions the patch is > passing all the tests. I don't follow. The existing code should transform this into: %Z = sdiv uint %A, 4294966062 This is exactly what you want. "4294966062" treated as a signed value (which is what sdiv does) is -1234. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
