[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopUnswitch.cpp updated: 1.40 -> 1.41
---
Log message:
Make LoopUnswitch able to unswitch loops with live-out values by taking
advantage
of LCSSA. This results several times the number of unswitchings occurring on
tests such and timberwolfmc, unix-tbl, and ldecod.
---
Diffs of the changes: (+63 -53)
LoopUnswitch.cpp | 116 +--
1 files changed, 63 insertions(+), 53 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.40
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.41
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.40Tue Jun 13 23:46:17 2006
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Mon Jun 26 02:44:36 2006
@@ -208,31 +208,6 @@
return Changed;
}
-
-/// LoopValuesUsedOutsideLoop - Return true if there are any values defined in
-/// the loop that are used by instructions outside of it.
-static bool LoopValuesUsedOutsideLoop(Loop *L) {
- // We will be doing lots of "loop contains block" queries. Loop::contains is
- // linear time, use a set to speed this up.
- std::set LoopBlocks;
-
- for (Loop::block_iterator BB = L->block_begin(), E = L->block_end();
- BB != E; ++BB)
-LoopBlocks.insert(*BB);
-
- for (Loop::block_iterator BB = L->block_begin(), E = L->block_end();
- BB != E; ++BB) {
-for (BasicBlock::iterator I = (*BB)->begin(), E = (*BB)->end(); I != E;
++I)
- for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E;
- ++UI) {
-BasicBlock *UserBB = cast(*UI)->getParent();
-if (!LoopBlocks.count(UserBB))
- return true;
- }
- }
- return false;
-}
-
/// isTrivialLoopExitBlock - Check to see if all paths from BB either:
/// 1. Exit the loop with no side effects.
/// 2. Branch to the latch block with no side-effects.
@@ -391,17 +366,7 @@
<< L->getBlocks().size() << "\n");
return false;
}
-
- // If this loop has live-out values, we can't unswitch it. We need something
- // like loop-closed SSA form in order to know how to insert PHI nodes for
- // these values.
- if (LoopValuesUsedOutsideLoop(L)) {
-DEBUG(std::cerr << "NOT unswitching loop %" << L->getHeader()->getName()
-<< ", a loop value is used outside loop! Cost: "
-<< Cost << "\n");
-return false;
- }
-
+
// If this is a trivial condition to unswitch (which results in no code
// duplication), do it now.
Constant *CondVal;
@@ -456,18 +421,6 @@
// If the successor only has a single pred, split the top of the successor
// block.
assert(SP == BB && "CFG broken");
-
-// If this block has a single predecessor, remove any phi nodes. Unswitch
-// expect that, after split the edges from inside the loop to the exit
-// block, that there will be no phi nodes in the new exit block. Single
-// entry phi nodes break this assumption.
-BasicBlock::iterator I = Succ->begin();
-while (PHINode *PN = dyn_cast(I)) {
- PN->replaceAllUsesWith(PN->getIncomingValue(0));
- PN->eraseFromParent();
- I = Succ->begin();
-}
-
return SplitBlock(Succ, Succ->begin());
} else {
// Otherwise, if BB has a single successor, split it at the bottom of the
@@ -616,8 +569,8 @@
ExitBlocks.erase(std::unique(ExitBlocks.begin(), ExitBlocks.end()),
ExitBlocks.end());
- // Split all of the edges from inside the loop to their exit blocks. This
- // unswitching trivial: no phi nodes to update.
+ // Split all of the edges from inside the loop to their exit blocks. Update
+ // the appropriate Phi nodes as we do so.
unsigned NumBlocks = L->getBlocks().size();
for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) {
@@ -627,8 +580,42 @@
for (unsigned j = 0, e = Preds.size(); j != e; ++j) {
assert(L->contains(Preds[j]) &&
"All preds of loop exit blocks must be the same loop!");
- SplitEdge(Preds[j], ExitBlock);
-}
+ BasicBlock* MiddleBlock = SplitEdge(Preds[j], ExitBlock);
+ BasicBlock* StartBlock = Preds[j];
+ BasicBlock* EndBlock;
+ if (MiddleBlock->getSinglePredecessor() == ExitBlock) {
+EndBlock = MiddleBlock;
+MiddleBlock = EndBlock->getSinglePredecessor();;
+ } else {
+EndBlock = ExitBlock;
+ }
+
+ std::set InsertedPHIs;
+ PHINode* OldLCSSA = 0;
+ for (BasicBlock::iterator I = EndBlock->begin();
+ (OldLCSSA = dyn_cast(I)); ++I) {
+Value* OldValue = OldLCSSA->getIncomingValueForBlock(MiddleBlock);
+PHINode* NewLCSSA = new PHINode(OldLCSSA->getType(),
+OldLCSSA->getName() + ".us-lcssa",
+MiddleBlock->getTerminator());
+NewLCSSA->addIncoming(OldValue, StartBlock);
+O
[llvm-commits] CVS: CVSROOT/loginfo
Changes in directory CVSROOT:
loginfo updated: 1.11 -> 1.12
---
Log message:
Use a local script for delivering mail since I need to send it to two
email addresses.
Yes, I know it's a hack.
---
Diffs of the changes: (+1 -1)
loginfo |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: CVSROOT/loginfo
diff -u CVSROOT/loginfo:1.11 CVSROOT/loginfo:1.12
--- CVSROOT/loginfo:1.11Thu Jun 22 11:07:42 2006
+++ CVSROOT/loginfo Mon Jun 26 10:55:56 2006
@@ -28,5 +28,5 @@
^reopt /home/vadve/shared/PublicCVS/CVSROOT/commit-diffs.pl %{sVv}
llvm-commits@cs.uiuc.edu
^llva-emu /home/vadve/shared/PublicCVS/CVSROOT/commit-diffs.pl %{sVv} [EMAIL
PROTECTED]
^llvm-java /home/vadve/shared/PublicCVS/CVSROOT/commit-diffs.pl %{sVv}
llvm-commits@cs.uiuc.edu
-^privbracket /home/vadve/shared/PublicCVS/CVSROOT/commit-diffs.pl %{sVv}
[EMAIL PROTECTED]
+^privbracket /home/vadve/criswell/local/common/bin/commit-diffs.pl %{sVv}
[EMAIL PROTECTED]
^CVSROOT /home/vadve/shared/PublicCVS/CVSROOT/commit-diffs.pl %{sVv}
llvm-commits@cs.uiuc.edu
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/Makefile.programs
Changes in directory llvm-test: Makefile.programs updated: 1.218 -> 1.219 --- Log message: Add a make file target so the nightly tester can know what llc-beta means for a night. --- Diffs of the changes: (+3 -0) Makefile.programs |3 +++ 1 files changed, 3 insertions(+) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.218 llvm-test/Makefile.programs:1.219 --- llvm-test/Makefile.programs:1.218 Sat Jun 24 03:43:23 2006 +++ llvm-test/Makefile.programs Mon Jun 26 13:14:59 2006 @@ -203,6 +203,9 @@ LLCBETAOPTION := -enable-sparc-v9-insts endif +print-llcbeta-option: + @echo $(LLCBETAOPTION) + # Given a version of the entire program linked together into a single unit of # raw output from the C frontend, optimize it. $(PROGRAMS_TO_TEST:%=Output/%.linked.bc): \ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LICM.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LICM.cpp updated: 1.76 -> 1.77
---
Log message:
random code cleanups, no functionality change
---
Diffs of the changes: (+8 -9)
LICM.cpp | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
Index: llvm/lib/Transforms/Scalar/LICM.cpp
diff -u llvm/lib/Transforms/Scalar/LICM.cpp:1.76
llvm/lib/Transforms/Scalar/LICM.cpp:1.77
--- llvm/lib/Transforms/Scalar/LICM.cpp:1.76Sun Jan 22 17:32:06 2006
+++ llvm/lib/Transforms/Scalar/LICM.cpp Mon Jun 26 14:10:05 2006
@@ -335,7 +335,7 @@
//
if (isLoopInvariantInst(I) && canSinkOrHoistInst(I) &&
isSafeToExecuteUnconditionally(I))
- hoist(I);
+hoist(I);
}
const std::vector &Children = N->getChildren();
@@ -386,8 +386,7 @@
}
return isa(I) || isa(I) || isa(I) ||
- isa(I) ||
- isa(I);
+ isa(I) || isa(I);
}
/// isNotUsedInLoop - Return true if the only users of this instruction are
@@ -448,11 +447,11 @@
if (!isExitBlockDominatedByBlockInLoop(ExitBlocks[0], I.getParent())) {
// Instruction is not used, just delete it.
CurAST->deleteValue(&I);
- I.getParent()->getInstList().erase(&I);
+ I.eraseFromParent();
} else {
// Move the instruction to the start of the exit block, after any PHI
// nodes in it.
- I.getParent()->getInstList().remove(&I);
+ I.removeFromParent();
BasicBlock::iterator InsertPt = ExitBlocks[0]->begin();
while (isa(InsertPt)) ++InsertPt;
@@ -461,7 +460,7 @@
} else if (ExitBlocks.size() == 0) {
// The instruction is actually dead if there ARE NO exit blocks.
CurAST->deleteValue(&I);
-I.getParent()->getInstList().erase(&I);
+I.eraseFromParent();
} else {
// Otherwise, if we have multiple exits, use the PromoteMem2Reg function to
// do all of the hard work of inserting PHI nodes as necessary. We convert
@@ -526,7 +525,7 @@
// the copy.
Instruction *New;
if (InsertedBlocks.size() == 1) {
-I.getParent()->getInstList().remove(&I);
+I.removeFromParent();
ExitBlock->getInstList().insert(InsertPt, &I);
New = &I;
} else {
@@ -546,7 +545,7 @@
// If the instruction doesn't dominate any exit blocks, it must be dead.
if (InsertedBlocks.empty()) {
CurAST->deleteValue(&I);
- I.getParent()->getInstList().erase(&I);
+ I.eraseFromParent();
}
// Finally, promote the fine value to SSA form.
@@ -567,7 +566,7 @@
// Remove the instruction from its current basic block... but don't delete
the
// instruction.
- I.getParent()->getInstList().remove(&I);
+ I.removeFromParent();
// Insert the new node in Preheader, before the terminator.
Preheader->getInstList().insert(Preheader->getTerminator(), &I);
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Analysis/AliasSetTracker.h
Changes in directory llvm/include/llvm/Analysis:
AliasSetTracker.h updated: 1.26 -> 1.27
---
Log message:
Add a new method.
---
Diffs of the changes: (+7 -0)
AliasSetTracker.h |7 +++
1 files changed, 7 insertions(+)
Index: llvm/include/llvm/Analysis/AliasSetTracker.h
diff -u llvm/include/llvm/Analysis/AliasSetTracker.h:1.26
llvm/include/llvm/Analysis/AliasSetTracker.h:1.27
--- llvm/include/llvm/Analysis/AliasSetTracker.h:1.26 Wed Nov 30 13:31:23 2005
+++ llvm/include/llvm/Analysis/AliasSetTracker.hMon Jun 26 14:20:25 2006
@@ -228,6 +228,13 @@
void addPointer(AliasSetTracker &AST, HashNodePair &Entry, unsigned Size,
bool KnownMustAlias = false);
void addCallSite(CallSite CS, AliasAnalysis &AA);
+ void removeCallSite(CallSite CS) {
+for (unsigned i = 0, e = CallSites.size(); i != e; ++i)
+ if (CallSites[i].getInstruction() == CS.getInstruction()) {
+CallSites[i] = CallSites.back();
+CallSites.pop_back();
+ }
+ }
void setVolatile() { Volatile = true; }
/// aliasesPointer - Return true if the specified pointer "may" (or must)
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/AliasSetTracker.cpp
Changes in directory llvm/lib/Analysis:
AliasSetTracker.cpp updated: 1.37 -> 1.38
---
Log message:
Fix a stale pointer issue that caused 300.twolf to fail to build on zion
last night.
---
Diffs of the changes: (+11 -0)
AliasSetTracker.cpp | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/lib/Analysis/AliasSetTracker.cpp
diff -u llvm/lib/Analysis/AliasSetTracker.cpp:1.37
llvm/lib/Analysis/AliasSetTracker.cpp:1.38
--- llvm/lib/Analysis/AliasSetTracker.cpp:1.37 Tue Jan 3 00:05:22 2006
+++ llvm/lib/Analysis/AliasSetTracker.cpp Mon Jun 26 14:20:48 2006
@@ -435,6 +435,17 @@
// Notify the alias analysis implementation that this value is gone.
AA.deleteValue(PtrVal);
+ // If this is a call instruction, remove the callsite from the appropriate
+ // AliasSet.
+ CallSite CS = CallSite::get(PtrVal);
+ if (CS.getInstruction()) {
+Function *F = CS.getCalledFunction();
+if (!F || !AA.doesNotAccessMemory(F)) {
+ if (AliasSet *AS = findAliasSetForCallSite(CS))
+AS->removeCallSite(CS);
+}
+ }
+
// First, look up the PointerRec for this pointer.
hash_map::iterator I = PointerMap.find(PtrVal);
if (I == PointerMap.end()) return; // Noop
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC: PPCInstrInfo.td updated: 1.232 -> 1.233 --- Log message: remove two unused instructions. --- Diffs of the changes: (+0 -4) PPCInstrInfo.td |4 1 files changed, 4 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.232 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.233 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.232 Tue Jun 20 18:21:20 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Mon Jun 26 17:44:13 2006 @@ -423,12 +423,8 @@ [(set GPRC:$dst, (xor GPRC:$src1,imm16ShiftedZExt:$src2))]>; def NOP : DForm_4_zero<24, (ops), "nop", IntGeneral, []>; -def CMPI : DForm_5<11, (ops CRRC:$crD, i1imm:$L, GPRC:$rA, s16imm:$imm), -"cmpi $crD, $L, $rA, $imm", IntCompare>; def CMPWI : DForm_5_ext<11, (ops CRRC:$crD, GPRC:$rA, s16imm:$imm), "cmpwi $crD, $rA, $imm", IntCompare>; -def CMPLI : DForm_6<10, (ops CRRC:$dst, i1imm:$size, GPRC:$src1, u16imm:$src2), - "cmpli $dst, $size, $src1, $src2", IntCompare>; def CMPLWI : DForm_6_ext<10, (ops CRRC:$dst, GPRC:$src1, u16imm:$src2), "cmplwi $dst, $src1, $src2", IntCompare>; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC: PPCInstrInfo.td updated: 1.233 -> 1.234 --- Log message: Remove two more definitions --- Diffs of the changes: (+0 -4) PPCInstrInfo.td |4 1 files changed, 4 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.233 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.234 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.233 Mon Jun 26 17:44:13 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Mon Jun 26 17:47:37 2006 @@ -530,10 +530,6 @@ "extsh $rA, $rS", IntGeneral, [(set GPRC:$rA, (sext_inreg GPRC:$rS, i16))]>; -def CMP: XForm_16<31, 0, (ops CRRC:$crD, i1imm:$long, GPRC:$rA, GPRC:$rB), - "cmp $crD, $long, $rA, $rB", IntCompare>; -def CMPL : XForm_16<31, 32, (ops CRRC:$crD, i1imm:$long, GPRC:$rA, GPRC:$rB), - "cmpl $crD, $long, $rA, $rB", IntCompare>; def CMPW : XForm_16_ext<31, 0, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB), "cmpw $crD, $rA, $rB", IntCompare>; def CMPLW : XForm_16_ext<31, 32, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB), ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.191 -> 1.192
---
Log message:
Improve PPC64 calling convention support
---
Diffs of the changes: (+84 -37)
PPCISelLowering.cpp | 121
1 files changed, 84 insertions(+), 37 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.191
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.192
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.191 Tue Jun 20 19:34:03 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Jun 26 17:48:35 2006
@@ -733,8 +733,8 @@
Op.getOperand(1), Op.getOperand(2));
}
-static SDOperand LowerFORMAL_ARGUMENTS_32(SDOperand Op, SelectionDAG &DAG,
- int &VarArgsFrameIndex) {
+static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
+ int &VarArgsFrameIndex) {
// TODO: add description of PPC stack frame format, or at least some docs.
//
MachineFunction &MF = DAG.getMachineFunction();
@@ -748,10 +748,15 @@
const unsigned Num_FPR_Regs = 13;
const unsigned Num_VR_Regs = 12;
unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0;
- static const unsigned GPR[] = {
+
+ static const unsigned GPR_32[] = { // 32-bit registers.
PPC::R3, PPC::R4, PPC::R5, PPC::R6,
PPC::R7, PPC::R8, PPC::R9, PPC::R10,
};
+ static const unsigned GPR_64[] = { // 64-bit registers.
+PPC::X3, PPC::X4, PPC::X5, PPC::X6,
+PPC::X7, PPC::X8, PPC::X9, PPC::X10,
+ };
static const unsigned FPR[] = {
PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7,
PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13
@@ -760,6 +765,10 @@
PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
};
+
+ MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
+ bool isPPC64 = PtrVT == MVT::i64;
+ const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32;
// Add DAG nodes to load the arguments or copy them out of registers. On
// entry to a function on PPC, the arguments start at offset 24, although the
@@ -771,12 +780,11 @@
unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
unsigned CurArgOffset = ArgOffset;
-
switch (ObjectVT) {
default: assert(0 && "Unhandled argument type!");
case MVT::i32:
// All int arguments reserve stack space.
- ArgOffset += 4;
+ ArgOffset += isPPC64 ? 8 : 4;
if (GPR_idx != Num_GPR_Regs) {
unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
@@ -787,6 +795,19 @@
needsLoad = true;
}
break;
+case MVT::i64: // PPC64
+ // All int arguments reserve stack space.
+ ArgOffset += 8;
+
+ if (GPR_idx != Num_GPR_Regs) {
+unsigned VReg = RegMap->createVirtualRegister(&PPC::G8RCRegClass);
+MF.addLiveIn(GPR[GPR_idx], VReg);
+ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i64);
+++GPR_idx;
+ } else {
+needsLoad = true;
+ }
+ break;
case MVT::f32:
case MVT::f64:
// All FP arguments reserve stack space.
@@ -838,7 +859,7 @@
// slot.
if (!Op.Val->hasNUsesOfValue(0, ArgNo)) {
int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset);
-SDOperand FIN = DAG.getFrameIndex(FI, MVT::i32);
+SDOperand FIN = DAG.getFrameIndex(FI, PtrVT);
ArgVal = DAG.getLoad(ObjectVT, Root, FIN,
DAG.getSrcValue(NULL));
} else {
@@ -854,8 +875,9 @@
// the start of the first vararg value... for expansion of llvm.va_start.
bool isVarArg = cast(Op.getOperand(2))->getValue() != 0;
if (isVarArg) {
-VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset);
-SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32);
+VarArgsFrameIndex = MFI->CreateFixedObject(MVT::getSizeInBits(PtrVT)/8,
+ ArgOffset);
+SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
// If this function is vararg, store any remaining integer argument regs
// to their spots on the stack so that they may be loaded by deferencing
the
// result of va_next.
@@ -863,13 +885,13 @@
for (; GPR_idx != Num_GPR_Regs; ++GPR_idx) {
unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
MF.addLiveIn(GPR[GPR_idx], VReg);
- SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i32);
+ SDOperand Val = DAG.getCopyFromReg(Root, VReg, PtrVT);
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
Val, FIN, DAG.getSrcValue(NULL));
MemOps.push_back(Store);
// Increment the address by four for the next argument to store
- SDOperand PtrOff = DAG.getConstant(4, M
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.10 -> 1.11
---
Log message:
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
---
Diffs of the changes: (+20 -8)
PPCInstr64Bit.td | 28
1 files changed, 20 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.10
llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.11
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.10 Tue Jun 20 18:18:58 2006
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.tdMon Jun 26 18:53:10 2006
@@ -15,6 +15,12 @@
//===--===//
// 64-bit operands.
//
+def s16imm64 : Operand {
+ let PrintMethod = "printS16ImmOperand";
+}
+def u16imm64 : Operand {
+ let PrintMethod = "printU16ImmOperand";
+}
def symbolHi64 : Operand {
let PrintMethod = "printSymbolHi";
}
@@ -121,6 +127,9 @@
def ADD8 : XOForm_1<31, 266, 0, (ops G8RC:$rT, G8RC:$rA, G8RC:$rB),
"add $rT, $rA, $rB", IntGeneral,
[(set G8RC:$rT, (add G8RC:$rA, G8RC:$rB))]>;
+def ADDI8 : DForm_2<14, (ops G8RC:$rD, G8RC:$rA, s16imm64:$imm),
+ "addi $rD, $rA, $imm", IntGeneral,
+ [(set G8RC:$rD, (add G8RC:$rA, immSExt16:$imm))]>;
def ADDIS8 : DForm_2<15, (ops G8RC:$rD, G8RC:$rA, symbolHi64:$imm),
"addis $rD, $rA, $imm", IntGeneral,
[(set G8RC:$rD, (add G8RC:$rA, imm16ShiftedSExt:$imm))]>;
@@ -135,15 +144,14 @@
"mulhdu $rT, $rA, $rB", IntMulHWU,
[(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>;
-def CMPDI : DForm_5_ext<11, (ops CRRC:$crD, GPRC:$rA, s16imm:$imm),
-"cmpdi $crD, $rA, $imm", IntCompare>, isPPC64;
-
-def CMPLDI : DForm_6_ext<10, (ops CRRC:$dst, GPRC:$src1, u16imm:$src2),
- "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64;
-def CMPD : XForm_16_ext<31, 0, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
+def CMPD : XForm_16_ext<31, 0, (ops CRRC:$crD, G8RC:$rA, G8RC:$rB),
"cmpd $crD, $rA, $rB", IntCompare>, isPPC64;
-def CMPLD : XForm_16_ext<31, 32, (ops CRRC:$crD, GPRC:$rA, GPRC:$rB),
+def CMPLD : XForm_16_ext<31, 32, (ops CRRC:$crD, G8RC:$rA, G8RC:$rB),
"cmpld $crD, $rA, $rB", IntCompare>, isPPC64;
+def CMPDI : DForm_5_ext<11, (ops CRRC:$crD, G8RC:$rA, s16imm:$imm),
+ "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64;
+def CMPLDI : DForm_6_ext<10, (ops CRRC:$dst, G8RC:$src1, u16imm:$src2),
+ "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64;
def SLD : XForm_6<31, 27, (ops G8RC:$rA, G8RC:$rS, G8RC:$rB),
"sld $rA, $rS, $rB", IntRotateD,
@@ -161,6 +169,9 @@
def EXTSW_32 : XForm_11<31, 986, (ops GPRC:$rA, GPRC:$rS),
"extsw $rA, $rS", IntGeneral,
[(set GPRC:$rA, (PPCextsw_32 GPRC:$rS))]>, isPPC64;
+def EXTSW_32_64 : XForm_11<31, 986, (ops G8RC:$rA, GPRC:$rS),
+ "extsw $rA, $rS", IntGeneral,
+ [(set G8RC:$rA, (sext GPRC:$rS))]>, isPPC64;
def SRADI : XSForm_1<31, 413, (ops GPRC:$rA, GPRC:$rS, u6imm:$SH),
"sradi $rA, $rS, $SH", IntRotateD>, isPPC64;
@@ -176,6 +187,7 @@
"mulld $rT, $rA, $rB", IntMulHD,
[(set G8RC:$rT, (mul G8RC:$rA, G8RC:$rB))]>, isPPC64;
+
let isTwoAddress = 1, isCommutable = 1 in {
def RLDIMI : MDForm_1<30, 3,
(ops G8RC:$rA, G8RC:$rSi, G8RC:$rS, u6imm:$SH,
u6imm:$MB),
@@ -192,7 +204,7 @@
(ops G8RC:$rA, G8RC:$rS, u6imm:$SH, u6imm:$ME),
"rldicr $rA, $rS, $SH, $ME", IntRotateD,
[]>, isPPC64;
-}
+} // End FXU Operations.
//===--===//
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp PPCISelLowering.cpp PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.192 -> 1.193
PPCISelLowering.cpp updated: 1.192 -> 1.193
PPCInstrInfo.td updated: 1.234 -> 1.235
---
Log message:
Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but
doesn't work right).
---
Diffs of the changes: (+198 -113)
PPCISelDAGToDAG.cpp | 303
PPCISelLowering.cpp |4
PPCInstrInfo.td |4
3 files changed, 198 insertions(+), 113 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.192
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.193
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.192 Fri Jun 9 20:15:02 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Mon Jun 26 19:04:13 2006
@@ -63,6 +63,18 @@
return CurDAG->getTargetConstant(Imm, MVT::i32);
}
+/// getI64Imm - Return a target constant with the specified value, of type
+/// i64.
+inline SDOperand getI64Imm(uint64_t Imm) {
+ return CurDAG->getTargetConstant(Imm, MVT::i64);
+}
+
+/// getSmallIPtrImm - Return a target constant of pointer type.
+inline SDOperand getSmallIPtrImm(unsigned Imm) {
+ return CurDAG->getTargetConstant(Imm, PPCLowering.getPointerTy());
+}
+
+
/// getGlobalBaseReg - insert code into the entry mbb to materialize the
PIC
/// base register. Return the virtual register that holds this value.
SDOperand getGlobalBaseReg();
@@ -111,7 +123,7 @@
case 'o': // offsetable
if (!SelectAddrImm(Op, Op0, Op1)) {
Select(Op0, Op); // r+0.
- Op1 = getI32Imm(0);
+ Op1 = getSmallIPtrImm(0);
}
break;
case 'v': // not offsetable
@@ -290,26 +302,73 @@
MachineBasicBlock &FirstMBB = BB->getParent()->front();
MachineBasicBlock::iterator MBBI = FirstMBB.begin();
SSARegMap *RegMap = BB->getParent()->getSSARegMap();
-// FIXME: when we get to LP64, we will need to create the appropriate
-// type of register here.
-GlobalBaseReg = RegMap->createVirtualRegister(PPC::GPRCRegisterClass);
+
+if (PPCLowering.getPointerTy() == MVT::i32)
+ GlobalBaseReg = RegMap->createVirtualRegister(PPC::GPRCRegisterClass);
+else
+ GlobalBaseReg = RegMap->createVirtualRegister(PPC::G8RCRegisterClass);
+
BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR);
BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg);
}
- return CurDAG->getRegister(GlobalBaseReg, MVT::i32);
+ return CurDAG->getRegister(GlobalBaseReg, PPCLowering.getPointerTy());
}
+/// isIntS16Immediate - This method tests to see if the node is either a 32-bit
+/// or 64-bit immediate, and if the value can be accurately represented as a
+/// sign extension from a 16-bit value. If so, this returns true and the
+/// immediate.
+static bool isIntS16Immediate(SDNode *N, short &Imm) {
+ if (N->getOpcode() != ISD::Constant)
+return false;
-// isIntImmediate - This method tests to see if a constant operand.
-// If so Imm will receive the 32 bit value.
-static bool isIntImmediate(SDNode *N, unsigned& Imm) {
- if (N->getOpcode() == ISD::Constant) {
+ Imm = (short)cast(N)->getValue();
+ if (N->getValueType(0) == MVT::i32)
+return Imm == (int32_t)cast(N)->getValue();
+ else
+return Imm == (int64_t)cast(N)->getValue();
+}
+
+static bool isIntS16Immediate(SDOperand Op, short &Imm) {
+ return isIntS16Immediate(Op.Val, Imm);
+}
+
+
+/// isInt32Immediate - This method tests to see if the node is a 32-bit
constant
+/// operand. If so Imm will receive the 32-bit value.
+static bool isInt32Immediate(SDNode *N, unsigned &Imm) {
+ if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
Imm = cast(N)->getValue();
return true;
}
return false;
}
+/// isInt64Immediate - This method tests to see if the node is a 64-bit
constant
+/// operand. If so Imm will receive the 64-bit value.
+static bool isInt64Immediate(SDNode *N, uint64_t &Imm) {
+ if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
+Imm = cast(N)->getValue();
+return true;
+ }
+ return false;
+}
+
+// isInt32Immediate - This method tests to see if a constant operand.
+// If so Imm will receive the 32 bit value.
+static bool isInt32Immediate(SDOperand N, unsigned &Imm) {
+ return isInt32Immediate(N.Val, Imm);
+}
+
+
+// isOpcWithIntImmediate - This method tests to see if the node is a specific
+// opcode and that it has a immediate integer right operand.
+// If so Imm will receive the 32 bit value.
+static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
+ return N->getOpcode() == Opc && isInt32Immediate(N->getOperand(1).Val, Imm);
+}
+
+
// isRunOfOnes - Returns true iff Val consists of one contiguous run of 1s with
// any number of 0s on either side. The 1s are allowed to wrap from LSB to
// MSB, so 0
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.193 -> 1.194
---
Log message:
Fix variable shadowing issue
---
Diffs of the changes: (+1 -2)
PPCISelDAGToDAG.cpp |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.193
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.194
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.193 Mon Jun 26 19:04:13 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Mon Jun 26 19:10:13 2006
@@ -741,7 +741,7 @@
unsigned Opc;
if (LHS.getValueType() == MVT::i32) {
-unsigned Imm, Opc;
+unsigned Imm;
if (ISD::isUnsignedIntSetCC(CC)) {
if (isInt32Immediate(RHS, Imm) && isUInt16(Imm))
return SDOperand(CurDAG->getTargetNode(PPC::CMPLWI, MVT::i32, LHS,
@@ -757,7 +757,6 @@
}
} else if (LHS.getValueType() == MVT::i64) {
uint64_t Imm;
-unsigned Opc;
if (ISD::isUnsignedIntSetCC(CC)) {
if (isInt64Immediate(RHS.Val, Imm) && isUInt16(Imm))
return SDOperand(CurDAG->getTargetNode(PPC::CMPLDI, MVT::i64, LHS,
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.180 -> 1.181
---
Log message:
Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in
ppc64 mode!
---
Diffs of the changes: (+25 -7)
PPCAsmPrinter.cpp | 32 +---
1 files changed, 25 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.180
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.181
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.180 Fri Jun 23 07:51:53 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Mon Jun 26 20:02:25 2006
@@ -268,13 +268,17 @@
DarwinDwarfWriter DW;
-DarwinAsmPrinter(std::ostream &O, TargetMachine &TM)
+DarwinAsmPrinter(std::ostream &O, PPCTargetMachine &TM)
: PPCAsmPrinter(O, TM), DW(O, this) {
+ bool isPPC64 = TM.getSubtargetImpl()->isPPC64();
CommentString = ";";
GlobalPrefix = "_";
PrivateGlobalPrefix = "L"; // Marker for constant pool idxs
ZeroDirective = "\t.space\t"; // ".space N" emits N zeros.
- Data64bitsDirective = 0; // we can't emit a 64-bit unit
+ if (isPPC64)
+Data64bitsDirective = ".quad"; // we can't emit a 64-bit unit
+ else
+Data64bitsDirective = 0; // we can't emit a 64-bit unit
AlignmentIsInBytes = false;// Alignment is by power of 2.
ConstantPoolSection = "\t.const\t";
// FIXME: Conditionalize jump table section based on PIC
@@ -625,13 +629,15 @@
}
}
+ bool isPPC64 = TD->getPointerSizeInBits() == 64;
+
// Output stubs for dynamically-linked functions
if (TM.getRelocationModel() == Reloc::PIC) {
for (std::set::iterator i = FnStubs.begin(), e =
FnStubs.end();
i != e; ++i) {
SwitchToTextSection(".section __TEXT,__picsymbolstub1,symbol_stubs,"
"pure_instructions,32", 0);
- EmitAlignment(2);
+ EmitAlignment(4);
O << "L" << *i << "$stub:\n";
O << "\t.indirect_symbol " << *i << "\n";
O << "\tmflr r0\n";
@@ -640,13 +646,19 @@
O << "\tmflr r11\n";
O << "\taddis r11,r11,ha16(L" << *i << "$lazy_ptr-L0$" << *i << ")\n";
O << "\tmtlr r0\n";
- O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
+ if (isPPC64)
+O << "\tldu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
+ else
+O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr-L0$" << *i << ")(r11)\n";
O << "\tmtctr r12\n";
O << "\tbctr\n";
SwitchToDataSection(".lazy_symbol_pointer", 0);
O << "L" << *i << "$lazy_ptr:\n";
O << "\t.indirect_symbol " << *i << "\n";
- O << "\t.long dyld_stub_binding_helper\n";
+ if (isPPC64)
+O << "\t.quad dyld_stub_binding_helper\n";
+ else
+O << "\t.long dyld_stub_binding_helper\n";
}
} else {
for (std::set::iterator i = FnStubs.begin(), e =
FnStubs.end();
@@ -657,13 +669,19 @@
O << "L" << *i << "$stub:\n";
O << "\t.indirect_symbol " << *i << "\n";
O << "\tlis r11,ha16(L" << *i << "$lazy_ptr)\n";
- O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr)(r11)\n";
+ if (isPPC64)
+O << "\tldu r12,lo16(L" << *i << "$lazy_ptr)(r11)\n";
+ else
+O << "\tlwzu r12,lo16(L" << *i << "$lazy_ptr)(r11)\n";
O << "\tmtctr r12\n";
O << "\tbctr\n";
SwitchToDataSection(".lazy_symbol_pointer", 0);
O << "L" << *i << "$lazy_ptr:\n";
O << "\t.indirect_symbol " << *i << "\n";
- O << "\t.long dyld_stub_binding_helper\n";
+ if (isPPC64)
+O << "\t.quad dyld_stub_binding_helper\n";
+ else
+O << "\t.long dyld_stub_binding_helper\n";
}
}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.83 -> 1.84
---
Log message:
De-pessimize the handling of LCSSA Phi nodes in IndVarSimplify. Hopefully this
will make Shootout-C/nestedloop faster.
---
Diffs of the changes: (+29 -15)
IndVarSimplify.cpp | 44 +---
1 files changed, 29 insertions(+), 15 deletions(-)
Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.83
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.84
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.83 Fri Jun 16 20:02:31 2006
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Mon Jun 26 21:17:08 2006
@@ -325,20 +325,8 @@
for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
UI != E; ++UI) {
Instruction *User = cast(*UI);
- if (!L->contains(User->getParent())) {
-// If this is a PHI node in the exit block and we're inserting,
-// into the exit block, it must have a single entry. In this
-// case, we can't insert the code after the PHI and have the
PHI
-// still use it. Instead, don't insert the the PHI.
-if (PHINode *PN = dyn_cast(User)) {
- // FIXME: This is a case where LCSSA pessimizes code, this
- // should be fixed better.
- if (PN->getNumOperands() == 2 &&
- PN->getParent() == BlockToInsertInto)
-continue;
-}
+ if (!L->contains(User->getParent()))
ExtraLoopUsers.push_back(User);
- }
}
if (!ExtraLoopUsers.empty()) {
@@ -358,8 +346,34 @@
// Rewrite any users of the computed value outside of the loop
// with the newly computed value.
-for (unsigned i = 0, e = ExtraLoopUsers.size(); i != e; ++i)
- ExtraLoopUsers[i]->replaceUsesOfWith(I, NewVal);
+for (unsigned i = 0, e = ExtraLoopUsers.size(); i != e; ++i) {
+ PHINode* PN = dyn_cast(ExtraLoopUsers[i]);
+ if (PN && PN->getParent() == BlockToInsertInto) {
+ // We're dealing with an LCSSA Phi. Handle it specially.
+Instruction* LCSSAInsertPt = BlockToInsertInto->begin();
+
+Instruction* NewInstr = dyn_cast(NewVal);
+if (Instruction* NewInstr = dyn_cast(NewVal))
+ for (unsigned j = 0; j < NewInstr->getNumOperands();
++j){
+Instruction* PredI =
+
dyn_cast(NewInstr->getOperand(j));
+if (PredI && L->contains(PredI->getParent())) {
+ PHINode* NewLCSSA = new PHINode(PredI->getType(),
+PredI->getName() +
".lcssa",
+LCSSAInsertPt);
+ NewLCSSA->addIncoming(PredI,
+
BlockToInsertInto->getSinglePredecessor());
+
+ NewInstr->replaceUsesOfWith(PredI, NewLCSSA);
+}
+ }
+
+PN->replaceAllUsesWith(NewVal);
+PN->eraseFromParent();
+ } else {
+ExtraLoopUsers[i]->replaceUsesOfWith(I, NewVal);
+ }
+}
// If this instruction is dead now, schedule it to be removed.
if (I->use_empty())
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
