[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
Changes in directory llvm/lib/Target/Alpha:
AlphaCodeEmitter.cpp updated: 1.13 -> 1.14
---
Log message:
Suck block address tracking out of targets into the JIT Emitter. This
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
---
Diffs of the changes: (+4 -11)
AlphaCodeEmitter.cpp | 15 ---
1 files changed, 4 insertions(+), 11 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
diff -u llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.13
llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.14
--- llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.13 Tue May 2 19:31:21 2006
+++ llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp Wed May 3 12:10:41 2006
@@ -35,8 +35,7 @@
class AlphaCodeEmitter : public MachineFunctionPass {
const AlphaInstrInfo *II;
MachineCodeEmitter &MCE;
-std::vector BasicBlockAddrs;
-std::vector > BBRefs;
+std::vector > BBRefs;
/// getMachineOpValue - evaluates the MachineOperand of a given
MachineInstr
///
@@ -78,7 +77,6 @@
do {
BBRefs.clear();
-BasicBlockAddrs.clear();
MCE.startFunction(MF);
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
@@ -87,7 +85,8 @@
// Resolve all forward branches now...
for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
-unsigned* Location = BasicBlockAddrs[BBRefs[i].first->getNumber()];
+unsigned* Location =
+ (unsigned*)MCE.getMachineBasicBlockAddress(BBRefs[i].first);
unsigned* Ref = (unsigned*)BBRefs[i].second;
intptr_t BranchTargetDisp =
(((unsigned char*)Location - (unsigned char*)Ref) >> 2) - 1;
@@ -97,17 +96,11 @@
*Ref |= (BranchTargetDisp & ((1 << 21)-1));
}
BBRefs.clear();
- BasicBlockAddrs.clear();
-
return false;
}
void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
- if (BasicBlockAddrs.size() <= (unsigned)MBB.getNumber())
-BasicBlockAddrs.resize((MBB.getNumber()+1)*2);
-
- BasicBlockAddrs[MBB.getNumber()] = (unsigned*)MCE.getCurrentPCValue();
-
+ MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
I != E; ++I) {
MachineInstr &MI = *I;
___
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[llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
Changes in directory llvm/lib/ExecutionEngine/JIT:
JITEmitter.cpp updated: 1.94 -> 1.95
---
Log message:
Suck block address tracking out of targets into the JIT Emitter. This
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
---
Diffs of the changes: (+29 -9)
JITEmitter.cpp | 38 +-
1 files changed, 29 insertions(+), 9 deletions(-)
Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
diff -u llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.94
llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.95
--- llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.94Tue May 2 20:29:56 2006
+++ llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed May 3 12:10:41 2006
@@ -354,6 +354,11 @@
/// Relocations - These are the relocations that the function needs, as
/// emitted.
std::vector Relocations;
+
+/// MBBLocations - This vector is a mapping from MBB ID's to their address.
+/// It is filled in by the StartMachineBasicBlock callback and queried by
+/// the getMachineBasicBlockAddress callback.
+std::vector MBBLocations;
/// ConstantPool - The constant pool for the current function.
///
@@ -381,8 +386,7 @@
void emitConstantPool(MachineConstantPool *MCP);
void initJumpTableInfo(MachineJumpTableInfo *MJTI);
-virtual void emitJumpTableInfo(MachineJumpTableInfo *MJTI,
- std::vector &MBBM);
+void emitJumpTableInfo(MachineJumpTableInfo *MJTI);
virtual void startFunctionStub(unsigned StubSize);
virtual void* finishFunctionStub(const Function *F);
@@ -390,9 +394,22 @@
virtual void addRelocation(const MachineRelocation &MR) {
Relocations.push_back(MR);
}
+
+virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) {
+ if (MBBLocations.size() <= (unsigned)MBB->getNumber())
+MBBLocations.resize((MBB->getNumber()+1)*2);
+ MBBLocations[MBB->getNumber()] = getCurrentPCValue();
+}
+
+virtual intptr_t getConstantPoolEntryAddress(unsigned Entry) const;
+virtual intptr_t getJumpTableEntryAddress(unsigned Entry) const;
+
+virtual intptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const
{
+ assert(MBBLocations.size() > (unsigned)MBB->getNumber() &&
+ MBBLocations[MBB->getNumber()] && "MBB not emitted!");
+ return MBBLocations[MBB->getNumber()];
+}
-virtual uint64_t getConstantPoolEntryAddress(unsigned Entry);
-virtual uint64_t getJumpTableEntryAddress(unsigned Entry);
private:
void *getPointerToGlobal(GlobalValue *GV, void *Reference, bool
NoNeedStub);
@@ -447,9 +464,13 @@
// About to start emitting the machine code for the function.
emitAlignment(std::max(F.getFunction()->getAlignment(), 8U));
TheJIT->updateGlobalMapping(F.getFunction(), CurBufferPtr);
+
+ MBBLocations.clear();
}
bool JITEmitter::finishFunction(MachineFunction &F) {
+ emitJumpTableInfo(F.getJumpTableInfo());
+
MemMgr.endFunctionBody(CurBufferPtr);
NumBytes += getCurrentPCOffset();
@@ -549,8 +570,7 @@
JumpTableBase = allocateSpace(NumEntries * EntrySize, MJTI->getAlignment());
}
-void JITEmitter::emitJumpTableInfo(MachineJumpTableInfo *MJTI,
- std::vector &MBBM) {
+void JITEmitter::emitJumpTableInfo(MachineJumpTableInfo *MJTI) {
const std::vector &JT = MJTI->getJumpTables();
if (JT.empty() || JumpTableBase == 0) return;
@@ -566,7 +586,7 @@
// Store the address of the basic block for this jump table slot in the
// memory we allocated for the jump table in 'initJumpTableInfo'
for (unsigned mi = 0, me = MBBs.size(); mi != me; ++mi)
- *SlotPtr++ = (intptr_t)MBBM[MBBs[mi]->getNumber()];
+ *SlotPtr++ = getMachineBasicBlockAddress(MBBs[mi]);
}
}
@@ -591,7 +611,7 @@
// in the constant pool that was last emitted with the 'emitConstantPool'
// method.
//
-uint64_t JITEmitter::getConstantPoolEntryAddress(unsigned ConstantNum) {
+intptr_t JITEmitter::getConstantPoolEntryAddress(unsigned ConstantNum) const {
assert(ConstantNum < ConstantPool->getConstants().size() &&
"Invalid ConstantPoolIndex!");
return (intptr_t)ConstantPoolBase +
@@ -601,7 +621,7 @@
// getJumpTableEntryAddress - Return the address of the JumpTable with index
// 'Index' in the jumpp table that was last initialized with
'initJumpTableInfo'
//
-uint64_t JITEmitter::getJumpTableEntryAddress(unsigned Index) {
+intptr_t JITEmitter::getJumpTableEntryAddress(unsigned Index) const {
const std::vector &JT = JumpTable->getJumpTables();
assert(Index < JT.size() && "Invalid jump table index!");
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineCodeEmitter.h
Changes in directory llvm/include/llvm/CodeGen: MachineCodeEmitter.h updated: 1.39 -> 1.40 --- Log message: Suck block address tracking out of targets into the JIT Emitter. This simplifies the MachineCodeEmitter interface just a little bit and makes BasicBlocks work like constant pools and jump tables. --- Diffs of the changes: (+16 -10) MachineCodeEmitter.h | 26 -- 1 files changed, 16 insertions(+), 10 deletions(-) Index: llvm/include/llvm/CodeGen/MachineCodeEmitter.h diff -u llvm/include/llvm/CodeGen/MachineCodeEmitter.h:1.39 llvm/include/llvm/CodeGen/MachineCodeEmitter.h:1.40 --- llvm/include/llvm/CodeGen/MachineCodeEmitter.h:1.39 Tue May 2 20:01:51 2006 +++ llvm/include/llvm/CodeGen/MachineCodeEmitter.h Wed May 3 12:10:41 2006 @@ -74,13 +74,6 @@ /// virtual bool finishFunction(MachineFunction &F) = 0; - /// emitJumpTableInfo - This callback is invoked to output the jump tables - /// for the function. In addition to a pointer to the MachineJumpTableInfo, - /// this function also takes a map of MBB IDs to addresses, so that the final - /// addresses of the MBBs can be written to the jump tables. - virtual void emitJumpTableInfo(MachineJumpTableInfo *MJTI, - std::vector &MBBM) = 0; - /// startFunctionStub - This callback is invoked when the JIT needs the /// address of a function that has not been code generated yet. The StubSize /// specifies the total size required by the stub. Stubs are not allowed to @@ -158,7 +151,11 @@ } return Result; } - + + /// StartMachineBasicBlock - This should be called by the target when a new + /// basic block is about to be emitted. This way the MCE knows where the + /// start of the block is, and can implement getMachineBasicBlockAddress. + virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) = 0; /// getCurrentPCValue - This returns the address that the next emitted byte /// will be output to. @@ -177,15 +174,24 @@ /// noted with this interface. virtual void addRelocation(const MachineRelocation &MR) = 0; + + /// FIXME: These should all be handled with relocations! + /// getConstantPoolEntryAddress - Return the address of the 'Index' entry in /// the constant pool that was last emitted with the emitConstantPool method. /// - virtual uint64_t getConstantPoolEntryAddress(unsigned Index) = 0; + virtual intptr_t getConstantPoolEntryAddress(unsigned Index) const = 0; /// getJumpTableEntryAddress - Return the address of the jump table with index /// 'Index' in the function that last called initJumpTableInfo. /// - virtual uint64_t getJumpTableEntryAddress(unsigned Index) = 0; + virtual intptr_t getJumpTableEntryAddress(unsigned Index) const = 0; + + /// getMachineBasicBlockAddress - Return the address of the specified + /// MachineBasicBlock, only usable after the label for the MBB has been + /// emitted. + /// + virtual intptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const= 0; }; } // End llvm namespace ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/ELFWriter.cpp
Changes in directory llvm/lib/CodeGen:
ELFWriter.cpp updated: 1.24 -> 1.25
---
Log message:
Suck block address tracking out of targets into the JIT Emitter. This
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
---
Diffs of the changes: (+9 -6)
ELFWriter.cpp | 15 +--
1 files changed, 9 insertions(+), 6 deletions(-)
Index: llvm/lib/CodeGen/ELFWriter.cpp
diff -u llvm/lib/CodeGen/ELFWriter.cpp:1.24 llvm/lib/CodeGen/ELFWriter.cpp:1.25
--- llvm/lib/CodeGen/ELFWriter.cpp:1.24 Tue May 2 20:29:56 2006
+++ llvm/lib/CodeGen/ELFWriter.cpp Wed May 3 12:10:41 2006
@@ -61,21 +61,24 @@
void addRelocation(const MachineRelocation &MR) {
assert(0 && "relo not handled yet!");
}
-virtual uint64_t getConstantPoolEntryAddress(unsigned Index) {
+
+virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) {
+}
+
+virtual intptr_t getConstantPoolEntryAddress(unsigned Index) const {
assert(0 && "CP not implementated yet!");
return 0;
}
-virtual uint64_t getJumpTableEntryAddress(unsigned Index) {
+virtual intptr_t getJumpTableEntryAddress(unsigned Index) const {
assert(0 && "JT not implementated yet!");
return 0;
}
-
-virtual void emitJumpTableInfo(MachineJumpTableInfo *MJTI,
- std::vector &MBBM) {
+
+virtual intptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const
{
assert(0 && "JT not implementated yet!");
+ return 0;
}
-
/// JIT SPECIFIC FUNCTIONS - DO NOT IMPLEMENT THESE HERE!
void startFunctionStub(unsigned StubSize) {
assert(0 && "JIT specific function called!");
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.100 -> 1.101
---
Log message:
Suck block address tracking out of targets into the JIT Emitter. This
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
---
Diffs of the changes: (+9 -24)
X86CodeEmitter.cpp | 33 +
1 files changed, 9 insertions(+), 24 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.100
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.101
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.100Tue May 2 23:52:47 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 3 12:10:41 2006
@@ -35,7 +35,6 @@
class Emitter : public MachineFunctionPass {
const X86InstrInfo *II;
MachineCodeEmitter &MCE;
-std::vector BasicBlockAddrs;
std::vector > BBRefs;
public:
explicit Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
@@ -83,30 +82,24 @@
do {
BBRefs.clear();
-BasicBlockAddrs.clear();
MCE.startFunction(MF);
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
emitBasicBlock(*I);
-MCE.emitJumpTableInfo(MF.getJumpTableInfo(), BasicBlockAddrs);
} while (MCE.finishFunction(MF));
// Resolve all forward branches now.
for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
-unsigned Location = BasicBlockAddrs[BBRefs[i].first->getNumber()];
+unsigned Location = MCE.getMachineBasicBlockAddress(BBRefs[i].first);
unsigned Ref = BBRefs[i].second;
*((unsigned*)(intptr_t)Ref) = Location-Ref-4;
}
BBRefs.clear();
- BasicBlockAddrs.clear();
return false;
}
void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
- if (BasicBlockAddrs.size() <= (unsigned)MBB.getNumber())
-BasicBlockAddrs.resize((MBB.getNumber()+1)*2);
- BasicBlockAddrs[MBB.getNumber()] = MCE.getCurrentPCValue();
-
+ MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::const_iterator I = MBB.begin(), E = MBB.end();
I != E; ++I)
emitInstruction(*I);
@@ -118,23 +111,15 @@
MCE.emitWordLE(Address-MCE.getCurrentPCValue()-4);
}
-/// emitPCRelativeBlockAddress - This method emits the PC relative address of
-/// the specified basic block, or if the basic block hasn't been emitted yet
-/// (because this is a forward branch), it keeps track of the information
-/// necessary to resolve this address later (and emits a dummy value).
+/// emitPCRelativeBlockAddress - This method keeps track of the information
+/// necessary to resolve the address of this block later and emits a dummy
+/// value.
///
void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
- // If this is a backwards branch, we already know the address of the target,
- // so just emit the value.
- unsigned MBBNo = MBB->getNumber();
- if (MBBNo < BasicBlockAddrs.size() && BasicBlockAddrs[MBBNo]) {
-emitPCRelativeValue(BasicBlockAddrs[MBBNo]);
- } else {
-// Otherwise, remember where this reference was and where it is to so we
can
-// deal with it later.
-BBRefs.push_back(std::make_pair(MBB, MCE.getCurrentPCValue()));
-MCE.emitWordLE(0);
- }
+ // Remember where this reference was and where it is to so we can
+ // deal with it later.
+ BBRefs.push_back(std::make_pair(MBB, MCE.getCurrentPCValue()));
+ MCE.emitWordLE(0);
}
/// emitGlobalAddressForCall - Emit the specified address to the code stream
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCCodeEmitter.cpp updated: 1.57 -> 1.58
---
Log message:
Suck block address tracking out of targets into the JIT Emitter. This
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
---
Diffs of the changes: (+6 -12)
PPCCodeEmitter.cpp | 18 ++
1 files changed, 6 insertions(+), 12 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
diff -u llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.57
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.58
--- llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.57 Tue May 2 19:28:15 2006
+++ llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp Wed May 3 12:10:41 2006
@@ -33,9 +33,7 @@
// Tracks which instruction references which BasicBlock
std::vector > BBRefs;
-// Tracks where each BasicBlock starts, indexes by BB number.
-std::vector BasicBlockAddrs;
-
+
/// getMachineOpValue - evaluates the MachineOperand of a given
MachineInstr
///
int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
@@ -87,17 +85,15 @@
"JIT relocation model must be set to static or default!");
do {
BBRefs.clear();
-BasicBlockAddrs.clear();
MCE.startFunction(MF);
for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E;
++BB)
emitBasicBlock(*BB);
-MCE.emitJumpTableInfo(MF.getJumpTableInfo(), BasicBlockAddrs);
} while (MCE.finishFunction(MF));
// Resolve branches to BasicBlocks for the entire function
for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
-intptr_t Location = BasicBlockAddrs[BBRefs[i].first->getNumber()];
+intptr_t Location = MCE.getMachineBasicBlockAddress(BBRefs[i].first);
unsigned *Ref = BBRefs[i].second;
DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
<< "\n");
@@ -115,15 +111,13 @@
}
}
BBRefs.clear();
- BasicBlockAddrs.clear();
return false;
}
void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
- if (BasicBlockAddrs.size() <= (unsigned)MBB.getNumber())
-BasicBlockAddrs.resize((MBB.getNumber()+1)*2);
- BasicBlockAddrs[MBB.getNumber()] = MCE.getCurrentPCValue();
+ MCE.StartMachineBasicBlock(&MBB);
+
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;
++I){
MachineInstr &MI = *I;
unsigned Opcode = MI.getOpcode();
@@ -145,8 +139,8 @@
int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
- int rv = 0; // Return value; defaults to 0 for unhandled cases
- // or things that get fixed up later by the JIT.
+ intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases
+ // or things that get fixed up later by the JIT.
if (MO.isRegister()) {
rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.101 -> 1.102
---
Log message:
inline a simple method
---
Diffs of the changes: (+7 -10)
X86CodeEmitter.cpp | 17 +++--
1 files changed, 7 insertions(+), 10 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.101
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.102
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.101Wed May 3 12:10:41 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 3 12:21:32 2006
@@ -50,7 +50,6 @@
void emitInstruction(const MachineInstr &MI);
private:
-void emitBasicBlock(MachineBasicBlock &MBB);
void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
void emitPCRelativeValue(unsigned Address);
void emitGlobalAddressForCall(GlobalValue *GV, bool isTailCall);
@@ -84,8 +83,13 @@
BBRefs.clear();
MCE.startFunction(MF);
-for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
- emitBasicBlock(*I);
+for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
+ MBB != E; ++MBB) {
+ MCE.StartMachineBasicBlock(MBB);
+ for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
+ I != E; ++I)
+emitInstruction(*I);
+}
} while (MCE.finishFunction(MF));
// Resolve all forward branches now.
@@ -98,13 +102,6 @@
return false;
}
-void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
- MCE.StartMachineBasicBlock(&MBB);
- for (MachineBasicBlock::const_iterator I = MBB.begin(), E = MBB.end();
- I != E; ++I)
-emitInstruction(*I);
-}
-
/// emitPCRelativeValue - Emit a 32-bit PC relative address.
///
void Emitter::emitPCRelativeValue(unsigned Address) {
___
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[llvm-commits] CVS: llvm/tools/llvm-config/Makefile FinalLibDeps.txt LibDeps.txt
Changes in directory llvm/tools/llvm-config:
Makefile updated: 1.5 -> 1.6
FinalLibDeps.txt (r1.1) removed
LibDeps.txt (r1.3) removed
---
Log message:
For PR764: http://llvm.cs.uiuc.edu/PR764 :
Don't check in the LibDeps.txt and FinalLibDeps.txt files to CVS because
the content differs from platform to platform. Instead, adjust the makefile
so that a dummy llvm-config is built if Perl is not available.
---
Diffs of the changes: (+21 -10)
Makefile | 31 +--
1 files changed, 21 insertions(+), 10 deletions(-)
Index: llvm/tools/llvm-config/Makefile
diff -u llvm/tools/llvm-config/Makefile:1.5 llvm/tools/llvm-config/Makefile:1.6
--- llvm/tools/llvm-config/Makefile:1.5 Thu Apr 20 16:13:58 2006
+++ llvm/tools/llvm-config/Makefile Wed May 3 12:49:50 2006
@@ -9,10 +9,15 @@
LEVEL = ../..
-EXTRA_DIST = LibDeps.txt llvm-config.in.in find-cycles.pl
+EXTRA_DIST = LibDeps.txt FinalLibDeps.txt llvm-config.in.in find-cycles.pl
include $(LEVEL)/Makefile.common
+# If we don't have Perl, we can't generate the library dependencies upon which
+# llvm-config depends. Therefore, only if we detect perl will we do anything
+# useful.
+ifeq ($(HAVE_PERL),1)
+
# Combine preprocessor flags (except for -I) and CXX flags.
SUB_CXXFLAGS = ${CPP.BaseFlags} ${CXX.Flags}
@@ -21,10 +26,8 @@
# user to use libtool when linking against LLVM.
SUB_LDFLAGS =
-FinalLibDeps = $(PROJ_SRC_DIR)/FinalLibDeps.txt
-ifdef HAVE_PERL
-ifeq ($(HAVE_PERL),1)
-LibDeps = $(PROJ_SRC_DIR)/LibDeps.txt
+FinalLibDeps = $(PROJ_OBJ_DIR)/FinalLibDeps.txt
+LibDeps = $(PROJ_OBJ_DIR)/LibDeps.txt
GenLibDeps = $(PROJ_SRC_ROOT)/utils/GenLibDeps.pl
# MANUAL USE ONLY! GenLibDeps.pl is very non-portable, so LibDeps.txt
# should only be re-built manually. No other rule in this file should
@@ -37,9 +40,7 @@
# don't have to process them at runtime.
$(FinalLibDeps): find-cycles.pl $(LibDeps)
$(Echo) "Finding cyclic dependencies between LLVM libraries."
- $(Verb) $(PERL) $< < $(PROJ_SRC_DIR)/LibDeps.txt > $@
-endif
-endif
+ $(Verb) $(PERL) $< < $(LibDeps) > $@
# Rerun our configure substitutions as needed.
ConfigInIn = $(PROJ_SRC_DIR)/llvm-config.in.in
@@ -56,13 +57,23 @@
$(Verb) $(SED) -f temp.sed < $< > $@
$(Verb) $(RM) temp.sed
$(Verb) cat $(FinalLibDeps) >> $@
- $(Verb) chmod +x llvm-config
+ $(Verb) chmod +x $@
+
+else
+# We don't have perl, just generate a dummy llvm-config
+llvm-config:
+ $(Echo) "Building place holder llvm-config script."
+ $(Verb) $(ECHO) 'echo llvm-config: Perl not found so llvm-config could
not be generated' >> $@
+ $(Verb) chmod +x $@
+endif
# Hook into the standard Makefile rules.
all-local:: llvm-config
clean-local::
- $(Verb) $(RM) -f llvm-config llvm-config.in
+ $(Verb) $(RM) -f llvm-config llvm-config.in $(FinalLibDeps) $(LibDeps) \
+ GenLibDeps.out
install-local:: all-local
$(Echo) Installing llvm-config
$(Verb) $(MKDIR) $(PROJ_bindir)
$(Verb) $(ScriptInstall) llvm-config $(PROJ_bindir)
+
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[llvm-commits] CVS: llvm/utils/GenLibDeps.pl
Changes in directory llvm/utils:
GenLibDeps.pl updated: 1.6 -> 1.7
---
Log message:
Attempt to get this script working on Darwin.
---
Diffs of the changes: (+2 -2)
GenLibDeps.pl |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/utils/GenLibDeps.pl
diff -u llvm/utils/GenLibDeps.pl:1.6 llvm/utils/GenLibDeps.pl:1.7
--- llvm/utils/GenLibDeps.pl:1.6Fri Apr 21 00:29:25 2006
+++ llvm/utils/GenLibDeps.plWed May 3 13:16:01 2006
@@ -6,7 +6,7 @@
# libraries. The output of this script should periodically replace
# the similar content in the UsingLibraries.html document.
#
-# Syntax: GenLibDeps.pl
+# Syntax: GenLibDeps.pl [-flat]
#
# Parse arguments...
@@ -76,7 +76,7 @@
print " $lib\n";
}
open UNDEFS,
-"nm -g -u $Directory/$lib | grep ' U ' | sed -e 's/ U //' | sort |
uniq |";
+"nm -g -u $Directory/$lib | sed -e 's/^ *U //' | sort | uniq |";
open DEPENDS,
"| sort | uniq > GenLibDeps.out";
while () {
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineRelocation.h
Changes in directory llvm/include/llvm/CodeGen:
MachineRelocation.h updated: 1.7 -> 1.8
---
Log message:
Cleanup the internal implementation of MachineRelocation. No interface or
functionality changes.
---
Diffs of the changes: (+44 -36)
MachineRelocation.h | 80
1 files changed, 44 insertions(+), 36 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineRelocation.h
diff -u llvm/include/llvm/CodeGen/MachineRelocation.h:1.7
llvm/include/llvm/CodeGen/MachineRelocation.h:1.8
--- llvm/include/llvm/CodeGen/MachineRelocation.h:1.7 Wed Jul 27 00:53:43 2005
+++ llvm/include/llvm/CodeGen/MachineRelocation.h Wed May 3 13:52:31 2006
@@ -35,65 +35,71 @@
/// 6. An index into the GOT, if the target uses a GOT
///
class MachineRelocation {
- /// OffsetTypeExternal - The low 24-bits of this value is the offset from the
- /// start of the code buffer of the relocation to perform. Bit 24 of this is
- /// set if Target should use ExtSym instead of GV, Bit 25 is the CanRewrite
- /// bit, and the high 6 bits hold the relocation type.
- // FIXME: with the additional types of relocatable things, rearrange the
- // storage of things to be a bit more effiecient
- unsigned OffsetTypeExternal;
+ enum AddressType {
+isResult, // Relocation has be transformed into its result pointer.
+isGV, // The Target.GV field is valid.
+isExtSym, // The Target.ExtSym field is valid.
+isConstPool, // The Target.ConstPool field is valid.
+isGOTIndex// The Target.GOTIndex field is valid.
+ };
+
+ /// Offset - This is the offset from the start of the code buffer of the
+ /// relocation to perform.
+ unsigned Offset;
+
+ /// ConstantVal - A field that may be used by the target relocation type.
+ intptr_t ConstantVal;
+
union {
+void *Result;// If this has been resolved to a resolved pointer
GlobalValue *GV; // If this is a pointer to an LLVM global
const char *ExtSym; // If this is a pointer to a named symbol
-void *Result;// If this has been resolved to a resolved pointer
+unsigned ConstPool; // In this is a pointer to a constant pool entry
unsigned GOTIndex; // Index in the GOT of this symbol/global
-unsigned CPool; // Index in the Constant Pool
} Target;
- intptr_t ConstantVal;
- bool GOTRelative; //out of bits in OffsetTypeExternal
- bool isConstPool;
+
+ unsigned TargetReloType : 6; // The target relocation ID.
+ AddressType AddrType: 3; // The field of Target to use.
+ bool DoesntNeedFnStub : 1; // True if we don't need a fn stub.
+ bool GOTRelative: 1; // Should this relocation be relative to the
GOT?
public:
- MachineRelocation(unsigned Offset, unsigned RelocationType, GlobalValue *GV,
+ MachineRelocation(unsigned offset, unsigned RelocationType, GlobalValue *GV,
intptr_t cst = 0, bool DoesntNeedFunctionStub = 0,
bool GOTrelative = 0)
-: OffsetTypeExternal(Offset + (RelocationType << 26)), ConstantVal(cst),
- GOTRelative(GOTrelative), isConstPool(0) {
-assert((Offset & ~((1 << 24)-1)) == 0 && "Code offset too large!");
+: Offset(offset), ConstantVal(cst), TargetReloType(RelocationType),
+ AddrType(isGV), DoesntNeedFnStub(DoesntNeedFunctionStub),
+ GOTRelative(GOTrelative){
assert((RelocationType & ~63) == 0 && "Relocation type too large!");
Target.GV = GV;
-if (DoesntNeedFunctionStub)
- OffsetTypeExternal |= 1 << 25;
}
- MachineRelocation(unsigned Offset, unsigned RelocationType, const char *ES,
+ MachineRelocation(unsigned offset, unsigned RelocationType, const char *ES,
intptr_t cst = 0, bool GOTrelative = 0)
-: OffsetTypeExternal(Offset + (1 << 24) + (RelocationType << 26)),
- ConstantVal(cst), GOTRelative(GOTrelative), isConstPool(0) {
-assert((Offset & ~((1 << 24)-1)) == 0 && "Code offset too large!");
+: Offset(offset), ConstantVal(cst), TargetReloType(RelocationType),
+ AddrType(isExtSym), DoesntNeedFnStub(false), GOTRelative(GOTrelative) {
assert((RelocationType & ~63) == 0 && "Relocation type too large!");
Target.ExtSym = ES;
}
- MachineRelocation(unsigned Offset, unsigned RelocationType, unsigned CPI,
+ MachineRelocation(unsigned offset, unsigned RelocationType, unsigned CPI,
intptr_t cst = 0)
-: OffsetTypeExternal(Offset + (RelocationType << 26)),
- ConstantVal(cst), GOTRelative(0), isConstPool(1) {
-assert((Offset & ~((1 << 24)-1)) == 0 && "Code offset too large!");
+: Offset(offset), ConstantVal(cst), TargetReloType(RelocationType),
+ AddrType(isConstPool), DoesntNeedFnStub(false), GOTRelative(0) {
assert((RelocationType & ~63) == 0 && "Relocation type too large!");
-Target.CPool = CPI;
+Target.ConstPool = CPI;
}
/// getMachineCodeOffset - Return the offset into the c
[llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
Changes in directory llvm/lib/ExecutionEngine/JIT:
JITEmitter.cpp updated: 1.95 -> 1.96
---
Log message:
minor cleanups, no functionality change
---
Diffs of the changes: (+7 -7)
JITEmitter.cpp | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
Index: llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
diff -u llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.95
llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.96
--- llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp:1.95Wed May 3 12:10:41 2006
+++ llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed May 3 13:55:56 2006
@@ -487,20 +487,20 @@
// If the target REALLY wants a stub for this function, emit it now.
if (!MR.doesntNeedFunctionStub())
ResultPtr = getJITResolver(this).getExternalFunctionStub(ResultPtr);
- } else if (MR.isGlobalValue())
+ } else if (MR.isGlobalValue()) {
ResultPtr = getPointerToGlobal(MR.getGlobalValue(),
BufferBegin+MR.getMachineCodeOffset(),
MR.doesntNeedFunctionStub());
- else //ConstantPoolIndex
-ResultPtr =
- (void*)(intptr_t)getConstantPoolEntryAddress(MR.getConstantPoolIndex());
+ } else {
+assert(MR.isConstantPoolIndex());
+
ResultPtr=(void*)getConstantPoolEntryAddress(MR.getConstantPoolIndex());
+ }
MR.setResultPointer(ResultPtr);
// if we are managing the GOT and the relocation wants an index,
// give it one
- if (MemMgr.isManagingGOT() && !MR.isConstantPoolIndex() &&
- MR.isGOTRelative()) {
+ if (MemMgr.isManagingGOT() && MR.isGOTRelative()) {
unsigned idx = getJITResolver(this).getGOTIndexForAddr(ResultPtr);
MR.setGOTIndex(idx);
if (((void**)MemMgr.getGOTBase())[idx] != ResultPtr) {
@@ -516,7 +516,7 @@
Relocations.size(), MemMgr.getGOTBase());
}
- //Update the GOT entry for F to point to the new code.
+ // Update the GOT entry for F to point to the new code.
if(MemMgr.isManagingGOT()) {
unsigned idx = getJITResolver(this).getGOTIndexForAddr((void*)BufferBegin);
if (((void**)MemMgr.getGOTBase())[idx] != (void*)BufferBegin) {
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[llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/vec_shuffle-5.ll
Changes in directory llvm/test/Regression/CodeGen/X86:
vec_shuffle-5.ll added (r1.1)
---
Log message:
Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
movlps cannot be used (e.g. when load from m64 has multiple uses).
---
Diffs of the changes: (+11 -0)
vec_shuffle-5.ll | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/test/Regression/CodeGen/X86/vec_shuffle-5.ll
diff -c /dev/null llvm/test/Regression/CodeGen/X86/vec_shuffle-5.ll:1.1
*** /dev/null Wed May 3 15:29:44 2006
--- llvm/test/Regression/CodeGen/X86/vec_shuffle-5.ll Wed May 3 15:29:34 2006
***
*** 0
--- 1,11
+ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | wc -l | grep
1
+
+ void %test() {
+ %tmp1 = load <4 x float>* null
+ %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float
1.00e+00, float 1.00e+00, float 1.00e+00, float 1.00e+00 >, <4
x uint> < uint 0, uint 1, uint 6, uint 7 >
+ %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer,
<4 x uint> < uint 2, uint 3, uint 6, uint 7 >
+ %tmp4 = add <4 x float> %tmp2, %tmp3
+ store <4 x float> %tmp4, <4 x float>* null
+ ret void
+ }
+
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.102 -> 1.103
---
Log message:
Change from using MachineRelocation ctors to using static methods
in MachineRelocation to create Relocations.
---
Diffs of the changes: (+3 -3)
X86CodeEmitter.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.102
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.103
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.102Wed May 3 12:21:32 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 3 15:30:20 2006
@@ -123,7 +123,7 @@
/// assuming this is part of a function call, which is PC relative.
///
void Emitter::emitGlobalAddressForCall(GlobalValue *GV, bool isTailCall) {
- MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
X86::reloc_pcrel_word, GV, 0,
!isTailCall /*Doesn'tNeedStub*/));
MCE.emitWordLE(0);
@@ -134,7 +134,7 @@
/// PC relative.
///
void Emitter::emitGlobalAddressForPtr(GlobalValue *GV, int Disp /* = 0 */) {
- MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
X86::reloc_absolute_word, GV));
MCE.emitWordLE(Disp); // The relocated value will be added to the
displacement
}
@@ -144,7 +144,7 @@
/// relative.
void Emitter::emitExternalSymbolAddress(const char *ES, bool isPCRelative,
bool isTailCall) {
- MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
isPCRelative ? X86::reloc_pcrel_word : X86::reloc_absolute_word,
ES));
MCE.emitWordLE(0);
}
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
Changes in directory llvm/lib/Target/Alpha:
AlphaCodeEmitter.cpp updated: 1.14 -> 1.15
---
Log message:
Change from using MachineRelocation ctors to using static methods
in MachineRelocation to create Relocations.
---
Diffs of the changes: (+3 -3)
AlphaCodeEmitter.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
diff -u llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.14
llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.15
--- llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.14 Wed May 3 12:10:41 2006
+++ llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp Wed May 3 15:30:20 2006
@@ -215,15 +215,15 @@
abort();
}
if (MO.isGlobalAddress())
- MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
Reloc, MO.getGlobal(), Offset,
false, useGOT));
else if (MO.isExternalSymbol())
- MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, MO.getSymbolName(), Offset,
true));
else
- MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
+MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
Reloc, MO.getConstantPoolIndex(),
Offset));
} else if (MO.isMachineBasicBlock()) {
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineRelocation.h
Changes in directory llvm/include/llvm/CodeGen:
MachineRelocation.h updated: 1.8 -> 1.9
---
Log message:
Change from using MachineRelocation ctors to using static methods
in MachineRelocation to create Relocations.
---
Diffs of the changes: (+46 -19)
MachineRelocation.h | 65
1 files changed, 46 insertions(+), 19 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineRelocation.h
diff -u llvm/include/llvm/CodeGen/MachineRelocation.h:1.8
llvm/include/llvm/CodeGen/MachineRelocation.h:1.9
--- llvm/include/llvm/CodeGen/MachineRelocation.h:1.8 Wed May 3 13:52:31 2006
+++ llvm/include/llvm/CodeGen/MachineRelocation.h Wed May 3 15:30:20 2006
@@ -45,7 +45,7 @@
/// Offset - This is the offset from the start of the code buffer of the
/// relocation to perform.
- unsigned Offset;
+ intptr_t Offset;
/// ConstantVal - A field that may be used by the target relocation type.
intptr_t ConstantVal;
@@ -64,35 +64,62 @@
bool GOTRelative: 1; // Should this relocation be relative to the
GOT?
public:
- MachineRelocation(unsigned offset, unsigned RelocationType, GlobalValue *GV,
-intptr_t cst = 0, bool DoesntNeedFunctionStub = 0,
-bool GOTrelative = 0)
-: Offset(offset), ConstantVal(cst), TargetReloType(RelocationType),
- AddrType(isGV), DoesntNeedFnStub(DoesntNeedFunctionStub),
- GOTRelative(GOTrelative){
+ /// MachineRelocation::getGV - Return a relocation entry for a GlobalValue.
+ ///
+ static MachineRelocation getGV(intptr_t offset, unsigned RelocationType,
+ GlobalValue *GV, intptr_t cst = 0,
+ bool DoesntNeedFunctionStub = 0,
+ bool GOTrelative = 0) {
assert((RelocationType & ~63) == 0 && "Relocation type too large!");
-Target.GV = GV;
+MachineRelocation Result;
+Result.Offset = offset;
+Result.ConstantVal = cst;
+Result.TargetReloType = RelocationType;
+Result.AddrType = isGV;
+Result.DoesntNeedFnStub = DoesntNeedFunctionStub;
+Result.GOTRelative = GOTrelative;
+Result.Target.GV = GV;
+return Result;
}
- MachineRelocation(unsigned offset, unsigned RelocationType, const char *ES,
-intptr_t cst = 0, bool GOTrelative = 0)
-: Offset(offset), ConstantVal(cst), TargetReloType(RelocationType),
- AddrType(isExtSym), DoesntNeedFnStub(false), GOTRelative(GOTrelative) {
+ /// MachineRelocation::getExtSym - Return a relocation entry for an external
+ /// symbol, like "free".
+ ///
+ static MachineRelocation getExtSym(intptr_t offset, unsigned RelocationType,
+ const char *ES, intptr_t cst = 0,
+ bool GOTrelative = 0) {
assert((RelocationType & ~63) == 0 && "Relocation type too large!");
-Target.ExtSym = ES;
+MachineRelocation Result;
+Result.Offset = offset;
+Result.ConstantVal = cst;
+Result.TargetReloType = RelocationType;
+Result.AddrType = isExtSym;
+Result.DoesntNeedFnStub = false;
+Result.GOTRelative = GOTrelative;
+Result.Target.ExtSym = ES;
+return Result;
}
- MachineRelocation(unsigned offset, unsigned RelocationType, unsigned CPI,
-intptr_t cst = 0)
-: Offset(offset), ConstantVal(cst), TargetReloType(RelocationType),
- AddrType(isConstPool), DoesntNeedFnStub(false), GOTRelative(0) {
+ /// MachineRelocation::getConstPool - Return a relocation entry for a
constant
+ /// pool entry.
+ ///
+ static MachineRelocation getConstPool(intptr_t offset,unsigned
RelocationType,
+unsigned CPI, intptr_t cst = 0) {
assert((RelocationType & ~63) == 0 && "Relocation type too large!");
-Target.ConstPool = CPI;
+MachineRelocation Result;
+Result.Offset = offset;
+Result.ConstantVal = cst;
+Result.TargetReloType = RelocationType;
+Result.AddrType = isConstPool;
+Result.DoesntNeedFnStub = false;
+Result.GOTRelative = false;
+Result.Target.ConstPool = CPI;
+return Result;
}
/// getMachineCodeOffset - Return the offset into the code buffer that the
/// relocation should be performed.
- unsigned getMachineCodeOffset() const {
+ intptr_t getMachineCodeOffset() const {
return Offset;
}
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCCodeEmitter.cpp updated: 1.58 -> 1.59
---
Log message:
Change from using MachineRelocation ctors to using static methods
in MachineRelocation to create Relocations.
---
Diffs of the changes: (+2 -2)
PPCCodeEmitter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
diff -u llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.58
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.59
--- llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.58 Wed May 3 12:10:41 2006
+++ llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp Wed May 3 15:30:20 2006
@@ -180,10 +180,10 @@
}
}
if (MO.isGlobalAddress())
- MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
Reloc, MO.getGlobal(), 0));
else
- MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
+ MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, MO.getSymbolName(), 0));
} else if (MO.isMachineBasicBlock()) {
unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
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[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td
Changes in directory llvm/lib/Target/X86: X86InstrSSE.td updated: 1.114 -> 1.115 --- Log message: Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when movlps cannot be used (e.g. when load from m64 has multiple uses). --- Diffs of the changes: (+8 -0) X86InstrSSE.td |8 1 files changed, 8 insertions(+) Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.114 llvm/lib/Target/X86/X86InstrSSE.td:1.115 --- llvm/lib/Target/X86/X86InstrSSE.td:1.114Tue Apr 25 12:48:41 2006 +++ llvm/lib/Target/X86/X86InstrSSE.td Wed May 3 15:32:03 2006 @@ -2481,6 +2481,14 @@ MOVL_shuffle_mask)), (v2i64 (MOVLPDrr VR128:$src1, VR128:$src2))>, Requires<[HasSSE2]>; +// vector_shuffle v1, v2 <4, 5, 2, 3> using MOVLPDrr (movsd) +def : Pat<(v4f32 (vector_shuffle VR128:$src1, VR128:$src2, + MOVLP_shuffle_mask)), + (v4f32 (MOVLPDrr VR128:$src1, VR128:$src2))>, Requires<[HasSSE2]>; +def : Pat<(v4i32 (vector_shuffle VR128:$src1, VR128:$src2, + MOVLP_shuffle_mask)), + (v4i32 (MOVLPDrr VR128:$src1, VR128:$src2))>, Requires<[HasSSE2]>; + // Set lowest element and zero upper elements. def : Pat<(bc_v2i64 (vector_shuffle immAllZerosV, (v2f64 (scalar_to_vector (loadf64 addr:$src))), ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.103 -> 1.104
---
Log message:
Simplify handling of relocations
---
Diffs of the changes: (+38 -24)
X86CodeEmitter.cpp | 62 -
1 files changed, 38 insertions(+), 24 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.103
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.104
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.103Wed May 3 15:30:20 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 3 19:42:08 2006
@@ -57,6 +57,8 @@
void emitExternalSymbolAddress(const char *ES, bool isPCRelative,
bool isTailCall);
+void emitDisplacementField(const MachineOperand *RelocOp, int DispVal);
+
void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
void emitConstant(unsigned Val, unsigned Size);
@@ -211,19 +213,39 @@
}
}
+/// isDisp8 - Return true if this signed displacement fits in a 8-bit
+/// sign-extended field.
static bool isDisp8(int Value) {
return Value == (signed char)Value;
}
+void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
+int DispVal) {
+ // If this is a simple integer displacement that doesn't require a
relocation,
+ // emit it now.
+ if (!RelocOp) {
+emitConstant(DispVal, 4);
+return;
+ }
+
+ // Otherwise, this is something that requires a relocation. Emit it as such
+ // now.
+ if (RelocOp->isGlobalAddress()) {
+emitGlobalAddressForPtr(RelocOp->getGlobal(), RelocOp->getOffset());
+ } else {
+assert(0 && "Unknown value to relocate!");
+ }
+}
+
void Emitter::emitMemModRMByte(const MachineInstr &MI,
unsigned Op, unsigned RegOpcodeField) {
const MachineOperand &Op3 = MI.getOperand(Op+3);
- GlobalValue *GV = 0;
int DispVal = 0;
-
+ const MachineOperand *DispForReloc = 0;
+
+ // Figure out what sort of displacement we have to handle here.
if (Op3.isGlobalAddress()) {
-GV = Op3.getGlobal();
-DispVal = Op3.getOffset();
+DispForReloc = &Op3;
} else if (Op3.isConstantPoolIndex()) {
DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex());
DispVal += Op3.getOffset();
@@ -244,27 +266,21 @@
if (BaseReg == 0) { // Just a displacement?
// Emit special case [disp32] encoding
MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
- if (GV)
-emitGlobalAddressForPtr(GV, DispVal);
- else
-emitConstant(DispVal, 4);
+
+ emitDisplacementField(DispForReloc, DispVal);
} else {
unsigned BaseRegNo = getX86RegNum(BaseReg);
- if (GV) {
-// Emit the most general non-SIB encoding: [REG+disp32]
-MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
-emitGlobalAddressForPtr(GV, DispVal);
- } else if (DispVal == 0 && BaseRegNo != N86::EBP) {
+ if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) {
// Emit simple indirect register encoding... [EAX] f.e.
MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo));
- } else if (isDisp8(DispVal)) {
+ } else if (!DispForReloc && isDisp8(DispVal)) {
// Emit the disp8 encoding... [REG+disp8]
MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
emitConstant(DispVal, 1);
} else {
// Emit the most general non-SIB encoding: [REG+disp32]
MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
-emitConstant(DispVal, 4);
+emitDisplacementField(DispForReloc, DispVal);
}
}
@@ -278,8 +294,8 @@
// MOD=0, BASE=5, to JUST get the index, scale, and displacement.
MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
ForceDisp32 = true;
-} else if (GV) {
- // Emit the normal disp32 encoding...
+} else if (DispForReloc) {
+ // Emit the normal disp32 encoding.
MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
ForceDisp32 = true;
} else if (DispVal == 0 && BaseReg != X86::EBP) {
@@ -314,13 +330,10 @@
}
// Do we need to output a displacement?
-if (DispVal != 0 || ForceDisp32 || ForceDisp8) {
- if (!ForceDisp32 && isDisp8(DispVal))
-emitConstant(DispVal, 1);
- else if (GV)
-emitGlobalAddressForPtr(GV, DispVal);
- else
-emitConstant(DispVal, 4);
+if (ForceDisp8) {
+ emitConstant(DispVal, 1);
+} else if (DispVal != 0 || ForceDisp32) {
+ emitDisplacementField(DispForReloc, DispVal);
}
}
}
@@ -420,6 +433,7 @@
if (MI.getNumOperands() == 2) {
const MachineOperand &MO1 = MI.getOperand(1);
if (Value *V = MO1.getVRegValueOrNull()) {
+assert(0 && "??");
assert(sizeOfImm(Desc) == 4 &&
"Don't know how to emit non-pointer value
[llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Changes in directory llvm/lib/CodeGen:
MachineInstr.cpp updated: 1.111 -> 1.112
---
Log message:
Remove some more unused stuff from MachineInstr that was leftover from V9.
---
Diffs of the changes: (+0 -38)
MachineInstr.cpp | 38 --
1 files changed, 38 deletions(-)
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.111
llvm/lib/CodeGen/MachineInstr.cpp:1.112
--- llvm/lib/CodeGen/MachineInstr.cpp:1.111 Sat Apr 22 13:53:45 2006
+++ llvm/lib/CodeGen/MachineInstr.cpp Wed May 3 19:44:25 2006
@@ -199,14 +199,6 @@
if (MO.hasAllocatedReg())
OutputReg(OS, MO.getReg(), MRI);
break;
- case MachineOperand::MO_CCRegister:
-OS << "%ccreg";
-OutputValue(OS, MO.getVRegValue());
-if (MO.hasAllocatedReg()) {
- OS << "==";
- OutputReg(OS, MO.getReg(), MRI);
-}
-break;
case MachineOperand::MO_MachineRegister:
OutputReg(OS, MO.getMachineRegNum(), MRI);
break;
@@ -216,17 +208,6 @@
case MachineOperand::MO_UnextendedImmed:
OS << (long)MO.getImmedValue();
break;
- case MachineOperand::MO_PCRelativeDisp: {
-const Value* opVal = MO.getVRegValue();
-bool isLabel = isa(opVal) || isa(opVal);
-OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
-if (opVal->hasName())
- OS << opVal->getName();
-else
- OS << (const void*) opVal;
-OS << ")";
-break;
- }
case MachineOperand::MO_MachineBasicBlock:
OS << "mbb<"
<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
@@ -341,14 +322,6 @@
OutputValue(OS, MO.getVRegValue());
}
break;
- case MachineOperand::MO_CCRegister:
-OS << "%ccreg";
-OutputValue(OS, MO.getVRegValue());
-if (MO.hasAllocatedReg()) {
- OS << "==";
- OutputReg(OS, MO.getReg());
-}
-break;
case MachineOperand::MO_MachineRegister:
OutputReg(OS, MO.getMachineRegNum());
break;
@@ -358,17 +331,6 @@
case MachineOperand::MO_UnextendedImmed:
OS << (long)MO.getImmedValue();
break;
- case MachineOperand::MO_PCRelativeDisp: {
-const Value* opVal = MO.getVRegValue();
-bool isLabel = isa(opVal) || isa(opVal);
-OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
-if (opVal->hasName())
- OS << opVal->getName();
-else
- OS << (const void*) opVal;
-OS << ")";
-break;
- }
case MachineOperand::MO_MachineBasicBlock:
OS << "getBasicBlock())->getName()
___
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
Changes in directory llvm/lib/Target/Alpha: AlphaAsmPrinter.cpp updated: 1.36 -> 1.37 --- Log message: Remove some more unused stuff from MachineInstr that was leftover from V9. --- Diffs of the changes: (+0 -6) AlphaAsmPrinter.cpp |6 -- 1 files changed, 6 deletions(-) Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.36 llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.37 --- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.36 Tue May 2 20:29:57 2006 +++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed May 3 19:44:25 2006 @@ -100,7 +100,6 @@ } // FALLTHROUGH case MachineOperand::MO_MachineRegister: - case MachineOperand::MO_CCRegister: O << RI.get(MO.getReg()).Name; return; @@ -110,11 +109,6 @@ abort(); return; - case MachineOperand::MO_PCRelativeDisp: -std::cerr << "Shouldn't use addPCDisp() when building Alpha MachineInstrs"; -abort(); -return; - case MachineOperand::MO_MachineBasicBlock: printBasicBlockLabel(MO.getMachineBasicBlock()); return; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.167 -> 1.168 --- Log message: Remove some more unused stuff from MachineInstr that was leftover from V9. --- Diffs of the changes: (+0 -6) PPCAsmPrinter.cpp |6 -- 1 files changed, 6 deletions(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.167 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.168 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.167 Tue May 2 20:29:57 2006 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed May 3 19:44:25 2006 @@ -360,7 +360,6 @@ } // FALLTHROUGH case MachineOperand::MO_MachineRegister: - case MachineOperand::MO_CCRegister: O << RI.get(MO.getReg()).Name; return; @@ -370,11 +369,6 @@ abort(); return; - case MachineOperand::MO_PCRelativeDisp: -std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs"; -abort(); -return; - case MachineOperand::MO_MachineBasicBlock: printBasicBlockLabel(MO.getMachineBasicBlock()); return; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64AsmPrinter.cpp
Changes in directory llvm/lib/Target/IA64:
IA64AsmPrinter.cpp updated: 1.28 -> 1.29
---
Log message:
Remove some more unused stuff from MachineInstr that was leftover from V9.
---
Diffs of the changes: (+0 -7)
IA64AsmPrinter.cpp |7 ---
1 files changed, 7 deletions(-)
Index: llvm/lib/Target/IA64/IA64AsmPrinter.cpp
diff -u llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.28
llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.29
--- llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.28Tue May 2 20:29:57 2006
+++ llvm/lib/Target/IA64/IA64AsmPrinter.cpp Wed May 3 19:44:25 2006
@@ -180,10 +180,8 @@
}
// FALLTHROUGH
case MachineOperand::MO_MachineRegister:
- case MachineOperand::MO_CCRegister: {
O << RI.get(MO.getReg()).Name;
return;
- }
case MachineOperand::MO_SignExtendedImmed:
case MachineOperand::MO_UnextendedImmed:
@@ -192,11 +190,6 @@
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock());
return;
- case MachineOperand::MO_PCRelativeDisp:
-std::cerr << "Shouldn't use addPCDisp() when building IA64 MachineInstrs";
-abort ();
-return;
-
case MachineOperand::MO_ConstantPoolIndex: {
O << "@gprel(" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() <<
"_"
<< MO.getConstantPoolIndex() << ")";
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.168 -> 1.169
MachineInstrBuilder.h updated: 1.30 -> 1.31
---
Log message:
Remove some more unused stuff from MachineInstr that was leftover from V9.
---
Diffs of the changes: (+3 -71)
MachineInstr.h| 49 +++--
MachineInstrBuilder.h | 25 -
2 files changed, 3 insertions(+), 71 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.168
llvm/include/llvm/CodeGen/MachineInstr.h:1.169
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.168 Sat Apr 22 13:53:45 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 19:44:25 2006
@@ -98,10 +98,8 @@
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
MO_MachineRegister, // pre-assigned machine register `regNum'
-MO_CCRegister,
MO_SignExtendedImmed,
MO_UnextendedImmed,
-MO_PCRelativeDisp,
MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index
MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
@@ -237,7 +235,6 @@
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
- bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
bool isImmediate() const {
return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
}
@@ -251,16 +248,14 @@
/// has one. This is deprecated and only used by the SPARC v9 backend.
///
Value* getVRegValueOrNull() const {
-return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
-isPCRelativeDisp()) ? contents.value : NULL;
+return opType == MO_VirtualRegister ? contents.value : NULL;
}
/// MachineOperand accessors that only work on certain types of
/// MachineOperand...
///
Value* getVRegValue() const {
-assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
- || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
+assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
return contents.value;
}
int getMachineRegNum() const {
@@ -322,8 +317,7 @@
///
bool hasAllocatedReg() const {
return (extra.regNum >= 0 &&
-(opType == MO_VirtualRegister || opType == MO_CCRegister ||
- opType == MO_MachineRegister));
+(opType == MO_VirtualRegister || opType == MO_MachineRegister));
}
/// getReg - Returns the register number. It is a runtime error to call this
@@ -362,25 +356,6 @@
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
- /// markHi32, markLo32, etc. - These methods are deprecated and only used by
- /// the SPARC v9 back-end.
- ///
- void markHi32() { flags |= HIFLAG32; }
- void markLo32() { flags |= LOFLAG32; }
- void markHi64() { flags |= HIFLAG64; }
- void markLo64() { flags |= LOFLAG64; }
-
-private:
- /// setRegForValue - Replaces the Value with its corresponding physical
- /// register after register allocation is complete. This is deprecated
- /// and only used by the SPARC v9 back-end.
- ///
- void setRegForValue(int reg) {
-assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
- opType == MO_MachineRegister);
-extra.regNum = reg;
- }
-
friend class MachineInstr;
};
@@ -507,15 +482,6 @@
UTy, isPCRelative));
}
- void addCCRegOperand(Value *V,
- MachineOperand::UseType UTy = MachineOperand::Use) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
- false));
- }
-
-
/// addRegOperand - Add a symbolic virtual register reference...
///
void addRegOperand(int reg, bool isDef) {
@@ -536,15 +502,6 @@
MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
}
- /// addPCDispOperand - Add a PC relative displacement operand to the MI
- ///
- void addPCDispOperand(Value *V) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(V,
MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
- }
-
/// addMachineRegOperand - Add a virtual register operand to this
MachineInstr
///
void addMachineRegOperand(int reg, bool isDef) {
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.30
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.31
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.30
[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
Changes in directory llvm/lib/Target/Sparc: SparcAsmPrinter.cpp updated: 1.60 -> 1.61 --- Log message: Remove some more unused stuff from MachineInstr that was leftover from V9. --- Diffs of the changes: (+0 -4) SparcAsmPrinter.cpp |4 1 files changed, 4 deletions(-) Index: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp diff -u llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.60 llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.61 --- llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.60 Tue May 2 20:29:57 2006 +++ llvm/lib/Target/Sparc/SparcAsmPrinter.cpp Wed May 3 19:44:25 2006 @@ -166,10 +166,6 @@ case MachineOperand::MO_MachineBasicBlock: printBasicBlockLabel(MO.getMachineBasicBlock()); return; - case MachineOperand::MO_PCRelativeDisp: -std::cerr << "Shouldn't use addPCDisp() when building Sparc MachineInstrs"; -abort (); -return; case MachineOperand::MO_GlobalAddress: O << Mang->getValueName(MO.getGlobal()); break; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp X86IntelAsmPrinter.cpp
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.38 -> 1.39
X86IntelAsmPrinter.cpp updated: 1.36 -> 1.37
---
Log message:
Remove some more unused stuff from MachineInstr that was leftover from V9.
---
Diffs of the changes: (+0 -8)
X86ATTAsmPrinter.cpp |4
X86IntelAsmPrinter.cpp |4
2 files changed, 8 deletions(-)
Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.38
llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.39
--- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.38 Tue May 2 00:37:32 2006
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.cppWed May 3 19:44:25 2006
@@ -126,10 +126,6 @@
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock());
return;
- case MachineOperand::MO_PCRelativeDisp:
-std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
-abort ();
-return;
case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.36
llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.37
--- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.36 Tue May 2 00:37:32 2006
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Wed May 3 19:44:25 2006
@@ -134,10 +134,6 @@
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock());
return;
- case MachineOperand::MO_PCRelativeDisp:
-assert(0 && "Shouldn't use addPCDisp() when building X86 MachineInstrs");
-abort ();
-return;
case MachineOperand::MO_ConstantPoolIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET ";
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
Changes in directory llvm/lib/Target/Alpha: AlphaAsmPrinter.cpp updated: 1.37 -> 1.38 --- Log message: Remove some more V9-specific stuff. --- Diffs of the changes: (+1 -6) AlphaAsmPrinter.cpp |7 +-- 1 files changed, 1 insertion(+), 6 deletions(-) Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.37 llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.38 --- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.37 Wed May 3 19:44:25 2006 +++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed May 3 19:49:59 2006 @@ -123,12 +123,7 @@ return; case MachineOperand::MO_GlobalAddress: -//Abuse PCrel to specify pcrel calls -//calls are the only thing that use this flag -// if (MO.isPCRelative()) -// O << PrivateGlobalPrefix << Mang->getValueName(MO.getGlobal()) << "..ng"; -// else - O << Mang->getValueName(MO.getGlobal()); +O << Mang->getValueName(MO.getGlobal()); return; default: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Changes in directory llvm/lib/CodeGen:
MachineInstr.cpp updated: 1.112 -> 1.113
---
Log message:
Remove some more V9-specific stuff.
---
Diffs of the changes: (+2 -32)
MachineInstr.cpp | 34 ++
1 files changed, 2 insertions(+), 32 deletions(-)
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.112
llvm/lib/CodeGen/MachineInstr.cpp:1.113
--- llvm/lib/CodeGen/MachineInstr.cpp:1.112 Wed May 3 19:44:25 2006
+++ llvm/lib/CodeGen/MachineInstr.cpp Wed May 3 19:49:59 2006
@@ -176,18 +176,6 @@
if (TM) MRI = TM->getRegisterInfo();
- bool CloseParen = true;
- if (MO.isHiBits32())
-OS << "%lm(";
- else if (MO.isLoBits32())
-OS << "%lo(";
- else if (MO.isHiBits64())
-OS << "%hh(";
- else if (MO.isLoBits64())
-OS << "%hm(";
- else
-CloseParen = false;
-
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
if (MO.getVRegValue()) {
@@ -235,9 +223,6 @@
default:
assert(0 && "Unrecognized operand type");
}
-
- if (CloseParen)
-OS << ")";
}
void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
@@ -272,8 +257,7 @@
OS << "\n";
}
-namespace llvm {
-std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) {
+std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
// If the instruction is embedded into a basic block, we can find the target
// info for the instruction.
if (const MachineBasicBlock *MBB = MI.getParent()) {
@@ -301,16 +285,7 @@
return os << "\n";
}
-std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) {
- if (MO.isHiBits32())
-OS << "%lm(";
- else if (MO.isLoBits32())
-OS << "%lo(";
- else if (MO.isHiBits64())
-OS << "%hh(";
- else if (MO.isLoBits64())
-OS << "%hm(";
-
+std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
if (MO.hasAllocatedReg())
@@ -356,10 +331,5 @@
break;
}
- if (MO.isHiBits32() || MO.isLoBits32() || MO.isHiBits64() || MO.isLoBits64())
-OS << ")";
-
return OS;
}
-
-}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.169 -> 1.170
---
Log message:
Remove some more V9-specific stuff.
---
Diffs of the changes: (+0 -15)
MachineInstr.h | 15 ---
1 files changed, 15 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.169
llvm/include/llvm/CodeGen/MachineInstr.h:1.170
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.169 Wed May 3 19:44:25 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 19:49:59 2006
@@ -75,10 +75,6 @@
enum {
DEFFLAG = 0x01, // this is a def of the operand
USEFLAG = 0x02, // this is a use of the operand
-HIFLAG32= 0x04, // operand is %hi32(value_or_immedVal)
-LOFLAG32= 0x08, // operand is %lo32(value_or_immedVal)
-HIFLAG64= 0x10, // operand is %hi64(value_or_immedVal)
-LOFLAG64= 0x20, // operand is %lo64(value_or_immedVal)
PCRELATIVE = 0x40// Operand is relative to PC, not a global
address
};
@@ -215,13 +211,6 @@
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
- /// isPCRelative - This returns the value of the PCRELATIVE flag, which
- /// indicates whether this operand should be emitted as a PC relative value
- /// instead of a global address. This is used for operands of the forms:
- /// MachineBasicBlock, GlobalAddress, ExternalSymbol
- ///
- bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
-
/// isRegister - Return true if this operand is a register operand. The X86
/// backend currently can't decide whether to use MO_MR or MO_VR to represent
/// them, so we accept both.
@@ -307,10 +296,6 @@
MachineOperand& setUse () { flags |= USEFLAG; return *this; }
boolisDef () const { return flags & DEFFLAG; }
MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
- boolisHiBits32 () const { return flags & HIFLAG32; }
- boolisLoBits32 () const { return flags & LOFLAG32; }
- boolisHiBits64 () const { return flags & HIFLAG64; }
- boolisLoBits64 () const { return flags & LOFLAG64; }
/// hasAllocatedReg - Returns true iff a machine register has been
/// allocated to this operand.
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.104 -> 1.105
---
Log message:
Remove some more V9-specific stuff.
---
Diffs of the changes: (+0 -1)
X86CodeEmitter.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.104
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.105
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.104Wed May 3 19:42:08 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 3 19:49:59 2006
@@ -440,7 +440,6 @@
} else if (MO1.isGlobalAddress()) {
assert(sizeOfImm(Desc) == 4 &&
"Don't know how to emit non-pointer values!");
-assert(!MO1.isPCRelative() && "Function pointer ref is PC relative?");
emitGlobalAddressForPtr(MO1.getGlobal(), MO1.getOffset());
} else if (MO1.isExternalSymbol()) {
assert(sizeOfImm(Desc) == 4 &&
___
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp AlphaRegisterInfo.cpp
Changes in directory llvm/lib/Target/Alpha:
AlphaAsmPrinter.cpp updated: 1.38 -> 1.39
AlphaRegisterInfo.cpp updated: 1.40 -> 1.41
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+3 -8)
AlphaAsmPrinter.cpp |8 +---
AlphaRegisterInfo.cpp |3 ++-
2 files changed, 3 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.38
llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.39
--- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.38 Wed May 3 19:49:59 2006
+++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed May 3 20:15:02 2006
@@ -77,7 +77,7 @@
void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
{
const MachineOperand &MO = MI->getOperand(opNum);
- if (MO.getType() == MachineOperand::MO_MachineRegister) {
+ if (MO.getType() == MachineOperand::MO_VirtualRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
O << TM.getRegisterInfo()->get(MO.getReg()).Name;
} else if (MO.isImmediate()) {
@@ -94,12 +94,6 @@
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
-if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- return;
-}
-// FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
O << RI.get(MO.getReg()).Name;
return;
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.40
llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.41
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.40Fri Apr 7 11:34:45 2006
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Wed May 3 20:15:02 2006
@@ -263,7 +263,8 @@
.addReg(Alpha::R29).addImm(curgpdist);
//evil const_cast until MO stuff setup to handle const
- BuildMI(MBB, MBBI, Alpha::ALTENT,
1).addGlobalAddress(const_cast(MF.getFunction()), true);
+ BuildMI(MBB, MBBI, Alpha::ALTENT, 1)
+.addGlobalAddress(const_cast(MF.getFunction()));
// Get the number of bytes to allocate from the FrameInfo
long NumBytes = MFI->getStackSize();
___
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64AsmPrinter.cpp
Changes in directory llvm/lib/Target/IA64:
IA64AsmPrinter.cpp updated: 1.29 -> 1.30
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+1 -7)
IA64AsmPrinter.cpp |8 +---
1 files changed, 1 insertion(+), 7 deletions(-)
Index: llvm/lib/Target/IA64/IA64AsmPrinter.cpp
diff -u llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.29
llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.30
--- llvm/lib/Target/IA64/IA64AsmPrinter.cpp:1.29Wed May 3 19:44:25 2006
+++ llvm/lib/Target/IA64/IA64AsmPrinter.cpp Wed May 3 20:15:02 2006
@@ -66,7 +66,7 @@
// This method is used by the tablegen'erated instruction printer.
void printOperand(const MachineInstr *MI, unsigned OpNo){
const MachineOperand &MO = MI->getOperand(OpNo);
- if (MO.getType() == MachineOperand::MO_MachineRegister) {
+ if (MO.getType() == MachineOperand::MO_VirtualRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not
physref??");
//XXX Bug Workaround: See note in Printer::doInitialization about %.
O << TM.getRegisterInfo()->get(MO.getReg()).Name;
@@ -174,12 +174,6 @@
const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
-if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- return;
-}
-// FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
O << RI.get(MO.getReg()).Name;
return;
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.168 -> 1.169
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+1 -8)
PPCAsmPrinter.cpp |9 +
1 files changed, 1 insertion(+), 8 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.168
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.169
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.168 Wed May 3 19:44:25 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed May 3 20:15:02 2006
@@ -86,7 +86,7 @@
void printOperand(const MachineInstr *MI, unsigned OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);
- if (MO.getType() == MachineOperand::MO_MachineRegister) {
+ if (MO.getType() == MachineOperand::MO_VirtualRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not
physreg??");
O << TM.getRegisterInfo()->get(MO.getReg()).Name;
} else if (MO.isImmediate()) {
@@ -353,13 +353,6 @@
int new_symbol;
switch (MO.getType()) {
- case MachineOperand::MO_VirtualRegister:
-if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- return;
-}
-// FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
O << RI.get(MO.getReg()).Name;
return;
___
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[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
Changes in directory llvm/lib/Target/Sparc:
SparcAsmPrinter.cpp updated: 1.61 -> 1.62
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+1 -8)
SparcAsmPrinter.cpp |9 +
1 files changed, 1 insertion(+), 8 deletions(-)
Index: llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
diff -u llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.61
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.62
--- llvm/lib/Target/Sparc/SparcAsmPrinter.cpp:1.61 Wed May 3 19:44:25 2006
+++ llvm/lib/Target/Sparc/SparcAsmPrinter.cpp Wed May 3 20:15:02 2006
@@ -147,12 +147,6 @@
}
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
-if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- break;
-}
-// FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
O << "%" << LowercaseString (RI.get(MO.getReg()).Name);
else
@@ -195,8 +189,7 @@
MachineOperand::MachineOperandType OpTy = MI->getOperand(opNum+1).getType();
- if ((OpTy == MachineOperand::MO_VirtualRegister ||
- OpTy == MachineOperand::MO_MachineRegister) &&
+ if (OpTy == MachineOperand::MO_VirtualRegister &&
MI->getOperand(opNum+1).getReg() == SP::G0)
return; // don't print "+%g0"
if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.83 -> 1.84
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+5 -5)
ScheduleDAG.cpp | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.83
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.84
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.83 Tue May 2 20:29:56 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Wed May 3 20:15:02 2006
@@ -110,7 +110,7 @@
MI->addRegOperand(R->getReg(), MachineOperand::Use);
} else if (GlobalAddressSDNode *TGA =
dyn_cast(Op)) {
-MI->addGlobalAddressOperand(TGA->getGlobal(), false, TGA->getOffset());
+MI->addGlobalAddressOperand(TGA->getGlobal(), TGA->getOffset());
} else if (BasicBlockSDNode *BB =
dyn_cast(Op)) {
MI->addMachineBasicBlockOperand(BB->getBasicBlock());
@@ -143,7 +143,7 @@
MI->addConstantPoolIndexOperand(Idx, Offset);
} else if (ExternalSymbolSDNode *ES =
dyn_cast(Op)) {
-MI->addExternalSymbolOperand(ES->getSymbol(), false);
+MI->addExternalSymbolOperand(ES->getSymbol());
} else {
assert(Op.getValueType() != MVT::Other &&
Op.getValueType() != MVT::Flag &&
@@ -296,7 +296,7 @@
// Add the asm string as an external symbol operand.
const char *AsmStr =
cast(Node->getOperand(1))->getSymbol();
- MI->addExternalSymbolOperand(AsmStr, false);
+ MI->addExternalSymbolOperand(AsmStr);
// Add all of the operand registers to the instruction.
for (unsigned i = 2; i != NumOps;) {
@@ -311,13 +311,13 @@
case 1: // Use of register.
for (; NumVals; --NumVals, ++i) {
unsigned Reg = cast(Node->getOperand(i))->getReg();
-MI->addMachineRegOperand(Reg, MachineOperand::Use);
+MI->addRegOperand(Reg, MachineOperand::Use);
}
break;
case 2: // Def of register.
for (; NumVals; --NumVals, ++i) {
unsigned Reg = cast(Node->getOperand(i))->getReg();
-MI->addMachineRegOperand(Reg, MachineOperand::Def);
+MI->addRegOperand(Reg, MachineOperand::Def);
}
break;
case 3: { // Immediate.
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[llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Changes in directory llvm/lib/CodeGen:
MachineInstr.cpp updated: 1.113 -> 1.114
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+1 -7)
MachineInstr.cpp |8 +---
1 files changed, 1 insertion(+), 7 deletions(-)
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.113
llvm/lib/CodeGen/MachineInstr.cpp:1.114
--- llvm/lib/CodeGen/MachineInstr.cpp:1.113 Wed May 3 19:49:59 2006
+++ llvm/lib/CodeGen/MachineInstr.cpp Wed May 3 20:15:02 2006
@@ -141,7 +141,7 @@
void MachineInstr::SetMachineOperandReg(unsigned i, int regNum) {
assert(i < getNumOperands()); // must be explicit op
- operands[i].opType = MachineOperand::MO_MachineRegister;
+ operands[i].opType = MachineOperand::MO_VirtualRegister;
operands[i].contents.value = NULL;
operands[i].extra.regNum = regNum;
}
@@ -187,9 +187,6 @@
if (MO.hasAllocatedReg())
OutputReg(OS, MO.getReg(), MRI);
break;
- case MachineOperand::MO_MachineRegister:
-OutputReg(OS, MO.getMachineRegNum(), MRI);
-break;
case MachineOperand::MO_SignExtendedImmed:
OS << (long)MO.getImmedValue();
break;
@@ -297,9 +294,6 @@
OutputValue(OS, MO.getVRegValue());
}
break;
- case MachineOperand::MO_MachineRegister:
-OutputReg(OS, MO.getMachineRegNum());
-break;
case MachineOperand::MO_SignExtendedImmed:
OS << (long)MO.getImmedValue();
break;
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp X86InstrBuilder.h X86IntelAsmPrinter.cpp X86IntelAsmPrinter.h X86RegisterInfo.cpp
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.39 -> 1.40
X86InstrBuilder.h updated: 1.17 -> 1.18
X86IntelAsmPrinter.cpp updated: 1.37 -> 1.38
X86IntelAsmPrinter.h updated: 1.19 -> 1.20
X86RegisterInfo.cpp updated: 1.145 -> 1.146
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+4 -11)
X86ATTAsmPrinter.cpp |1 -
X86InstrBuilder.h |2 +-
X86IntelAsmPrinter.cpp |6 --
X86IntelAsmPrinter.h |4 ++--
X86RegisterInfo.cpp|2 +-
5 files changed, 4 insertions(+), 11 deletions(-)
Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.39
llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.40
--- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.39 Wed May 3 19:44:25 2006
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.cppWed May 3 20:15:02 2006
@@ -109,7 +109,6 @@
const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
- case MachineOperand::MO_MachineRegister:
assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Virtual registers should not make it this far!");
O << '%';
Index: llvm/lib/Target/X86/X86InstrBuilder.h
diff -u llvm/lib/Target/X86/X86InstrBuilder.h:1.17
llvm/lib/Target/X86/X86InstrBuilder.h:1.18
--- llvm/lib/Target/X86/X86InstrBuilder.h:1.17 Thu Apr 21 18:38:14 2005
+++ llvm/lib/Target/X86/X86InstrBuilder.h Wed May 3 20:15:02 2006
@@ -93,7 +93,7 @@
assert (0);
MIB.addZImm(AM.Scale).addReg(AM.IndexReg);
if (AM.GV)
-return MIB.addGlobalAddress(AM.GV, false, AM.Disp);
+return MIB.addGlobalAddress(AM.GV, AM.Disp);
else
return MIB.addSImm(AM.Disp);
}
Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.37
llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.38
--- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.37 Wed May 3 19:44:25 2006
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Wed May 3 20:15:02 2006
@@ -115,12 +115,6 @@
const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
-if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- return;
-}
-// FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
O << RI.get(MO.getReg()).Name;
else
Index: llvm/lib/Target/X86/X86IntelAsmPrinter.h
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.19
llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.20
--- llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.19 Mon May 1 22:58:45 2006
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.hWed May 3 20:15:02 2006
@@ -37,8 +37,8 @@
void printOperand(const MachineInstr *MI, unsigned OpNo,
const char *Modifier = 0) {
const MachineOperand &MO = MI->getOperand(OpNo);
-if (MO.getType() == MachineOperand::MO_MachineRegister) {
- assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
+if (MO.getType() == MachineOperand::MO_VirtualRegister) {
+ assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) && "Not
physreg??");
O << TM.getRegisterInfo()->get(MO.getReg()).Name;
} else {
printOp(MO, Modifier);
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.145
llvm/lib/Target/X86/X86RegisterInfo.cpp:1.146
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.145 Thu Apr 27 21:23:35 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Wed May 3 20:15:02 2006
@@ -150,7 +150,7 @@
else if (MI->getOperand(1).isGlobalAddress())
return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
.addGlobalAddress(MI->getOperand(1).getGlobal(),
-false, MI->getOperand(1).getOffset());
+MI->getOperand(1).getOffset());
else if (MI->getOperand(1).isJumpTableIndex())
return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
.addJumpTableIndex(MI->getOperand(1).getJumpTableIndex());
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.170 -> 1.171
MachineInstrBuilder.h updated: 1.31 -> 1.32
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+13 -93)
MachineInstr.h| 82 ++
MachineInstrBuilder.h | 24 +-
2 files changed, 13 insertions(+), 93 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.170
llvm/include/llvm/CodeGen/MachineInstr.h:1.171
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.170 Wed May 3 19:49:59 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 20:15:02 2006
@@ -58,9 +58,6 @@
// - Reg will be of virtual register type MO_MInstrVirtualReg. The field
// MachineInstr* minstr will point to the instruction that computes reg.
//
-// - %sp will be of virtual register type MO_MachineReg.
-// The field regNum identifies the machine register.
-//
// - NumElements will be of virtual register type MO_VirtualReg.
// The field Value* value identifies the value.
//
@@ -75,7 +72,6 @@
enum {
DEFFLAG = 0x01, // this is a def of the operand
USEFLAG = 0x02, // this is a use of the operand
-PCRELATIVE = 0x40// Operand is relative to PC, not a global
address
};
public:
@@ -93,7 +89,6 @@
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
-MO_MachineRegister, // pre-assigned machine register `regNum'
MO_SignExtendedImmed,
MO_UnextendedImmed,
MO_MachineBasicBlock, // MachineBasicBlock reference
@@ -152,18 +147,9 @@
extra.regNum = Reg;
}
- MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
- bool isPCRelative = false)
-: flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
-assert(OpTy != MachineOperand::MO_GlobalAddress);
-zeroContents();
-contents.value = V;
-extra.regNum = -1;
- }
-
MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
- bool isPCRelative = false, int Offset = 0)
-: flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
+ int Offset = 0)
+: flags(UseTy), opType(OpTy) {
assert(OpTy == MachineOperand::MO_GlobalAddress);
zeroContents ();
contents.value = (Value*)V;
@@ -177,8 +163,8 @@
extra.regNum = -1;
}
- MachineOperand(const char *SymName, bool isPCRelative, int Offset)
-: flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
+ MachineOperand(const char *SymName, int Offset)
+: flags(0), opType(MO_ExternalSymbol) {
zeroContents ();
contents.SymbolName = SymName;
extra.offset = Offset;
@@ -192,7 +178,6 @@
extra = M.extra;
}
-
~MachineOperand() {}
const MachineOperand &operator=(const MachineOperand &MO) {
@@ -218,7 +203,7 @@
/// Note: The sparc backend should not use this method.
///
bool isRegister() const {
-return opType == MO_MachineRegister || opType == MO_VirtualRegister;
+return opType == MO_VirtualRegister;
}
/// Accessors that tell you what kind of MachineOperand you're looking at.
@@ -247,10 +232,6 @@
assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
return contents.value;
}
- int getMachineRegNum() const {
-assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
-return extra.regNum;
- }
int64_t getImmedValue() const {
assert(isImmediate() && "Wrong MachineOperand accessor");
return contents.immedVal;
@@ -301,8 +282,7 @@
/// allocated to this operand.
///
bool hasAllocatedReg() const {
-return (extra.regNum >= 0 &&
-(opType == MO_VirtualRegister || opType == MO_MachineRegister));
+return extra.regNum >= 0 && opType == MO_VirtualRegister;
}
/// getReg - Returns the register number. It is a runtime error to call this
@@ -445,28 +425,6 @@
// Accessors to add operands when building up machine instructions
//
- /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
- /// operands list...
- ///
- void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(V, MachineOperand::MO_VirtualRegister,
- !isDef ? MachineOperand::Use :
- (isDefAndUse ? MachineOperand::UseAndDef :
- MachineOperand::Def)));
- }
-
- void addRegOperand(Value *V,
- MachineOperand::UseType UTy = MachineOperand::Use,
- bool isPCRelative = false) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(
[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.105 -> 1.106
---
Log message:
Remove a bunch more dead V9 specific stuff
---
Diffs of the changes: (+1 -6)
X86CodeEmitter.cpp |7 +--
1 files changed, 1 insertion(+), 6 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.105
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.106
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.105Wed May 3 19:49:59 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 3 20:26:39 2006
@@ -432,12 +432,7 @@
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
if (MI.getNumOperands() == 2) {
const MachineOperand &MO1 = MI.getOperand(1);
- if (Value *V = MO1.getVRegValueOrNull()) {
-assert(0 && "??");
-assert(sizeOfImm(Desc) == 4 &&
- "Don't know how to emit non-pointer values!");
-emitGlobalAddressForPtr(cast(V));
- } else if (MO1.isGlobalAddress()) {
+ if (MO1.isGlobalAddress()) {
assert(sizeOfImm(Desc) == 4 &&
"Don't know how to emit non-pointer values!");
emitGlobalAddressForPtr(MO1.getGlobal(), MO1.getOffset());
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.171 -> 1.172
---
Log message:
Remove a bunch more dead V9 specific stuff
---
Diffs of the changes: (+7 -70)
MachineInstr.h | 77 +
1 files changed, 7 insertions(+), 70 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.171
llvm/include/llvm/CodeGen/MachineInstr.h:1.172
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.171 Wed May 3 20:15:02 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 20:26:39 2006
@@ -37,35 +37,8 @@
//===--===//
// class MachineOperand
//
-// Purpose:
// Representation of each machine instruction operand.
-// This class is designed so that you can allocate a vector of operands
-// first and initialize each one later.
-//
-// E.g, for this VM instruction:
-// ptr = alloca type, numElements
-// we generate 2 machine instructions on the SPARC:
-//
-//mul Constant, Numelements -> Reg
-//add %sp, Reg -> Ptr
-//
-// Each instruction has 3 operands, listed above. Of those:
-// - Reg, NumElements, and Ptr are of operand type MO_Register.
-// - Constant is of operand type MO_SignExtendedImmed on the SPARC.
-//
-// For the register operands, the virtual register type is as follows:
-//
-// - Reg will be of virtual register type MO_MInstrVirtualReg. The field
-// MachineInstr* minstr will point to the instruction that computes reg.
//
-// - NumElements will be of virtual register type MO_VirtualReg.
-// The field Value* value identifies the value.
-//
-// - Ptr will also be of virtual register type MO_VirtualReg.
-// Again, the field Value* value identifies the value.
-//
-//===--===//
-
struct MachineOperand {
private:
// Bit fields of the flags variable used for different operand properties
@@ -130,15 +103,11 @@
memset (&extra, 0, sizeof (extra));
}
- MachineOperand(int64_t ImmVal = 0,
-MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
+ MachineOperand(int64_t ImmVal, MachineOperandType OpTy, int Offset = 0)
: flags(0), opType(OpTy) {
zeroContents ();
contents.immedVal = ImmVal;
-if (OpTy == MachineOperand::MO_ConstantPoolIndex)
- extra.offset = Offset;
-else
- extra.regNum = -1;
+extra.offset = Offset;
}
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
@@ -147,10 +116,8 @@
extra.regNum = Reg;
}
- MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
- int Offset = 0)
-: flags(UseTy), opType(OpTy) {
-assert(OpTy == MachineOperand::MO_GlobalAddress);
+ MachineOperand(GlobalValue *V, int Offset = 0)
+: flags(MachineOperand::Use), opType(MachineOperand::MO_GlobalAddress) {
zeroContents ();
contents.value = (Value*)V;
extra.offset = Offset;
@@ -160,7 +127,6 @@
: flags(0), opType(MO_MachineBasicBlock) {
zeroContents ();
contents.MBB = mbb;
-extra.regNum = -1;
}
MachineOperand(const char *SymName, int Offset)
@@ -196,11 +162,7 @@
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
- /// isRegister - Return true if this operand is a register operand. The X86
- /// backend currently can't decide whether to use MO_MR or MO_VR to represent
- /// them, so we accept both.
- ///
- /// Note: The sparc backend should not use this method.
+ /// isRegister - Return true if this operand is a register operand.
///
bool isRegister() const {
return opType == MO_VirtualRegister;
@@ -218,20 +180,6 @@
bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
- /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
- /// has one. This is deprecated and only used by the SPARC v9 backend.
- ///
- Value* getVRegValueOrNull() const {
-return opType == MO_VirtualRegister ? contents.value : NULL;
- }
-
- /// MachineOperand accessors that only work on certain types of
- /// MachineOperand...
- ///
- Value* getVRegValue() const {
-assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
-return contents.value;
- }
int64_t getImmedValue() const {
assert(isImmediate() && "Wrong MachineOperand accessor");
return contents.immedVal;
@@ -293,20 +241,13 @@
return extra.regNum;
}
- /// MachineOperand mutators...
+ /// MachineOperand mutators.
///
void setReg(unsigned Reg) {
-// This method's comment used to say: 'TODO: get rid of this duplicate
-// code.' It's not clear where the duplication is.
assert(hasAllocatedReg() && "This operand cannot have a register number!");
extra.regNum = Reg;
}
[llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp MachineBasicBlock.cpp MachineInstr.cpp
Changes in directory llvm/lib/CodeGen:
LiveVariables.cpp updated: 1.54 -> 1.55
MachineBasicBlock.cpp updated: 1.25 -> 1.26
MachineInstr.cpp updated: 1.114 -> 1.115
---
Log message:
Remove a bunch more dead V9 specific stuff
---
Diffs of the changes: (+9 -34)
LiveVariables.cpp | 14 ++
MachineBasicBlock.cpp |2 +-
MachineInstr.cpp | 27 ++-
3 files changed, 9 insertions(+), 34 deletions(-)
Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.54
llvm/lib/CodeGen/LiveVariables.cpp:1.55
--- llvm/lib/CodeGen/LiveVariables.cpp:1.54 Tue Jan 3 23:40:30 2006
+++ llvm/lib/CodeGen/LiveVariables.cpp Wed May 3 20:26:39 2006
@@ -296,14 +296,12 @@
"Didn't find an entry for our predecessor??");
if (MI->getOperand(i+1).getMachineBasicBlock() == MBB) {
MachineOperand &MO = MI->getOperand(i);
-if (!MO.getVRegValueOrNull()) {
- VarInfo &VRInfo = getVarInfo(MO.getReg());
- assert(VRInfo.DefInst && "Register use before def (or no def)!");
-
- // Only mark it alive only in the block we are representing.
- MarkVirtRegAliveInBlock(VRInfo, MBB);
- break; // Found the PHI entry for this block.
-}
+VarInfo &VRInfo = getVarInfo(MO.getReg());
+assert(VRInfo.DefInst && "Register use before def (or no def)!");
+
+// Only mark it alive only in the block we are representing.
+MarkVirtRegAliveInBlock(VRInfo, MBB);
+break; // Found the PHI entry for this block.
}
}
}
Index: llvm/lib/CodeGen/MachineBasicBlock.cpp
diff -u llvm/lib/CodeGen/MachineBasicBlock.cpp:1.25
llvm/lib/CodeGen/MachineBasicBlock.cpp:1.26
--- llvm/lib/CodeGen/MachineBasicBlock.cpp:1.25 Thu Apr 21 17:33:33 2005
+++ llvm/lib/CodeGen/MachineBasicBlock.cpp Wed May 3 20:26:39 2006
@@ -47,7 +47,7 @@
MachineInstr* ilist_traits::createSentinel() {
- MachineInstr* dummy = new MachineInstr(0, 0);
+ MachineInstr* dummy = new MachineInstr(0, 0, true, true);
LeakDetector::removeGarbageObject(dummy);
return dummy;
}
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.114
llvm/lib/CodeGen/MachineInstr.cpp:1.115
--- llvm/lib/CodeGen/MachineInstr.cpp:1.114 Wed May 3 20:15:02 2006
+++ llvm/lib/CodeGen/MachineInstr.cpp Wed May 3 20:26:39 2006
@@ -36,15 +36,6 @@
extern const TargetInstrDescriptor *TargetInstrDescriptors;
}
-// Constructor for instructions with variable #operands
-MachineInstr::MachineInstr(short opcode, unsigned numOperands)
- : Opcode(opcode),
-operands(numOperands, MachineOperand()),
-parent(0) {
- // Make sure that we get added to a machine basicblock
- LeakDetector::addGarbageObject(this);
-}
-
/// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
/// not a resize for them. It is expected that if you use this that you call
/// add* methods below to fill up the operands, instead of the Set methods.
@@ -178,14 +169,7 @@
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
-if (MO.getVRegValue()) {
- OS << "%reg";
- OutputValue(OS, MO.getVRegValue());
- if (MO.hasAllocatedReg())
-OS << "==";
-}
-if (MO.hasAllocatedReg())
- OutputReg(OS, MO.getReg(), MRI);
+OutputReg(OS, MO.getReg(), MRI);
break;
case MachineOperand::MO_SignExtendedImmed:
OS << (long)MO.getImmedValue();
@@ -285,14 +269,7 @@
std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
-if (MO.hasAllocatedReg())
- OutputReg(OS, MO.getReg());
-
-if (MO.getVRegValue()) {
- if (MO.hasAllocatedReg()) OS << "==";
- OS << "%vreg";
- OutputValue(OS, MO.getVRegValue());
-}
+OutputReg(OS, MO.getReg());
break;
case MachineOperand::MO_SignExtendedImmed:
OS << (long)MO.getImmedValue();
___
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