[llvm-commits] CVS: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp X86ATTAsmPrinter.cpp
Changes in directory llvm/lib/Target/X86:
X86IntelAsmPrinter.cpp updated: 1.20 -> 1.21
X86ATTAsmPrinter.cpp updated: 1.27 -> 1.28
---
Log message:
Fixed ConstantPoolIndex operand asm print bug. This fixed 2005-07-17-INT-To-FP
and 2005-05-12-Int64ToFP.
---
Diffs of the changes: (+31 -19)
X86ATTAsmPrinter.cpp | 24 +++-
X86IntelAsmPrinter.cpp | 26 --
2 files changed, 31 insertions(+), 19 deletions(-)
Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.20
llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.21
--- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.20 Sat Feb 25 03:54:52 2006
+++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Sun Feb 26 02:28:12 2006
@@ -109,6 +109,21 @@
assert(0 && "Shouldn't use addPCDisp() when building X86 MachineInstrs");
abort ();
return;
+ case MachineOperand::MO_ConstantPoolIndex: {
+bool isMemOp = Modifier && !strcmp(Modifier, "mem");
+if (!isMemOp) O << "OFFSET ";
+O << "[" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
+ << MO.getConstantPoolIndex();
+if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
+ O << "-\"L" << getFunctionNumber() << "$pb\"";
+int Offset = MO.getOffset();
+if (Offset > 0)
+ O << " + " << Offset;
+else if (Offset < 0)
+ O << Offset;
+O << "]";
+return;
+ }
case MachineOperand::MO_GlobalAddress: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
@@ -192,19 +207,10 @@
NeedPlus = true;
}
- if (DispSpec.isGlobalAddress()) {
+ if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
if (NeedPlus)
O << " + ";
printOp(DispSpec, "mem");
- } else if (DispSpec.isConstantPoolIndex()) {
-O << "[" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
- << DispSpec.getConstantPoolIndex();
-if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
- O << "-\"L" << getFunctionNumber() << "$pb\"";
-if (DispSpec.getOffset())
- O << " + " << DispSpec.getOffset();
-O << "]";
-return;
} else {
int DispVal = DispSpec.getImmedValue();
if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.27
llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.28
--- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.27 Sat Feb 25 03:54:52 2006
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.cppSun Feb 26 02:28:12 2006
@@ -115,6 +115,20 @@
std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
abort ();
return;
+ case MachineOperand::MO_ConstantPoolIndex: {
+bool isMemOp = Modifier && !strcmp(Modifier, "mem");
+if (!isMemOp) O << '$';
+O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
+ << MO.getConstantPoolIndex();
+if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
+ O << "-\"L" << getFunctionNumber() << "$pb\"";
+int Offset = MO.getOffset();
+if (Offset > 0)
+ O << "+" << Offset;
+else if (Offset < 0)
+ O << Offset;
+return;
+ }
case MachineOperand::MO_GlobalAddress: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
@@ -198,16 +212,8 @@
return;
}
- if (DispSpec.isGlobalAddress()) {
+ if (DispSpec.isGlobalAddress() || DispSpec.isConstantPoolIndex()) {
printOperand(MI, Op+3, "mem");
- } else if (DispSpec.isConstantPoolIndex()) {
-O << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
- << DispSpec.getConstantPoolIndex();
-if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
- O << "-\"L" << getFunctionNumber() << "$pb\"";
-if (DispSpec.getOffset())
- O << "+" << DispSpec.getOffset();
-return;
} else {
int DispVal = DispSpec.getImmedValue();
if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAG.cpp updated: 1.260 -> 1.261
---
Log message:
Print ConstantPoolSDNode offset field.
---
Diffs of the changes: (+5 -0)
SelectionDAG.cpp |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.260
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.261
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.260Sat Feb 25
03:53:49 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Feb 26 02:36:57 2006
@@ -2761,7 +2761,12 @@
} else if (const FrameIndexSDNode *FIDN = dyn_cast(this)) {
std::cerr << "<" << FIDN->getIndex() << ">";
} else if (const ConstantPoolSDNode *CP =
dyn_cast(this)){
+int offset = CP->getOffset();
std::cerr << "<" << *CP->get() << ">";
+if (offset > 0)
+ std::cerr << " + " << offset;
+else
+ std::cerr << " " << offset;
} else if (const BasicBlockSDNode *BBDN = dyn_cast(this)) {
std::cerr << "<";
const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.91 -> 1.92
---
Log message:
ConstantPoolIndex is now the displacement portion of the address (rather
than base).
---
Diffs of the changes: (+4 -10)
X86CodeEmitter.cpp | 14 --
1 files changed, 4 insertions(+), 10 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.91
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.92
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.91 Wed Feb 22 14:19:42 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Sun Feb 26 03:12:34 2006
@@ -239,6 +239,9 @@
if (Op3.isGlobalAddress()) {
GV = Op3.getGlobal();
DispVal = Op3.getOffset();
+ } else if (Op3.isConstantPoolIndex()) {
+DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex());
+DispVal += Op3.getOffset();
} else {
DispVal = Op3.getImmedValue();
}
@@ -247,16 +250,7 @@
const MachineOperand &Scale= MI.getOperand(Op+1);
const MachineOperand &IndexReg = MI.getOperand(Op+2);
- unsigned BaseReg = 0;
-
- if (Base.isConstantPoolIndex()) {
-// Emit a direct address reference [disp32] where the displacement of the
-// constant pool entry is controlled by the MCE.
-assert(!GV && "Constant Pool reference cannot be relative to global!");
-DispVal += MCE.getConstantPoolEntryAddress(Base.getConstantPoolIndex());
- } else {
-BaseReg = Base.getReg();
- }
+ unsigned BaseReg = Base.getReg();
// Is a SIB byte needed?
if (IndexReg.getReg() == 0 && BaseReg != X86::ESP) {
___
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[llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp
Changes in directory llvm/lib/VMCore:
AsmWriter.cpp updated: 1.192 -> 1.193
---
Log message:
Reverting. Didn't realize some developers were embedding constants in their
target assembler code gen.
---
Diffs of the changes: (+1 -9)
AsmWriter.cpp | 10 +-
1 files changed, 1 insertion(+), 9 deletions(-)
Index: llvm/lib/VMCore/AsmWriter.cpp
diff -u llvm/lib/VMCore/AsmWriter.cpp:1.192 llvm/lib/VMCore/AsmWriter.cpp:1.193
--- llvm/lib/VMCore/AsmWriter.cpp:1.192 Sat Feb 25 06:27:03 2006
+++ llvm/lib/VMCore/AsmWriter.cpp Sun Feb 26 04:16:05 2006
@@ -419,7 +419,6 @@
bool PrintName,
std::map &TypeTable,
SlotMachine *Machine) {
- static std::string Indent = "\n";
if (const ConstantBool *CB = dyn_cast(CV)) {
Out << (CB == ConstantBool::True ? "true" : "false");
} else if (const ConstantSInt *CI = dyn_cast(CV)) {
@@ -485,12 +484,7 @@
Out << '{';
unsigned N = CS->getNumOperands();
if (N) {
- if (N > 2) {
-Indent += "";
-Out << Indent;
- } else {
-Out << ' ';
- }
+ Out << ' ';
printTypeInt(Out, CS->getOperand(0)->getType(), TypeTable);
WriteAsOperandInternal(Out, CS->getOperand(0),
@@ -498,13 +492,11 @@
for (unsigned i = 1; i < N; i++) {
Out << ", ";
-if (N > 2) Out << Indent;
printTypeInt(Out, CS->getOperand(i)->getType(), TypeTable);
WriteAsOperandInternal(Out, CS->getOperand(i),
PrintName, TypeTable, Machine);
}
- if (N > 2) Indent.resize(Indent.size() - 4);
}
Out << " }";
___
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[llvm-commits] CVS: llvm/test/Regression/Transforms/InstCombine/or.ll
Changes in directory llvm/test/Regression/Transforms/InstCombine:
or.ll updated: 1.31 -> 1.32
---
Log message:
new testcase
---
Diffs of the changes: (+8 -1)
or.ll |9 -
1 files changed, 8 insertions(+), 1 deletion(-)
Index: llvm/test/Regression/Transforms/InstCombine/or.ll
diff -u llvm/test/Regression/Transforms/InstCombine/or.ll:1.31
llvm/test/Regression/Transforms/InstCombine/or.ll:1.32
--- llvm/test/Regression/Transforms/InstCombine/or.ll:1.31 Sun Feb 12
02:01:35 2006
+++ llvm/test/Regression/Transforms/InstCombine/or.ll Sun Feb 26 13:55:30 2006
@@ -1,6 +1,7 @@
; This test makes sure that these instructions are properly eliminated.
;
+; RUN: llvm-as < %s | opt -instcombine -disable-output &&
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep -v xor | not grep 'or
'
implementation
@@ -148,4 +149,10 @@
%ELIM5 = or int %ELIM41, %ELIM7 ; [#uses=1]
ret int %ELIM5
}
-
+
+ushort %test23(ushort %A) {
+%B = shr ushort %A, ubyte 1
+%C = or ushort %B, 32768 ;; fold or into xor
+%D = xor ushort %C, 8193
+ret ushort %D
+}
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.438 -> 1.439
---
Log message:
Fold (X|C1)^C2 -> X^(C1|C2) when possible. This implements
InstCombine/or.ll:test23.
---
Diffs of the changes: (+14 -0)
InstructionCombining.cpp | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.438
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.439
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.438 Fri Feb 24
12:05:58 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Sun Feb 26 13:57:54 2006
@@ -2846,6 +2846,20 @@
ConstantInt::get(I.getType(), 1)),
Op0I->getOperand(0));
}
+} else if (Op0I->getOpcode() == Instruction::Or) {
+ // (X|C1)^C2 -> X^(C1|C2) iff X&~C1 == 0
+ if (MaskedValueIsZero(Op0I->getOperand(0), Op0CI->getZExtValue())) {
+Constant *NewRHS = ConstantExpr::getOr(Op0CI, RHS);
+// Anything in both C1 and C2 is known to be zero, remove it from
+// NewRHS.
+Constant *CommonBits = ConstantExpr::getAnd(Op0CI, RHS);
+NewRHS = ConstantExpr::getAnd(NewRHS,
+ ConstantExpr::getNot(CommonBits));
+WorkList.push_back(Op0I);
+I.setOperand(0, Op0I->getOperand(0));
+I.setOperand(1, NewRHS);
+return &I;
+ }
}
}
___
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[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.37 -> 1.38
---
Log message:
Add a bunch of missed cases. Perhaps the most significant of which is that
assertzext produces zero bits.
---
Diffs of the changes: (+206 -40)
TargetLowering.cpp | 246 -
1 files changed, 206 insertions(+), 40 deletions(-)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.37
llvm/lib/Target/TargetLowering.cpp:1.38
--- llvm/lib/Target/TargetLowering.cpp:1.37 Thu Feb 23 19:10:46 2006
+++ llvm/lib/Target/TargetLowering.cpp Sun Feb 26 17:36:02 2006
@@ -141,7 +141,7 @@
/// constant and return true.
bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDOperand Op,
uint64_t Demanded)
{
- // FIXME: ISD::SELECT
+ // FIXME: ISD::SELECT, ISD::SELECT_CC
switch(Op.getOpcode()) {
default: break;
case ISD::AND:
@@ -199,15 +199,13 @@
// We know all of the bits for a constant!
KnownOne = cast(Op)->getValue() & DemandedMask;
KnownZero = ~KnownOne & DemandedMask;
-return false;
+return false; // Don't fall through, will infinitely loop.
case ISD::AND:
// If either the LHS or the RHS are Zero, the result is zero.
if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero,
KnownOne, TLO, Depth+1))
return true;
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
-// If something is known zero on the RHS, the bits aren't demanded on the
-// LHS.
if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask & ~KnownZero,
KnownZero2, KnownOne2, TLO, Depth+1))
return true;
@@ -338,6 +336,24 @@
KnownOne &= KnownOne2;
KnownZero &= KnownZero2;
break;
+ case ISD::SELECT_CC:
+if (SimplifyDemandedBits(Op.getOperand(3), DemandedMask, KnownZero,
+ KnownOne, TLO, Depth+1))
+ return true;
+if (SimplifyDemandedBits(Op.getOperand(2), DemandedMask, KnownZero2,
+ KnownOne2, TLO, Depth+1))
+ return true;
+assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+// If the operands are constants, see if we can simplify them.
+if (TLO.ShrinkDemandedConstant(Op, DemandedMask))
+ return true;
+
+// Only known if known in both the LHS and RHS.
+KnownOne &= KnownOne2;
+KnownZero &= KnownZero2;
+break;
case ISD::SHL:
if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) {
if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask >>
SA->getValue(),
@@ -408,19 +424,20 @@
MVT::ValueType VT = Op.getValueType();
MVT::ValueType EVT = cast(Op.getOperand(1))->getVT();
-// Sign or Zero extension. Compute the bits in the result that are not
+// Sign extension. Compute the demanded bits in the result that are not
// present in the input.
-uint64_t NotIn = ~MVT::getIntVTBitMask(EVT);
-uint64_t NewBits = MVT::getIntVTBitMask(VT) & NotIn;
+uint64_t NewBits = ~MVT::getIntVTBitMask(EVT) & DemandedMask;
-// Sign extension.
+// If none of the extended bits are demanded, eliminate the sextinreg.
+if (NewBits == 0)
+ return TLO.CombineTo(Op, Op.getOperand(0));
+
uint64_t InSignBit = MVT::getIntVTSignBit(EVT);
int64_t InputDemandedBits = DemandedMask & MVT::getIntVTBitMask(EVT);
-// If any of the sign extended bits are demanded, we know that the sign
+// Since the sign extended bits are demanded, we know that the sign
// bit is demanded.
-if (NewBits & DemandedMask)
- InputDemandedBits |= InSignBit;
+InputDemandedBits |= InSignBit;
if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
KnownZero, KnownOne, TLO, Depth+1))
@@ -430,19 +447,105 @@
// If the sign bit of the input is known set or clear, then we know the
// top bits of the result.
-// If the input sign bit is known zero, or if the NewBits are not demanded
-// convert this into a zero extension.
-if ((KnownZero & InSignBit) || (NewBits & ~DemandedMask) == NewBits) {
- return TLO.CombineTo(Op, Op.getOperand(0));
-} else if (KnownOne & InSignBit) {// Input sign bit known set
+// If the input sign bit is known zero, convert this into a zero extension.
+if (KnownZero & InSignBit)
+ return TLO.CombineTo(Op,
+ TLO.DAG.getZeroExtendInReg(Op.getOperand(0), EVT));
+
+if (KnownOne & InSignBit) {// Input sign bit known set
KnownOne |= NewBits;
KnownZero &= ~NewBits;
-} else { // Input sign bit unknown
+} else { // Input sign bit unknown
[llvm-commits] CVS: llvm/test/Regression/CodeGen/PowerPC/and-elim.ll
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
and-elim.ll updated: 1.1 -> 1.2
---
Log message:
new testcase
---
Diffs of the changes: (+7 -0)
and-elim.ll |7 +++
1 files changed, 7 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC/and-elim.ll
diff -u llvm/test/Regression/CodeGen/PowerPC/and-elim.ll:1.1
llvm/test/Regression/CodeGen/PowerPC/and-elim.ll:1.2
--- llvm/test/Regression/CodeGen/PowerPC/and-elim.ll:1.1Mon Oct 10
16:21:36 2005
+++ llvm/test/Regression/CodeGen/PowerPC/and-elim.llSun Feb 26 18:20:23 2006
@@ -9,3 +9,10 @@
store ubyte %Z, ubyte* %P
ret void
}
+
+ushort %test2(ushort %crc) { ; No and's should be needed for the ushorts here.
+%tmp.1 = shr ushort %crc, ubyte 1
+%tmp.7 = xor ushort %tmp.1, 40961
+ret ushort %tmp.7
+}
+
___
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[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.38 -> 1.39
---
Log message:
Just like we use the RHS of an AND to simplify the LHS, use the LHS to
simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:
_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr
instead of this:
_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr
---
Diffs of the changes: (+17 -0)
TargetLowering.cpp | 17 +
1 files changed, 17 insertions(+)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.38
llvm/lib/Target/TargetLowering.cpp:1.39
--- llvm/lib/Target/TargetLowering.cpp:1.38 Sun Feb 26 17:36:02 2006
+++ llvm/lib/Target/TargetLowering.cpp Sun Feb 26 18:22:28 2006
@@ -223,6 +223,23 @@
// If the RHS is a constant, see if we can simplify it.
if (TLO.ShrinkDemandedConstant(Op, DemandedMask & ~KnownZero2))
return true;
+
+// If the RHS is a constant, check to see if the LHS would be zero without
+// using the bits from the RHS. Above, we used knowledge about the RHS to
+// simplify the LHS, here we're using information from the LHS to simplify
+// the RHS.
+if (ConstantSDNode *RHSC = dyn_cast(Op.getOperand(1))) {
+ uint64_t LHSZero, LHSOne;
+ ComputeMaskedBits(Op.getOperand(0), DemandedMask,
+LHSZero, LHSOne, Depth+1);
+ // If the LHS already has zeros where RHSC does, this and is dead.
+ if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask))
+return TLO.CombineTo(Op, Op.getOperand(0));
+ // If any of the set bits in the RHS are known zero on the LHS, shrink
+ // the constant.
+ if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask))
+return true;
+}
// Output known-1 bits are only known if set in both the LHS & RHS.
KnownOne &= KnownOne2;
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[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.39 -> 1.40
---
Log message:
Check RHS simplification before LHS simplification to avoid infinitely looping
on PowerPC/small-arguments.ll
---
Diffs of the changes: (+17 -18)
TargetLowering.cpp | 35 +--
1 files changed, 17 insertions(+), 18 deletions(-)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.39
llvm/lib/Target/TargetLowering.cpp:1.40
--- llvm/lib/Target/TargetLowering.cpp:1.39 Sun Feb 26 18:22:28 2006
+++ llvm/lib/Target/TargetLowering.cpp Sun Feb 26 18:36:27 2006
@@ -201,7 +201,23 @@
KnownZero = ~KnownOne & DemandedMask;
return false; // Don't fall through, will infinitely loop.
case ISD::AND:
-// If either the LHS or the RHS are Zero, the result is zero.
+// If the RHS is a constant, check to see if the LHS would be zero without
+// using the bits from the RHS. Below, we use knowledge about the RHS to
+// simplify the LHS, here we're using information from the LHS to simplify
+// the RHS.
+if (ConstantSDNode *RHSC = dyn_cast(Op.getOperand(1))) {
+ uint64_t LHSZero, LHSOne;
+ ComputeMaskedBits(Op.getOperand(0), DemandedMask,
+LHSZero, LHSOne, Depth+1);
+ // If the LHS already has zeros where RHSC does, this and is dead.
+ if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask))
+return TLO.CombineTo(Op, Op.getOperand(0));
+ // If any of the set bits in the RHS are known zero on the LHS, shrink
+ // the constant.
+ if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask))
+return true;
+}
+
if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero,
KnownOne, TLO, Depth+1))
return true;
@@ -224,23 +240,6 @@
if (TLO.ShrinkDemandedConstant(Op, DemandedMask & ~KnownZero2))
return true;
-// If the RHS is a constant, check to see if the LHS would be zero without
-// using the bits from the RHS. Above, we used knowledge about the RHS to
-// simplify the LHS, here we're using information from the LHS to simplify
-// the RHS.
-if (ConstantSDNode *RHSC = dyn_cast(Op.getOperand(1))) {
- uint64_t LHSZero, LHSOne;
- ComputeMaskedBits(Op.getOperand(0), DemandedMask,
-LHSZero, LHSOne, Depth+1);
- // If the LHS already has zeros where RHSC does, this and is dead.
- if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask))
-return TLO.CombineTo(Op, Op.getOperand(0));
- // If any of the set bits in the RHS are known zero on the LHS, shrink
- // the constant.
- if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask))
-return true;
-}
-
// Output known-1 bits are only known if set in both the LHS & RHS.
KnownOne &= KnownOne2;
// Output known-0 are known to be clear if zero in either the LHS | RHS.
___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.109 -> 1.110 --- Log message: remove some completed notes --- Diffs of the changes: (+0 -4) DAGCombiner.cpp |4 1 files changed, 4 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.109 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.110 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.109 Mon Feb 20 00:51:04 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Feb 26 18:39:31 2006 @@ -16,10 +16,6 @@ // some kind of hint from the target that int div is expensive. // various folds of mulh[s,u] by constants such as -1, powers of 2, etc. // -// FIXME: Should add a corresponding version of fold AND with -// ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which -// we don't have yet. -// // FIXME: select C, pow2, pow2 -> something smart // FIXME: trunc(select X, Y, Z) -> select X, trunc(Y), trunc(Z) // FIXME: Dead stores -> nuke ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/PowerPC/div-2.ll
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
div-2.ll updated: 1.3 -> 1.4
---
Log message:
Reenable this
---
Diffs of the changes: (+0 -2)
div-2.ll |2 --
1 files changed, 2 deletions(-)
Index: llvm/test/Regression/CodeGen/PowerPC/div-2.ll
diff -u llvm/test/Regression/CodeGen/PowerPC/div-2.ll:1.3
llvm/test/Regression/CodeGen/PowerPC/div-2.ll:1.4
--- llvm/test/Regression/CodeGen/PowerPC/div-2.ll:1.3 Sat Feb 25 02:18:43 2006
+++ llvm/test/Regression/CodeGen/PowerPC/div-2.ll Sun Feb 26 19:00:12 2006
@@ -1,8 +1,6 @@
; RUN: llvm-as < %s | llc -march=ppc32 | not grep srawi &&
; RUN: llvm-as < %s | llc -march=ppc32 | grep blr
-; XFAIL: *
-
int %test1(int %X) {
%Y = and int %X, 15
%Z = div int %Y, 4
___
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[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.40 -> 1.41
---
Log message:
Implement bit propagation through sub nodes, this (re)implements
PowerPC/div-2.ll
---
Diffs of the changes: (+29 -3)
TargetLowering.cpp | 32 +---
1 files changed, 29 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.40
llvm/lib/Target/TargetLowering.cpp:1.41
--- llvm/lib/Target/TargetLowering.cpp:1.40 Sun Feb 26 18:36:27 2006
+++ llvm/lib/Target/TargetLowering.cpp Sun Feb 26 19:00:42 2006
@@ -598,6 +598,12 @@
}
}
break;
+ case ISD::SUB:
+// Just use ComputeMaskedBits to compute output bits, there are no
+// simplifications that can be done here, and sub always demands all input
+// bits.
+ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth);
+break;
}
// If we know the value of all of the demanded bits, return this as a
@@ -861,12 +867,32 @@
KnownOne = 0;
return;
}
- case ISD::SUB:
+ case ISD::SUB: {
+ConstantSDNode *CLHS = dyn_cast(Op.getOperand(0));
+if (!CLHS) return;
+
// We know that the top bits of C-X are clear if X contains less bits
// than C (i.e. no wrap-around can happen). For example, 20-X is
-// positive if we can prove that X is >= 0 and < 16. Remember to update
-// SimplifyDemandedBits if/when this is implemented.
+// positive if we can prove that X is >= 0 and < 16.
+MVT::ValueType VT = CLHS->getValueType(0);
+if ((CLHS->getValue() & MVT::getIntVTSignBit(VT)) == 0) { // sign bit
clear
+ unsigned NLZ = CountLeadingZeros_64(CLHS->getValue()+1);
+ uint64_t MaskV = (1ULL << (63-NLZ))-1; // NLZ can't be 64 with no sign
bit
+ MaskV = ~MaskV & MVT::getIntVTBitMask(VT);
+ ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
+
+ // If all of the MaskV bits are known to be zero, then we know the output
+ // top bits are zero, because we now know that the output is from [0-C].
+ if ((KnownZero & MaskV) == MaskV) {
+unsigned NLZ2 = CountLeadingZeros_64(CLHS->getValue());
+KnownZero = ~((1ULL << (64-NLZ2))-1) & Mask; // Top bits known zero.
+KnownOne = 0; // No one bits known.
+ } else {
+KnownOne = KnownOne = 0; // Otherwise, nothing known.
+ }
+}
return;
+ }
default:
// Allow the target to implement this method for its nodes.
if (Op.getOpcode() >= ISD::BUILTIN_OP_END)
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[llvm-commits] CVS: llvm/test/Regression/Transforms/InstCombine/xor.ll sub.ll
Changes in directory llvm/test/Regression/Transforms/InstCombine:
xor.ll updated: 1.15 -> 1.16
sub.ll updated: 1.21 -> 1.22
---
Log message:
New testcases
---
Diffs of the changes: (+24 -0)
sub.ll | 13 +
xor.ll | 11 +++
2 files changed, 24 insertions(+)
Index: llvm/test/Regression/Transforms/InstCombine/xor.ll
diff -u llvm/test/Regression/Transforms/InstCombine/xor.ll:1.15
llvm/test/Regression/Transforms/InstCombine/xor.ll:1.16
--- llvm/test/Regression/Transforms/InstCombine/xor.ll:1.15 Sat Feb 11
19:32:58 2006
+++ llvm/test/Regression/Transforms/InstCombine/xor.ll Sun Feb 26 19:43:02 2006
@@ -155,3 +155,14 @@
ret int %Q
}
+bool %test23(int %a, int %b) {
+%tmp.2 = xor int %b, %a
+%tmp.4 = seteq int %tmp.2, %a
+ret bool %tmp.4
+}
+
+bool %test24(int %c, int %d) {
+%tmp.2 = xor int %d, %c
+%tmp.4 = setne int %tmp.2, %c
+ret bool %tmp.4
+}
Index: llvm/test/Regression/Transforms/InstCombine/sub.ll
diff -u llvm/test/Regression/Transforms/InstCombine/sub.ll:1.21
llvm/test/Regression/Transforms/InstCombine/sub.ll:1.22
--- llvm/test/Regression/Transforms/InstCombine/sub.ll:1.21 Thu Apr 7
11:41:45 2005
+++ llvm/test/Regression/Transforms/InstCombine/sub.ll Sun Feb 26 19:43:02 2006
@@ -124,3 +124,16 @@
%Q = add int %Z, %Y
ret int %Q
}
+
+bool %test20(int %g, int %h) {
+%tmp.2 = sub int %g, %h
+%tmp.4 = setne int %tmp.2, %g
+ret bool %tmp.4
+}
+
+bool %test21(int %g, int %h) {
+%tmp.2 = sub int %g, %h
+%tmp.4 = setne int %tmp.2, %g
+ret bool %tmp.4
+}
+
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.439 -> 1.440
---
Log message:
Fold (A^B) == A -> B == 0
and (A-B) == A -> B == 0
---
Diffs of the changes: (+26 -0)
InstructionCombining.cpp | 26 ++
1 files changed, 26 insertions(+)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.439
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.440
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.439 Sun Feb 26
13:57:54 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Sun Feb 26 19:44:11 2006
@@ -3876,6 +3876,32 @@
if (Instruction *R = visitSetCondInstWithCastAndCast(I))
return R;
}
+
+ if (I.getOpcode() == Instruction::SetNE ||
+ I.getOpcode() == Instruction::SetEQ) {
+Value *A, *B;
+if (match(Op0, m_Xor(m_Value(A), m_Value(B))) &&
+(A == Op1 || B == Op1)) {
+ // (A^B) == A -> B == 0
+ Value *OtherVal = A == Op1 ? B : A;
+ return BinaryOperator::create(I.getOpcode(), OtherVal,
+Constant::getNullValue(A->getType()));
+} else if (match(Op1, m_Xor(m_Value(A), m_Value(B))) &&
+ (A == Op0 || B == Op0)) {
+ // A == (A^B) -> B == 0
+ Value *OtherVal = A == Op0 ? B : A;
+ return BinaryOperator::create(I.getOpcode(), OtherVal,
+Constant::getNullValue(A->getType()));
+} else if (match(Op0, m_Sub(m_Value(A), m_Value(B))) && A == Op1) {
+ // (A-B) == A -> B == 0
+ return BinaryOperator::create(I.getOpcode(), B,
+Constant::getNullValue(B->getType()));
+} else if (match(Op1, m_Sub(m_Value(A), m_Value(B))) && A == Op0) {
+ // A == (A-B) -> B == 0
+ return BinaryOperator::create(I.getOpcode(), B,
+Constant::getNullValue(B->getType()));
+}
+ }
return Changed ? &I : 0;
}
___
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[llvm-commits] CVS: llvm/test/Regression/Transforms/InstCombine/set.ll
Changes in directory llvm/test/Regression/Transforms/InstCombine:
set.ll updated: 1.18 -> 1.19
---
Log message:
new testcases
---
Diffs of the changes: (+16 -0)
set.ll | 16
1 files changed, 16 insertions(+)
Index: llvm/test/Regression/Transforms/InstCombine/set.ll
diff -u llvm/test/Regression/Transforms/InstCombine/set.ll:1.18
llvm/test/Regression/Transforms/InstCombine/set.ll:1.19
--- llvm/test/Regression/Transforms/InstCombine/set.ll:1.18 Sat Feb 11
20:06:31 2006
+++ llvm/test/Regression/Transforms/InstCombine/set.ll Sun Feb 26 20:36:19 2006
@@ -129,3 +129,19 @@
%R = or bool %C, %Z
ret bool %R
}
+
+int %test23(int %a) {
+%tmp.1 = and int %a, 1
+%tmp.2 = seteq int %tmp.1, 0
+%tmp.3 = cast bool %tmp.2 to int ;; xor tmp1, 1
+ret int %tmp.3
+}
+
+int %test24(uint %a) {
+%tmp1 = and uint %a, 4
+ %tmp.1 = shr uint %tmp1, ubyte 2
+%tmp.2 = seteq uint %tmp.1, 0
+%tmp.3 = cast bool %tmp.2 to int ;; xor tmp1, 1
+ret int %tmp.3
+}
+
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.440 -> 1.441
---
Log message:
Merge two almost-identical pieces of code.
Make this code more powerful by using ComputeMaskedBits instead of looking
for an AND operand. This lets us fold this:
int %test23(int %a) {
%tmp.1 = and int %a, 1
%tmp.2 = seteq int %tmp.1, 0
%tmp.3 = cast bool %tmp.2 to int ;; xor tmp1, 1
ret int %tmp.3
}
into: xor (and a, 1), 1
---
Diffs of the changes: (+42 -46)
InstructionCombining.cpp | 88 ++-
1 files changed, 42 insertions(+), 46 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.440
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.441
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.440 Sun Feb 26
19:44:11 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Sun Feb 26 20:38:23 2006
@@ -4777,63 +4777,59 @@
}
break;
+ case Instruction::SetEQ:
case Instruction::SetNE:
+// We if we are just checking for a seteq of a single bit and casting
it
+// to an integer. If so, shift the bit to the appropriate place then
+// cast to integer to avoid the comparison.
if (ConstantInt *Op1C = dyn_cast(Op1)) {
- if (Op1C->getRawValue() == 0) {
-// If the input only has the low bit set, simplify directly.
-Constant *Not1 =
- ConstantExpr::getNot(ConstantInt::get(Op0->getType(), 1));
-// cast (X != 0) to int --> X if X&~1 == 0
-if (MaskedValueIsZero(Op0,
- cast(Not1)->getZExtValue())) {
- if (CI.getType() == Op0->getType())
-return ReplaceInstUsesWith(CI, Op0);
- else
-return new CastInst(Op0, CI.getType());
-}
-
-// If the input is an and with a single bit, shift then simplify.
-ConstantInt *AndRHS;
-if (match(Op0, m_And(m_Value(), m_ConstantInt(AndRHS
- if (AndRHS->getRawValue() &&
- (AndRHS->getRawValue() & (AndRHS->getRawValue()-1)) == 0) {
-unsigned ShiftAmt = Log2_64(AndRHS->getRawValue());
+ uint64_t Op1CV = Op1C->getZExtValue();
+ // cast (X == 0) to int --> X^1iff X has only the low bit
set.
+ // cast (X == 0) to int --> (X>>1)^1 iff X has only the 2nd bit
set.
+ // cast (X == 1) to int --> X iff X has only the low bit
set.
+ // cast (X == 2) to int --> X>>1 iff X has only the 2nd bit
set.
+ // cast (X != 0) to int --> X iff X has only the low bit
set.
+ // cast (X != 0) to int --> X>>1 iff X has only the 2nd bit
set.
+ // cast (X != 1) to int --> X^1iff X has only the low bit
set.
+ // cast (X != 2) to int --> (X>>1)^1 iff X has only the 2nd bit
set.
+ if (Op1CV == 0 || isPowerOf2_64(Op1CV)) {
+// If Op1C some other power of two, convert:
+uint64_t KnownZero, KnownOne;
+uint64_t TypeMask = Op1->getType()->getIntegralTypeMask();
+ComputeMaskedBits(Op0, TypeMask, KnownZero, KnownOne);
+
+if (isPowerOf2_64(KnownZero^TypeMask)) { // Exactly one possible 1?
+ bool isSetNE = SrcI->getOpcode() == Instruction::SetNE;
+ if (Op1CV && (Op1CV != (KnownZero^TypeMask))) {
+// (X&4) == 2 --> false
+// (X&4) != 2 --> true
+return ReplaceInstUsesWith(CI, ConstantBool::get(isSetNE));
+ }
+
+ unsigned ShiftAmt = Log2_64(KnownZero^TypeMask);
+ Value *In = Op0;
+ if (ShiftAmt) {
// Perform an unsigned shr by shiftamt. Convert input to
// unsigned if it is signed.
-Value *In = Op0;
if (In->getType()->isSigned())
In = InsertNewInstBefore(new CastInst(In,
In->getType()->getUnsignedVersion(),
In->getName()),CI);
// Insert the shift to put the result in the low bit.
In = InsertNewInstBefore(new ShiftInst(Instruction::Shr, In,
- ConstantInt::get(Type::UByteTy,
ShiftAmt),
- In->getName()+".lobit"),
CI);
-if (CI.getType() == In->getType())
- return ReplaceInstUsesWith(CI, In);
-else
- return new CastInst(In, CI.getType());
+ ConstantInt::get(Type::UByteTy, ShiftAmt),
+ In->getName()+".lobit"), CI);
}
- }
-}
-break;
- case Instruction::SetEQ:
-
[llvm-commits] CVS: llvm/autoconf/configure.ac
Changes in directory llvm/autoconf: configure.ac updated: 1.210 -> 1.211 --- Log message: Use -emit-llvm -S to get .ll file output from llvm-gcc --- Diffs of the changes: (+1 -1) configure.ac |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/autoconf/configure.ac diff -u llvm/autoconf/configure.ac:1.210 llvm/autoconf/configure.ac:1.211 --- llvm/autoconf/configure.ac:1.210Thu Feb 16 15:11:49 2006 +++ llvm/autoconf/configure.ac Sun Feb 26 23:39:00 2006 @@ -568,7 +568,7 @@ [llvm_cv_llvmgcc_sanity="no" if test -x "$LLVMGCC" ; then cp /dev/null conftest.c - "$LLVMGCC" -S -o - conftest.c | grep implementation > /dev/null 2>&1 + "$LLVMGCC" -emit-llvm -S -o - conftest.c | grep implementation > /dev/null 2>&1 if test $? -eq 0 ; then llvm_cv_llvmgcc_sanity="yes" fi ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/configure
Changes in directory llvm: configure updated: 1.212 -> 1.213 --- Log message: Use -emit-llvm -S to get .ll file output from llvm-gcc --- Diffs of the changes: (+1 -1) configure |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/configure diff -u llvm/configure:1.212 llvm/configure:1.213 --- llvm/configure:1.212Thu Feb 16 15:12:54 2006 +++ llvm/configure Sun Feb 26 23:39:00 2006 @@ -30613,7 +30613,7 @@ llvm_cv_llvmgcc_sanity="no" if test -x "$LLVMGCC" ; then cp /dev/null conftest.c - "$LLVMGCC" -S -o - conftest.c | grep implementation > /dev/null 2>&1 + "$LLVMGCC" -emit-llvm -S -o - conftest.c | grep implementation > /dev/null 2>&1 if test $? -eq 0 ; then llvm_cv_llvmgcc_sanity="yes" fi ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/Makefile.programs
Changes in directory llvm-test: Makefile.programs updated: 1.193 -> 1.194 --- Log message: Pass -mdynamic-no-pic to build cbe executable. --- Diffs of the changes: (+1 -1) Makefile.programs |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.193 llvm-test/Makefile.programs:1.194 --- llvm-test/Makefile.programs:1.193 Fri Feb 17 18:02:32 2006 +++ llvm-test/Makefile.programs Mon Feb 27 00:52:04 2006 @@ -282,7 +282,7 @@ $(PROGRAMS_TO_TEST:%=Output/%.cbe): \ Output/%.cbe: Output/%.cbe.c - -$(CC) $< $(LDFLAGS) $(CFLAGS) -fno-strict-aliasing -O2 -o $@ + -$(CC) $< $(LDFLAGS) $(CFLAGS) -fno-strict-aliasing -O2 $(TARGET_CFLAGS) -o $@ # # Compile a linked program to machine code with LLC. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
