[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.97 -> 1.98
---
Log message:
fold c1 << (x + c2) into (c1 << c2) << x. fix a warning.
---
Diffs of the changes: (+7 -1)
DAGCombiner.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.97
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.98
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.97 Sun Feb 5 01:36:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Feb 5 02:07:24 2006
@@ -838,7 +838,7 @@
if (N1.getOpcode() == ISD::SHL) {
if (ConstantSDNode *SHC = dyn_cast(N1.getOperand(0))) {
if (isPowerOf2_64(SHC->getValue())) {
-SDOperand Add = DAG.getNode(ISD::ADD, VT, N1, DAG.getConstant(-1, VT));
+SDOperand Add = DAG.getNode(ISD::ADD, VT,
N1,DAG.getConstant(~0ULL,VT));
WorkList.push_back(Add.Val);
return DAG.getNode(ISD::AND, VT, N0, Add);
}
@@ -1288,6 +1288,12 @@
// fold (shl 0, x) -> 0
if (N0C && N0C->isNullValue())
return N0;
+ // fold (shl c1, (add x, c2)) -> (shl c1 << c2, x)
+ if (N0C && N1.getOpcode() == ISD::ADD &&
+ N1.getOperand(1).getOpcode() == ISD::Constant) {
+SDOperand LHS = DAG.getNode(ISD::SHL, VT, N0, N1.getOperand(1));
+return DAG.getNode(ISD::SHL, VT, LHS, N1.getOperand(0));
+ }
// fold (shl x, c >= size(x)) -> undef
if (N1C && N1C->getValue() >= OpSizeInBits)
return DAG.getNode(ISD::UNDEF, VT);
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.98 -> 1.99
---
Log message:
Back out previous commit, it isn't safe.
---
Diffs of the changes: (+0 -6)
DAGCombiner.cpp |6 --
1 files changed, 6 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.98
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.99
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.98 Sun Feb 5 02:07:24 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Feb 5 02:23:00 2006
@@ -1288,12 +1288,6 @@
// fold (shl 0, x) -> 0
if (N0C && N0C->isNullValue())
return N0;
- // fold (shl c1, (add x, c2)) -> (shl c1 << c2, x)
- if (N0C && N1.getOpcode() == ISD::ADD &&
- N1.getOperand(1).getOpcode() == ISD::Constant) {
-SDOperand LHS = DAG.getNode(ISD::SHL, VT, N0, N1.getOperand(1));
-return DAG.getNode(ISD::SHL, VT, LHS, N1.getOperand(0));
- }
// fold (shl x, c >= size(x)) -> undef
if (N1C && N1C->getValue() >= OpSizeInBits)
return DAG.getNode(ISD::UNDEF, VT);
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[llvm-commits] CVS: llvm/lib/Target/README.txt
Changes in directory llvm/lib/Target:
README.txt updated: 1.4 -> 1.5
---
Log message:
This xform isn't safe
---
Diffs of the changes: (+0 -4)
README.txt |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/README.txt
diff -u llvm/lib/Target/README.txt:1.4 llvm/lib/Target/README.txt:1.5
--- llvm/lib/Target/README.txt:1.4 Sun Feb 5 01:54:37 2006
+++ llvm/lib/Target/README.txt Sun Feb 5 02:26:16 2006
@@ -64,7 +64,3 @@
//===-===//
-For dag combiner and instcombine:
-int t(int X, int Y) { return 1 << (X+4); } --> 16 << X
-
-//===-===//
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[llvm-commits] CVS: llvm/tools/llc/Makefile
Changes in directory llvm/tools/llc: Makefile updated: 1.77 -> 1.78 --- Log message: SparcV8 -> Sparc --- Diffs of the changes: (+2 -2) Makefile |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/tools/llc/Makefile diff -u llvm/tools/llc/Makefile:1.77 llvm/tools/llc/Makefile:1.78 --- llvm/tools/llc/Makefile:1.77Thu Oct 27 10:54:34 2005 +++ llvm/tools/llc/Makefile Sun Feb 5 02:30:45 2006 @@ -38,8 +38,8 @@ LLVMSparcV9LiveVar endif -ifneq ($(strip $(filter SparcV8,$(TARGETS_TO_BUILD))),) -USEDLIBS += LLVMSparcV8 +ifneq ($(strip $(filter Sparc,$(TARGETS_TO_BUILD))),) +USEDLIBS += LLVMSparc endif ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.154 -> 1.155
---
Log message:
Complex pattern isel code shouldn't select nodes.
---
Diffs of the changes: (+9 -9)
PPCISelDAGToDAG.cpp | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.154
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.155
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.154 Sun Feb 5 00:46:41 2006
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Sun Feb 5 02:45:01 2006
@@ -392,7 +392,7 @@
if (FrameIndexSDNode *FI = dyn_cast(N.getOperand(0))) {
Base = CurDAG->getTargetFrameIndex(FI->getIndex(), MVT::i32);
} else {
-Base = Select(N.getOperand(0));
+Base = N.getOperand(0);
}
return true; // [r+i]
} else if (N.getOperand(1).getOpcode() == PPCISD::Lo) {
@@ -402,7 +402,7 @@
Disp = N.getOperand(1).getOperand(0); // The global address.
assert(Disp.getOpcode() == ISD::TargetGlobalAddress ||
Disp.getOpcode() == ISD::TargetConstantPool);
- Base = Select(N.getOperand(0));
+ Base = N.getOperand(0);
return true; // [&g+r]
}
return false; // [r+r]
@@ -411,7 +411,7 @@
if (FrameIndexSDNode *FI = dyn_cast(N))
Base = CurDAG->getTargetFrameIndex(FI->getIndex(), MVT::i32);
else
-Base = Select(N);
+Base = N;
return true; // [r+0]
}
@@ -427,13 +427,13 @@
return false;
if (N.getOpcode() == ISD::ADD) {
-Base = Select(N.getOperand(0));
-Index = Select(N.getOperand(1));
+Base = N.getOperand(0);
+Index = N.getOperand(1);
return true;
}
Base = CurDAG->getRegister(PPC::R0, MVT::i32);
- Index = Select(N);
+ Index = N;
return true;
}
@@ -442,13 +442,13 @@
bool PPCDAGToDAGISel::SelectAddrIdxOnly(SDOperand N, SDOperand &Base,
SDOperand &Index) {
if (N.getOpcode() == ISD::ADD) {
-Base = Select(N.getOperand(0));
-Index = Select(N.getOperand(1));
+Base = N.getOperand(0);
+Index = N.getOperand(1);
return true;
}
Base = CurDAG->getRegister(PPC::R0, MVT::i32);
- Index = Select(N);
+ Index = N;
return true;
}
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[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen: DAGISelEmitter.cpp updated: 1.165 -> 1.166 --- Log message: Handle HANDLENODE: just return itself. --- Diffs of the changes: (+1 -0) DAGISelEmitter.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/utils/TableGen/DAGISelEmitter.cpp diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.165 llvm/utils/TableGen/DAGISelEmitter.cpp:1.166 --- llvm/utils/TableGen/DAGISelEmitter.cpp:1.165Sun Feb 5 00:43:12 2006 +++ llvm/utils/TableGen/DAGISelEmitter.cpp Sun Feb 5 02:46:14 2006 @@ -2958,6 +2958,7 @@ << " case ISD::EntryToken: // These leaves remain the same.\n" << " case ISD::BasicBlock:\n" << " case ISD::Register:\n" + << " case ISD::HANDLENODE:\n" << " case ISD::TargetConstant:\n" << " case ISD::TargetConstantPool:\n" << " case ISD::TargetFrameIndex:\n" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.166 -> 1.167
---
Log message:
Name change.
---
Diffs of the changes: (+4 -4)
DAGISelEmitter.cpp |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.166
llvm/utils/TableGen/DAGISelEmitter.cpp:1.167
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.166Sun Feb 5 02:46:14 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Mon Feb 6 00:03:35 2006
@@ -2398,7 +2398,7 @@
emitCode("CodeGenMap[N.getValue(" + utostr(ValNo) + ")] = " +
ChainName + ";");
if (DoReplace)
-emitCode("if (N.ResNo == 0) AddReplacement(N.getValue("
+emitCode("if (N.ResNo == 0) AddHandleReplacement(N.getValue("
+ utostr(ValNo) + "), " + ChainName + ");");
ValNo++;
}
@@ -2415,7 +2415,7 @@
std::string Code =
FoldedChains[j].first + ".getValue(" +
utostr(FoldedChains[j].second) + ")";
-emitCode("AddReplacement(" + Code + ", " + ChainName + ");");
+emitCode("AddHandleReplacement(" + Code + ", " + ChainName + ");");
}
}
@@ -3099,9 +3099,9 @@
OS << "}\n";
OS << "\n";
- OS << "// AddReplacement - Note the pending replacement node for a\n"
+ OS << "// AddHandleReplacement - Note the pending replacement node for a\n"
<< "// holder node in ReplaceMap.\n";
- OS << "void AddReplacement(SDOperand N, SDOperand R) {\n";
+ OS << "void AddHandleReplacement(SDOperand N, SDOperand R) {\n";
OS << " std::map::iterator HMI =
HolderMap.find(N);\n";
OS << " if (HMI != HolderMap.end()) {\n";
OS << "ReplaceMap[HMI->second] = R;\n";
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.42 -> 1.43
---
Log message:
- Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
load address.
---
Diffs of the changes: (+26 -11)
X86ISelDAGToDAG.cpp | 37 ++---
1 files changed, 26 insertions(+), 11 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.42
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.43
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.42Sun Feb 5 00:46:41 2006
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Feb 6 00:02:33 2006
@@ -111,7 +111,8 @@
SDOperand &Index, SDOperand &Disp);
bool SelectLEAAddr(SDOperand N, SDOperand &Base, SDOperand &Scale,
SDOperand &Index, SDOperand &Disp);
-bool TryFoldLoad(SDOperand N, SDOperand &Base, SDOperand &Scale,
+bool TryFoldLoad(SDOperand P, SDOperand N,
+ SDOperand &Base, SDOperand &Scale,
SDOperand &Index, SDOperand &Disp);
inline void getAddressOperands(X86ISelAddressMode &AM, SDOperand &Base,
@@ -381,11 +382,13 @@
return true;
}
-bool X86DAGToDAGISel::TryFoldLoad(SDOperand N, SDOperand &Base,
- SDOperand &Scale, SDOperand &Index,
- SDOperand &Disp) {
- if (N.getOpcode() == ISD::LOAD && N.hasOneUse() &&
- CodeGenMap.count(N.getValue(1)) == 0)
+bool X86DAGToDAGISel::TryFoldLoad(SDOperand P, SDOperand N,
+ SDOperand &Base, SDOperand &Scale,
+ SDOperand &Index, SDOperand &Disp) {
+ if (N.getOpcode() == ISD::LOAD &&
+ N.hasOneUse() &&
+ !CodeGenMap.count(N.getValue(0)) &&
+ (P.getNumOperands() == 1 || !isNonImmUse(P.Val, N.Val)))
return SelectAddr(N.getOperand(1), Base, Scale, Index, Disp);
return false;
}
@@ -486,10 +489,10 @@
bool foldedLoad = false;
SDOperand Tmp0, Tmp1, Tmp2, Tmp3;
- foldedLoad = TryFoldLoad(N1, Tmp0, Tmp1, Tmp2, Tmp3);
+ foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3);
// MULHU and MULHS are commmutative
if (!foldedLoad) {
-foldedLoad = TryFoldLoad(N0, Tmp0, Tmp1, Tmp2, Tmp3);
+foldedLoad = TryFoldLoad(N, N0, Tmp0, Tmp1, Tmp2, Tmp3);
if (foldedLoad) {
N0 = Node->getOperand(1);
N1 = Node->getOperand(0);
@@ -505,6 +508,10 @@
InFlag = Chain.getValue(1);
if (foldedLoad) {
+Tmp0 = Select(Tmp0);
+Tmp1 = Select(Tmp1);
+Tmp2 = Select(Tmp2);
+Tmp3 = Select(Tmp3);
Chain = CurDAG->getTargetNode(MOpc, MVT::Other, MVT::Flag, Tmp0, Tmp1,
Tmp2, Tmp3, Chain, InFlag);
InFlag = Chain.getValue(1);
@@ -514,8 +521,10 @@
SDOperand Result = CurDAG->getCopyFromReg(Chain, HiReg, NVT, InFlag);
CodeGenMap[N.getValue(0)] = Result;
- if (foldedLoad)
+ if (foldedLoad) {
CodeGenMap[N1.getValue(1)] = Result.getValue(1);
+AddHandleReplacement(N1.getValue(1), Result.getValue(1));
+ }
return Result;
}
@@ -566,7 +575,7 @@
bool foldedLoad = false;
SDOperand Tmp0, Tmp1, Tmp2, Tmp3;
- foldedLoad = TryFoldLoad(N1, Tmp0, Tmp1, Tmp2, Tmp3);
+ foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3);
SDOperand Chain = foldedLoad ? Select(N1.getOperand(0))
: CurDAG->getEntryNode();
@@ -589,6 +598,10 @@
}
if (foldedLoad) {
+Tmp0 = Select(Tmp0);
+Tmp1 = Select(Tmp1);
+Tmp2 = Select(Tmp2);
+Tmp3 = Select(Tmp3);
Chain = CurDAG->getTargetNode(MOpc, MVT::Other, MVT::Flag, Tmp0, Tmp1,
Tmp2, Tmp3, Chain, InFlag);
InFlag = Chain.getValue(1);
@@ -599,8 +612,10 @@
SDOperand Result = CurDAG->getCopyFromReg(Chain, isDiv ? LoReg : HiReg,
NVT, InFlag);
CodeGenMap[N.getValue(0)] = Result;
- if (foldedLoad)
+ if (foldedLoad) {
CodeGenMap[N1.getValue(1)] = Result.getValue(1);
+AddHandleReplacement(N1.getValue(1), Result.getValue(1));
+ }
return Result;
}
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