[llvm-commits] CVS: llvm/lib/Target/IA64/IA64Bundling.cpp IA64InstrInfo.td IA64RegisterInfo.cpp
Changes in directory llvm/lib/Target/IA64:
IA64Bundling.cpp updated: 1.1 -> 1.2
IA64InstrInfo.td updated: 1.43 -> 1.44
IA64RegisterInfo.cpp updated: 1.12 -> 1.13
---
Log message:
some hoovering
---
Diffs of the changes: (+13 -9)
IA64Bundling.cpp |7 ---
IA64InstrInfo.td |7 +--
IA64RegisterInfo.cpp |8
3 files changed, 13 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/IA64/IA64Bundling.cpp
diff -u llvm/lib/Target/IA64/IA64Bundling.cpp:1.1
llvm/lib/Target/IA64/IA64Bundling.cpp:1.2
--- llvm/lib/Target/IA64/IA64Bundling.cpp:1.1 Tue Jan 24 20:23:38 2006
+++ llvm/lib/Target/IA64/IA64Bundling.cpp Thu Jan 26 03:08:31 2006
@@ -2,8 +2,8 @@
//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file was developed by Duraid Madina and is distributed under the
+// University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===--===//
//
@@ -56,7 +56,8 @@
std::set PendingRegWrites; // XXX: ugly global, but
// pending writes can cross basic blocks. Note that
- // taken branches end instruction groups.
+ // taken branches end instruction groups. So we
+// only need to worry about 'fallthrough' code
};
} // end of anonymous namespace
Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.43
llvm/lib/Target/IA64/IA64InstrInfo.td:1.44
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.43 Tue Jan 24 20:23:38 2006
+++ llvm/lib/Target/IA64/IA64InstrInfo.td Thu Jan 26 03:08:31 2006
@@ -501,10 +501,13 @@
def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm),
"shr $dst = $src1, $imm">;
-def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1,
u6imm:$imm2),
+def EXTRU : AForm<0x03, 0x0b,
+ (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),
"extr.u $dst = $src1, $imm1, $imm2">;
-def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1,
u6imm:$imm2), "dep.z $dst = $src1, $imm1, $imm2">;
+def DEPZ : AForm<0x03, 0x0b,
+ (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2),
+ "dep.z $dst = $src1, $imm1, $imm2">;
def PCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp),
"($qp) cmp.eq.or $dst, p0 = $src1, $src2">;
Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.12
llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.13
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.12 Tue Jan 24 20:23:38 2006
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Thu Jan 26 03:08:31 2006
@@ -168,8 +168,8 @@
if ( Offset <= 8191 && Offset >= -8192) { // smallish offset
//fix up the old:
MI.SetMachineOperandReg(i, IA64::r22);
-MachineOperand &MO = MI.getOperand(i);
-MO.setUse(); // mark r22 as being used (the bundler wants to know this)
+MI.getOperand(i).setUse(); // mark r22 as being used
+ // (the bundler wants to know this)
//insert the new
MachineInstr* nMI=BuildMI(IA64::ADDIMM22, 2, IA64::r22)
.addReg(BaseRegister).addSImm(Offset);
@@ -177,8 +177,8 @@
} else { // it's big
//fix up the old:
MI.SetMachineOperandReg(i, IA64::r22);
-MachineOperand &MO = MI.getOperand(i);
-MO.setUse(); // mark r22 as being used (the bundler wants to know this)
+MI.getOperand(i).setUse(); // mark r22 as being used
+ // (the bundler wants to know this)
MachineInstr* nMI;
nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset);
MBB.insert(II, nMI);
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/Makefile X86.h X86.td X86Subtarget.cpp X86Subtarget.h X86TargetMachine.cpp
Changes in directory llvm/lib/Target/X86:
Makefile updated: 1.24 -> 1.25
X86.h updated: 1.39 -> 1.40
X86.td updated: 1.16 -> 1.17
X86Subtarget.cpp updated: 1.8 -> 1.9
X86Subtarget.h updated: 1.7 -> 1.8
X86TargetMachine.cpp updated: 1.97 -> 1.98
---
Log message:
Added preliminary x86 subtarget support.
---
Diffs of the changes: (+158 -4)
Makefile |3 +-
X86.h|2 -
X86.td | 69 +++
X86Subtarget.cpp | 53 +++
X86Subtarget.h | 21 +++
X86TargetMachine.cpp | 14 --
6 files changed, 158 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/X86/Makefile
diff -u llvm/lib/Target/X86/Makefile:1.24 llvm/lib/Target/X86/Makefile:1.25
--- llvm/lib/Target/X86/Makefile:1.24 Tue Nov 15 19:54:32 2005
+++ llvm/lib/Target/X86/MakefileThu Jan 26 03:53:06 2006
@@ -13,7 +13,8 @@
BUILT_SOURCES = X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
X86GenRegisterInfo.inc X86GenInstrNames.inc \
X86GenInstrInfo.inc X86GenAsmWriter.inc \
-X86GenAsmWriter1.inc X86GenDAGISel.inc
+X86GenAsmWriter1.inc X86GenDAGISel.inc \
+X86GenSubtarget.inc
include $(LEVEL)/Makefile.common
Index: llvm/lib/Target/X86/X86.h
diff -u llvm/lib/Target/X86/X86.h:1.39 llvm/lib/Target/X86/X86.h:1.40
--- llvm/lib/Target/X86/X86.h:1.39 Fri Dec 16 19:22:13 2005
+++ llvm/lib/Target/X86/X86.h Thu Jan 26 03:53:06 2006
@@ -26,7 +26,7 @@
class MachineCodeEmitter;
enum X86VectorEnum {
- NoSSE, SSE, SSE2, SSE3
+ AutoDetect, NoSSE, SSE, SSE2, SSE3
};
extern X86VectorEnum X86Vector;
Index: llvm/lib/Target/X86/X86.td
diff -u llvm/lib/Target/X86/X86.td:1.16 llvm/lib/Target/X86/X86.td:1.17
--- llvm/lib/Target/X86/X86.td:1.16 Thu Jul 14 19:38:55 2005
+++ llvm/lib/Target/X86/X86.td Thu Jan 26 03:53:06 2006
@@ -17,6 +17,75 @@
include "../Target.td"
//===--===//
+// X86 Subtarget features.
+//
+
+def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit",
+"Enable 64-bit instructions">;
+def FeatureMMX : SubtargetFeature<"mmx", "bool", "HasMMX",
+"Enable MMX instructions">;
+def FeatureSSE : SubtargetFeature<"sse", "bool", "HasSSE",
+"Enable SSE instructions">;
+def FeatureSSE2 : SubtargetFeature<"sse2", "bool", "HasSSE2",
+"Enable SSE2 instructions">;
+def FeatureSSE3 : SubtargetFeature<"sse3", "bool", "HasSSE3",
+"Enable SSE3 instructions">;
+def Feature3DNow : SubtargetFeature<"3dnow", "bool", "Has3DNow",
+"Enable 3DNow! instructions">;
+def Feature3DNowA: SubtargetFeature<"3dnowa", "bool", "Has3DNowA",
+"Enable 3DNow! Athlon instructions">;
+
+//===--===//
+// X86 processors supported.
+//===--===//
+
+class Proc Features>
+ : Processor;
+
+def : Proc<"generic", []>;
+def : Proc<"i386",[]>;
+def : Proc<"i486",[]>;
+def : Proc<"i586",[]>;
+def : Proc<"pentium", []>;
+def : Proc<"pentium-mmx", [FeatureMMX]>;
+def : Proc<"i686",[]>;
+def : Proc<"pentiumpro", []>;
+def : Proc<"pentium2",[FeatureMMX]>;
+def : Proc<"celeron", [FeatureMMX]>;
+def : Proc<"pentium3",[FeatureMMX, FeatureSSE]>;
+def : Proc<"pentium3m", [FeatureMMX, FeatureSSE]>;
+def : Proc<"pentium-m", [FeatureMMX, FeatureSSE, FeatureSSE2]>;
+def : Proc<"pentium4",[FeatureMMX, FeatureSSE, FeatureSSE2]>;
+def : Proc<"pentium4m", [FeatureMMX, FeatureSSE, FeatureSSE2]>;
+def : Proc<"prescott",[FeatureMMX, FeatureSSE, FeatureSSE2,
+ FeatureSSE3]>;
+def : Proc<"x86-64", [FeatureMMX, FeatureSSE, FeatureSSE2,
Feature64Bit]>;
+def : Proc<"nocona", [FeatureMMX, FeatureSSE, FeatureSSE2,
+ FeatureSSE3, Feature64Bit]>;
+
+def : Proc<"k6", [FeatureMMX]>;
+def : Proc<"k6-2",[FeatureMMX, Feature3DNow]>;
+def : Proc<"k6-3",[FeatureMMX, Feature3DNow]>;
+def : Proc<"athlon", [FeatureMMX, Feature3DNow, Feature3DNowA]>;
+def : Proc<"athlon-tbird",[FeatureMMX, Feature3DNow, Feature3DNowA]>;
+def : Proc<"athlon-4",[FeatureMMX, FeatureSSE, Feature3DNow,
Feature3DNowA]>;
+def : Proc<"athlon-xp", [FeatureMMX, FeatureSSE, Feature3DNow,
Feature3DNowA]>;
+def : Proc<"athlon-mp", [FeatureMMX, FeatureSSE, Feature3DNow,
Feature3DNowA]>;
+def : Proc<"k8",
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.td
Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.td updated: 1.14 -> 1.15
---
Log message:
fix stack corruption! Previously, 16-byte whole-FP-register stores were
being treated as needing only 8 bytes (though they were 16 byte aligned.)
This should fix a bunch of tests - anyone have any comments, though?
- in Target.td , SpillSize and SpillAlignment seem dead - is this what
Size and Alignment do now?
- in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
DeclaredSpillAlignment seem dead.
- there are a bunch of comments here and there that don't clearly
distinguish between 'size' and 'spillsize' etc. hmm.
---
Diffs of the changes: (+7 -4)
IA64RegisterInfo.td | 11 +++
1 files changed, 7 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/IA64/IA64RegisterInfo.td
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.td:1.14
llvm/lib/Target/IA64/IA64RegisterInfo.td:1.15
--- llvm/lib/Target/IA64/IA64RegisterInfo.td:1.14 Mon Jan 23 00:08:46 2006
+++ llvm/lib/Target/IA64/IA64RegisterInfo.tdThu Jan 26 03:45:03 2006
@@ -283,10 +283,7 @@
// these are the scratch (+stacked) FP registers
-// the 128 here is to make stf.spill/ldf.fill happy,
-// when storing full (82-bit) FP regs to stack slots
-// we need to 16-byte align
-def FP : RegisterClass<"IA64", [f64], 128,
+def FP : RegisterClass<"IA64", [f64], 64,
[F6, F7,
F8, F9, F10, F11, F12, F13, F14, F15,
F32, F33, F34, F35, F36, F37, F38, F39,
@@ -303,6 +300,12 @@
F120, F121, F122, F123, F124, F125, F126, F127,
F0, F1]> // these last two are hidden
{
+// the 128s here are to make stf.spill/ldf.fill happy,
+// when storing full (82-bit) FP regs to stack slots
+// we need to 16-byte align
+let Size=128;
+let Alignment=128;
+
let MethodProtos = [{
iterator allocation_order_begin(MachineFunction &MF) const;
iterator allocation_order_end(MachineFunction &MF) const;
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Support/Dwarf.h
Changes in directory llvm/include/llvm/Support:
Dwarf.h added (r1.1)
---
Log message:
Split out Dwarf constants for use outside DwarfWriter.
---
Diffs of the changes: (+432 -0)
Dwarf.h | 432
1 files changed, 432 insertions(+)
Index: llvm/include/llvm/Support/Dwarf.h
diff -c /dev/null llvm/include/llvm/Support/Dwarf.h:1.1
*** /dev/null Thu Jan 26 08:45:32 2006
--- llvm/include/llvm/Support/Dwarf.h Thu Jan 26 08:45:22 2006
***
*** 0
--- 1,432
+ //===-- llvm/Support/Dwarf.h ---Dwarf Constants--*- C++
-*-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by James M. Laskey and is distributed under the
+ // University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+
//===--===//
+ //
+ // This file contains constants used for implementing Dwarf debug support.
For
+ // Details on the Dwarf 3 specfication see DWARF Debugging Information Format
+ // V.3 reference manual http://dwarf.freestandards.org ,
+ //
+
//===--===//
+
+ #ifndef LLVM_SUPPORT_DWARF_H
+ #define LLVM_SUPPORT_DWARF_H
+
+ namespace llvm {
+
+
//======//
+ // Dwarf constants as gleaned from the DWARF Debugging Information Format
V.3
+ // reference manual http://dwarf.freestandards.org .
+ //
+ enum dwarf_constants {
+ DWARF_VERSION = 2,
+
+ // Tags
+ DW_TAG_array_type = 0x01,
+ DW_TAG_class_type = 0x02,
+ DW_TAG_entry_point = 0x03,
+ DW_TAG_enumeration_type = 0x04,
+ DW_TAG_formal_parameter = 0x05,
+ DW_TAG_imported_declaration = 0x08,
+ DW_TAG_label = 0x0a,
+ DW_TAG_lexical_block = 0x0b,
+ DW_TAG_member = 0x0d,
+ DW_TAG_pointer_type = 0x0f,
+ DW_TAG_reference_type = 0x10,
+ DW_TAG_compile_unit = 0x11,
+ DW_TAG_string_type = 0x12,
+ DW_TAG_structure_type = 0x13,
+ DW_TAG_subroutine_type = 0x15,
+ DW_TAG_typedef = 0x16,
+ DW_TAG_union_type = 0x17,
+ DW_TAG_unspecified_parameters = 0x18,
+ DW_TAG_variant = 0x19,
+ DW_TAG_common_block = 0x1a,
+ DW_TAG_common_inclusion = 0x1b,
+ DW_TAG_inheritance = 0x1c,
+ DW_TAG_inlined_subroutine = 0x1d,
+ DW_TAG_module = 0x1e,
+ DW_TAG_ptr_to_member_type = 0x1f,
+ DW_TAG_set_type = 0x20,
+ DW_TAG_subrange_type = 0x21,
+ DW_TAG_with_stmt = 0x22,
+ DW_TAG_access_declaration = 0x23,
+ DW_TAG_base_type = 0x24,
+ DW_TAG_catch_block = 0x25,
+ DW_TAG_const_type = 0x26,
+ DW_TAG_constant = 0x27,
+ DW_TAG_enumerator = 0x28,
+ DW_TAG_file_type = 0x29,
+ DW_TAG_friend = 0x2a,
+ DW_TAG_namelist = 0x2b,
+ DW_TAG_namelist_item = 0x2c,
+ DW_TAG_packed_type = 0x2d,
+ DW_TAG_subprogram = 0x2e,
+ DW_TAG_template_type_parameter = 0x2f,
+ DW_TAG_template_value_parameter = 0x30,
+ DW_TAG_thrown_type = 0x31,
+ DW_TAG_try_block = 0x32,
+ DW_TAG_variant_part = 0x33,
+ DW_TAG_variable = 0x34,
+ DW_TAG_volatile_type = 0x35,
+ DW_TAG_dwarf_procedure = 0x36,
+ DW_TAG_restrict_type = 0x37,
+ DW_TAG_interface_type = 0x38,
+ DW_TAG_namespace = 0x39,
+ DW_TAG_imported_module = 0x3a,
+ DW_TAG_unspecified_type = 0x3b,
+ DW_TAG_partial_unit = 0x3c,
+ DW_TAG_imported_unit = 0x3d,
+ DW_TAG_condition = 0x3f,
+ DW_TAG_shared_type = 0x40,
+ DW_TAG_lo_user = 0x4080,
+ DW_TAG_hi_user = 0x,
+
+ // Children flag
+ DW_CHILDREN_no = 0x00,
+ DW_CHILDREN_yes = 0x01,
+
+ // Attributes
+ DW_AT_sibling = 0x01,
+ DW_AT_location = 0x02,
+ DW_AT_name = 0x03,
+ DW_AT_ordering = 0x09,
+ DW_AT_byte_size = 0x0b,
+ DW_AT_bit_offset = 0x0c,
+ DW_AT_bit_size = 0x0d,
+ DW_AT_stmt_list = 0x10,
+ DW_AT_low_pc = 0x11,
+ DW_AT_high_pc = 0x12,
+ DW_AT_language = 0x13,
+ DW_AT_discr = 0x15,
+ DW_AT_discr_value = 0x16,
+ DW_AT_visibility = 0x17,
+ DW_AT_import = 0x18,
+ DW_AT_string_length = 0x19,
+ DW_AT_common_reference = 0x1a,
+ DW_AT_comp_dir = 0x1b,
+ DW_AT_const_value = 0x1c,
+ DW_AT_containing_type = 0x1d,
+ DW_AT_default_value = 0x1e,
+ DW_AT_inline = 0x20,
+ DW_AT_is_optional = 0x21,
+ DW_AT_lower_bound = 0x22,
+ DW_AT_producer = 0x25,
+ DW_AT_prototyped = 0x27,
+ DW_AT_return_addr = 0x2a,
+ DW_AT_start_scope = 0x2c,
+ DW_AT_bit_stride = 0x2e,
+ DW_AT_upper_bound = 0x2f,
+ DW_AT_abstract_origin = 0x31,
+ DW_AT_accessibility = 0x32,
+ DW_AT_address_class = 0x33,
+ DW_AT_artificial = 0x34,
+ DW_AT_base_types = 0x35,
+ DW_AT_calling_convention = 0x36,
+ DW_AT_count = 0x37,
+ DW_AT_data_member_location = 0x38,
+ DW_AT_decl_column = 0x39,
+ DW_AT_
[llvm-commits] CVS: llvm/win32/x86/x86.vcproj
Changes in directory llvm/win32/x86: x86.vcproj updated: 1.17 -> 1.18 --- Log message: Teach Visual Studio about X86 subtargets. --- Diffs of the changes: (+9 -4) x86.vcproj | 13 + 1 files changed, 9 insertions(+), 4 deletions(-) Index: llvm/win32/x86/x86.vcproj diff -u llvm/win32/x86/x86.vcproj:1.17 llvm/win32/x86/x86.vcproj:1.18 --- llvm/win32/x86/x86.vcproj:1.17 Fri Dec 16 18:14:47 2005 +++ llvm/win32/x86/x86.vcproj Thu Jan 26 10:49:00 2006 @@ -123,9 +123,10 @@ ..\$(IntDir)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target\X86 $(InputPath) -o X86GenInstrInfo.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc -..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc" +..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc +..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc" AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe" - Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc"/> + Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/> @@ -139,9 +140,10 @@ ..\$(IntDir)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target\X86 $(InputPath) -o X86GenInstrInfo.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter.inc ..\$(IntDir)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target\X86 $(InputPath) -o X86GenAsmWriter1.inc -..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc" +..\$(IntDir)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target\X86 $(InputPath) -o X86GenDAGISel.inc +..\$(IntDir)\TableGen.exe -gen-subtarget -I ..\..\lib\Target\X86 $(InputPath) -o X86GenSubtarget.inc" AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)..\Target.td;$(ProjectDir)..\$(IntDir)\TableGen.exe" - Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc"/> + Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc"/> + + ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll 2006-01-26-VaargBreak.ll
Changes in directory llvm/test/Regression/CodeGen/Alpha:
2005-12-12-MissingFCMov.ll added (r1.1)
2006-01-26-VaargBreak.ll added (r1.1)
---
Log message:
added a couple test cases, including the new vaarg breakage
---
Diffs of the changes: (+61 -0)
2005-12-12-MissingFCMov.ll | 44
2006-01-26-VaargBreak.ll | 17 +
2 files changed, 61 insertions(+)
Index: llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll
diff -c /dev/null
llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll:1.1
*** /dev/null Thu Jan 26 11:43:52 2006
--- llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll Thu Jan
26 11:43:42 2006
***
*** 0
--- 1,44
+ ; This shouldn't crash
+ ; RUN: llvm-as < %s | llc -march=alpha
+
+ ; ModuleID = 'bugpoint-reduced-simplified.bc'
+ target endian = little
+ target pointersize = 64
+ %.str_4 = external global [44 x sbyte]; <[44 x sbyte]*>
[#uses=0]
+
+ implementation ; Functions:
+
+ declare void %printf(int, ...)
+
+ void %main() {
+ entry:
+ %tmp.11861 = setlt long 0, 1; [#uses=1]
+ %tmp.19466 = setlt long 0, 1; [#uses=1]
+ %tmp.21571 = setlt long 0, 1; [#uses=1]
+ %tmp.36796 = setlt long 0, 1; [#uses=1]
+ br bool %tmp.11861, label %loopexit.2, label %no_exit.2
+
+ no_exit.2:; preds = %entry
+ ret void
+
+ loopexit.2: ; preds = %entry
+ br bool %tmp.19466, label %loopexit.3, label %no_exit.3.preheader
+
+ no_exit.3.preheader: ; preds = %loopexit.2
+ ret void
+
+ loopexit.3: ; preds = %loopexit.2
+ br bool %tmp.21571, label %no_exit.6, label %no_exit.4
+
+ no_exit.4:; preds = %loopexit.3
+ ret void
+
+ no_exit.6:; preds = %no_exit.6, %loopexit.3
+ %tmp.30793 = setgt long 0, 0; [#uses=1]
+ br bool %tmp.30793, label %loopexit.6, label %no_exit.6
+
+ loopexit.6: ; preds = %no_exit.6
+ %Z.1 = select bool %tmp.36796, double 1.00e+00, double
0x3FEFFF7CEDE74EAE ; [#uses=2]
+ tail call void (int, ...)* %printf( int 0, long 0, long 0, long 0,
double 1.00e+00, double 1.00e+00, double %Z.1, double %Z.1 )
+ ret void
+ }
Index: llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll
diff -c /dev/null
llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll:1.1
*** /dev/null Thu Jan 26 11:44:06 2006
--- llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll Thu Jan 26
11:43:42 2006
***
*** 0
--- 1,17
+ ; This shouldn't crash
+ ; RUN: llvm-as < %s | llc -march=alpha
+
+ ; ModuleID = 'simp.bc'
+ target endian = little
+ target pointersize = 64
+ target triple = "alphaev6-unknown-linux-gnu"
+ deplibs = [ "c", "crtend", "stdc++" ]
+ %struct.__va_list_tag = type { sbyte*, int }
+
+ implementation ; Functions:
+
+ uint %emit_library_call_value(int %nargs, ...) {
+ entry:
+ %tmp.223 = va_arg %struct.__va_list_tag* null, uint ;
[#uses=0]
+ ret uint %tmp.223
+ }
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Support/PluginLoader.cpp
Changes in directory llvm/lib/Support:
PluginLoader.cpp updated: 1.15 -> 1.16
---
Log message:
Remember plugins should someone like bugpoint want to know them.
---
Diffs of the changes: (+15 -0)
PluginLoader.cpp | 15 +++
1 files changed, 15 insertions(+)
Index: llvm/lib/Support/PluginLoader.cpp
diff -u llvm/lib/Support/PluginLoader.cpp:1.15
llvm/lib/Support/PluginLoader.cpp:1.16
--- llvm/lib/Support/PluginLoader.cpp:1.15 Thu Apr 21 23:08:29 2005
+++ llvm/lib/Support/PluginLoader.cpp Thu Jan 26 12:36:43 2006
@@ -15,13 +15,17 @@
#include "llvm/Support/PluginLoader.h"
#include "llvm/System/DynamicLibrary.h"
#include
+#include
using namespace llvm;
+std::vector plugins;
+
void PluginLoader::operator=(const std::string &Filename) {
std::string ErrorMessage;
try {
sys::DynamicLibrary::LoadLibraryPermanently(Filename.c_str());
+plugins.push_back(Filename);
} catch (const std::string& errmsg) {
if (errmsg.empty()) {
ErrorMessage = "Unknown";
@@ -33,3 +37,14 @@
std::cerr << "Error opening '" << Filename << "': " << ErrorMessage
<< "\n -load request ignored.\n";
}
+
+unsigned PluginLoader::getNumPlugins()
+{
+ return plugins.size();
+}
+
+std::string& PluginLoader::getPlugin(unsigned num)
+{
+ assert(num < plugins.size() && "Asking for an out of bounds plugin");
+ return plugins[num];
+}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Support/PluginLoader.h
Changes in directory llvm/include/llvm/Support:
PluginLoader.h updated: 1.3 -> 1.4
---
Log message:
Remember plugins should someone like bugpoint want to know them.
---
Diffs of the changes: (+2 -0)
PluginLoader.h |2 ++
1 files changed, 2 insertions(+)
Index: llvm/include/llvm/Support/PluginLoader.h
diff -u llvm/include/llvm/Support/PluginLoader.h:1.3
llvm/include/llvm/Support/PluginLoader.h:1.4
--- llvm/include/llvm/Support/PluginLoader.h:1.3Thu Apr 21 15:44:59 2005
+++ llvm/include/llvm/Support/PluginLoader.hThu Jan 26 12:36:50 2006
@@ -22,6 +22,8 @@
namespace llvm {
struct PluginLoader {
void operator=(const std::string &Filename);
+static unsigned getNumPlugins();
+static std::string& getPlugin(unsigned num);
};
#ifndef DONT_GET_PLUGIN_LOADER_OPTION
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/tools/bugpoint/OptimizerDriver.cpp
Changes in directory llvm/tools/bugpoint:
OptimizerDriver.cpp updated: 1.36 -> 1.37
---
Log message:
Pass plugins on to children when optimizing.
---
Diffs of the changes: (+10 -1)
OptimizerDriver.cpp | 11 ++-
1 files changed, 10 insertions(+), 1 deletion(-)
Index: llvm/tools/bugpoint/OptimizerDriver.cpp
diff -u llvm/tools/bugpoint/OptimizerDriver.cpp:1.36
llvm/tools/bugpoint/OptimizerDriver.cpp:1.37
--- llvm/tools/bugpoint/OptimizerDriver.cpp:1.36Sun Jan 22 18:32:33 2006
+++ llvm/tools/bugpoint/OptimizerDriver.cpp Thu Jan 26 12:37:21 2006
@@ -30,6 +30,10 @@
#include "llvm/System/Path.h"
#include "llvm/System/Program.h"
#include "llvm/Config/alloca.h"
+
+#define DONT_GET_PLUGIN_LOADER_OPTION
+#include "llvm/Support/PluginLoader.h"
+
#include
using namespace llvm;
@@ -149,13 +153,18 @@
// setup the child process' arguments
const char** args = (const char**)
-alloca(sizeof(const char*)*(Passes.size()+10));
+alloca(sizeof(const char*) *
+ (Passes.size()+10+2*PluginLoader::getNumPlugins()));
int n = 0;
args[n++] = ToolName.c_str();
args[n++] = "-as-child";
args[n++] = "-child-output";
args[n++] = OutputFilename.c_str();
std::vector pass_args;
+ for (unsigned i = 0, e = PluginLoader::getNumPlugins(); i != e; ++i) {
+pass_args.push_back( std::string("-load"));
+pass_args.push_back( PluginLoader::getPlugin(i));
+ }
for (std::vector::const_iterator I = Passes.begin(),
E = Passes.end(); I != E; ++I )
pass_args.push_back( std::string("-") + (*I)->getPassArgument() );
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.143 -> 1.144
---
Log message:
Another folding problem: if a node r/w chain or flag, don't fold it if it
has already been selected. The number of use check is not strong enough since
a node can be replaced with newly created target node. e.g. If the original
node has two uses, when it is selected for one of the uses it is replaced with
another. Each node now has a single use but isel still should not fold it.
---
Diffs of the changes: (+20 -5)
DAGISelEmitter.cpp | 25 -
1 files changed, 20 insertions(+), 5 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.143
llvm/utils/TableGen/DAGISelEmitter.cpp:1.144
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.143Wed Jan 25 20:13:31 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Jan 26 13:13:45 2006
@@ -1909,7 +1909,8 @@
unsigned OpNo = 0;
bool NodeHasChain = NodeHasProperty(N, SDNodeInfo::SDNPHasChain, ISE);
bool HasChain = PatternHasProperty(N, SDNodeInfo::SDNPHasChain, ISE);
-bool EmittedCheck = false;
+bool EmittedUseCheck = false;
+bool EmittedSlctedCheck = false;
if (HasChain) {
if (NodeHasChain)
OpNo = 1;
@@ -1917,7 +1918,14 @@
const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator());
OS << " if (!" << RootName << ".hasOneUse()) goto P"
<< PatternNo << "Fail; // Multiple uses of actual result?\n";
-EmittedCheck = true;
+EmittedUseCheck = true;
+// hasOneUse() check is not strong enough. If the original node has
+// already been selected, it may have been replaced with another.
+for (unsigned j = 0; j < CInfo.getNumResults(); j++)
+ OS << " if (CodeGenMap.count(" << RootName
+ << ".getValue(" << j << "))) goto P"
+ << PatternNo << "Fail; // Already selected?\n";
+EmittedSlctedCheck = true;
if (NodeHasChain)
OS << " if (CodeGenMap.count(" << RootName
<< ".getValue(" << CInfo.getNumResults() << "))) goto P"
@@ -1933,15 +1941,22 @@
// FIXME: we really need to separate the concepts of flag and "glue". Those
// real flag results, e.g. X86CMP output, can have multiple uses.
// FIXME: If the incoming flag is optional. Then it is ok to fold it.
-if (!EmittedCheck &&
+if (!isRoot &&
(PatternHasProperty(N, SDNodeInfo::SDNPInFlag, ISE) ||
PatternHasProperty(N, SDNodeInfo::SDNPOptInFlag, ISE) ||
PatternHasProperty(N, SDNodeInfo::SDNPOutFlag, ISE))) {
- if (!isRoot) {
-const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator());
+ const SDNodeInfo &CInfo = ISE.getSDNodeInfo(N->getOperator());
+ if (!EmittedUseCheck) {
OS << " if (!" << RootName << ".hasOneUse()) goto P"
<< PatternNo << "Fail; // Multiple uses of actual result?\n";
}
+ if (!EmittedSlctedCheck)
+// hasOneUse() check is not strong enough. If the original node has
+// already been selected, it may have been replaced with another.
+for (unsigned j = 0; j < CInfo.getNumResults(); j++)
+ OS << " if (CodeGenMap.count(" << RootName
+ << ".getValue(" << j << "))) goto P"
+ << PatternNo << "Fail; // Already selected?\n";
}
for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) {
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Support/PluginLoader.cpp
Changes in directory llvm/lib/Support:
PluginLoader.cpp updated: 1.16 -> 1.17
---
Log message:
dynamically allocate plugin space as needed
---
Diffs of the changes: (+12 -5)
PluginLoader.cpp | 17 -
1 files changed, 12 insertions(+), 5 deletions(-)
Index: llvm/lib/Support/PluginLoader.cpp
diff -u llvm/lib/Support/PluginLoader.cpp:1.16
llvm/lib/Support/PluginLoader.cpp:1.17
--- llvm/lib/Support/PluginLoader.cpp:1.16 Thu Jan 26 12:36:43 2006
+++ llvm/lib/Support/PluginLoader.cpp Thu Jan 26 13:38:58 2006
@@ -19,13 +19,17 @@
using namespace llvm;
-std::vector plugins;
+static std::vector* plugins;
void PluginLoader::operator=(const std::string &Filename) {
std::string ErrorMessage;
+
+ if (!plugins)
+plugins = new std::vector();
+
try {
sys::DynamicLibrary::LoadLibraryPermanently(Filename.c_str());
-plugins.push_back(Filename);
+plugins->push_back(Filename);
} catch (const std::string& errmsg) {
if (errmsg.empty()) {
ErrorMessage = "Unknown";
@@ -40,11 +44,14 @@
unsigned PluginLoader::getNumPlugins()
{
- return plugins.size();
+ if(plugins)
+return plugins->size();
+ else
+return 0;
}
std::string& PluginLoader::getPlugin(unsigned num)
{
- assert(num < plugins.size() && "Asking for an out of bounds plugin");
- return plugins[num];
+ assert(plugins && num < plugins->size() && "Asking for an out of bounds
plugin");
+ return (*plugins)[num];
}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86JITInfo.cpp
Changes in directory llvm/lib/Target/X86:
X86JITInfo.cpp updated: 1.14 -> 1.15
---
Log message:
Improve compatibility with VC2005, patch by Morten Ofstad!
---
Diffs of the changes: (+5 -3)
X86JITInfo.cpp |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86JITInfo.cpp
diff -u llvm/lib/Target/X86/X86JITInfo.cpp:1.14
llvm/lib/Target/X86/X86JITInfo.cpp:1.15
--- llvm/lib/Target/X86/X86JITInfo.cpp:1.14 Fri Jul 22 15:49:37 2005
+++ llvm/lib/Target/X86/X86JITInfo.cpp Thu Jan 26 13:55:20 2006
@@ -20,6 +20,11 @@
#include
using namespace llvm;
+#ifdef _MSC_VER
+ extern "C" void *_AddressOfReturnAddress(void);
+ #pragma intrinsic(_AddressOfReturnAddress)
+#endif
+
void X86JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
unsigned char *OldByte = (unsigned char *)Old;
*OldByte++ = 0xE9;// Emit JMP opcode.
@@ -64,9 +69,6 @@
"popl%ebp\n"
"ret\n");
#else
- extern "C" void *_AddressOfReturnAddress(void);
- #pragma intrinsic(_AddressOfReturnAddress)
-
void X86CompilationCallback2(void);
_declspec(naked) void X86CompilationCallback(void) {
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/UniqueVector.h
Changes in directory llvm/include/llvm/ADT:
UniqueVector.h updated: 1.4 -> 1.5
---
Log message:
Add support to find existing entries.
---
Diffs of the changes: (+20 -0)
UniqueVector.h | 20
1 files changed, 20 insertions(+)
Index: llvm/include/llvm/ADT/UniqueVector.h
diff -u llvm/include/llvm/ADT/UniqueVector.h:1.4
llvm/include/llvm/ADT/UniqueVector.h:1.5
--- llvm/include/llvm/ADT/UniqueVector.h:1.4Tue Jan 17 13:21:01 2006
+++ llvm/include/llvm/ADT/UniqueVector.hThu Jan 26 14:09:35 2006
@@ -52,6 +52,19 @@
return ID;
}
+ /// idFor - return the ID for an existing entry. Returns 0 if the entry is
+ /// not found.
+ unsigned idFor(const T &Entry) const {
+// Search for entry in the map.
+typename std::map::iterator MI = Map.lower_bound(Entry);
+
+// See if entry exists, if so return ID.
+if (MI != Map.end() && MI->first == Entry) return MI->second;
+
+// No luck.
+return 0;
+ }
+
/// operator[] - Returns a reference to the entry with the specified ID.
///
const T &operator[](unsigned ID) const { return *Vector[ID - 1]; }
@@ -63,6 +76,13 @@
/// empty - Returns true if the vector is empty.
///
bool empty() const { return Vector.empty(); }
+
+ /// reset - Clears all the entries.
+ ///
+ void reset() {
+Map.clear();
+Vector.resize(0, 0);
+ }
};
} // End of namespace llvm
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp DwarfWriter.cpp MachineDebugInfo.cpp
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.39 -> 1.40
DwarfWriter.cpp updated: 1.17 -> 1.18
MachineDebugInfo.cpp updated: 1.4 -> 1.5
---
Log message:
Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals.
Global Variable information is now pulled from "llvm.dbg.globals"
---
Diffs of the changes: (+289 -16)
AsmPrinter.cpp |5
DwarfWriter.cpp | 31 ++---
MachineDebugInfo.cpp | 269 +++
3 files changed, 289 insertions(+), 16 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.39
llvm/lib/CodeGen/AsmPrinter.cpp:1.40
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.39Mon Jan 23 22:15:29 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp Thu Jan 26 14:21:46 2006
@@ -78,6 +78,11 @@
<< "\n" << CommentString << " End of file scope inline assembly\n";
SwitchSection("", 0); // Reset back to no section.
+
+ if (MachineDebugInfo *DebugInfo = getAnalysisToUpdate()) {
+DebugInfo->AnalyzeModule(M);
+ }
+
return false;
}
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.17
llvm/lib/CodeGen/DwarfWriter.cpp:1.18
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.17 Wed Jan 25 11:18:50 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppThu Jan 26 14:21:46 2006
@@ -18,6 +18,7 @@
#include "llvm/Type.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineDebugInfo.h"
+#include "llvm/Support/Dwarf.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Target/TargetMachine.h"
@@ -1719,28 +1720,26 @@
/// variables.
void DwarfWriter::ConstructGlobalDIEs(Module &M) {
const TargetData &TD = Asm->TM.getTargetData();
-
- // Iterate throu each of the globals.
- for (Module::const_global_iterator GI = M.global_begin(), GE =
M.global_end();
- GI != GE; ++GI) {
-if (!GI->hasInitializer()) continue; // External global require no code
-
-// Check to see if this is a special global used by LLVM, if so, emit it.
-if (GI->hasAppendingLinkage() && (GI->getName() == "llvm.global_ctors" ||
- GI->getName() == "llvm.global_dtors"))
- continue;
+
+ std::vector GlobalVariables =
DebugInfo->getGlobalVariables(M);
+
+ for (unsigned i = 0, N = GlobalVariables.size(); i < N; ++i) {
+GlobalWrapper &GW = GlobalVariables[i];
+GlobalVariable *GV = GW.getGlobalVariable();
-std::string Name = Asm->Mang->getValueName(GI);
-Constant *C = GI->getInitializer();
+if (!GV->hasInitializer()) continue; // External global require no code
+
+// FIXME - Use global info type information when available.
+std::string Name = Asm->Mang->getValueName(GV);
+Constant *C = GV->getInitializer();
const Type *Ty = C->getType();
unsigned Size = TD.getTypeSize(Ty);
unsigned Align = TD.getTypeAlignmentShift(Ty);
if (C->isNullValue() && /* FIXME: Verify correct */
-(GI->hasInternalLinkage() || GI->hasWeakLinkage() ||
- GI->hasLinkOnceLinkage())) {
+(GV->hasInternalLinkage() || GV->hasWeakLinkage() ||
+ GV->hasLinkOnceLinkage())) {
if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
-
}
/// FIXME - Get correct compile unit context.
@@ -1748,7 +1747,7 @@
DWContext *Context = CompileUnits[0]->getContext();
/// Create new global.
-NewGlobalVariable(Context, GI->getName(), Name, Ty, Size, Align);
+NewGlobalVariable(Context, GV->getName(), Name, Ty, Size, Align);
}
}
Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.4
llvm/lib/CodeGen/MachineDebugInfo.cpp:1.5
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.4 Tue Jan 17 11:31:53 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp Thu Jan 26 14:21:46 2006
@@ -9,6 +9,13 @@
#include "llvm/CodeGen/MachineDebugInfo.h"
+#include "llvm/Constants.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Intrinsics.h"
+#include "llvm/Instructions.h"
+#include "llvm/Module.h"
+#include "llvm/Support/Dwarf.h"
+
using namespace llvm;
// Handle the Pass registration stuff necessary to use TargetData's.
@@ -16,8 +23,220 @@
RegisterPass X("machinedebuginfo", "Debug Information");
}
+//===--===//
+
+/// getGlobalVariablesUsing - Return all of the global variables which have the
+/// specified value in their initializer somewhere.
+static void
+getGlobalVariablesUsing(Value *V, std::vector &Result) {
+ // Scan though value users.
+ for (Value::use_iterator I = V->use_begin(), E = V->use_end(); I != E; ++I) {
+if (GlobalVariable *GV = dyn_cast(*I)) {
+ // If the user is a global variable then add to result.
+ Result.push_back(GV);
+} else if (Constant *C = dyn_cast(*I)) {
+ // If the user is a constant variable t
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.142 -> 1.143
---
Log message:
Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals.
Global Variable information is now pulled from "llvm.dbg.globals"
---
Diffs of the changes: (+1 -1)
PPCAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.142
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.143
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.142 Mon Jan 23 18:49:18 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Jan 26 14:21:46 2006
@@ -431,7 +431,7 @@
/// method to print assembly for each instruction.
///
bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
- // FIXME - is this the earliest this can be set.
+ // FIXME - is this the earliest this can be set?
DW.SetDebugInfo(&getAnalysis());
SetupMachineFunction(MF);
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h MachineDebugInfo.h
Changes in directory llvm/include/llvm/CodeGen:
DwarfWriter.h updated: 1.16 -> 1.17
MachineDebugInfo.h updated: 1.6 -> 1.7
---
Log message:
Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals.
Global Variable information is now pulled from "llvm.dbg.globals"
---
Diffs of the changes: (+128 -421)
DwarfWriter.h | 409 -
MachineDebugInfo.h | 140 --
2 files changed, 128 insertions(+), 421 deletions(-)
Index: llvm/include/llvm/CodeGen/DwarfWriter.h
diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.16
llvm/include/llvm/CodeGen/DwarfWriter.h:1.17
--- llvm/include/llvm/CodeGen/DwarfWriter.h:1.16Mon Jan 23 18:49:18 2006
+++ llvm/include/llvm/CodeGen/DwarfWriter.h Thu Jan 26 14:21:46 2006
@@ -27,415 +27,6 @@
namespace llvm {
-
-
//======//
- // Dwarf constants as gleaned from the DWARF Debugging Information Format V.3
- // reference manual http://dwarf.freestandards.org .
- //
- enum dwarf_constants {
-DWARF_VERSION = 2,
-
- // Tags
-DW_TAG_array_type = 0x01,
-DW_TAG_class_type = 0x02,
-DW_TAG_entry_point = 0x03,
-DW_TAG_enumeration_type = 0x04,
-DW_TAG_formal_parameter = 0x05,
-DW_TAG_imported_declaration = 0x08,
-DW_TAG_label = 0x0a,
-DW_TAG_lexical_block = 0x0b,
-DW_TAG_member = 0x0d,
-DW_TAG_pointer_type = 0x0f,
-DW_TAG_reference_type = 0x10,
-DW_TAG_compile_unit = 0x11,
-DW_TAG_string_type = 0x12,
-DW_TAG_structure_type = 0x13,
-DW_TAG_subroutine_type = 0x15,
-DW_TAG_typedef = 0x16,
-DW_TAG_union_type = 0x17,
-DW_TAG_unspecified_parameters = 0x18,
-DW_TAG_variant = 0x19,
-DW_TAG_common_block = 0x1a,
-DW_TAG_common_inclusion = 0x1b,
-DW_TAG_inheritance = 0x1c,
-DW_TAG_inlined_subroutine = 0x1d,
-DW_TAG_module = 0x1e,
-DW_TAG_ptr_to_member_type = 0x1f,
-DW_TAG_set_type = 0x20,
-DW_TAG_subrange_type = 0x21,
-DW_TAG_with_stmt = 0x22,
-DW_TAG_access_declaration = 0x23,
-DW_TAG_base_type = 0x24,
-DW_TAG_catch_block = 0x25,
-DW_TAG_const_type = 0x26,
-DW_TAG_constant = 0x27,
-DW_TAG_enumerator = 0x28,
-DW_TAG_file_type = 0x29,
-DW_TAG_friend = 0x2a,
-DW_TAG_namelist = 0x2b,
-DW_TAG_namelist_item = 0x2c,
-DW_TAG_packed_type = 0x2d,
-DW_TAG_subprogram = 0x2e,
-DW_TAG_template_type_parameter = 0x2f,
-DW_TAG_template_value_parameter = 0x30,
-DW_TAG_thrown_type = 0x31,
-DW_TAG_try_block = 0x32,
-DW_TAG_variant_part = 0x33,
-DW_TAG_variable = 0x34,
-DW_TAG_volatile_type = 0x35,
-DW_TAG_dwarf_procedure = 0x36,
-DW_TAG_restrict_type = 0x37,
-DW_TAG_interface_type = 0x38,
-DW_TAG_namespace = 0x39,
-DW_TAG_imported_module = 0x3a,
-DW_TAG_unspecified_type = 0x3b,
-DW_TAG_partial_unit = 0x3c,
-DW_TAG_imported_unit = 0x3d,
-DW_TAG_condition = 0x3f,
-DW_TAG_shared_type = 0x40,
-DW_TAG_lo_user = 0x4080,
-DW_TAG_hi_user = 0x,
-
-// Children flag
-DW_CHILDREN_no = 0x00,
-DW_CHILDREN_yes = 0x01,
-
-// Attributes
-DW_AT_sibling = 0x01,
-DW_AT_location = 0x02,
-DW_AT_name = 0x03,
-DW_AT_ordering = 0x09,
-DW_AT_byte_size = 0x0b,
-DW_AT_bit_offset = 0x0c,
-DW_AT_bit_size = 0x0d,
-DW_AT_stmt_list = 0x10,
-DW_AT_low_pc = 0x11,
-DW_AT_high_pc = 0x12,
-DW_AT_language = 0x13,
-DW_AT_discr = 0x15,
-DW_AT_discr_value = 0x16,
-DW_AT_visibility = 0x17,
-DW_AT_import = 0x18,
-DW_AT_string_length = 0x19,
-DW_AT_common_reference = 0x1a,
-DW_AT_comp_dir = 0x1b,
-DW_AT_const_value = 0x1c,
-DW_AT_containing_type = 0x1d,
-DW_AT_default_value = 0x1e,
-DW_AT_inline = 0x20,
-DW_AT_is_optional = 0x21,
-DW_AT_lower_bound = 0x22,
-DW_AT_producer = 0x25,
-DW_AT_prototyped = 0x27,
-DW_AT_return_addr = 0x2a,
-DW_AT_start_scope = 0x2c,
-DW_AT_bit_stride = 0x2e,
-DW_AT_upper_bound = 0x2f,
-DW_AT_abstract_origin = 0x31,
-DW_AT_accessibility = 0x32,
-DW_AT_address_class = 0x33,
-DW_AT_artificial = 0x34,
-DW_AT_base_types = 0x35,
-DW_AT_calling_convention = 0x36,
-DW_AT_count = 0x37,
-DW_AT_data_member_location = 0x38,
-DW_AT_decl_column = 0x39,
-DW_AT_decl_file = 0x3a,
-DW_AT_decl_line = 0x3b,
-DW_AT_declaration = 0x3c,
-DW_AT_discr_list = 0x3d,
-DW_AT_encoding = 0x3e,
-DW_AT_external = 0x3f,
-DW_AT_frame_base = 0x40,
-DW_AT_friend = 0x41,
-DW_AT_identifier_case = 0x42,
-DW_AT_macro_info = 0x43,
-DW_AT_namelist_item = 0x44,
-DW_AT_priority = 0x45,
-DW_AT_segment = 0x46,
-DW_AT_specification = 0x47,
-DW_AT_static_link = 0x48,
-DW_AT_type = 0x49,
-DW_AT_use_location = 0x4a,
-DW_AT_variable_parameter = 0x4b,
-DW_AT_virtuality = 0x4c,
-DW_AT_vtable_elem_location = 0x4d,
-DW_
[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.36 -> 1.37 --- Log message: Add a method for inline asm support. --- Diffs of the changes: (+11 -0) TargetLowering.h | 11 +++ 1 files changed, 11 insertions(+) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.36 llvm/include/llvm/Target/TargetLowering.h:1.37 --- llvm/include/llvm/Target/TargetLowering.h:1.36 Wed Jan 25 12:21:52 2006 +++ llvm/include/llvm/Target/TargetLowering.h Thu Jan 26 14:27:33 2006 @@ -391,6 +391,17 @@ uint64_t Mask) const; //======// + // Inline Asm Support hooks + // + + /// getRegForInlineAsmConstraint - Given a constraint letter or register + /// name (e.g. "r" or "edx"), return a list of registers that can be used to + /// satisfy the constraint. If the constraint isn't supported, or isn't a + /// register constraint, return an empty list. + virtual std::vector + getRegForInlineAsmConstraint(const std::string &Constraint) const; + + //======// // Scheduler hooks // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/Xcode/LLVM.xcodeproj/project.pbxproj
Changes in directory llvm/Xcode/LLVM.xcodeproj:
project.pbxproj updated: 1.17 -> 1.18
---
Log message:
Update files lists.
---
Diffs of the changes: (+9 -5)
project.pbxproj | 14 +-
1 files changed, 9 insertions(+), 5 deletions(-)
Index: llvm/Xcode/LLVM.xcodeproj/project.pbxproj
diff -u llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.17
llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.18
--- llvm/Xcode/LLVM.xcodeproj/project.pbxproj:1.17 Tue Jan 17 11:29:20 2006
+++ llvm/Xcode/LLVM.xcodeproj/project.pbxproj Thu Jan 26 14:32:00 2006
@@ -92,7 +92,6 @@
CF490CDF0903C9260072DB1C /* PPCISelDAGToDAG.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = PPCISelDAGToDAG.cpp; sourceTree = ""; };
CF490CE00903C9260072DB1C /* PPCISelLowering.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = PPCISelLowering.cpp; sourceTree = ""; };
CF490CE10903C9260072DB1C /* PPCISelLowering.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
PPCISelLowering.h; sourceTree = ""; };
- CF490CE20903C9260072DB1C /* PPCISelPattern.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = PPCISelPattern.cpp; sourceTree = ""; };
CF490CE30903C9260072DB1C /* PPCJITInfo.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = PPCJITInfo.cpp; sourceTree = ""; };
CF490CE40903C9260072DB1C /* PPCJITInfo.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
PPCJITInfo.h; sourceTree = ""; };
CF490CE50903C9260072DB1C /* PPCRegisterInfo.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = PPCRegisterInfo.cpp; sourceTree = ""; };
@@ -116,6 +115,10 @@
CF6529A6095B21A8007F884E /* MachineDebugInfo.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = MachineDebugInfo.cpp; sourceTree = ""; };
CF6B5AFD095C82C300D1EA42 /* DAGCombiner.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = DAGCombiner.cpp; sourceTree = ""; };
CF6F487109505E1500BC9E82 /* MachineDebugInfo.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
MachineDebugInfo.h; sourceTree = ""; };
+ CF7FFA1F0985081C008B0087 /* ScheduleDAGList.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = ScheduleDAGList.cpp; sourceTree = ""; };
+ CF7FFA200985081C008B0087 /* ScheduleDAGSimple.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = ScheduleDAGSimple.cpp; sourceTree = ""; };
+ CF7FFA2109850864008B0087 /* ScheduleDAG.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
ScheduleDAG.h; sourceTree = ""; };
+ CF8E00490989162500DA2399 /* Dwarf.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
Dwarf.h; sourceTree = ""; };
CF9BCD0808C74DE0001E7011 /* SubtargetFeature.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
SubtargetFeature.h; sourceTree = ""; };
CF9BCD1508C75070001E7011 /* SubtargetFeature.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = SubtargetFeature.cpp; sourceTree = ""; };
CFBD8B1A090E76540020B107 /* AlphaISelDAGToDAG.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = AlphaISelDAGToDAG.cpp; sourceTree = ""; };
@@ -150,7 +153,6 @@
DE4DA04A091147ED0012D44B /* PPCISelDAGToDAG.cpp */ = {isa =
PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp;
name = PPCISelDAGToDAG.cpp; path = ../lib/Target/PowerPC/PPCISelDAGToDAG.cpp;
sourceTree = SOURCE_ROOT; };
DE4DA04B091147ED0012D44B /* PPCISelLowering.cpp */ = {isa =
PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp;
name = PPCISelLowering.cpp; path = ../lib/Target/PowerPC/PPCISelLowering.cpp;
sourceTree = SOURCE_ROOT; };
DE4DA04C091147ED0012D44B /* PPCISelLowering.h */ = {isa =
PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; name =
PPCISelLowering.h; path = ../lib/Target/PowerPC/PPCISelLowering.h; sourceTree =
SOURCE_ROOT; };
- DE4DA04D091147ED0012D44B /* PPCISelPattern.cpp */ = {isa =
PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp;
name = PPCISelPattern.cpp; path = ../lib/Target/PowerPC/PPCISelPattern.cpp;
sourceTree = SOURCE_ROOT
[llvm-commits] CVS: llvm/lib/Target/TargetLowering.cpp
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.20 -> 1.21
---
Log message:
Implement a method for inline asm support
---
Diffs of the changes: (+17 -0)
TargetLowering.cpp | 17 +
1 files changed, 17 insertions(+)
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.20
llvm/lib/Target/TargetLowering.cpp:1.21
--- llvm/lib/Target/TargetLowering.cpp:1.20 Wed Jan 25 12:57:15 2006
+++ llvm/lib/Target/TargetLowering.cpp Thu Jan 26 14:37:03 2006
@@ -13,7 +13,9 @@
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/ADT/StringExtras.h"
using namespace llvm;
TargetLowering::TargetLowering(TargetMachine &tm)
@@ -132,3 +134,18 @@
uint64_t Mask) const {
return false;
}
+
+std::vector TargetLowering::
+getRegForInlineAsmConstraint(const std::string &Constraint) const {
+ // Scan to see if this constraint is a register name.
+ const MRegisterInfo *RI = TM.getRegisterInfo();
+ for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) {
+if (const char *Name = RI->get(i).Name)
+ if (StringsEqualNoCase(Constraint, Name))
+return std::vector(1, i);
+ }
+
+ // Not a physreg, must not be a register reference or something.
+ return std::vector();
+}
+
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/StringExtras.h
Changes in directory llvm/include/llvm/ADT:
StringExtras.h updated: 1.26 -> 1.27
---
Log message:
add some methods for case-insensitive string compares
---
Diffs of the changes: (+21 -0)
StringExtras.h | 21 +
1 files changed, 21 insertions(+)
Index: llvm/include/llvm/ADT/StringExtras.h
diff -u llvm/include/llvm/ADT/StringExtras.h:1.26
llvm/include/llvm/ADT/StringExtras.h:1.27
--- llvm/include/llvm/ADT/StringExtras.h:1.26 Thu Apr 21 15:13:50 2005
+++ llvm/include/llvm/ADT/StringExtras.hThu Jan 26 14:36:29 2006
@@ -113,6 +113,27 @@
return result;
}
+/// StringsEqualNoCase - Return true if the two strings are equal, ignoring
+/// case.
+static inline bool StringsEqualNoCase(const std::string &LHS,
+ const std::string &RHS) {
+ if (LHS.size() != RHS.size()) return false;
+ for (unsigned i = 0, e = LHS.size(); i != e; ++i)
+if (tolower(LHS[i]) != tolower(RHS[i])) return false;
+ return true;
+}
+
+/// StringsEqualNoCase - Return true if the two strings are equal, ignoring
+/// case.
+static inline bool StringsEqualNoCase(const std::string &LHS,
+ const char *RHS) {
+ for (unsigned i = 0, e = LHS.size(); i != e; ++i) {
+if (RHS[i] == 0) return false; // RHS too short.
+if (tolower(LHS[i]) != tolower(RHS[i])) return false;
+ }
+ return RHS[LHS.size()] == 0; // Not too long?
+}
+
/// getToken - This function extracts one token from source, ignoring any
/// leading characters that appear in the Delimiters string, and ending the
/// token at any of the characters that appear in the Delimiters string. If
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/UniqueVector.h
Changes in directory llvm/include/llvm/ADT:
UniqueVector.h updated: 1.5 -> 1.6
---
Log message:
Use find instead of lower_bounds.
---
Diffs of the changes: (+2 -2)
UniqueVector.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/ADT/UniqueVector.h
diff -u llvm/include/llvm/ADT/UniqueVector.h:1.5
llvm/include/llvm/ADT/UniqueVector.h:1.6
--- llvm/include/llvm/ADT/UniqueVector.h:1.5Thu Jan 26 14:09:35 2006
+++ llvm/include/llvm/ADT/UniqueVector.hThu Jan 26 14:30:51 2006
@@ -56,10 +56,10 @@
/// not found.
unsigned idFor(const T &Entry) const {
// Search for entry in the map.
-typename std::map::iterator MI = Map.lower_bound(Entry);
+typename std::map::iterator MI = Map.find(Entry);
// See if entry exists, if so return ID.
-if (MI != Map.end() && MI->first == Entry) return MI->second;
+if (MI != Map.end()) return MI->second;
// No luck.
return 0;
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveInterval.h
Changes in directory llvm/include/llvm/CodeGen:
LiveInterval.h updated: 1.15 -> 1.16
---
Log message:
Improve compatibility with VC2005, patch by Morten Ofstad!
---
Diffs of the changes: (+3 -0)
LiveInterval.h |3 +++
1 files changed, 3 insertions(+)
Index: llvm/include/llvm/CodeGen/LiveInterval.h
diff -u llvm/include/llvm/CodeGen/LiveInterval.h:1.15
llvm/include/llvm/CodeGen/LiveInterval.h:1.16
--- llvm/include/llvm/CodeGen/LiveInterval.h:1.15 Thu Oct 20 02:37:59 2005
+++ llvm/include/llvm/CodeGen/LiveInterval.hThu Jan 26 14:41:32 2006
@@ -64,6 +64,9 @@
return V < LR.start;
}
+ inline bool operator<(const LiveRange &LR, unsigned V) {
+return LR.start < V;
+ }
/// LiveInterval - This class represents some number of live ranges for a
/// register or value. This class also contains a bit of register allocator
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/SubtargetFeature.h
Changes in directory llvm/include/llvm/Target:
SubtargetFeature.h updated: 1.5 -> 1.6
---
Log message:
Improve compatibility with VC2005, patch by Morten Ofstad!
---
Diffs of the changes: (+4 -4)
SubtargetFeature.h |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Target/SubtargetFeature.h
diff -u llvm/include/llvm/Target/SubtargetFeature.h:1.5
llvm/include/llvm/Target/SubtargetFeature.h:1.6
--- llvm/include/llvm/Target/SubtargetFeature.h:1.5 Tue Oct 25 10:15:28 2005
+++ llvm/include/llvm/Target/SubtargetFeature.h Thu Jan 26 14:41:32 2006
@@ -36,8 +36,8 @@
uint32_t Value; // K-V integer value
// Compare routine for std binary search
- bool operator<(const std::string &S) const {
-return strcmp(Key, S.c_str()) < 0;
+ bool operator<(const SubtargetFeatureKV &S) const {
+return strcmp(Key, S.Key) < 0;
}
};
@@ -51,8 +51,8 @@
void *Value; // K-V pointer value
// Compare routine for std binary search
- bool operator<(const std::string &S) const {
-return strcmp(Key, S.c_str()) < 0;
+ bool operator<(const SubtargetInfoKV &S) const {
+return strcmp(Key, S.Key) < 0;
}
};
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/SubtargetFeature.cpp
Changes in directory llvm/lib/Target:
SubtargetFeature.cpp updated: 1.8 -> 1.9
---
Log message:
Improve compatibility with VC2005, patch by Morten Ofstad!
---
Diffs of the changes: (+4 -1)
SubtargetFeature.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/SubtargetFeature.cpp
diff -u llvm/lib/Target/SubtargetFeature.cpp:1.8
llvm/lib/Target/SubtargetFeature.cpp:1.9
--- llvm/lib/Target/SubtargetFeature.cpp:1.8Tue Oct 25 10:15:28 2005
+++ llvm/lib/Target/SubtargetFeature.cppThu Jan 26 14:41:32 2006
@@ -112,10 +112,13 @@
/// Find KV in array using binary search.
template const T *Find(const std::string &S, const T *A, size_t L)
{
+ // Make the lower bound element we're looking for
+ T KV;
+ KV.Key = S.c_str();
// Determine the end of the array
const T *Hi = A + L;
// Binary search the array
- const T *F = std::lower_bound(A, Hi, S);
+ const T *F = std::lower_bound(A, Hi, KV);
// If not found then return NULL
if (F == Hi || std::string(F->Key) != S) return NULL;
// Return the found array item
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86FloatingPoint.cpp
Changes in directory llvm/lib/Target/X86:
X86FloatingPoint.cpp updated: 1.48 -> 1.49
---
Log message:
Improve compatibility with VC2005, patch by Morten Ofstad!
---
Diffs of the changes: (+6 -1)
X86FloatingPoint.cpp |7 ++-
1 files changed, 6 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.48
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.49
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.48 Sun Jan 22 17:37:17 2006
+++ llvm/lib/Target/X86/X86FloatingPoint.cppThu Jan 26 14:41:32 2006
@@ -281,7 +281,12 @@
unsigned from;
unsigned to;
bool operator<(const TableEntry &TE) const { return from < TE.from; }
-bool operator<(unsigned V) const { return from < V; }
+friend bool operator<(const TableEntry &TE, unsigned V) {
+ return TE.from < V;
+}
+friend bool operator<(unsigned V, const TableEntry &TE) {
+ return V < TE.from;
+}
};
}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp
Changes in directory llvm/lib/Transforms/Scalar:
CorrelatedExprs.cpp updated: 1.31 -> 1.32
---
Log message:
Improve compatibility with VC2005, patch by Morten Ofstad!
---
Diffs of the changes: (+4 -2)
CorrelatedExprs.cpp |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp
diff -u llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.31
llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.32
--- llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp:1.31 Sun Jan 22 17:32:06 2006
+++ llvm/lib/Transforms/Scalar/CorrelatedExprs.cpp Thu Jan 26 14:41:32 2006
@@ -135,7 +135,8 @@
Relation &getRelation(Value *V) {
// Binary search for V's entry...
std::vector::iterator I =
-std::lower_bound(Relationships.begin(), Relationships.end(), V);
+std::lower_bound(Relationships.begin(), Relationships.end(),
+ Relation(V));
// If we found the entry, return it...
if (I != Relationships.end() && I->getValue() == V)
@@ -148,7 +149,8 @@
const Relation *requestRelation(Value *V) const {
// Binary search for V's entry...
std::vector::const_iterator I =
-std::lower_bound(Relationships.begin(), Relationships.end(), V);
+std::lower_bound(Relationships.begin(), Relationships.end(),
+ Relation(V));
if (I != Relationships.end() && I->getValue() == V)
return &*I;
return 0;
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp MachineDebugInfo.cpp
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.18 -> 1.19
MachineDebugInfo.cpp updated: 1.5 -> 1.6
---
Log message:
Use global information to fill out Dwarf compile units.
---
Diffs of the changes: (+18 -22)
DwarfWriter.cpp | 30 ++
MachineDebugInfo.cpp | 10 --
2 files changed, 18 insertions(+), 22 deletions(-)
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.18
llvm/lib/CodeGen/DwarfWriter.cpp:1.19
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.18 Thu Jan 26 14:21:46 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppThu Jan 26 15:22:49 2006
@@ -1242,20 +1242,16 @@
/// NewCompileUnit - Create new compile unit information.
///
-DIE *DwarfWriter::NewCompileUnit(const std::string &Directory,
- const std::string &SourceName) {
+DIE *DwarfWriter::NewCompileUnit(const CompileUnitWrapper &CompileUnit) {
DIE *Unit = new DIE(DW_TAG_compile_unit, DW_CHILDREN_yes);
// FIXME - use the correct line set.
Unit->AddLabel (DW_AT_stmt_list, DW_FORM_data4, DWLabel("line", 0));
Unit->AddLabel (DW_AT_high_pc, DW_FORM_addr, DWLabel("text_end", 0));
Unit->AddLabel (DW_AT_low_pc,DW_FORM_addr, DWLabel("text_begin", 0));
- // FIXME - The producer needs to be in this form, but should come from
- // an appropriate source.
- Unit->AddString(DW_AT_producer, DW_FORM_string,
- "llvm 3.4.x (LLVM Research Group)");
- Unit->AddInt (DW_AT_language, DW_FORM_data1, DW_LANG_C89);
- Unit->AddString(DW_AT_name, DW_FORM_string, SourceName);
- Unit->AddString(DW_AT_comp_dir, DW_FORM_string, Directory);
+ Unit->AddString(DW_AT_producer, DW_FORM_string, CompileUnit.getProducer());
+ Unit->AddInt (DW_AT_language, DW_FORM_data1, CompileUnit.getLanguage());
+ Unit->AddString(DW_AT_name, DW_FORM_string, CompileUnit.getFileName());
+ Unit->AddString(DW_AT_comp_dir, DW_FORM_string, CompileUnit.getDirectory());
Unit->Complete(*this);
return Unit;
@@ -1700,17 +1696,11 @@
/// ConstructCompileUnitDIEs - Create a compile unit DIE for each source and
/// header file.
void DwarfWriter::ConstructCompileUnitDIEs() {
- // Get directory and source information.
- const UniqueVector &Directories = DebugInfo->getDirectories();
- const UniqueVector &SourceFiles =
DebugInfo->getSourceFiles();
-
- // Construct compile unit DIEs for each source.
- for (unsigned SourceID = 1, NSID = SourceFiles.size();
-SourceID <= NSID; ++SourceID) {
-const SourceFileInfo &SourceFile = SourceFiles[SourceID];
-const std::string &Directory = Directories[SourceFile.getDirectoryID()];
-const std::string &SourceName = SourceFile.getName();
-DIE *Unit = NewCompileUnit(Directory, SourceName);
+ const UniqueVector CUW = DebugInfo->getCompileUnits();
+
+ for (unsigned i = 1, N = CUW.size(); i <= N; ++i) {
+const CompileUnitWrapper &CompileUnit = CUW[i];
+DIE *Unit = NewCompileUnit(CompileUnit);
DWContext *Context = new DWContext(*this, NULL, Unit);
CompileUnits.push_back(Unit);
}
Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.5
llvm/lib/CodeGen/MachineDebugInfo.cpp:1.6
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.5 Thu Jan 26 14:21:46 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp Thu Jan 26 15:22:49 2006
@@ -180,7 +180,7 @@
/// getContext - Return the "lldb.compile_unit" context global.
///
GlobalVariable *GlobalWrapper::getContext() const {
- return dyn_cast(IC->getOperand(1));
+ return cast(IC->getOperand(1));
}
/// getName - Return the name of the global.
@@ -192,7 +192,7 @@
/// getType - Return the type of the global.
///
const GlobalVariable *GlobalWrapper::getType() const {
- return dyn_cast(IC->getOperand(4));
+ return cast(IC->getOperand(4));
}
/// isStatic - Return true if the global is static.
@@ -274,6 +274,12 @@
if (CompileUnits.size() != Globals.size()) CompileUnits.reset();
}
+/// getCompileUnits - Return a vector of debug compile units.
+///
+const UniqueVector
MachineDebugInfo::getCompileUnits()const{
+ return CompileUnits;
+}
+
/// getGlobalVariables - Return a vector of debug global variables.
///
std::vector MachineDebugInfo::getGlobalVariables(Module &M) {
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h MachineDebugInfo.h
Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.17 -> 1.18 MachineDebugInfo.h updated: 1.7 -> 1.8 --- Log message: Use global information to fill out Dwarf compile units. --- Diffs of the changes: (+7 -2) DwarfWriter.h |5 +++-- MachineDebugInfo.h |4 2 files changed, 7 insertions(+), 2 deletions(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.17 llvm/include/llvm/CodeGen/DwarfWriter.h:1.18 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.17Thu Jan 26 14:21:46 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Thu Jan 26 15:22:49 2006 @@ -32,6 +32,7 @@ // Forward declarations. // class AsmPrinter; + class CompileUnitWrapper; class DIE; class DwarfWriter; class DWContext; @@ -645,10 +646,10 @@ unsigned Size, unsigned Align); private: + /// NewCompileUnit - Create new compile unit information. /// -DIE *NewCompileUnit(const std::string &Directory, -const std::string &SourceName); +DIE *DwarfWriter::NewCompileUnit(const CompileUnitWrapper &CompileUnit); /// EmitInitial - Emit initial Dwarf declarations. /// Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.7 llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.8 --- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.7Thu Jan 26 14:21:46 2006 +++ llvm/include/llvm/CodeGen/MachineDebugInfo.hThu Jan 26 15:22:49 2006 @@ -271,6 +271,10 @@ /// void MachineDebugInfo::SetupCompileUnits(Module &M); + /// getCompileUnits - Return a vector of debug compile units. + /// + const UniqueVector getCompileUnits() const; + /// getGlobalVariables - Return a vector of debug global variables. /// static std::vector getGlobalVariables(Module &M); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.94 -> 1.95 --- Log message: Add new INLINEASM node --- Diffs of the changes: (+9 -0) SelectionDAGNodes.h |9 + 1 files changed, 9 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.94 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.95 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.94 Wed Jan 25 12:21:52 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jan 26 16:23:45 2006 @@ -311,6 +311,15 @@ // the callee is known not to access the stack of the caller. CALL, TAILCALL, + +// INLINEASM - Represents an inline asm block. This node always has two +// return values: a chain and a flag result. The inputs are as follows: +// Operand #0 : Input chain. +// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. +// Operand #2n+2: A RegisterNode. +// Operand #2n+3: A TargetConstant, indicating if the reg is a use/def +// Operand #last: Optional, an incoming flag. +INLINEASM, // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a // value, the same type as the pointer type for the system, and an output ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h
Changes in directory llvm/include/llvm/CodeGen: DwarfWriter.h updated: 1.18 -> 1.19 --- Log message: Dropped DwarfWriter:: --- Diffs of the changes: (+1 -1) DwarfWriter.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/CodeGen/DwarfWriter.h diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.18 llvm/include/llvm/CodeGen/DwarfWriter.h:1.19 --- llvm/include/llvm/CodeGen/DwarfWriter.h:1.18Thu Jan 26 15:22:49 2006 +++ llvm/include/llvm/CodeGen/DwarfWriter.h Thu Jan 26 16:25:04 2006 @@ -649,7 +649,7 @@ /// NewCompileUnit - Create new compile unit information. /// -DIE *DwarfWriter::NewCompileUnit(const CompileUnitWrapper &CompileUnit); +DIE *NewCompileUnit(const CompileUnitWrapper &CompileUnit); /// EmitInitial - Emit initial Dwarf declarations. /// ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.277 -> 1.278
SelectionDAG.cpp updated: 1.244 -> 1.245
SelectionDAGISel.cpp updated: 1.137 -> 1.138
---
Log message:
initial selectiondag support for new INLINEASM node. Note that inline asms
with outputs or inputs are not supported yet. :)
---
Diffs of the changes: (+74 -1)
LegalizeDAG.cpp | 22 ++
SelectionDAG.cpp |3 ++-
SelectionDAGISel.cpp | 50 ++
3 files changed, 74 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.277
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.278
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.277 Wed Jan 25 12:21:52 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jan 26 16:24:51 2006
@@ -881,6 +881,28 @@
AddLegalizedOperand(SDOperand(Node, 1), Tmp2);
return Op.ResNo ? Tmp2 : Tmp1;
}
+ case ISD::INLINEASM:
+Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize Chain.
+Tmp2 = Node->getOperand(Node->getNumOperands()-1);
+if (Tmp2.getValueType() != MVT::Flag) // Legalize Flag if it exists.
+ Tmp2 = Tmp3 = SDOperand(0, 0);
+else
+ Tmp3 = LegalizeOp(Tmp2);
+
+if (Tmp1 != Node->getOperand(0) || Tmp2 != Tmp3) {
+ std::vector Ops(Node->op_begin(), Node->op_end());
+ Ops[0] = Tmp1;
+ Ops.back() = Tmp3;
+ std::vector VTs(Node->value_begin(), Node->value_end());
+ Result = DAG.getNode(ISD::INLINEASM, VTs, Ops);
+} else {
+ Result = SDOperand(Node, 0);
+}
+
+// INLINE asm returns a chain and flag, make sure to add both to the map.
+AddLegalizedOperand(SDOperand(Node, 0), Result);
+AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
+return Result.getValue(Op.ResNo);
case ISD::TAILCALL:
case ISD::CALL: {
Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.244
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.245
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.244Wed Jan 25
12:21:52 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jan 26 16:24:51 2006
@@ -2028,7 +2028,8 @@
case ISD::CopyFromReg: return "CopyFromReg";
case ISD::UNDEF: return "undef";
case ISD::MERGE_VALUES: return "mergevalues";
-
+ case ISD::INLINEASM: return "inlineasm";
+
// Unary operators
case ISD::FABS: return "fabs";
case ISD::FNEG: return "fneg";
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.137
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.138
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.137Wed Jan 25
12:21:52 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jan 26 16:24:51 2006
@@ -19,6 +19,7 @@
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/GlobalVariable.h"
+#include "llvm/InlineAsm.h"
#include "llvm/Instructions.h"
#include "llvm/Intrinsics.h"
#include "llvm/CodeGen/IntrinsicLowering.h"
@@ -468,6 +469,7 @@
void visitStore(StoreInst &I);
void visitPHI(PHINode &I) { } // PHI nodes are handled specially.
void visitCall(CallInst &I);
+ void visitInlineAsm(CallInst &I);
const char *visitIntrinsicCall(CallInst &I, unsigned Intrinsic);
void visitVAStart(CallInst &I);
@@ -1122,6 +1124,9 @@
}
}
}
+ } else if (isa(I.getOperand(0))) {
+visitInlineAsm(I);
+return;
}
SDOperand Callee;
@@ -1148,6 +1153,51 @@
DAG.setRoot(Result.second);
}
+/// visitInlineAsm - Handle a call to an InlineAsm object.
+///
+void SelectionDAGLowering::visitInlineAsm(CallInst &I) {
+ InlineAsm *IA = cast(I.getOperand(0));
+
+ SDOperand AsmStr = DAG.getTargetExternalSymbol(IA->getAsmString().c_str(),
+ MVT::Other);
+
+ // Note, we treat inline asms both with and without side-effects as the same.
+ // If an inline asm doesn't have side effects and doesn't access memory, we
+ // could not choose to not chain it.
+ bool hasSideEffects = IA->hasSideEffects();
+
+ std::vector >
+Constraints = IA->ParseConstraints();
+
+
+ /// AsmNodeOperands - A list of pairs. The first element is a register, the
+ /// second is a bitfield where bit #0 is set if it is a use and bit #1 is set
+ /// if it is a def of that register.
+ std::vector AsmNodeOperands;
+ AsmNodeOperands.push_back(SDOperand()); // reserve space for input chain
+ AsmNodeOperands.push_back(AsmStr);
+
+ SDOperand Chain = getRoot();
+ SDOperand Flag;
+
+ // FIXME: input copies.
+
+ // Finish up input operands.
+ AsmNodeOperands[0] = Chain;
+ if (Flag.Val) AsmNodeOperands.push_back(Flag);
+
+ std::vect
[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.144 -> 1.145
---
Log message:
Teach the dag selectors to select InlineAsm nodes.
Aren't we happy the pattern selectors are almost all gone?
---
Diffs of the changes: (+18 -1)
DAGISelEmitter.cpp | 19 ++-
1 files changed, 18 insertions(+), 1 deletion(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.144
llvm/utils/TableGen/DAGISelEmitter.cpp:1.145
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.144Thu Jan 26 13:13:45 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Jan 26 17:08:55 2006
@@ -2662,6 +2662,21 @@
}
// Emit boilerplate.
+ OS << "SDOperand Select_INLINEASM(SDOperand N) {\n"
+ << " std::vector Ops(N.Val->op_begin(), N.Val->op_end());\n"
+ << " Ops[0] = Select(N.getOperand(0)); // Select the chain.\n\n"
+ << " // Select the flag operand.\n"
+ << " if (Ops.back().getValueType() == MVT::Flag)\n"
+ << "Ops.back() = Select(Ops.back());\n"
+ << " std::vector VTs;\n"
+ << " VTs.push_back(MVT::Other);\n"
+ << " VTs.push_back(MVT::Flag);\n"
+ << " SDOperand New = CurDAG->getNode(ISD::INLINEASM, VTs, Ops);\n"
+ << " CodeGenMap[N.getValue(0)] = New;\n"
+ << " CodeGenMap[N.getValue(1)] = New.getValue(1);\n"
+ << " return New.getValue(N.ResNo);\n"
+ << "}\n\n";
+
OS << "// The main instruction selector code.\n"
<< "SDOperand SelectCode(SDOperand N) {\n"
<< " if (N.getOpcode() >= ISD::BUILTIN_OP_END &&\n"
@@ -2737,7 +2752,9 @@
<< " CodeGenMap[N.getValue(1)] = Result.getValue(1);\n"
<< " return Result.getValue(N.ResNo);\n"
<< "}\n"
- << " }\n";
+ << " }\n"
+ << " case ISD::INLINEASM: return Select_INLINEASM(N);\n";
+
// Loop over all of the case statements, emiting a call to each method we
// emitted above.
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h
Changes in directory llvm/include/llvm/Target:
TargetInstrInfo.h updated: 1.81 -> 1.82
---
Log message:
Add a common INLINEASM opcode
---
Diffs of the changes: (+5 -2)
TargetInstrInfo.h |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.81
llvm/include/llvm/Target/TargetInstrInfo.h:1.82
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.81 Tue Nov 1 14:07:00 2005
+++ llvm/include/llvm/Target/TargetInstrInfo.h Thu Jan 26 17:27:02 2006
@@ -125,8 +125,11 @@
TargetInstrInfo(const TargetInstrDescriptor *desc, unsigned NumOpcodes);
virtual ~TargetInstrInfo();
- // Invariant: All instruction sets use opcode #0 as the PHI instruction
- enum { PHI = 0 };
+ // Invariant opcodes: All instruction sets have these as their low opcodes.
+ enum {
+PHI = 0,
+INLINEASM = 1
+ };
unsigned getNumOpcodes() const { return NumOpcodes; }
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.59 -> 1.60
---
Log message:
Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an
ISD::INLINEASM node.
---
Diffs of the changes: (+29 -0)
ScheduleDAG.cpp | 29 +
1 files changed, 29 insertions(+)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.59
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.60
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.59 Wed Jan 25 12:54:24 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Thu Jan 26 17:28:04 2006
@@ -283,6 +283,35 @@
MRI->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC);
break;
}
+case ISD::INLINEASM: {
+ unsigned NumOps = Node->getNumOperands();
+ if (Node->getOperand(NumOps-1).getValueType() == MVT::Flag)
+--NumOps; // Ignore the flag operand.
+
+ // Create the inline asm machine instruction.
+ MachineInstr *MI =
+new MachineInstr(BB, TargetInstrInfo::INLINEASM, (NumOps-2)/2+1);
+
+ // Add the asm string as an external symbol operand.
+ const char *AsmStr =
+cast(Node->getOperand(1))->getSymbol();
+ MI->addExternalSymbolOperand(AsmStr, false);
+
+ // Add all of the operand registers to the instruction.
+ for (unsigned i = 2; i != NumOps; i += 2) {
+unsigned Reg = cast(Node->getOperand(i))->getReg();
+unsigned Flags = cast(Node->getOperand(i))->getValue();
+MachineOperand::UseType UseTy;
+switch (Flags) {
+default: assert(0 && "Bad flags!");
+case 1: UseTy = MachineOperand::Use; break;
+case 2: UseTy = MachineOperand::Def; break;
+case 3: UseTy = MachineOperand::UseAndDef; break;
+}
+MI->addMachineRegOperand(Reg, UseTy);
+ }
+ break;
+}
}
}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/CodeEmitterGen.cpp
Changes in directory llvm/utils/TableGen:
CodeEmitterGen.cpp updated: 1.42 -> 1.43
---
Log message:
Don't emit JIT code for these instructions
---
Diffs of the changes: (+2 -0)
CodeEmitterGen.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/utils/TableGen/CodeEmitterGen.cpp
diff -u llvm/utils/TableGen/CodeEmitterGen.cpp:1.42
llvm/utils/TableGen/CodeEmitterGen.cpp:1.43
--- llvm/utils/TableGen/CodeEmitterGen.cpp:1.42 Mon Oct 24 10:04:15 2005
+++ llvm/utils/TableGen/CodeEmitterGen.cpp Thu Jan 26 19:39:38 2006
@@ -89,6 +89,8 @@
for (std::vector::iterator I = Insts.begin(), E = Insts.end();
I != E; ++I) {
Record *R = *I;
+if (R->getName() == "PHI" || R->getName() == "INLINEASM") continue;
+
o << "case " << Namespace << R->getName() << ": {\n"
<< " DEBUG(std::cerr << \"Emitting " << R->getName() << "\\n\");\n";
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/TargetSchedule.td
Changes in directory llvm/lib/Target: TargetSchedule.td updated: 1.4 -> 1.5 --- Log message: Add a default NoItinerary class for targets to use. --- Diffs of the changes: (+1 -0) TargetSchedule.td |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/TargetSchedule.td diff -u llvm/lib/Target/TargetSchedule.td:1.4 llvm/lib/Target/TargetSchedule.td:1.5 --- llvm/lib/Target/TargetSchedule.td:1.4 Sun Oct 23 17:07:20 2005 +++ llvm/lib/Target/TargetSchedule.td Thu Jan 26 19:41:38 2006 @@ -47,6 +47,7 @@ // instruction information. // class InstrItinClass; +def NoItinerary : InstrItinClass; //===--===// // Instruction itinerary data - These values provide a runtime map of an ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/InstrInfoEmitter.cpp
Changes in directory llvm/utils/TableGen:
InstrInfoEmitter.cpp updated: 1.34 -> 1.35
---
Log message:
If we want to emit things in enum order, use getInstructionsByEnumValue to
get the order, don't compute it ourselves.
Don't emit stuff like (14<<0), emit 14 instead.
Don't attempt to get target properties for builtin instructions.
---
Diffs of the changes: (+25 -15)
InstrInfoEmitter.cpp | 40 +---
1 files changed, 25 insertions(+), 15 deletions(-)
Index: llvm/utils/TableGen/InstrInfoEmitter.cpp
diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.34
llvm/utils/TableGen/InstrInfoEmitter.cpp:1.35
--- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.34 Fri Dec 30 08:56:37 2005
+++ llvm/utils/TableGen/InstrInfoEmitter.cppThu Jan 26 19:44:09 2006
@@ -93,7 +93,6 @@
CodeGenTarget Target;
const std::string &TargetName = Target.getName();
Record *InstrInfo = Target.getInstructionSet();
- Record *PHI = InstrInfo->getValueAsDef("PHIInst");
// Emit empty implicit uses and defs lists
OS << "static const unsigned EmptyImpList[] = { 0 };\n";
@@ -144,19 +143,16 @@
}
}
- // Emit all of the TargetInstrDescriptor records.
+ // Emit all of the TargetInstrDescriptor records in their ENUM ordering.
//
OS << "\nstatic const TargetInstrDescriptor " << TargetName
<< "Insts[] = {\n";
- emitRecord(Target.getPHIInstruction(), 0, InstrInfo, EmittedLists,
- OperandInfosEmitted, OS);
+ std::vector NumberedInstructions;
+ Target.getInstructionsByEnumValue(NumberedInstructions);
- unsigned i = 0;
- for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
- E = Target.inst_end(); II != E; ++II)
-if (II->second.TheDef != PHI)
- emitRecord(II->second, ++i, InstrInfo, EmittedLists,
- OperandInfosEmitted, OS);
+ for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i)
+emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists,
+ OperandInfosEmitted, OS);
OS << "};\n";
OS << "} // End llvm namespace \n";
}
@@ -272,8 +268,13 @@
RecordVal *RV = R->getValue(Val->getValue());
int Shift = ShiftInt->getValue();
- if (RV == 0 || RV->getValue() == 0)
-throw R->getName() + " doesn't have a field named '" +
Val->getValue()+"'!";
+ if (RV == 0 || RV->getValue() == 0) {
+// This isn't an error if this is a builtin instruction.
+if (R->getName() != "PHI" && R->getName() != "INLINEASM")
+ throw R->getName() + " doesn't have a field named '" +
+Val->getValue() + "'!";
+return;
+ }
Init *Value = RV->getValue();
if (BitInit *BI = dynamic_cast(Value)) {
@@ -284,13 +285,22 @@
Init *I = BI->convertInitializerTo(new IntRecTy());
if (I)
if (IntInit *II = dynamic_cast(I)) {
-if (II->getValue())
- OS << "|(" << II->getValue() << "<<" << Shift << ")";
+if (II->getValue()) {
+ if (Shift)
+OS << "|(" << II->getValue() << "<<" << Shift << ")";
+ else
+OS << "|" << II->getValue();
+}
return;
}
} else if (IntInit *II = dynamic_cast(Value)) {
-if (II->getValue()) OS << "|(" << II->getValue() << "<<" << Shift << ")";
+if (II->getValue()) {
+ if (Shift)
+OS << "|(" << II->getValue() << "<<" << Shift << ")";
+ else
+OS << II->getValue();
+}
return;
}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/SubtargetEmitter.cpp
Changes in directory llvm/utils/TableGen:
SubtargetEmitter.cpp updated: 1.15 -> 1.16
---
Log message:
There is at least a 'noitinerary' itinerary now
---
Diffs of the changes: (+1 -1)
SubtargetEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/utils/TableGen/SubtargetEmitter.cpp
diff -u llvm/utils/TableGen/SubtargetEmitter.cpp:1.15
llvm/utils/TableGen/SubtargetEmitter.cpp:1.16
--- llvm/utils/TableGen/SubtargetEmitter.cpp:1.15 Fri Dec 30 08:56:37 2005
+++ llvm/utils/TableGen/SubtargetEmitter.cppThu Jan 26 19:41:55 2006
@@ -436,7 +436,7 @@
// Enumerate all the itinerary classes
unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap);
// Make sure the rest is worth the effort
- HasItineraries = NItinClasses != 0;
+ HasItineraries = NItinClasses != 1; // Ignore NoItinerary.
if (HasItineraries) {
// Emit the stage data
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/CodeGenTarget.cpp CodeGenTarget.h
Changes in directory llvm/utils/TableGen:
CodeGenTarget.cpp updated: 1.53 -> 1.54
CodeGenTarget.h updated: 1.23 -> 1.24
---
Log message:
PHI and INLINEASM are now builtin instructions provided by Target.td
---
Diffs of the changes: (+13 -21)
CodeGenTarget.cpp | 30 +-
CodeGenTarget.h |4
2 files changed, 13 insertions(+), 21 deletions(-)
Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.53
llvm/utils/TableGen/CodeGenTarget.cpp:1.54
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.53 Mon Jan 9 12:27:06 2006
+++ llvm/utils/TableGen/CodeGenTarget.cpp Thu Jan 26 19:45:06 2006
@@ -205,10 +205,10 @@
void CodeGenTarget::ReadInstructions() const {
std::vector Insts = Records.getAllDerivedDefinitions("Instruction");
-
- if (Insts.empty())
+ if (Insts.size() <= 2)
throw std::string("No 'Instruction' subclasses defined!");
+ // Parse the instructions defined in the .td file.
std::string InstFormatName =
getAsmWriter()->getValueAsString("InstFormatName");
@@ -219,29 +219,25 @@
}
}
-/// getPHIInstruction - Return the designated PHI instruction.
-///
-const CodeGenInstruction &CodeGenTarget::getPHIInstruction() const {
- Record *PHI = getInstructionSet()->getValueAsDef("PHIInst");
- std::map::const_iterator I =
-getInstructions().find(PHI->getName());
- if (I == Instructions.end())
-throw "Could not find PHI instruction named '" + PHI->getName() + "'!";
- return I->second;
-}
-
/// getInstructionsByEnumValue - Return all of the instructions defined by the
/// target, ordered by their enum value.
void CodeGenTarget::
getInstructionsByEnumValue(std::vector
&NumberedInstructions) {
-
+ std::map::const_iterator I;
+ I = getInstructions().find("PHI");
+ if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
+ const CodeGenInstruction *PHI = &I->second;
+
+ I = getInstructions().find("INLINEASM");
+ if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
+ const CodeGenInstruction *INLINEASM = &I->second;
+
// Print out the rest of the instructions now.
- unsigned i = 0;
- const CodeGenInstruction *PHI = &getPHIInstruction();
NumberedInstructions.push_back(PHI);
+ NumberedInstructions.push_back(INLINEASM);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
-if (&II->second != PHI)
+if (&II->second != PHI &&&II->second != INLINEASM)
NumberedInstructions.push_back(&II->second);
}
Index: llvm/utils/TableGen/CodeGenTarget.h
diff -u llvm/utils/TableGen/CodeGenTarget.h:1.23
llvm/utils/TableGen/CodeGenTarget.h:1.24
--- llvm/utils/TableGen/CodeGenTarget.h:1.23Wed Dec 7 20:14:08 2005
+++ llvm/utils/TableGen/CodeGenTarget.h Thu Jan 26 19:45:06 2006
@@ -148,10 +148,6 @@
&NumberedInstructions);
- /// getPHIInstruction - Return the designated PHI instruction.
- ///
- const CodeGenInstruction &getPHIInstruction() const;
-
/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
///
bool isLittleEndianEncoding() const;
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86.td X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86.td updated: 1.17 -> 1.18
X86InstrInfo.td updated: 1.218 -> 1.219
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+0 -4)
X86.td |1 -
X86InstrInfo.td |3 ---
2 files changed, 4 deletions(-)
Index: llvm/lib/Target/X86/X86.td
diff -u llvm/lib/Target/X86/X86.td:1.17 llvm/lib/Target/X86/X86.td:1.18
--- llvm/lib/Target/X86/X86.td:1.17 Thu Jan 26 03:53:06 2006
+++ llvm/lib/Target/X86/X86.td Thu Jan 26 19:46:15 2006
@@ -98,7 +98,6 @@
include "X86InstrInfo.td"
def X86InstrInfo : InstrInfo {
- let PHIInst = PHI;
// Define how we want to layout our TargetSpecific information field... This
// should be kept up-to-date with the fields in the X86InstrInfo.h file.
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.218
llvm/lib/Target/X86/X86InstrInfo.td:1.219
--- llvm/lib/Target/X86/X86InstrInfo.td:1.218 Wed Jan 25 18:29:36 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Thu Jan 26 19:46:15 2006
@@ -378,9 +378,6 @@
// Instruction list...
//
-// Pseudo-instructions:
-def PHI : I<0, Pseudo, (ops variable_ops), "PHINODE", []>;// PHI node.
-
def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN",
[(X86callseq_start imm:$amt)]>;
def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2),
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Alpha/Alpha.td AlphaInstrInfo.td
Changes in directory llvm/lib/Target/Alpha:
Alpha.td updated: 1.6 -> 1.7
AlphaInstrInfo.td updated: 1.109 -> 1.110
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+0 -4)
Alpha.td |2 --
AlphaInstrInfo.td |2 --
2 files changed, 4 deletions(-)
Index: llvm/lib/Target/Alpha/Alpha.td
diff -u llvm/lib/Target/Alpha/Alpha.td:1.6 llvm/lib/Target/Alpha/Alpha.td:1.7
--- llvm/lib/Target/Alpha/Alpha.td:1.6 Wed Oct 26 12:28:23 2005
+++ llvm/lib/Target/Alpha/Alpha.td Thu Jan 26 19:46:15 2006
@@ -38,8 +38,6 @@
include "AlphaInstrInfo.td"
def AlphaInstrInfo : InstrInfo {
- let PHIInst = PHI;
-
// Define how we want to layout our target-specific information field.
// let TSFlagsFields = [];
// let TSFlagsShifts = [];
Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.109
llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.110
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.109 Wed Jan 25 21:24:15 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td Thu Jan 26 19:46:15 2006
@@ -113,8 +113,6 @@
//Pseudo ops for selection
-def PHI : PseudoInstAlpha<(ops variable_ops), "#phi", []>;
-
def IDEF_I : PseudoInstAlpha<(ops GPRC:$RA), "#idef $RA",
[(set GPRC:$RA, (undef))]>;
def IDEF_F32 : PseudoInstAlpha<(ops F4RC:$RA), "#idef $RA",
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64.td IA64InstrInfo.td
Changes in directory llvm/lib/Target/IA64:
IA64.td updated: 1.6 -> 1.7
IA64InstrInfo.td updated: 1.44 -> 1.45
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+1 -4)
IA64.td |4 +---
IA64InstrInfo.td |1 -
2 files changed, 1 insertion(+), 4 deletions(-)
Index: llvm/lib/Target/IA64/IA64.td
diff -u llvm/lib/Target/IA64/IA64.td:1.6 llvm/lib/Target/IA64/IA64.td:1.7
--- llvm/lib/Target/IA64/IA64.td:1.6Mon Jan 23 00:11:45 2006
+++ llvm/lib/Target/IA64/IA64.tdThu Jan 26 19:46:15 2006
@@ -28,9 +28,7 @@
include "IA64InstrInfo.td"
-def IA64InstrInfo : InstrInfo {
-let PHIInst = PHI;
-}
+def IA64InstrInfo : InstrInfo { }
def IA64 : Target {
// The following registers are always saved across calls:
Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u llvm/lib/Target/IA64/IA64InstrInfo.td:1.44
llvm/lib/Target/IA64/IA64InstrInfo.td:1.45
--- llvm/lib/Target/IA64/IA64InstrInfo.td:1.44 Thu Jan 26 03:08:31 2006
+++ llvm/lib/Target/IA64/IA64InstrInfo.td Thu Jan 26 19:46:15 2006
@@ -448,7 +448,6 @@
// TODO: support postincrement (reg, imm9) loads+stores - this needs more
// tablegen support
-def PHI : PseudoInstIA64<(ops variable_ops), "PHI">;
def IDEF : PseudoInstIA64<(ops variable_ops), "// IDEF">;
def IDEF_GR_D : PseudoInstIA64_DAG<(ops GR:$reg), "// $reg = IDEF",
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Target.td
Changes in directory llvm/lib/Target:
Target.td updated: 1.68 -> 1.69
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+11 -3)
Target.td | 14 +++---
1 files changed, 11 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.68 llvm/lib/Target/Target.td:1.69
--- llvm/lib/Target/Target.td:1.68 Mon Jan 9 12:28:21 2006
+++ llvm/lib/Target/Target.td Thu Jan 26 19:46:15 2006
@@ -171,7 +171,7 @@
bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains?
bit noResults= 0; // Does this instruction produce no results?
- InstrItinClass Itinerary; // Execution steps used for scheduling.
+ InstrItinClass Itinerary = NoItinerary;// Execution steps used for
scheduling.
}
/// Predicates - These are extra conditionals which are turned into instruction
@@ -213,8 +213,6 @@
// which are global to the the target machine.
//
class InstrInfo {
- Instruction PHIInst;
-
// If the target wants to associate some target-specific information with
each
// instruction, it should provide these two lists to indicate how to assemble
// the target specific information into the 32 bits available.
@@ -229,6 +227,16 @@
bit isLittleEndianEncoding = 0;
}
+// Standard Instructions.
+def PHI : Instruction {
+ let OperandList = (ops variable_ops);
+ let AsmString = "PHINODE";
+}
+def INLINEASM : Instruction {
+ let OperandList = (ops variable_ops);
+ let AsmString = "";
+}
+
//===--===//
// AsmWriter - This class can be implemented by targets that need to customize
// the format of the .s file writer.
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/SparcV9/SparcV9.td SparcV9InstrInfo.td
Changes in directory llvm/lib/Target/SparcV9:
SparcV9.td updated: 1.37 -> 1.38
SparcV9InstrInfo.td updated: 1.1 -> 1.2
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+0 -5)
SparcV9.td |2 --
SparcV9InstrInfo.td |3 ---
2 files changed, 5 deletions(-)
Index: llvm/lib/Target/SparcV9/SparcV9.td
diff -u llvm/lib/Target/SparcV9/SparcV9.td:1.37
llvm/lib/Target/SparcV9/SparcV9.td:1.38
--- llvm/lib/Target/SparcV9/SparcV9.td:1.37 Tue Aug 10 13:15:31 2004
+++ llvm/lib/Target/SparcV9/SparcV9.td Thu Jan 26 19:46:15 2006
@@ -31,8 +31,6 @@
include "SparcV9InstrInfo.td"
def SparcV9InstrInfo : InstrInfo {
- let PHIInst = PHI;
-
// Define how we want to layout our TargetSpecific information field.
let TSFlagsFields = [];
let TSFlagsShifts = [];
Index: llvm/lib/Target/SparcV9/SparcV9InstrInfo.td
diff -u llvm/lib/Target/SparcV9/SparcV9InstrInfo.td:1.1
llvm/lib/Target/SparcV9/SparcV9InstrInfo.td:1.2
--- llvm/lib/Target/SparcV9/SparcV9InstrInfo.td:1.1 Tue Aug 10 13:15:31 2004
+++ llvm/lib/Target/SparcV9/SparcV9InstrInfo.td Thu Jan 26 19:46:15 2006
@@ -38,9 +38,6 @@
// Instruction list
//===--===//
-// Pseudo-instructions
-def PHI : Pseudo<"phi">;
-
// Section A.2: Add - p137
def ADDr: F3_1<2, 0b00, "add">; // addrs1, rs2, rd
def ADDi: F3_2<2, 0b00, "add">; // addrs1, imm, rd
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Skeleton/Skeleton.td SkeletonInstrInfo.td
Changes in directory llvm/lib/Target/Skeleton:
Skeleton.td updated: 1.3 -> 1.4
SkeletonInstrInfo.td updated: 1.3 -> 1.4
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+1 -4)
Skeleton.td |4 +---
SkeletonInstrInfo.td |1 -
2 files changed, 1 insertion(+), 4 deletions(-)
Index: llvm/lib/Target/Skeleton/Skeleton.td
diff -u llvm/lib/Target/Skeleton/Skeleton.td:1.3
llvm/lib/Target/Skeleton/Skeleton.td:1.4
--- llvm/lib/Target/Skeleton/Skeleton.td:1.3Fri Sep 30 01:43:58 2005
+++ llvm/lib/Target/Skeleton/Skeleton.tdThu Jan 26 19:46:15 2006
@@ -21,9 +21,7 @@
include "SkeletonRegisterInfo.td"
include "SkeletonInstrInfo.td"
-def SkeletonInstrInfo : InstrInfo {
- let PHIInst = PHI;
-}
+def SkeletonInstrInfo : InstrInfo { }
def Skeleton : Target {
// Pointers are 32-bits in size.
Index: llvm/lib/Target/Skeleton/SkeletonInstrInfo.td
diff -u llvm/lib/Target/Skeleton/SkeletonInstrInfo.td:1.3
llvm/lib/Target/Skeleton/SkeletonInstrInfo.td:1.4
--- llvm/lib/Target/Skeleton/SkeletonInstrInfo.td:1.3 Tue Sep 21 12:30:54 2004
+++ llvm/lib/Target/Skeleton/SkeletonInstrInfo.td Thu Jan 26 19:46:15 2006
@@ -32,7 +32,6 @@
}
// Pseudo-instructions:
-def PHI : SkelInst<"PHI", 0, (ops), Pseudo>; // PHI node...
def NOP : SkelInst<"NOP", 0, (ops), Pseudo>; // No-op
def ADJCALLSTACKDOWN : SkelInst<"ADJCALLSTACKDOWN", 0, (ops), Pseudo>;
def ADJCALLSTACKUP : SkelInst<"ADJCALLSTACKUP", 0, (ops), Pseudo>;
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8.td SparcV8InstrInfo.td
Changes in directory llvm/lib/Target/SparcV8:
SparcV8.td updated: 1.8 -> 1.9
SparcV8InstrInfo.td updated: 1.103 -> 1.104
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+0 -3)
SparcV8.td |2 --
SparcV8InstrInfo.td |1 -
2 files changed, 3 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8.td
diff -u llvm/lib/Target/SparcV8/SparcV8.td:1.8
llvm/lib/Target/SparcV8/SparcV8.td:1.9
--- llvm/lib/Target/SparcV8/SparcV8.td:1.8 Thu Jan 26 01:22:22 2006
+++ llvm/lib/Target/SparcV8/SparcV8.td Thu Jan 26 19:46:15 2006
@@ -43,8 +43,6 @@
include "SparcV8InstrInfo.td"
def SparcV8InstrInfo : InstrInfo {
- let PHIInst = PHI;
-
// Define how we want to layout our target-specific information field.
let TSFlagsFields = [];
let TSFlagsShifts = [];
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.103
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.104
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.103 Sun Jan 15 03:26:27 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Thu Jan 26 19:46:15 2006
@@ -107,7 +107,6 @@
class Pseudo pattern>
: InstV8;
-def PHI : Pseudo<(ops variable_ops), "PHI", []>;
def ADJCALLSTACKDOWN : Pseudo<(ops i32imm:$amt),
"!ADJCALLSTACKDOWN $amt",
[(callseq_start imm:$amt)]>;
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrFormats.td PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrFormats.td updated: 1.63 -> 1.64
PPCInstrInfo.td updated: 1.174 -> 1.175
---
Log message:
PHI and INLINEASM are now built-in instructions provided by Target.td
---
Diffs of the changes: (+1 -5)
PPCInstrFormats.td |3 +--
PPCInstrInfo.td|3 ---
2 files changed, 1 insertion(+), 5 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td
diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.63
llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.64
--- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.63 Mon Dec 19 18:26:01 2005
+++ llvm/lib/Target/PowerPC/PPCInstrFormats.td Thu Jan 26 19:46:15 2006
@@ -644,9 +644,8 @@
}
//===--===//
-def NoItin : InstrItinClass;
class Pseudo pattern>
-: I<0, OL, asmstr, NoItin> {
+: I<0, OL, asmstr, NoItinerary> {
let PPC64 = 0;
let VMX = 0;
let Pattern = pattern;
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.174
llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.175
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.174 Wed Jan 11 20:05:36 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Thu Jan 26 19:46:15 2006
@@ -194,7 +194,6 @@
// PowerPC Instruction Definitions.
// Pseudo-instructions:
-def PHI : Pseudo<(ops variable_ops), "; PHI", []>;
let isLoad = 1, hasCtrlDep = 1 in {
def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt),
@@ -1087,8 +1086,6 @@
// PowerPCInstrInfo Definition
//
def PowerPCInstrInfo : InstrInfo {
- let PHIInst = PHI;
-
let TSFlagsFields = [ "VMX", "PPC64" ];
let TSFlagsShifts = [ 0, 1 ];
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/AsmPrinter.h
Changes in directory llvm/include/llvm/CodeGen: AsmPrinter.h updated: 1.25 -> 1.26 --- Log message: add a method --- Diffs of the changes: (+3 -0) AsmPrinter.h |3 +++ 1 files changed, 3 insertions(+) Index: llvm/include/llvm/CodeGen/AsmPrinter.h diff -u llvm/include/llvm/CodeGen/AsmPrinter.h:1.25 llvm/include/llvm/CodeGen/AsmPrinter.h:1.26 --- llvm/include/llvm/CodeGen/AsmPrinter.h:1.25 Wed Jan 4 16:28:25 2006 +++ llvm/include/llvm/CodeGen/AsmPrinter.h Thu Jan 26 20:09:16 2006 @@ -230,6 +230,9 @@ /// void EmitGlobalConstant(const Constant* CV); +/// printInlineAsm - This method formats and prints the specified machine +/// instruction that is an inline asm. +void printInlineAsm(const MachineInstr *MI) const; private: void EmitXXStructorList(Constant *List); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.40 -> 1.41
---
Log message:
Stub out a method
---
Diffs of the changes: (+6 -0)
AsmPrinter.cpp |6 ++
1 files changed, 6 insertions(+)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.40
llvm/lib/CodeGen/AsmPrinter.cpp:1.41
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.40Thu Jan 26 14:21:46 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp Thu Jan 26 20:10:10 2006
@@ -452,3 +452,9 @@
EmitConstantValueOnly(CV);
O << "\n";
}
+
+/// printInlineAsm - This method formats and prints the specified machine
+/// instruction that is an inline asm.
+void AsmPrinter::printInlineAsm(const MachineInstr *MI) const {
+ O << "INLINE ASM NOT EMITTED YET!\n";
+}
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/AsmWriterEmitter.cpp
Changes in directory llvm/utils/TableGen:
AsmWriterEmitter.cpp updated: 1.23 -> 1.24
---
Log message:
Use printInlineAsm to, well, print inline asm's.
---
Diffs of the changes: (+7 -4)
AsmWriterEmitter.cpp | 11 +++
1 files changed, 7 insertions(+), 4 deletions(-)
Index: llvm/utils/TableGen/AsmWriterEmitter.cpp
diff -u llvm/utils/TableGen/AsmWriterEmitter.cpp:1.23
llvm/utils/TableGen/AsmWriterEmitter.cpp:1.24
--- llvm/utils/TableGen/AsmWriterEmitter.cpp:1.23 Wed Nov 30 12:54:35 2005
+++ llvm/utils/TableGen/AsmWriterEmitter.cppThu Jan 26 20:10:50 2006
@@ -345,6 +345,9 @@
break;
}
+ std::vector NumberedInstructions;
+ Target.getInstructionsByEnumValue(NumberedInstructions);
+
if (AllStartWithString) {
// Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
// all machine instructions are necessarily being printed, so there may be
@@ -354,9 +357,6 @@
CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i]));
// Emit a table of constant strings.
-std::vector NumberedInstructions;
-Target.getInstructionsByEnumValue(NumberedInstructions);
-
O << " static const char * const OpStrs[] = {\n";
for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions[i]];
@@ -380,8 +380,11 @@
// elements in the vector.
std::reverse(Instructions.begin(), Instructions.end());
+ // Find the opcode # of inline asm
O << " switch (MI->getOpcode()) {\n"
- " default: return false;\n";
+ " default: return false;\n"
+ " case " << NumberedInstructions.back()->Namespace
+<< "::INLINEASM: printInlineAsm(MI); break;\n";
while (!Instructions.empty())
EmitInstructions(Instructions, O);
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
