[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp IA64ISelLowering.cpp

2006-01-20 Thread Duraid Madina


Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.26 -> 1.27
IA64ISelLowering.cpp updated: 1.23 -> 1.24
---
Log message:


fix sext breakage: now we correctly deal with functions that return
int vs uint



---
Diffs of the changes:  (+5 -1)

 IA64ISelDAGToDAG.cpp |2 +-
 IA64ISelLowering.cpp |4 
 2 files changed, 5 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.26 
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.27
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.26  Thu Jan 19 21:40:25 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp   Fri Jan 20 10:10:05 2006
@@ -494,7 +494,7 @@
 */
 
   case ISD::LOAD:
-  case ISD::EXTLOAD:
+  case ISD::EXTLOAD: // FIXME: load -1, not 1, for bools?
   case ISD::ZEXTLOAD: {
 SDOperand Chain = Select(N->getOperand(0));
 SDOperand Address = Select(N->getOperand(1));


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.23 
llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.24
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.23  Thu Jan 19 02:31:51 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp   Fri Jan 20 10:10:05 2006
@@ -475,6 +475,8 @@
 switch (RetTyVT) {
 default: assert(0 && "Unknown value type to return!");
 case MVT::i1: { // bools are just like other integers (returned in r8)
+  // we *could* fall through to the truncate below, but this saves a
+  // few redundant predicate ops
   SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, 
InFlag);
   InFlag = boolInR8.getValue(2);
   Chain = boolInR8.getValue(1);
@@ -492,8 +494,10 @@
   Chain = RetVal.getValue(1);
   
   // keep track of whether it is sign or zero extended (todo: bools?)
+/* XXX
   RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext 
:ISD::AssertZext,
MVT::i64, RetVal, DAG.getValueType(RetTyVT));
+*/
   RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
   break;
 case MVT::i64:



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[llvm-commits] CVS: llvm/lib/VMCore/AutoUpgrade.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/VMCore:

AutoUpgrade.cpp updated: 1.4 -> 1.5
---
Log message:

Don't use invalidated use_iterator's.  This fixes a crash compiling povray


---
Diffs of the changes:  (+2 -2)

 AutoUpgrade.cpp |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/VMCore/AutoUpgrade.cpp
diff -u llvm/lib/VMCore/AutoUpgrade.cpp:1.4 llvm/lib/VMCore/AutoUpgrade.cpp:1.5
--- llvm/lib/VMCore/AutoUpgrade.cpp:1.4 Thu Jan 19 01:00:29 2006
+++ llvm/lib/VMCore/AutoUpgrade.cpp Fri Jan 20 12:01:41 2006
@@ -166,8 +166,8 @@
 bool llvm::UpgradeCallsToIntrinsic(Function* F) {
   if (Function* newF = UpgradeIntrinsicFunction(F)) {
 for (Value::use_iterator UI = F->use_begin(), UE = F->use_end();
- UI != UE; ++UI) {
-  if (CallInst* CI = dyn_cast(*UI)) {
+ UI != UE; UI) {
+  if (CallInst* CI = dyn_cast(*UI++)) {
 std::vector Oprnds;
 User::op_iterator OI = CI->op_begin();
 ++OI;



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[llvm-commits] CVS: llvm/lib/VMCore/AutoUpgrade.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/VMCore:

AutoUpgrade.cpp updated: 1.5 -> 1.6
---
Log message:

Remove dead expression.


---
Diffs of the changes:  (+1 -1)

 AutoUpgrade.cpp |2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/VMCore/AutoUpgrade.cpp
diff -u llvm/lib/VMCore/AutoUpgrade.cpp:1.5 llvm/lib/VMCore/AutoUpgrade.cpp:1.6
--- llvm/lib/VMCore/AutoUpgrade.cpp:1.5 Fri Jan 20 12:01:41 2006
+++ llvm/lib/VMCore/AutoUpgrade.cpp Fri Jan 20 12:04:43 2006
@@ -166,7 +166,7 @@
 bool llvm::UpgradeCallsToIntrinsic(Function* F) {
   if (Function* newF = UpgradeIntrinsicFunction(F)) {
 for (Value::use_iterator UI = F->use_begin(), UE = F->use_end();
- UI != UE; UI) {
+ UI != UE; ) {
   if (CallInst* CI = dyn_cast(*UI++)) {
 std::vector Oprnds;
 User::op_iterator OI = CI->op_begin();



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[llvm-commits] CVS: llvm/lib/ExecutionEngine/ExecutionEngine.cpp

2006-01-20 Thread Robert L. Bocchino Jr.


Changes in directory llvm/lib/ExecutionEngine:

ExecutionEngine.cpp updated: 1.72 -> 1.73
---
Log message:

Fixed InitializeMemory to handle ConstantPacked.



---
Diffs of the changes:  (+6 -0)

 ExecutionEngine.cpp |6 ++
 1 files changed, 6 insertions(+)


Index: llvm/lib/ExecutionEngine/ExecutionEngine.cpp
diff -u llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.72 
llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.73
--- llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.72   Sun Oct 23 18:54:56 2005
+++ llvm/lib/ExecutionEngine/ExecutionEngine.cppFri Jan 20 12:18:40 2006
@@ -457,6 +457,12 @@
 void ExecutionEngine::InitializeMemory(const Constant *Init, void *Addr) {
   if (isa(Init)) {
 return;
+  } else if (const ConstantPacked *CP = dyn_cast(Init)) {
+unsigned ElementSize =
+  getTargetData().getTypeSize(CP->getType()->getElementType());
+for (unsigned i = 0, e = CP->getNumOperands(); i != e; ++i)
+  InitializeMemory(CP->getOperand(i), (char*)Addr+i*ElementSize);
+return;
   } else if (Init->getType()->isFirstClassType()) {
 GenericValue Val = getConstantValue(Init);
 StoreValueToMemory(Val, (GenericValue*)Addr, Init->getType());



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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAGISel.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.271 -> 1.272
SelectionDAGISel.cpp updated: 1.128 -> 1.129
---
Log message:

If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep
code, so that the LowerReturn code doesn't have to handle it.


---
Diffs of the changes:  (+7 -2)

 LegalizeDAG.cpp  |5 +++--
 SelectionDAGISel.cpp |4 
 2 files changed, 7 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.271 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.272
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.271 Wed Jan 18 22:54:52 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp   Fri Jan 20 12:38:32 2006
@@ -3377,7 +3377,8 @@
 /// Found.
 static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found,
std::set &Visited) {
-  if (Node->getNodeDepth() <= Found->getNodeDepth() ||
+  if (/*Node->getNodeDepth() <= Found->getNodeDepth() ||*/
+  Node->getNumOperands() == 0 ||
   !Visited.insert(Node).second) return;
   
   // If we found an CALLSEQ_START, we already know this node occurs later
@@ -3404,7 +3405,7 @@
 /// than Found.
 static void FindEarliestCallSeqEnd(SDNode *Node, SDNode *&Found,
std::set &Visited) {
-  if ((Found && Node->getNodeDepth() >= Found->getNodeDepth()) ||
+  if (/*(Found && Node->getNodeDepth() >= Found->getNodeDepth()) ||*/
   !Visited.insert(Node).second) return;
 
   // If we found an CALLSEQ_END, we already know this node occurs earlier


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.128 
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.129
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.128Wed Jan 18 
15:50:14 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp  Fri Jan 20 12:38:32 2006
@@ -490,6 +490,10 @@
   Op1 = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, Op1);
 break;
   case MVT::f32:
+// If this is a machine where f32 is promoted to f64, do so now.
+if (TLI.getTypeAction(MVT::f32) == TargetLowering::Promote)
+  Op1 = DAG.getNode(ISD::FP_EXTEND, 
TLI.getTypeToTransformTo(MVT::f32),Op1);
+break;
   case MVT::i64:
   case MVT::f64:
 break; // No extension needed!



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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.272 -> 1.273
---
Log message:

remove some unintentionally committed code


---
Diffs of the changes:  (+2 -3)

 LegalizeDAG.cpp |5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.272 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.273
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.272 Fri Jan 20 12:38:32 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp   Fri Jan 20 12:40:10 2006
@@ -3377,8 +3377,7 @@
 /// Found.
 static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found,
std::set &Visited) {
-  if (/*Node->getNodeDepth() <= Found->getNodeDepth() ||*/
-  Node->getNumOperands() == 0 ||
+  if (Node->getNodeDepth() <= Found->getNodeDepth() ||
   !Visited.insert(Node).second) return;
   
   // If we found an CALLSEQ_START, we already know this node occurs later
@@ -3405,7 +3404,7 @@
 /// than Found.
 static void FindEarliestCallSeqEnd(SDNode *Node, SDNode *&Found,
std::set &Visited) {
-  if (/*(Found && Node->getNodeDepth() >= Found->getNodeDepth()) ||*/
+  if ((Found && Node->getNodeDepth() >= Found->getNodeDepth()) ||
   !Visited.insert(Node).second) return;
 
   // If we found an CALLSEQ_END, we already know this node occurs earlier



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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.51 -> 1.52
---
Log message:

LowerReturn now doesn't have to handle f32 returns.


---
Diffs of the changes:  (+0 -2)

 X86ISelLowering.cpp |2 --
 1 files changed, 2 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.51 
llvm/lib/Target/X86/X86ISelLowering.cpp:1.52
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.51Thu Jan 19 02:52:46 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Jan 20 12:41:25 2006
@@ -283,8 +283,6 @@
 case MVT::f32:
 case MVT::f64:
   if (!X86ScalarSSE) {
-if (OpVT == MVT::f32)
-  Op = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Op);
 std::vector Tys;
 Tys.push_back(MVT::Other);
 Tys.push_back(MVT::Flag);



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[llvm-commits] CVS: llvm/lib/Target/CBackend/Writer.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/Target/CBackend:

Writer.cpp updated: 1.250 -> 1.251
---
Log message:

Simplify CWriter::printContainedStructs, also allowing it to work with 
PackedTypes as a side-effect.


---
Diffs of the changes:  (+11 -18)

 Writer.cpp |   29 +++--
 1 files changed, 11 insertions(+), 18 deletions(-)


Index: llvm/lib/Target/CBackend/Writer.cpp
diff -u llvm/lib/Target/CBackend/Writer.cpp:1.250 
llvm/lib/Target/CBackend/Writer.cpp:1.251
--- llvm/lib/Target/CBackend/Writer.cpp:1.250   Tue Dec 27 04:40:34 2005
+++ llvm/lib/Target/CBackend/Writer.cpp Fri Jan 20 12:57:03 2006
@@ -1037,29 +1037,22 @@
 // this one depends on.
 void CWriter::printContainedStructs(const Type *Ty,
 std::set 
&StructPrinted){
+  // Don't walk through pointers.
+  if (isa(Ty) || Ty->isPrimitiveType()) return;
+  
+  // Print all contained types first.
+  for (Type::subtype_iterator I = Ty->subtype_begin(),
+   E = Ty->subtype_end(); I != E; ++I)
+printContainedStructs(*I, StructPrinted);
+  
   if (const StructType *STy = dyn_cast(Ty)) {
-//Check to see if we have already printed this struct
-if (StructPrinted.count(STy) == 0) {
-  // Print all contained types first...
-  for (StructType::element_iterator I = STy->element_begin(),
- E = STy->element_end(); I != E; ++I) {
-const Type *Ty1 = I->get();
-if (isa(Ty1) || isa(Ty1))
-  printContainedStructs(*I, StructPrinted);
-  }
-
-  //Print structure type out..
-  StructPrinted.insert(STy);
+// Check to see if we have already printed this struct.
+if (StructPrinted.insert(STy).second) {
+  // Print structure type out.
   std::string Name = TypeNames[STy];
   printType(Out, STy, Name, true);
   Out << ";\n\n";
 }
-
-// If it is an array, check contained types and continue
-  } else if (const ArrayType *ATy = dyn_cast(Ty)){
-const Type *Ty1 = ATy->getElementType();
-if (isa(Ty1) || isa(Ty1))
-  printContainedStructs(Ty1, StructPrinted);
   }
 }
 



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[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h

2006-01-20 Thread Jim Laskey


Changes in directory llvm/include/llvm/CodeGen:

DwarfWriter.h updated: 1.11 -> 1.12
---
Log message:

Reworked how Dwarf debug info entries and abbreviations are handled.  Added
pubnames and debuy str sections.


---
Diffs of the changes:  (+235 -90)

 DwarfWriter.h |  325 +-
 1 files changed, 235 insertions(+), 90 deletions(-)


Index: llvm/include/llvm/CodeGen/DwarfWriter.h
diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.11 
llvm/include/llvm/CodeGen/DwarfWriter.h:1.12
--- llvm/include/llvm/CodeGen/DwarfWriter.h:1.11Wed Jan 18 10:54:26 2006
+++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 20 14:34:06 2006
@@ -438,6 +438,15 @@
   };
   
   
//======//
+  // Forward declarations.
+  //
+  class AsmPrinter;
+  class DIE;
+  class DwarfWriter; 
+  class DWContext;
+  class MachineDebugInfo;
+  
+  
//======//
   // DWLabel - Labels are used to track locations in the assembler file.
   // Labels appear in the form debug_, where the tag is a
   // category of label (Ex. location) and number is a value unique in that
@@ -445,57 +454,89 @@
   struct DWLabel {
 const char *Tag;// Label category tag. Should always be
 // a staticly declared C string.
-unsignedNumber; // Unique number
+unsignedNumber; // Unique number.
 
-DWLabel() : Tag(NULL), Number(0) {}
 DWLabel(const char *T, unsigned N) : Tag(T), Number(N) {}
   };
-
+  
+  
//======//
+  // DIEAbbrevData - Dwarf abbreviation data, describes the one attribute of a
+  // Dwarf abbreviation.
+  class DIEAbbrevData {
+  private:
+unsigned Attribute; // Dwarf attribute code.
+unsigned Form;  // Dwarf form code.
+
+  public:
+DIEAbbrevData(unsigned A, unsigned F)
+: Attribute(A)
+, Form(F)
+{}
+
+// Accessors
+unsigned getAttribute() const { return Attribute; }
+unsigned getForm()  const { return Form; }
+  };
+  
   
//======//
   // DIEAbbrev - Dwarf abbreviation, describes the organization of a debug
   // information object.
-  //
   class DIEAbbrev {
   private:
-const unsigned char *Data;  // Static array of bytes containing the
-// image of the raw abbreviation data.
+unsigned Tag;   // Dwarf tag code.
+unsigned ChildrenFlag;  // Dwarf children flag.
+std::vector Data;// Raw data bytes for abbreviation.
 
   public:
   
-DIEAbbrev(const unsigned char *D)
-: Data(D)
+DIEAbbrev(unsigned T, unsigned C)
+: Tag(T)
+, ChildrenFlag(C)
+, Data()
 {}
+~DIEAbbrev() {}
 
+// Accessors
+unsigned getTag()   const { return Tag; }
+unsigned getChildrenFlag()  const { return ChildrenFlag; }
+const std::vector &getData() const { return Data; }
+
 /// operator== - Used by UniqueVector to locate entry.
 ///
-bool operator==(const DIEAbbrev &DA) const {
-  return Data == DA.Data;
-}
+bool operator==(const DIEAbbrev &DA) const;
 
 /// operator< - Used by UniqueVector to locate entry.
 ///
-bool operator<(const DIEAbbrev &DA) const {
-  return Data < DA.Data;
-}
+bool operator<(const DIEAbbrev &DA) const;
 
-// Accessors
-unsigned getTag() const { return Data[0]; }
-unsigned getChildrenFlag()const { return Data[1]; }
-unsigned getAttribute(unsigned i) const { return Data[2 + 2 * i + 0]; }
-unsigned getForm(unsigned i)  const { return Data[2 + 2 * i + 1]; }
+/// AddAttribute - Adds another set of attribute information to the
+/// abbreviation.
+void AddAttribute(unsigned Attribute, unsigned Form) {
+  Data.push_back(DIEAbbrevData(Attribute, Form));
+}
+
+/// Emit - Print the abbreviation using the specified Dwarf writer.
+///
+void Emit(const DwarfWriter &DW) const; 
+
+#ifndef NDEBUG
+void print(std::ostream &O);
+void dump();
+#endif
   };
 
   
//======//
   // DIEValue - A debug information entry value.
   //
-  class DwarfWriter; 
   class DIEValue {
   public:
 enum {
   isInteger,
   isString,
   isLabel,
-  isDelta
+  isAsIsLabel,
+  isDelta,
+  isEntry
 };
 
 unsigned Type;  // Type of the value
@@ -520,14 +561,14 @@
   // 
   class DIEInteger : public DIEValue {
   private:
-int Value;
+int Integer;
 
   public:
-DIEInteger(int V) : DIEValue(isIntege

[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp

2006-01-20 Thread Jim Laskey


Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.8 -> 1.9
---
Log message:

Reworked how Dwarf debug info entries and abbreviations are handled.  Added
pubnames and debuy str sections.


---
Diffs of the changes:  (+425 -161)

 DwarfWriter.cpp |  586 
 1 files changed, 425 insertions(+), 161 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.8 
llvm/lib/CodeGen/DwarfWriter.cpp:1.9
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.8Wed Jan 18 10:54:26 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppFri Jan 20 14:34:06 2006
@@ -27,84 +27,6 @@
 cl::desc("Add comments to Dwarf directives."));
 
 
//===--===//
-// Dwarf abbreviations used by this emitter.
-//
-
-static const unsigned char AbbrevTAG_compile_unit[] = {
-  DW_TAG_compile_unit, DW_CHILDREN_yes,
-  DW_AT_stmt_list, DW_FORM_data4,
-  DW_AT_high_pc,   DW_FORM_addr,
-  DW_AT_low_pc,DW_FORM_addr,
-  DW_AT_producer,  DW_FORM_string,
-  DW_AT_language,  DW_FORM_data1,
-  DW_AT_name,  DW_FORM_string,
-  DW_AT_comp_dir,  DW_FORM_string,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_subprogram[] = {
-  DW_TAG_subprogram,   DW_CHILDREN_yes,
-  DW_AT_sibling,   DW_FORM_ref4,
-  DW_AT_external,  DW_FORM_flag,
-  DW_AT_name,  DW_FORM_string,
-  DW_AT_decl_file, DW_FORM_data1,
-  DW_AT_decl_line, DW_FORM_data1,
-  DW_AT_prototyped,DW_FORM_flag,
-  DW_AT_type,  DW_FORM_ref4,
-  DW_AT_low_pc,DW_FORM_addr,
-  DW_AT_high_pc,   DW_FORM_addr,
-  DW_AT_frame_base,DW_FORM_block1,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_formal_parameter[] = {
-  DW_TAG_formal_parameter, DW_CHILDREN_no,
-  DW_AT_name,  DW_FORM_string,
-  DW_AT_decl_file, DW_FORM_data1,
-  DW_AT_decl_line, DW_FORM_data1,
-  DW_AT_type,  DW_FORM_ref4,
-  DW_AT_location,  DW_FORM_block1,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_base_type[] = {
-  DW_TAG_base_type,DW_CHILDREN_no,
-  DW_AT_name,  DW_FORM_string,
-  DW_AT_byte_size, DW_FORM_data1,
-  DW_AT_encoding,  DW_FORM_data1,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_pointer_type[] = {
-  DW_TAG_pointer_type, DW_CHILDREN_no,
-  DW_AT_byte_size, DW_FORM_data1,
-  DW_AT_type,  DW_FORM_ref4,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_array_type[] = {
-  DW_TAG_array_type,   DW_CHILDREN_yes,
-  DW_AT_sibling,   DW_FORM_ref4,
-  DW_AT_type,  DW_FORM_ref4,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_subrange_type[] = {
-  DW_TAG_subrange_type,DW_CHILDREN_no,
-  0,   0
-};
-  
-static const unsigned char AbbrevTAG_variable[] = {
-  DW_TAG_variable, DW_CHILDREN_no,
-  DW_AT_name,  DW_FORM_string,
-  DW_AT_type,  DW_FORM_ref4,
-  DW_AT_external,  DW_FORM_flag,
-  DW_AT_artificial,DW_FORM_flag,
-  DW_AT_declaration,   DW_FORM_flag,
-  0,   0
-};
-
-//===--===//
 
 /// TagString - Return the string for the specified tag.
 ///
@@ -659,13 +581,102 @@
 
 
//===--===//
 
+/// operator== - Used by UniqueVector to locate entry.
+///
+bool DIEAbbrev::operator==(const DIEAbbrev &DA) const {
+  if (Tag != DA.Tag) return false;
+  if (ChildrenFlag != DA.ChildrenFlag) return false;
+  if (Data.size() != DA.Data.size()) return false;
+  
+  for (unsigned i = 0, N = Data.size(); i < N; i++) {
+const DIEAbbrevData &AttrData = Data[i];
+const DIEAbbrevData &DAAttrData = Data[i];
+if (AttrData.getAttribute() != DAAttrData.getAttribute()) return false;
+if (AttrData.getForm() != DAAttrData.getForm()) return false;
+  }
+  
+  return true;
+}
+
+/// operator< - Used by UniqueVector to locate entry.
+///
+bool DIEAbbrev::operator<(const DIEAbbrev &DA) const {
+  if (Tag != DA.Tag) return Tag < DA.Tag;
+  if (ChildrenFlag != DA.ChildrenFlag) return ChildrenFlag < DA.ChildrenFlag;
+  if (Data.size() != DA.Data.size()) return Data.size() < DA.Data.size();
+  
+  for (unsigned i = 0, N = Data.size(); i < N; i++) {
+const DIEAbbrevData &AttrData = Data[i];
+const DIEAbbrevData &DAAttrData = DA.Data[i];
+if (AttrData.getAttribute() != DAAttrData.getAttribute())
+  return AttrData.getAttribute() < DAAttrData.getAttribute();
+if (AttrData.getForm() != DAAttrData.getForm())
+  return AttrData.getForm() < DAAttrData.getForm();
+ 

[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp IA64ISelLowering.cpp IA64ISelLowering.h IA64InstrInfo.td

2006-01-20 Thread Duraid Madina


Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.27 -> 1.28
IA64ISelLowering.cpp updated: 1.24 -> 1.25
IA64ISelLowering.h updated: 1.4 -> 1.5
IA64InstrInfo.td updated: 1.41 -> 1.42
---
Log message:


remove RET hack, add proper support for rets (watching out for ret voids)



---
Diffs of the changes:  (+89 -56)

 IA64ISelDAGToDAG.cpp |   51 ---
 IA64ISelLowering.cpp |   66 +++
 IA64ISelLowering.h   |   16 ++--
 IA64InstrInfo.td |   12 ++---
 4 files changed, 89 insertions(+), 56 deletions(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.27 
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.28
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.27  Fri Jan 20 10:10:05 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp   Fri Jan 20 14:24:31 2006
@@ -585,57 +585,6 @@
 getI64Imm(Amt), Select(N->getOperand(0)));
   }
 
-  case ISD::RET: {
-SDOperand Chain = Select(N->getOperand(0)); // Token chain.
-SDOperand InFlag;
-
-switch (N->getNumOperands()) {
-default:
-  assert(0 && "Unknown return instruction!");
-case 2: {
-  SDOperand RetVal = Select(N->getOperand(1));
-  switch (RetVal.getValueType()) {
-  default: assert(0 && "I don't know how to return this type! (promote?)");
-   // FIXME: do I need to add support for bools here?
-   // (return '0' or '1' in r8, basically...)
-   //
-   // FIXME: need to round floats - 80 bits is bad, the tester
-   // told me so
-  case MVT::i64:
-// we mark r8 as live on exit up above in LowerArguments()
-// BuildMI(BB, IA64::MOV, 1, IA64::r8).addReg(Tmp1);
-Chain = CurDAG->getCopyToReg(Chain, IA64::r8, RetVal);
-   InFlag = Chain.getValue(1);
-   break;
-  case MVT::f64:
-// we mark F8 as live on exit up above in LowerArguments()
-// BuildMI(BB, IA64::FMOV, 1, IA64::F8).addReg(Tmp1);
-Chain = CurDAG->getCopyToReg(Chain, IA64::F8, RetVal);
-   InFlag = Chain.getValue(1);
-break;
-  }
-  break;
-  }
-case 1:
-  break;
-}
-
-// we need to copy VirtGPR (the vreg (to become a real reg)) that holds
-// the output of this function's alloc instruction back into ar.pfs
-// before we return. this copy must not float up above the last 
-// outgoing call in this function!!!
-SDOperand AR_PFSVal = CurDAG->getCopyFromReg(Chain, IA64Lowering.VirtGPR,
- MVT::i64);
-Chain = AR_PFSVal.getValue(1);
-Chain = CurDAG->getCopyToReg(Chain, IA64::AR_PFS, AR_PFSVal);
-
-// and then just emit a 'ret' instruction
-// before returning, restore the ar.pfs register (set by the 'alloc' up 
top)
-// BuildMI(BB, IA64::MOV, 
1).addReg(IA64::AR_PFS).addReg(IA64Lowering.VirtGPR);
-//
-return CurDAG->SelectNodeTo(N, IA64::RET, MVT::Other, Chain);
-  }
-  
   case ISD::BR:
 // FIXME: we don't need long branches all the time!
 return CurDAG->SelectNodeTo(N, IA64::BRL_NOTCALL, MVT::Other, 


Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.24 
llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.25
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.24  Fri Jan 20 10:10:05 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp   Fri Jan 20 14:24:31 2006
@@ -39,6 +39,11 @@
   setOperationAction(ISD::BRTWOWAY_CC  , MVT::Other, Expand);
   setOperationAction(ISD::FP_ROUND_INREG   , MVT::f32  , Expand);
 
+  // We need to handle ISD::RET for void functions ourselves,
+  // so we get a chance to restore ar.pfs before adding a
+  // br.ret insn
+  setOperationAction(ISD::RET, MVT::Other, Custom);
+
   setSetCCResultType(MVT::i1);
   setShiftAmountType(MVT::i64);
 
@@ -101,6 +106,7 @@
   default: return 0;
   case IA64ISD::GETFD:  return "IA64ISD::GETFD";
   case IA64ISD::BRCALL: return "IA64ISD::BRCALL";  
+  case IA64ISD::RET_FLAG: return "IA64ISD::RET_FLAG";
   }
 }
   
@@ -524,6 +530,44 @@
   return std::make_pair(RetVal, Chain);
 }
 
+SDOperand IA64TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
+   SelectionDAG &DAG) {
+  SDOperand Copy, InFlag;
+  SDOperand AR_PFSVal = DAG.getCopyFromReg(Chain, this->VirtGPR,
+  MVT::i64);
+  Chain = AR_PFSVal.getValue(1);
+
+  switch (Op.getValueType()) {
+  default: assert(0 && "Unknown type to return! (promote?)");
+  case MVT::i64:
+Copy = DAG.getCopyToReg(Chain, IA64::r8, Op, InFlag);
+break;
+  case MVT::f64:
+Copy = DAG.getCopyToReg(Chain, IA64::F8, Op, InFlag);
+break;
+  }
+
+  Chain = Copy.getValue(0);
+  InFlag = Copy.getValue(1);
+  // we need to copy VirtGPR (the

[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h

2006-01-20 Thread Jim Laskey


Changes in directory llvm/include/llvm/CodeGen:

DwarfWriter.h updated: 1.12 -> 1.13
---
Log message:

Right size integer values before emitting.


---
Diffs of the changes:  (+2 -1)

 DwarfWriter.h |3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/DwarfWriter.h
diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.12 
llvm/include/llvm/CodeGen/DwarfWriter.h:1.13
--- llvm/include/llvm/CodeGen/DwarfWriter.h:1.12Fri Jan 20 14:34:06 2006
+++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 20 15:02:35 2006
@@ -721,7 +721,8 @@
 
 /// AddInt - Add a simple integer attribute data and value.
 ///
-void AddInt(unsigned Attribute, unsigned Form,  int Integer);
+void AddInt(unsigned Attribute, unsigned Form,
+int Integer, bool IsSigned = false);
 
 /// AddString - Add a std::string attribute data and value.
 ///



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[llvm-commits] CVS: llvm/lib/Target/CBackend/Writer.cpp

2006-01-20 Thread Robert L. Bocchino Jr.


Changes in directory llvm/lib/Target/CBackend:

Writer.cpp updated: 1.251 -> 1.252
---
Log message:

Make the C writer work with packed types.  printContainedStructs is
still not quite right and will be fixed later.



---
Diffs of the changes:  (+49 -4)

 Writer.cpp |   53 +
 1 files changed, 49 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/CBackend/Writer.cpp
diff -u llvm/lib/Target/CBackend/Writer.cpp:1.251 
llvm/lib/Target/CBackend/Writer.cpp:1.252
--- llvm/lib/Target/CBackend/Writer.cpp:1.251   Fri Jan 20 12:57:03 2006
+++ llvm/lib/Target/CBackend/Writer.cpp Fri Jan 20 14:43:57 2006
@@ -132,6 +132,7 @@
 
 void printConstant(Constant *CPV);
 void printConstantArray(ConstantArray *CPA);
+void printConstantPacked(ConstantPacked *CP);
 
 // isInlinableInst - Attempt to inline instructions into their uses to 
build
 // trees as much as possible.  To do this, we have to consistently decide
@@ -329,7 +330,8 @@
 const PointerType *PTy = cast(Ty);
 std::string ptrName = "*" + NameSoFar;
 
-if (isa(PTy->getElementType()))
+if (isa(PTy->getElementType()) ||
+isa(PTy->getElementType()))
   ptrName = "(" + ptrName + ")";
 
 return printType(Out, PTy->getElementType(), ptrName);
@@ -343,6 +345,14 @@
  NameSoFar + "[" + utostr(NumElements) + "]");
   }
 
+  case Type::PackedTyID: {
+const PackedType *PTy = cast(Ty);
+unsigned NumElements = PTy->getNumElements();
+if (NumElements == 0) NumElements = 1;
+return printType(Out, PTy->getElementType(),
+ NameSoFar + "[" + utostr(NumElements) + "]");
+  }
+
   case Type::OpaqueTyID: {
 static int Count = 0;
 std::string TyName = "struct opaque_" + itostr(Count++);
@@ -426,6 +436,19 @@
   }
 }
 
+void CWriter::printConstantPacked(ConstantPacked *CP) {
+  Out << '{';
+  if (CP->getNumOperands()) {
+Out << ' ';
+printConstant(cast(CP->getOperand(0)));
+for (unsigned i = 1, e = CP->getNumOperands(); i != e; ++i) {
+  Out << ", ";
+  printConstant(cast(CP->getOperand(i)));
+}
+  }
+  Out << " }";
+}
+
 // isFPCSafeToPrint - Returns true if we may assume that CFP may be written out
 // textually as a double (rather than as a reference to a stack-allocated
 // variable). We decide this by converting CFP to a string and back into a
@@ -641,6 +664,25 @@
 }
 break;
 
+  case Type::PackedTyID:
+if (isa(CPV) || isa(CPV)) {
+  const PackedType *AT = cast(CPV->getType());
+  Out << '{';
+  if (AT->getNumElements()) {
+Out << ' ';
+Constant *CZ = Constant::getNullValue(AT->getElementType());
+printConstant(CZ);
+for (unsigned i = 1, e = AT->getNumElements(); i != e; ++i) {
+  Out << ", ";
+  printConstant(CZ);
+}
+  }
+  Out << " }";
+} else {
+  printConstantPacked(cast(CPV));
+}
+break;
+
   case Type::StructTyID:
 if (isa(CPV) || isa(CPV)) {
   const StructType *ST = cast(CPV->getType());
@@ -936,7 +978,8 @@
   // the compiler figure out the rest of the zeros.
   Out << " = " ;
   if (isa(I->getInitializer()->getType()) ||
-  isa(I->getInitializer()->getType())) {
+  isa(I->getInitializer()->getType()) ||
+  isa(I->getInitializer()->getType())) {
 Out << "{ 0 }";
   } else {
 // Just print it out normally.
@@ -987,7 +1030,7 @@
 
 
 /// printSymbolTable - Run through symbol table looking for type names.  If a
-/// type name is found, emit it's declaration...
+/// type name is found, emit its declaration...
 ///
 void CWriter::printModuleTypes(const SymbolTable &ST) {
   // We are only interested in the type plane of the symbol table.
@@ -1035,6 +1078,9 @@
 
 // Push the struct onto the stack and recursively push all structs
 // this one depends on.
+//
+// TODO:  Make this work properly with packed types
+//
 void CWriter::printContainedStructs(const Type *Ty,
 std::set 
&StructPrinted){
   // Don't walk through pointers.
@@ -1055,7 +1101,6 @@
 }
   }
 }
-
 
 void CWriter::printFunctionSignature(const Function *F, bool Prototype) {
   if (F->hasInternalLinkage()) Out << "static ";



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[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp

2006-01-20 Thread Jim Laskey


Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.9 -> 1.10
---
Log message:

Right size integer values before emitting.


---
Diffs of the changes:  (+24 -8)

 DwarfWriter.cpp |   32 
 1 files changed, 24 insertions(+), 8 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.9 
llvm/lib/CodeGen/DwarfWriter.cpp:1.10
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.9Fri Jan 20 14:34:06 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppFri Jan 20 15:02:36 2006
@@ -673,10 +673,12 @@
 ///
 void DIEInteger::EmitValue(const DwarfWriter &DW, unsigned Form) const {
   switch (Form) {
-  case DW_FORM_data1: // Fall thru
-  case DW_FORM_flag:  DW.EmitByte(Integer);  break;
-  case DW_FORM_data2: DW.EmitShort(Integer); break;
-  case DW_FORM_data4: DW.EmitLong(Integer);  break;
+  case DW_FORM_flag:  // Fall thru
+  case DW_FORM_data1: DW.EmitByte(Integer); break;
+  case DW_FORM_data2: DW.EmitShort(Integer);break;
+  case DW_FORM_data4: DW.EmitLong(Integer); break;
+  case DW_FORM_udata: DW.EmitULEB128Bytes(Integer); break;
+  case DW_FORM_sdata: DW.EmitSLEB128Bytes(Integer); break;
   default: assert(0 && "DIE Value form not supported yet"); break;
   }
 }
@@ -689,6 +691,8 @@
   case DW_FORM_data1: return sizeof(int8_t);
   case DW_FORM_data2: return sizeof(int16_t);
   case DW_FORM_data4: return sizeof(int32_t);
+  case DW_FORM_udata: return DW.SizeULEB128(Integer);
+  case DW_FORM_sdata: return DW.SizeSLEB128(Integer);
   default: assert(0 && "DIE Value form not supported yet"); break;
   }
   return 0;
@@ -705,7 +709,7 @@
 /// SizeOf - Determine size of string value in bytes.
 ///
 unsigned DIEString::SizeOf(const DwarfWriter &DW, unsigned Form) const {
-  return String.size() + sizeof('\0');
+  return String.size() + sizeof(char); // sizeof('\0');
 }
 
 
//===--===//
@@ -792,7 +796,18 @@
 /// AddInt - Add a simple integer attribute data and value.
 ///
 void DIE::AddInt(unsigned Attribute, unsigned Form,
- int Integer) {
+ int Integer, bool IsSigned) {
+  if (Form == 0) {
+if (IsSigned) {
+  if ((char)Integer == Integer)   Form = DW_FORM_data1;
+  else if ((short)Integer == Integer) Form = DW_FORM_data2;
+  elseForm = DW_FORM_data4;
+} else {
+  if ((unsigned char)Integer == Integer)   Form = DW_FORM_data1;
+  else if ((unsigned short)Integer == Integer) Form = DW_FORM_data2;
+  else Form = DW_FORM_data4;
+}
+  }
   Abbrev->AddAttribute(Attribute, Form);
   Values.push_back(new DIEInteger(Integer));
 }
@@ -892,10 +907,11 @@
 assert(IsExternal && "Internal variables not handled yet");
 Variable = new DIE(DW_TAG_variable, DW_CHILDREN_no);
 Variable->AddString   (DW_AT_name,  DW_FORM_string, Name);
-Variable->AddInt  (DW_AT_decl_file, DW_FORM_data1,  SourceFileID);
-Variable->AddInt  (DW_AT_decl_line, DW_FORM_data1,  Line);
+Variable->AddInt  (DW_AT_decl_file, 0,  SourceFileID);
+Variable->AddInt  (DW_AT_decl_line, 0,  Line);
 Variable->AddDIEntry  (DW_AT_type,  DW_FORM_ref4,   Type);
 Variable->AddInt  (DW_AT_external,  DW_FORM_flag,   (int)IsExternal);
+// FIXME - needs to be an expression.
 Variable->AddAsIsLabel(DW_AT_location,  DW_FORM_block1,
std::string("_")+Name+".b");
 Variable->Complete(DW);



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[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h

2006-01-20 Thread Jim Laskey


Changes in directory llvm/include/llvm/CodeGen:

DwarfWriter.h updated: 1.13 -> 1.14
---
Log message:

Correct some simple errors.


---
Diffs of the changes:  (+1 -1)

 DwarfWriter.h |2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/DwarfWriter.h
diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.13 
llvm/include/llvm/CodeGen/DwarfWriter.h:1.14
--- llvm/include/llvm/CodeGen/DwarfWriter.h:1.13Fri Jan 20 15:02:35 2006
+++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 20 18:59:54 2006
@@ -994,7 +994,7 @@
   EmitReference(Label.Tag, Label.Number);
 }
 void EmitReference(const char *Tag, unsigned Number) const;
-void EmitReference(const std::string Name) const;
+void EmitReference(const std::string &Name) const;
 
 /// EmitDifference - Emit the difference between two labels.  Some
 /// assemblers do not behave with absolute expressions with data 
directives,



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[llvm-commits] CVS: llvm/include/llvm/CodeGen/DwarfWriter.h

2006-01-20 Thread Jim Laskey


Changes in directory llvm/include/llvm/CodeGen:

DwarfWriter.h updated: 1.14 -> 1.15
---
Log message:

Simplify search for abbreviations.


---
Diffs of the changes:  (+19 -0)

 DwarfWriter.h |   19 +++
 1 files changed, 19 insertions(+)


Index: llvm/include/llvm/CodeGen/DwarfWriter.h
diff -u llvm/include/llvm/CodeGen/DwarfWriter.h:1.14 
llvm/include/llvm/CodeGen/DwarfWriter.h:1.15
--- llvm/include/llvm/CodeGen/DwarfWriter.h:1.14Fri Jan 20 18:59:54 2006
+++ llvm/include/llvm/CodeGen/DwarfWriter.h Fri Jan 20 19:13:18 2006
@@ -476,6 +476,25 @@
 // Accessors
 unsigned getAttribute() const { return Attribute; }
 unsigned getForm()  const { return Form; }
+
+/// operator== - Used by DIEAbbrev to locate entry.
+///
+bool operator==(const DIEAbbrevData &DAD) const {
+  return Attribute == DAD.Attribute && Form == DAD.Form;
+}
+
+/// operator!= - Used by DIEAbbrev to locate entry.
+///
+bool operator!=(const DIEAbbrevData &DAD) const {
+  return Attribute != DAD.Attribute || Form != DAD.Form;
+}
+
+/// operator< - Used by DIEAbbrev to locate entry.
+///
+bool operator<(const DIEAbbrevData &DAD) const {
+  return Attribute < DAD.Attribute ||
+(Attribute == DAD.Attribute && Form < DAD.Form);
+}
   };
   
   
//======//



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[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp

2006-01-20 Thread Jim Laskey


Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.10 -> 1.11
---
Log message:

Correct some simple errors.


---
Diffs of the changes:  (+2 -2)

 DwarfWriter.cpp |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.10 
llvm/lib/CodeGen/DwarfWriter.cpp:1.11
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.10   Fri Jan 20 15:02:36 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppFri Jan 20 18:59:54 2006
@@ -590,7 +590,7 @@
   
   for (unsigned i = 0, N = Data.size(); i < N; i++) {
 const DIEAbbrevData &AttrData = Data[i];
-const DIEAbbrevData &DAAttrData = Data[i];
+const DIEAbbrevData &DAAttrData = DA.Data[i];
 if (AttrData.getAttribute() != DAAttrData.getAttribute()) return false;
 if (AttrData.getForm() != DAAttrData.getForm()) return false;
   }
@@ -1110,7 +1110,7 @@
 
   PrintLabelName(Tag, Number);
 }
-void DwarfWriter::EmitReference(const std::string Name) const {
+void DwarfWriter::EmitReference(const std::string &Name) const {
   if (AddressSize == 4)
 O << Asm->Data32bitsDirective;
   else



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[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp

2006-01-20 Thread Jim Laskey


Changes in directory llvm/lib/CodeGen:

DwarfWriter.cpp updated: 1.11 -> 1.12
---
Log message:

Simplify search for abbreviations.


---
Diffs of the changes:  (+2 -10)

 DwarfWriter.cpp |   12 ++--
 1 files changed, 2 insertions(+), 10 deletions(-)


Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.11 
llvm/lib/CodeGen/DwarfWriter.cpp:1.12
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.11   Fri Jan 20 18:59:54 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppFri Jan 20 19:13:18 2006
@@ -589,10 +589,7 @@
   if (Data.size() != DA.Data.size()) return false;
   
   for (unsigned i = 0, N = Data.size(); i < N; i++) {
-const DIEAbbrevData &AttrData = Data[i];
-const DIEAbbrevData &DAAttrData = DA.Data[i];
-if (AttrData.getAttribute() != DAAttrData.getAttribute()) return false;
-if (AttrData.getForm() != DAAttrData.getForm()) return false;
+if (Data[i] != DA.Data[i]) return false;
   }
   
   return true;
@@ -606,12 +603,7 @@
   if (Data.size() != DA.Data.size()) return Data.size() < DA.Data.size();
   
   for (unsigned i = 0, N = Data.size(); i < N; i++) {
-const DIEAbbrevData &AttrData = Data[i];
-const DIEAbbrevData &DAAttrData = DA.Data[i];
-if (AttrData.getAttribute() != DAAttrData.getAttribute())
-  return AttrData.getAttribute() < DAAttrData.getAttribute();
-if (AttrData.getForm() != DAAttrData.getForm())
-  return AttrData.getForm() < DAAttrData.getForm();
+if (Data[i] != DA.Data[i]) return Data[i] < DA.Data[i];
   }
   
   return false;



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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/Target/PowerPC:

PPCAsmPrinter.cpp updated: 1.139 -> 1.140
---
Log message:

trivial formatting improvement: don't insert extra blank lines between .comm
vars.


---
Diffs of the changes:  (+1 -1)

 PPCAsmPrinter.cpp |2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.139 
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.140
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.139 Wed Jan 18 10:54:26 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp   Fri Jan 20 19:35:26 2006
@@ -517,7 +517,6 @@
 if (I->hasAppendingLinkage() && EmitSpecialLLVMGlobal(I))
   continue;
 
-O << '\n';
 std::string name = Mang->getValueName(I);
 Constant *C = I->getInitializer();
 unsigned Size = TD.getTypeSize(C->getType());
@@ -559,6 +558,7 @@
   EmitAlignment(Align, I);
   O << name << ":\t\t\t\t; '" << I->getName() << "'\n";
   EmitGlobalConstant(C);
+  O << '\n';
 }
   }
 



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[llvm-commits] CVS: llvm/include/llvm/CodeGen/ScheduleDAG.h SelectionDAGISel.h

2006-01-20 Thread Evan Cheng


Changes in directory llvm/include/llvm/CodeGen:

ScheduleDAG.h added (r1.1)
SelectionDAGISel.h updated: 1.7 -> 1.8
---
Log message:

Do some code refactoring on Jim's scheduler in preparation of the new list
scheduler.


---
Diffs of the changes:  (+289 -1)

 ScheduleDAG.h  |  288 +
 SelectionDAGISel.h |2 
 2 files changed, 289 insertions(+), 1 deletion(-)


Index: llvm/include/llvm/CodeGen/ScheduleDAG.h
diff -c /dev/null llvm/include/llvm/CodeGen/ScheduleDAG.h:1.1
*** /dev/null   Fri Jan 20 20:32:16 2006
--- llvm/include/llvm/CodeGen/ScheduleDAG.h Fri Jan 20 20:32:06 2006
***
*** 0 
--- 1,288 
+ //===--- llvm/CodeGen/ScheduleDAG.h - Common Base Class--*- C++ 
-*-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by Evan Cheng and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for 
details.
+ //
+ 
//===--===//
+ //
+ // This file implements the ScheduleDAG class, which is used as the common
+ // base class for SelectionDAG-based instruction scheduler.
+ //
+ 
//===--===//
+ 
+ #ifndef LLVM_CODEGEN_SCHEDULEDAG_H
+ #define LLVM_CODEGEN_SCHEDULEDAG_H
+ 
+ #include "llvm/CodeGen/SelectionDAG.h"
+ 
+ namespace llvm {
+   class InstrStage;
+   class MachineConstantPool;
+   class MachineDebugInfo;
+   class MachineInstr;
+   class MRegisterInfo;
+   class SelectionDAG;
+   class SSARegMap;
+   class TargetInstrInfo;
+   class TargetInstrDescriptor;
+   class TargetMachine;
+ 
+   class NodeInfo;
+   typedef NodeInfo *NodeInfoPtr;
+   typedef std::vector   NIVector;
+   typedef std::vector::iterator NIIterator;
+ 
+ 
+   
//======//
+   ///
+   /// Node group -  This struct is used to manage flagged node groups.
+   ///
+   class NodeGroup {
+   private:
+ NIVector  Members;// Group member nodes
+ NodeInfo  *Dominator; // Node with highest latency
+ unsigned  Latency;// Total latency of the group
+ int   Pending;// Number of visits pending before
+ //adding to order  
+ 
+   public:
+ // Ctor.
+ NodeGroup() : Dominator(NULL), Pending(0) {}
+   
+ // Accessors
+ inline void setDominator(NodeInfo *D) { Dominator = D; }
+ inline NodeInfo *getDominator() { return Dominator; }
+ inline void setLatency(unsigned L) { Latency = L; }
+ inline unsigned getLatency() { return Latency; }
+ inline int getPending() const { return Pending; }
+ inline void setPending(int P)  { Pending = P; }
+ inline int addPending(int I)  { return Pending += I; }
+   
+ // Pass thru
+ inline bool group_empty() { return Members.empty(); }
+ inline NIIterator group_begin() { return Members.begin(); }
+ inline NIIterator group_end() { return Members.end(); }
+ inline void group_push_back(const NodeInfoPtr &NI) {
+   Members.push_back(NI);
+ }
+ inline NIIterator group_insert(NIIterator Pos, const NodeInfoPtr &NI) {
+   return Members.insert(Pos, NI);
+ }
+ inline void group_insert(NIIterator Pos, NIIterator First,
+  NIIterator Last) {
+   Members.insert(Pos, First, Last);
+ }
+ 
+ static void Add(NodeInfo *D, NodeInfo *U);
+ static unsigned CountInternalUses(NodeInfo *D, NodeInfo *U);
+   };
+ 
+   
//======//
+   ///
+   /// NodeInfo - This struct tracks information used to schedule the a node.
+   ///
+   class NodeInfo {
+   private:
+ int   Pending;// Number of visits pending before
+ //adding to order
+   public:
+ SDNode*Node;  // DAG node
+ InstrStage*StageBegin;// First stage in itinerary
+ InstrStage*StageEnd;  // Last+1 stage in itinerary
+ unsigned  Latency;// Total cycles to complete instr
+ bool  IsCall : 1; // Is function call
+ bool  IsLoad : 1; // Is memory load
+ bool  IsStore : 1;// Is memory store
+ unsigned  Slot;   // Node's time slot
+ NodeGroup *Group; // Grouping information
+ unsigned  VRBase; // Virtual register base
+ #ifndef NDEBUG
+ unsigned  Preorder;   // Index before scheduling
+ #endif
+ 
+ // Ctor.
+ NodeInfo(SDNode *N = NULL)
+   : Pending(0)
+   , Node(N)
+   , StageBegin(NULL)
+   , StageEnd(NULL)
+   , Latency(0)
+   , IsCall(false)
+   , Slot(0)
+   , Group(NULL)
+   , VRBase(0)
+ #ifndef ND

[llvm-commits] CVS: llvm/lib/Target/X86/X86FloatingPoint.cpp X86ISelPattern.cpp X86InstrInfo.td

2006-01-20 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

X86FloatingPoint.cpp updated: 1.46 -> 1.47
X86ISelPattern.cpp updated: 1.198 -> 1.199
X86InstrInfo.td updated: 1.215 -> 1.216
---
Log message:

Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
Some assemblers can't recognize the aliases.


---
Diffs of the changes:  (+9 -9)

 X86FloatingPoint.cpp |4 ++--
 X86ISelPattern.cpp   |2 +-
 X86InstrInfo.td  |   12 ++--
 3 files changed, 9 insertions(+), 9 deletions(-)


Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.46 
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.47
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.46   Tue Jan 10 16:22:02 2006
+++ llvm/lib/Target/X86/X86FloatingPoint.cppFri Jan 20 20:55:41 2006
@@ -324,11 +324,11 @@
   { X86::FpADD32m  , X86::FADD32m  },
   { X86::FpADD64m  , X86::FADD64m  },
   { X86::FpCHS , X86::FCHS },
-  { X86::FpCMOVA   , X86::FCMOVA   },
-  { X86::FpCMOVAE  , X86::FCMOVAE  },
   { X86::FpCMOVB   , X86::FCMOVB   },
   { X86::FpCMOVBE  , X86::FCMOVBE  },
   { X86::FpCMOVE   , X86::FCMOVE   },
+  { X86::FpCMOVNB  , X86::FCMOVNB  },
+  { X86::FpCMOVNBE , X86::FCMOVNBE },
   { X86::FpCMOVNE  , X86::FCMOVNE  },
   { X86::FpCMOVNP  , X86::FCMOVNP  },
   { X86::FpCMOVP   , X86::FCMOVP   },


Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.198 
llvm/lib/Target/X86/X86ISelPattern.cpp:1.199
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.198Sun Jan 15 03:00:21 2006
+++ llvm/lib/Target/X86/X86ISelPattern.cpp  Fri Jan 20 20:55:41 2006
@@ -758,7 +758,7 @@
   static const unsigned CMOVTABFP[] = {
 X86::FpCMOVE,  X86::FpCMOVNE, /*missing*/0, /*missing*/0,
 /*missing*/0,  /*missing*/ 0, X86::FpCMOVB, X86::FpCMOVBE,
-X86::FpCMOVA,  X86::FpCMOVAE, X86::FpCMOVP, X86::FpCMOVNP
+X86::FpCMOVNBE,X86::FpCMOVNB, X86::FpCMOVP, X86::FpCMOVNP
   };
   static const int SSE_CMOVTAB[] = {
 /*CMPEQ*/   0, /*CMPNEQ*/   4, /*missing*/  0, /*missing*/  0,


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.215 
llvm/lib/Target/X86/X86InstrInfo.td:1.216
--- llvm/lib/Target/X86/X86InstrInfo.td:1.215   Thu Jan 19 19:13:30 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Fri Jan 20 20:55:41 2006
@@ -2862,10 +2862,10 @@
   def FpCMOVP  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
  [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
   X86_COND_P, STATUS))]>;
-  def FpCMOVAE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+  def FpCMOVNB : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
  [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
   X86_COND_AE, STATUS))]>;
-  def FpCMOVA  : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
+  def FpCMOVNBE: FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
  [(set RFP:$dst, (X86cmov RFP:$src1, RFP:$src2,
   X86_COND_A, STATUS))]>;
   def FpCMOVNE : FpI<(ops RFP:$dst, RFP:$src1, RFP:$src2), CondMovFP,
@@ -2884,10 +2884,10 @@
   "fcmove {$op, %ST(0)|%ST(0), $op}">, DA;
 def FCMOVP  : FPI<0xD8, AddRegFrm, (ops RST:$op),
   "fcmovu  {$op, %ST(0)|%ST(0), $op}">, DA;
-def FCMOVAE : FPI<0xC0, AddRegFrm, (ops RST:$op),
-  "fcmovae {$op, %ST(0)|%ST(0), $op}">, DB;
-def FCMOVA  : FPI<0xD0, AddRegFrm, (ops RST:$op),
-  "fcmova {$op, %ST(0)|%ST(0), $op}">, DB;
+def FCMOVNB : FPI<0xC0, AddRegFrm, (ops RST:$op),
+  "fcmovnb {$op, %ST(0)|%ST(0), $op}">, DB;
+def FCMOVNBE  : FPI<0xD0, AddRegFrm, (ops RST:$op),
+  "fcmovnbe {$op, %ST(0)|%ST(0), $op}">, DB;
 def FCMOVNE : FPI<0xC8, AddRegFrm, (ops RST:$op),
   "fcmovne {$op, %ST(0)|%ST(0), $op}">, DB;
 def FCMOVNP : FPI<0xD8, AddRegFrm, (ops RST:$op),



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[llvm-commits] CVS: llvm/test/Regression/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll

2006-01-20 Thread Chris Lattner


Changes in directory llvm/test/Regression/CodeGen/PowerPC:

2006-01-20-ShiftPartsCrash.ll added (r1.1)
---
Log message:

new testcase that crashes llc for ppc


---
Diffs of the changes:  (+17 -0)

 2006-01-20-ShiftPartsCrash.ll |   17 +
 1 files changed, 17 insertions(+)


Index: llvm/test/Regression/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
diff -c /dev/null 
llvm/test/Regression/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll:1.1
*** /dev/null   Fri Jan 20 22:25:17 2006
--- llvm/test/Regression/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll  Fri Jan 
20 22:25:07 2006
***
*** 0 
--- 1,17 
+ ; RUN: llvm-as < %s | llc
+ 
+ void %iterative_hash_host_wide_int() {
+   %zero = alloca int  ;  [#uses=2]
+   %b = alloca uint;  [#uses=1]
+   store int 0, int* %zero
+   %tmp = load int* %zero  ;  [#uses=1]
+   %tmp5 = cast int %tmp to uint   ;  [#uses=1]
+   %tmp6 = add uint %tmp5, 32  ;  [#uses=1]
+   %tmp6 = cast uint %tmp6 to int  ;  [#uses=1]
+   %tmp7 = load long* null ;  [#uses=1]
+   %tmp6 = cast int %tmp6 to ubyte ;  [#uses=1]
+   %tmp8 = shr long %tmp7, ubyte %tmp6 ;  [#uses=1]
+   %tmp8 = cast long %tmp8 to uint ;  [#uses=1]
+   store uint %tmp8, uint* %b
+   unreachable
+ }



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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

2006-01-20 Thread Chris Lattner


Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.273 -> 1.274
---
Log message:

Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll


---
Diffs of the changes:  (+15 -15)

 LegalizeDAG.cpp |   30 +++---
 1 files changed, 15 insertions(+), 15 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.273 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.274
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.273 Fri Jan 20 12:40:10 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp   Fri Jan 20 22:27:00 2006
@@ -3710,9 +3710,9 @@
   NeedsAnotherIteration = true;
 
   switch (Node->getOpcode()) {
-   case ISD::CopyFromReg:
-  assert(0 && "CopyFromReg must be legal!");
-   default:
+  case ISD::CopyFromReg:
+assert(0 && "CopyFromReg must be legal!");
+  default:
 std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
 assert(0 && "Do not know how to expand this operator!");
 abort();
@@ -4161,9 +4161,10 @@
 
   case ISD::SHL: {
 // If the target wants custom lowering, do so.
+SDOperand ShiftAmt = LegalizeOp(Node->getOperand(1));
 if (TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Custom) {
   SDOperand Op = DAG.getNode(ISD::SHL, VT, Node->getOperand(0),
- LegalizeOp(Node->getOperand(1)));
+ ShiftAmt);
   Op = TLI.LowerOperation(Op, DAG);
   if (Op.Val) {
 // Now that the custom expander is done, expand the result, which is
@@ -4174,7 +4175,7 @@
 }
 
 // If we can emit an efficient shift operation, do so now.
-if (ExpandShift(ISD::SHL, Node->getOperand(0), Node->getOperand(1), Lo, 
Hi))
+if (ExpandShift(ISD::SHL, Node->getOperand(0), ShiftAmt, Lo, Hi))
   break;
 
 // If this target supports SHL_PARTS, use it.
@@ -4182,8 +4183,7 @@
   TLI.getOperationAction(ISD::SHL_PARTS, NVT);
 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
 Action == TargetLowering::Custom) {
-  ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), 
Node->getOperand(1),
-   Lo, Hi);
+  ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0), ShiftAmt, Lo, Hi);
   break;
 }
 
@@ -4194,9 +4194,10 @@
 
   case ISD::SRA: {
 // If the target wants custom lowering, do so.
+SDOperand ShiftAmt = LegalizeOp(Node->getOperand(1));
 if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Custom) {
   SDOperand Op = DAG.getNode(ISD::SRA, VT, Node->getOperand(0),
- LegalizeOp(Node->getOperand(1)));
+ ShiftAmt);
   Op = TLI.LowerOperation(Op, DAG);
   if (Op.Val) {
 // Now that the custom expander is done, expand the result, which is
@@ -4207,7 +4208,7 @@
 }
 
 // If we can emit an efficient shift operation, do so now.
-if (ExpandShift(ISD::SRA, Node->getOperand(0), Node->getOperand(1), Lo, 
Hi))
+if (ExpandShift(ISD::SRA, Node->getOperand(0), ShiftAmt, Lo, Hi))
   break;
 
 // If this target supports SRA_PARTS, use it.
@@ -4215,8 +4216,7 @@
   TLI.getOperationAction(ISD::SRA_PARTS, NVT);
 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
 Action == TargetLowering::Custom) {
-  ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0), 
Node->getOperand(1),
-   Lo, Hi);
+  ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0), ShiftAmt, Lo, Hi);
   break;
 }
 
@@ -4227,9 +4227,10 @@
 
   case ISD::SRL: {
 // If the target wants custom lowering, do so.
+SDOperand ShiftAmt = LegalizeOp(Node->getOperand(1));
 if (TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Custom) {
   SDOperand Op = DAG.getNode(ISD::SRL, VT, Node->getOperand(0),
- LegalizeOp(Node->getOperand(1)));
+ ShiftAmt);
   Op = TLI.LowerOperation(Op, DAG);
   if (Op.Val) {
 // Now that the custom expander is done, expand the result, which is
@@ -4240,7 +4241,7 @@
 }
 
 // If we can emit an efficient shift operation, do so now.
-if (ExpandShift(ISD::SRL, Node->getOperand(0), Node->getOperand(1), Lo, 
Hi))
+if (ExpandShift(ISD::SRL, Node->getOperand(0), ShiftAmt, Lo, Hi))
   break;
 
 // If this target supports SRL_PARTS, use it.
@@ -4248,8 +4249,7 @@
   TLI.getOperationAction(ISD::SRL_PARTS, NVT);
 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
 Action == TargetLowering::Custom) {
-  ExpandShiftParts(ISD::SRL_PARTS, Node->getOperand(0), 
Node->getOperand(1),
-   Lo, Hi);
+  ExpandShiftParts(ISD::SRL_PARTS, Node->getOperand(0), ShiftAmt, Lo, Hi);
   break;
 }
 



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