[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.32 -> 1.33
X86InstrInfo.td updated: 1.199 -> 1.200
---
Log message:
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
linked together).
---
Diffs of the changes: (+4 -3)
X86ISelLowering.cpp |4 ++--
X86InstrInfo.td |3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.32
llvm/lib/Target/X86/X86ISelLowering.cpp:1.33
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.32Thu Jan 12 01:56:47 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 02:27:59 2006
@@ -161,8 +161,8 @@
if (X86ScalarSSE) {
// Set up the FP register classes.
-addRegisterClass(MVT::f32, X86::V4F4RegisterClass);
-addRegisterClass(MVT::f64, X86::V2F8RegisterClass);
+addRegisterClass(MVT::f32, X86::FR32RegisterClass);
+addRegisterClass(MVT::f64, X86::FR64RegisterClass);
// SSE has no load+extend ops
setOperationAction(ISD::EXTLOAD, MVT::f32, Expand);
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.199
llvm/lib/Target/X86/X86InstrInfo.td:1.200
--- llvm/lib/Target/X86/X86InstrInfo.td:1.199 Thu Jan 12 01:56:47 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Thu Jan 12 02:27:59 2006
@@ -74,7 +74,8 @@
[SDNPOutFlag]>;
def X86brcond : SDNode<"X86ISD::BRCOND", SDTX86BrCond,
[SDNPHasChain]>;
-def X86setcc : SDNode<"X86ISD::SETCC",SDTX86SetCC,[]>;
+def X86setcc : SDNode<"X86ISD::SETCC",SDTX86SetCC,
+[SDNPOutFlag]>;
def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret,
[SDNPHasChain, SDNPOptInFlag]>;
___
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[llvm-commits] CVS: llvm-www/OpenProjects.html
Changes in directory llvm-www: OpenProjects.html updated: 1.10 -> 1.11 --- Log message: Added link to the Elsa C++ parser and Elkhound GLR parser generator -- this could be used to implement a better C++ front-end for LLVM. --- Diffs of the changes: (+10 -4) OpenProjects.html | 14 ++ 1 files changed, 10 insertions(+), 4 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.10 llvm-www/OpenProjects.html:1.11 --- llvm-www/OpenProjects.html:1.10 Sat Oct 29 00:46:00 2005 +++ llvm-www/OpenProjects.html Thu Jan 12 09:05:17 2006 @@ -347,9 +347,15 @@ candidate. Write a new frontend for C/C++ in C++, giving us the ability to directly use LLVM C++ classes from within a compiler rather than use -C-based wrapper functions a la llvm-gcc. One possible starting point is the http://www.parashift.com/c++-faq-lite/compiler-dependencies.html#faq-38.11";>C++ -yacc grammar by Ed Willink. +C-based wrapper functions a la llvm-gcc. Possible starting points: + + http://www.cs.berkeley.edu/~smcpeak/elkhound/sources/elsa/";>Elsa + C++ parser, written in C++ and built with a Generalized LR parser + generator http://www.cs.berkeley.edu/~smcpeak/elkhound/";>Elkhound + http://www.parashift.com/c++-faq-lite/compiler-dependencies.html#faq-38.11";>C++ yacc grammar by Ed Willink + + Write a new frontend for some other language (Java? OCaml? Forth?) Write a disassembler for machine code that would use TableGen to output MachineInstrs for transformations, optimizations, etc. @@ -375,7 +381,7 @@ src="http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> http://llvm.cs.uiuc.edu";>LLVM Compiler Infrastructure - Last modified: $Date: 2005/10/29 05:46:00 $ + Last modified: $Date: 2006/01/12 15:05:17 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManagerT.h
Changes in directory llvm/lib/VMCore:
PassManagerT.h updated: 1.66 -> 1.67
---
Log message:
Patch #10 from Saem:
"Extracts a few more methods, reduces some redundancy in the code at
the same time."
---
Diffs of the changes: (+32 -52)
PassManagerT.h | 84 +
1 files changed, 32 insertions(+), 52 deletions(-)
Index: llvm/lib/VMCore/PassManagerT.h
diff -u llvm/lib/VMCore/PassManagerT.h:1.66 llvm/lib/VMCore/PassManagerT.h:1.67
--- llvm/lib/VMCore/PassManagerT.h:1.66 Wed Jan 11 10:14:49 2006
+++ llvm/lib/VMCore/PassManagerT.h Thu Jan 12 10:48:23 2006
@@ -472,33 +472,10 @@
E = RequiredSet.end(); I != E; ++I)
markPassUsed(*I, P); // Mark *I as used by P
-// Erase all analyses not in the preserved set...
-if (!AnUsage.getPreservesAll()) {
- const std::vector &PreservedSet = AnUsage.getPreservedSet();
- for (std::map::iterator I = CurrentAnalyses.begin(),
- E = CurrentAnalyses.end(); I != E; ) {
-if (std::find(PreservedSet.begin(), PreservedSet.end(), I->first) ==
-PreservedSet.end()) { // Analysis not preserved!
- CurrentAnalyses.erase(I); // Remove from available analyses
- I = CurrentAnalyses.begin();
-} else {
- ++I;
-}
- }
-}
-
-// Add this pass to the currently available set...
-if (const PassInfo *PI = P->getPassInfo()) {
- CurrentAnalyses[PI] = P;
-
- // This pass is the current implementation of all of the interfaces it
- // implements as well.
- //
- const std::vector &II = PI->getInterfacesImplemented();
- for (unsigned i = 0, e = II.size(); i != e; ++i)
-CurrentAnalyses[II[i]] = P;
-}
-
+removeNonPreservedAnalyses(AnUsage);
+
+makeCurrentlyAvailable(P);
+
// For now assume that our results are never used...
LastUseOf[P] = P;
}
@@ -632,30 +609,10 @@
// Erase all analyses not in the preserved set
removeNonPreservedAnalyses(AnUsage);
- // Add the current pass to the set of passes that have been run, and are
- // thus available to users.
- //
- if (const PassInfo *PI = P->getPassInfo()) {
-CurrentAnalyses[PI] = P;
-
-// This pass is the current implementation of all of the interfaces it
-// implements as well.
-//
-const std::vector &II =
PI->getInterfacesImplemented();
-for (unsigned i = 0, e = II.size(); i != e; ++i)
- CurrentAnalyses[II[i]] = P;
- }
-
- // Free memory for any passes that we are the last use of...
- std::vector &DeadPass = LastUserOf[P];
- for (std::vector::iterator I = DeadPass.begin(),E =
DeadPass.end();
- I != E; ++I) {
-PMDebug::PrintPassInformation(getDepth()+1, "Freeing Pass", *I, M);
-(*I)->releaseMemory();
- }
+ makeCurrentlyAvailable(P);
- // remove dead passes from the CurrentAnalyses list...
- removeDeadPasses(DeadPass);
+ // free memory and remove dead passes from the CurrentAnalyses list...
+ removeDeadPasses(P, M, LastUserOf);
}
return MadeChanges;
@@ -707,7 +664,15 @@
}
}
- inline void removeDeadPasses(std::vector &DeadPass) {
+ inline void removeDeadPasses(Pass* P, UnitType *M,
+ std::map > &LastUserOf) {
+std::vector &DeadPass = LastUserOf[P];
+for (std::vector::iterator I = DeadPass.begin(),E = DeadPass.end();
+ I != E; ++I) {
+ PMDebug::PrintPassInformation(getDepth()+1, "Freeing Pass", *I, M);
+ (*I)->releaseMemory();
+}
+
for (std::map::iterator I = CurrentAnalyses.begin();
I != CurrentAnalyses.end(); ) {
std::vector::iterator DPI = std::find(DeadPass.begin(),
@@ -720,8 +685,23 @@
}
}
}
+
+ inline void makeCurrentlyAvailable(Pass* P) {
+if (const PassInfo *PI = P->getPassInfo()) {
+ CurrentAnalyses[PI] = P;
+
+ // This pass is the current implementation of all of the interfaces it
+ // implements as well.
+ //
+ const std::vector &II = PI->getInterfacesImplemented();
+ for (unsigned i = 0, e = II.size(); i != e; ++i)
+CurrentAnalyses[II[i]] = P;
+}
+ }
};
+
+
//===--===//
// BasicBlockPassManager
//
@@ -859,7 +839,7 @@
};
//===--===//
-// PassManagerTraits Method Implementations
+// PassManager Method Implementations
//
// BasicBlockPassManager Implementations
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[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp SparcV8InstrInfo.td
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.47 -> 1.48
SparcV8InstrInfo.td updated: 1.101 -> 1.102
---
Log message:
Fix branches on FP compares
---
Diffs of the changes: (+17 -21)
SparcV8ISelDAGToDAG.cpp | 33 +++--
SparcV8InstrInfo.td |5 ++---
2 files changed, 17 insertions(+), 21 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47Thu Jan 12
01:38:04 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Thu Jan 12 11:05:32 2006
@@ -665,13 +665,7 @@
SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
} else {
- std::vector VTs;
- VTs.push_back(MVT::i32);
- VTs.push_back(MVT::Flag);
- std::vector Ops;
- Ops.push_back(LHS);
- Ops.push_back(RHS);
- SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1);
+ SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
}
}
@@ -682,18 +676,21 @@
SDOperand TrueVal = Op.getOperand(2);
SDOperand FalseVal = Op.getOperand(3);
+SDOperand CompareFlag;
unsigned Opc;
-Opc = LHS.getValueType() == MVT::i32 ? V8ISD::CMPICC : V8ISD::CMPFCC;
-std::vector VTs;
-VTs.push_back(LHS.getValueType());
-VTs.push_back(MVT::Flag);
-std::vector Ops;
-Ops.push_back(LHS);
-Ops.push_back(RHS);
-SDOperand CompareFlag = DAG.getNode(Opc, VTs, Ops).getValue(1);
-
-Opc = LHS.getValueType() == MVT::i32 ?
- V8ISD::SELECT_ICC : V8ISD::SELECT_FCC;
+if (LHS.getValueType() == MVT::i32) {
+ std::vector VTs;
+ VTs.push_back(LHS.getValueType()); // subcc returns a value
+ VTs.push_back(MVT::Flag);
+ std::vector Ops;
+ Ops.push_back(LHS);
+ Ops.push_back(RHS);
+ CompareFlag = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
+ Opc = V8ISD::SELECT_ICC;
+} else {
+ CompareFlag = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
+ Opc = V8ISD::SELECT_FCC;
+}
return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal,
DAG.getConstant(CC, MVT::i32), CompareFlag);
}
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.102
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101 Wed Jan 11 01:49:38 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Thu Jan 12 11:05:32 2006
@@ -72,9 +72,8 @@
def SDTV8ITOF :
SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>;
-def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTIntBinOp,
- [SDNPCommutative, SDNPOutFlag]>;
-def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc>;
+def V8cmpicc : SDNode<"V8ISD::CMPICC", SDTIntBinOp, [SDNPOutFlag]>;
+def V8cmpfcc : SDNode<"V8ISD::CMPFCC", SDTV8cmpfcc, [SDNPOutFlag]>;
def V8bricc : SDNode<"V8ISD::BRICC", SDTV8brcc, [SDNPHasChain]>;
def V8brfcc : SDNode<"V8ISD::BRFCC", SDTV8brcc, [SDNPHasChain]>;
___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.80 -> 1.81
---
Log message:
Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet. This fixes the 177.mesa failure on PPC.
---
Diffs of the changes: (+2 -2)
DAGCombiner.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80 Wed Jan 11 15:21:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Jan 12 12:57:33 2006
@@ -1184,7 +1184,7 @@
// check for rotl, rotr
if (N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SRL &&
N0.getOperand(0) == N1.getOperand(0) &&
- TLI.isOperationLegal(ISD::ROTL, VT)) {
+ TLI.isOperationLegal(ISD::ROTL, VT) && TLI.isTypeLegal(VT)) {
// fold (or (shl x, C1), (srl x, C2)) -> (rotl x, C1)
if (N0.getOperand(1).getOpcode() == ISD::Constant &&
N1.getOperand(1).getOpcode() == ISD::Constant) {
@@ -1206,7 +1206,7 @@
if (ConstantSDNode *SUBC =
dyn_cast(N0.getOperand(1).getOperand(0)))
if (SUBC->getValue() == OpSizeInBits) {
- if (TLI.isOperationLegal(ISD::ROTR, VT))
+ if (TLI.isOperationLegal(ISD::ROTR, VT) && TLI.isTypeLegal(VT))
return DAG.getNode(ISD::ROTR, VT, N0.getOperand(0),
N1.getOperand(1));
else
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[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.36 -> 1.37
---
Log message:
If using __main, emit global ctor/dtor list like any other global
---
Diffs of the changes: (+2 -2)
AsmPrinter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.36
llvm/lib/CodeGen/AsmPrinter.cpp:1.37
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.36Wed Jan 4 16:28:25 2006
+++ llvm/lib/CodeGen/AsmPrinter.cpp Thu Jan 12 13:17:23 2006
@@ -120,14 +120,14 @@
if (GV->getName() == "llvm.used")
return true; // No need to emit this at all.
- if (GV->getName() == "llvm.global_ctors") {
+ if (GV->getName() == "llvm.global_ctors" && GV->use_empty()) {
SwitchSection(StaticCtorsSection, 0);
EmitAlignment(2, 0);
EmitXXStructorList(GV->getInitializer());
return true;
}
- if (GV->getName() == "llvm.global_dtors") {
+ if (GV->getName() == "llvm.global_dtors" && GV->use_empty()) {
SwitchSection(StaticDtorsSection, 0);
EmitAlignment(2, 0);
EmitXXStructorList(GV->getInitializer());
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td
Changes in directory llvm/lib/Target/X86: X86InstrInfo.td updated: 1.200 -> 1.201 --- Log message: Specify transformation from GlobalAddress to TargetGlobalAddress and ExternalSymbol to TargetExternalSymbol. --- Diffs of the changes: (+2 -2) X86InstrInfo.td |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.200 llvm/lib/Target/X86/X86InstrInfo.td:1.201 --- llvm/lib/Target/X86/X86InstrInfo.td:1.200 Thu Jan 12 02:27:59 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Thu Jan 12 13:36:31 2006 @@ -2959,8 +2959,8 @@ //===--===// // GlobalAddress and ExternalSymbol -def : Pat<(i32 globaladdr:$dst), (MOV32ri globaladdr:$dst)>; -def : Pat<(i32 externalsym:$dst), (MOV32ri externalsym:$dst)>; +def : Pat<(i32 globaladdr:$dst), (MOV32ri tglobaladdr:$dst)>; +def : Pat<(i32 externalsym:$dst), (MOV32ri texternalsym:$dst)>; // Calls def : Pat<(X86call tglobaladdr:$dst), ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.132 -> 1.133
---
Log message:
Allow transformation from GlobalAddress to TargetGlobalAddress and
ExternalSymbol to TargetExternalSymbol.
---
Diffs of the changes: (+24 -13)
DAGISelEmitter.cpp | 37 -
1 files changed, 24 insertions(+), 13 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.132
llvm/utils/TableGen/DAGISelEmitter.cpp:1.133
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.132Thu Jan 12 01:54:57 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Jan 12 13:35:54 2006
@@ -1826,7 +1826,9 @@
unsigned PatternNo;
std::ostream &OS;
// Node to name mapping
- std::map VariableMap;
+ std::map VariableMap;
+ // Node to operator mapping
+ std::map OperatorMap;
// Names of all the folded nodes which produce chains.
std::vector > FoldedChains;
unsigned TmpNo;
@@ -1892,6 +1894,9 @@
<< ") goto P" << PatternNo << "Fail;\n";
return;
}
+
+ if (!N->isLeaf())
+OperatorMap[N->getName()] = N->getOperator();
}
@@ -2023,20 +2028,26 @@
OS << " SDOperand Tmp" << utostr(ResNo)
<< " = CurDAG->getTargetConstant(Tmp"
<< ResNo << "C, MVT::" << getEnumName(N->getTypeNum(0)) << ");\n";
- } else if (!N->isLeaf() && N->getOperator()->getName() == "globaladdr") {
-OS << " SDOperand Tmp" << ResNo
- << " = CurDAG->getTargetGlobalAddress(cast("
- << Val << ")->getGlobal(), MVT::" << getEnumName(N->getTypeNum(0))
- << ");\n";
- } else if (!N->isLeaf() && N->getOperator()->getName() == "externalsym")
{
-OS << " SDOperand Tmp" << ResNo
- << " = CurDAG->getTargetExternalSymbol(cast("
- << Val << ")->getSymbol(), MVT::" << getEnumName(N->getTypeNum(0))
- << ");\n";
} else if (!N->isLeaf() && N->getOperator()->getName() ==
"texternalsym"){
-OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n";
+Record *Op = OperatorMap[N->getName()];
+// Transform ExternalSymbol to TargetExternalSymbol
+if (Op && Op->getName() == "externalsym") {
+ OS << " SDOperand Tmp" << ResNo
+ << " =
CurDAG->getTargetExternalSymbol(cast("
+ << Val << ")->getSymbol(), MVT::" << getEnumName(N->getTypeNum(0))
+ << ");\n";
+} else
+ OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n";
} else if (!N->isLeaf() && N->getOperator()->getName() == "tglobaladdr")
{
-OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n";
+Record *Op = OperatorMap[N->getName()];
+// Transform GlobalAddress to TargetGlobalAddress
+if (Op && Op->getName() == "globaladdr") {
+ OS << " SDOperand Tmp" << ResNo
+ << " = CurDAG->getTargetGlobalAddress(cast("
+ << Val << ")->getGlobal(), MVT::" << getEnumName(N->getTypeNum(0))
+ << ");\n";
+} else
+ OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n";
} else if (!N->isLeaf() && N->getOperator()->getName() ==
"texternalsym"){
OS << " SDOperand Tmp" << ResNo << " = " << Val << ";\n";
} else if (!N->isLeaf() && N->getOperator()->getName() == "tconstpool") {
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[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
Changes in directory llvm-test/SingleSource/UnitTests:
2005-05-11-Popcount-ffs-fls.c updated: 1.4 -> 1.5
---
Log message:
enhance this test to pass on non-gcc 4 host compilers
---
Diffs of the changes: (+22 -1)
2005-05-11-Popcount-ffs-fls.c | 23 ++-
1 files changed, 22 insertions(+), 1 deletion(-)
Index: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
diff -u llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.4
llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5
--- llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.4 Sun May
15 16:18:45 2005
+++ llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c Thu Jan
12 13:42:26 2006
@@ -24,6 +24,12 @@
return table[x >> 26];
}
+int nlzll(unsigned long long x) {
+ if ((x >> 32) == 0)
+return nlz10b(x)+32;
+ return nlz10b(x>>32);
+}
+
int pop(unsigned x) {
x = x - ((x >> 1) & 0x);
x = (x & 0x) + ((x >> 2) & 0x);
@@ -33,6 +39,10 @@
return x >> 24;
}
+int popll(unsigned long long x) {
+ return pop(x) + pop(x >> 32);
+}
+
int ntz8(unsigned x) {
static char table[64] =
@@ -45,6 +55,17 @@
return table[x >> 26];
}
+/* Work with non-gcc compilers and GCC before 4.0 */
+#if !defined(__GNUC__) || __GNUC__ < 4
+#define __builtin_clz nlz10b
+#define __builtin_popcount pop
+#define __builtin_ctz ntz8
+#define __builtin_clzll nlzll
+#define __builtin_popcountll popll
+#define __builtin_ffsl __builtin_ffs
+#define ffsl ffs
+#endif
+
int i;
int main(void) {
long long l;
@@ -66,7 +87,7 @@
printf("LLVM: n: %lld, clz(n): %d, popcount(n): %d, ctz(n): %d\n",
l, __builtin_clzll(l), __builtin_popcountll(l), __builtin_ctz(l));
printf("REF LO BITS : n: %lld, clz(n): %d, popcount(n): %d, ctz(n): %d\n",
- l, nlz10b(l), pop(l), ntz8(l));
+ l, nlzll(l), popll(l), ntz8(l));
printf(" *** \n");
l++;
}
___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.81 -> 1.82 --- Log message: Add a simple missing fold to produce this: subfic r3, r2, 33 instead of this: subfic r2, r2, 32 addi r3, r2, 1 --- Diffs of the changes: (+8 -0) DAGCombiner.cpp |8 1 files changed, 8 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.82 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81 Thu Jan 12 12:57:33 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Jan 12 14:22:43 2006 @@ -696,6 +696,14 @@ return DAG.getNode(ISD::ADD, VT, N0.getOperand(0), DAG.getConstant(N1C->getValue()+N01C->getValue(), VT)); } + + // fold ((c1-A)+c2) -> (c1+c2)-A + if (N1C && N0.getOpcode() == ISD::SUB) +if (ConstantSDNode *N0C = dyn_cast(N0.getOperand(0))) + return DAG.getNode(ISD::SUB, VT, + DAG.getConstant(N1C->getValue()+N0C->getValue(), VT), + N0.getOperand(1)); + // fold ((0-A) + B) -> B-A if (N0.getOpcode() == ISD::SUB && isa(N0.getOperand(0)) && cast(N0.getOperand(0))->isNullValue()) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
Changes in directory llvm-test/SingleSource/UnitTests:
2005-05-11-Popcount-ffs-fls.c updated: 1.5 -> 1.6
---
Log message:
Add another case to check, eliminate a warning
---
Diffs of the changes: (+5 -4)
2005-05-11-Popcount-ffs-fls.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
diff -u llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5
llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.6
--- llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5 Thu Jan
12 13:42:26 2006
+++ llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c Thu Jan
12 16:42:40 2006
@@ -2,6 +2,7 @@
* http://www.hackersdelight.org/HDcode/nlz.cc and
* http://www.hackersdelight.org/HDcode/ntz.cc
*/
+#include
#define u 99
@@ -93,11 +94,11 @@
}
// Check some boundary and other cases for FFS call
- printf("FFS: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, i:%d, l:%d\n",
- ffs(0), ffs(1), ffs(2), ffs(7), ffs(1024), ffs(i), ffsl(l));
- printf("__builtin_ffs: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, i:%d l:%d\n",
+ printf("FFS: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, 1234:%d i:%d, l:%d\n",
+ ffs(0), ffs(1), ffs(2), ffs(7), ffs(1024), ffs(1234), ffs(i), ffsl(l));
+ printf("__builtin_ffs: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, 1234:%d i:%d l:%d\n",
__builtin_ffs(0), __builtin_ffs(1), __builtin_ffs(2), __builtin_ffs(7),
- __builtin_ffs(1024), __builtin_ffs(i), __builtin_ffsl(l));
+ __builtin_ffs(1024), __builtin_ffs(1234), __builtin_ffs(i),
__builtin_ffsl(l));
return(0);
}
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[llvm-commits] CVS: llvm/lib/Target/X86/README.txt X86ISelLowering.cpp X86ISelLowering.h X86ISelPattern.cpp X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.20 -> 1.21
X86ISelLowering.cpp updated: 1.33 -> 1.34
X86ISelLowering.h updated: 1.14 -> 1.15
X86ISelPattern.cpp updated: 1.194 -> 1.195
X86InstrInfo.td updated: 1.201 -> 1.202
---
Log message:
Fix sint_to_fp (fild*) support.
---
Diffs of the changes: (+61 -42)
README.txt | 15 ++-
X86ISelLowering.cpp | 37 +
X86ISelLowering.h | 12 ++--
X86ISelPattern.cpp |4 ++--
X86InstrInfo.td | 35 ++-
5 files changed, 61 insertions(+), 42 deletions(-)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.20 llvm/lib/Target/X86/README.txt:1.21
--- llvm/lib/Target/X86/README.txt:1.20 Sat Dec 17 00:54:43 2005
+++ llvm/lib/Target/X86/README.txt Thu Jan 12 16:54:21 2006
@@ -31,16 +31,12 @@
//===-===//
-Need to add support for rotate instructions.
-
-//===-===//
-
Some targets (e.g. athlons) prefer freep to fstp ST(0):
http://gcc.gnu.org/ml/gcc-patches/2004-04/msg00659.html
//===-===//
-This should use faddi on chips where it is profitable:
+This should use fiadd on chips where it is profitable:
double foo(double P, int *I) { return P+*I; }
//===-===//
@@ -107,3 +103,12 @@
Leave any_extend as pseudo instruction and hint to register
allocator. Delay codegen until post register allocation.
+
+//===-===//
+
+Add a target specific hook to DAG combiner to handle SINT_TO_FP and
+FP_TO_SINT when the source operand is already in memory.
+
+//===-===//
+
+Check if load folding would add a cycle in the dag.
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.33
llvm/lib/Target/X86/X86ISelLowering.cpp:1.34
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.33Thu Jan 12 02:27:59 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 16:54:21 2006
@@ -194,6 +194,11 @@
// Set up the FP register classes.
addRegisterClass(MVT::f64, X86::RFPRegisterClass);
+if (X86DAGIsel) {
+ setOperationAction(ISD::SINT_TO_FP, MVT::i16, Custom);
+ setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
+}
+
if (!UnsafeFPMath) {
setOperationAction(ISD::FSIN , MVT::f64 , Expand);
setOperationAction(ISD::FCOS , MVT::f64 , Expand);
@@ -1404,22 +1409,30 @@
}
case ISD::SINT_TO_FP: {
assert(Op.getValueType() == MVT::f64 &&
- Op.getOperand(0).getValueType() == MVT::i64 &&
+ Op.getOperand(0).getValueType() <= MVT::i64 &&
+ Op.getOperand(0).getValueType() >= MVT::i16 &&
"Unknown SINT_TO_FP to lower!");
-// We lower sint64->FP into a store to a temporary stack slot, followed by
a
-// FILD64m node.
+
+SDOperand Result;
+MVT::ValueType SrcVT = Op.getOperand(0).getValueType();
+unsigned Size = MVT::getSizeInBits(SrcVT)/8;
MachineFunction &MF = DAG.getMachineFunction();
-int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8);
+int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
-SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
- Op.getOperand(0), StackSlot, DAG.getSrcValue(NULL));
-std::vector RTs;
-RTs.push_back(MVT::f64);
-RTs.push_back(MVT::Other);
+SDOperand Chain = DAG.getNode(ISD::STORE, MVT::Other,
+ DAG.getEntryNode(), Op.getOperand(0),
+ StackSlot, DAG.getSrcValue(NULL));
+
+// Build the FILD
+std::vector Tys;
+Tys.push_back(MVT::f64);
+Tys.push_back(MVT::Flag);
std::vector Ops;
-Ops.push_back(Store);
+Ops.push_back(Chain);
Ops.push_back(StackSlot);
-return DAG.getNode(X86ISD::FILD64m, RTs, Ops);
+Ops.push_back(DAG.getValueType(SrcVT));
+Result = DAG.getNode(X86ISD::FILD, Tys, Ops);
+return Result;
}
case ISD::FP_TO_SINT: {
assert(Op.getValueType() <= MVT::i64 && Op.getValueType() >= MVT::i16 &&
@@ -1749,7 +1762,7 @@
case X86ISD::SBB:return "X86ISD::SBB";
case X86ISD::SHLD: return "X86ISD::SHLD";
case X86ISD::SHRD: return "X86ISD::SHRD";
- case X86ISD::FILD64m:return "X86ISD::FILD64m";
+ case X86ISD::FILD: return "X86ISD::FILD";
case X86ISD::FP_TO_INT16_IN_MEM: return "X86ISD::FP_TO_INT16_IN_MEM";
case X86ISD::FP_TO_INT32_IN_MEM: return "X86ISD::FP_TO_INT32_
[llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
Changes in directory llvm/test/Regression/CodeGen/Generic:
2006-01-12-BadSetCCFold.ll added (r1.1)
---
Log message:
Test case for a SETCC / BRCOND folding bug.
---
Diffs of the changes: (+39 -0)
2006-01-12-BadSetCCFold.ll | 39 +++
1 files changed, 39 insertions(+)
Index: llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
diff -c /dev/null
llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll:1.1
*** /dev/null Thu Jan 12 19:02:32 2006
--- llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll Thu Jan
12 19:02:22 2006
***
*** 0
--- 1,39
+ ; RUN: llvm-as < %s | llc
+
+ target endian = little
+ target pointersize = 32
+ %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**,
double**, double*, int, int }
+
+ implementation ; Functions:
+
+ void %main() {
+ entry:
+ br bool false, label %then.2.i, label %endif.2.i
+
+ then.2.i: ; preds = %entry
+ br label %dealwithargs.exit
+
+ endif.2.i:; preds = %entry
+ br bool false, label %then.3.i, label %dealwithargs.exit
+
+ then.3.i: ; preds = %endif.2.i
+ br label %dealwithargs.exit
+
+ dealwithargs.exit:; preds = %then.3.i, %endif.2.i, %then.2.i
+ %n_nodes.4 = phi int [ 64, %then.3.i ], [ 64, %then.2.i ], [ 64,
%endif.2.i ] ; [#uses=1]
+ %tmp.14.i1134.i.i = setgt int %n_nodes.4, 1 ;
[#uses=2]
+ br bool %tmp.14.i1134.i.i, label %no_exit.i12.i.i, label
%fill_table.exit22.i.i
+
+ no_exit.i12.i.i: ; preds = %no_exit.i12.i.i, %dealwithargs.exit
+ br bool false, label %fill_table.exit22.i.i, label %no_exit.i12.i.i
+
+ fill_table.exit22.i.i:; preds = %no_exit.i12.i.i,
%dealwithargs.exit
+ %cur_node.0.i8.1.i.i = phi %struct.node_t* [ undef, %dealwithargs.exit
], [ null, %no_exit.i12.i.i ]; <%struct.node_t*> [#uses=0]
+ br bool %tmp.14.i1134.i.i, label %no_exit.i.preheader.i.i, label
%make_tables.exit.i
+
+ no_exit.i.preheader.i.i: ; preds = %fill_table.exit22.i.i
+ ret void
+
+ make_tables.exit.i: ; preds = %fill_table.exit22.i.i
+ ret void
+ }
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.34 -> 1.35
---
Log message:
Fix a SETCC / BRCOND folding bug.
---
Diffs of the changes: (+37 -12)
X86ISelLowering.cpp | 49 +
1 files changed, 37 insertions(+), 12 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.34
llvm/lib/Target/X86/X86ISelLowering.cpp:1.35
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.34Thu Jan 12 16:54:21 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 19:03:02 2006
@@ -1572,14 +1572,24 @@
bool isFP = MVT::isFloatingPoint(VT);
bool isFPStack = isFP && (X86Vector < SSE2);
bool isFPSSE = isFP && (X86Vector >= SSE2);
-bool isValid = false;
+bool addTest = false;
SDOperand Op0 = Op.getOperand(0);
SDOperand Cond, CC;
if (Op0.getOpcode() == X86ISD::SETCC) {
- CC = Op0.getOperand(0);
- Cond = Op0.getOperand(1);
- isValid =
-!(isFPStack &&
!hasFPCMov(cast(CC)->getSignExtended()));
+ // If condition flag is set by a X86ISD::CMP, then make a copy of it
+ // (since flag operand cannot be shared). If the X86ISD::SETCC does not
+ // have another use it will be eliminated.
+ // If the X86ISD::SETCC has more than one use, then it's probably better
+ // to use a test instead of duplicating the X86ISD::CMP (for register
+ // pressure reason).
+ if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+CC = Op0.getOperand(0);
+Cond = Op0.getOperand(1);
+addTest =
+ !(isFPStack &&
+!hasFPCMov(cast(CC)->getSignExtended()));
+ } else
+addTest = true;
} else if (Op0.getOpcode() == ISD::SETCC) {
CC = Op0.getOperand(2);
bool isFP = MVT::isFloatingPoint(Op0.getOperand(1).getValueType());
@@ -1587,10 +1597,11 @@
CC = DAG.getConstant(X86CC, MVT::i8);
Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
Op0.getOperand(0), Op0.getOperand(1));
- isValid = true;
-}
+ addTest = true;
+} else
+ addTest = true;
-if (!isValid) {
+if (!addTest) {
CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
}
@@ -1606,13 +1617,24 @@
return DAG.getNode(X86ISD::CMOV, Tys, Ops);
}
case ISD::BRCOND: {
+bool addTest = false;
SDOperand Cond = Op.getOperand(1);
SDOperand Dest = Op.getOperand(2);
SDOperand CC;
-// TODO: handle Cond == OR / AND / XOR
if (Cond.getOpcode() == X86ISD::SETCC) {
- CC = Cond.getOperand(0);
- Cond = Cond.getOperand(1);
+ // If condition flag is set by a X86ISD::CMP, then make a copy of it
+ // (since flag operand cannot be shared). If the X86ISD::SETCC does not
+ // have another use it will be eliminated.
+ // If the X86ISD::SETCC has more than one use, then it's probably better
+ // to use a test instead of duplicating the X86ISD::CMP (for register
+ // pressure reason).
+ if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+CC = Cond.getOperand(0);
+Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
+ Cond.getOperand(1).getOperand(0),
+ Cond.getOperand(1).getOperand(1));
+ } else
+addTest = true;
} else if (Cond.getOpcode() == ISD::SETCC) {
CC = Cond.getOperand(2);
bool isFP = MVT::isFloatingPoint(Cond.getOperand(1).getValueType());
@@ -1620,7 +1642,10 @@
CC = DAG.getConstant(X86CC, MVT::i8);
Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
Cond.getOperand(0), Cond.getOperand(1));
-} else {
+} else
+ addTest = true;
+
+if (addTest) {
CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8);
Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Cond, Cond);
}
___
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[llvm-commits] CVS: llvm/docs/LangRef.html
Changes in directory llvm/docs: LangRef.html updated: 1.121 -> 1.122 --- Log message: void* is not legal in LLVM. --- Diffs of the changes: (+3 -5) LangRef.html |8 +++- 1 files changed, 3 insertions(+), 5 deletions(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.121 llvm/docs/LangRef.html:1.122 --- llvm/docs/LangRef.html:1.121Tue Jan 10 13:31:34 2006 +++ llvm/docs/LangRef.html Thu Jan 12 19:20:27 2006 @@ -2709,7 +2709,7 @@ Syntax: - declare void* %llvm.returnaddress(uint) + declare sbyte *%llvm.returnaddress(uint ) Overview: @@ -2753,7 +2753,7 @@ Syntax: - declare void* %llvm.frameaddress(uint ) + declare sbyte *%llvm.frameaddress(uint ) Overview: @@ -3362,7 +3362,6 @@ Syntax: declare int %llvm.ctpop(int ) - Overview: @@ -3433,7 +3432,6 @@ Syntax: declare int %llvm.cttz(int ) - Overview: @@ -3483,7 +3481,7 @@ mailto:[EMAIL PROTECTED]">Chris Lattner http://llvm.cs.uiuc.edu";>The LLVM Compiler Infrastructure - Last modified: $Date: 2006/01/10 19:31:34 $ + Last modified: $Date: 2006/01/13 01:20:27 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.35 -> 1.36
---
Log message:
Oops. Typo.
---
Diffs of the changes: (+1 -1)
X86ISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.35
llvm/lib/Target/X86/X86ISelLowering.cpp:1.36
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.35Thu Jan 12 19:03:02 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 19:06:49 2006
@@ -1601,7 +1601,7 @@
} else
addTest = true;
-if (!addTest) {
+if (addTest) {
CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
}
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[llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Changes in directory llvm/lib/Target/X86: README.txt updated: 1.21 -> 1.22 --- Log message: Minor update. --- Diffs of the changes: (+9 -0) README.txt |9 + 1 files changed, 9 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.21 llvm/lib/Target/X86/README.txt:1.22 --- llvm/lib/Target/X86/README.txt:1.21 Thu Jan 12 16:54:21 2006 +++ llvm/lib/Target/X86/README.txt Thu Jan 12 19:20:42 2006 @@ -112,3 +112,12 @@ //===-===// Check if load folding would add a cycle in the dag. + +//===-===// + +Model X86 EFLAGS as a real register to avoid redudant cmp / test. e.g. + + cmpl $1, %eax + setg %al + testb %al, %al # unnecessary + jne .BB7 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.36 -> 1.37
---
Log message:
More typo's. I need new eye glasses...
---
Diffs of the changes: (+2 -3)
X86ISelLowering.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.36
llvm/lib/Target/X86/X86ISelLowering.cpp:1.37
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.36Thu Jan 12 19:06:49 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 19:17:24 2006
@@ -1582,12 +1582,11 @@
// If the X86ISD::SETCC has more than one use, then it's probably better
// to use a test instead of duplicating the X86ISD::CMP (for register
// pressure reason).
- if (Cond.hasOneUse() && Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+ if (Op0.hasOneUse() && Op0.getOperand(1).getOpcode() == X86ISD::CMP) {
CC = Op0.getOperand(0);
Cond = Op0.getOperand(1);
addTest =
- !(isFPStack &&
-!hasFPCMov(cast(CC)->getSignExtended()));
+ isFPStack && !hasFPCMov(cast(CC)->getSignExtended());
} else
addTest = true;
} else if (Op0.getOpcode() == ISD::SETCC) {
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[llvm-commits] CVS: llvm/docs/LangRef.html
Changes in directory llvm/docs: LangRef.html updated: 1.122 -> 1.123 --- Log message: Add llvm.stacksave and llvm.stackrestore. --- Diffs of the changes: (+69 -1) LangRef.html | 70 ++- 1 files changed, 69 insertions(+), 1 deletion(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.122 llvm/docs/LangRef.html:1.123 --- llvm/docs/LangRef.html:1.122Thu Jan 12 19:20:27 2006 +++ llvm/docs/LangRef.html Thu Jan 12 20:03:13 2006 @@ -127,6 +127,8 @@ 'llvm.returnaddress' Intrinsic 'llvm.frameaddress' Intrinsic + 'llvm.stacksave' Intrinsic + 'llvm.stackrestore' Intrinsic 'llvm.prefetch' Intrinsic 'llvm.pcmarker' Intrinsic llvm.readcyclecounter' Intrinsic @@ -2789,6 +2791,72 @@ + 'llvm.stacksave' Intrinsic + + + + +Syntax: + + declare sbyte *%llvm.stacksave() + + +Overview: + + +The 'llvm.stacksave' intrinsic is used to remember the current state of +the function stack, for use with +llvm.stackrestore. This is useful for implementing language +features like scoped automatic variable sized arrays in C99. + + +Semantics: + + +This intrinsic returns a opaque pointer value that can be passed to llvm.stackrestore. When an +llvm.stackrestore intrinsic is executed with a value saved from +llvm.stacksave, it effectively restores the state of the stack to the +state it was in when the llvm.stacksave intrinsic executed. In +practice, this pops any alloca blocks from the stack +that were allocated after the llvm.stacksave was executed. + + + + + + + 'llvm.stackrestore' Intrinsic + + + + +Syntax: + + declare void %llvm.stackrestore(sbyte* %ptr) + + +Overview: + + +The 'llvm.stackrestore' intrinsic is used to restore the state of +the function stack to the state it was in when the corresponding llvm.stacksave intrinsic executed. This is +useful for implementing language features like scoped automatic variable sized +arrays in C99. + + +Semantics: + + +See the description for llvm.stacksave. + + + + + + + 'llvm.prefetch' Intrinsic @@ -3481,7 +3549,7 @@ mailto:[EMAIL PROTECTED]">Chris Lattner http://llvm.cs.uiuc.edu";>The LLVM Compiler Infrastructure - Last modified: $Date: 2006/01/13 01:20:27 $ + Last modified: $Date: 2006/01/13 02:03:13 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Intrinsics.h
Changes in directory llvm/include/llvm: Intrinsics.h updated: 1.33 -> 1.34 --- Log message: add new llvm.stacksave/llvm.stackrestore intrinsics --- Diffs of the changes: (+2 -0) Intrinsics.h |2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/Intrinsics.h diff -u llvm/include/llvm/Intrinsics.h:1.33 llvm/include/llvm/Intrinsics.h:1.34 --- llvm/include/llvm/Intrinsics.h:1.33 Fri Nov 11 10:45:18 2005 +++ llvm/include/llvm/Intrinsics.h Thu Jan 12 20:15:02 2006 @@ -34,6 +34,8 @@ // Code generator intrinsics. returnaddress,// Yields the return address of a dynamic call frame frameaddress, // Yields the frame address of a dynamic call frame +stacksave,// Save the stack pointer +stackrestore, // Restore the stack pointer prefetch, // Prefetch a value into the cache pcmarker, // Export a PC from near the marker readcyclecounter, // Read cycle counter register ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Function.cpp Verifier.cpp
Changes in directory llvm/lib/VMCore: Function.cpp updated: 1.96 -> 1.97 Verifier.cpp updated: 1.138 -> 1.139 --- Log message: Add recognition and verification of new llvm.stacksave/llvm.stackrestore intrinsics --- Diffs of the changes: (+18 -4) Function.cpp | 10 ++ Verifier.cpp | 12 2 files changed, 18 insertions(+), 4 deletions(-) Index: llvm/lib/VMCore/Function.cpp diff -u llvm/lib/VMCore/Function.cpp:1.96 llvm/lib/VMCore/Function.cpp:1.97 --- llvm/lib/VMCore/Function.cpp:1.96 Fri Nov 11 10:46:18 2005 +++ llvm/lib/VMCore/Function.cppThu Jan 12 20:15:39 2006 @@ -249,10 +249,12 @@ if (getName() == "llvm.readcyclecounter") return Intrinsic::readcyclecounter; break; case 's': -if (getName() == "llvm.setjmp") return Intrinsic::setjmp; -if (getName() == "llvm.sigsetjmp") return Intrinsic::sigsetjmp; -if (getName() == "llvm.siglongjmp") return Intrinsic::siglongjmp; -if (getName() == "llvm.sqrt") return Intrinsic::sqrt; +if (getName() == "llvm.setjmp") return Intrinsic::setjmp; +if (getName() == "llvm.sigsetjmp")return Intrinsic::sigsetjmp; +if (getName() == "llvm.siglongjmp") return Intrinsic::siglongjmp; +if (getName() == "llvm.stackrestore") return Intrinsic::stackrestore; +if (getName() == "llvm.stacksave")return Intrinsic::stacksave; +if (getName() == "llvm.sqrt") return Intrinsic::sqrt; break; case 'v': if (getName() == "llvm.va_copy") return Intrinsic::vacopy; Index: llvm/lib/VMCore/Verifier.cpp diff -u llvm/lib/VMCore/Verifier.cpp:1.138 llvm/lib/VMCore/Verifier.cpp:1.139 --- llvm/lib/VMCore/Verifier.cpp:1.138 Thu Jan 12 00:17:59 2006 +++ llvm/lib/VMCore/Verifier.cppThu Jan 12 20:15:39 2006 @@ -796,6 +796,18 @@ case Intrinsic::memmove: NumArgs = 4; break; case Intrinsic::memset: NumArgs = 4; break; + case Intrinsic::stacksave: +NumArgs = 0; +Assert1(CI.getType() == PointerType::get(Type::SByteTy), +"llvm.stacksave must return an sbyte*", &CI); +break; + case Intrinsic::stackrestore: +NumArgs = 1; +Assert1(CI.getOperand(1)->getType() == PointerType::get(Type::SByteTy), +"llvm.stackrestore must take an sbyte*", &CI); +Assert1(CI.getType() == Type::VoidTy, +"llvm.stackrestore return void", &CI); +break; case Intrinsic::prefetch:NumArgs = 3; break; case Intrinsic::pcmarker: NumArgs = 1; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/stacksave-restore.ll
Changes in directory llvm/test/Regression/CodeGen:
stacksave-restore.ll added (r1.1)
---
Log message:
testcase for the llvm.stacksave/llvm.stackrestore intrinsics.
---
Diffs of the changes: (+12 -0)
stacksave-restore.ll | 12
1 files changed, 12 insertions(+)
Index: llvm/test/Regression/CodeGen/stacksave-restore.ll
diff -c /dev/null llvm/test/Regression/CodeGen/stacksave-restore.ll:1.1
*** /dev/null Thu Jan 12 20:25:18 2006
--- llvm/test/Regression/CodeGen/stacksave-restore.ll Thu Jan 12 20:25:08 2006
***
*** 0
--- 1,12
+ ; RUN: llvm-as < %s | llc
+
+ declare sbyte* %llvm.stacksave()
+ declare void %llvm.stackrestore(sbyte*)
+
+ int *%test(uint %N) {
+ %tmp = call sbyte* %llvm.stacksave()
+ %P = alloca int, uint %N
+ call void %llvm.stackrestore(sbyte* %tmp)
+ %Q = alloca int, uint %N
+ ret int* %P
+ }
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.121 -> 1.122 --- Log message: Add "support" for stacksave/stackrestore to the dag isel --- Diffs of the changes: (+5 -0) SelectionDAGISel.cpp |5 + 1 files changed, 5 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.121 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.122 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.121Tue Jan 10 13:04:57 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jan 12 20:24:42 2006 @@ -1004,6 +1004,11 @@ getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1; return 0; + case Intrinsic::stacksave: +setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType(; +return 0; // FIXME: discard stacksave/restore + case Intrinsic::stackrestore: +return 0; // FIXME: discard stacksave/restore case Intrinsic::prefetch: // FIXME: Currently discarding prefetches. return 0; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/IntrinsicLowering.cpp
Changes in directory llvm/lib/CodeGen:
IntrinsicLowering.cpp updated: 1.36 -> 1.37
---
Log message:
Add "support" for the llvm.stacksave/stackrestore intrinsics, this is
used by the C backend.
---
Diffs of the changes: (+15 -2)
IntrinsicLowering.cpp | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/IntrinsicLowering.cpp
diff -u llvm/lib/CodeGen/IntrinsicLowering.cpp:1.36
llvm/lib/CodeGen/IntrinsicLowering.cpp:1.37
--- llvm/lib/CodeGen/IntrinsicLowering.cpp:1.36 Fri Nov 11 10:46:18 2005
+++ llvm/lib/CodeGen/IntrinsicLowering.cpp Thu Jan 12 20:22:08 2006
@@ -248,6 +248,19 @@
break;
}
+ case Intrinsic::stacksave:
+ case Intrinsic::stackrestore: {
+static bool Warned = false;
+if (!Warned)
+ std::cerr << "WARNING: this target does not support the llvm.stack"
+ << (Callee->getIntrinsicID() == Intrinsic::stacksave ?
+ "save" : "restore") << " intrinsic.\n";
+Warned = true;
+if (Callee->getIntrinsicID() == Intrinsic::stacksave)
+ CI->replaceAllUsesWith(Constant::getNullValue(CI->getType()));
+break;
+ }
+
case Intrinsic::returnaddress:
case Intrinsic::frameaddress:
std::cerr << "WARNING: this target does not support the llvm."
@@ -263,8 +276,8 @@
case Intrinsic::pcmarker:
break;// Simply strip out pcmarker on unsupported architectures
case Intrinsic::readcyclecounter: {
-std::cerr << "WARNING: this target does not support the
llvm.readcyclecounter"
- << " intrinsic. It is being lowered to a constant 0\n";
+std::cerr << "WARNING: this target does not support the llvm.readcyclecoun"
+ << "ter intrinsic. It is being lowered to a constant 0\n";
CI->replaceAllUsesWith(ConstantUInt::get(Type::ULongTy, 0));
break;
}
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp IA64ISelPattern.cpp
Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.18 -> 1.19 IA64ISelPattern.cpp updated: 1.74 -> 1.75 --- Log message: new nodes --- Diffs of the changes: (+8 -0) IA64ISelLowering.cpp |4 IA64ISelPattern.cpp |4 2 files changed, 8 insertions(+) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.19 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18 Wed Jan 11 21:28:40 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Thu Jan 12 20:40:58 2006 @@ -83,6 +83,10 @@ setOperationAction(ISD::ROTL , MVT::i64 , Expand); setOperationAction(ISD::ROTR , MVT::i64 , Expand); + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + computeRegisterProperties(); addLegalFPImmediate(+0.0); Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.75 --- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74 Wed Jan 11 17:20:28 2006 +++ llvm/lib/Target/IA64/IA64ISelPattern.cppThu Jan 12 20:40:58 2006 @@ -107,6 +107,10 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + computeRegisterProperties(); addLegalFPImmediate(+0.0); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
Changes in directory llvm/lib/Target/Alpha: AlphaISelLowering.cpp updated: 1.19 -> 1.20 --- Log message: expand unsupported stacksave/stackrestore nodes --- Diffs of the changes: (+4 -0) AlphaISelLowering.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.19 llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.20 --- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.19Wed Jan 11 15:21:00 2006 +++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Thu Jan 12 20:42:53 2006 @@ -107,6 +107,10 @@ setOperationAction(ISD::LOCATION, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); // We want to legalize GlobalAddress and ConstantPool and // ExternalSymbols nodes into the appropriate instructions to ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.63 -> 1.64
---
Log message:
expand unsupported stacksave/stackrestore nodes
---
Diffs of the changes: (+4 -0)
PPCISelLowering.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.64
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Jan 12 20:42:53 2006
@@ -108,6 +108,10 @@
// appropriate instructions to materialize the address.
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
+
+ // Not implemented yet.
+ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
if (TM.getSubtarget().is64Bit()) {
// They also have instructions for converting between i64 and fp.
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[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.48 -> 1.49 --- Log message: expand unsupported stacksave/stackrestore nodes --- Diffs of the changes: (+4 -0) SparcV8ISelDAGToDAG.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.49 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48Thu Jan 12 11:05:32 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Thu Jan 12 20:42:53 2006 @@ -160,6 +160,10 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + computeRegisterProperties(); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.89 -> 1.90 --- Log message: add stacksave/stackrestore nodes --- Diffs of the changes: (+9 -0) SelectionDAGNodes.h |9 + 1 files changed, 9 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.90 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89 Wed Jan 11 15:21:00 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jan 12 20:39:03 2006 @@ -312,6 +312,15 @@ CALL, TAILCALL, +// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a +// value, the same type as the pointer type for the system, and an output +// chain. +STACKSAVE, + +// STACKRESTORE has two operands, an input chain and a pointer to restore to +// it returns an output chain. +STACKRESTORE, + // MEMSET/MEMCPY/MEMMOVE - The first operand is the chain, and the rest // correspond to the operands of the LLVM intrinsic functions. The only // result is a token chain. The alignment argument is guaranteed to be a ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.37 -> 1.38
---
Log message:
expand unsupported stacksave/stackrestore nodes
---
Diffs of the changes: (+4 -0)
X86ISelLowering.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.37
llvm/lib/Target/X86/X86ISelLowering.cpp:1.38
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.37Thu Jan 12 19:17:24 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 20:42:53 2006
@@ -159,6 +159,10 @@
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
+ // Not implemented yet.
+ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+
if (X86ScalarSSE) {
// Set up the FP register classes.
addRegisterClass(MVT::f32, X86::FR32RegisterClass);
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.260 -> 1.261
SelectionDAGISel.cpp updated: 1.122 -> 1.123
---
Log message:
Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow
targets to custom expand them as they desire.
---
Diffs of the changes: (+72 -4)
LegalizeDAG.cpp | 58 +++
SelectionDAGISel.cpp | 18 ---
2 files changed, 72 insertions(+), 4 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.260
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.261
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.260 Wed Jan 11 16:14:47 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jan 12 20:50:02 2006
@@ -1425,6 +1425,64 @@
if (Tmp1 != Node->getOperand(0))
Result = DAG.getNode(ISD::PCMARKER, MVT::Other,
Tmp1,Node->getOperand(1));
break;
+ case ISD::STACKSAVE:
+Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
+if (Tmp1 != Node->getOperand(0)) {
+ std::vector VTs;
+ VTs.push_back(Node->getValueType(0));
+ VTs.push_back(MVT::Other);
+ std::vector Ops;
+ Ops.push_back(Tmp1);
+ Result = DAG.getNode(ISD::STACKSAVE, VTs, Ops);
+}
+
+switch (TLI.getOperationAction(ISD::STACKSAVE, MVT::Other)) {
+default: assert(0 && "This action is not supported yet!");
+case TargetLowering::Custom: {
+ SDOperand Tmp = TLI.LowerOperation(Result, DAG);
+ if (Tmp.Val) {
+Result = LegalizeOp(Tmp);
+break;
+ }
+ // FALLTHROUGH if the target thinks it is legal.
+}
+case TargetLowering::Legal:
+ // Since stacksave produce two values, make sure to remember that we
+ // legalized both of them.
+ AddLegalizedOperand(SDOperand(Node, 0), Result);
+ AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
+ return Result.getValue(Op.ResNo);
+case TargetLowering::Expand:
+ Tmp1 = DAG.getNode(ISD::UNDEF, Node->getValueType(0));
+ AddLegalizedOperand(SDOperand(Node, 0), Tmp1);
+ AddLegalizedOperand(SDOperand(Node, 1), Node->getOperand(0));
+ return Op.ResNo ? Node->getOperand(0) : Tmp1;
+}
+
+ case ISD::STACKRESTORE:
+Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
+Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
+if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1))
+ Result = DAG.getNode(ISD::STACKRESTORE, MVT::Other, Tmp1, Tmp2);
+
+switch (TLI.getOperationAction(ISD::STACKRESTORE, MVT::Other)) {
+default: assert(0 && "This action is not supported yet!");
+case TargetLowering::Custom: {
+ SDOperand Tmp = TLI.LowerOperation(Result, DAG);
+ if (Tmp.Val) {
+Result = LegalizeOp(Tmp);
+break;
+ }
+ // FALLTHROUGH if the target thinks it is legal.
+}
+case TargetLowering::Legal:
+ break;
+case TargetLowering::Expand:
+ Result = Tmp1;
+ break;
+}
+break;
+
case ISD::READCYCLECOUNTER:
Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain
if (Tmp1 != Node->getOperand(0)) {
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.122
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.123
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.122Thu Jan 12
20:24:42 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jan 12 20:50:02 2006
@@ -1004,11 +1004,21 @@
getValue(I.getOperand(1)).getValueType(),
getValue(I.getOperand(1;
return 0;
- case Intrinsic::stacksave:
-setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType(;
-return 0; // FIXME: discard stacksave/restore
+ case Intrinsic::stacksave: {
+std::vector VTs;
+VTs.push_back(TLI.getPointerTy());
+VTs.push_back(MVT::Other);
+std::vector Ops;
+Ops.push_back(getRoot());
+SDOperand Tmp = DAG.getNode(ISD::STACKSAVE, VTs, Ops);
+setValue(&I, Tmp);
+DAG.setRoot(Tmp.getValue(1));
+return 0;
+ }
case Intrinsic::stackrestore:
-return 0; // FIXME: discard stacksave/restore
+DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, MVT::Other, DAG.getRoot(),
+getValue(I.getOperand(1;
+return 0;
case Intrinsic::prefetch:
// FIXME: Currently discarding prefetches.
return 0;
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAG.cpp updated: 1.237 -> 1.238 --- Log message: add stacksave/stackrestore nodes --- Diffs of the changes: (+6 -2) SelectionDAG.cpp |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.237 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.238 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.237Wed Jan 11 16:13:48 2006 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jan 12 20:39:42 2006 @@ -1982,8 +1982,12 @@ case ISD::TRUNCSTORE: return "truncstore"; case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; - case ISD::EXTRACT_ELEMENT: return "extract_element"; - case ISD::BUILD_PAIR: return "build_pair"; + case ISD::EXTRACT_ELEMENT:return "extract_element"; + case ISD::BUILD_PAIR: return "build_pair"; + case ISD::STACKSAVE: return "stacksave"; + case ISD::STACKRESTORE: return "stackrestore"; + + // Block memory operations. case ISD::MEMSET: return "memset"; case ISD::MEMCPY: return "memcpy"; case ISD::MEMMOVE: return "memmove"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
