[llvm-branch-commits] [DXIL][Analysis] Replace #include with forward declaration. NFC (PR #100622)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/100622 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Make alignment on StructuredBuffer optional (PR #100697)
@@ -284,7 +286,8 @@ MDTuple *ResourceInfo::getAsMetadata(LLVMContext &Ctx) const { std::pair ResourceInfo::getAnnotateProps() const { uint32_t ResourceKind = llvm::to_underlying(Kind); - uint32_t AlignLog2 = isStruct() ? Log2(Struct.Alignment) : 0; + uint32_t AlignLog2 = + isStruct() && Struct.Alignment ? Log2(*Struct.Alignment) : 0; python3kgae wrote: Could we change it to ``` (isStruct() && Struct.Alignment) ? Log2(*Struct.Alignment) : 0; ``` so it is easier to read? https://github.com/llvm/llvm-project/pull/100697 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
@@ -331,6 +336,249 @@ std::pair ResourceInfo::getAnnotateProps() const { return {Word0, Word1}; } +void ResourceInfo::print(raw_ostream &OS) const { + OS << " Symbol: "; + Symbol->printAsOperand(OS); + OS << "\n"; + + OS << " Name: \"" << Name << "\"\n" + << " Binding:\n" + << "Unique ID: " << Binding.UniqueID << "\n" + << "Space: " << Binding.Space << "\n" + << "Lower Bound: " << Binding.LowerBound << "\n" + << "Size: " << Binding.Size << "\n" + << " Class: " << static_cast(RC) << "\n" + << " Kind: " << static_cast(Kind) << "\n"; python3kgae wrote: Could we print the name instead of unsigned for Kind and RC? https://github.com/llvm/llvm-project/pull/100699 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
@@ -331,6 +336,249 @@ std::pair ResourceInfo::getAnnotateProps() const { return {Word0, Word1}; } +void ResourceInfo::print(raw_ostream &OS) const { + OS << " Symbol: "; + Symbol->printAsOperand(OS); + OS << "\n"; + + OS << " Name: \"" << Name << "\"\n" + << " Binding:\n" + << "Unique ID: " << Binding.UniqueID << "\n" + << "Space: " << Binding.Space << "\n" + << "Lower Bound: " << Binding.LowerBound << "\n" + << "Size: " << Binding.Size << "\n" + << " Class: " << static_cast(RC) << "\n" + << " Kind: " << static_cast(Kind) << "\n"; + + if (isCBuffer()) { +OS << " CBuffer size: " << CBufferSize << "\n"; + } else if (isSampler()) { +OS << " Sampler Type: " << static_cast(SamplerTy) << "\n"; + } else { +if (isUAV()) { + OS << " Globally Coherent: " << UAVFlags.GloballyCoherent << "\n" + << " HasCounter: " << UAVFlags.HasCounter << "\n" + << " IsROV: " << UAVFlags.IsROV << "\n"; +} +if (isMultiSample()) + OS << " Sample Count: " << MultiSample.Count << "\n"; + +if (isStruct()) { + OS << " Buffer Stride: " << Struct.Stride << "\n"; + uint32_t AlignLog2 = Struct.Alignment ? Log2(*Struct.Alignment) : 0; + OS << " Alignment: " << AlignLog2 << "\n"; +} else if (isTyped()) { + OS << " Element Type: " << static_cast(Typed.ElementTy) << "\n" + << " Element Count: " << static_cast(Typed.ElementCount) + << "\n"; +} else if (isFeedback()) + OS << " Feedback Type: " << static_cast(Feedback.Type) << "\n"; + } +} + +//===--===// +// ResourceMapper + +static dxil::ElementType toDXILElementType(Type *Ty, bool IsSigned) { + // TODO: Handle unorm, snorm, and packed. + Ty = Ty->getScalarType(); + + if (Ty->isIntegerTy()) { +switch (Ty->getIntegerBitWidth()) { +case 16: + return IsSigned ? ElementType::I16 : ElementType::U16; +case 32: + return IsSigned ? ElementType::I32 : ElementType::U32; +case 64: + return IsSigned ? ElementType::I64 : ElementType::U64; +case 1: +default: + return ElementType::Invalid; +} + } else if (Ty->isFloatTy()) { +return ElementType::F32; + } else if (Ty->isDoubleTy()) { +return ElementType::F64; + } else if (Ty->isHalfTy()) { +return ElementType::F16; + } + + return ElementType::Invalid; +} + +namespace { + +class ResourceMapper { + Module &M; + LLVMContext &Context; + DXILResourceMap &Resources; + + // Unique ID is per resource type to match DXC. + uint32_t NextUAV = 0; + uint32_t NextSRV = 0; + uint32_t NextCBuf = 0; + uint32_t NextSmp = 0; + +public: + ResourceMapper(Module &M, + MapVector &Resources) + : M(M), Context(M.getContext()), Resources(Resources) {} + + void diagnoseHandle(CallInst *CI, const Twine &Msg, + DiagnosticSeverity Severity = DS_Error) { +std::string S; +raw_string_ostream SS(S); +CI->printAsOperand(SS); +DiagnosticInfoUnsupported Diag(*CI->getFunction(), Msg + ": " + SS.str(), + CI->getDebugLoc(), Severity); +Context.diagnose(Diag); + } + + ResourceInfo *mapBufferType(CallInst *CI, TargetExtType *HandleTy, + bool IsTyped) { +if (HandleTy->getNumTypeParameters() != 1 || +HandleTy->getNumIntParameters() != (IsTyped ? 3 : 2)) { + diagnoseHandle(CI, Twine("Invalid buffer target type")); + return nullptr; +} + +Type *ElTy = HandleTy->getTypeParameter(0); +unsigned IsWriteable = HandleTy->getIntParameter(0); +unsigned IsROV = HandleTy->getIntParameter(1); +bool IsSigned = IsTyped && HandleTy->getIntParameter(2); + +ResourceClass RC = IsWriteable ? ResourceClass::UAV : ResourceClass::SRV; +ResourceKind Kind; +if (IsTyped) + Kind = ResourceKind::TypedBuffer; +else if (ElTy->isIntegerTy(8)) + Kind = ResourceKind::RawBuffer; +else + Kind = ResourceKind::StructuredBuffer; + +// TODO: We need to lower to a typed pointer, can we smuggle the type +// through? +Value *Symbol = UndefValue::get(PointerType::getUnqual(Context)); +// TODO: We don't actually keep track of the name right now... +StringRef Name = ""; + +auto [It, Success] = Resources.try_emplace(CI, RC, Kind, Symbol, Name); +assert(Success && "Mapping the same CallInst again?"); +(void)Success; +// We grab a pointer into the map's storage, which isn't generally safe. +// Since we're just using this to fill in the info the map won't mutate and +// the pointer stays valid for as long as we need it to. +ResourceInfo *RI = &(It->second); + +if (RI->isUAV()) + // TODO: We need analysis for GloballyCoherent and HasCounter + RI->setUAV(false, false, IsROV); + +if (RI->isTyped()) { + dxil::ElementType ET = toDXILElementType(ElTy, IsSigned
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
https://github.com/python3kgae edited https://github.com/llvm/llvm-project/pull/100699 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
https://github.com/python3kgae deleted https://github.com/llvm/llvm-project/pull/100699 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
@@ -331,6 +336,249 @@ std::pair ResourceInfo::getAnnotateProps() const { return {Word0, Word1}; } +void ResourceInfo::print(raw_ostream &OS) const { + OS << " Symbol: "; + Symbol->printAsOperand(OS); + OS << "\n"; + + OS << " Name: \"" << Name << "\"\n" + << " Binding:\n" + << "Unique ID: " << Binding.UniqueID << "\n" + << "Space: " << Binding.Space << "\n" + << "Lower Bound: " << Binding.LowerBound << "\n" + << "Size: " << Binding.Size << "\n" + << " Class: " << static_cast(RC) << "\n" + << " Kind: " << static_cast(Kind) << "\n"; + + if (isCBuffer()) { +OS << " CBuffer size: " << CBufferSize << "\n"; + } else if (isSampler()) { +OS << " Sampler Type: " << static_cast(SamplerTy) << "\n"; + } else { +if (isUAV()) { + OS << " Globally Coherent: " << UAVFlags.GloballyCoherent << "\n" + << " HasCounter: " << UAVFlags.HasCounter << "\n" + << " IsROV: " << UAVFlags.IsROV << "\n"; +} +if (isMultiSample()) + OS << " Sample Count: " << MultiSample.Count << "\n"; + +if (isStruct()) { + OS << " Buffer Stride: " << Struct.Stride << "\n"; + uint32_t AlignLog2 = Struct.Alignment ? Log2(*Struct.Alignment) : 0; + OS << " Alignment: " << AlignLog2 << "\n"; +} else if (isTyped()) { + OS << " Element Type: " << static_cast(Typed.ElementTy) << "\n" + << " Element Count: " << static_cast(Typed.ElementCount) + << "\n"; +} else if (isFeedback()) + OS << " Feedback Type: " << static_cast(Feedback.Type) << "\n"; + } +} + +//===--===// +// ResourceMapper + +static dxil::ElementType toDXILElementType(Type *Ty, bool IsSigned) { + // TODO: Handle unorm, snorm, and packed. + Ty = Ty->getScalarType(); + + if (Ty->isIntegerTy()) { +switch (Ty->getIntegerBitWidth()) { +case 16: + return IsSigned ? ElementType::I16 : ElementType::U16; +case 32: + return IsSigned ? ElementType::I32 : ElementType::U32; +case 64: + return IsSigned ? ElementType::I64 : ElementType::U64; +case 1: +default: + return ElementType::Invalid; +} + } else if (Ty->isFloatTy()) { +return ElementType::F32; + } else if (Ty->isDoubleTy()) { +return ElementType::F64; + } else if (Ty->isHalfTy()) { +return ElementType::F16; + } + + return ElementType::Invalid; +} + +namespace { + +class ResourceMapper { + Module &M; + LLVMContext &Context; + DXILResourceMap &Resources; + + // Unique ID is per resource type to match DXC. + uint32_t NextUAV = 0; + uint32_t NextSRV = 0; + uint32_t NextCBuf = 0; + uint32_t NextSmp = 0; + +public: + ResourceMapper(Module &M, + MapVector &Resources) + : M(M), Context(M.getContext()), Resources(Resources) {} + + void diagnoseHandle(CallInst *CI, const Twine &Msg, + DiagnosticSeverity Severity = DS_Error) { +std::string S; +raw_string_ostream SS(S); +CI->printAsOperand(SS); +DiagnosticInfoUnsupported Diag(*CI->getFunction(), Msg + ": " + SS.str(), + CI->getDebugLoc(), Severity); +Context.diagnose(Diag); + } + + ResourceInfo *mapBufferType(CallInst *CI, TargetExtType *HandleTy, + bool IsTyped) { +if (HandleTy->getNumTypeParameters() != 1 || +HandleTy->getNumIntParameters() != (IsTyped ? 3 : 2)) { + diagnoseHandle(CI, Twine("Invalid buffer target type")); + return nullptr; +} + +Type *ElTy = HandleTy->getTypeParameter(0); +unsigned IsWriteable = HandleTy->getIntParameter(0); +unsigned IsROV = HandleTy->getIntParameter(1); +bool IsSigned = IsTyped && HandleTy->getIntParameter(2); + +ResourceClass RC = IsWriteable ? ResourceClass::UAV : ResourceClass::SRV; +ResourceKind Kind; +if (IsTyped) + Kind = ResourceKind::TypedBuffer; +else if (ElTy->isIntegerTy(8)) + Kind = ResourceKind::RawBuffer; +else + Kind = ResourceKind::StructuredBuffer; + +// TODO: We need to lower to a typed pointer, can we smuggle the type +// through? +Value *Symbol = UndefValue::get(PointerType::getUnqual(Context)); +// TODO: We don't actually keep track of the name right now... +StringRef Name = ""; + +auto [It, Success] = Resources.try_emplace(CI, RC, Kind, Symbol, Name); +assert(Success && "Mapping the same CallInst again?"); +(void)Success; +// We grab a pointer into the map's storage, which isn't generally safe. +// Since we're just using this to fill in the info the map won't mutate and +// the pointer stays valid for as long as we need it to. +ResourceInfo *RI = &(It->second); + +if (RI->isUAV()) + // TODO: We need analysis for GloballyCoherent and HasCounter + RI->setUAV(false, false, IsROV); + +if (RI->isTyped()) { + dxil::ElementType ET = toDXILElementType(ElTy, IsSigned
[llvm-branch-commits] [DXIL][Analysis] Boilerplate for DXILResourceAnalysis pass (PR #100700)
@@ -212,6 +216,53 @@ class ResourceInfo { }; } // namespace dxil + +using DXILResourceMap = MapVector; + +class DXILResourceAnalysis : public AnalysisInfoMixin { + friend AnalysisInfoMixin; + + static AnalysisKey Key; + +public: + using Result = DXILResourceMap; + + /// Gather resource info for the module \c M. + DXILResourceMap run(Module &M, ModuleAnalysisManager &AM); python3kgae wrote: DXILResourceMap is result of run. To use DXILResourceMap more than once in different passes, do I need to call DXILResourceAnalysis::run more than once? https://github.com/llvm/llvm-project/pull/100700 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Remove new-pm versions of DXILResource passes. NFC (PR #100698)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/100698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Boilerplate for DXILResourceAnalysis pass (PR #100700)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/100700 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Make DXILOpBuilder's API more useable (PR #101250)
@@ -151,7 +151,11 @@ DXILOperationDesc::DXILOperationDesc(const Record *R) { assert(knownType && "Specification of multiple differing overload " "parameter types not yet supported"); } else { -OverloadParamIndices.push_back(i); +// Skip the return value - nothing is overloaded on only return, and it python3kgae wrote: Things like LoadInput is overloaded on only return. https://github.com/llvm/llvm-project/pull/101250 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Simplify tablegen'd OpCode and OpClass enums (PR #101249)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/101249 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
@@ -331,6 +336,249 @@ std::pair ResourceInfo::getAnnotateProps() const { return {Word0, Word1}; } +void ResourceInfo::print(raw_ostream &OS) const { + OS << " Symbol: "; + Symbol->printAsOperand(OS); + OS << "\n"; + + OS << " Name: \"" << Name << "\"\n" + << " Binding:\n" + << "Unique ID: " << Binding.UniqueID << "\n" + << "Space: " << Binding.Space << "\n" + << "Lower Bound: " << Binding.LowerBound << "\n" + << "Size: " << Binding.Size << "\n" + << " Class: " << static_cast(RC) << "\n" + << " Kind: " << static_cast(Kind) << "\n"; + + if (isCBuffer()) { +OS << " CBuffer size: " << CBufferSize << "\n"; + } else if (isSampler()) { +OS << " Sampler Type: " << static_cast(SamplerTy) << "\n"; + } else { +if (isUAV()) { + OS << " Globally Coherent: " << UAVFlags.GloballyCoherent << "\n" + << " HasCounter: " << UAVFlags.HasCounter << "\n" + << " IsROV: " << UAVFlags.IsROV << "\n"; +} +if (isMultiSample()) + OS << " Sample Count: " << MultiSample.Count << "\n"; + +if (isStruct()) { + OS << " Buffer Stride: " << Struct.Stride << "\n"; + uint32_t AlignLog2 = Struct.Alignment ? Log2(*Struct.Alignment) : 0; + OS << " Alignment: " << AlignLog2 << "\n"; +} else if (isTyped()) { + OS << " Element Type: " << static_cast(Typed.ElementTy) << "\n" + << " Element Count: " << static_cast(Typed.ElementCount) + << "\n"; +} else if (isFeedback()) + OS << " Feedback Type: " << static_cast(Feedback.Type) << "\n"; + } +} + +//===--===// +// ResourceMapper + +static dxil::ElementType toDXILElementType(Type *Ty, bool IsSigned) { + // TODO: Handle unorm, snorm, and packed. + Ty = Ty->getScalarType(); + + if (Ty->isIntegerTy()) { +switch (Ty->getIntegerBitWidth()) { +case 16: + return IsSigned ? ElementType::I16 : ElementType::U16; +case 32: + return IsSigned ? ElementType::I32 : ElementType::U32; +case 64: + return IsSigned ? ElementType::I64 : ElementType::U64; +case 1: +default: + return ElementType::Invalid; +} + } else if (Ty->isFloatTy()) { +return ElementType::F32; + } else if (Ty->isDoubleTy()) { +return ElementType::F64; + } else if (Ty->isHalfTy()) { +return ElementType::F16; + } + + return ElementType::Invalid; +} + +namespace { + +class ResourceMapper { + Module &M; + LLVMContext &Context; + DXILResourceMap &Resources; + + // Unique ID is per resource type to match DXC. + uint32_t NextUAV = 0; + uint32_t NextSRV = 0; + uint32_t NextCBuf = 0; + uint32_t NextSmp = 0; + +public: + ResourceMapper(Module &M, + MapVector &Resources) + : M(M), Context(M.getContext()), Resources(Resources) {} + + void diagnoseHandle(CallInst *CI, const Twine &Msg, + DiagnosticSeverity Severity = DS_Error) { +std::string S; +raw_string_ostream SS(S); +CI->printAsOperand(SS); +DiagnosticInfoUnsupported Diag(*CI->getFunction(), Msg + ": " + SS.str(), + CI->getDebugLoc(), Severity); +Context.diagnose(Diag); + } + + ResourceInfo *mapBufferType(CallInst *CI, TargetExtType *HandleTy, + bool IsTyped) { +if (HandleTy->getNumTypeParameters() != 1 || +HandleTy->getNumIntParameters() != (IsTyped ? 3 : 2)) { + diagnoseHandle(CI, Twine("Invalid buffer target type")); + return nullptr; +} + +Type *ElTy = HandleTy->getTypeParameter(0); +unsigned IsWriteable = HandleTy->getIntParameter(0); +unsigned IsROV = HandleTy->getIntParameter(1); +bool IsSigned = IsTyped && HandleTy->getIntParameter(2); + +ResourceClass RC = IsWriteable ? ResourceClass::UAV : ResourceClass::SRV; +ResourceKind Kind; +if (IsTyped) + Kind = ResourceKind::TypedBuffer; +else if (ElTy->isIntegerTy(8)) + Kind = ResourceKind::RawBuffer; +else + Kind = ResourceKind::StructuredBuffer; + +// TODO: We need to lower to a typed pointer, can we smuggle the type +// through? +Value *Symbol = UndefValue::get(PointerType::getUnqual(Context)); +// TODO: We don't actually keep track of the name right now... +StringRef Name = ""; + +auto [It, Success] = Resources.try_emplace(CI, RC, Kind, Symbol, Name); +assert(Success && "Mapping the same CallInst again?"); +(void)Success; +// We grab a pointer into the map's storage, which isn't generally safe. +// Since we're just using this to fill in the info the map won't mutate and +// the pointer stays valid for as long as we need it to. +ResourceInfo *RI = &(It->second); + +if (RI->isUAV()) + // TODO: We need analysis for GloballyCoherent and HasCounter + RI->setUAV(false, false, IsROV); + +if (RI->isTyped()) { + dxil::ElementType ET = toDXILElementType(ElTy, IsSigned
[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
@@ -331,6 +336,249 @@ std::pair ResourceInfo::getAnnotateProps() const { return {Word0, Word1}; } +void ResourceInfo::print(raw_ostream &OS) const { + OS << " Symbol: "; + Symbol->printAsOperand(OS); + OS << "\n"; + + OS << " Name: \"" << Name << "\"\n" + << " Binding:\n" + << "Unique ID: " << Binding.UniqueID << "\n" + << "Space: " << Binding.Space << "\n" + << "Lower Bound: " << Binding.LowerBound << "\n" + << "Size: " << Binding.Size << "\n" + << " Class: " << static_cast(RC) << "\n" + << " Kind: " << static_cast(Kind) << "\n"; + + if (isCBuffer()) { +OS << " CBuffer size: " << CBufferSize << "\n"; + } else if (isSampler()) { +OS << " Sampler Type: " << static_cast(SamplerTy) << "\n"; + } else { +if (isUAV()) { + OS << " Globally Coherent: " << UAVFlags.GloballyCoherent << "\n" + << " HasCounter: " << UAVFlags.HasCounter << "\n" + << " IsROV: " << UAVFlags.IsROV << "\n"; +} +if (isMultiSample()) + OS << " Sample Count: " << MultiSample.Count << "\n"; + +if (isStruct()) { + OS << " Buffer Stride: " << Struct.Stride << "\n"; + uint32_t AlignLog2 = Struct.Alignment ? Log2(*Struct.Alignment) : 0; + OS << " Alignment: " << AlignLog2 << "\n"; +} else if (isTyped()) { + OS << " Element Type: " << static_cast(Typed.ElementTy) << "\n" + << " Element Count: " << static_cast(Typed.ElementCount) + << "\n"; +} else if (isFeedback()) + OS << " Feedback Type: " << static_cast(Feedback.Type) << "\n"; + } +} + +//===--===// +// ResourceMapper + +static dxil::ElementType toDXILElementType(Type *Ty, bool IsSigned) { + // TODO: Handle unorm, snorm, and packed. + Ty = Ty->getScalarType(); + + if (Ty->isIntegerTy()) { +switch (Ty->getIntegerBitWidth()) { +case 16: + return IsSigned ? ElementType::I16 : ElementType::U16; +case 32: + return IsSigned ? ElementType::I32 : ElementType::U32; +case 64: + return IsSigned ? ElementType::I64 : ElementType::U64; +case 1: +default: + return ElementType::Invalid; +} + } else if (Ty->isFloatTy()) { +return ElementType::F32; + } else if (Ty->isDoubleTy()) { +return ElementType::F64; + } else if (Ty->isHalfTy()) { +return ElementType::F16; + } + + return ElementType::Invalid; +} + +namespace { + +class ResourceMapper { + Module &M; + LLVMContext &Context; + DXILResourceMap &Resources; + + // Unique ID is per resource type to match DXC. + uint32_t NextUAV = 0; + uint32_t NextSRV = 0; + uint32_t NextCBuf = 0; + uint32_t NextSmp = 0; + +public: + ResourceMapper(Module &M, + MapVector &Resources) + : M(M), Context(M.getContext()), Resources(Resources) {} + + void diagnoseHandle(CallInst *CI, const Twine &Msg, + DiagnosticSeverity Severity = DS_Error) { +std::string S; +raw_string_ostream SS(S); +CI->printAsOperand(SS); +DiagnosticInfoUnsupported Diag(*CI->getFunction(), Msg + ": " + SS.str(), + CI->getDebugLoc(), Severity); +Context.diagnose(Diag); + } + + ResourceInfo *mapBufferType(CallInst *CI, TargetExtType *HandleTy, + bool IsTyped) { +if (HandleTy->getNumTypeParameters() != 1 || +HandleTy->getNumIntParameters() != (IsTyped ? 3 : 2)) { + diagnoseHandle(CI, Twine("Invalid buffer target type")); + return nullptr; +} + +Type *ElTy = HandleTy->getTypeParameter(0); +unsigned IsWriteable = HandleTy->getIntParameter(0); +unsigned IsROV = HandleTy->getIntParameter(1); +bool IsSigned = IsTyped && HandleTy->getIntParameter(2); + +ResourceClass RC = IsWriteable ? ResourceClass::UAV : ResourceClass::SRV; +ResourceKind Kind; +if (IsTyped) + Kind = ResourceKind::TypedBuffer; +else if (ElTy->isIntegerTy(8)) + Kind = ResourceKind::RawBuffer; +else + Kind = ResourceKind::StructuredBuffer; + +// TODO: We need to lower to a typed pointer, can we smuggle the type +// through? +Value *Symbol = UndefValue::get(PointerType::getUnqual(Context)); +// TODO: We don't actually keep track of the name right now... +StringRef Name = ""; + +auto [It, Success] = Resources.try_emplace(CI, RC, Kind, Symbol, Name); +assert(Success && "Mapping the same CallInst again?"); +(void)Success; +// We grab a pointer into the map's storage, which isn't generally safe. +// Since we're just using this to fill in the info the map won't mutate and +// the pointer stays valid for as long as we need it to. +ResourceInfo *RI = &(It->second); + +if (RI->isUAV()) + // TODO: We need analysis for GloballyCoherent and HasCounter + RI->setUAV(false, false, IsROV); + +if (RI->isTyped()) { + dxil::ElementType ET = toDXILElementType(ElTy, IsSigned
[llvm-branch-commits] [DirectX] Use a more consistent pass name for DXILTranslateMetadata (PR #104249)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/104249 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Register a few DXIL passes with the new PM (PR #104250)
@@ -23,7 +23,10 @@ MODULE_ANALYSIS("dxil-resource-md", DXILResourceMDAnalysis()) #ifndef MODULE_PASS #define MODULE_PASS(NAME, CREATE_PASS) #endif +MODULE_PASS("dxil-intrinsic-expansion", DXILIntrinsicExpansion()) +MODULE_PASS("dxil-op-lower", DXILOpLowering()) +MODULE_PASS("dxil-pretty-printer", DXILPrettyPrinterPass(dbgs())) +MODULE_PASS("dxil-translate-metadata", DXILTranslateMetadata()) // TODO: rename to print after NPM switch MODULE_PASS("print-dx-shader-flags", dxil::ShaderFlagsAnalysisPrinter(dbgs())) -MODULE_PASS("print-dxil-resource-md", DXILResourceMDPrinterPass(dbgs())) python3kgae wrote: Should we remove DXILResourceMDPrinterPass in lib\Target\DirectX\DXILResourceAnalysis.cpp ? https://github.com/llvm/llvm-project/pull/104250 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)
@@ -0,0 +1,63 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +define void @test_bindings() { + ; RWBuffer Buf : register(u5, space3) + %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) + @llvm.dx.handle.fromBinding.tdx.TypedBuffer_v4f32_1_0_0( + i32 3, i32 5, i32 1, i32 4, i1 false) + ; CHECK: [[BUF0:%[0-9]*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 218, %dx.types.ResBind { i32 5, i32 5, i32 3, i8 1 }, i32 4, i1 false) + ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 217, %dx.types.Handle [[BUF0]], %dx.types.ResourceProperties { i32 4106, i32 1033 }) + + ; RWBuffer Buf : register(u7, space2) + %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1) + @llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_1_0_0t( + i32 2, i32 7, i32 1, i32 6, i1 false) + ; CHECK: [[BUF1:%[0-9]*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 218, %dx.types.ResBind { i32 7, i32 7, i32 2, i8 1 }, i32 6, i1 false) + ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 217, %dx.types.Handle [[BUF1]], %dx.types.ResourceProperties { i32 4106, i32 260 }) + + ; Buffer Buf[24] : register(t3, space5) + %typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) python3kgae wrote: Is typed2 an array of Buffer or just one Buffer from the array of size 24? Where does the 24 go in the output IR? https://github.com/llvm/llvm-project/pull/104251 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Register a few DXIL passes with the new PM (PR #104250)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/104250 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)
@@ -0,0 +1,63 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +define void @test_bindings() { + ; RWBuffer Buf : register(u5, space3) + %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) + @llvm.dx.handle.fromBinding.tdx.TypedBuffer_v4f32_1_0_0( + i32 3, i32 5, i32 1, i32 4, i1 false) + ; CHECK: [[BUF0:%[0-9]*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 218, %dx.types.ResBind { i32 5, i32 5, i32 3, i8 1 }, i32 4, i1 false) + ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 217, %dx.types.Handle [[BUF0]], %dx.types.ResourceProperties { i32 4106, i32 1033 }) + + ; RWBuffer Buf : register(u7, space2) + %typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1) + @llvm.dx.handle.fromBinding.tdx.TypedBuffer_i32_1_0_0t( + i32 2, i32 7, i32 1, i32 6, i1 false) + ; CHECK: [[BUF1:%[0-9]*]] = call %dx.types.Handle @dx.op.createHandleFromBinding(i32 218, %dx.types.ResBind { i32 7, i32 7, i32 2, i8 1 }, i32 6, i1 false) + ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 217, %dx.types.Handle [[BUF1]], %dx.types.ResourceProperties { i32 4106, i32 260 }) + + ; Buffer Buf[24] : register(t3, space5) + %typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) python3kgae wrote: I see. typed2 is Buf[8]. Could we update the comment to something like ; Buffer Buf[24] : register(t3, space5) ; Buffer typed2 = Buf[8] https://github.com/llvm/llvm-project/pull/104251 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferStore` to DXIL ops (PR #104253)
@@ -289,6 +289,43 @@ class OpLowerer { }); } + void lowerTypedBufferStore(Function &F) { +IRBuilder<> &IRB = OpBuilder.getIRB(); +Type *Int8Ty = IRB.getInt8Ty(); +Type *Int32Ty = IRB.getInt32Ty(); + +replaceFunction(F, [&](CallInst *CI) -> Error { + IRB.SetInsertPoint(CI); + + Value *Handle = + createTmpHandleCast(CI->getArgOperand(0), OpBuilder.getHandleType()); + Value *Index0 = CI->getArgOperand(1); + Value *Index1 = UndefValue::get(Int32Ty); + // For typed stores, the mask must always cover all four elements. + Constant *Mask = ConstantInt::get(Int8Ty, 0xF); + + Value *Data = CI->getArgOperand(2); python3kgae wrote: What if Data is not a vector4? Like store to a RWBuffer https://github.com/llvm/llvm-project/pull/104253 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferStore` to DXIL ops (PR #104253)
@@ -289,6 +289,43 @@ class OpLowerer { }); } + void lowerTypedBufferStore(Function &F) { +IRBuilder<> &IRB = OpBuilder.getIRB(); +Type *Int8Ty = IRB.getInt8Ty(); +Type *Int32Ty = IRB.getInt32Ty(); + +replaceFunction(F, [&](CallInst *CI) -> Error { + IRB.SetInsertPoint(CI); + + Value *Handle = + createTmpHandleCast(CI->getArgOperand(0), OpBuilder.getHandleType()); + Value *Index0 = CI->getArgOperand(1); + Value *Index1 = UndefValue::get(Int32Ty); + // For typed stores, the mask must always cover all four elements. + Constant *Mask = ConstantInt::get(Int8Ty, 0xF); + + Value *Data = CI->getArgOperand(2); python3kgae wrote: Do we generate typedBufferStore for spirv or will it be a different intrinsic which support different vector size? https://github.com/llvm/llvm-project/pull/104253 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Implement metadata lowering for resources (PR #104447)
@@ -13,27 +13,52 @@ #include "DXILShaderFlags.h" #include "DirectX.h" #include "llvm/ADT/StringSet.h" +#include "llvm/Analysis/DXILResource.h" #include "llvm/IR/Constants.h" #include "llvm/IR/Metadata.h" #include "llvm/IR/Module.h" +#include "llvm/InitializePasses.h" #include "llvm/Pass.h" #include "llvm/TargetParser/Triple.h" using namespace llvm; using namespace llvm::dxil; -static void emitResourceMetadata(Module &M, +static void emitResourceMetadata(Module &M, const DXILResourceMap &DRM, const dxil::Resources &MDResources) { - Metadata *SRVMD = nullptr, *UAVMD = nullptr, *CBufMD = nullptr, - *SmpMD = nullptr; - bool HasResources = false; + LLVMContext &Context = M.getContext(); + + SmallVector SRVs, UAVs, CBufs, Smps; + for (auto [_, RI] : DRM) { +switch (RI.getResourceClass()) { +case dxil::ResourceClass::SRV: + SRVs.push_back(RI.getAsMetadata(Context)); + break; +case dxil::ResourceClass::UAV: + UAVs.push_back(RI.getAsMetadata(Context)); + break; +case dxil::ResourceClass::CBuffer: + CBufs.push_back(RI.getAsMetadata(Context)); + break; +case dxil::ResourceClass::Sampler: + Smps.push_back(RI.getAsMetadata(Context)); + break; +} + } + Metadata *SRVMD = SRVs.empty() ? nullptr : MDNode::get(Context, SRVs); + Metadata *UAVMD = UAVs.empty() ? nullptr : MDNode::get(Context, UAVs); + Metadata *CBufMD = CBufs.empty() ? nullptr : MDNode::get(Context, CBufs); + Metadata *SmpMD = Smps.empty() ? nullptr : MDNode::get(Context, Smps); + bool HasResources = !DRM.empty(); if (MDResources.hasUAVs()) { +assert(!UAVMD && "Old and new UAV representations can't coexist"); python3kgae wrote: Will we remove the old UAV representations ? https://github.com/llvm/llvm-project/pull/104447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [DirectX] Implement metadata lowering for resources (PR #104447)
@@ -13,27 +13,52 @@ #include "DXILShaderFlags.h" #include "DirectX.h" #include "llvm/ADT/StringSet.h" +#include "llvm/Analysis/DXILResource.h" #include "llvm/IR/Constants.h" #include "llvm/IR/Metadata.h" #include "llvm/IR/Module.h" +#include "llvm/InitializePasses.h" #include "llvm/Pass.h" #include "llvm/TargetParser/Triple.h" using namespace llvm; using namespace llvm::dxil; -static void emitResourceMetadata(Module &M, +static void emitResourceMetadata(Module &M, const DXILResourceMap &DRM, const dxil::Resources &MDResources) { - Metadata *SRVMD = nullptr, *UAVMD = nullptr, *CBufMD = nullptr, - *SmpMD = nullptr; - bool HasResources = false; + LLVMContext &Context = M.getContext(); + + SmallVector SRVs, UAVs, CBufs, Smps; + for (auto [_, RI] : DRM) { +switch (RI.getResourceClass()) { python3kgae wrote: For a resource array like `Buffer B[10]` which used `B[2]` and `B[5]`. Will `B[2]` and `B[5]` both in DRM and get same RI? https://github.com/llvm/llvm-project/pull/104447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] b00930f - Remove dup test.
Author: Xiang Li Date: 2024-05-13T12:15:38-04:00 New Revision: b00930fe0583b03da5ddf678b8a19b7e9d46655a URL: https://github.com/llvm/llvm-project/commit/b00930fe0583b03da5ddf678b8a19b7e9d46655a DIFF: https://github.com/llvm/llvm-project/commit/b00930fe0583b03da5ddf678b8a19b7e9d46655a.diff LOG: Remove dup test. Added: Modified: llvm/unittests/Object/DXContainerTest.cpp Removed: diff --git a/llvm/unittests/Object/DXContainerTest.cpp b/llvm/unittests/Object/DXContainerTest.cpp index b83eecc339081..9da6543c520c7 100644 --- a/llvm/unittests/Object/DXContainerTest.cpp +++ b/llvm/unittests/Object/DXContainerTest.cpp @@ -126,51 +126,6 @@ TEST(DXCFile, ParseOverlappingParts) { "Part offset for part 1 begins before the previous part ends")); } -// This test verify DXILMajorVersion and DXILMinorVersion are correctly parsed. -// This test is based on the binary output constructed from this yaml. -// --- !dxcontainer -// Header: -// Hash:[ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, -// 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 ] -// Version: -// Major: 1 -// Minor: 0 -// PartCount: 1 -// Parts: -// - Name:DXIL -// Size:28 -// Program: -// MajorVersion:6 -// MinorVersion:5 -// ShaderKind: 5 -// Size:8 -// DXILMajorVersion: 1 -// DXILMinorVersion: 5 -// DXILSize:4 -// DXIL:[ 0x42, 0x43, 0xC0, 0xDE, ] -// ... -TEST(DXCFile, ParseDXILPart) { - uint8_t Buffer[] = { - 0x44, 0x58, 0x42, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x48, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, - 0x44, 0x58, 0x49, 0x4c, 0x1c, 0x00, 0x00, 0x00, 0x65, 0x00, 0x05, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x44, 0x58, 0x49, 0x4c, 0x05, 0x01, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x42, 0x43, 0xc0, 0xde}; - DXContainer C = - llvm::cantFail(DXContainer::create(getMemoryBuffer<116>(Buffer))); - EXPECT_EQ(C.getHeader().PartCount, 1u); - const std::optional &DXIL = C.getDXIL(); - EXPECT_TRUE(DXIL.has_value()); - dxbc::ProgramHeader Header = DXIL->first; - EXPECT_EQ(Header.MajorVersion, 6u); - EXPECT_EQ(Header.MinorVersion, 5u); - EXPECT_EQ(Header.ShaderKind, 5u); - EXPECT_EQ(Header.Size, 8u); - EXPECT_EQ(Header.Bitcode.MajorVersion, 1u); - EXPECT_EQ(Header.Bitcode.MinorVersion, 5u); -} - TEST(DXCFile, ParseEmptyParts) { uint8_t Buffer[] = { 0x44, 0x58, 0x42, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -260,6 +215,8 @@ TEST(DXCFile, ParseDXILPart) { EXPECT_EQ(Header.getMinorVersion(), 5u); EXPECT_EQ(Header.ShaderKind, 5u); EXPECT_EQ(Header.Size, 8u); + EXPECT_EQ(Header.Bitcode.MajorVersion, 1u); + EXPECT_EQ(Header.Bitcode.MinorVersion, 5u); } static Expected ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] RWBuffer should not have a default parameter (PR #71265)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/71265 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Add helpers to simplify HLSL resource type declarations. NFC (PR #73967)
https://github.com/python3kgae approved this pull request. https://github.com/llvm/llvm-project/pull/73967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits