[llvm-branch-commits] [llvm] release/19.x: [AArch64] Don't replace dst of SWP instructions with (X|W)ZR (#102139) (PR #102316)

2024-08-07 Thread Luke Geeson via llvm-branch-commits 

lukeg101 wrote:

U second Simon, looks good to me 

https://github.com/llvm/llvm-project/pull/102316
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[llvm-branch-commits] [llvm] release/19.x: [AArch64] Don't replace dst of SWP instructions with (X|W)ZR (#102139) (PR #102316)

2024-08-20 Thread Luke Geeson via llvm-branch-commits 

lukeg101 wrote:

Prevents a concurrency-related compiler bug (a reordering bug introduced by 
LLVM) that arises when optimisations rewrite the destination register of SWP 
instructions to be the zero register when compiling an atomic exchange 
operation. For more information on this bug and how it was found, please see: 
https://lukegeeson.com/publications/2024-03-05-CGO/



https://github.com/llvm/llvm-project/pull/102316
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