[llvm-branch-commits] [mlir] 7b713e8 - Revert "[mlir][nfc] GpuToROCDL: Remove some dead code (#121395)"
Author: Ivan Butygin
Date: 2024-12-31T18:54:48+03:00
New Revision: 7b713e8f46465186c777b4822f612bce20396e79
URL:
https://github.com/llvm/llvm-project/commit/7b713e8f46465186c777b4822f612bce20396e79
DIFF:
https://github.com/llvm/llvm-project/commit/7b713e8f46465186c777b4822f612bce20396e79.diff
LOG: Revert "[mlir][nfc] GpuToROCDL: Remove some dead code (#121395)"
This reverts commit 0b08e095cc05288d1209cf051988621f6935c940.
Added:
Modified:
mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
Removed:
diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
index a1cefe289a696f..d52a86987b1cef 100644
--- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
@@ -47,6 +47,7 @@
#include "../GPUCommon/GPUOpsLowering.h"
#include "../GPUCommon/IndexIntrinsicsOpLowering.h"
+#include "../GPUCommon/OpToFuncCallLowering.h"
namespace mlir {
#define GEN_PASS_DEF_CONVERTGPUOPSTOROCDLOPS
@@ -345,6 +346,16 @@ void
mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
target.addLegalOp();
}
+template
+static void populateOpPatterns(const LLVMTypeConverter &converter,
+ RewritePatternSet &patterns, StringRef f32Func,
+ StringRef f64Func, StringRef f32ApproxFunc,
+ StringRef f16Func) {
+ patterns.add>(converter);
+ patterns.add>(converter, f32Func, f32ApproxFunc,
+ f16Func);
+}
+
void mlir::populateGpuToROCDLConversionPatterns(
const LLVMTypeConverter &converter, RewritePatternSet &patterns,
mlir::gpu::amd::Runtime runtime) {
___
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[llvm-branch-commits] [llvm] [mlir] [mlir][Transforms] Delete 1:N dialect conversion driver (PR #121389)
llvmbot wrote:
@llvm/pr-subscribers-mlir-sparse
@llvm/pr-subscribers-mlir-spirv
Author: Matthias Springer (matthias-springer)
Changes
The 1:N dialect conversion driver has been deprecated. Use the regular dialect
conversion driver instead. This commit deletes the 1:N dialect conversion
driver.
For details, see
https://discourse.llvm.org/t/rfc-merging-1-1-and-1-n-dialect-conversions/82513.
I plan to merge this PR in April 2025.
Depends on #116524.
---
Patch is 99.66 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/121389.diff
24 Files Affected:
- (removed) mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
(-26)
- (modified) mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h (-10)
- (modified) mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h (-1)
- (modified) mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h (-1)
- (modified) mlir/include/mlir/Transforms/DialectConversion.h (-20)
- (removed) mlir/include/mlir/Transforms/OneToNTypeConversion.h (-290)
- (modified) mlir/lib/Dialect/Func/Transforms/CMakeLists.txt (-1)
- (removed) mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp (-87)
- (modified) mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt (-1)
- (removed) mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp (-215)
- (modified) mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp (+4-3)
- (modified) mlir/lib/Transforms/Utils/CMakeLists.txt (-1)
- (modified) mlir/lib/Transforms/Utils/DialectConversion.cpp (-11)
- (removed) mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp (-458)
- (removed)
mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir (-140)
- (removed)
mlir/test/Conversion/OneToNTypeConversion/scf-structural-one-to-n-type-conversion.mlir
(-183)
- (modified) mlir/test/Transforms/decompose-call-graph-types.mlir (-53)
- (modified) mlir/test/lib/Conversion/CMakeLists.txt (-1)
- (removed) mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt (-21)
- (removed)
mlir/test/lib/Conversion/OneToNTypeConversion/TestOneToNTypeConversionPass.cpp
(-261)
- (modified) mlir/tools/mlir-opt/CMakeLists.txt (-1)
- (modified) mlir/tools/mlir-opt/mlir-opt.cpp (-2)
- (modified) utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (-2)
- (modified) utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel (-17)
``diff
diff --git a/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
b/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
deleted file mode 100644
index c9e407daf9bf8c..00
--- a/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
+++ /dev/null
@@ -1,26 +0,0 @@
-//===- OneToNTypeFuncConversions.h - 1:N type conv. for Func *- C++
-*-===//
-//
-// Licensed under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#ifndef MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
-#define MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
-
-namespace mlir {
-class TypeConverter;
-class RewritePatternSet;
-} // namespace mlir
-
-namespace mlir {
-
-// Populates the provided pattern set with patterns that do 1:N type
conversions
-// on func ops. This is intended to be used with
`applyPartialOneToNConversion`.
-void populateFuncTypeConversionPatterns(const TypeConverter &typeConverter,
-RewritePatternSet &patterns);
-
-} // namespace mlir
-
-#endif // MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
diff --git a/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
b/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
index 9c1479d28c305f..00c8a5c0c517b7 100644
--- a/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
+++ b/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
@@ -63,16 +63,6 @@ void populateSCFStructuralTypeConversions(const
TypeConverter &typeConverter,
void populateSCFStructuralTypeConversionTarget(
const TypeConverter &typeConverter, ConversionTarget &target);
-/// Populates the provided pattern set with patterns that do 1:N type
-/// conversions on (some) SCF ops. This is intended to be used with
-/// applyPartialOneToNConversion.
-/// FIXME: The 1:N dialect conversion is deprecated and will be removed soon.
-/// 1:N support has been added to the regular dialect conversion driver.
-LLVM_DEPRECATED("Use populateSCFStructuralTypeConversions() instead",
-"populateSCFStructuralTypeConversions")
-void populateSCFStructuralOneToNTypeConversions(
-const TypeConverter &typeConverter, RewritePatternSet &patterns);
-
/// Populate patterns for SCF software pipelining transformation. See the
/// ForLoopPipeliningPattern for the transformation details.
void populateSCFLoopPipeliningPatterns(Rewrit
[llvm-branch-commits] [llvm] [mlir] [mlir][Transforms] Delete 1:N dialect conversion driver (PR #121389)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/121389 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [mlir] [mlir][Transforms] Delete 1:N dialect conversion driver (PR #121389)
llvmbot wrote:
@llvm/pr-subscribers-mlir-func
Author: Matthias Springer (matthias-springer)
Changes
The 1:N dialect conversion driver has been deprecated. Use the regular dialect
conversion driver instead. This commit deletes the 1:N dialect conversion
driver.
For details, see
https://discourse.llvm.org/t/rfc-merging-1-1-and-1-n-dialect-conversions/82513.
I plan to merge this PR in April 2025.
Depends on #116524.
---
Patch is 99.66 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/121389.diff
24 Files Affected:
- (removed) mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
(-26)
- (modified) mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h (-10)
- (modified) mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h (-1)
- (modified) mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h (-1)
- (modified) mlir/include/mlir/Transforms/DialectConversion.h (-20)
- (removed) mlir/include/mlir/Transforms/OneToNTypeConversion.h (-290)
- (modified) mlir/lib/Dialect/Func/Transforms/CMakeLists.txt (-1)
- (removed) mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp (-87)
- (modified) mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt (-1)
- (removed) mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp (-215)
- (modified) mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp (+4-3)
- (modified) mlir/lib/Transforms/Utils/CMakeLists.txt (-1)
- (modified) mlir/lib/Transforms/Utils/DialectConversion.cpp (-11)
- (removed) mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp (-458)
- (removed)
mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir (-140)
- (removed)
mlir/test/Conversion/OneToNTypeConversion/scf-structural-one-to-n-type-conversion.mlir
(-183)
- (modified) mlir/test/Transforms/decompose-call-graph-types.mlir (-53)
- (modified) mlir/test/lib/Conversion/CMakeLists.txt (-1)
- (removed) mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt (-21)
- (removed)
mlir/test/lib/Conversion/OneToNTypeConversion/TestOneToNTypeConversionPass.cpp
(-261)
- (modified) mlir/tools/mlir-opt/CMakeLists.txt (-1)
- (modified) mlir/tools/mlir-opt/mlir-opt.cpp (-2)
- (modified) utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (-2)
- (modified) utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel (-17)
``diff
diff --git a/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
b/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
deleted file mode 100644
index c9e407daf9bf8c..00
--- a/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
+++ /dev/null
@@ -1,26 +0,0 @@
-//===- OneToNTypeFuncConversions.h - 1:N type conv. for Func *- C++
-*-===//
-//
-// Licensed under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#ifndef MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
-#define MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
-
-namespace mlir {
-class TypeConverter;
-class RewritePatternSet;
-} // namespace mlir
-
-namespace mlir {
-
-// Populates the provided pattern set with patterns that do 1:N type
conversions
-// on func ops. This is intended to be used with
`applyPartialOneToNConversion`.
-void populateFuncTypeConversionPatterns(const TypeConverter &typeConverter,
-RewritePatternSet &patterns);
-
-} // namespace mlir
-
-#endif // MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
diff --git a/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
b/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
index 9c1479d28c305f..00c8a5c0c517b7 100644
--- a/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
+++ b/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
@@ -63,16 +63,6 @@ void populateSCFStructuralTypeConversions(const
TypeConverter &typeConverter,
void populateSCFStructuralTypeConversionTarget(
const TypeConverter &typeConverter, ConversionTarget &target);
-/// Populates the provided pattern set with patterns that do 1:N type
-/// conversions on (some) SCF ops. This is intended to be used with
-/// applyPartialOneToNConversion.
-/// FIXME: The 1:N dialect conversion is deprecated and will be removed soon.
-/// 1:N support has been added to the regular dialect conversion driver.
-LLVM_DEPRECATED("Use populateSCFStructuralTypeConversions() instead",
-"populateSCFStructuralTypeConversions")
-void populateSCFStructuralOneToNTypeConversions(
-const TypeConverter &typeConverter, RewritePatternSet &patterns);
-
/// Populate patterns for SCF software pipelining transformation. See the
/// ForLoopPipeliningPattern for the transformation details.
void populateSCFLoopPipeliningPatterns(RewritePatternSet &patterns,
diff --git
[llvm-branch-commits] [llvm] [mlir] [mlir][Transforms] Remove 1:N dialect conversion driver (PR #121389)
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/121389
The 1:N dialect conversion driver has been deprecated. Use the regular dialect
conversion driver instead. This commit deletes the 1:N dialect conversion
driver.
For details, see
https://discourse.llvm.org/t/rfc-merging-1-1-and-1-n-dialect-conversions/82513.
I plan to merge this PR in April 2025.
Depends on #116524.
>From c26bd82d581088e0780507016573c2c7f18f286a Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Tue, 31 Dec 2024 13:32:25 +0100
Subject: [PATCH] [mlir][Transforms] Remove 1:N dialect conversion driver
---
.../Func/Transforms/OneToNFuncConversions.h | 26 -
.../mlir/Dialect/SCF/Transforms/Patterns.h| 10 -
.../SPIRV/Transforms/SPIRVConversion.h| 1 -
.../Dialect/SparseTensor/Transforms/Passes.h | 1 -
.../mlir/Transforms/DialectConversion.h | 20 -
.../mlir/Transforms/OneToNTypeConversion.h| 290 ---
.../Dialect/Func/Transforms/CMakeLists.txt| 1 -
.../Func/Transforms/OneToNFuncConversions.cpp | 87
.../lib/Dialect/SCF/Transforms/CMakeLists.txt | 1 -
.../SCF/Transforms/OneToNTypeConversion.cpp | 215
.../SPIRV/Transforms/SPIRVConversion.cpp | 7 +-
mlir/lib/Transforms/Utils/CMakeLists.txt | 1 -
.../Transforms/Utils/DialectConversion.cpp| 11 -
.../Transforms/Utils/OneToNTypeConversion.cpp | 458 --
.../one-to-n-type-conversion.mlir | 140 --
...f-structural-one-to-n-type-conversion.mlir | 183 ---
.../decompose-call-graph-types.mlir | 53 --
mlir/test/lib/Conversion/CMakeLists.txt | 1 -
.../OneToNTypeConversion/CMakeLists.txt | 21 -
.../TestOneToNTypeConversionPass.cpp | 261 --
mlir/tools/mlir-opt/CMakeLists.txt| 1 -
mlir/tools/mlir-opt/mlir-opt.cpp | 2 -
.../llvm-project-overlay/mlir/BUILD.bazel | 2 -
.../mlir/test/BUILD.bazel | 17 -
24 files changed, 4 insertions(+), 1806 deletions(-)
delete mode 100644
mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
delete mode 100644 mlir/include/mlir/Transforms/OneToNTypeConversion.h
delete mode 100644 mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp
delete mode 100644 mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp
delete mode 100644 mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp
delete mode 100644
mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir
delete mode 100644
mlir/test/Conversion/OneToNTypeConversion/scf-structural-one-to-n-type-conversion.mlir
delete mode 100644 mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
delete mode 100644
mlir/test/lib/Conversion/OneToNTypeConversion/TestOneToNTypeConversionPass.cpp
diff --git a/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
b/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
deleted file mode 100644
index c9e407daf9bf8c..00
--- a/mlir/include/mlir/Dialect/Func/Transforms/OneToNFuncConversions.h
+++ /dev/null
@@ -1,26 +0,0 @@
-//===- OneToNTypeFuncConversions.h - 1:N type conv. for Func *- C++
-*-===//
-//
-// Licensed under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#ifndef MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
-#define MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
-
-namespace mlir {
-class TypeConverter;
-class RewritePatternSet;
-} // namespace mlir
-
-namespace mlir {
-
-// Populates the provided pattern set with patterns that do 1:N type
conversions
-// on func ops. This is intended to be used with
`applyPartialOneToNConversion`.
-void populateFuncTypeConversionPatterns(const TypeConverter &typeConverter,
-RewritePatternSet &patterns);
-
-} // namespace mlir
-
-#endif // MLIR_DIALECT_FUNC_TRANSFORMS_ONETONTYPEFUNCCONVERSIONS_H
diff --git a/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
b/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
index 9c1479d28c305f..00c8a5c0c517b7 100644
--- a/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
+++ b/mlir/include/mlir/Dialect/SCF/Transforms/Patterns.h
@@ -63,16 +63,6 @@ void populateSCFStructuralTypeConversions(const
TypeConverter &typeConverter,
void populateSCFStructuralTypeConversionTarget(
const TypeConverter &typeConverter, ConversionTarget &target);
-/// Populates the provided pattern set with patterns that do 1:N type
-/// conversions on (some) SCF ops. This is intended to be used with
-/// applyPartialOneToNConversion.
-/// FIXME: The 1:N dialect conversion is deprecated and will be removed soon.
-/// 1:N support has been added to the regular dialect conversion driver.
-LLVM_DEPREC
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS( return parseRegAllocFastPassOptions(*PB, Params); }, "filter=reg-filter;no-clear-vregs") + +MACHINE_FUNCTION_PASS_WITH_PARAMS( +"regallocgreedy", "RAGreedyPass", cdevadas wrote: What's the motivation for changing this passname? I would have preferred just greedy. https://github.com/llvm/llvm-project/pull/119540 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld][WebAssembly] Replace config-> with ctx.arg. (PR #119835)
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/119835 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld][WebAssembly] Replace config-> with ctx.arg. (PR #119835)
@@ -48,7 +48,7 @@ ConfigWrapper config; Ctx ctx; MaskRay wrote: Removed `ConfigWrapper config`. Yes, that was intended to be a follow-up, but it seems easy to fold it into this PR. https://github.com/llvm/llvm-project/pull/119835 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld][WebAssembly] Replace config-> with ctx.arg. (PR #119835)
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/119835 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From 40f515a8dc5036f419242ec7938434a1b84a67ac Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH 1/4] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to
NPM
---
.../llvm}/CodeGen/RegAllocPriorityAdvisor.h | 79 +++-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 1 +
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 6 +-
.../lib/CodeGen/MLRegAllocPriorityAdvisor.cpp | 184 +++---
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.h | 2 +-
llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp | 120 +---
llvm/lib/Passes/PassBuilder.cpp | 1 +
10 files changed, 294 insertions(+), 112 deletions(-)
rename llvm/{lib => include/llvm}/CodeGen/RegAllocPriorityAdvisor.h (53%)
diff --git a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
similarity index 53%
rename from llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
rename to llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
index 2d42a43c4c6372..bddfe15bf17751 100644
--- a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
+++ b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
@@ -9,8 +9,10 @@
#ifndef LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
#define LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
@@ -56,12 +58,73 @@ class DefaultPriorityAdvisor : public
RegAllocPriorityAdvisor {
unsigned getPriority(const LiveInterval &LI) const override;
};
-class RegAllocPriorityAdvisorAnalysis : public ImmutablePass {
+/// Common provider for getting the priority advisor and logging rewards.
+/// Legacy analysis forwards all calls to this provider.
+/// New analysis serves the provider as the analysis result.
+/// Expensive setup is done in the constructor, so that the advisor can be
+/// created quickly for every machine function.
+/// TODO: Remove once legacy PM support is dropped.
+class RegAllocPriorityAdvisorProvider {
public:
enum class AdvisorMode : int { Default, Release, Development };
- RegAllocPriorityAdvisorAnalysis(AdvisorMode Mode)
- : ImmutablePass(ID), Mode(Mode){};
+ RegAllocPriorityAdvisorProvider(AdvisorMode Mode) : Mode(Mode) {}
+
+ virtual ~RegAllocPriorityAdvisorProvider() = default;
+
+ virtual void logRewardIfNeeded(const MachineFunction &MF,
+ llvm::function_ref GetReward) {};
+
+ virtual std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
+
+ void setAnalyses(SlotIndexes *SI) { this->SI = SI; }
+
+ AdvisorMode getAdvisorMode() const { return Mode; }
+
+protected:
+ SlotIndexes *SI;
+
+private:
+ const AdvisorMode Mode;
+};
+
+RegAllocPriorityAdvisorProvider *createReleaseModePriorityAdvisorProvider();
+
+RegAllocPriorityAdvisorProvider *
+createDevelopmentModePriorityAdvisorProvider(LLVMContext &Ctx);
+
+class RegAllocPriorityAdvisorAnalysis
+: public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ struct Result {
+// Owned by this analysis.
+RegAllocPriorityAdvisorProvider *Provider;
+
+bool invalidate(MachineFunction &MF, const PreservedAnalyses &PA,
+MachineFunctionAnalysisManager::Invalidator &Inv) {
+ auto PAC = PA.getChecker();
+ return !PAC.preservedWhenStateless() ||
+ Inv.invalidate(MF, PA);
+}
+ };
+
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+
+private:
+ void initializeProvider(LLVMContext &Ctx);
+ std::unique_ptr Provider;
+};
+
+class RegAllocPriorityAdvisorAnalysisLegacy : public ImmutablePass {
+public:
+ enum class AdvisorMode : int { Default, Release, Development };
+
+ RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode Mode)
+ : ImmutablePass(ID), Mode(Mode) {};
static char ID;
/// Get an advisor for the given context (i.e. machine function, etc)
@@ -69,7 +132,7 @@ class RegAllocPriorityAdvisorAnalysis : public ImmutablePass
{
getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
AdvisorMode getAdvisorMode() const { return Mode; }
virtual void logRewardIfNeeded(const MachineFunction &MF,
- llvm::function_ref GetReward){};
+ llvm::function_ref GetReward) {};
protected:
// This analysis preserves everything, and subclasses may have additional
@@ -85,11 +148,13 @@ class RegAllocPriorityAdvisorAnalysis : public
ImmutablePass {
/// Specialization for the API used by the analysis infrastructure to create
/// an instance of th
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/117309 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Support] Recycler: Enforce minimum allocation size (PR #121425)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/121425
>From 686d1cd44e2eea89457e3ad7be1977d97ebf198b Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 08:33:48 +
Subject: [PATCH 1/2] [CodeGen] LiveRegMatrix: Use allocator through a
unique_ptr
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 10 +++---
llvm/lib/CodeGen/LiveRegMatrix.cpp| 2 +-
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index 486392ca3c49d5..a7c1e2bcfe1c43 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -48,7 +48,7 @@ class LiveRegMatrix {
unsigned UserTag = 0;
// The matrix is represented as a LiveIntervalUnion per register unit.
- LiveIntervalUnion::Allocator LIUAlloc;
+ std::unique_ptr LIUAlloc;
LiveIntervalUnion::Array Matrix;
// Cached queries per register unit.
@@ -59,15 +59,11 @@ class LiveRegMatrix {
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
- LiveRegMatrix() = default;
+ LiveRegMatrix() : LIUAlloc(new LiveIntervalUnion::Allocator()) {};
void releaseMemory();
public:
- LiveRegMatrix(LiveRegMatrix &&Other)
- : TRI(Other.TRI), LIS(Other.LIS), VRM(Other.VRM), UserTag(Other.UserTag),
-Matrix(std::move(Other.Matrix)), Queries(std::move(Other.Queries)),
-RegMaskTag(Other.RegMaskTag), RegMaskVirtReg(Other.RegMaskVirtReg),
-RegMaskUsable(std::move(Other.RegMaskUsable)) {}
+ LiveRegMatrix(LiveRegMatrix &&Other) = default;
void init(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM);
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index 9744c47d5a8510..3367171a15662f 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -66,7 +66,7 @@ void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals
&pLIS,
unsigned NumRegUnits = TRI->getNumRegUnits();
if (NumRegUnits != Matrix.size())
Queries.reset(new LiveIntervalUnion::Query[NumRegUnits]);
- Matrix.init(LIUAlloc, NumRegUnits);
+ Matrix.init(*LIUAlloc, NumRegUnits);
// Make sure no stale queries get reused.
invalidateVirtRegs();
>From 4496358f0a2d81710b0d3e451ccb93962c8978a7 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 1 Jan 2025 06:33:26 +
Subject: [PATCH 2/2] [Support] Recycler: Enforce minimum allocation size
Recycler uses reinterpret_cast to an internal structure of size 8.
Invalid write occurs if Recycler is used for objects with sizes less
than 8.
---
llvm/include/llvm/Support/Recycler.h| 1 +
llvm/unittests/Support/CMakeLists.txt | 1 +
llvm/unittests/Support/RecyclerTest.cpp | 46 +
3 files changed, 48 insertions(+)
create mode 100644 llvm/unittests/Support/RecyclerTest.cpp
diff --git a/llvm/include/llvm/Support/Recycler.h
b/llvm/include/llvm/Support/Recycler.h
index bbd9ae321ae30c..2bf30b0b3d5247 100644
--- a/llvm/include/llvm/Support/Recycler.h
+++ b/llvm/include/llvm/Support/Recycler.h
@@ -85,6 +85,7 @@ class Recycler {
"Recycler allocation alignment is less than object align!");
static_assert(sizeof(SubClass) <= Size,
"Recycler allocation size is less than object size!");
+static_assert(Size >= 8 && "Recycler size must be atleast 8");
return FreeList ? reinterpret_cast(pop_val())
: static_cast(Allocator.Allocate(Size, Align));
}
diff --git a/llvm/unittests/Support/CMakeLists.txt
b/llvm/unittests/Support/CMakeLists.txt
index d64f89847aa8e7..6de81658264420 100644
--- a/llvm/unittests/Support/CMakeLists.txt
+++ b/llvm/unittests/Support/CMakeLists.txt
@@ -69,6 +69,7 @@ add_llvm_unittest(SupportTests
PerThreadBumpPtrAllocatorTest.cpp
ProcessTest.cpp
ProgramTest.cpp
+ RecyclerTest.cpp
RegexTest.cpp
ReverseIterationTest.cpp
ReplaceFileTest.cpp
diff --git a/llvm/unittests/Support/RecyclerTest.cpp
b/llvm/unittests/Support/RecyclerTest.cpp
new file mode 100644
index 00..8cd763c0b83f8a
--- /dev/null
+++ b/llvm/unittests/Support/RecyclerTest.cpp
@@ -0,0 +1,46 @@
+//===--- unittest/Support/RecyclerTest.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "llvm/Support/Recycler.h"
+#include "llvm/Support/AllocatorBase.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+struct Object1 {
+ char Data[1];
+};
+
+class DecoratedMallocAllocator : public MallocAllocator {
+public:
+ int DeallocCount = 0;
+
+ template void Deallocate(T *Ptr) {
+DeallocCount++;
+MallocAllocator::Deallocate(Ptr);
+ }
+};
+
+TEST(R
[llvm-branch-commits] [llvm] [Support] Recycler: Implement move constructor (PR #120555)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120555
>From a55eb363197ba7f3bc7c175c4a77d6bc62dbfaa8 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 06:57:46 +
Subject: [PATCH 1/2] [Support] Recycler: Implement move constructor
---
llvm/include/llvm/Support/Recycler.h | 4
1 file changed, 4 insertions(+)
diff --git a/llvm/include/llvm/Support/Recycler.h
b/llvm/include/llvm/Support/Recycler.h
index 2bf30b0b3d5247..19e5faa535edd7 100644
--- a/llvm/include/llvm/Support/Recycler.h
+++ b/llvm/include/llvm/Support/Recycler.h
@@ -60,6 +60,10 @@ class Recycler {
// clear() before deleting the Recycler.
assert(!FreeList && "Non-empty recycler deleted!");
}
+ Recycler(const Recycler &) = delete;
+ Recycler(Recycler &&Other)
+ : FreeList(std::exchange(Other.FreeList, nullptr)) {}
+ Recycler() = default;
/// clear - Release all the tracked allocations to the allocator. The
/// recycler must be free of any tracked allocations before being
>From 30e38c215d219164d2257023416a2f584f312d56 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 1 Jan 2025 06:35:09 +
Subject: [PATCH 2/2] Add test
---
llvm/unittests/Support/RecyclerTest.cpp | 19 +++
1 file changed, 19 insertions(+)
diff --git a/llvm/unittests/Support/RecyclerTest.cpp
b/llvm/unittests/Support/RecyclerTest.cpp
index 8cd763c0b83f8a..0ef9c5aa0ec82b 100644
--- a/llvm/unittests/Support/RecyclerTest.cpp
+++ b/llvm/unittests/Support/RecyclerTest.cpp
@@ -18,6 +18,10 @@ struct Object1 {
char Data[1];
};
+struct Object8 {
+ char Data[8];
+};
+
class DecoratedMallocAllocator : public MallocAllocator {
public:
int DeallocCount = 0;
@@ -43,4 +47,19 @@ TEST(RecyclerTest, RecycleAllocation) {
EXPECT_EQ(Allocator.DeallocCount, 2);
}
+TEST(RecyclerTest, MoveConstructor) {
+ DecoratedMallocAllocator Allocator;
+ Recycler R;
+ Object8 *A1 = R.Allocate(Allocator);
+ Object8 *A2 = R.Allocate(Allocator);
+ R.Deallocate(Allocator, A1);
+ R.Deallocate(Allocator, A2);
+ Recycler R2(std::move(R));
+ Object8 *A3 = R2.Allocate(Allocator);
+ R2.Deallocate(Allocator, A3);
+ R.clear(Allocator); // Should not deallocate anything as it was moved from.
+ EXPECT_EQ(Allocator.DeallocCount, 0);
+ R2.clear(Allocator);
+ EXPECT_EQ(Allocator.DeallocCount, 2);
+}
} // end anonymous namespace
___
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen] LiveRegMatrix: Use allocator through a unique_ptr (PR #120556)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120556
>From 686d1cd44e2eea89457e3ad7be1977d97ebf198b Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 08:33:48 +
Subject: [PATCH] [CodeGen] LiveRegMatrix: Use allocator through a unique_ptr
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 10 +++---
llvm/lib/CodeGen/LiveRegMatrix.cpp| 2 +-
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index 486392ca3c49d5..a7c1e2bcfe1c43 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -48,7 +48,7 @@ class LiveRegMatrix {
unsigned UserTag = 0;
// The matrix is represented as a LiveIntervalUnion per register unit.
- LiveIntervalUnion::Allocator LIUAlloc;
+ std::unique_ptr LIUAlloc;
LiveIntervalUnion::Array Matrix;
// Cached queries per register unit.
@@ -59,15 +59,11 @@ class LiveRegMatrix {
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
- LiveRegMatrix() = default;
+ LiveRegMatrix() : LIUAlloc(new LiveIntervalUnion::Allocator()) {};
void releaseMemory();
public:
- LiveRegMatrix(LiveRegMatrix &&Other)
- : TRI(Other.TRI), LIS(Other.LIS), VRM(Other.VRM), UserTag(Other.UserTag),
-Matrix(std::move(Other.Matrix)), Queries(std::move(Other.Queries)),
-RegMaskTag(Other.RegMaskTag), RegMaskVirtReg(Other.RegMaskVirtReg),
-RegMaskUsable(std::move(Other.RegMaskUsable)) {}
+ LiveRegMatrix(LiveRegMatrix &&Other) = default;
void init(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM);
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index 9744c47d5a8510..3367171a15662f 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -66,7 +66,7 @@ void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals
&pLIS,
unsigned NumRegUnits = TRI->getNumRegUnits();
if (NumRegUnits != Matrix.size())
Queries.reset(new LiveIntervalUnion::Query[NumRegUnits]);
- Matrix.init(LIUAlloc, NumRegUnits);
+ Matrix.init(*LIUAlloc, NumRegUnits);
// Make sure no stale queries get reused.
invalidateVirtRegs();
___
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[llvm-branch-commits] [llvm] [Support] Recycler: Enforce minimum allocation size (PR #121425)
https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/121425 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119540
>From 757e3d26e4e0f5bdb76afd483a9e5b40e38bfeff Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 08:51:55 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegAllocGreedy to NPM
---
llvm/include/llvm/CodeGen/MachineFunction.h | 1 +
llvm/include/llvm/CodeGen/Passes.h| 2 +-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 9 +
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 185 ++
llvm/lib/CodeGen/RegAllocGreedy.h | 57 +++---
llvm/lib/Passes/PassBuilder.cpp | 1 +
8 files changed, 196 insertions(+), 63 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h
b/llvm/include/llvm/CodeGen/MachineFunction.h
index d696add8a1af53..662272e5e09618 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -901,6 +901,7 @@ class LLVM_ABI MachineFunction {
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
+ /// TODO: Add the param LiveStks
/// \returns true if no problems were found.
bool verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner = nullptr, raw_ostream *OS = nullptr,
diff --git a/llvm/include/llvm/CodeGen/Passes.h
b/llvm/include/llvm/CodeGen/Passes.h
index d1fac4a304cffe..1096c34b307f9b 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -167,7 +167,7 @@ namespace llvm {
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
- extern char &RAGreedyID;
+ extern char &RAGreedyLegacyID;
/// Basic register allocator.
extern char &RABasicID;
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index e74b85c0de886f..afe0aa6113dd21 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -250,7 +250,7 @@ void
initializeProfileSummaryInfoWrapperPassPass(PassRegistry &);
void initializePromoteLegacyPassPass(PassRegistry &);
void initializeRABasicPass(PassRegistry &);
void initializePseudoProbeInserterPass(PassRegistry &);
-void initializeRAGreedyPass(PassRegistry &);
+void initializeRAGreedyLegacyPass(PassRegistry &);
void initializeReachingDefAnalysisPass(PassRegistry &);
void initializeReassociateLegacyPassPass(PassRegistry &);
void initializeRegAllocEvictionAdvisorAnalysisLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index c23e4af1a342bd..bf12a2c9aca90b 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+"regallocgreedy", "RAGreedy",
+[](RegAllocFilterFunc F) { return RAGreedyPass(F); },
+[PB = this](StringRef Params) {
+ // TODO: parseRegAllocFilter(*PB, Params);
+ return Expected(nullptr);
+}, ""
+)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved
from
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 8efe540770913a..6acff9cd21134b 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -111,7 +111,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializeRABasicPass(Registry);
- initializeRAGreedyPass(Registry);
+ initializeRAGreedyLegacyPass(Registry);
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp
b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 5a7282809f5f7d..3a96325144efbc 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -43,8 +43,10 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedyPass.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
@@ -55,6 +57,7 @@
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
+#include "llvm/IR/Analysis.h"
#include "l
[llvm-branch-commits] [llvm] Spiller: Detach legacy pass and supply analyses instead (PR #119181)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119181
>From 8151817211d10ae9cf8f9a931aa6e2416134bda8 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 9 Dec 2024 07:58:48 +
Subject: [PATCH] Spiller: Deatach legacy pass and supply analyses instead
---
llvm/include/llvm/CodeGen/Spiller.h | 16 +++--
llvm/lib/CodeGen/InlineSpiller.cpp | 36 +++--
llvm/lib/CodeGen/RegAllocBasic.cpp | 16 +
llvm/lib/CodeGen/RegAllocGreedy.cpp | 4 +++-
llvm/lib/CodeGen/RegAllocPBQP.cpp | 5 +++-
5 files changed, 46 insertions(+), 31 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/Spiller.h
b/llvm/include/llvm/CodeGen/Spiller.h
index 51ad36bc6b1f8b..3132cefeb6c68a 100644
--- a/llvm/include/llvm/CodeGen/Spiller.h
+++ b/llvm/include/llvm/CodeGen/Spiller.h
@@ -19,6 +19,10 @@ class MachineFunction;
class MachineFunctionPass;
class VirtRegMap;
class VirtRegAuxInfo;
+class LiveIntervals;
+class LiveStacks;
+class MachineDominatorTree;
+class MachineBlockFrequencyInfo;
/// Spiller interface.
///
@@ -41,12 +45,20 @@ class Spiller {
virtual ArrayRef getReplacedRegs() = 0;
virtual void postOptimization() {}
+
+ struct RequiredAnalyses {
+LiveIntervals &LIS;
+LiveStacks &LSS;
+MachineDominatorTree &MDT;
+const MachineBlockFrequencyInfo &MBFI;
+ };
};
/// Create and return a spiller that will insert spill code directly instead
/// of deferring though VirtRegMap.
-Spiller *createInlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF,
- VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
+Spiller *createInlineSpiller(const Spiller::RequiredAnalyses &Analyses,
+ MachineFunction &MF, VirtRegMap &VRM,
+ VirtRegAuxInfo &VRAI);
} // end namespace llvm
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp
b/llvm/lib/CodeGen/InlineSpiller.cpp
index 64f290f5930a1b..b9768d5c63a5d1 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -75,7 +75,6 @@ RestrictStatepointRemat("restrict-statepoint-remat",
cl::desc("Restrict remat for statepoint operands"));
namespace {
-
class HoistSpillHelper : private LiveRangeEdit::Delegate {
MachineFunction &MF;
LiveIntervals &LIS;
@@ -128,15 +127,11 @@ class HoistSpillHelper : private LiveRangeEdit::Delegate {
DenseMap &SpillsToIns);
public:
- HoistSpillHelper(MachineFunctionPass &pass, MachineFunction &mf,
- VirtRegMap &vrm)
- : MF(mf), LIS(pass.getAnalysis().getLIS()),
-LSS(pass.getAnalysis().getLS()),
-MDT(pass.getAnalysis().getDomTree()),
+ HoistSpillHelper(const Spiller::RequiredAnalyses &Analyses,
+ MachineFunction &mf, VirtRegMap &vrm)
+ : MF(mf), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(vrm), MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
-TRI(*mf.getSubtarget().getRegisterInfo()),
-MBFI(
-
pass.getAnalysis().getMBFI()),
+TRI(*mf.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
IPA(LIS, mf.getNumBlockIDs()) {}
void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
@@ -190,16 +185,12 @@ class InlineSpiller : public Spiller {
~InlineSpiller() override = default;
public:
- InlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF, VirtRegMap
&VRM,
-VirtRegAuxInfo &VRAI)
- : MF(MF), LIS(Pass.getAnalysis().getLIS()),
-LSS(Pass.getAnalysis().getLS()),
-MDT(Pass.getAnalysis().getDomTree()),
+ InlineSpiller(const Spiller::RequiredAnalyses &Analyses, MachineFunction &MF,
+VirtRegMap &VRM, VirtRegAuxInfo &VRAI)
+ : MF(MF), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(VRM), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
-TRI(*MF.getSubtarget().getRegisterInfo()),
-MBFI(
-
Pass.getAnalysis().getMBFI()),
-HSpiller(Pass, MF, VRM), VRAI(VRAI) {}
+TRI(*MF.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
+HSpiller(Analyses, MF, VRM), VRAI(VRAI) {}
void spill(LiveRangeEdit &) override;
ArrayRef getSpilledRegs() override { return RegsToSpill; }
@@ -237,10 +228,11 @@ Spiller::~Spiller() = default;
void Spiller::anchor() {}
-Spiller *llvm::createInlineSpiller(MachineFunctionPass &Pass,
- MachineFunction &MF, VirtRegMap &VRM,
- VirtRegAuxInfo &VRAI) {
- return new InlineSpiller(Pass, MF, VRM, VRAI);
+Spiller *
+llvm::createInlineSpiller(const InlineSpiller::RequiredAnalyses &Analyses,
+ MachineFunction &MF, VirtRegMap &VRM,
+ VirtRegAuxInfo &VRAI) {
+ return new InlineSpiller(Analyses, MF, VRM, VRAI);
}
//===-
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
@@ -146,11 +149,139 @@ static cl::opt SplitThresholdForRegWithHint(
static RegisterRegAlloc greedyRegAlloc("greedy", "greedy register allocator",
createGreedyRegisterAllocator);
-char RAGreedy::ID = 0;
-char &llvm::RAGreedyID = RAGreedy::ID;
+namespace {
+class RAGreedyLegacy : public MachineFunctionPass {
+ RegAllocFilterFunc F;
-INITIALIZE_PASS_BEGIN(RAGreedy, "greedy",
-"Greedy Register Allocator", false, false)
+public:
+ RAGreedyLegacy(const RegAllocFilterFunc F = nullptr);
+
+ static char ID;
+ /// Return the pass name.
+ StringRef getPassName() const override { return "Greedy Register Allocator";
}
+
+ /// RAGreedy analysis usage.
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ /// Perform register allocation.
+ bool runOnMachineFunction(MachineFunction &mf) override;
+
+ MachineFunctionProperties getRequiredProperties() const override {
+return MachineFunctionProperties().set(
+MachineFunctionProperties::Property::NoPHIs);
+ }
+
+ MachineFunctionProperties getClearedProperties() const override {
+return MachineFunctionProperties().set(
+MachineFunctionProperties::Property::IsSSA);
+ }
+};
+
+} // end anonymous namespace
+
+RAGreedyLegacy::RAGreedyLegacy(const RegAllocFilterFunc F)
+: MachineFunctionPass(ID), F(F) {
+ initializeRAGreedyLegacyPass(*PassRegistry::getPassRegistry());
+}
+
+RAGreedy::RAGreedy(const RegAllocFilterFunc F) : RegAllocBase(F) {}
+
+void RAGreedy::setAnalyses(RequiredAnalyses &Analyses) {
+ VRM = Analyses.VRM;
+ LIS = Analyses.LIS;
+ Matrix = Analyses.LRM;
+ Indexes = Analyses.Indexes;
+ MBFI = Analyses.MBFI;
+ DomTree = Analyses.DomTree;
+ Loops = Analyses.Loops;
+ ORE = Analyses.ORE;
+ Bundles = Analyses.Bundles;
+ SpillPlacer = Analyses.SpillPlacer;
+ DebugVars = Analyses.DebugVars;
+ LSS = Analyses.LSS;
+ EvictProvider = Analyses.EvictProvider;
+ PriorityProvider = Analyses.PriorityProvider;
+}
+
+void RAGreedyPass::printPipeline(raw_ostream &OS,
function_ref MapClassName2PassName) const {
+ StringRef FilterName = Opts.FilterName.empty() ? "all" : Opts.FilterName;
+ OS << "regallocgreedy<" << FilterName << ">";
+}
+
+PreservedAnalyses RAGreedyPass::run(MachineFunction &MF,
+MachineFunctionAnalysisManager &MFAM) {
+ MFPropsModifier _(*this, MF);
+
+ RAGreedy Impl(Opts.Filter);
+ RAGreedy::RequiredAnalyses Analyses;
+
+ Analyses.LIS = &MFAM.getResult(MF);
+ Analyses.LRM = &MFAM.getResult(MF);
+ Analyses.LSS = &MFAM.getResult(MF);
+ Analyses.Indexes = &MFAM.getResult(MF);
+ Analyses.MBFI = &MFAM.getResult(MF);
+ Analyses.DomTree = &MFAM.getResult(MF);
+ Analyses.ORE = &MFAM.getResult(MF);
+ Analyses.Loops = &MFAM.getResult(MF);
+ Analyses.Bundles = &MFAM.getResult(MF);
+ Analyses.SpillPlacer = &MFAM.getResult(MF);
+ Analyses.DebugVars = &MFAM.getResult(MF);
+ Analyses.EvictProvider =
+ MFAM.getResult(MF).Provider;
+ Analyses.PriorityProvider =
+ MFAM.getResult(MF).Provider;
+ Analyses.VRM = &MFAM.getResult(MF);
+
+ Impl.setAnalyses(Analyses);
+ bool Changed = Impl.run(MF);
+ if (!Changed)
+return PreservedAnalyses::all();
+ auto PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet();
+ PA.preserve();
+ PA.preserve();
+ PA.preserve();
+ PA.preserve();
+ PA.preserve();
+ PA.preserve();
+ PA.preserve();
optimisan wrote:
Right.
https://github.com/llvm/llvm-project/pull/119540
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[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)
https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/120557 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Record parameterized machine pass names to PIC (PR #120554)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120554
>From 284660623c6c30071f74cefbd3d1f7a7350ba7d0 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 16 Dec 2024 08:48:41 +
Subject: [PATCH] [NewPm][CodeGen] Record parameterized machine pass names to
PIC
---
llvm/include/llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 5a4e79d7225db1..29763995e8b516 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -179,7 +179,7 @@ MACHINE_FUNCTION_PASS("verify",
MachineTraceMetricsVerifi
PARAMS)
#endif
MACHINE_FUNCTION_PASS_WITH_PARAMS(
-"regallocfast", "RegAllocFast",
+"regallocfast", "RegAllocFastPass",
[](RegAllocFastPassOptions Opts) { return RegAllocFastPass(Opts); },
[PB = this](StringRef Params) {
return parseRegAllocFastPassOptions(*PB, Params);
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index aa5b9077376e05..2dc20d0de6ae4b 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -493,6 +493,9 @@ PassBuilder::PassBuilder(TargetMachine *TM,
PipelineTuningOptions PTO,
PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
\
PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
+#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER,
\
+ PARAMS)
\
+ PIC->addClassToPassName(CLASS, NAME);
#include "llvm/Passes/MachinePassRegistry.def"
});
}
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[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to NPM (PR #117309)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/117309
>From e7cf284d24a2269f7cde1ff9463663945ceae064 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Fri, 22 Nov 2024 09:31:50 +
Subject: [PATCH 1/7] [CodeGen][NewPM] Port RegAllocEvictionAdvisor analysis to
NPM
---
.../llvm}/CodeGen/RegAllocEvictionAdvisor.h | 69 +++-
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 6 +-
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 167 +-
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 107 ---
llvm/lib/CodeGen/RegAllocGreedy.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.h | 1 -
llvm/lib/CodeGen/RegAllocPriorityAdvisor.h| 2 +-
llvm/lib/Passes/PassBuilder.cpp | 1 +
llvm/lib/Passes/PassRegistry.def | 1 +
10 files changed, 284 insertions(+), 81 deletions(-)
rename llvm/{lib => include/llvm}/CodeGen/RegAllocEvictionAdvisor.h (75%)
diff --git a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.h
b/llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
similarity index 75%
rename from llvm/lib/CodeGen/RegAllocEvictionAdvisor.h
rename to llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
index 52dd946a685400..847bf032235c1d 100644
--- a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.h
+++ b/llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
@@ -9,11 +9,13 @@
#ifndef LLVM_CODEGEN_REGALLOCEVICTIONADVISOR_H
#define LLVM_CODEGEN_REGALLOCEVICTIONADVISOR_H
+#include "llvm/ADT/Any.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/Config/llvm-config.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/MC/MCRegister.h"
#include "llvm/Pass.h"
@@ -164,12 +166,12 @@ class RegAllocEvictionAdvisor {
///
/// Because we need to offer additional services in 'development' mode, the
/// implementations of this analysis need to implement RTTI support.
-class RegAllocEvictionAdvisorAnalysis : public ImmutablePass {
+class RegAllocEvictionAdvisorAnalysisLegacy : public ImmutablePass {
public:
enum class AdvisorMode : int { Default, Release, Development };
- RegAllocEvictionAdvisorAnalysis(AdvisorMode Mode)
- : ImmutablePass(ID), Mode(Mode){};
+ RegAllocEvictionAdvisorAnalysisLegacy(AdvisorMode Mode)
+ : ImmutablePass(ID), Mode(Mode) {};
static char ID;
/// Get an advisor for the given context (i.e. machine function, etc)
@@ -177,7 +179,7 @@ class RegAllocEvictionAdvisorAnalysis : public
ImmutablePass {
getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
AdvisorMode getAdvisorMode() const { return Mode; }
virtual void logRewardIfNeeded(const MachineFunction &MF,
- llvm::function_ref GetReward){};
+ llvm::function_ref GetReward) {};
protected:
// This analysis preserves everything, and subclasses may have additional
@@ -191,13 +193,66 @@ class RegAllocEvictionAdvisorAnalysis : public
ImmutablePass {
const AdvisorMode Mode;
};
+/// Common provider for legacy and new pass managers.
+/// This keeps the state for logging, and sets up and holds the provider.
+/// The legacy pass itself used to keep the logging state and provider,
+/// so this extraction helps the NPM analysis to reuse the logic.
+class RegAllocEvictionAdvisorProvider {
+public:
+ enum class AdvisorMode : int { Default, Release, Development };
+ RegAllocEvictionAdvisorProvider(AdvisorMode Mode) : Mode(Mode) {}
+
+ virtual ~RegAllocEvictionAdvisorProvider() = default;
+
+ virtual bool doInitialization(Module &M) { return false; }
+
+ virtual void logRewardIfNeeded(const MachineFunction &MF,
+ llvm::function_ref GetReward) {}
+
+ virtual std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
+
+ /// Set the analyses that the advisor needs to use as they might not be
+ /// available before the advisor is created.
+ virtual void setAnalyses(std::initializer_list AnalysisP) {}
+
+ AdvisorMode getAdvisorMode() const { return Mode; }
+
+private:
+ const AdvisorMode Mode;
+};
+
+RegAllocEvictionAdvisorProvider *createReleaseModeAdvisorProvider();
+RegAllocEvictionAdvisorProvider *createDevelopmentModeAdvisorProvider();
+
+/// A Module analysis for fetching the Eviction Advisor. This is not a
+/// MachineFunction analysis for two reasons:
+/// - in the ML implementation case, the evaluator is stateless but (especially
+/// in the development mode) expensive to set up. With a Module Analysis, we
+/// `require` it and set it up once.
+/// - in the 'development' mode ML case, we want to capture the training log
+/// during allocation (this is a log of features encountered and decisions
+/// made), and then measure a score, potentially a few steps after allocation
+/// completes. So we need a Module analysis to keep the l
[llvm-branch-commits] [llvm] [Support] Recycler: Enforce minimum allocation size (PR #121425)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/121425
>From ac8a44c89265b6a18907cc79332e9009dc7083bb Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 1 Jan 2025 06:33:26 +
Subject: [PATCH] [Support] Recycler: Enforce minimum allocation size
Recycler uses reinterpret_cast to an internal structure of size 8.
Invalid write occurs if Recycler is used for objects with sizes less
than 8.
---
llvm/include/llvm/Support/Recycler.h| 2 ++
llvm/unittests/Support/CMakeLists.txt | 1 +
llvm/unittests/Support/RecyclerTest.cpp | 46 +
3 files changed, 49 insertions(+)
create mode 100644 llvm/unittests/Support/RecyclerTest.cpp
diff --git a/llvm/include/llvm/Support/Recycler.h
b/llvm/include/llvm/Support/Recycler.h
index bbd9ae321ae30c..8cc882ea5fa058 100644
--- a/llvm/include/llvm/Support/Recycler.h
+++ b/llvm/include/llvm/Support/Recycler.h
@@ -85,6 +85,8 @@ class Recycler {
"Recycler allocation alignment is less than object align!");
static_assert(sizeof(SubClass) <= Size,
"Recycler allocation size is less than object size!");
+static_assert(Size >= sizeof(FreeNode) &&
+ "Recycler size must be atleast 8");
return FreeList ? reinterpret_cast(pop_val())
: static_cast(Allocator.Allocate(Size, Align));
}
diff --git a/llvm/unittests/Support/CMakeLists.txt
b/llvm/unittests/Support/CMakeLists.txt
index d64f89847aa8e7..6de81658264420 100644
--- a/llvm/unittests/Support/CMakeLists.txt
+++ b/llvm/unittests/Support/CMakeLists.txt
@@ -69,6 +69,7 @@ add_llvm_unittest(SupportTests
PerThreadBumpPtrAllocatorTest.cpp
ProcessTest.cpp
ProgramTest.cpp
+ RecyclerTest.cpp
RegexTest.cpp
ReverseIterationTest.cpp
ReplaceFileTest.cpp
diff --git a/llvm/unittests/Support/RecyclerTest.cpp
b/llvm/unittests/Support/RecyclerTest.cpp
new file mode 100644
index 00..8cd763c0b83f8a
--- /dev/null
+++ b/llvm/unittests/Support/RecyclerTest.cpp
@@ -0,0 +1,46 @@
+//===--- unittest/Support/RecyclerTest.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "llvm/Support/Recycler.h"
+#include "llvm/Support/AllocatorBase.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+struct Object1 {
+ char Data[1];
+};
+
+class DecoratedMallocAllocator : public MallocAllocator {
+public:
+ int DeallocCount = 0;
+
+ template void Deallocate(T *Ptr) {
+DeallocCount++;
+MallocAllocator::Deallocate(Ptr);
+ }
+};
+
+TEST(RecyclerTest, RecycleAllocation) {
+ DecoratedMallocAllocator Allocator;
+ // Recycler needs size to be atleast 8 bytes.
+ Recycler R;
+ Object1 *A1 = R.Allocate(Allocator);
+ Object1 *A2 = R.Allocate(Allocator);
+ R.Deallocate(Allocator, A2);
+ Object1 *A3 = R.Allocate(Allocator);
+ EXPECT_EQ(A2, A3); // reuse the deallocated object.
+ R.Deallocate(Allocator, A1);
+ R.Deallocate(Allocator, A3);
+ R.clear(Allocator); // Should deallocate A1 and A3.
+ EXPECT_EQ(Allocator.DeallocCount, 2);
+}
+
+} // end anonymous namespace
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[llvm-branch-commits] [llvm] [Support] Recycler: Implement move constructor (PR #120555)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120555
>From 3b1d3fc308754509c5b550ff3677ffaef0343f40 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 06:57:46 +
Subject: [PATCH 1/2] [Support] Recycler: Implement move constructor
---
llvm/include/llvm/Support/Recycler.h | 4
1 file changed, 4 insertions(+)
diff --git a/llvm/include/llvm/Support/Recycler.h
b/llvm/include/llvm/Support/Recycler.h
index 8cc882ea5fa058..f105d80563ba93 100644
--- a/llvm/include/llvm/Support/Recycler.h
+++ b/llvm/include/llvm/Support/Recycler.h
@@ -60,6 +60,10 @@ class Recycler {
// clear() before deleting the Recycler.
assert(!FreeList && "Non-empty recycler deleted!");
}
+ Recycler(const Recycler &) = delete;
+ Recycler(Recycler &&Other)
+ : FreeList(std::exchange(Other.FreeList, nullptr)) {}
+ Recycler() = default;
/// clear - Release all the tracked allocations to the allocator. The
/// recycler must be free of any tracked allocations before being
>From f5baddf0b51d690903af0b37f5280054a19e4c3e Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 1 Jan 2025 06:35:09 +
Subject: [PATCH 2/2] Add test
---
llvm/unittests/Support/RecyclerTest.cpp | 19 +++
1 file changed, 19 insertions(+)
diff --git a/llvm/unittests/Support/RecyclerTest.cpp
b/llvm/unittests/Support/RecyclerTest.cpp
index 8cd763c0b83f8a..0ef9c5aa0ec82b 100644
--- a/llvm/unittests/Support/RecyclerTest.cpp
+++ b/llvm/unittests/Support/RecyclerTest.cpp
@@ -18,6 +18,10 @@ struct Object1 {
char Data[1];
};
+struct Object8 {
+ char Data[8];
+};
+
class DecoratedMallocAllocator : public MallocAllocator {
public:
int DeallocCount = 0;
@@ -43,4 +47,19 @@ TEST(RecyclerTest, RecycleAllocation) {
EXPECT_EQ(Allocator.DeallocCount, 2);
}
+TEST(RecyclerTest, MoveConstructor) {
+ DecoratedMallocAllocator Allocator;
+ Recycler R;
+ Object8 *A1 = R.Allocate(Allocator);
+ Object8 *A2 = R.Allocate(Allocator);
+ R.Deallocate(Allocator, A1);
+ R.Deallocate(Allocator, A2);
+ Recycler R2(std::move(R));
+ Object8 *A3 = R2.Allocate(Allocator);
+ R2.Deallocate(Allocator, A3);
+ R.clear(Allocator); // Should not deallocate anything as it was moved from.
+ EXPECT_EQ(Allocator.DeallocCount, 0);
+ R2.clear(Allocator);
+ EXPECT_EQ(Allocator.DeallocCount, 2);
+}
} // end anonymous namespace
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[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From 6370f574d21b725c96c3b370d4c97b6cf64d6d2b Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH 1/4] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to
NPM
---
.../llvm}/CodeGen/RegAllocPriorityAdvisor.h | 79 +++-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 1 +
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 6 +-
.../lib/CodeGen/MLRegAllocPriorityAdvisor.cpp | 184 +++---
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.h | 2 +-
llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp | 120 +---
llvm/lib/Passes/PassBuilder.cpp | 1 +
10 files changed, 294 insertions(+), 112 deletions(-)
rename llvm/{lib => include/llvm}/CodeGen/RegAllocPriorityAdvisor.h (53%)
diff --git a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
similarity index 53%
rename from llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
rename to llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
index 2d42a43c4c6372..bddfe15bf17751 100644
--- a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
+++ b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
@@ -9,8 +9,10 @@
#ifndef LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
#define LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
@@ -56,12 +58,73 @@ class DefaultPriorityAdvisor : public
RegAllocPriorityAdvisor {
unsigned getPriority(const LiveInterval &LI) const override;
};
-class RegAllocPriorityAdvisorAnalysis : public ImmutablePass {
+/// Common provider for getting the priority advisor and logging rewards.
+/// Legacy analysis forwards all calls to this provider.
+/// New analysis serves the provider as the analysis result.
+/// Expensive setup is done in the constructor, so that the advisor can be
+/// created quickly for every machine function.
+/// TODO: Remove once legacy PM support is dropped.
+class RegAllocPriorityAdvisorProvider {
public:
enum class AdvisorMode : int { Default, Release, Development };
- RegAllocPriorityAdvisorAnalysis(AdvisorMode Mode)
- : ImmutablePass(ID), Mode(Mode){};
+ RegAllocPriorityAdvisorProvider(AdvisorMode Mode) : Mode(Mode) {}
+
+ virtual ~RegAllocPriorityAdvisorProvider() = default;
+
+ virtual void logRewardIfNeeded(const MachineFunction &MF,
+ llvm::function_ref GetReward) {};
+
+ virtual std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
+
+ void setAnalyses(SlotIndexes *SI) { this->SI = SI; }
+
+ AdvisorMode getAdvisorMode() const { return Mode; }
+
+protected:
+ SlotIndexes *SI;
+
+private:
+ const AdvisorMode Mode;
+};
+
+RegAllocPriorityAdvisorProvider *createReleaseModePriorityAdvisorProvider();
+
+RegAllocPriorityAdvisorProvider *
+createDevelopmentModePriorityAdvisorProvider(LLVMContext &Ctx);
+
+class RegAllocPriorityAdvisorAnalysis
+: public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ struct Result {
+// Owned by this analysis.
+RegAllocPriorityAdvisorProvider *Provider;
+
+bool invalidate(MachineFunction &MF, const PreservedAnalyses &PA,
+MachineFunctionAnalysisManager::Invalidator &Inv) {
+ auto PAC = PA.getChecker();
+ return !PAC.preservedWhenStateless() ||
+ Inv.invalidate(MF, PA);
+}
+ };
+
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+
+private:
+ void initializeProvider(LLVMContext &Ctx);
+ std::unique_ptr Provider;
+};
+
+class RegAllocPriorityAdvisorAnalysisLegacy : public ImmutablePass {
+public:
+ enum class AdvisorMode : int { Default, Release, Development };
+
+ RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode Mode)
+ : ImmutablePass(ID), Mode(Mode) {};
static char ID;
/// Get an advisor for the given context (i.e. machine function, etc)
@@ -69,7 +132,7 @@ class RegAllocPriorityAdvisorAnalysis : public ImmutablePass
{
getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
AdvisorMode getAdvisorMode() const { return Mode; }
virtual void logRewardIfNeeded(const MachineFunction &MF,
- llvm::function_ref GetReward){};
+ llvm::function_ref GetReward) {};
protected:
// This analysis preserves everything, and subclasses may have additional
@@ -85,11 +148,13 @@ class RegAllocPriorityAdvisorAnalysis : public
ImmutablePass {
/// Specialization for the API used by the analysis infrastructure to create
/// an instance of th
[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120557
>From 1b7197beff8454d649d8972d4434d4fb0a8b3f66 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 10:57:21 +
Subject: [PATCH 1/4] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline
---
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 18 +++-
.../llvm/Passes/MachinePassRegistry.def | 4 ++--
.../include/llvm/Target/CGPassBuilderOption.h | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 13
...plicit-def-remat-requires-impdef-check.mir | 1 +
...implicit-def-with-impdef-greedy-assert.mir | 1 +
llvm/test/CodeGen/AArch64/pr51516.mir | 1 +
llvm/test/CodeGen/AArch64/spill-fold.mir | 2 ++
.../extend-phi-subrange-not-in-parent.mir | 1 +
llvm/test/CodeGen/MIR/Generic/runPass.mir | 1 +
.../SystemZ/clear-liverange-spillreg.mir | 1 +
llvm/test/CodeGen/Thumb/high-reg-clobber.mir | 1 +
llvm/test/CodeGen/X86/limit-split-cost.mir| 1 +
.../test/tools/llc/new-pm/regalloc-amdgpu.mir | 17 +--
llvm/tools/llc/NewPMDriver.cpp| 21 +++
15 files changed, 71 insertions(+), 14 deletions(-)
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 28768a72c83fa3..4135abdad90ff6 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -1059,7 +1059,7 @@ void CodeGenPassBuilder::addMachineSSAOptimization(
///
/// A target that uses the standard regalloc pass order for fast or optimized
/// allocation may still override this for per-target regalloc
-/// selection. But -regalloc=... always takes precedence.
+/// selection. But -regalloc-npm=... always takes precedence.
template
void CodeGenPassBuilder::addTargetRegisterAllocator(
AddMachinePass &addPass, bool Optimized) const {
@@ -1076,6 +1076,22 @@ template
void CodeGenPassBuilder::addRegAllocPass(
AddMachinePass &addPass, bool Optimized) const {
// TODO: Parse Opt.RegAlloc to add register allocator.
+ // Use the specified -regalloc-npm={basic|greedy|fast|pbqp}
+ if (Opt.RegAlloc > RegAllocType::Default) {
+switch (Opt.RegAlloc) {
+ case RegAllocType::Fast:
+addPass(RegAllocFastPass());
+break;
+ case RegAllocType::Greedy:
+addPass(RAGreedyPass());
+break;
+ default:
+llvm_unreachable("Register allocator not supported yet.");
+}
+return;
+ }
+ // -regalloc=default or unspecified, so pick based on the optimization level.
+ derived().addTargetRegisterAllocator(addPass, Optimized);
}
template
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 35314473caa610..61c3c688eda52f 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -188,12 +188,12 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
},
"filter=reg-filter;no-clear-vregs")
+// 'all' is the default filter
MACHINE_FUNCTION_PASS_WITH_PARAMS(
"regallocgreedy", "RAGreedyPass",
[](RAGreedyPass::Options Opts) { return RAGreedyPass(Opts); },
[PB = this](StringRef Params) {
- // TODO: parseRegAllocGreedyFilterFunc(*PB, Params);
- return Expected(RAGreedyPass::Options{});
+ return parseRegAllocGreedyFilterFunc(*PB, Params);
}, "reg-filter"
)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
diff --git a/llvm/include/llvm/Target/CGPassBuilderOption.h
b/llvm/include/llvm/Target/CGPassBuilderOption.h
index 29bdb9c1746d3c..05c84c1bdec851 100644
--- a/llvm/include/llvm/Target/CGPassBuilderOption.h
+++ b/llvm/include/llvm/Target/CGPassBuilderOption.h
@@ -53,7 +53,7 @@ struct CGPassBuilderOption {
bool RequiresCodeGenSCCOrder = false;
RunOutliner EnableMachineOutliner = RunOutliner::TargetDefault;
- StringRef RegAlloc = "default";
+ RegAllocType RegAlloc = RegAllocType::Default;
std::optional EnableGlobalISelAbort;
std::string FSProfileFile;
std::string FSRemappingFile;
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 76359f369946c4..a733df8c4ba2e8 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -1312,6 +1312,19 @@ parseBoundsCheckingOptions(StringRef Params) {
return Mode;
}
+Expected parseRegAllocGreedyFilterFunc(PassBuilder &PB,
StringRef Params) {
+ if (Params.empty() || Params == "all") {
+return RAGreedyPass::Options();
+ }
+ std::optional Filter = PB.parseRegAllocFilter(Params);
+ if (!Filter) {
+return make_error(
+formatv("invalid regallocgreedy register filter '{0}' ", Params).str(),
+inconvertibleErrorCode());
+ }
+ return RAGreedyPass::Options{*Filter, Params};
+}
+
} // namespace
/// Tests whether a pass name starts with a valid prefix for a default pipeline
diff --git
a/llvm/test/CodeGen/AArch6
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119540
>From fe3dcff6c3c83a9847c88fe10c21b8d4b3c42733 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 08:51:55 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegAllocGreedy to NPM
---
llvm/include/llvm/CodeGen/MachineFunction.h | 1 +
llvm/include/llvm/CodeGen/Passes.h| 2 +-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 9 +
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 185 ++
llvm/lib/CodeGen/RegAllocGreedy.h | 57 +++---
llvm/lib/Passes/PassBuilder.cpp | 1 +
8 files changed, 196 insertions(+), 63 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h
b/llvm/include/llvm/CodeGen/MachineFunction.h
index d696add8a1af53..662272e5e09618 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -901,6 +901,7 @@ class LLVM_ABI MachineFunction {
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
+ /// TODO: Add the param LiveStks
/// \returns true if no problems were found.
bool verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner = nullptr, raw_ostream *OS = nullptr,
diff --git a/llvm/include/llvm/CodeGen/Passes.h
b/llvm/include/llvm/CodeGen/Passes.h
index d1fac4a304cffe..1096c34b307f9b 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -167,7 +167,7 @@ namespace llvm {
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
- extern char &RAGreedyID;
+ extern char &RAGreedyLegacyID;
/// Basic register allocator.
extern char &RABasicID;
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index e74b85c0de886f..afe0aa6113dd21 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -250,7 +250,7 @@ void
initializeProfileSummaryInfoWrapperPassPass(PassRegistry &);
void initializePromoteLegacyPassPass(PassRegistry &);
void initializeRABasicPass(PassRegistry &);
void initializePseudoProbeInserterPass(PassRegistry &);
-void initializeRAGreedyPass(PassRegistry &);
+void initializeRAGreedyLegacyPass(PassRegistry &);
void initializeReachingDefAnalysisPass(PassRegistry &);
void initializeReassociateLegacyPassPass(PassRegistry &);
void initializeRegAllocEvictionAdvisorAnalysisLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index c23e4af1a342bd..bf12a2c9aca90b 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+"regallocgreedy", "RAGreedy",
+[](RegAllocFilterFunc F) { return RAGreedyPass(F); },
+[PB = this](StringRef Params) {
+ // TODO: parseRegAllocFilter(*PB, Params);
+ return Expected(nullptr);
+}, ""
+)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved
from
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 8efe540770913a..6acff9cd21134b 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -111,7 +111,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializeRABasicPass(Registry);
- initializeRAGreedyPass(Registry);
+ initializeRAGreedyLegacyPass(Registry);
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp
b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 5a7282809f5f7d..3a96325144efbc 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -43,8 +43,10 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedyPass.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
@@ -55,6 +57,7 @@
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
+#include "llvm/IR/Analysis.h"
#include "l
[llvm-branch-commits] [llvm] Spiller: Detach legacy pass and supply analyses instead (PR #119181)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119181
>From 89b903c602fb056f505f6a3470bdc75037ed22ba Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 9 Dec 2024 07:58:48 +
Subject: [PATCH] Spiller: Deatach legacy pass and supply analyses instead
---
llvm/include/llvm/CodeGen/Spiller.h | 16 +++--
llvm/lib/CodeGen/InlineSpiller.cpp | 36 +++--
llvm/lib/CodeGen/RegAllocBasic.cpp | 16 +
llvm/lib/CodeGen/RegAllocGreedy.cpp | 4 +++-
llvm/lib/CodeGen/RegAllocPBQP.cpp | 5 +++-
5 files changed, 46 insertions(+), 31 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/Spiller.h
b/llvm/include/llvm/CodeGen/Spiller.h
index 51ad36bc6b1f8b..3132cefeb6c68a 100644
--- a/llvm/include/llvm/CodeGen/Spiller.h
+++ b/llvm/include/llvm/CodeGen/Spiller.h
@@ -19,6 +19,10 @@ class MachineFunction;
class MachineFunctionPass;
class VirtRegMap;
class VirtRegAuxInfo;
+class LiveIntervals;
+class LiveStacks;
+class MachineDominatorTree;
+class MachineBlockFrequencyInfo;
/// Spiller interface.
///
@@ -41,12 +45,20 @@ class Spiller {
virtual ArrayRef getReplacedRegs() = 0;
virtual void postOptimization() {}
+
+ struct RequiredAnalyses {
+LiveIntervals &LIS;
+LiveStacks &LSS;
+MachineDominatorTree &MDT;
+const MachineBlockFrequencyInfo &MBFI;
+ };
};
/// Create and return a spiller that will insert spill code directly instead
/// of deferring though VirtRegMap.
-Spiller *createInlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF,
- VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
+Spiller *createInlineSpiller(const Spiller::RequiredAnalyses &Analyses,
+ MachineFunction &MF, VirtRegMap &VRM,
+ VirtRegAuxInfo &VRAI);
} // end namespace llvm
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp
b/llvm/lib/CodeGen/InlineSpiller.cpp
index 64f290f5930a1b..b9768d5c63a5d1 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -75,7 +75,6 @@ RestrictStatepointRemat("restrict-statepoint-remat",
cl::desc("Restrict remat for statepoint operands"));
namespace {
-
class HoistSpillHelper : private LiveRangeEdit::Delegate {
MachineFunction &MF;
LiveIntervals &LIS;
@@ -128,15 +127,11 @@ class HoistSpillHelper : private LiveRangeEdit::Delegate {
DenseMap &SpillsToIns);
public:
- HoistSpillHelper(MachineFunctionPass &pass, MachineFunction &mf,
- VirtRegMap &vrm)
- : MF(mf), LIS(pass.getAnalysis().getLIS()),
-LSS(pass.getAnalysis().getLS()),
-MDT(pass.getAnalysis().getDomTree()),
+ HoistSpillHelper(const Spiller::RequiredAnalyses &Analyses,
+ MachineFunction &mf, VirtRegMap &vrm)
+ : MF(mf), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(vrm), MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
-TRI(*mf.getSubtarget().getRegisterInfo()),
-MBFI(
-
pass.getAnalysis().getMBFI()),
+TRI(*mf.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
IPA(LIS, mf.getNumBlockIDs()) {}
void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
@@ -190,16 +185,12 @@ class InlineSpiller : public Spiller {
~InlineSpiller() override = default;
public:
- InlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF, VirtRegMap
&VRM,
-VirtRegAuxInfo &VRAI)
- : MF(MF), LIS(Pass.getAnalysis().getLIS()),
-LSS(Pass.getAnalysis().getLS()),
-MDT(Pass.getAnalysis().getDomTree()),
+ InlineSpiller(const Spiller::RequiredAnalyses &Analyses, MachineFunction &MF,
+VirtRegMap &VRM, VirtRegAuxInfo &VRAI)
+ : MF(MF), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(VRM), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
-TRI(*MF.getSubtarget().getRegisterInfo()),
-MBFI(
-
Pass.getAnalysis().getMBFI()),
-HSpiller(Pass, MF, VRM), VRAI(VRAI) {}
+TRI(*MF.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
+HSpiller(Analyses, MF, VRM), VRAI(VRAI) {}
void spill(LiveRangeEdit &) override;
ArrayRef getSpilledRegs() override { return RegsToSpill; }
@@ -237,10 +228,11 @@ Spiller::~Spiller() = default;
void Spiller::anchor() {}
-Spiller *llvm::createInlineSpiller(MachineFunctionPass &Pass,
- MachineFunction &MF, VirtRegMap &VRM,
- VirtRegAuxInfo &VRAI) {
- return new InlineSpiller(Pass, MF, VRM, VRAI);
+Spiller *
+llvm::createInlineSpiller(const InlineSpiller::RequiredAnalyses &Analyses,
+ MachineFunction &MF, VirtRegMap &VRM,
+ VirtRegAuxInfo &VRAI) {
+ return new InlineSpiller(Analyses, MF, VRM, VRAI);
}
//===-
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From 25c833690228100fb2c2f7a5551567d3c005ec52 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH 1/4] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to
NPM
---
.../llvm}/CodeGen/RegAllocPriorityAdvisor.h | 79 +++-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 1 +
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 6 +-
.../lib/CodeGen/MLRegAllocPriorityAdvisor.cpp | 184 +++---
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.h | 2 +-
llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp | 120 +---
llvm/lib/Passes/PassBuilder.cpp | 1 +
10 files changed, 294 insertions(+), 112 deletions(-)
rename llvm/{lib => include/llvm}/CodeGen/RegAllocPriorityAdvisor.h (53%)
diff --git a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
similarity index 53%
rename from llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
rename to llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
index 2d42a43c4c6372..bddfe15bf17751 100644
--- a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
+++ b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
@@ -9,8 +9,10 @@
#ifndef LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
#define LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
@@ -56,12 +58,73 @@ class DefaultPriorityAdvisor : public
RegAllocPriorityAdvisor {
unsigned getPriority(const LiveInterval &LI) const override;
};
-class RegAllocPriorityAdvisorAnalysis : public ImmutablePass {
+/// Common provider for getting the priority advisor and logging rewards.
+/// Legacy analysis forwards all calls to this provider.
+/// New analysis serves the provider as the analysis result.
+/// Expensive setup is done in the constructor, so that the advisor can be
+/// created quickly for every machine function.
+/// TODO: Remove once legacy PM support is dropped.
+class RegAllocPriorityAdvisorProvider {
public:
enum class AdvisorMode : int { Default, Release, Development };
- RegAllocPriorityAdvisorAnalysis(AdvisorMode Mode)
- : ImmutablePass(ID), Mode(Mode){};
+ RegAllocPriorityAdvisorProvider(AdvisorMode Mode) : Mode(Mode) {}
+
+ virtual ~RegAllocPriorityAdvisorProvider() = default;
+
+ virtual void logRewardIfNeeded(const MachineFunction &MF,
+ llvm::function_ref GetReward) {};
+
+ virtual std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
+
+ void setAnalyses(SlotIndexes *SI) { this->SI = SI; }
+
+ AdvisorMode getAdvisorMode() const { return Mode; }
+
+protected:
+ SlotIndexes *SI;
+
+private:
+ const AdvisorMode Mode;
+};
+
+RegAllocPriorityAdvisorProvider *createReleaseModePriorityAdvisorProvider();
+
+RegAllocPriorityAdvisorProvider *
+createDevelopmentModePriorityAdvisorProvider(LLVMContext &Ctx);
+
+class RegAllocPriorityAdvisorAnalysis
+: public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ struct Result {
+// Owned by this analysis.
+RegAllocPriorityAdvisorProvider *Provider;
+
+bool invalidate(MachineFunction &MF, const PreservedAnalyses &PA,
+MachineFunctionAnalysisManager::Invalidator &Inv) {
+ auto PAC = PA.getChecker();
+ return !PAC.preservedWhenStateless() ||
+ Inv.invalidate(MF, PA);
+}
+ };
+
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+
+private:
+ void initializeProvider(LLVMContext &Ctx);
+ std::unique_ptr Provider;
+};
+
+class RegAllocPriorityAdvisorAnalysisLegacy : public ImmutablePass {
+public:
+ enum class AdvisorMode : int { Default, Release, Development };
+
+ RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode Mode)
+ : ImmutablePass(ID), Mode(Mode) {};
static char ID;
/// Get an advisor for the given context (i.e. machine function, etc)
@@ -69,7 +132,7 @@ class RegAllocPriorityAdvisorAnalysis : public ImmutablePass
{
getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
AdvisorMode getAdvisorMode() const { return Mode; }
virtual void logRewardIfNeeded(const MachineFunction &MF,
- llvm::function_ref GetReward){};
+ llvm::function_ref GetReward) {};
protected:
// This analysis preserves everything, and subclasses may have additional
@@ -85,11 +148,13 @@ class RegAllocPriorityAdvisorAnalysis : public
ImmutablePass {
/// Specialization for the API used by the analysis infrastructure to create
/// an instance of th
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119540
>From abf618e3df3f6e2fd540b7059c89110e4c648495 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 08:51:55 +
Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegAllocGreedy to NPM
---
llvm/include/llvm/CodeGen/MachineFunction.h | 1 +
llvm/include/llvm/CodeGen/Passes.h| 2 +-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 9 +
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 185 ++
llvm/lib/CodeGen/RegAllocGreedy.h | 57 +++---
llvm/lib/Passes/PassBuilder.cpp | 1 +
8 files changed, 196 insertions(+), 63 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h
b/llvm/include/llvm/CodeGen/MachineFunction.h
index d696add8a1af53..662272e5e09618 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -901,6 +901,7 @@ class LLVM_ABI MachineFunction {
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
+ /// TODO: Add the param LiveStks
/// \returns true if no problems were found.
bool verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner = nullptr, raw_ostream *OS = nullptr,
diff --git a/llvm/include/llvm/CodeGen/Passes.h
b/llvm/include/llvm/CodeGen/Passes.h
index d1fac4a304cffe..1096c34b307f9b 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -167,7 +167,7 @@ namespace llvm {
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
- extern char &RAGreedyID;
+ extern char &RAGreedyLegacyID;
/// Basic register allocator.
extern char &RABasicID;
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index e74b85c0de886f..afe0aa6113dd21 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -250,7 +250,7 @@ void
initializeProfileSummaryInfoWrapperPassPass(PassRegistry &);
void initializePromoteLegacyPassPass(PassRegistry &);
void initializeRABasicPass(PassRegistry &);
void initializePseudoProbeInserterPass(PassRegistry &);
-void initializeRAGreedyPass(PassRegistry &);
+void initializeRAGreedyLegacyPass(PassRegistry &);
void initializeReachingDefAnalysisPass(PassRegistry &);
void initializeReassociateLegacyPassPass(PassRegistry &);
void initializeRegAllocEvictionAdvisorAnalysisLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index c23e4af1a342bd..bf12a2c9aca90b 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+"regallocgreedy", "RAGreedy",
+[](RegAllocFilterFunc F) { return RAGreedyPass(F); },
+[PB = this](StringRef Params) {
+ // TODO: parseRegAllocFilter(*PB, Params);
+ return Expected(nullptr);
+}, ""
+)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved
from
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 8efe540770913a..6acff9cd21134b 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -111,7 +111,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializeRABasicPass(Registry);
- initializeRAGreedyPass(Registry);
+ initializeRAGreedyLegacyPass(Registry);
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp
b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 5a7282809f5f7d..3a96325144efbc 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -43,8 +43,10 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedyPass.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
@@ -55,6 +57,7 @@
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
+#include "llvm/IR/Analysis.h"
#include "l
[llvm-branch-commits] [llvm] Spiller: Detach legacy pass and supply analyses instead (PR #119181)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119181
>From 02202be1a4e7678b4dfbbb2e374f9658eb1aeae6 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 9 Dec 2024 07:58:48 +
Subject: [PATCH] Spiller: Deatach legacy pass and supply analyses instead
---
llvm/include/llvm/CodeGen/Spiller.h | 16 +++--
llvm/lib/CodeGen/InlineSpiller.cpp | 36 +++--
llvm/lib/CodeGen/RegAllocBasic.cpp | 16 +
llvm/lib/CodeGen/RegAllocGreedy.cpp | 4 +++-
llvm/lib/CodeGen/RegAllocPBQP.cpp | 5 +++-
5 files changed, 46 insertions(+), 31 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/Spiller.h
b/llvm/include/llvm/CodeGen/Spiller.h
index 51ad36bc6b1f8b..3132cefeb6c68a 100644
--- a/llvm/include/llvm/CodeGen/Spiller.h
+++ b/llvm/include/llvm/CodeGen/Spiller.h
@@ -19,6 +19,10 @@ class MachineFunction;
class MachineFunctionPass;
class VirtRegMap;
class VirtRegAuxInfo;
+class LiveIntervals;
+class LiveStacks;
+class MachineDominatorTree;
+class MachineBlockFrequencyInfo;
/// Spiller interface.
///
@@ -41,12 +45,20 @@ class Spiller {
virtual ArrayRef getReplacedRegs() = 0;
virtual void postOptimization() {}
+
+ struct RequiredAnalyses {
+LiveIntervals &LIS;
+LiveStacks &LSS;
+MachineDominatorTree &MDT;
+const MachineBlockFrequencyInfo &MBFI;
+ };
};
/// Create and return a spiller that will insert spill code directly instead
/// of deferring though VirtRegMap.
-Spiller *createInlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF,
- VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
+Spiller *createInlineSpiller(const Spiller::RequiredAnalyses &Analyses,
+ MachineFunction &MF, VirtRegMap &VRM,
+ VirtRegAuxInfo &VRAI);
} // end namespace llvm
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp
b/llvm/lib/CodeGen/InlineSpiller.cpp
index 64f290f5930a1b..b9768d5c63a5d1 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -75,7 +75,6 @@ RestrictStatepointRemat("restrict-statepoint-remat",
cl::desc("Restrict remat for statepoint operands"));
namespace {
-
class HoistSpillHelper : private LiveRangeEdit::Delegate {
MachineFunction &MF;
LiveIntervals &LIS;
@@ -128,15 +127,11 @@ class HoistSpillHelper : private LiveRangeEdit::Delegate {
DenseMap &SpillsToIns);
public:
- HoistSpillHelper(MachineFunctionPass &pass, MachineFunction &mf,
- VirtRegMap &vrm)
- : MF(mf), LIS(pass.getAnalysis().getLIS()),
-LSS(pass.getAnalysis().getLS()),
-MDT(pass.getAnalysis().getDomTree()),
+ HoistSpillHelper(const Spiller::RequiredAnalyses &Analyses,
+ MachineFunction &mf, VirtRegMap &vrm)
+ : MF(mf), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(vrm), MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
-TRI(*mf.getSubtarget().getRegisterInfo()),
-MBFI(
-
pass.getAnalysis().getMBFI()),
+TRI(*mf.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
IPA(LIS, mf.getNumBlockIDs()) {}
void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
@@ -190,16 +185,12 @@ class InlineSpiller : public Spiller {
~InlineSpiller() override = default;
public:
- InlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF, VirtRegMap
&VRM,
-VirtRegAuxInfo &VRAI)
- : MF(MF), LIS(Pass.getAnalysis().getLIS()),
-LSS(Pass.getAnalysis().getLS()),
-MDT(Pass.getAnalysis().getDomTree()),
+ InlineSpiller(const Spiller::RequiredAnalyses &Analyses, MachineFunction &MF,
+VirtRegMap &VRM, VirtRegAuxInfo &VRAI)
+ : MF(MF), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(VRM), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
-TRI(*MF.getSubtarget().getRegisterInfo()),
-MBFI(
-
Pass.getAnalysis().getMBFI()),
-HSpiller(Pass, MF, VRM), VRAI(VRAI) {}
+TRI(*MF.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
+HSpiller(Analyses, MF, VRM), VRAI(VRAI) {}
void spill(LiveRangeEdit &) override;
ArrayRef getSpilledRegs() override { return RegsToSpill; }
@@ -237,10 +228,11 @@ Spiller::~Spiller() = default;
void Spiller::anchor() {}
-Spiller *llvm::createInlineSpiller(MachineFunctionPass &Pass,
- MachineFunction &MF, VirtRegMap &VRM,
- VirtRegAuxInfo &VRAI) {
- return new InlineSpiller(Pass, MF, VRM, VRAI);
+Spiller *
+llvm::createInlineSpiller(const InlineSpiller::RequiredAnalyses &Analyses,
+ MachineFunction &MF, VirtRegMap &VRM,
+ VirtRegAuxInfo &VRAI) {
+ return new InlineSpiller(Analyses, MF, VRM, VRAI);
}
//===-
[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120557
>From bdedc4f380d76c2e5dc9cccd93cda56b798012bd Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 10:57:21 +
Subject: [PATCH 1/4] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline
---
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 18 +++-
.../llvm/Passes/MachinePassRegistry.def | 4 ++--
.../include/llvm/Target/CGPassBuilderOption.h | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 13
...plicit-def-remat-requires-impdef-check.mir | 1 +
...implicit-def-with-impdef-greedy-assert.mir | 1 +
llvm/test/CodeGen/AArch64/pr51516.mir | 1 +
llvm/test/CodeGen/AArch64/spill-fold.mir | 2 ++
.../extend-phi-subrange-not-in-parent.mir | 1 +
llvm/test/CodeGen/MIR/Generic/runPass.mir | 1 +
.../SystemZ/clear-liverange-spillreg.mir | 1 +
llvm/test/CodeGen/Thumb/high-reg-clobber.mir | 1 +
llvm/test/CodeGen/X86/limit-split-cost.mir| 1 +
.../test/tools/llc/new-pm/regalloc-amdgpu.mir | 17 +--
llvm/tools/llc/NewPMDriver.cpp| 21 +++
15 files changed, 71 insertions(+), 14 deletions(-)
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 28768a72c83fa3..4135abdad90ff6 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -1059,7 +1059,7 @@ void CodeGenPassBuilder::addMachineSSAOptimization(
///
/// A target that uses the standard regalloc pass order for fast or optimized
/// allocation may still override this for per-target regalloc
-/// selection. But -regalloc=... always takes precedence.
+/// selection. But -regalloc-npm=... always takes precedence.
template
void CodeGenPassBuilder::addTargetRegisterAllocator(
AddMachinePass &addPass, bool Optimized) const {
@@ -1076,6 +1076,22 @@ template
void CodeGenPassBuilder::addRegAllocPass(
AddMachinePass &addPass, bool Optimized) const {
// TODO: Parse Opt.RegAlloc to add register allocator.
+ // Use the specified -regalloc-npm={basic|greedy|fast|pbqp}
+ if (Opt.RegAlloc > RegAllocType::Default) {
+switch (Opt.RegAlloc) {
+ case RegAllocType::Fast:
+addPass(RegAllocFastPass());
+break;
+ case RegAllocType::Greedy:
+addPass(RAGreedyPass());
+break;
+ default:
+llvm_unreachable("Register allocator not supported yet.");
+}
+return;
+ }
+ // -regalloc=default or unspecified, so pick based on the optimization level.
+ derived().addTargetRegisterAllocator(addPass, Optimized);
}
template
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 5facdfa825e4cb..abcc248334ed5f 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -188,12 +188,12 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
},
"filter=reg-filter;no-clear-vregs")
+// 'all' is the default filter
MACHINE_FUNCTION_PASS_WITH_PARAMS(
"regallocgreedy", "RAGreedyPass",
[](RAGreedyPass::Options Opts) { return RAGreedyPass(Opts); },
[PB = this](StringRef Params) {
- // TODO: parseRegAllocGreedyFilterFunc(*PB, Params);
- return Expected(RAGreedyPass::Options{});
+ return parseRegAllocGreedyFilterFunc(*PB, Params);
}, "reg-filter"
)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
diff --git a/llvm/include/llvm/Target/CGPassBuilderOption.h
b/llvm/include/llvm/Target/CGPassBuilderOption.h
index 29bdb9c1746d3c..05c84c1bdec851 100644
--- a/llvm/include/llvm/Target/CGPassBuilderOption.h
+++ b/llvm/include/llvm/Target/CGPassBuilderOption.h
@@ -53,7 +53,7 @@ struct CGPassBuilderOption {
bool RequiresCodeGenSCCOrder = false;
RunOutliner EnableMachineOutliner = RunOutliner::TargetDefault;
- StringRef RegAlloc = "default";
+ RegAllocType RegAlloc = RegAllocType::Default;
std::optional EnableGlobalISelAbort;
std::string FSProfileFile;
std::string FSRemappingFile;
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index f64b6e0adb2b32..4c0550316835ff 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -1315,6 +1315,19 @@ parseBoundsCheckingOptions(StringRef Params) {
return Mode;
}
+Expected parseRegAllocGreedyFilterFunc(PassBuilder &PB,
StringRef Params) {
+ if (Params.empty() || Params == "all") {
+return RAGreedyPass::Options();
+ }
+ std::optional Filter = PB.parseRegAllocFilter(Params);
+ if (!Filter) {
+return make_error(
+formatv("invalid regallocgreedy register filter '{0}' ", Params).str(),
+inconvertibleErrorCode());
+ }
+ return RAGreedyPass::Options{*Filter, Params};
+}
+
} // namespace
/// Tests whether a pass name starts with a valid prefix for a default pipeline
diff --git
a/llvm/test/CodeGen/AArch6
[llvm-branch-commits] [llvm] [Support] Recycler: Implement move constructor (PR #120555)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120555
>From cb0d24a7e4143ba251956c13ebdd0a96f1496d14 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 06:57:46 +
Subject: [PATCH 1/2] [Support] Recycler: Implement move constructor
---
llvm/include/llvm/Support/Recycler.h | 4
1 file changed, 4 insertions(+)
diff --git a/llvm/include/llvm/Support/Recycler.h
b/llvm/include/llvm/Support/Recycler.h
index 2bf30b0b3d5247..19e5faa535edd7 100644
--- a/llvm/include/llvm/Support/Recycler.h
+++ b/llvm/include/llvm/Support/Recycler.h
@@ -60,6 +60,10 @@ class Recycler {
// clear() before deleting the Recycler.
assert(!FreeList && "Non-empty recycler deleted!");
}
+ Recycler(const Recycler &) = delete;
+ Recycler(Recycler &&Other)
+ : FreeList(std::exchange(Other.FreeList, nullptr)) {}
+ Recycler() = default;
/// clear - Release all the tracked allocations to the allocator. The
/// recycler must be free of any tracked allocations before being
>From df8e57311f44598568ff39caee501a25c067b230 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 1 Jan 2025 06:35:09 +
Subject: [PATCH 2/2] Add test
---
llvm/unittests/Support/RecyclerTest.cpp | 19 +++
1 file changed, 19 insertions(+)
diff --git a/llvm/unittests/Support/RecyclerTest.cpp
b/llvm/unittests/Support/RecyclerTest.cpp
index 8cd763c0b83f8a..0ef9c5aa0ec82b 100644
--- a/llvm/unittests/Support/RecyclerTest.cpp
+++ b/llvm/unittests/Support/RecyclerTest.cpp
@@ -18,6 +18,10 @@ struct Object1 {
char Data[1];
};
+struct Object8 {
+ char Data[8];
+};
+
class DecoratedMallocAllocator : public MallocAllocator {
public:
int DeallocCount = 0;
@@ -43,4 +47,19 @@ TEST(RecyclerTest, RecycleAllocation) {
EXPECT_EQ(Allocator.DeallocCount, 2);
}
+TEST(RecyclerTest, MoveConstructor) {
+ DecoratedMallocAllocator Allocator;
+ Recycler R;
+ Object8 *A1 = R.Allocate(Allocator);
+ Object8 *A2 = R.Allocate(Allocator);
+ R.Deallocate(Allocator, A1);
+ R.Deallocate(Allocator, A2);
+ Recycler R2(std::move(R));
+ Object8 *A3 = R2.Allocate(Allocator);
+ R2.Deallocate(Allocator, A3);
+ R.clear(Allocator); // Should not deallocate anything as it was moved from.
+ EXPECT_EQ(Allocator.DeallocCount, 0);
+ R2.clear(Allocator);
+ EXPECT_EQ(Allocator.DeallocCount, 2);
+}
} // end anonymous namespace
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[llvm-branch-commits] [llvm] [CodeGen] LiveRegMatrix: Use allocator through a unique_ptr (PR #120556)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120556
>From 7f3676325cff1062b9894a35c013cd97bd95d7e7 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 08:33:48 +
Subject: [PATCH] [CodeGen] LiveRegMatrix: Use allocator through a unique_ptr
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 10 +++---
llvm/lib/CodeGen/LiveRegMatrix.cpp| 2 +-
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index 486392ca3c49d5..a7c1e2bcfe1c43 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -48,7 +48,7 @@ class LiveRegMatrix {
unsigned UserTag = 0;
// The matrix is represented as a LiveIntervalUnion per register unit.
- LiveIntervalUnion::Allocator LIUAlloc;
+ std::unique_ptr LIUAlloc;
LiveIntervalUnion::Array Matrix;
// Cached queries per register unit.
@@ -59,15 +59,11 @@ class LiveRegMatrix {
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
- LiveRegMatrix() = default;
+ LiveRegMatrix() : LIUAlloc(new LiveIntervalUnion::Allocator()) {};
void releaseMemory();
public:
- LiveRegMatrix(LiveRegMatrix &&Other)
- : TRI(Other.TRI), LIS(Other.LIS), VRM(Other.VRM), UserTag(Other.UserTag),
-Matrix(std::move(Other.Matrix)), Queries(std::move(Other.Queries)),
-RegMaskTag(Other.RegMaskTag), RegMaskVirtReg(Other.RegMaskVirtReg),
-RegMaskUsable(std::move(Other.RegMaskUsable)) {}
+ LiveRegMatrix(LiveRegMatrix &&Other) = default;
void init(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM);
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index 9744c47d5a8510..3367171a15662f 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -66,7 +66,7 @@ void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals
&pLIS,
unsigned NumRegUnits = TRI->getNumRegUnits();
if (NumRegUnits != Matrix.size())
Queries.reset(new LiveIntervalUnion::Query[NumRegUnits]);
- Matrix.init(LIUAlloc, NumRegUnits);
+ Matrix.init(*LIUAlloc, NumRegUnits);
// Make sure no stale queries get reused.
invalidateVirtRegs();
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[llvm-branch-commits] [llvm] [Support] Recycler: Enforce minimum allocation size (PR #121425)
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/121425
Recycler uses reinterpret_cast to an internal structure of size 8.
Invalid write occurs if Recycler is used for objects with sizes less
than 8.
>From 600fd4cd14dad8a2355d399fd4b67a8092d9637b Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 1 Jan 2025 06:33:26 +
Subject: [PATCH] [Support] Recycler: Enforce minimum allocation size
Recycler uses reinterpret_cast to an internal structure of size 8.
Invalid write occurs if Recycler is used for objects with sizes less
than 8.
---
llvm/include/llvm/Support/Recycler.h| 1 +
llvm/unittests/Support/CMakeLists.txt | 1 +
llvm/unittests/Support/RecyclerTest.cpp | 46 +
3 files changed, 48 insertions(+)
create mode 100644 llvm/unittests/Support/RecyclerTest.cpp
diff --git a/llvm/include/llvm/Support/Recycler.h
b/llvm/include/llvm/Support/Recycler.h
index bbd9ae321ae30c..2bf30b0b3d5247 100644
--- a/llvm/include/llvm/Support/Recycler.h
+++ b/llvm/include/llvm/Support/Recycler.h
@@ -85,6 +85,7 @@ class Recycler {
"Recycler allocation alignment is less than object align!");
static_assert(sizeof(SubClass) <= Size,
"Recycler allocation size is less than object size!");
+static_assert(Size >= 8 && "Recycler size must be atleast 8");
return FreeList ? reinterpret_cast(pop_val())
: static_cast(Allocator.Allocate(Size, Align));
}
diff --git a/llvm/unittests/Support/CMakeLists.txt
b/llvm/unittests/Support/CMakeLists.txt
index d64f89847aa8e7..6de81658264420 100644
--- a/llvm/unittests/Support/CMakeLists.txt
+++ b/llvm/unittests/Support/CMakeLists.txt
@@ -69,6 +69,7 @@ add_llvm_unittest(SupportTests
PerThreadBumpPtrAllocatorTest.cpp
ProcessTest.cpp
ProgramTest.cpp
+ RecyclerTest.cpp
RegexTest.cpp
ReverseIterationTest.cpp
ReplaceFileTest.cpp
diff --git a/llvm/unittests/Support/RecyclerTest.cpp
b/llvm/unittests/Support/RecyclerTest.cpp
new file mode 100644
index 00..8cd763c0b83f8a
--- /dev/null
+++ b/llvm/unittests/Support/RecyclerTest.cpp
@@ -0,0 +1,46 @@
+//===--- unittest/Support/RecyclerTest.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "llvm/Support/Recycler.h"
+#include "llvm/Support/AllocatorBase.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+struct Object1 {
+ char Data[1];
+};
+
+class DecoratedMallocAllocator : public MallocAllocator {
+public:
+ int DeallocCount = 0;
+
+ template void Deallocate(T *Ptr) {
+DeallocCount++;
+MallocAllocator::Deallocate(Ptr);
+ }
+};
+
+TEST(RecyclerTest, RecycleAllocation) {
+ DecoratedMallocAllocator Allocator;
+ // Recycler needs size to be atleast 8 bytes.
+ Recycler R;
+ Object1 *A1 = R.Allocate(Allocator);
+ Object1 *A2 = R.Allocate(Allocator);
+ R.Deallocate(Allocator, A2);
+ Object1 *A3 = R.Allocate(Allocator);
+ EXPECT_EQ(A2, A3); // reuse the deallocated object.
+ R.Deallocate(Allocator, A1);
+ R.Deallocate(Allocator, A3);
+ R.clear(Allocator); // Should deallocate A1 and A3.
+ EXPECT_EQ(Allocator.DeallocCount, 2);
+}
+
+} // end anonymous namespace
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[llvm-branch-commits] [llvm] [Support] Recycler: Implement move constructor (PR #120555)
https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/120555 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Support] Recycler: Enforce minimum allocation size (PR #121425)
optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/121425?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#121425** https://app.graphite.dev/github/pr/llvm/llvm-project/121425?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/121425?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#120554** https://app.graphite.dev/github/pr/llvm/llvm-project/120554?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/>: 1 other dependent PR ([#120555](https://github.com/llvm/llvm-project/pull/120555) https://app.graphite.dev/github/pr/llvm/llvm-project/120555?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/>) * **#119540** https://app.graphite.dev/github/pr/llvm/llvm-project/119540?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#119181** https://app.graphite.dev/github/pr/llvm/llvm-project/119181?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/>: 1 other dependent PR ([#119672](https://github.com/llvm/llvm-project/pull/119672) https://app.graphite.dev/github/pr/llvm/llvm-project/119672?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/>) * **#118462** https://app.graphite.dev/github/pr/llvm/llvm-project/118462?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#117309** https://app.graphite.dev/github/pr/llvm/llvm-project/117309?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/121425 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Record parameterized machine pass names to PIC (PR #120554)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120554
>From c67c0ae53096d13c5bdd08fae1696598a9122dc9 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 16 Dec 2024 08:48:41 +
Subject: [PATCH] [NewPm][CodeGen] Record parameterized machine pass names to
PIC
---
llvm/include/llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 35314473caa610..5facdfa825e4cb 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -181,7 +181,7 @@ MACHINE_FUNCTION_PASS("verify",
MachineTraceMetricsVerifi
PARAMS)
#endif
MACHINE_FUNCTION_PASS_WITH_PARAMS(
-"regallocfast", "RegAllocFast",
+"regallocfast", "RegAllocFastPass",
[](RegAllocFastPassOptions Opts) { return RegAllocFastPass(Opts); },
[PB = this](StringRef Params) {
return parseRegAllocFastPassOptions(*PB, Params);
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 76359f369946c4..f64b6e0adb2b32 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -496,6 +496,9 @@ PassBuilder::PassBuilder(TargetMachine *TM,
PipelineTuningOptions PTO,
PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
\
PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
+#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER,
\
+ PARAMS)
\
+ PIC->addClassToPassName(CLASS, NAME);
#include "llvm/Passes/MachinePassRegistry.def"
});
}
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[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 02202be1a4e7678b4dfbbb2e374f9658eb1aeae6
aec86eefdee9663ef3cbcd41aff035ca9c86a873 --extensions cpp,h --
llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
llvm/include/llvm/CodeGen/MachineFunction.h llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/InitializePasses.h
llvm/include/llvm/Passes/CodeGenPassBuilder.h llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/RegAllocGreedy.cpp llvm/lib/CodeGen/RegAllocGreedy.h
llvm/lib/Passes/PassBuilder.cpp
``
View the diff from clang-format here.
``diff
diff --git a/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
b/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
index f325224c53..656dcbb92b 100644
--- a/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
+++ b/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
@@ -35,7 +35,9 @@ public:
MachineFunctionProperties::Property::IsSSA);
}
- void printPipeline(raw_ostream &OS, function_ref
MapClassName2PassName) const;
+ void
+ printPipeline(raw_ostream &OS,
+function_ref MapClassName2PassName)
const;
static bool isRequired() { return true; }
private:
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp
b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index cad49d2cc1..9df35735b3 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -202,7 +202,9 @@ void RAGreedy::setAnalyses(RequiredAnalyses &Analyses) {
PriorityProvider = Analyses.PriorityProvider;
}
-void RAGreedyPass::printPipeline(raw_ostream &OS,
function_ref MapClassName2PassName) const {
+void RAGreedyPass::printPipeline(
+raw_ostream &OS,
+function_ref MapClassName2PassName) const {
StringRef FilterName = Opts.FilterName.empty() ? "all" : Opts.FilterName;
OS << "regallocgreedy<" << FilterName << ">";
}
``
https://github.com/llvm/llvm-project/pull/119540
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[llvm-branch-commits] [llvm] [mlir] [mlir][Transforms] Delete 1:N dialect conversion driver (PR #121389)
https://github.com/zero9178 approved this pull request. I love the colour red https://github.com/llvm/llvm-project/pull/121389 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/19.x: [cmake] Include GNUInstallDirs before using variables defined by it. (#83807) (PR #121410)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/121410
Backport 5bbd5984306ab0bdd89a2e81cd4965e5ae51c3fb
Requested by: @mgorny
>From 27df56d7de461e4fbd04e656cdec98b504eff558 Mon Sep 17 00:00:00 2001
From: Vassil Vassilev
Date: Thu, 22 Aug 2024 13:04:33 +0200
Subject: [PATCH] [cmake] Include GNUInstallDirs before using variables defined
by it. (#83807)
This fixes an odd problem with the regex when `CMAKE_INSTALL_LIBDIR` is
not defined:
`string sub-command REGEX, mode REPLACE: regex "$" matched an empty
string.`
Fixes llvm/llvm-project#83802
(cherry picked from commit 5bbd5984306ab0bdd89a2e81cd4965e5ae51c3fb)
---
llvm/cmake/modules/Findzstd.cmake | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/cmake/modules/Findzstd.cmake
b/llvm/cmake/modules/Findzstd.cmake
index 4bc0b793e51c9aa..86b6d48b6ec6b6b 100644
--- a/llvm/cmake/modules/Findzstd.cmake
+++ b/llvm/cmake/modules/Findzstd.cmake
@@ -34,6 +34,7 @@ if(zstd_FOUND)
elseif (NOT TARGET zstd::libzstd_shared)
add_library(zstd::libzstd_shared SHARED IMPORTED)
if(MSVC)
+ include(GNUInstallDirs) # For CMAKE_INSTALL_LIBDIR and friends.
# IMPORTED_LOCATION is the path to the DLL and IMPORTED_IMPLIB is the
"library".
get_filename_component(zstd_DIRNAME "${zstd_LIBRARY}" DIRECTORY)
if(NOT "${CMAKE_INSTALL_LIBDIR}" STREQUAL "" AND NOT
"${CMAKE_INSTALL_BINDIR}" STREQUAL "")
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[llvm-branch-commits] [llvm] release/19.x: [cmake] Include GNUInstallDirs before using variables defined by it. (#83807) (PR #121410)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/121410 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/19.x: [cmake] Include GNUInstallDirs before using variables defined by it. (#83807) (PR #121410)
llvmbot wrote: @petrhosek What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/121410 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/19.x: [cmake] Include GNUInstallDirs before using variables defined by it. (#83807) (PR #121410)
https://github.com/MaskRay approved this pull request. https://github.com/llvm/llvm-project/pull/121410 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
