[llvm-branch-commits] [llvm] 425d15a - [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY

2020-01-24 Thread Fangrui Song via llvm-branch-commits

Author: Fangrui Song
Date: 2020-01-24T09:06:52-08:00
New Revision: 425d15aeb13e2f60867654dd1abab515447a71ec

URL: 
https://github.com/llvm/llvm-project/commit/425d15aeb13e2f60867654dd1abab515447a71ec
DIFF: 
https://github.com/llvm/llvm-project/commit/425d15aeb13e2f60867654dd1abab515447a71ec.diff

LOG: [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY

Reviewed By: Bdragon28, jhenderson, grimar, sfertile

Differential Revision: https://reviews.llvm.org/D73255

(cherry picked from commit f1dab29908d25a4044abff6ffc120c48b20f034d)

Added: 
lld/test/ELF/ppc-reloc-copy.s

Modified: 
lld/ELF/Arch/PPC.cpp
lld/ELF/Arch/PPC64.cpp
llvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-ppc64.test

Removed: 




diff  --git a/lld/ELF/Arch/PPC.cpp b/lld/ELF/Arch/PPC.cpp
index 3c0b0c290b58..1d4e80184dcd 100644
--- a/lld/ELF/Arch/PPC.cpp
+++ b/lld/ELF/Arch/PPC.cpp
@@ -136,6 +136,7 @@ void writePPC32GlinkSection(uint8_t *buf, size_t 
numEntries) {
 }
 
 PPC::PPC() {
+  copyRel = R_PPC_COPY;
   gotRel = R_PPC_GLOB_DAT;
   noneRel = R_PPC_NONE;
   pltRel = R_PPC_JMP_SLOT;

diff  --git a/lld/ELF/Arch/PPC64.cpp b/lld/ELF/Arch/PPC64.cpp
index da77a4ddaddf..e48a184c9db2 100644
--- a/lld/ELF/Arch/PPC64.cpp
+++ b/lld/ELF/Arch/PPC64.cpp
@@ -293,6 +293,7 @@ static uint32_t readFromHalf16(const uint8_t *loc) {
 }
 
 PPC64::PPC64() {
+  copyRel = R_PPC64_COPY;
   gotRel = R_PPC64_GLOB_DAT;
   noneRel = R_PPC64_NONE;
   pltRel = R_PPC64_JMP_SLOT;

diff  --git a/lld/test/ELF/ppc-reloc-copy.s b/lld/test/ELF/ppc-reloc-copy.s
new file mode 100644
index ..1f169e40d375
--- /dev/null
+++ b/lld/test/ELF/ppc-reloc-copy.s
@@ -0,0 +1,29 @@
+# REQUIRES: ppc
+# RUN: llvm-mc -filetype=obj -triple=powerpc %p/Inputs/relocation-copy.s -o 
%t1.32.o
+# RUN: ld.lld -shared %t1.32.o -soname=so -o %t1.32.so
+# RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.32.o
+# RUN: ld.lld %t.32.o %t1.32.so -o %t.32
+# RUN: llvm-readobj -r %t.32 | FileCheck --check-prefix=REL32 %s
+# RUN: llvm-nm -S %t.32 | FileCheck --check-prefix=NM32 %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 %p/Inputs/relocation-copy.s -o 
%t1.64.o
+# RUN: ld.lld -shared %t1.64.o -soname=so -o %t1.64.so
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t.64.o
+# RUN: ld.lld %t.64.o %t1.64.so -o %t.64
+# RUN: llvm-readobj -r %t.64 | FileCheck --check-prefix=REL64 %s
+# RUN: llvm-nm -S %t.64 | FileCheck --check-prefix=NM64 %s
+
+# REL32:  .rela.dyn {
+# REL32-NEXT:   0x10030210 R_PPC_COPY x 0x0
+# REL32-NEXT: }
+
+# NM32: 10030210 0004 B x
+
+# REL64:  .rela.dyn {
+# REL64-NEXT:   0x10030350 R_PPC64_COPY x 0x0
+# REL64-NEXT: }
+
+# NM64: 10030350 0004 B x
+
+lis 3, x@ha
+lwz 3, x@l(3)

diff  --git a/llvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def 
b/llvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
index 8c5b482f0511..719d0c9c36ac 100644
--- a/llvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
+++ b/llvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
@@ -26,6 +26,7 @@
 #undef R_PPC64_GOT16_LO
 #undef R_PPC64_GOT16_HI
 #undef R_PPC64_GOT16_HA
+#undef R_PPC64_COPY
 #undef R_PPC64_GLOB_DAT
 #undef R_PPC64_JMP_SLOT
 #undef R_PPC64_RELATIVE
@@ -119,6 +120,7 @@ ELF_RELOC(R_PPC64_GOT16,14)
 ELF_RELOC(R_PPC64_GOT16_LO, 15)
 ELF_RELOC(R_PPC64_GOT16_HI, 16)
 ELF_RELOC(R_PPC64_GOT16_HA, 17)
+ELF_RELOC(R_PPC64_COPY, 19)
 ELF_RELOC(R_PPC64_GLOB_DAT, 20)
 ELF_RELOC(R_PPC64_JMP_SLOT, 21)
 ELF_RELOC(R_PPC64_RELATIVE, 22)

diff  --git a/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-ppc64.test 
b/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-ppc64.test
index 7e081b7e4e22..3a00dafb7367 100644
--- a/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-ppc64.test
+++ b/llvm/test/tools/llvm-readobj/ELF/reloc-types-elf-ppc64.test
@@ -22,6 +22,7 @@
 # CHECK: Type: R_PPC64_GOT16_LO (15)
 # CHECK: Type: R_PPC64_GOT16_HI (16)
 # CHECK: Type: R_PPC64_GOT16_HA (17)
+# CHECK: Type: R_PPC64_COPY (19)
 # CHECK: Type: R_PPC64_GLOB_DAT (20)
 # CHECK: Type: R_PPC64_JMP_SLOT (21)
 # CHECK: Type: R_PPC64_RELATIVE (22)
@@ -143,6 +144,8 @@ Sections:
 Type:   R_PPC64_GOT16_HI
   - Offset: 0x
 Type:   R_PPC64_GOT16_HA
+  - Offset: 0x
+Type:   R_PPC64_COPY
   - Offset: 0x
 Type:   R_PPC64_GLOB_DAT
   - Offset: 0x



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[llvm-branch-commits] [lld] a3db4e0 - [lld][RISCV] Print error when encountering R_RISCV_ALIGN

2020-01-24 Thread Hans Wennborg via llvm-branch-commits

Author: James Clarke
Date: 2020-01-24T19:10:45+01:00
New Revision: a3db4e05e36e836077e6e551feb6841c7e8023a0

URL: 
https://github.com/llvm/llvm-project/commit/a3db4e05e36e836077e6e551feb6841c7e8023a0
DIFF: 
https://github.com/llvm/llvm-project/commit/a3db4e05e36e836077e6e551feb6841c7e8023a0.diff

LOG: [lld][RISCV] Print error when encountering R_RISCV_ALIGN

Summary:
Unlike R_RISCV_RELAX, which is a linker hint, R_RISCV_ALIGN requires the
support of the linker even when ignoring all R_RISCV_RELAX relocations.
This is because the compiler emits as many NOPs as may be required for
the requested alignment, more than may be required pre-relaxation, to
allow for the target becoming more unaligned after relaxing earlier
sequences. This means that the target is often not initially aligned in
the object files, and so the R_RISCV_ALIGN relocations cannot just be
ignored. Since we do not support linker relaxation, we must turn these
into errors.

Reviewers: ruiu, MaskRay, espindola

Reviewed By: MaskRay

Subscribers: grimar, Jim, emaste, arichardson, asb, rbar, johnrusso, simoncook, 
sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, 
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, 
lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71820

(cherry picked from commit d1da63664f4e42191daf2e6a9fa682ca9f75ef5e)

Added: 
lld/test/ELF/riscv-reloc-align.s

Modified: 
lld/ELF/Arch/RISCV.cpp

Removed: 




diff  --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 42db8e08162d..527f9db0ef29 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -236,9 +236,15 @@ RelExpr RISCV::getRelExpr(const RelType type, const Symbol 
&s,
   case R_RISCV_TPREL_LO12_S:
 return R_TLS;
   case R_RISCV_RELAX:
-  case R_RISCV_ALIGN:
   case R_RISCV_TPREL_ADD:
 return R_NONE;
+  case R_RISCV_ALIGN:
+// Not just a hint; always padded to the worst-case number of NOPs, so may
+// not currently be aligned, and without linker relaxation support we can't
+// delete NOPs to realign.
+errorOrWarn(getErrorLocation(loc) + "relocation R_RISCV_ALIGN requires "
+"unimplemented linker relaxation; recompile with -mno-relax");
+return R_NONE;
   default:
 error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
   ") against symbol " + toString(s));
@@ -431,7 +437,6 @@ void RISCV::relocateOne(uint8_t *loc, const RelType type,
 write64le(loc, val - dtpOffset);
 break;
 
-  case R_RISCV_ALIGN:
   case R_RISCV_RELAX:
 return; // Ignored (for now)
 

diff  --git a/lld/test/ELF/riscv-reloc-align.s 
b/lld/test/ELF/riscv-reloc-align.s
new file mode 100644
index ..5103066caa37
--- /dev/null
+++ b/lld/test/ELF/riscv-reloc-align.s
@@ -0,0 +1,12 @@
+# REQUIRES: riscv
+
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s -o %t.o
+# RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
+
+# CHECK: relocation R_RISCV_ALIGN requires unimplemented linker relaxation
+
+.global _start
+_start:
+nop
+.balign 8
+nop



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[llvm-branch-commits] [libcxx] 39c349e - Add test for spaceship operator to __config

2020-01-24 Thread Hans Wennborg via llvm-branch-commits

Author: David Zarzycki
Date: 2020-01-24T19:35:17+01:00
New Revision: 39c349e8fc7f4b334cf4b30724b28dfce44a024e

URL: 
https://github.com/llvm/llvm-project/commit/39c349e8fc7f4b334cf4b30724b28dfce44a024e
DIFF: 
https://github.com/llvm/llvm-project/commit/39c349e8fc7f4b334cf4b30724b28dfce44a024e.diff

LOG: Add test for spaceship operator to __config

Summary:
The libcxx test suite auto-detects spaceship operator, but __config does not. 
This means that the libcxx test suite has been broken for over a month when 
using top-of-tree clang. This also really ought to be fixed before 10.0.

See: bc633a42dd409dbeb456263e3388b8caa4680aa0

Reviewers: chandlerc, mclow.lists, EricWF, ldionne, CaseyCarter

Reviewed By: EricWF

Subscribers: broadwaylamb, hans, dexonsmith, tstellar, llvm-commits, 
libcxx-commits

Tags: #libc, #llvm

Differential Revision: https://reviews.llvm.org/D72980

(cherry picked from commit 5dda92fcb0ce9206f831aa7cddf24421dcf044d7)

Added: 


Modified: 
libcxx/include/__config

Removed: 




diff  --git a/libcxx/include/__config b/libcxx/include/__config
index ac4549802ef2..8f48f16c2364 100644
--- a/libcxx/include/__config
+++ b/libcxx/include/__config
@@ -1350,10 +1350,9 @@ _LIBCPP_FUNC_VIS extern "C" void 
__sanitizer_annotate_contiguous_container(
 #define _LIBCPP_HAS_NO_COROUTINES
 #endif
 
-// FIXME: Correct this macro when either (A) a feature test macro for the
-// spaceship operator is provided, or (B) a compiler provides a complete
-// implementation.
+#if !defined(__cpp_impl_three_way_comparison) || 
__cpp_impl_three_way_comparison < 201907L
 #define _LIBCPP_HAS_NO_SPACESHIP_OPERATOR
+#endif
 
 // Decide whether to use availability macros.
 #if !defined(_LIBCPP_BUILDING_LIBRARY) &&  
\



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[llvm-branch-commits] [llvm] 5062762 - [XRay] Set hasSideEffects flag of PATCHABLE_FUNCTION_{ENTER, EXIT}

2020-01-24 Thread Fangrui Song via llvm-branch-commits

Author: Fangrui Song
Date: 2020-01-24T10:38:39-08:00
New Revision: 50627622856e631bd522cefd84efe2c8070ef75e

URL: 
https://github.com/llvm/llvm-project/commit/50627622856e631bd522cefd84efe2c8070ef75e
DIFF: 
https://github.com/llvm/llvm-project/commit/50627622856e631bd522cefd84efe2c8070ef75e.diff

LOG: [XRay] Set hasSideEffects flag of PATCHABLE_FUNCTION_{ENTER,EXIT}

Otherwise they may be picked as the delay slot by mips-delay-slot-filler, if we 
move patchable-function before mips-delay-slot-filler.

(cherry picked from commit a72d15e37c5e066f597f13a8ba60aff214ac992d)

Added: 


Modified: 
llvm/include/llvm/Target/Target.td

Removed: 




diff  --git a/llvm/include/llvm/Target/Target.td 
b/llvm/include/llvm/Target/Target.td
index b122b51bb169..cdc9b640e74e 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -1182,7 +1182,7 @@ def PATCHABLE_FUNCTION_ENTER : StandardPseudoInstruction {
   let InOperandList = (ins);
   let AsmString = "# XRay Function Enter.";
   let usesCustomInserter = 1;
-  let hasSideEffects = 0;
+  let hasSideEffects = 1;
 }
 def PATCHABLE_RET : StandardPseudoInstruction {
   let OutOperandList = (outs);
@@ -1198,7 +1198,7 @@ def PATCHABLE_FUNCTION_EXIT : StandardPseudoInstruction {
   let InOperandList = (ins);
   let AsmString = "# XRay Function Exit.";
   let usesCustomInserter = 1;
-  let hasSideEffects = 0; // FIXME: is this correct?
+  let hasSideEffects = 1;
   let isReturn = 0; // Original return instruction will follow
 }
 def PATCHABLE_TAIL_CALL : StandardPseudoInstruction {



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[llvm-branch-commits] [clang] e9739ba - Make address-space-lambda.cl pass on 32-bit Windows

2020-01-24 Thread Hans Wennborg via llvm-branch-commits

Author: Hans Wennborg
Date: 2020-01-24T20:40:27+01:00
New Revision: e9739ba8ffca472aa5a6b64a2e9b2008fd8be5cd

URL: 
https://github.com/llvm/llvm-project/commit/e9739ba8ffca472aa5a6b64a2e9b2008fd8be5cd
DIFF: 
https://github.com/llvm/llvm-project/commit/e9739ba8ffca472aa5a6b64a2e9b2008fd8be5cd.diff

LOG: Make address-space-lambda.cl pass on 32-bit Windows

Member functions will have the thiscall attribute on them.

(cherry picked from commit 698d1cd3b8154b3b74423386d3e111e6b756e87a)

Added: 


Modified: 
clang/test/SemaOpenCLCXX/address-space-lambda.cl

Removed: 




diff  --git a/clang/test/SemaOpenCLCXX/address-space-lambda.cl 
b/clang/test/SemaOpenCLCXX/address-space-lambda.cl
index eeea71e6353f..e953817442f7 100644
--- a/clang/test/SemaOpenCLCXX/address-space-lambda.cl
+++ b/clang/test/SemaOpenCLCXX/address-space-lambda.cl
@@ -1,16 +1,16 @@
 //RUN: %clang_cc1 %s -cl-std=clc++ -pedantic -ast-dump -verify | FileCheck %s
 
-//CHECK: CXXMethodDecl {{.*}} constexpr operator() 'int (__private int) const 
__generic'
+//CHECK: CXXMethodDecl {{.*}} constexpr operator() 'int (__private int){{.*}} 
const __generic'
 auto glambda = [](auto a) { return a; };
 
 __kernel void test() {
   int i;
-//CHECK: CXXMethodDecl {{.*}} constexpr operator() 'void () const __generic'
+//CHECK: CXXMethodDecl {{.*}} constexpr operator() 'void () {{.*}}const 
__generic'
   auto  llambda = [&]() {i++;};
   llambda();
   glambda(1);
   // Test lambda with default parameters
-//CHECK: CXXMethodDecl {{.*}} constexpr operator() 'void () const __generic'
+//CHECK: CXXMethodDecl {{.*}} constexpr operator() 'void () {{.*}}const 
__generic'
   [&] {i++;} ();
   __constant auto err = [&]() {}; //expected-note{{candidate function not 
viable: 'this' object is in address space '__constant', but method expects 
object in address space '__generic'}}
   err();  //expected-error-re{{no matching function 
for call to object of type '__constant (lambda at {{.*}})'}}
@@ -25,10 +25,10 @@ __kernel void test() {
 }
 
 __kernel void test_qual() {
-//CHECK: |-CXXMethodDecl {{.*}} constexpr operator() 'void () const __private'
+//CHECK: |-CXXMethodDecl {{.*}} constexpr operator() 'void () {{.*}}const 
__private'
   auto priv1 = []() __private {};
   priv1();
-//CHECK: |-CXXMethodDecl {{.*}} constexpr operator() 'void () const __generic'
+//CHECK: |-CXXMethodDecl {{.*}} constexpr operator() 'void () {{.*}}const 
__generic'
   auto priv2 = []() __generic {};
   priv2();
   auto priv3 = []() __global {}; //expected-note{{candidate function not 
viable: 'this' object is in address space '__private', but method expects 
object in address space '__global'}} //expected-note{{conversion candidate of 
type 'void (*)()'}}
@@ -38,7 +38,7 @@ __kernel void test_qual() {
   const1(); //expected-error{{no matching function for call to object of type 
'__constant (lambda at}}
   __constant auto const2 = []() __generic{}; //expected-note{{candidate 
function not viable: 'this' object is in address space '__constant', but method 
expects object in address space '__generic'}} //expected-note{{conversion 
candidate of type 'void (*)()'}}
   const2(); //expected-error{{no matching function for call to object of type 
'__constant (lambda at}}
-//CHECK: |-CXXMethodDecl {{.*}} constexpr operator() 'void () const __constant'
+//CHECK: |-CXXMethodDecl {{.*}} constexpr operator() 'void () {{.*}}const 
__constant'
   __constant auto const3 = []() __constant{};
   const3();
 



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[llvm-branch-commits] [llvm] d11abdd - [DebugInfo][test] Change two MIR tests to use -start-before=livedebugvalues instead of -start-after=patchable-function

2020-01-24 Thread Hans Wennborg via llvm-branch-commits

Author: Fangrui Song
Date: 2020-01-24T22:03:02+01:00
New Revision: d11abddb32f6475441872ed19e0e3091d7d7f087

URL: 
https://github.com/llvm/llvm-project/commit/d11abddb32f6475441872ed19e0e3091d7d7f087
DIFF: 
https://github.com/llvm/llvm-project/commit/d11abddb32f6475441872ed19e0e3091d7d7f087.diff

LOG: [DebugInfo][test] Change two MIR tests to use 
-start-before=livedebugvalues instead of -start-after=patchable-function

To break order dependency between livedebugvalues and patchable-function.

(cherry picked from commit 26ba1f77b55e7a961acc05d94bfa4b677a9e5d83)

Added: 


Modified: 
llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
llvm/test/DebugInfo/X86/debug-loc-asan.mir

Removed: 




diff  --git a/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir 
b/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
index 622a52fc8e96..ab8154edf8c1 100644
--- a/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
+++ b/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
@@ -1,5 +1,5 @@
-# RUN: llc -o - %s -mtriple=thumbv7-apple-ios -start-after=patchable-function 
| FileCheck %s
-# RUN: llc -o - %s -mtriple=thumbv6-apple-ios -start-after=patchable-function 
| FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv7-apple-ios -start-before=livedebugvalues | 
FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv6-apple-ios -start-before=livedebugvalues | 
FileCheck %s
 
 # struct A {
 #   A();

diff  --git a/llvm/test/DebugInfo/X86/debug-loc-asan.mir 
b/llvm/test/DebugInfo/X86/debug-loc-asan.mir
index b09c469f3d9e..abec5796e4b7 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-asan.mir
+++ b/llvm/test/DebugInfo/X86/debug-loc-asan.mir
@@ -1,5 +1,5 @@
-# RUN: llc -o - %s -start-after=patchable-function -O0 
-mtriple=x86_64-unknown-linux-gnu | FileCheck %s
-# RUN: llc -o - %s -start-after=patchable-function  -O0 
-mtriple=x86_64-unknown-linux-gnu -filetype=obj \
+# RUN: llc -o - %s -start-after=livedebugvalues -O0 
-mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+# RUN: llc -o - %s -start-after=livedebugvalues  -O0 
-mtriple=x86_64-unknown-linux-gnu -filetype=obj \
 # RUN:   | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF
 #
 # Verify that we have correct debug info for local variables in code



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[llvm-branch-commits] [llvm] f1d4dfe - [Target] Test commit

2020-01-24 Thread Evandro Menezes via llvm-branch-commits

Author: Evandro Menezes
Date: 2020-01-24T13:39:19-08:00
New Revision: f1d4dfe3bc8ade49249de94ea5e55e5ea92288a8

URL: 
https://github.com/llvm/llvm-project/commit/f1d4dfe3bc8ade49249de94ea5e55e5ea92288a8
DIFF: 
https://github.com/llvm/llvm-project/commit/f1d4dfe3bc8ade49249de94ea5e55e5ea92288a8.diff

LOG: [Target] Test commit

Modify comment to reflect the current users of `Regisgter.CostPerUse`.

Added: 


Modified: 
llvm/include/llvm/Target/Target.td

Removed: 




diff  --git a/llvm/include/llvm/Target/Target.td 
b/llvm/include/llvm/Target/Target.td
index cdc9b640e74e..f066810381ea 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -166,8 +166,9 @@ class Register altNames = []> {
   // CostPerUse - Additional cost of instructions using this register compared
   // to other registers in its class. The register allocator will try to
   // minimize the number of instructions using a register with a CostPerUse.
-  // This is used by the x86-64 and ARM Thumb targets where some registers
-  // require larger instruction encodings.
+  // This is used by the ARC target, by the ARM Thumb and x86-64 targets, where
+  // some registers require larger instruction encodings, by the RISC-V target,
+  // where some registers preclude using some C instructions. 
   int CostPerUse = 0;
 
   // CoveredBySubRegs - When this bit is set, the value of this register is



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[llvm-branch-commits] [clang] 0df1362 - [CUDA] Fix order of memcpy arguments in __shfl_*(<64-bit type>).

2020-01-24 Thread Artem Belevich via llvm-branch-commits

Author: Artem Belevich
Date: 2020-01-24T15:07:22-08:00
New Revision: 0df13627c6a4006de39e5f01d81a338793b0e82b

URL: 
https://github.com/llvm/llvm-project/commit/0df13627c6a4006de39e5f01d81a338793b0e82b
DIFF: 
https://github.com/llvm/llvm-project/commit/0df13627c6a4006de39e5f01d81a338793b0e82b.diff

LOG: [CUDA] Fix order of memcpy arguments in __shfl_*(<64-bit type>).

Wrong argument order resulted in broken shfl ops for 64-bit types.

(cherry picked from commit cc14de88da27a8178976972bdc8211c31f7ca9ae)

Added: 


Modified: 
clang/lib/Headers/__clang_cuda_intrinsics.h

Removed: 




diff  --git a/clang/lib/Headers/__clang_cuda_intrinsics.h 
b/clang/lib/Headers/__clang_cuda_intrinsics.h
index b67461a146fc..c7bff6a9d8fe 100644
--- a/clang/lib/Headers/__clang_cuda_intrinsics.h
+++ b/clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -45,7 +45,7 @@
 _Static_assert(sizeof(__val) == sizeof(__Bits));   
\
 _Static_assert(sizeof(__Bits) == 2 * sizeof(int)); 
\
 __Bits __tmp;  
\
-memcpy(&__val, &__tmp, sizeof(__val)); 
\
+memcpy(&__tmp, &__val, sizeof(__val));\
 __tmp.__a = ::__FnName(__tmp.__a, __offset, __width);  
\
 __tmp.__b = ::__FnName(__tmp.__b, __offset, __width);  
\
 long long __ret;   
\
@@ -129,7 +129,7 @@ __MAKE_SHUFFLES(__shfl_xor, __nvvm_shfl_bfly_i32, 
__nvvm_shfl_bfly_f32, 0x1f,
 _Static_assert(sizeof(__val) == sizeof(__Bits));   
\
 _Static_assert(sizeof(__Bits) == 2 * sizeof(int)); 
\
 __Bits __tmp;  
\
-memcpy(&__val, &__tmp, sizeof(__val)); 
\
+memcpy(&__tmp, &__val, sizeof(__val)); 
\
 __tmp.__a = ::__FnName(__mask, __tmp.__a, __offset, __width);  
\
 __tmp.__b = ::__FnName(__mask, __tmp.__b, __offset, __width);  
\
 long long __ret;   
\



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