[Lldb-commits] [lldb] 634b359 - XFAIL NativePDB tests on arm-linux

[Muhammad Omair Javaid via lldb-commits]

Author: Muhammad Omair Javaid
Date: 2020-05-11T07:31:18+05:00
New Revision: 634b359cf223a83b27f2853887dde5e9680d8790

URL: 
https://github.com/llvm/llvm-project/commit/634b359cf223a83b27f2853887dde5e9680d8790
DIFF: 
https://github.com/llvm/llvm-project/commit/634b359cf223a83b27f2853887dde5e9680d8790.diff

LOG: XFAIL NativePDB tests on arm-linux

NativePDB tests fail on arm-linux buildbot. clang-cl driver crashes with
-m32 option. Bug files http://llvm.org/pr45867

Added: 


Modified: 
lldb/test/Shell/SymbolFile/NativePDB/ast-functions.cpp
lldb/test/Shell/SymbolFile/NativePDB/ast-methods.cpp
lldb/test/Shell/SymbolFile/NativePDB/ast-types.cpp
lldb/test/Shell/SymbolFile/NativePDB/bitfields.cpp
lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
lldb/test/Shell/SymbolFile/NativePDB/function-types-builtins.cpp
lldb/test/Shell/SymbolFile/NativePDB/function-types-classes.cpp
lldb/test/Shell/SymbolFile/NativePDB/global-classes.cpp
lldb/test/Shell/SymbolFile/NativePDB/globals-bss.cpp
lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
lldb/test/Shell/SymbolFile/NativePDB/nested-types.cpp
lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp
lldb/test/Shell/SymbolFile/NativePDB/tag-types.cpp

Removed: 




diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/ast-functions.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/ast-functions.cpp
index 1cfd01f13c1b..1fee27503d2a 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/ast-functions.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/ast-functions.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/ast-methods.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/ast-methods.cpp
index 6006c722cfba..f8187598be35 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/ast-methods.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/ast-methods.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/ast-types.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/ast-types.cpp
index c4d50433a3b5..bf6cd6372d8a 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/ast-types.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/ast-types.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/bitfields.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/bitfields.cpp
index 301ae3067d13..b56fdbaf5511 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/bitfields.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/bitfields.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
index c0c26f7617c9..8d3ab2ad3ab4 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/break-by-function.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
index ae3269f3719f..1ed4f6e781c1 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/function-types-builtins.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/function-types-builtins.cpp
index 05ad68419938..fb3ffdcb46c3 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/function-types-builtins.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/function-types-builtins.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/function-types-classes.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/function-types-classes.cpp
index 4a8caa7f8377..de80dbd5 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/function-types-classes.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/function-types-classes.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/global-classes.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/global-classes.cpp
index e45fbfa4eefe..f3366fc792e6 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/global-classes.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/global-classes.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // clang-format off
 // REQUIRES: lld
 

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/globals-bss.cpp 
b/lldb

[Lldb-commits] [lldb] e179e72 - Remove XFAIL arm-linux decorator from passing tests

[Muhammad Omair Javaid via lldb-commits]

Author: Muhammad Omair Javaid
Date: 2020-05-11T07:31:18+05:00
New Revision: e179e7234ffedc7552e2729e76860cfab0dc103e

URL: 
https://github.com/llvm/llvm-project/commit/e179e7234ffedc7552e2729e76860cfab0dc103e
DIFF: 
https://github.com/llvm/llvm-project/commit/e179e7234ffedc7552e2729e76860cfab0dc103e.diff

LOG: Remove XFAIL arm-linux decorator from passing tests

Added: 


Modified: 
lldb/test/API/commands/expression/ir-interpreter/TestIRInterpreter.py
lldb/test/API/linux/builtin_trap/TestBuiltinTrap.py

lldb/test/API/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py

Removed: 




diff  --git 
a/lldb/test/API/commands/expression/ir-interpreter/TestIRInterpreter.py 
b/lldb/test/API/commands/expression/ir-interpreter/TestIRInterpreter.py
index dd1308ba58f0..033f5bc5fa1d 100644
--- a/lldb/test/API/commands/expression/ir-interpreter/TestIRInterpreter.py
+++ b/lldb/test/API/commands/expression/ir-interpreter/TestIRInterpreter.py
@@ -45,10 +45,6 @@ def build_and_run(self):
 oslist=['windows'],
 bugnumber="http://llvm.org/pr21765";)
 @expectedFailureNetBSD
-@expectedFailureAll(
-oslist=['linux'],
-archs=['arm'],
-bugnumber="llvm.org/pr27868")
 def test_ir_interpreter(self):
 self.build_and_run()
 

diff  --git a/lldb/test/API/linux/builtin_trap/TestBuiltinTrap.py 
b/lldb/test/API/linux/builtin_trap/TestBuiltinTrap.py
index added4ef508a..2a9ec4f7617a 100644
--- a/lldb/test/API/linux/builtin_trap/TestBuiltinTrap.py
+++ b/lldb/test/API/linux/builtin_trap/TestBuiltinTrap.py
@@ -23,7 +23,7 @@ def setUp(self):
 
 # gcc generates incorrect linetable
 @expectedFailureAll(archs="arm", compiler="gcc", triple=".*-android")
-@expectedFailureAll(archs=['arm', 'aarch64'])
+@expectedFailureAll(archs=['aarch64'])
 @skipIfWindows
 def test_with_run_command(self):
 """Test that LLDB handles a function with __builtin_trap correctly."""

diff  --git 
a/lldb/test/API/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
 
b/lldb/test/API/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
index c4d6461ddde7..807f1ae9a2ac 100644
--- 
a/lldb/test/API/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
+++ 
b/lldb/test/API/linux/thread/create_during_instruction_step/TestCreateDuringInstructionStep.py
@@ -18,10 +18,6 @@ class CreateDuringInstructionStepTestCase(TestBase):
 
 @skipUnlessPlatform(['linux'])
 @expectedFailureAndroid('llvm.org/pr24737', archs=['arm'])
-@expectedFailureAll(
-oslist=["linux"],
-archs=["arm"],
-bugnumber="llvm.org/pr24737")
 def test_step_inst(self):
 self.build(dictionary=self.getBuildFlags())
 exe = self.getBuildArtifact("a.out")

diff  --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py 
b/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py
index c6c750299b1c..84c241979083 100644
--- a/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py
+++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py
@@ -21,15 +21,6 @@ def 
test_single_step_only_steps_one_instruction_with_s_debugserver(self):
 
 @skipIfWindows # No pty support to test any inferior std -i/e/o
 @llgs_test
-@expectedFailureAndroid(
-bugnumber="llvm.org/pr24739",
-archs=[
-"arm",
-"aarch64"])
-@expectedFailureAll(
-oslist=["linux"],
-archs=["arm"],
-bugnumber="llvm.org/pr24739")
 @skipIf(triple='^mips')
 def test_single_step_only_steps_one_instruction_with_s_llgs(self):
 self.init_llgs_test()



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[Lldb-commits] [lldb] 8e63f35 - [LLDB] Decorate tests failing on arm-linux buildbot

[Muhammad Omair Javaid via lldb-commits]

Author: Muhammad Omair Javaid
Date: 2020-05-11T07:31:18+05:00
New Revision: 8e63f35f86bd9b8d014cd3488c09465bba34c1f7

URL: 
https://github.com/llvm/llvm-project/commit/8e63f35f86bd9b8d014cd3488c09465bba34c1f7
DIFF: 
https://github.com/llvm/llvm-project/commit/8e63f35f86bd9b8d014cd3488c09465bba34c1f7.diff

LOG: [LLDB] Decorate tests failing on arm-linux buildbot

Tests impacted by these decorators fail on arm-linux-gnueabihf.

These have been triaged and appropriate bugs have been filed.

Added: 


Modified: 
lldb/test/API/commands/expression/rdar44436068/Test128BitsInteger.py
lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
lldb/test/API/functionalities/return-value/TestReturnValue.py
lldb/test/API/lang/cpp/trivial_abi/TestTrivialABI.py
lldb/test/Shell/SymbolFile/DWARF/anon_class_w_and_wo_export_symbols.ll

lldb/test/Shell/SymbolFile/DWARF/clang-ast-from-dwarf-unamed-and-anon-structs.cpp

Removed: 




diff  --git 
a/lldb/test/API/commands/expression/rdar44436068/Test128BitsInteger.py 
b/lldb/test/API/commands/expression/rdar44436068/Test128BitsInteger.py
index 4f163d0c3a04..b4f1662bd9c4 100644
--- a/lldb/test/API/commands/expression/rdar44436068/Test128BitsInteger.py
+++ b/lldb/test/API/commands/expression/rdar44436068/Test128BitsInteger.py
@@ -2,5 +2,5 @@
 from lldbsuite.test import decorators
 
 lldbinline.MakeInlineTest(__file__, globals(),
-decorators.skipIf(archs=["armv7k", "i386"]))
+decorators.skipIf(archs=["arm", "armv7k", "i386"]))
 

diff  --git 
a/lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py 
b/lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
index 9ad21522b4aa..7985c0647734 100644
--- a/lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
+++ b/lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
@@ -10,7 +10,7 @@ class TestWatchpointCount(TestBase):
 def setUp(self):
 TestBase.setUp(self)
 
-@skipIf(oslist=["linux"], archs=["aarch64"])
+@skipIf(oslist=["linux"], archs=["arm", "aarch64"])
 def test_watchpoint_count(self):
 self.build()
 (_, process, thread, _) = lldbutil.run_to_source_breakpoint(self, 
"patatino", lldb.SBFileSpec("main.c"))

diff  --git a/lldb/test/API/functionalities/return-value/TestReturnValue.py 
b/lldb/test/API/functionalities/return-value/TestReturnValue.py
index 56ae42e19ae4..24aa504a593c 100644
--- a/lldb/test/API/functionalities/return-value/TestReturnValue.py
+++ b/lldb/test/API/functionalities/return-value/TestReturnValue.py
@@ -19,7 +19,7 @@ def affected_by_pr33042(self):
 "aarch64" and self.getPlatform() == "linux")
 
 def affected_by_pr44132(self):
-return (self.getArchitecture() == "aarch64" and self.getPlatform() == 
"linux")
+return ((self.getArchitecture() == "aarch64" or self.getArchitecture() 
== 'arm') and self.getPlatform() == "linux")
 
 # ABIMacOSX_arm can't fetch simple values inside a structure
 def affected_by_radar_34562999(self):

diff  --git a/lldb/test/API/lang/cpp/trivial_abi/TestTrivialABI.py 
b/lldb/test/API/lang/cpp/trivial_abi/TestTrivialABI.py
index 2a8a78a45ff1..a8cb358036ea 100644
--- a/lldb/test/API/lang/cpp/trivial_abi/TestTrivialABI.py
+++ b/lldb/test/API/lang/cpp/trivial_abi/TestTrivialABI.py
@@ -28,7 +28,7 @@ def test_call_trivial(self):
 @skipUnlessSupportedTypeAttribute("trivial_abi")
 # fixed for SysV-x86_64 ABI, but not Windows-x86_64
 @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr36870")
-@expectedFailureAll(archs=["aarch64"], oslist=["linux"],
+@expectedFailureAll(archs=["arm", "aarch64"], oslist=["linux"],
 bugnumber="llvm.org/pr44161")
 @expectedFailureAll(archs=["arm64", "arm64e"], 
bugnumber="")
 def test_call_nontrivial(self):

diff  --git 
a/lldb/test/Shell/SymbolFile/DWARF/anon_class_w_and_wo_export_symbols.ll 
b/lldb/test/Shell/SymbolFile/DWARF/anon_class_w_and_wo_export_symbols.ll
index c61012b60535..ee39599e7c38 100644
--- a/lldb/test/Shell/SymbolFile/DWARF/anon_class_w_and_wo_export_symbols.ll
+++ b/lldb/test/Shell/SymbolFile/DWARF/anon_class_w_and_wo_export_symbols.ll
@@ -1,3 +1,4 @@
+; XFAIL: target-arm && linux-gnu
 ; UNSUPPORTED: system-windows
 ;
 ; This test verifies that we do the right thing with DIFlagExportSymbols which 
is the new

diff  --git 
a/lldb/test/Shell/SymbolFile/DWARF/clang-ast-from-dwarf-unamed-and-anon-structs.cpp
 
b/lldb/test/Shell/SymbolFile/DWARF/clang-ast-from-dwarf-unamed-and-anon-structs.cpp
index 4d267f077450..fd223a5b174b 100644
--- 
a/lldb/test/Shell/SymbolFile/DWARF/clang-ast-from-dwarf-unamed-and-anon-structs.cpp
+++ 
b/lldb/test/Shell/SymbolFile/DWARF/clang-ast-from-dwarf-unamed-and-anon-structs.cpp
@@ -1,3 +1,4 @@
+// XFAIL: target-arm && linux-gnu
 // UNSUPPORTED: system-windows
 //

[Lldb-commits] [lldb] 20629ca - [LLDB] Fix broken testsuite due to Xfail decorators

[Muhammad Omair Javaid via lldb-commits]

Author: Muhammad Omair Javaid
Date: 2020-05-11T10:25:04+05:00
New Revision: 20629ca949cddde9f7e41a4b9e8539a970615feb

URL: 
https://github.com/llvm/llvm-project/commit/20629ca949cddde9f7e41a4b9e8539a970615feb
DIFF: 
https://github.com/llvm/llvm-project/commit/20629ca949cddde9f7e41a4b9e8539a970615feb.diff

LOG: [LLDB] Fix broken testsuite due to Xfail decorators

Following test cases need minor adjustment in order to accomodate xfail
decorator:
  lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
  lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp

Added: 


Modified: 
lldb/test/Shell/SymbolFile/NativePDB/Inputs/break-by-line.lldbinit
lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp

Removed: 




diff  --git 
a/lldb/test/Shell/SymbolFile/NativePDB/Inputs/break-by-line.lldbinit 
b/lldb/test/Shell/SymbolFile/NativePDB/Inputs/break-by-line.lldbinit
index 7daa53ba24e0..916ba22bb192 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/Inputs/break-by-line.lldbinit
+++ b/lldb/test/Shell/SymbolFile/NativePDB/Inputs/break-by-line.lldbinit
@@ -1,3 +1,3 @@
-break set -f break-by-line.cpp -l 14
+break set -f break-by-line.cpp -l 15
 break list
 quit

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
index 1ed4f6e781c1..f68b421147ed 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/break-by-line.cpp
@@ -23,5 +23,5 @@ int main(int argc, char **argv) {
 
 // CHECK:  (lldb) target create "{{.*}}break-by-line.cpp.tmp.exe"
 // CHECK:  Current executable set to '{{.*}}break-by-line.cpp.tmp.exe'
-// CHECK:  (lldb) break set -f break-by-line.cpp -l 14
-// CHECK:  Breakpoint 1: where = break-by-line.cpp.tmp.exe`NS::NamespaceFn 
+ {{[0-9]+}} at break-by-line.cpp:14
+// CHECK:  (lldb) break set -f break-by-line.cpp -l 15
+// CHECK:  Breakpoint 1: where = break-by-line.cpp.tmp.exe`NS::NamespaceFn 
+ {{[0-9]+}} at break-by-line.cpp:15

diff  --git a/lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp 
b/lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp
index b51350ed379b..dc8f18706925 100644
--- a/lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp
+++ b/lldb/test/Shell/SymbolFile/NativePDB/source-list.cpp
@@ -8,7 +8,6 @@
 // RUN: %p/Inputs/source-list.lldbinit | FileCheck %s
 
 
-
 // Some context lines before
 // the function.
 



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[Lldb-commits] [PATCH] D77043: Fix process gdb-remote usage of value_regs/invalidate_regs

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid updated this revision to Diff 263107.
omjavaid added a comment.

@labath as per your suggestion I have implemented a solution where we fixup 
register index before sending them to the host in xml or registerinfos packet. 
Also two new helper functions are added which can be overriden by register 
context if there is a difference between user register index (Register index 
calculated by iteration) or reg infos register index (actual index into 
register infos array).
Still stub selected regnum can be supplied using target XML packet and to 
accommodate that case there is also a fix that remains from the old patch which 
forces LLDB to use eRegisterKindProcessPlugin while reading/writing value_regs 
in order to make sure LLDB always uses correct register number for the case of 
target XML register infos.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77043/new/

https://reviews.llvm.org/D77043

Files:
  lldb/include/lldb/Host/common/NativeRegisterContext.h
  lldb/source/Plugins/Process/Utility/NativeRegisterContextRegisterInfo.cpp
  lldb/source/Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp

Index: lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
===
--- lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
+++ lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
@@ -242,11 +242,15 @@
   // Index of the primordial register.
   bool success = true;
   for (uint32_t idx = 0; success; ++idx) {
-const uint32_t prim_reg = reg_info->value_regs[idx];
+uint32_t prim_reg = reg_info->value_regs[idx];
 if (prim_reg == LLDB_INVALID_REGNUM)
   break;
 // We have a valid primordial register as our constituent. Grab the
 // corresponding register info.
+uint32_t regnum = ConvertRegisterKindToRegisterNumber(
+eRegisterKindProcessPlugin, prim_reg);
+if (regnum != LLDB_INVALID_REGNUM)
+  prim_reg = regnum;
 const RegisterInfo *prim_reg_info = GetRegisterInfoAtIndex(prim_reg);
 if (prim_reg_info == nullptr)
   success = false;
@@ -375,11 +379,15 @@
   // Invalidate this composite register first.
 
   for (uint32_t idx = 0; success; ++idx) {
-const uint32_t reg = reg_info->value_regs[idx];
+uint32_t reg = reg_info->value_regs[idx];
 if (reg == LLDB_INVALID_REGNUM)
   break;
 // We have a valid primordial register as our constituent. Grab the
 // corresponding register info.
+uint32_t lldb_regnum = ConvertRegisterKindToRegisterNumber(
+eRegisterKindProcessPlugin, reg);
+if (lldb_regnum != LLDB_INVALID_REGNUM)
+  reg = lldb_regnum;
 const RegisterInfo *value_reg_info = GetRegisterInfoAtIndex(reg);
 if (value_reg_info == nullptr)
   success = false;
@@ -397,6 +405,10 @@
   for (uint32_t idx = 0, reg = reg_info->invalidate_regs[0];
reg != LLDB_INVALID_REGNUM;
reg = reg_info->invalidate_regs[++idx]) {
+uint32_t lldb_regnum = ConvertRegisterKindToRegisterNumber(
+eRegisterKindProcessPlugin, reg);
+if (lldb_regnum != LLDB_INVALID_REGNUM)
+  reg = lldb_regnum;
 SetRegisterIsValid(reg, false);
   }
 }
Index: lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
===
--- lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+++ lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
@@ -458,15 +458,18 @@
   }
 }
 
-static void CollectRegNums(const uint32_t *reg_num, StreamString &response,
+static void CollectRegNums(NativeRegisterContext ®_context,
+   const uint32_t *reg_num, StreamString &response,
bool usehex) {
+  uint32_t reg_index = 0;
   for (int i = 0; *reg_num != LLDB_INVALID_REGNUM; ++reg_num, ++i) {
+reg_index = reg_context.RegInfosIndexToUserRegIndex(*reg_num);
 if (i > 0)
   response.PutChar(',');
 if (usehex)
-  response.Printf("%" PRIx32, *reg_num);
+  response.Printf("%" PRIx32, reg_index);
 else
-  response.Printf("%" PRIu32, *reg_num);
+  response.Printf("%" PRIu32, reg_index);
   }
 }
 
@@ -1772,7 +1775,9 @@
   if (reg_index >= reg_context.GetUserRegisterCount())
 return SendErrorResponse(69);
 
-  const RegisterInfo *reg_info = reg_context.GetRegisterInfoAtIndex(reg_index);
+  uint32_t reg_infos_index = reg_context.UserRegIndexToRegInfosIndex(reg_index);
+  const RegisterInfo *reg_info =
+  reg_context.G

[Lldb-commits] [PATCH] D77045: Minor fixups to LLDB AArch64 register infos macros for SVE register infos

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid added a comment.

In D77045#1966540 , @omjavaid wrote:

> In D77045#1963896 , @labath wrote:
>
> > In D77045#1956879 , @omjavaid 
> > wrote:
> >
> > > Adding a testcase would be tricky as these register overlap in memory and 
> > > we store them with overlapping offsets with their children we should not 
> > > need to invalidate the children when we write the parent but for some 
> > > strange unexplainable reason QEMU was behaving strangely and not updating 
> > > the first half in certain random cases. I just thought invalidation of 
> > > children will force a read after write for that case.
> >
> >
> > Thanks for the explanation, but I'm afraid I still don't get what is going 
> > on here. Can you walk me through the individual steps here? Something like:
> >
> > 1. user does "register write x0 xx"
> > 2. lldb translates that to the appropriate `p` packet
> > 3. ???
> > 4. user does "register read w0"
> > 5. bad value comes out because...
>
>
> Let me debug it separately from SVE and I will get back to you with an update.


I have tried to figure this out and eventually problem disappeared after 
updating test environment. I could not really figure out the exact issue.


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https://reviews.llvm.org/D77045



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[Lldb-commits] [PATCH] D77045: Minor fixups to LLDB AArch64 register infos macros for SVE register infos

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid updated this revision to Diff 263105.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77045/new/

https://reviews.llvm.org/D77045

Files:
  lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h


Index: lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
===
--- lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -456,37 +456,26 @@
 static uint32_t g_d30_invalidates[] = {fpu_v30, fpu_s30, LLDB_INVALID_REGNUM};
 static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
 
-// Generates register kinds array for 64-bit general purpose registers
-#define GPR64_KIND(reg, generic_kind)  
\
+// Generates register kinds array with DWARF, EH frame and generic kind
+#define MISC_KIND(reg, type, generic_kind) 
\
   {
\
 arm64_ehframe::reg, arm64_dwarf::reg, generic_kind, LLDB_INVALID_REGNUM,   
\
-gpr_##reg  
\
+type##_##reg   
\
   }
 
-// Generates register kinds array for registers with lldb kind
-#define MISC_KIND(lldb_kind)   
\
+// Generates register kinds array for registers with only lldb kind
+#define LLDB_KIND(lldb_kind)   
\
   {
\
 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 
\
 LLDB_INVALID_REGNUM, lldb_kind 
\
   }
 
 // Generates register kinds array for vector registers
-#define VREG_KIND(reg) 
\
-  {
\
-LLDB_INVALID_REGNUM, arm64_dwarf::reg, LLDB_INVALID_REGNUM,
\
-LLDB_INVALID_REGNUM, fpu_##reg 
\
-  }
-
-// Generates register kinds array for cpsr
-#define CPSR_KIND(lldb_kind)   
\
-  {
\
-arm64_ehframe::cpsr, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, 
\
-LLDB_INVALID_REGNUM, lldb_kind 
\
-  }
-
-#define MISC_GPR_KIND(lldb_kind) CPSR_KIND(lldb_kind)
-#define MISC_FPU_KIND(lldb_kind) MISC_KIND(lldb_kind)
-#define MISC_EXC_KIND(lldb_kind) MISC_KIND(lldb_kind)
+#define GPR64_KIND(reg, generic_kind) MISC_KIND(reg, gpr, generic_kind)
+#define VREG_KIND(reg) MISC_KIND(reg, fpu, LLDB_INVALID_REGNUM)
+#define MISC_GPR_KIND(lldb_kind) MISC_KIND(cpsr, gpr, 
LLDB_REGNUM_GENERIC_FLAGS)
+#define MISC_FPU_KIND(lldb_kind) LLDB_KIND(lldb_kind)
+#define MISC_EXC_KIND(lldb_kind) LLDB_KIND(lldb_kind)
 
 // Defines a 64-bit general purpose register
 #define DEFINE_GPR64(reg, generic_kind)
\
@@ -509,7 +498,7 @@
   {
\
 #wreg, nullptr, 4, 
\
 GPR_OFFSET(gpr_##xreg) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET,   
\
-lldb::eEncodingUint, lldb::eFormatHex, MISC_KIND(gpr_##wreg),  
\
+lldb::eEncodingUint, lldb::eFormatHex, LLDB_KIND(gpr_##wreg),  
\
 g_contained_##xreg, g_##wreg##_invalidates, nullptr, 0 
\
   }
 
@@ -525,7 +514,7 @@
 #define DEFINE_FPU_PSEUDO(reg, size, offset, vreg) 
\
   {
\
 #reg, nullptr, size, FPU_OFFSET(fpu_##vreg - fpu_v0) + offset, 
\
-lldb::eEncodingIEEE754, lldb::eFormatFloat, MISC_KIND(fpu_##reg),  
\
+lldb::eEncodingIEEE754, lldb::eFormatFloat, LLDB_KIND(fpu_##reg),  
\
 g_contained_##vreg, g_##reg##_invalidates, nullptr, 0  
\
   }
 


Index: lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
===
--- lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -456,37 +456,26 @@
 static uint32_t g_d30_invalidates[] = {fpu_v30, fpu_s30, LLDB_INVALID_REGNUM};
 static uint32_t g_d31_invalidates[] = {fpu_v31, fpu_s31, LLDB_INVALID_REGNUM};
 
-// Generates register kinds array for 64-bit general purpose registers
-#define GPR64_KIND(reg, generic_kind)  \
+// Generates register kinds array with DWARF, EH frame and generic kind
+#define MIS

[Lldb-commits] [PATCH] D79699: Add ptrace register access for AArch64 SVE registers

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid created this revision.
omjavaid added reviewers: labath, jasonmolenda, clayborg.
Herald added subscribers: danielkiss, kristof.beyls, tschuett.
Herald added a reviewer: rengolin.

This patch adds NativeRegisterContext_arm64 ptrace routines to access AArch64 
SVE registers. This patch also adds a test-case to test AArch64 SVE registers 
dynamic configuration and read/write.

This patch is part from previously submitted AArch64 SVE register access 
support.


https://reviews.llvm.org/D79699

Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux.h
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
  lldb/source/Plugins/Process/Linux/NativeThreadLinux.h
  lldb/test/API/commands/register/register/aarch64_sve_registers/Makefile
  
lldb/test/API/commands/register/register/aarch64_sve_registers/TestSVERegisters.py
  lldb/test/API/commands/register/register/aarch64_sve_registers/main.c

Index: lldb/test/API/commands/register/register/aarch64_sve_registers/main.c
===
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/main.c
@@ -0,0 +1,5 @@
+int main() {
+  asm volatile("ptrue p0.s\n\t");
+  asm volatile("fcpy  z0.s, p0/m, #5.\n\t");
+  return 0; // Set a break point here.
+}
\ No newline at end of file
Index: lldb/test/API/commands/register/register/aarch64_sve_registers/TestSVERegisters.py
===
--- /dev/null
+++ lldb/test/API/commands/register/register/aarch64_sve_registers/TestSVERegisters.py
@@ -0,0 +1,128 @@
+"""
+Test the AArch64 SVE registers.
+"""
+
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+class RegisterCommandsTestCase(TestBase):
+
+def check_sve_register_size(self, set, name, expected):
+reg_value = set.GetChildMemberWithName(name)
+self.assertTrue(reg_value.IsValid(),
+'Verify we have a register named "%s"' % (name))
+self.assertEqual(reg_value.GetByteSize(), expected,
+ 'Verify "%s" == %i' % (name, expected))
+
+mydir = TestBase.compute_mydir(__file__)
+@skipIf
+def test_sve_registers_configuration(self):
+"""Test AArch64 SVE registers size configuration."""
+self.build()
+self.line = line_number('main.c', '// Set a break point here.')
+
+exe = self.getBuildArtifact("a.out")
+self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(self, "main.c", self.line, num_expected_locations=1)
+self.runCmd("run", RUN_SUCCEEDED)
+
+self.expect("thread backtrace", STOPPED_DUE_TO_BREAKPOINT,
+substrs = ["stop reason = breakpoint 1."])
+
+target = self.dbg.GetSelectedTarget()
+process = target.GetProcess()
+thread = process.GetThreadAtIndex(0)
+currentFrame = thread.GetFrameAtIndex(0)
+
+has_sve = False
+for registerSet in currentFrame.GetRegisters():
+if 'sve registers' in registerSet.GetName().lower():
+has_sve = True
+
+if not has_sve:
+self.skipTest('SVE registers must be supported.')
+
+registerSets = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters()
+
+sve_registers = registerSets.GetValueAtIndex(2)
+
+vg_reg = sve_registers.GetChildMemberWithName("vg")
+
+vg_reg_value = sve_registers.GetChildMemberWithName("vg").GetValueAsUnsigned()
+
+z_reg_size = vg_reg_value * 8
+
+p_reg_size = z_reg_size / 8
+
+for i in range(32):
+self.check_sve_register_size(sve_registers, 'z%i' % (i), z_reg_size)
+
+for i in range(16):
+self.check_sve_register_size(sve_registers, 'p%i' % (i), p_reg_size)
+
+self.check_sve_register_size(sve_registers, 'ffr', p_reg_size)
+
+mydir = TestBase.compute_mydir(__file__)
+@no_debug_info_test
+@skipIf
+def test_sve_registers_read_write(self):
+"""Test AArch64 SVE registers read and write."""
+self.build()
+self.line = line_number('main.c', '// Set a break point here.')
+
+exe = self.getBuildArtifact("a.out")
+self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(self, "main.c", self.line, num_expected_locations=1)
+self.runCmd("run", RUN_SUCCEEDED)
+
+self.expect("thread backtrace", STOPPED_DUE_TO_BREAKPOINT,
+substrs = ["stop reason = breakpoint 1."])
+
+target = self.dbg.GetSelectedTarget()
+process = target.GetProcess()
+thread = process.GetThreadAtIndex(0)
+currentFrame = thread.GetFrameAtIndex(0)
+
+has_sve = Fal

[Lldb-commits] [PATCH] D77047: AArch64 SVE register infos and ptrace support

[Muhammad Omair Javaid via Phabricator via lldb-commits]

omjavaid updated this revision to Diff 263106.
omjavaid added a comment.

This patch now contains AArch64 SVE register infos description and support for 
core dump SVE register access. Linux ptrace support will be submitted in a 
follow up patch while linux ptrace headers are being submitted by Arm under 
license agreement separately.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77047/new/

https://reviews.llvm.org/D77047

Files:
  lldb/include/lldb/Target/RegisterContext.h
  lldb/source/Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoInterface.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
  lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
  lldb/source/Plugins/Process/Utility/lldb-arm64-register-enums.h
  lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
  lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h
  lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
  lldb/source/Utility/ARM64_DWARF_Registers.h
  lldb/source/Utility/ARM64_ehframe_Registers.h
  lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
  lldb/test/API/functionalities/postmortem/elf-core/linux-aarch64-sve.c
  lldb/test/API/functionalities/postmortem/elf-core/linux-aarch64-sve.core

Index: lldb/test/API/functionalities/postmortem/elf-core/linux-aarch64-sve.c
===
--- /dev/null
+++ lldb/test/API/functionalities/postmortem/elf-core/linux-aarch64-sve.c
@@ -0,0 +1,24 @@
+// compile with -march=armv8-a+sve on compatible aarch64 compiler
+// linux-aarch64-sve.core was generated by: aarch64-linux-gnu-gcc-8
+// commandline: -march=armv8-a+sve -nostdlib -static -g linux-aarch64-sve.c
+static void bar(char *boom) {
+  char F = 'b';
+  asm volatile("ptrue p0.s\n\t");
+  asm volatile("fcpy  z0.s, p0/m, #7.5\n\t");
+  asm volatile("ptrue p1.s\n\t");
+  asm volatile("fcpy  z1.s, p1/m, #11.5\n\t");
+  asm volatile("ptrue p3.s\n\t");
+  asm volatile("fcpy  z3.s, p3/m, #15.5\n\t");
+
+  *boom = 47; // Frame bar
+}
+
+static void foo(char *boom, void (*boomer)(char *)) {
+  char F = 'f';
+  boomer(boom); // Frame foo
+}
+
+void _start(void) {
+  char F = '_';
+  foo(0, bar); // Frame _start
+}
Index: lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
===
--- lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
+++ lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
@@ -311,6 +311,47 @@
 
 self.expect("register read --all")
 
+@skipIf(triple='^mips')
+@skipIfLLVMTargetMissing("AArch64")
+def test_aarch64_sve_regs(self):
+# check 64 bit ARM core files
+target = self.dbg.CreateTarget(None)
+self.assertTrue(target, VALID_TARGET)
+process = target.LoadCore("linux-aarch64-sve.core")
+
+values = {}
+values["fp"] = "0xfc1ff4f0"
+values["lr"] = "0x00400170"
+values["sp"] = "0xfc1ff4d0"
+values["pc"] = "0x0040013c"
+values["v0"] = "{0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40}"
+values["v1"] = "{0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41}"
+values["v2"] = "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}"
+values["v3"] = "{0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41}"
+values["s0"] = "7.5"
+values["s1"] = "11.5"
+values["s2"] = "0"
+values["s3"] = "15.5"
+values["d0"] = "65536.0158538818"
+values["d1"] = "1572864.25476074"
+values["d2"] = "0"
+values["d3"] = "25165828.0917969"
+values["vg"] = "0x0004"
+values["z0"] = "{0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40 0x00 0x00 0xf0 0x40}"
+values["z1"] = "{0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41 0x00 0x00 0x38 0x41}"
+values["z2"] = "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}"
+values["z3"] = "{0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41 0x00 0x00 0x78 0x41}"
+values["p0"] = "{0x11 0x11 0x11 0x11}"
+values[