Re: [RFC PATCH v12 05/33] KVM: Convert KVM_ARCH_WANT_MMU_NOTIFIER to CONFIG_KVM_GENERIC_MMU_NOTIFIER
On Thu, Sep 14, 2023 at 7:25 AM Sean Christopherson wrote: > > Convert KVM_ARCH_WANT_MMU_NOTIFIER into a Kconfig and select it where > appropriate to effectively maintain existing behavior. Using a proper > Kconfig will simplify building more functionality on top of KVM's > mmu_notifier infrastructure. > > Add a forward declaration of kvm_gfn_range to kvm_types.h so that > including arch/powerpc/include/asm/kvm_ppc.h's with CONFIG_KVM=n doesn't > generate warnings due to kvm_gfn_range being undeclared. PPC defines > hooks for PR vs. HV without guarding them via #ifdeffery, e.g. > > bool (*unmap_gfn_range)(struct kvm *kvm, struct kvm_gfn_range *range); > bool (*age_gfn)(struct kvm *kvm, struct kvm_gfn_range *range); > bool (*test_age_gfn)(struct kvm *kvm, struct kvm_gfn_range *range); > bool (*set_spte_gfn)(struct kvm *kvm, struct kvm_gfn_range *range); > > Alternatively, PPC could forward declare kvm_gfn_range, but there's no > good reason not to define it in common KVM. > > Signed-off-by: Sean Christopherson Looks good to me. For KVM RISC-V: Acked-by: Anup Patel Thanks, Anup > --- > arch/arm64/include/asm/kvm_host.h | 2 -- > arch/arm64/kvm/Kconfig | 2 +- > arch/mips/include/asm/kvm_host.h| 2 -- > arch/mips/kvm/Kconfig | 2 +- > arch/powerpc/include/asm/kvm_host.h | 2 -- > arch/powerpc/kvm/Kconfig| 8 > arch/powerpc/kvm/powerpc.c | 4 +--- > arch/riscv/include/asm/kvm_host.h | 2 -- > arch/riscv/kvm/Kconfig | 2 +- > arch/x86/include/asm/kvm_host.h | 2 -- > arch/x86/kvm/Kconfig| 2 +- > include/linux/kvm_host.h| 6 +++--- > include/linux/kvm_types.h | 1 + > virt/kvm/Kconfig| 4 > virt/kvm/kvm_main.c | 10 +- > 15 files changed, 22 insertions(+), 29 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h > b/arch/arm64/include/asm/kvm_host.h > index af06ccb7ee34..9e046b64847a 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -921,8 +921,6 @@ int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, > int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, > struct kvm_vcpu_events *events); > > -#define KVM_ARCH_WANT_MMU_NOTIFIER > - > void kvm_arm_halt_guest(struct kvm *kvm); > void kvm_arm_resume_guest(struct kvm *kvm); > > diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig > index 83c1e09be42e..1a15199f 100644 > --- a/arch/arm64/kvm/Kconfig > +++ b/arch/arm64/kvm/Kconfig > @@ -22,7 +22,7 @@ menuconfig KVM > bool "Kernel-based Virtual Machine (KVM) support" > depends on HAVE_KVM > select KVM_GENERIC_HARDWARE_ENABLING > - select MMU_NOTIFIER > + select KVM_GENERIC_MMU_NOTIFIER > select PREEMPT_NOTIFIERS > select HAVE_KVM_CPU_RELAX_INTERCEPT > select KVM_MMIO > diff --git a/arch/mips/include/asm/kvm_host.h > b/arch/mips/include/asm/kvm_host.h > index 54a85f1d4f2c..179f320cc231 100644 > --- a/arch/mips/include/asm/kvm_host.h > +++ b/arch/mips/include/asm/kvm_host.h > @@ -810,8 +810,6 @@ int kvm_mips_mkclean_gpa_pt(struct kvm *kvm, gfn_t > start_gfn, gfn_t end_gfn); > pgd_t *kvm_pgd_alloc(void); > void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu); > > -#define KVM_ARCH_WANT_MMU_NOTIFIER > - > /* Emulation */ > enum emulation_result update_pc(struct kvm_vcpu *vcpu, u32 cause); > int kvm_get_badinstr(u32 *opc, struct kvm_vcpu *vcpu, u32 *out); > diff --git a/arch/mips/kvm/Kconfig b/arch/mips/kvm/Kconfig > index a8cdba75f98d..c04987d2ed2e 100644 > --- a/arch/mips/kvm/Kconfig > +++ b/arch/mips/kvm/Kconfig > @@ -25,7 +25,7 @@ config KVM > select HAVE_KVM_EVENTFD > select HAVE_KVM_VCPU_ASYNC_IOCTL > select KVM_MMIO > - select MMU_NOTIFIER > + select KVM_GENERIC_MMU_NOTIFIER > select INTERVAL_TREE > select KVM_GENERIC_HARDWARE_ENABLING > help > diff --git a/arch/powerpc/include/asm/kvm_host.h > b/arch/powerpc/include/asm/kvm_host.h > index 14ee0dece853..4b5c3f2acf78 100644 > --- a/arch/powerpc/include/asm/kvm_host.h > +++ b/arch/powerpc/include/asm/kvm_host.h > @@ -62,8 +62,6 @@ > > #include > > -#define KVM_ARCH_WANT_MMU_NOTIFIER > - > #define HPTEG_CACHE_NUM(1 << 15) > #define HPTEG_HASH_BITS_PTE13 > #define HPTEG_HASH_BITS_PTE_LONG 12 > diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig > index 902611954200..b33358ee6424 100644 > --- a/arch/powerpc/kvm/Kconfig > +
[PATCH 0/6] RISC-V SBI debug console extension support
This series adds support for SBI debug console extension in KVM RISC-V and Linux RISC-V. To try these patches with KVM RISC-V, use KVMTOOL from riscv_sbi_dbcn_v1 branch at: https://github.com/avpatel/kvmtool.git These patches can also be found in the riscv_sbi_dbcn_v1 branch at: https://github.com/avpatel/linux.git Anup Patel (5): RISC-V: Add defines for SBI debug console extension RISC-V: KVM: Change the SBI specification version to v2.0 RISC-V: KVM: Forward SBI DBCN extension to user-space tty/serial: Add RISC-V SBI debug console based earlycon RISC-V: Enable SBI based earlycon support Atish Patra (1): tty: Add SBI debug console support to HVC SBI driver arch/riscv/configs/defconfig| 1 + arch/riscv/configs/rv32_defconfig | 1 + arch/riscv/include/asm/kvm_vcpu_sbi.h | 3 +- arch/riscv/include/asm/sbi.h| 7 +++ arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_sbi.c | 4 ++ arch/riscv/kvm/vcpu_sbi_replace.c | 31 ++ drivers/tty/hvc/Kconfig | 2 +- drivers/tty/hvc/hvc_riscv_sbi.c | 80 ++--- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 35 +-- 11 files changed, 153 insertions(+), 14 deletions(-) -- 2.34.1
[PATCH 1/6] RISC-V: Add defines for SBI debug console extension
We add SBI debug console extension related defines/enum to the
asm/sbi.h header.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/sbi.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
SBI_EXT_HSM = 0x48534D,
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
+ SBI_EXT_DBCN = 0x4442434E,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x0800,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
/* Flags defined for counter stop function */
#define SBI_PMU_STOP_FLAG_RESET (1 << 0)
+enum sbi_ext_dbcn_fid {
+ SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+ SBI_EXT_DBCN_CONSOLE_READ = 1,
+ SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK0x7f
--
2.34.1
[PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0
We will be implementing SBI DBCN extension for KVM RISC-V so let
us change the KVM RISC-V SBI specification version to v2.0.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index cdcf0ff07be7..8d6d4dce8a5e 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -11,7 +11,7 @@
#define KVM_SBI_IMPID 3
-#define KVM_SBI_VERSION_MAJOR 1
+#define KVM_SBI_VERSION_MAJOR 2
#define KVM_SBI_VERSION_MINOR 0
enum kvm_riscv_sbi_ext_status {
--
2.34.1
[PATCH 3/6] RISC-V: KVM: Forward SBI DBCN extension to user-space
The SBI DBCN extension needs to be emulated in user-space so let
us forward console_puts() call to user-space.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 +
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_sbi.c | 4
arch/riscv/kvm/vcpu_sbi_replace.c | 31 +++
4 files changed, 37 insertions(+)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index 8d6d4dce8a5e..a85f95eb6e85 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -69,6 +69,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
+extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
diff --git a/arch/riscv/include/uapi/asm/kvm.h
b/arch/riscv/include/uapi/asm/kvm.h
index 917d8cc2489e..60d3b21dead7 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -156,6 +156,7 @@ enum KVM_RISCV_SBI_EXT_ID {
KVM_RISCV_SBI_EXT_PMU,
KVM_RISCV_SBI_EXT_EXPERIMENTAL,
KVM_RISCV_SBI_EXT_VENDOR,
+ KVM_RISCV_SBI_EXT_DBCN,
KVM_RISCV_SBI_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
index 9cd97091c723..b54fe52c915a 100644
--- a/arch/riscv/kvm/vcpu_sbi.c
+++ b/arch/riscv/kvm/vcpu_sbi.c
@@ -66,6 +66,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ext[]
= {
.ext_idx = KVM_RISCV_SBI_EXT_PMU,
.ext_ptr = &vcpu_sbi_ext_pmu,
},
+ {
+ .ext_idx = KVM_RISCV_SBI_EXT_DBCN,
+ .ext_ptr = &vcpu_sbi_ext_dbcn,
+ },
{
.ext_idx = KVM_RISCV_SBI_EXT_EXPERIMENTAL,
.ext_ptr = &vcpu_sbi_ext_experimental,
diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c
b/arch/riscv/kvm/vcpu_sbi_replace.c
index 7c4d5d38a339..347c5856347e 100644
--- a/arch/riscv/kvm/vcpu_sbi_replace.c
+++ b/arch/riscv/kvm/vcpu_sbi_replace.c
@@ -175,3 +175,34 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = {
.extid_end = SBI_EXT_SRST,
.handler = kvm_sbi_ext_srst_handler,
};
+
+static int kvm_sbi_ext_dbcn_handler(struct kvm_vcpu *vcpu,
+ struct kvm_run *run,
+ struct kvm_vcpu_sbi_return *retdata)
+{
+ struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
+ unsigned long funcid = cp->a6;
+
+ switch (funcid) {
+ case SBI_EXT_DBCN_CONSOLE_WRITE:
+ case SBI_EXT_DBCN_CONSOLE_READ:
+ case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
+ /*
+* The SBI debug console functions are unconditionally
+* forwarded to the userspace.
+*/
+ kvm_riscv_vcpu_sbi_forward(vcpu, run);
+ retdata->uexit = true;
+ break;
+ default:
+ retdata->err_val = SBI_ERR_NOT_SUPPORTED;
+ }
+
+ return 0;
+}
+
+const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn = {
+ .extid_start = SBI_EXT_DBCN,
+ .extid_end = SBI_EXT_DBCN,
+ .handler = kvm_sbi_ext_dbcn_handler,
+};
--
2.34.1
[PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++---
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..b1da34e8d8cd 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -10,22 +10,49 @@
#include
#include
+#ifdef CONFIG_RISCV_SBI_V01
static void sbi_putc(struct uart_port *port, unsigned char c)
{
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+#endif
+
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+#ifdef CONFIG_32BIT
+ n, pa, (u64)pa >> 32,
+#else
+ n, pa, 0,
+#endif
+ 0, 0, 0);
+}
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0))
+ device->con->write = sbi_dbcn_console_write;
+ else
+#ifdef CONFIG_RISCV_SBI_V01
+ device->con->write = sbi_0_1_console_write;
+#else
+ ret = -ENODEV;
+#endif
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
[PATCH 5/6] tty: Add SBI debug console support to HVC SBI driver
From: Atish Patra
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 80 ++---
2 files changed, 74 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..be8b7e351840 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -15,6 +15,7 @@
#include "hvc_console.h"
+#ifdef CONFIG_RISCV_SBI_V01
static int hvc_sbi_tty_put(uint32_t vtermno, const char *buf, int count)
{
int i;
@@ -39,21 +40,86 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int
count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
+#endif
-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ phys_addr_t pa;
+ struct sbiret ret;
+
+ if (is_vmalloc_addr(buf))
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ else
+ pa = __pa(buf);
+
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+#ifdef CONFIG_32BIT
+ count, pa, (u64)pa >> 32,
+#else
+ count, pa, 0,
+#endif
+ 0, 0, 0);
+
+ if (ret.error)
+ return 0;
+
+ return count;
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ phys_addr_t pa;
+ struct sbiret ret;
+
+ if (is_vmalloc_addr(buf))
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ else
+ pa = __pa(buf);
+
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+#ifdef CONFIG_32BIT
+ count, pa, (u64)pa >> 32,
+#else
+ count, pa, 0,
+#endif
+ 0, 0, 0);
+
+ if (ret.error)
+ return 0;
+
+ return ret.value;
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 16));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else {
+#ifdef CONFIG_RISCV_SBI_V01
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 16));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+#else
+ return -ENODEV;
+#endif
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
[PATCH 6/6] RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfigs for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel --- arch/riscv/configs/defconfig | 1 + arch/riscv/configs/rv32_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index ab86ec3b9eab..f82700da0056 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -132,6 +132,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 89b601e253a6..5721af39afd1 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -- 2.34.1
Re: [PATCH 5/6] tty: Add SBI debug console support to HVC SBI driver
On Tue, Oct 10, 2023 at 10:42 PM Greg Kroah-Hartman
wrote:
>
> On Tue, Oct 10, 2023 at 10:35:02PM +0530, Anup Patel wrote:
> > --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> > @@ -15,6 +15,7 @@
> >
> > #include "hvc_console.h"
> >
> > +#ifdef CONFIG_RISCV_SBI_V01
>
> Please no #ifdef in a .c file, that's not a good style for Linux code at
> all.
>
> And what if you want to build the driver for both options here? What
> will happen?
Okay, I will remove all #ifdef from .c file
>
> > +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int
> > count)
> > {
> > - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf))
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + else
> > + pa = __pa(buf);
> > +
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > +#ifdef CONFIG_32BIT
> > + count, pa, (u64)pa >> 32,
> > +#else
> > + count, pa, 0,
> > +#endif
>
> This is not how to do an api, sorry, again, please no #ifdef if you want
> to support this code for the next 20+ years.
Sure, I will update like you suggested.
>
> thanks,
>
> gre gk-h
Thanks,
Anup
Re: [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon
On Tue, Oct 10, 2023 at 10:46 PM Greg Kroah-Hartman
wrote:
>
> On Tue, Oct 10, 2023 at 10:35:01PM +0530, Anup Patel wrote:
> > We extend the existing RISC-V SBI earlycon support to use the new
> > RISC-V SBI debug console extension.
> >
> > Signed-off-by: Anup Patel
> > ---
> > drivers/tty/serial/Kconfig | 2 +-
> > drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++---
> > 2 files changed, 32 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> > index bdc568a4ab66..cec46091a716 100644
> > --- a/drivers/tty/serial/Kconfig
> > +++ b/drivers/tty/serial/Kconfig
> > @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
> >
> > config SERIAL_EARLYCON_RISCV_SBI
> > bool "Early console using RISC-V SBI"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select SERIAL_CORE
> > select SERIAL_CORE_CONSOLE
> > select SERIAL_EARLYCON
> > diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
> > b/drivers/tty/serial/earlycon-riscv-sbi.c
> > index 27afb0b74ea7..b1da34e8d8cd 100644
> > --- a/drivers/tty/serial/earlycon-riscv-sbi.c
> > +++ b/drivers/tty/serial/earlycon-riscv-sbi.c
> > @@ -10,22 +10,49 @@
> > #include
> > #include
> >
> > +#ifdef CONFIG_RISCV_SBI_V01
> > static void sbi_putc(struct uart_port *port, unsigned char c)
> > {
> > sbi_console_putchar(c);
> > }
> >
> > -static void sbi_console_write(struct console *con,
> > - const char *s, unsigned n)
> > +static void sbi_0_1_console_write(struct console *con,
> > + const char *s, unsigned int n)
> > {
> > struct earlycon_device *dev = con->data;
> > uart_console_write(&dev->port, s, n, sbi_putc);
> > }
> > +#endif
> > +
> > +static void sbi_dbcn_console_write(struct console *con,
> > +const char *s, unsigned int n)
> > +{
> > + phys_addr_t pa = __pa(s);
> > +
> > + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > +#ifdef CONFIG_32BIT
> > + n, pa, (u64)pa >> 32,
> > +#else
> > + n, pa, 0,
> > +#endif
>
> Again, no #ifdef in .c files please.
Okay, I will remove #ifdef from here as well.
>
> thanks,
>
> greg k-h
Thanks,
Anup
Re: [PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0
On Tue, Oct 10, 2023 at 10:43 PM Greg Kroah-Hartman wrote: > > On Tue, Oct 10, 2023 at 10:34:59PM +0530, Anup Patel wrote: > > We will be implementing SBI DBCN extension for KVM RISC-V so let > > us change the KVM RISC-V SBI specification version to v2.0. > > > > Signed-off-by: Anup Patel > > --- > > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > index cdcf0ff07be7..8d6d4dce8a5e 100644 > > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > @@ -11,7 +11,7 @@ > > > > #define KVM_SBI_IMPID 3 > > > > -#define KVM_SBI_VERSION_MAJOR 1 > > +#define KVM_SBI_VERSION_MAJOR 2 > > What does this number mean? Who checks it? Why do you have to keep > incrementing it? This number is the SBI specification version implemented by KVM RISC-V for the Guest kernel. The original sbi_console_putchar() and sbi_console_getchar() are legacy functions (aka SBI v0.1) which were introduced a few years back along with the Linux RISC-V port. The latest SBI v2.0 specification (which is now frozen) introduces a new SBI debug console extension which replaces legacy sbi_console_putchar() and sbi_console_getchar() functions with better alternatives. (Refer, https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/commit-fe4562532a9cc57e5743b6466946c5e5c98c73ca/riscv-sbi.pdf) This series adds SBI debug console implementation in KVM RISC-V so the SBI specification version advertised by KVM RISC-V must also be upgraded to v2.0. Regarding who checks its, the SBI client drivers in the Linux kernel will check SBI specification version implemented by higher privilege mode (M-mode firmware or HS-mode hypervisor) before probing the SBI extension. For example, the HVC SBI driver (PATCH5) will ensure SBI spec version to be at least v2.0 before probing SBI debug console extension. > > thanks, > > greg k-h Regards, Anup
Re: [PATCH 3/6] RISC-V: KVM: Forward SBI DBCN extension to user-space
On Tue, Oct 10, 2023 at 10:45 PM Greg Kroah-Hartman
wrote:
>
> On Tue, Oct 10, 2023 at 10:35:00PM +0530, Anup Patel wrote:
> > The SBI DBCN extension needs to be emulated in user-space
>
> Why?
The SBI debug console is similar to a console port available to
KVM Guest so the KVM user space tool (i.e. QEMU-KVM or
KVMTOOL) can redirect the input/output of SBI debug console
wherever it wants (e.g. telnet, file, stdio, etc).
We forward SBI DBCN calls to KVM user space so that the
in-kernel KVM does not need to be aware of the guest
console devices.
>
> > so let
> > us forward console_puts() call to user-space.
>
> What could go wrong!
>
> Why does userspace have to get involved in a console message? Why is
> this needed at all? The kernel can not handle userspace consoles as
> obviously they have to be re-entrant and irq safe.
As mentioned above, these are KVM guest console messages which
the VMM (i.e. KVM user-space) can choose to manage on its own.
This is more about providing flexibility to KVM user-space which
allows it to manage guest console devices.
>
> >
> > Signed-off-by: Anup Patel
> > ---
> > arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 +
> > arch/riscv/include/uapi/asm/kvm.h | 1 +
> > arch/riscv/kvm/vcpu_sbi.c | 4
> > arch/riscv/kvm/vcpu_sbi_replace.c | 31 +++
> > 4 files changed, 37 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > index 8d6d4dce8a5e..a85f95eb6e85 100644
> > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > @@ -69,6 +69,7 @@ extern const struct kvm_vcpu_sbi_extension
> > vcpu_sbi_ext_ipi;
> > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence;
> > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
> > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
> > +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn;
> > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
> > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
> >
> > diff --git a/arch/riscv/include/uapi/asm/kvm.h
> > b/arch/riscv/include/uapi/asm/kvm.h
> > index 917d8cc2489e..60d3b21dead7 100644
> > --- a/arch/riscv/include/uapi/asm/kvm.h
> > +++ b/arch/riscv/include/uapi/asm/kvm.h
> > @@ -156,6 +156,7 @@ enum KVM_RISCV_SBI_EXT_ID {
> > KVM_RISCV_SBI_EXT_PMU,
> > KVM_RISCV_SBI_EXT_EXPERIMENTAL,
> > KVM_RISCV_SBI_EXT_VENDOR,
> > + KVM_RISCV_SBI_EXT_DBCN,
> > KVM_RISCV_SBI_EXT_MAX,
>
> You just broke a user/kernel ABI here, why?
The KVM_RISCV_SBI_EXT_MAX only represents the number
of entries in "enum KVM_RISCV_SBI_EXT_ID" so we are not
breaking "enum KVM_RISCV_SBI_EXT_ID" rather appending
new ID to existing enum.
>
> thanks,
>
> greg k-h
Thanks,
Anup
Re: [PATCH 3/6] RISC-V: KVM: Forward SBI DBCN extension to user-space
On Wed, Oct 11, 2023 at 12:56 PM Greg Kroah-Hartman
wrote:
>
> On Wed, Oct 11, 2023 at 12:02:30PM +0530, Anup Patel wrote:
> > On Tue, Oct 10, 2023 at 10:45 PM Greg Kroah-Hartman
> > wrote:
> > >
> > > On Tue, Oct 10, 2023 at 10:35:00PM +0530, Anup Patel wrote:
> > > > The SBI DBCN extension needs to be emulated in user-space
> > >
> > > Why?
> >
> > The SBI debug console is similar to a console port available to
> > KVM Guest so the KVM user space tool (i.e. QEMU-KVM or
> > KVMTOOL) can redirect the input/output of SBI debug console
> > wherever it wants (e.g. telnet, file, stdio, etc).
> >
> > We forward SBI DBCN calls to KVM user space so that the
> > in-kernel KVM does not need to be aware of the guest
> > console devices.
>
> Hint, my "Why" was attempting to get you to write a better changelog
> description, which would include the above information. Please read the
> kernel documentation for hints on how to do this so that we know what
> why changes are being made.
Okay, I will improve the commit description and cover-letter.
>
> > > > so let
> > > > us forward console_puts() call to user-space.
> > >
> > > What could go wrong!
> > >
> > > Why does userspace have to get involved in a console message? Why is
> > > this needed at all? The kernel can not handle userspace consoles as
> > > obviously they have to be re-entrant and irq safe.
> >
> > As mentioned above, these are KVM guest console messages which
> > the VMM (i.e. KVM user-space) can choose to manage on its own.
>
> If it chooses not to, what happens?
If KVM user-space chooses not to handle SBI DBCN calls then it can
disable SBI DBCN extension for Guest VCPUs using the ONE_REG
ioctl() interface.
>
> > This is more about providing flexibility to KVM user-space which
> > allows it to manage guest console devices.
>
> Why not use the normal virtio console device interface instead of making
> a riscv-custom one?
The SBI DBCN (or debug console) is only an early console used for
early prints and bootloaders.
Once the proper console (like virtio console) is detected by the Guest
kernel, it will switch the debug console to proper console.
>
> Where is the userspace side of this interface at? Where are the patches
> to handle this new api you added?
As mentioned in the cover letter, I have implemented it in KVMTOOL first.
The patches can be found in riscv_sbi_dbcn_v1 branch at:
https://github.com/avpatel/kvmtool.git
More precisely, this commit:
https://github.com/avpatel/kvmtool/commit/06a373ee8991f882ef79de3845a4c8d63cb189a6
>
> >
> > >
> > > >
> > > > Signed-off-by: Anup Patel
> > > > ---
> > > > arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 +
> > > > arch/riscv/include/uapi/asm/kvm.h | 1 +
> > > > arch/riscv/kvm/vcpu_sbi.c | 4
> > > > arch/riscv/kvm/vcpu_sbi_replace.c | 31 +++
> > > > 4 files changed, 37 insertions(+)
> > > >
> > > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > > > b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > > > index 8d6d4dce8a5e..a85f95eb6e85 100644
> > > > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > > > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > > > @@ -69,6 +69,7 @@ extern const struct kvm_vcpu_sbi_extension
> > > > vcpu_sbi_ext_ipi;
> > > > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence;
> > > > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
> > > > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
> > > > +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn;
> > > > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
> > > > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
> > > >
> > > > diff --git a/arch/riscv/include/uapi/asm/kvm.h
> > > > b/arch/riscv/include/uapi/asm/kvm.h
> > > > index 917d8cc2489e..60d3b21dead7 100644
> > > > --- a/arch/riscv/include/uapi/asm/kvm.h
> > > > +++ b/arch/riscv/include/uapi/asm/kvm.h
> > > > @@ -156,6 +156,7 @@ enum KVM_RISCV_SBI_EXT_ID {
> > > > KVM_RISCV_SBI_EXT_PMU,
> > > > KVM_RISCV_SBI_EXT_EXPERIMENTAL,
> > > > KVM_RISCV_SBI_EXT_VENDOR,
> > > > + KVM_RISCV_SBI_EXT_DBCN,
> > > > KVM_RISCV_SBI_EXT_MAX,
> > >
> > > You just broke a user/kernel ABI here, why?
> >
> > The KVM_RISCV_SBI_EXT_MAX only represents the number
> > of entries in "enum KVM_RISCV_SBI_EXT_ID" so we are not
> > breaking "enum KVM_RISCV_SBI_EXT_ID" rather appending
> > new ID to existing enum.
>
> So you are sure that userspace never actually tests or sends that _MAX
> value anywhere? If not, why is it even needed?
>
> thanks,
>
> greg k-h
Regards,
Anup
Re: [PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0
On Wed, Oct 11, 2023 at 12:57 PM Greg Kroah-Hartman wrote: > > On Wed, Oct 11, 2023 at 11:49:14AM +0530, Anup Patel wrote: > > On Tue, Oct 10, 2023 at 10:43 PM Greg Kroah-Hartman > > wrote: > > > > > > On Tue, Oct 10, 2023 at 10:34:59PM +0530, Anup Patel wrote: > > > > We will be implementing SBI DBCN extension for KVM RISC-V so let > > > > us change the KVM RISC-V SBI specification version to v2.0. > > > > > > > > Signed-off-by: Anup Patel > > > > --- > > > > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > index cdcf0ff07be7..8d6d4dce8a5e 100644 > > > > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > @@ -11,7 +11,7 @@ > > > > > > > > #define KVM_SBI_IMPID 3 > > > > > > > > -#define KVM_SBI_VERSION_MAJOR 1 > > > > +#define KVM_SBI_VERSION_MAJOR 2 > > > > > > What does this number mean? Who checks it? Why do you have to keep > > > incrementing it? > > > > This number is the SBI specification version implemented by KVM RISC-V > > for the Guest kernel. > > > > The original sbi_console_putchar() and sbi_console_getchar() are legacy > > functions (aka SBI v0.1) which were introduced a few years back along > > with the Linux RISC-V port. > > > > The latest SBI v2.0 specification (which is now frozen) introduces a new > > SBI debug console extension which replaces legacy sbi_console_putchar() > > and sbi_console_getchar() functions with better alternatives. > > (Refer, > > https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/commit-fe4562532a9cc57e5743b6466946c5e5c98c73ca/riscv-sbi.pdf) > > > > This series adds SBI debug console implementation in KVM RISC-V > > so the SBI specification version advertised by KVM RISC-V must also be > > upgraded to v2.0. > > > > Regarding who checks its, the SBI client drivers in the Linux kernel > > will check SBI specification version implemented by higher privilege > > mode (M-mode firmware or HS-mode hypervisor) before probing > > the SBI extension. For example, the HVC SBI driver (PATCH5) > > will ensure SBI spec version to be at least v2.0 before probing > > SBI debug console extension. > > Is this api backwards compatible, or did you just break existing > userspace that only expects version 1.0? The legacy sbi_console_putchar() and sbi_console_getchar() functions have not changed so it does not break existing user-space. The new SBI DBCN functions to be implemented by KVM user space are: sbi_debug_console_write() sbi_debug_console_read() sbi_debug_console_write_byte() > > thanks, > > greg k-h Regards, Anup
Re: [PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0
On Wed, Oct 11, 2023 at 8:56 PM Greg Kroah-Hartman wrote: > > On Wed, Oct 11, 2023 at 04:32:22PM +0530, Anup Patel wrote: > > On Wed, Oct 11, 2023 at 12:57 PM Greg Kroah-Hartman > > wrote: > > > > > > On Wed, Oct 11, 2023 at 11:49:14AM +0530, Anup Patel wrote: > > > > On Tue, Oct 10, 2023 at 10:43 PM Greg Kroah-Hartman > > > > wrote: > > > > > > > > > > On Tue, Oct 10, 2023 at 10:34:59PM +0530, Anup Patel wrote: > > > > > > We will be implementing SBI DBCN extension for KVM RISC-V so let > > > > > > us change the KVM RISC-V SBI specification version to v2.0. > > > > > > > > > > > > Signed-off-by: Anup Patel > > > > > > --- > > > > > > arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +- > > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > > > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > > > b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > > > index cdcf0ff07be7..8d6d4dce8a5e 100644 > > > > > > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > > > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h > > > > > > @@ -11,7 +11,7 @@ > > > > > > > > > > > > #define KVM_SBI_IMPID 3 > > > > > > > > > > > > -#define KVM_SBI_VERSION_MAJOR 1 > > > > > > +#define KVM_SBI_VERSION_MAJOR 2 > > > > > > > > > > What does this number mean? Who checks it? Why do you have to keep > > > > > incrementing it? > > > > > > > > This number is the SBI specification version implemented by KVM RISC-V > > > > for the Guest kernel. > > > > > > > > The original sbi_console_putchar() and sbi_console_getchar() are legacy > > > > functions (aka SBI v0.1) which were introduced a few years back along > > > > with the Linux RISC-V port. > > > > > > > > The latest SBI v2.0 specification (which is now frozen) introduces a new > > > > SBI debug console extension which replaces legacy sbi_console_putchar() > > > > and sbi_console_getchar() functions with better alternatives. > > > > (Refer, > > > > https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/commit-fe4562532a9cc57e5743b6466946c5e5c98c73ca/riscv-sbi.pdf) > > > > > > > > This series adds SBI debug console implementation in KVM RISC-V > > > > so the SBI specification version advertised by KVM RISC-V must also be > > > > upgraded to v2.0. > > > > > > > > Regarding who checks its, the SBI client drivers in the Linux kernel > > > > will check SBI specification version implemented by higher privilege > > > > mode (M-mode firmware or HS-mode hypervisor) before probing > > > > the SBI extension. For example, the HVC SBI driver (PATCH5) > > > > will ensure SBI spec version to be at least v2.0 before probing > > > > SBI debug console extension. > > > > > > Is this api backwards compatible, or did you just break existing > > > userspace that only expects version 1.0? > > > > The legacy sbi_console_putchar() and sbi_console_getchar() > > functions have not changed so it does not break existing > > user-space. > > > > The new SBI DBCN functions to be implemented by KVM > > user space are: > > sbi_debug_console_write() > > sbi_debug_console_read() > > sbi_debug_console_write_byte() > > And where exactly is that code for us to review that this is tested? The KVM selftests for KVM RISC-V are under development. Eventually, we will have dedicated KVM selftests for the SBI extensions implemented by KVM RISC-V. Until then we have KVMTOOL implementation for SBI DBCN, which is available in riscv_sbi_dbcn_v1 branch at: https://github.com/avpatel/kvmtool.git > > thanks, > > greg k-h Regards, Anup
[PATCH v2 0/8] RISC-V SBI debug console extension support
The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 functions sbi_console_putchar() and sbi_console_getchar(). (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) This series adds support for SBI debug console (DBCN) extension in KVM RISC-V and Linux RISC-V. To try these patches with KVM RISC-V, use KVMTOOL from riscv_sbi_dbcn_v1 branch at: https://github.com/avpatel/kvmtool.git These patches can also be found in the riscv_sbi_dbcn_v2 branch at: https://github.com/avpatel/linux.git Changes since v1: - Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series - Improved commit description of PATCH3 in v1 series - Introduced new PATCH3 in this series to allow some SBI extensions (such as SBI DBCN) do to disabled by default so that older KVM user space work fine and newer KVM user space have to explicitly opt-in for emulating SBI DBCN. - Introduced new PATCH5 in this series which adds inline version of sbi_console_getchar() and sbi_console_putchar() for the case where CONFIG_RISCV_SBI_V01 is disabled. Anup Patel (7): RISC-V: Add defines for SBI debug console extension RISC-V: KVM: Change the SBI specification version to v2.0 RISC-V: KVM: Allow some SBI extensions to be disabled by default RISC-V: KVM: Forward SBI DBCN extension to user-space RISC-V: Add inline version of sbi_console_putchar/getchar() functions tty/serial: Add RISC-V SBI debug console based earlycon RISC-V: Enable SBI based earlycon support Atish Patra (1): tty: Add SBI debug console support to HVC SBI driver arch/riscv/configs/defconfig| 1 + arch/riscv/configs/rv32_defconfig | 1 + arch/riscv/include/asm/kvm_vcpu_sbi.h | 7 ++- arch/riscv/include/asm/sbi.h| 12 arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu.c | 6 ++ arch/riscv/kvm/vcpu_sbi.c | 49 +--- arch/riscv/kvm/vcpu_sbi_replace.c | 32 +++ drivers/tty/hvc/Kconfig | 2 +- drivers/tty/hvc/hvc_riscv_sbi.c | 76 ++--- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 32 +-- 12 files changed, 188 insertions(+), 33 deletions(-) -- 2.34.1
[PATCH v2 1/8] RISC-V: Add defines for SBI debug console extension
We add SBI debug console extension related defines/enum to the
asm/sbi.h header.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/sbi.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
SBI_EXT_HSM = 0x48534D,
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
+ SBI_EXT_DBCN = 0x4442434E,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x0800,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
/* Flags defined for counter stop function */
#define SBI_PMU_STOP_FLAG_RESET (1 << 0)
+enum sbi_ext_dbcn_fid {
+ SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+ SBI_EXT_DBCN_CONSOLE_READ = 1,
+ SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK0x7f
--
2.34.1
[PATCH v2 2/8] RISC-V: KVM: Change the SBI specification version to v2.0
We will be implementing SBI DBCN extension for KVM RISC-V so let
us change the KVM RISC-V SBI specification version to v2.0.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index cdcf0ff07be7..8d6d4dce8a5e 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -11,7 +11,7 @@
#define KVM_SBI_IMPID 3
-#define KVM_SBI_VERSION_MAJOR 1
+#define KVM_SBI_VERSION_MAJOR 2
#define KVM_SBI_VERSION_MINOR 0
enum kvm_riscv_sbi_ext_status {
--
2.34.1
[PATCH v2 3/8] RISC-V: KVM: Allow some SBI extensions to be disabled by default
Currently, all SBI extensions are enabled by default which is
problematic for SBI extensions (such as DBCN) which are forwarded
to the KVM user-space because we might have an older KVM user-space
which is not aware/ready to handle newer SBI extensions. Ideally,
the SBI extensions forwarded to the KVM user-space must be
disabled by default.
To address above, we allow certain SBI extensions to be disabled
by default so that KVM user-space must explicitly enable such
SBI extensions to receive forwarded calls from Guest VCPU.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 +++
arch/riscv/kvm/vcpu.c | 6
arch/riscv/kvm/vcpu_sbi.c | 45 ---
3 files changed, 36 insertions(+), 19 deletions(-)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index 8d6d4dce8a5e..c02bda5559d7 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -35,6 +35,9 @@ struct kvm_vcpu_sbi_return {
struct kvm_vcpu_sbi_extension {
unsigned long extid_start;
unsigned long extid_end;
+
+ bool default_unavail;
+
/**
* SBI extension handler. It can be defined for a given extension or
group of
* extension. But it should always return linux error codes rather than
SBI
@@ -59,6 +62,7 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu,
const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
struct kvm_vcpu *vcpu, unsigned long extid);
int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
+void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu);
#ifdef CONFIG_RISCV_SBI_V01
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_v01;
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index c061a1c5fe98..e087c809073c 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -141,6 +141,12 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
if (rc)
return rc;
+ /*
+* Setup SBI extensions
+* NOTE: This must be the last thing to be initialized.
+*/
+ kvm_riscv_vcpu_sbi_init(vcpu);
+
/* Reset VCPU */
kvm_riscv_reset_vcpu(vcpu);
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
index 9cd97091c723..1b1cee86efda 100644
--- a/arch/riscv/kvm/vcpu_sbi.c
+++ b/arch/riscv/kvm/vcpu_sbi.c
@@ -155,14 +155,8 @@ static int riscv_vcpu_set_sbi_ext_single(struct kvm_vcpu
*vcpu,
if (!sext)
return -ENOENT;
- /*
-* We can't set the extension status to available here, since it may
-* have a probe() function which needs to confirm availability first,
-* but it may be too early to call that here. We can set the status to
-* unavailable, though.
-*/
- if (!reg_val)
- scontext->ext_status[sext->ext_idx] =
+ scontext->ext_status[sext->ext_idx] = (reg_val) ?
+ KVM_RISCV_SBI_EXT_AVAILABLE :
KVM_RISCV_SBI_EXT_UNAVAILABLE;
return 0;
@@ -337,18 +331,8 @@ const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
scontext->ext_status[entry->ext_idx] ==
KVM_RISCV_SBI_EXT_AVAILABLE)
return ext;
- if (scontext->ext_status[entry->ext_idx] ==
- KVM_RISCV_SBI_EXT_UNAVAILABLE)
- return NULL;
- if (ext->probe && !ext->probe(vcpu)) {
- scontext->ext_status[entry->ext_idx] =
- KVM_RISCV_SBI_EXT_UNAVAILABLE;
- return NULL;
- }
- scontext->ext_status[entry->ext_idx] =
- KVM_RISCV_SBI_EXT_AVAILABLE;
- return ext;
+ return NULL;
}
}
@@ -419,3 +403,26 @@ int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct
kvm_run *run)
return ret;
}
+
+void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu)
+{
+ struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context;
+ const struct kvm_riscv_sbi_extension_entry *entry;
+ const struct kvm_vcpu_sbi_extension *ext;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) {
+ entry = &sbi_ext[i];
+ ext = entry->ext_ptr;
+
+ if (ext->probe && !ext->probe(vcpu)) {
+ scontext->ext_status[entry->ext_idx] =
+ KVM_RISCV_SBI_EXT_UNAVAILABLE;
+ continue;
+
[PATCH v2 4/8] RISC-V: KVM: Forward SBI DBCN extension to user-space
The frozen SBI v2.0 specification defines the SBI debug console
(DBCN) extension which replaces the legacy SBI v0.1 console
functions namely sbi_console_getchar() and sbi_console_putchar().
The SBI DBCN extension needs to be emulated in the KVM user-space
(i.e. QEMU-KVM or KVMTOOL) so we forward SBI DBCN calls from KVM
guest to the KVM user-space which can then redirect the console
input/output to wherever it wants (e.g. telnet, file, stdio, etc).
The SBI debug console is simply a early console available to KVM
guest for early prints and it does not intend to replace the proper
console devices such as 8250, VirtIO console, etc.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 +
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_sbi.c | 4
arch/riscv/kvm/vcpu_sbi_replace.c | 32 +++
4 files changed, 38 insertions(+)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index c02bda5559d7..6a453f7f8b56 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -73,6 +73,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
+extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
diff --git a/arch/riscv/include/uapi/asm/kvm.h
b/arch/riscv/include/uapi/asm/kvm.h
index 917d8cc2489e..60d3b21dead7 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -156,6 +156,7 @@ enum KVM_RISCV_SBI_EXT_ID {
KVM_RISCV_SBI_EXT_PMU,
KVM_RISCV_SBI_EXT_EXPERIMENTAL,
KVM_RISCV_SBI_EXT_VENDOR,
+ KVM_RISCV_SBI_EXT_DBCN,
KVM_RISCV_SBI_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
index 1b1cee86efda..bb76c3cf633f 100644
--- a/arch/riscv/kvm/vcpu_sbi.c
+++ b/arch/riscv/kvm/vcpu_sbi.c
@@ -66,6 +66,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ext[]
= {
.ext_idx = KVM_RISCV_SBI_EXT_PMU,
.ext_ptr = &vcpu_sbi_ext_pmu,
},
+ {
+ .ext_idx = KVM_RISCV_SBI_EXT_DBCN,
+ .ext_ptr = &vcpu_sbi_ext_dbcn,
+ },
{
.ext_idx = KVM_RISCV_SBI_EXT_EXPERIMENTAL,
.ext_ptr = &vcpu_sbi_ext_experimental,
diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c
b/arch/riscv/kvm/vcpu_sbi_replace.c
index 7c4d5d38a339..23b57c931b15 100644
--- a/arch/riscv/kvm/vcpu_sbi_replace.c
+++ b/arch/riscv/kvm/vcpu_sbi_replace.c
@@ -175,3 +175,35 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = {
.extid_end = SBI_EXT_SRST,
.handler = kvm_sbi_ext_srst_handler,
};
+
+static int kvm_sbi_ext_dbcn_handler(struct kvm_vcpu *vcpu,
+ struct kvm_run *run,
+ struct kvm_vcpu_sbi_return *retdata)
+{
+ struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
+ unsigned long funcid = cp->a6;
+
+ switch (funcid) {
+ case SBI_EXT_DBCN_CONSOLE_WRITE:
+ case SBI_EXT_DBCN_CONSOLE_READ:
+ case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
+ /*
+* The SBI debug console functions are unconditionally
+* forwarded to the userspace.
+*/
+ kvm_riscv_vcpu_sbi_forward(vcpu, run);
+ retdata->uexit = true;
+ break;
+ default:
+ retdata->err_val = SBI_ERR_NOT_SUPPORTED;
+ }
+
+ return 0;
+}
+
+const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn = {
+ .extid_start = SBI_EXT_DBCN,
+ .extid_end = SBI_EXT_DBCN,
+ .default_unavail = true,
+ .handler = kvm_sbi_ext_dbcn_handler,
+};
--
2.34.1
[PATCH v2 5/8] RISC-V: Add inline version of sbi_console_putchar/getchar() functions
The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
inline version of these functions to avoid "#ifdef" on user side.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/sbi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 12dfda6bb924..cbcefa344417 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long
arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+#ifdef CONFIG_RISCV_SBI_V01
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+#else
+static inline void sbi_console_putchar(int ch) { }
+static inline int sbi_console_getchar(void) { return -1; }
+#endif
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
--
2.34.1
[PATCH v2 6/8] tty/serial: Add RISC-V SBI debug console based earlycon
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 32 +
2 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..c21cdef254e7 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,41 @@ static void sbi_putc(struct uart_port *port, unsigned char
c)
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ n, lower_32_bits(pa), upper_32_bits(pa), 0, 0, 0);
+ else
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ n, pa, 0, 0, 0, 0);
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ device->con->write = sbi_dbcn_console_write;
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ ret = -ENODEV;
+ }
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
[PATCH v2 7/8] tty: Add SBI debug console support to HVC SBI driver
From: Atish Patra
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 76 ++---
2 files changed, 70 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..da318d7f55c5 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -39,21 +39,83 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int
count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ phys_addr_t pa;
+ struct sbiret ret;
+
+ if (is_vmalloc_addr(buf))
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ else
+ pa = __pa(buf);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ count, lower_32_bits(pa), upper_32_bits(pa),
+ 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ count, pa, 0, 0, 0, 0);
+ if (ret.error)
+ return 0;
+
+ return count;
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ phys_addr_t pa;
+ struct sbiret ret;
+
+ if (is_vmalloc_addr(buf))
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ else
+ pa = __pa(buf);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ count, lower_32_bits(pa), upper_32_bits(pa),
+ 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ count, pa, 0, 0, 0, 0);
+ if (ret.error)
+ return 0;
+
+ return ret.value;
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 16));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops,
16));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
[PATCH v2 8/8] RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfigs for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel --- arch/riscv/configs/defconfig | 1 + arch/riscv/configs/rv32_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index ab86ec3b9eab..f82700da0056 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -132,6 +132,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 89b601e253a6..5721af39afd1 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -- 2.34.1
Re: [PATCH v2 7/8] tty: Add SBI debug console support to HVC SBI driver
On Thu, Oct 12, 2023 at 5:08 PM Björn Töpel wrote:
>
> Anup Patel writes:
>
> > From: Atish Patra
> >
> > RISC-V SBI specification supports advanced debug console
> > support via SBI DBCN extension.
> >
> > Extend the HVC SBI driver to support it.
> >
> > Signed-off-by: Atish Patra
> > Signed-off-by: Anup Patel
> > ---
> > drivers/tty/hvc/Kconfig | 2 +-
> > drivers/tty/hvc/hvc_riscv_sbi.c | 76 ++---
> > 2 files changed, 70 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> > index 4f9264d005c0..6e05c5c7bca1 100644
> > --- a/drivers/tty/hvc/Kconfig
> > +++ b/drivers/tty/hvc/Kconfig
> > @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
> >
> > config HVC_RISCV_SBI
> > bool "RISC-V SBI console support"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select HVC_DRIVER
> > help
> > This enables support for console output via RISC-V SBI calls, which
> > diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c
> > b/drivers/tty/hvc/hvc_riscv_sbi.c
> > index 31f53fa77e4a..da318d7f55c5 100644
> > --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> > @@ -39,21 +39,83 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf,
> > int count)
> > return i;
> > }
> >
> > -static const struct hv_ops hvc_sbi_ops = {
> > +static const struct hv_ops hvc_sbi_v01_ops = {
> > .get_chars = hvc_sbi_tty_get,
> > .put_chars = hvc_sbi_tty_put,
> > };
> >
> > -static int __init hvc_sbi_init(void)
> > +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int
> > count)
> > {
> > - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf))
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
>
> What is assumed from buf here? If buf is crossing a page, you need to
> adjust the count, no?
I never saw a page crossing buffer but I will certainly address this
in the next revision.
>
> > + else
> > + pa = __pa(buf);
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + count, lower_32_bits(pa), upper_32_bits(pa),
> > + 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + count, pa, 0, 0, 0, 0);
> > + if (ret.error)
> > + return 0;
> > +
> > + return count;
> > }
> > -device_initcall(hvc_sbi_init);
> >
> > -static int __init hvc_sbi_console_init(void)
> > +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> > {
> > - hvc_instantiate(0, 0, &hvc_sbi_ops);
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf))
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
>
> And definitely adjust count here, if we're crossing a page!
Sure, I will update here as well.
Thanks,
Anup
Re: [PATCH v2 3/8] RISC-V: KVM: Allow some SBI extensions to be disabled by default
On Thu, Oct 19, 2023 at 1:27 PM Andrew Jones wrote:
>
> On Thu, Oct 12, 2023 at 10:45:04AM +0530, Anup Patel wrote:
> > Currently, all SBI extensions are enabled by default which is
> > problematic for SBI extensions (such as DBCN) which are forwarded
> > to the KVM user-space because we might have an older KVM user-space
> > which is not aware/ready to handle newer SBI extensions. Ideally,
> > the SBI extensions forwarded to the KVM user-space must be
> > disabled by default.
> >
> > To address above, we allow certain SBI extensions to be disabled
> > by default so that KVM user-space must explicitly enable such
> > SBI extensions to receive forwarded calls from Guest VCPU.
> >
> > Signed-off-by: Anup Patel
> > ---
> > arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 +++
> > arch/riscv/kvm/vcpu.c | 6
> > arch/riscv/kvm/vcpu_sbi.c | 45 ---
> > 3 files changed, 36 insertions(+), 19 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > index 8d6d4dce8a5e..c02bda5559d7 100644
> > --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> > @@ -35,6 +35,9 @@ struct kvm_vcpu_sbi_return {
> > struct kvm_vcpu_sbi_extension {
> > unsigned long extid_start;
> > unsigned long extid_end;
> > +
> > + bool default_unavail;
> > +
> > /**
> >* SBI extension handler. It can be defined for a given extension or
> > group of
> >* extension. But it should always return linux error codes rather
> > than SBI
> > @@ -59,6 +62,7 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu,
> > const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
> > struct kvm_vcpu *vcpu, unsigned long extid);
> > int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
> > +void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu);
> >
> > #ifdef CONFIG_RISCV_SBI_V01
> > extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_v01;
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index c061a1c5fe98..e087c809073c 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -141,6 +141,12 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
> > if (rc)
> > return rc;
> >
> > + /*
> > + * Setup SBI extensions
> > + * NOTE: This must be the last thing to be initialized.
> > + */
> > + kvm_riscv_vcpu_sbi_init(vcpu);
>
> With this, we no longer defer probing to the first access (whether that's
> by the guest or KVM userspace). With our current small set of SBI
> extensions where only a single one has a probe function, then this
> simpler approach is good enough. We can always go back to the lazy
> approach later if needed.
I agree. We can fallback to lazy probing in the future if required.
>
> > +
> > /* Reset VCPU */
> > kvm_riscv_reset_vcpu(vcpu);
> >
> > diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> > index 9cd97091c723..1b1cee86efda 100644
> > --- a/arch/riscv/kvm/vcpu_sbi.c
> > +++ b/arch/riscv/kvm/vcpu_sbi.c
> > @@ -155,14 +155,8 @@ static int riscv_vcpu_set_sbi_ext_single(struct
> > kvm_vcpu *vcpu,
> > if (!sext)
> > return -ENOENT;
> >
> > - /*
> > - * We can't set the extension status to available here, since it may
> > - * have a probe() function which needs to confirm availability first,
> > - * but it may be too early to call that here. We can set the status to
> > - * unavailable, though.
> > - */
> > - if (!reg_val)
> > - scontext->ext_status[sext->ext_idx] =
> > + scontext->ext_status[sext->ext_idx] = (reg_val) ?
> > + KVM_RISCV_SBI_EXT_AVAILABLE :
> > KVM_RISCV_SBI_EXT_UNAVAILABLE;
>
> We're missing the change to riscv_vcpu_get_sbi_ext_single() which should
> also drop the comment block explaining the limits to status knowledge
> without initial probing (which we now do) and then just check for
> available, i.e.
>
> diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> index bb76c3cf633f..92c42d9aba1c 100644
> --- a/arch/riscv/kvm/vcpu_sbi.c
> +++ b/arch/riscv/kvm/vcpu_sbi.c
> @@ -186,15 +186,8 @@ static int riscv_vcpu_get_sbi_ext_single(struct kvm_vcpu
> *vcpu,
> if (!sext)
>
[PATCH v3 0/9] RISC-V SBI debug console extension support
The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 functions sbi_console_putchar() and sbi_console_getchar(). (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) This series adds support for SBI debug console (DBCN) extension in KVM RISC-V and Linux RISC-V. To try these patches with KVM RISC-V, use KVMTOOL from riscv_sbi_dbcn_v1 branch at: https://github.com/avpatel/kvmtool.git These patches can also be found in the riscv_sbi_dbcn_v3 branch at: https://github.com/avpatel/linux.git Changes since v2: - Rebased on Linux-6.6-rc5 - Handled page-crossing in PATCH7 of v2 series - Addressed Drew's comment in PATCH3 of v2 series - Added new PATCH5 to make get-reg-list test aware of SBI DBCN extension Changes since v1: - Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series - Improved commit description of PATCH3 in v1 series - Introduced new PATCH3 in this series to allow some SBI extensions (such as SBI DBCN) do to disabled by default so that older KVM user space work fine and newer KVM user space have to explicitly opt-in for emulating SBI DBCN. - Introduced new PATCH5 in this series which adds inline version of sbi_console_getchar() and sbi_console_putchar() for the case where CONFIG_RISCV_SBI_V01 is disabled. Anup Patel (8): RISC-V: Add defines for SBI debug console extension RISC-V: KVM: Change the SBI specification version to v2.0 RISC-V: KVM: Allow some SBI extensions to be disabled by default RISC-V: KVM: Forward SBI DBCN extension to user-space KVM: riscv: selftests: Add SBI DBCN extension to get-reg-list test RISC-V: Add stubs for sbi_console_putchar/getchar() tty/serial: Add RISC-V SBI debug console based earlycon RISC-V: Enable SBI based earlycon support Atish Patra (1): tty: Add SBI debug console support to HVC SBI driver arch/riscv/configs/defconfig | 1 + arch/riscv/configs/rv32_defconfig | 1 + arch/riscv/include/asm/kvm_vcpu_sbi.h | 7 +- arch/riscv/include/asm/sbi.h | 12 +++ arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu.c | 6 ++ arch/riscv/kvm/vcpu_sbi.c | 61 +++--- arch/riscv/kvm/vcpu_sbi_replace.c | 32 drivers/tty/hvc/Kconfig | 2 +- drivers/tty/hvc/hvc_riscv_sbi.c | 82 +-- drivers/tty/serial/Kconfig| 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 32 +++- .../selftests/kvm/riscv/get-reg-list.c| 2 + 13 files changed, 198 insertions(+), 43 deletions(-) -- 2.34.1
[PATCH v3 1/9] RISC-V: Add defines for SBI debug console extension
We add SBI debug console extension related defines/enum to the
asm/sbi.h header.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
SBI_EXT_HSM = 0x48534D,
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
+ SBI_EXT_DBCN = 0x4442434E,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x0800,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
/* Flags defined for counter stop function */
#define SBI_PMU_STOP_FLAG_RESET (1 << 0)
+enum sbi_ext_dbcn_fid {
+ SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+ SBI_EXT_DBCN_CONSOLE_READ = 1,
+ SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK0x7f
--
2.34.1
[PATCH v3 2/9] RISC-V: KVM: Change the SBI specification version to v2.0
We will be implementing SBI DBCN extension for KVM RISC-V so let
us change the KVM RISC-V SBI specification version to v2.0.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index cdcf0ff07be7..8d6d4dce8a5e 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -11,7 +11,7 @@
#define KVM_SBI_IMPID 3
-#define KVM_SBI_VERSION_MAJOR 1
+#define KVM_SBI_VERSION_MAJOR 2
#define KVM_SBI_VERSION_MINOR 0
enum kvm_riscv_sbi_ext_status {
--
2.34.1
[PATCH v3 3/9] RISC-V: KVM: Allow some SBI extensions to be disabled by default
Currently, all SBI extensions are enabled by default which is
problematic for SBI extensions (such as DBCN) which are forwarded
to the KVM user-space because we might have an older KVM user-space
which is not aware/ready to handle newer SBI extensions. Ideally,
the SBI extensions forwarded to the KVM user-space must be
disabled by default.
To address above, we allow certain SBI extensions to be disabled
by default so that KVM user-space must explicitly enable such
SBI extensions to receive forwarded calls from Guest VCPU.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 ++
arch/riscv/kvm/vcpu.c | 6 +++
arch/riscv/kvm/vcpu_sbi.c | 57 +--
3 files changed, 38 insertions(+), 29 deletions(-)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index 8d6d4dce8a5e..c02bda5559d7 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -35,6 +35,9 @@ struct kvm_vcpu_sbi_return {
struct kvm_vcpu_sbi_extension {
unsigned long extid_start;
unsigned long extid_end;
+
+ bool default_unavail;
+
/**
* SBI extension handler. It can be defined for a given extension or
group of
* extension. But it should always return linux error codes rather than
SBI
@@ -59,6 +62,7 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu,
const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
struct kvm_vcpu *vcpu, unsigned long extid);
int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run);
+void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu);
#ifdef CONFIG_RISCV_SBI_V01
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_v01;
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index c061a1c5fe98..e087c809073c 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -141,6 +141,12 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
if (rc)
return rc;
+ /*
+* Setup SBI extensions
+* NOTE: This must be the last thing to be initialized.
+*/
+ kvm_riscv_vcpu_sbi_init(vcpu);
+
/* Reset VCPU */
kvm_riscv_reset_vcpu(vcpu);
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
index 9cd97091c723..bda8b0b33343 100644
--- a/arch/riscv/kvm/vcpu_sbi.c
+++ b/arch/riscv/kvm/vcpu_sbi.c
@@ -155,14 +155,8 @@ static int riscv_vcpu_set_sbi_ext_single(struct kvm_vcpu
*vcpu,
if (!sext)
return -ENOENT;
- /*
-* We can't set the extension status to available here, since it may
-* have a probe() function which needs to confirm availability first,
-* but it may be too early to call that here. We can set the status to
-* unavailable, though.
-*/
- if (!reg_val)
- scontext->ext_status[sext->ext_idx] =
+ scontext->ext_status[sext->ext_idx] = (reg_val) ?
+ KVM_RISCV_SBI_EXT_AVAILABLE :
KVM_RISCV_SBI_EXT_UNAVAILABLE;
return 0;
@@ -188,16 +182,8 @@ static int riscv_vcpu_get_sbi_ext_single(struct kvm_vcpu
*vcpu,
if (!sext)
return -ENOENT;
- /*
-* If the extension status is still uninitialized, then we should probe
-* to determine if it's available, but it may be too early to do that
-* here. The best we can do is report that the extension has not been
-* disabled, i.e. we return 1 when the extension is available and also
-* when it only may be available.
-*/
- *reg_val = scontext->ext_status[sext->ext_idx] !=
- KVM_RISCV_SBI_EXT_UNAVAILABLE;
-
+ *reg_val = scontext->ext_status[sext->ext_idx] ==
+ KVM_RISCV_SBI_EXT_AVAILABLE;
return 0;
}
@@ -337,18 +323,8 @@ const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext(
scontext->ext_status[entry->ext_idx] ==
KVM_RISCV_SBI_EXT_AVAILABLE)
return ext;
- if (scontext->ext_status[entry->ext_idx] ==
- KVM_RISCV_SBI_EXT_UNAVAILABLE)
- return NULL;
- if (ext->probe && !ext->probe(vcpu)) {
- scontext->ext_status[entry->ext_idx] =
- KVM_RISCV_SBI_EXT_UNAVAILABLE;
- return NULL;
- }
- scontext->ext_status[entry->ext_idx] =
- KVM_RISCV_SBI_EXT_AVAILABLE;
- return ext;
+ return NULL;
}
}
@@ -419,3 +395,2
[PATCH v3 4/9] RISC-V: KVM: Forward SBI DBCN extension to user-space
The frozen SBI v2.0 specification defines the SBI debug console
(DBCN) extension which replaces the legacy SBI v0.1 console
functions namely sbi_console_getchar() and sbi_console_putchar().
The SBI DBCN extension needs to be emulated in the KVM user-space
(i.e. QEMU-KVM or KVMTOOL) so we forward SBI DBCN calls from KVM
guest to the KVM user-space which can then redirect the console
input/output to wherever it wants (e.g. telnet, file, stdio, etc).
The SBI debug console is simply a early console available to KVM
guest for early prints and it does not intend to replace the proper
console devices such as 8250, VirtIO console, etc.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 +
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_sbi.c | 4
arch/riscv/kvm/vcpu_sbi_replace.c | 32 +++
4 files changed, 38 insertions(+)
diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h
b/arch/riscv/include/asm/kvm_vcpu_sbi.h
index c02bda5559d7..6a453f7f8b56 100644
--- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
+++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
@@ -73,6 +73,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_ipi;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
+extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
diff --git a/arch/riscv/include/uapi/asm/kvm.h
b/arch/riscv/include/uapi/asm/kvm.h
index 917d8cc2489e..60d3b21dead7 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -156,6 +156,7 @@ enum KVM_RISCV_SBI_EXT_ID {
KVM_RISCV_SBI_EXT_PMU,
KVM_RISCV_SBI_EXT_EXPERIMENTAL,
KVM_RISCV_SBI_EXT_VENDOR,
+ KVM_RISCV_SBI_EXT_DBCN,
KVM_RISCV_SBI_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
index bda8b0b33343..a04ff98085d9 100644
--- a/arch/riscv/kvm/vcpu_sbi.c
+++ b/arch/riscv/kvm/vcpu_sbi.c
@@ -66,6 +66,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ext[]
= {
.ext_idx = KVM_RISCV_SBI_EXT_PMU,
.ext_ptr = &vcpu_sbi_ext_pmu,
},
+ {
+ .ext_idx = KVM_RISCV_SBI_EXT_DBCN,
+ .ext_ptr = &vcpu_sbi_ext_dbcn,
+ },
{
.ext_idx = KVM_RISCV_SBI_EXT_EXPERIMENTAL,
.ext_ptr = &vcpu_sbi_ext_experimental,
diff --git a/arch/riscv/kvm/vcpu_sbi_replace.c
b/arch/riscv/kvm/vcpu_sbi_replace.c
index 7c4d5d38a339..23b57c931b15 100644
--- a/arch/riscv/kvm/vcpu_sbi_replace.c
+++ b/arch/riscv/kvm/vcpu_sbi_replace.c
@@ -175,3 +175,35 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst = {
.extid_end = SBI_EXT_SRST,
.handler = kvm_sbi_ext_srst_handler,
};
+
+static int kvm_sbi_ext_dbcn_handler(struct kvm_vcpu *vcpu,
+ struct kvm_run *run,
+ struct kvm_vcpu_sbi_return *retdata)
+{
+ struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
+ unsigned long funcid = cp->a6;
+
+ switch (funcid) {
+ case SBI_EXT_DBCN_CONSOLE_WRITE:
+ case SBI_EXT_DBCN_CONSOLE_READ:
+ case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
+ /*
+* The SBI debug console functions are unconditionally
+* forwarded to the userspace.
+*/
+ kvm_riscv_vcpu_sbi_forward(vcpu, run);
+ retdata->uexit = true;
+ break;
+ default:
+ retdata->err_val = SBI_ERR_NOT_SUPPORTED;
+ }
+
+ return 0;
+}
+
+const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn = {
+ .extid_start = SBI_EXT_DBCN,
+ .extid_end = SBI_EXT_DBCN,
+ .default_unavail = true,
+ .handler = kvm_sbi_ext_dbcn_handler,
+};
--
2.34.1
[PATCH v3 5/9] KVM: riscv: selftests: Add SBI DBCN extension to get-reg-list test
We have a new SBI debug console (DBCN) extension supported by in-kernel
KVM so let us add this extension to get-reg-list test.
Signed-off-by: Anup Patel
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c
b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 234006d035c9..6bedaea95395 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -394,6 +394,7 @@ static const char *sbi_ext_single_id_to_str(__u64 reg_off)
KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_PMU),
KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_EXPERIMENTAL),
KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_VENDOR),
+ KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_DBCN),
};
if (reg_off >= ARRAY_SIZE(kvm_sbi_ext_reg_name))
@@ -567,6 +568,7 @@ static __u64 base_regs[] = {
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT |
KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_PMU,
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT |
KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL,
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT |
KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR,
+ KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT |
KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN,
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT |
KVM_REG_RISCV_SBI_MULTI_EN | 0,
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT |
KVM_REG_RISCV_SBI_MULTI_DIS | 0,
};
--
2.34.1
[PATCH v3 6/9] RISC-V: Add stubs for sbi_console_putchar/getchar()
The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
stub of these functions to avoid "#ifdef" on user side.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 12dfda6bb924..cbcefa344417 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long
arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+#ifdef CONFIG_RISCV_SBI_V01
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+#else
+static inline void sbi_console_putchar(int ch) { }
+static inline int sbi_console_getchar(void) { return -1; }
+#endif
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
--
2.34.1
[PATCH v3 7/9] tty/serial: Add RISC-V SBI debug console based earlycon
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 32 +
2 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..c21cdef254e7 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,41 @@ static void sbi_putc(struct uart_port *port, unsigned char
c)
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ n, lower_32_bits(pa), upper_32_bits(pa), 0, 0, 0);
+ else
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ n, pa, 0, 0, 0, 0);
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ device->con->write = sbi_dbcn_console_write;
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ ret = -ENODEV;
+ }
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
[PATCH v3 8/9] tty: Add SBI debug console support to HVC SBI driver
From: Atish Patra
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 82 ++---
2 files changed, 76 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..56da1a4b5aca 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -39,21 +39,89 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int
count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ phys_addr_t pa;
+ struct sbiret ret;
+
+ if (is_vmalloc_addr(buf)) {
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ if (PAGE_SIZE < (offset_in_page(buf) + count))
+ count = PAGE_SIZE - offset_in_page(buf);
+ } else {
+ pa = __pa(buf);
+ }
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ count, lower_32_bits(pa), upper_32_bits(pa),
+ 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ count, pa, 0, 0, 0, 0);
+ if (ret.error)
+ return 0;
+
+ return count;
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ phys_addr_t pa;
+ struct sbiret ret;
+
+ if (is_vmalloc_addr(buf)) {
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ if (PAGE_SIZE < (offset_in_page(buf) + count))
+ count = PAGE_SIZE - offset_in_page(buf);
+ } else {
+ pa = __pa(buf);
+ }
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ count, lower_32_bits(pa), upper_32_bits(pa),
+ 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ count, pa, 0, 0, 0, 0);
+ if (ret.error)
+ return 0;
+
+ return ret.value;
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 16));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops,
16));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
[PATCH v3 9/9] RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfigs for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/configs/defconfig | 1 + arch/riscv/configs/rv32_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index ab86ec3b9eab..f82700da0056 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -132,6 +132,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 89b601e253a6..5721af39afd1 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -- 2.34.1
Re: [PATCH v3 8/9] tty: Add SBI debug console support to HVC SBI driver
On Fri, Oct 20, 2023 at 3:25 PM Björn Töpel wrote:
>
> Anup Patel writes:
>
> > From: Atish Patra
> >
> > RISC-V SBI specification supports advanced debug console
> > support via SBI DBCN extension.
> >
> > Extend the HVC SBI driver to support it.
> >
> > Signed-off-by: Atish Patra
> > Signed-off-by: Anup Patel
> > ---
> > drivers/tty/hvc/Kconfig | 2 +-
> > drivers/tty/hvc/hvc_riscv_sbi.c | 82 ++---
> > 2 files changed, 76 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> > index 4f9264d005c0..6e05c5c7bca1 100644
> > --- a/drivers/tty/hvc/Kconfig
> > +++ b/drivers/tty/hvc/Kconfig
> > @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
> >
> > config HVC_RISCV_SBI
> > bool "RISC-V SBI console support"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select HVC_DRIVER
> > help
> > This enables support for console output via RISC-V SBI calls, which
> > diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c
> > b/drivers/tty/hvc/hvc_riscv_sbi.c
> > index 31f53fa77e4a..56da1a4b5aca 100644
> > --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> > @@ -39,21 +39,89 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf,
> > int count)
> > return i;
> > }
> >
> > -static const struct hv_ops hvc_sbi_ops = {
> > +static const struct hv_ops hvc_sbi_v01_ops = {
> > .get_chars = hvc_sbi_tty_get,
> > .put_chars = hvc_sbi_tty_put,
> > };
> >
> > -static int __init hvc_sbi_init(void)
> > +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int
> > count)
> > {
> > - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf)) {
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + if (PAGE_SIZE < (offset_in_page(buf) + count))
> > + count = PAGE_SIZE - offset_in_page(buf);
>
> Thanks for fixing the cross-page issue. Now you're cutting the buffer
> off. What about doing two SBI calls instead? (Dito on the get side)
We don't need to handle that because the hvc_console framework
will ensure remaining characters are sent-out. Same applies to
get side as well.
Regards,
Anup
Re: [PATCH v3 0/9] RISC-V SBI debug console extension support
On Fri, Oct 20, 2023 at 12:51 PM Anup Patel wrote: > > The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines > SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 > functions sbi_console_putchar() and sbi_console_getchar(). > (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) > > This series adds support for SBI debug console (DBCN) extension in KVM RISC-V > and Linux RISC-V. > > To try these patches with KVM RISC-V, use KVMTOOL from riscv_sbi_dbcn_v1 > branch at: https://github.com/avpatel/kvmtool.git > > These patches can also be found in the riscv_sbi_dbcn_v3 branch at: > https://github.com/avpatel/linux.git > > Changes since v2: > - Rebased on Linux-6.6-rc5 > - Handled page-crossing in PATCH7 of v2 series > - Addressed Drew's comment in PATCH3 of v2 series > - Added new PATCH5 to make get-reg-list test aware of SBI DBCN extension > > Changes since v1: > - Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series > - Improved commit description of PATCH3 in v1 series > - Introduced new PATCH3 in this series to allow some SBI extensions >(such as SBI DBCN) do to disabled by default so that older KVM user space >work fine and newer KVM user space have to explicitly opt-in for emulating >SBI DBCN. > - Introduced new PATCH5 in this series which adds inline version of >sbi_console_getchar() and sbi_console_putchar() for the case where >CONFIG_RISCV_SBI_V01 is disabled. > > Anup Patel (8): > RISC-V: Add defines for SBI debug console extension > RISC-V: KVM: Change the SBI specification version to v2.0 > RISC-V: KVM: Allow some SBI extensions to be disabled by default > RISC-V: KVM: Forward SBI DBCN extension to user-space > KVM: riscv: selftests: Add SBI DBCN extension to get-reg-list test > RISC-V: Add stubs for sbi_console_putchar/getchar() > tty/serial: Add RISC-V SBI debug console based earlycon > RISC-V: Enable SBI based earlycon support > > Atish Patra (1): > tty: Add SBI debug console support to HVC SBI driver Queued PATCH1 to PATCH5 for Linux-6.7 Remaining PATCH6 to PATCH9 are still under review. Thanks, Anup > > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > arch/riscv/include/asm/kvm_vcpu_sbi.h | 7 +- > arch/riscv/include/asm/sbi.h | 12 +++ > arch/riscv/include/uapi/asm/kvm.h | 1 + > arch/riscv/kvm/vcpu.c | 6 ++ > arch/riscv/kvm/vcpu_sbi.c | 61 +++--- > arch/riscv/kvm/vcpu_sbi_replace.c | 32 > drivers/tty/hvc/Kconfig | 2 +- > drivers/tty/hvc/hvc_riscv_sbi.c | 82 +-- > drivers/tty/serial/Kconfig| 2 +- > drivers/tty/serial/earlycon-riscv-sbi.c | 32 +++- > .../selftests/kvm/riscv/get-reg-list.c| 2 + > 13 files changed, 198 insertions(+), 43 deletions(-) > > -- > 2.34.1 > > > -- > kvm-riscv mailing list > kvm-ri...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kvm-riscv
Re: [PATCH v3 8/9] tty: Add SBI debug console support to HVC SBI driver
On Fri, Oct 20, 2023 at 4:16 PM Andrew Jones wrote:
>
> On Fri, Oct 20, 2023 at 12:51:39PM +0530, Anup Patel wrote:
> > From: Atish Patra
> >
> > RISC-V SBI specification supports advanced debug console
> > support via SBI DBCN extension.
> >
> > Extend the HVC SBI driver to support it.
> >
> > Signed-off-by: Atish Patra
> > Signed-off-by: Anup Patel
> > ---
> > drivers/tty/hvc/Kconfig | 2 +-
> > drivers/tty/hvc/hvc_riscv_sbi.c | 82 ++---
> > 2 files changed, 76 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> > index 4f9264d005c0..6e05c5c7bca1 100644
> > --- a/drivers/tty/hvc/Kconfig
> > +++ b/drivers/tty/hvc/Kconfig
> > @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
> >
> > config HVC_RISCV_SBI
> > bool "RISC-V SBI console support"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select HVC_DRIVER
> > help
> > This enables support for console output via RISC-V SBI calls, which
> > diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c
> > b/drivers/tty/hvc/hvc_riscv_sbi.c
> > index 31f53fa77e4a..56da1a4b5aca 100644
> > --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> > @@ -39,21 +39,89 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf,
> > int count)
> > return i;
> > }
> >
> > -static const struct hv_ops hvc_sbi_ops = {
> > +static const struct hv_ops hvc_sbi_v01_ops = {
> > .get_chars = hvc_sbi_tty_get,
> > .put_chars = hvc_sbi_tty_put,
> > };
> >
> > -static int __init hvc_sbi_init(void)
> > +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int
> > count)
> > {
> > - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf)) {
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + if (PAGE_SIZE < (offset_in_page(buf) + count))
>
> I thought checkpatch complained about uppercase constants being on the
> left in comparisons.
Nope checkpatch does not complain about this.
>
> > + count = PAGE_SIZE - offset_in_page(buf);
> > + } else {
> > + pa = __pa(buf);
> > + }
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + count, lower_32_bits(pa), upper_32_bits(pa),
> > + 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + count, pa, 0, 0, 0, 0);
> > + if (ret.error)
> > + return 0;
> > +
> > + return count;
>
> Shouldn't we return ret.value here in case it's less than count? I see we
> already do that below in get().
Ahh, yes. Good catch, I will update.
>
> > }
> > -device_initcall(hvc_sbi_init);
> >
> > -static int __init hvc_sbi_console_init(void)
> > +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> > {
> > - hvc_instantiate(0, 0, &hvc_sbi_ops);
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf)) {
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + if (PAGE_SIZE < (offset_in_page(buf) + count))
> > + count = PAGE_SIZE - offset_in_page(buf);
> > + } else {
> > + pa = __pa(buf);
> > + }
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + count, lower_32_bits(pa), upper_32_bits(pa),
> > + 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + count, pa, 0, 0, 0, 0);
> > + if (ret.error)
> > + return 0;
> > +
> > + return ret.value;
> > +}
> > +
> > +static const struct hv_ops hvc_sbi_dbcn_ops = {
> > + .put_chars = hvc_sbi_dbcn_tty_put,
> > + .get_chars = hvc_sbi_dbcn_tty_get,
> > +};
> > +
> > +static int __init hvc_sbi_init(void)
> > +{
> > + int err;
&g
Re: [PATCH v3 6/9] RISC-V: Add stubs for sbi_console_putchar/getchar()
On Sat, Oct 21, 2023 at 10:05 PM Greg Kroah-Hartman
wrote:
>
> On Fri, Oct 20, 2023 at 12:51:37PM +0530, Anup Patel wrote:
> > The functions sbi_console_putchar() and sbi_console_getchar() are
> > not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
> > stub of these functions to avoid "#ifdef" on user side.
> >
> > Signed-off-by: Anup Patel
> > Reviewed-by: Andrew Jones
> > ---
> > arch/riscv/include/asm/sbi.h | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> > index 12dfda6bb924..cbcefa344417 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned
> > long arg0,
> > unsigned long arg3, unsigned long arg4,
> > unsigned long arg5);
> >
> > +#ifdef CONFIG_RISCV_SBI_V01
> > void sbi_console_putchar(int ch);
> > int sbi_console_getchar(void);
> > +#else
> > +static inline void sbi_console_putchar(int ch) { }
> > +static inline int sbi_console_getchar(void) { return -1; }
>
> Why not return a real error, "-1" isn't that :)
As-per SBI spec, the legacy sbi_console_getchar() returns
-1 upon failure hence the code.
Refer, section 5.3 of the latest SBI spec
https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/commit-fe4562532a9cc57e5743b6466946c5e5c98c73ca/riscv-sbi.pdf
Although, the users of this function only expect a negative
value upon failure so better to return proper error code here.
I will update.
>
> thanks,
>
> greg k-h
>
> --
> kvm-riscv mailing list
> kvm-ri...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv
Regards,
Anup
Re: [PATCH v3 7/9] tty/serial: Add RISC-V SBI debug console based earlycon
On Sat, Oct 21, 2023 at 10:16 PM Greg Kroah-Hartman
wrote:
>
> On Fri, Oct 20, 2023 at 12:51:38PM +0530, Anup Patel wrote:
> > We extend the existing RISC-V SBI earlycon support to use the new
> > RISC-V SBI debug console extension.
> >
> > Signed-off-by: Anup Patel
> > Reviewed-by: Andrew Jones
> > ---
> > drivers/tty/serial/Kconfig | 2 +-
> > drivers/tty/serial/earlycon-riscv-sbi.c | 32 +
> > 2 files changed, 29 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> > index bdc568a4ab66..cec46091a716 100644
> > --- a/drivers/tty/serial/Kconfig
> > +++ b/drivers/tty/serial/Kconfig
> > @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
> >
> > config SERIAL_EARLYCON_RISCV_SBI
> > bool "Early console using RISC-V SBI"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select SERIAL_CORE
> > select SERIAL_CORE_CONSOLE
> > select SERIAL_EARLYCON
> > diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
> > b/drivers/tty/serial/earlycon-riscv-sbi.c
> > index 27afb0b74ea7..c21cdef254e7 100644
> > --- a/drivers/tty/serial/earlycon-riscv-sbi.c
> > +++ b/drivers/tty/serial/earlycon-riscv-sbi.c
> > @@ -15,17 +15,41 @@ static void sbi_putc(struct uart_port *port, unsigned
> > char c)
> > sbi_console_putchar(c);
> > }
> >
> > -static void sbi_console_write(struct console *con,
> > - const char *s, unsigned n)
> > +static void sbi_0_1_console_write(struct console *con,
> > + const char *s, unsigned int n)
> > {
> > struct earlycon_device *dev = con->data;
> > uart_console_write(&dev->port, s, n, sbi_putc);
> > }
> >
> > +static void sbi_dbcn_console_write(struct console *con,
> > +const char *s, unsigned int n)
> > +{
> > + phys_addr_t pa = __pa(s);
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + n, lower_32_bits(pa), upper_32_bits(pa), 0, 0, 0);
> > + else
> > + sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + n, pa, 0, 0, 0, 0);
>
> This is still a bit hard to follow, and I guarantee it will be a pain to
> maintain over time, trying to keep both calls in sync, right?
>
> Why not fix up sbi_ecall() to get this correct instead? It should be
> handling phys_addr_t values, not forcing you to do odd bit masking every
> single time you call it, right? That would make things much easier
> overall, and this patch simpler, as well as the next one.
On RV32 systems, the physical address can be 34bits wide hence
the on RV32 we have to pass physical address as two parameters
whereas on RV64 entier physical address can be passed as single
parameter.
>
> Oh wait, sbi_ecall() is crazy, and just a pass-through, so that's not
> going to work, you need a wrapper function for this mess to do that bit
> twiddeling for you instead of forcing you to do it each time, I guess
> that's what you are trying to do here, but ick, is it correct?
Yes, it is better to have a wrapper function to hide the differences
of RV32 and RV64 systems. I will update.
>
> thanks,
>
> greg k-h
>
> --
> kvm-riscv mailing list
> kvm-ri...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv
Regards,
Anup
Re: [PATCH v3 8/9] tty: Add SBI debug console support to HVC SBI driver
On Sat, Oct 21, 2023 at 10:16 PM Greg Kroah-Hartman
wrote:
>
> On Fri, Oct 20, 2023 at 12:51:39PM +0530, Anup Patel wrote:
> > From: Atish Patra
> >
> > RISC-V SBI specification supports advanced debug console
> > support via SBI DBCN extension.
> >
> > Extend the HVC SBI driver to support it.
> >
> > Signed-off-by: Atish Patra
> > Signed-off-by: Anup Patel
> > ---
> > drivers/tty/hvc/Kconfig | 2 +-
> > drivers/tty/hvc/hvc_riscv_sbi.c | 82 ++---
> > 2 files changed, 76 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> > index 4f9264d005c0..6e05c5c7bca1 100644
> > --- a/drivers/tty/hvc/Kconfig
> > +++ b/drivers/tty/hvc/Kconfig
> > @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
> >
> > config HVC_RISCV_SBI
> > bool "RISC-V SBI console support"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select HVC_DRIVER
> > help
> > This enables support for console output via RISC-V SBI calls, which
> > diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c
> > b/drivers/tty/hvc/hvc_riscv_sbi.c
> > index 31f53fa77e4a..56da1a4b5aca 100644
> > --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> > @@ -39,21 +39,89 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf,
> > int count)
> > return i;
> > }
> >
> > -static const struct hv_ops hvc_sbi_ops = {
> > +static const struct hv_ops hvc_sbi_v01_ops = {
> > .get_chars = hvc_sbi_tty_get,
> > .put_chars = hvc_sbi_tty_put,
> > };
> >
> > -static int __init hvc_sbi_init(void)
> > +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int
> > count)
> > {
> > - return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf)) {
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + if (PAGE_SIZE < (offset_in_page(buf) + count))
> > + count = PAGE_SIZE - offset_in_page(buf);
> > + } else {
> > + pa = __pa(buf);
> > + }
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + count, lower_32_bits(pa), upper_32_bits(pa),
> > + 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + count, pa, 0, 0, 0, 0);
>
> Again, you need a helper function here to keep you from having to keep
> this all in sync.
Sure, I will update.
>
> > + if (ret.error)
> > + return 0;
> > +
> > + return count;
> > }
> > -device_initcall(hvc_sbi_init);
> >
> > -static int __init hvc_sbi_console_init(void)
> > +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> > {
> > - hvc_instantiate(0, 0, &hvc_sbi_ops);
> > + phys_addr_t pa;
> > + struct sbiret ret;
> > +
> > + if (is_vmalloc_addr(buf)) {
> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + if (PAGE_SIZE < (offset_in_page(buf) + count))
> > + count = PAGE_SIZE - offset_in_page(buf);
> > + } else {
> > + pa = __pa(buf);
> > + }
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + count, lower_32_bits(pa), upper_32_bits(pa),
> > + 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + count, pa, 0, 0, 0, 0);
>
> And here too.
Okay.
>
> thanks,
>
> greg k-h
Regards,
Anup
[PATCH v4 0/5] RISC-V SBI debug console extension support
The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 functions sbi_console_putchar() and sbi_console_getchar(). (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) This series adds support for SBI debug console (DBCN) extension in KVM RISC-V and Linux RISC-V. To try these patches with KVM RISC-V, use KVMTOOL from riscv_sbi_dbcn_v1 branch at: https://github.com/avpatel/kvmtool.git These patches can also be found in the riscv_sbi_dbcn_v4 branch at: https://github.com/avpatel/linux.git Changes since v3: - Rebased on Linux-6.7-rc1 - Dropped PATCH1 to PATCH5 of v3 series since these were merged through KVM RISC-V tree for Linux-6.7 - Used proper error code in PATCH1 - Added new PATCH2 which add common SBI debug console helper functions - Updated PATCH3 and PATCH4 to use SBI debug console helper functions Changes since v2: - Rebased on Linux-6.6-rc5 - Handled page-crossing in PATCH7 of v2 series - Addressed Drew's comment in PATCH3 of v2 series - Added new PATCH5 to make get-reg-list test aware of SBI DBCN extension Changes since v1: - Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series - Improved commit description of PATCH3 in v1 series - Introduced new PATCH3 in this series to allow some SBI extensions (such as SBI DBCN) do to disabled by default so that older KVM user space work fine and newer KVM user space have to explicitly opt-in for emulating SBI DBCN. - Introduced new PATCH5 in this series which adds inline version of sbi_console_getchar() and sbi_console_putchar() for the case where CONFIG_RISCV_SBI_V01 is disabled. Anup Patel (4): RISC-V: Add stubs for sbi_console_putchar/getchar() RISC-V: Add SBI debug console helper routines tty/serial: Add RISC-V SBI debug console based earlycon RISC-V: Enable SBI based earlycon support Atish Patra (1): tty: Add SBI debug console support to HVC SBI driver arch/riscv/configs/defconfig| 1 + arch/riscv/configs/rv32_defconfig | 1 + arch/riscv/include/asm/sbi.h| 10 + arch/riscv/kernel/sbi.c | 43 ++ drivers/tty/hvc/Kconfig | 2 +- drivers/tty/hvc/hvc_riscv_sbi.c | 59 ++--- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 24 -- 8 files changed, 129 insertions(+), 13 deletions(-) -- 2.34.1
[PATCH v4 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
stub of these functions to avoid "#ifdef" on user side.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 0892f4421bc4..66f3933c14f6 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long
arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+#ifdef CONFIG_RISCV_SBI_V01
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+#else
+static inline void sbi_console_putchar(int ch) { }
+static inline int sbi_console_getchar(void) { return -ENOENT; }
+#endif
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
--
2.34.1
[PATCH v4 2/5] RISC-V: Add SBI debug console helper routines
Let us provide SBI debug console helper routines which can be
shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/sbi.h | 5 +
arch/riscv/kernel/sbi.c | 43
2 files changed, 48 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 66f3933c14f6..ee7aef5f6233 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigned long
major,
}
int sbi_err_map_linux_errno(int err);
+
+extern bool sbi_debug_console_available;
+int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr);
+int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr);
+
#else /* CONFIG_RISCV_SBI */
static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return
-1; }
static inline void sbi_init(void) {}
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 5a62ed1da453..73a9c22c3945 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -571,6 +571,44 @@ long sbi_get_mimpid(void)
}
EXPORT_SYMBOL_GPL(sbi_get_mimpid);
+bool sbi_debug_console_available;
+
+int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr)
+{
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
+int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr)
+{
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
void __init sbi_init(void)
{
int ret;
@@ -612,6 +650,11 @@ void __init sbi_init(void)
sbi_srst_reboot_nb.priority = 192;
register_restart_handler(&sbi_srst_reboot_nb);
}
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ pr_info("SBI DBCN extension detected\n");
+ sbi_debug_console_available = true;
+ }
} else {
__sbi_set_timer = __sbi_set_timer_v01;
__sbi_send_ipi = __sbi_send_ipi_v01;
--
2.34.1
[PATCH v4 3/5] tty/serial: Add RISC-V SBI debug console based earlycon
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 24
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 732c893c8d16..1f2594b8ab9d 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..5351e1e31f45 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,33 @@ static void sbi_putc(struct uart_port *port, unsigned char
c)
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ sbi_debug_console_write(n, __pa(s));
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if (sbi_debug_console_available) {
+ device->con->write = sbi_dbcn_console_write;
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ ret = -ENODEV;
+ }
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
[PATCH v4 4/5] tty: Add SBI debug console support to HVC SBI driver
From: Atish Patra
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 59 +
2 files changed, 53 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..697c981221b5 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -39,21 +39,66 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int
count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ phys_addr_t pa;
+
+ if (is_vmalloc_addr(buf)) {
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ if (PAGE_SIZE < (offset_in_page(buf) + count))
+ count = PAGE_SIZE - offset_in_page(buf);
+ } else {
+ pa = __pa(buf);
+ }
+
+ return sbi_debug_console_write(count, pa);
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ phys_addr_t pa;
+
+ if (is_vmalloc_addr(buf)) {
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ if (PAGE_SIZE < (offset_in_page(buf) + count))
+ count = PAGE_SIZE - offset_in_page(buf);
+ } else {
+ pa = __pa(buf);
+ }
+
+ return sbi_debug_console_read(count, pa);
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if (sbi_debug_console_available) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops,
256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
[PATCH v4 5/5] RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfigs for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/configs/defconfig | 1 + arch/riscv/configs/rv32_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 905881282a7c..eaf34e871e30 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 89b601e253a6..5721af39afd1 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -- 2.34.1
Re: [PATCH 16/19] cpuidle: Adjust includes to remove of_device.h
On Wed, Mar 29, 2023 at 9:22 PM Rob Herring wrote: > > Now that of_cpu_device_node_get() is defined in of.h, of_device.h is just > implicitly including other includes, and is no longer needed. Adjust the > include files with what was implicitly included by of_device.h (cpu.h, > cpuhotplug.h, of.h, and of_platform.h) and drop including of_device.h. > > Signed-off-by: Rob Herring For cpuidle-riscv-sbi.c Acked-by: Anup Patel Regards, Anup > --- > Please ack and I will take the series via the DT tree. > --- > drivers/cpuidle/cpuidle-psci.c | 1 - > drivers/cpuidle/cpuidle-qcom-spm.c | 3 +-- > drivers/cpuidle/cpuidle-riscv-sbi.c | 2 +- > drivers/cpuidle/dt_idle_states.c| 1 - > 4 files changed, 2 insertions(+), 5 deletions(-) > > diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c > index 6de027f9f6f5..bf68920d038a 100644 > --- a/drivers/cpuidle/cpuidle-psci.c > +++ b/drivers/cpuidle/cpuidle-psci.c > @@ -16,7 +16,6 @@ > #include > #include > #include > -#include > #include > #include > #include > diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c > b/drivers/cpuidle/cpuidle-qcom-spm.c > index c6e2e91bb4c3..1fc9968eae19 100644 > --- a/drivers/cpuidle/cpuidle-qcom-spm.c > +++ b/drivers/cpuidle/cpuidle-qcom-spm.c > @@ -11,8 +11,7 @@ > #include > #include > #include > -#include > -#include > +#include > #include > #include > #include > diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c > b/drivers/cpuidle/cpuidle-riscv-sbi.c > index be383f4b6855..ae0b838a0634 100644 > --- a/drivers/cpuidle/cpuidle-riscv-sbi.c > +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c > @@ -8,6 +8,7 @@ > > #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt > > +#include > #include > #include > #include > @@ -15,7 +16,6 @@ > #include > #include > #include > -#include > #include > #include > #include > diff --git a/drivers/cpuidle/dt_idle_states.c > b/drivers/cpuidle/dt_idle_states.c > index 02aa0b39af9d..12fec92a85fd 100644 > --- a/drivers/cpuidle/dt_idle_states.c > +++ b/drivers/cpuidle/dt_idle_states.c > @@ -14,7 +14,6 @@ > #include > #include > #include > -#include > > #include "dt_idle_states.h" > > > -- > 2.39.2 >
Re: [PATCH v2 1/4] KVM: Refactor stats descriptor generation macros
On Tue, Mar 7, 2023 at 12:32 AM David Matlack wrote:
>
> Refactor the various KVM stats macros to reduce the amount of duplicate
> macro code. This change also improves readability by spelling out
> "CUMULATIVE", "INSTANT", and "PEAK" instead of the previous short-hands
> which were less clear ("COUNTER", "ICOUNTER", and "PCOUNTER").
>
> No functional change intended.
>
> Suggested-by: Sean Christopherson
> Signed-off-by: David Matlack
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/arm64/kvm/guest.c| 14 +--
> arch/mips/kvm/mips.c | 54 +--
> arch/powerpc/kvm/book3s.c | 62 ++--
> arch/powerpc/kvm/booke.c | 48 -
> arch/riscv/kvm/vcpu.c | 16 +--
> arch/s390/kvm/kvm-s390.c | 198 +++---
> arch/x86/kvm/x86.c| 94 +-
> include/linux/kvm_host.h | 95 ++
> 8 files changed, 272 insertions(+), 309 deletions(-)
>
> diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
> index 07444fa22888..890ed444c237 100644
> --- a/arch/arm64/kvm/guest.c
> +++ b/arch/arm64/kvm/guest.c
> @@ -44,13 +44,13 @@ const struct kvm_stats_header kvm_vm_stats_header = {
>
> const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
> KVM_GENERIC_VCPU_STATS(),
> - STATS_DESC_COUNTER(VCPU, hvc_exit_stat),
> - STATS_DESC_COUNTER(VCPU, wfe_exit_stat),
> - STATS_DESC_COUNTER(VCPU, wfi_exit_stat),
> - STATS_DESC_COUNTER(VCPU, mmio_exit_user),
> - STATS_DESC_COUNTER(VCPU, mmio_exit_kernel),
> - STATS_DESC_COUNTER(VCPU, signal_exits),
> - STATS_DESC_COUNTER(VCPU, exits)
> + KVM_STAT(VCPU, CUMULATIVE, NONE, hvc_exit_stat),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, wfe_exit_stat),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, wfi_exit_stat),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, mmio_exit_user),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, mmio_exit_kernel),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, signal_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, exits)
> };
>
> const struct kvm_stats_header kvm_vcpu_stats_header = {
> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
> index 36c8991b5d39..b7b2fa400bcf 100644
> --- a/arch/mips/kvm/mips.c
> +++ b/arch/mips/kvm/mips.c
> @@ -53,34 +53,34 @@ const struct kvm_stats_header kvm_vm_stats_header = {
>
> const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
> KVM_GENERIC_VCPU_STATS(),
> - STATS_DESC_COUNTER(VCPU, wait_exits),
> - STATS_DESC_COUNTER(VCPU, cache_exits),
> - STATS_DESC_COUNTER(VCPU, signal_exits),
> - STATS_DESC_COUNTER(VCPU, int_exits),
> - STATS_DESC_COUNTER(VCPU, cop_unusable_exits),
> - STATS_DESC_COUNTER(VCPU, tlbmod_exits),
> - STATS_DESC_COUNTER(VCPU, tlbmiss_ld_exits),
> - STATS_DESC_COUNTER(VCPU, tlbmiss_st_exits),
> - STATS_DESC_COUNTER(VCPU, addrerr_st_exits),
> - STATS_DESC_COUNTER(VCPU, addrerr_ld_exits),
> - STATS_DESC_COUNTER(VCPU, syscall_exits),
> - STATS_DESC_COUNTER(VCPU, resvd_inst_exits),
> - STATS_DESC_COUNTER(VCPU, break_inst_exits),
> - STATS_DESC_COUNTER(VCPU, trap_inst_exits),
> - STATS_DESC_COUNTER(VCPU, msa_fpe_exits),
> - STATS_DESC_COUNTER(VCPU, fpe_exits),
> - STATS_DESC_COUNTER(VCPU, msa_disabled_exits),
> - STATS_DESC_COUNTER(VCPU, flush_dcache_exits),
> - STATS_DESC_COUNTER(VCPU, vz_gpsi_exits),
> - STATS_DESC_COUNTER(VCPU, vz_gsfc_exits),
> - STATS_DESC_COUNTER(VCPU, vz_hc_exits),
> - STATS_DESC_COUNTER(VCPU, vz_grr_exits),
> - STATS_DESC_COUNTER(VCPU, vz_gva_exits),
> - STATS_DESC_COUNTER(VCPU, vz_ghfc_exits),
> - STATS_DESC_COUNTER(VCPU, vz_gpa_exits),
> - STATS_DESC_COUNTER(VCPU, vz_resvd_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, wait_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, cache_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, signal_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, int_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, cop_unusable_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, tlbmod_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, tlbmiss_ld_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, tlbmiss_st_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, addrerr_st_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, addrerr_ld_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, syscall_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, resvd_inst_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, break_inst_exits),
> + KVM_STAT(VCPU, CUMULATIVE, NONE, trap_inst_exits),
> + KV
Re: [PATCH kernel] KVM: PPC: Make KVM_CAP_IRQFD_RESAMPLE platform dependent
On Wed, May 4, 2022 at 1:18 PM Alexey Kardashevskiy wrote:
>
> When introduced, IRQFD resampling worked on POWER8 with XICS. However
> KVM on POWER9 has never implemented it - the compatibility mode code
> ("XICS-on-XIVE") misses the kvm_notify_acked_irq() call and the native
> XIVE mode does not handle INTx in KVM at all.
>
> This moved the capability support advertising to platforms and stops
> advertising it on XIVE, i.e. POWER9 and later.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
>
>
> Or I could move this one together with KVM_CAP_IRQFD. Thoughts?
For KVM RISC-V:
Acked-by: Anup Patel
Thanks,
Anup
>
> ---
> arch/arm64/kvm/arm.c | 3 +++
> arch/mips/kvm/mips.c | 3 +++
> arch/powerpc/kvm/powerpc.c | 6 ++
> arch/riscv/kvm/vm.c| 3 +++
> arch/s390/kvm/kvm-s390.c | 3 +++
> arch/x86/kvm/x86.c | 3 +++
> virt/kvm/kvm_main.c| 1 -
> 7 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 523bc934fe2f..092f0614bae3 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -210,6 +210,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long
> ext)
> case KVM_CAP_SET_GUEST_DEBUG:
> case KVM_CAP_VCPU_ATTRIBUTES:
> case KVM_CAP_PTP_KVM:
> +#ifdef CONFIG_HAVE_KVM_IRQFD
> + case KVM_CAP_IRQFD_RESAMPLE:
> +#endif
> r = 1;
> break;
> case KVM_CAP_SET_GUEST_DEBUG2:
> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
> index a25e0b73ee70..0f3de470a73e 100644
> --- a/arch/mips/kvm/mips.c
> +++ b/arch/mips/kvm/mips.c
> @@ -1071,6 +1071,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long
> ext)
> case KVM_CAP_READONLY_MEM:
> case KVM_CAP_SYNC_MMU:
> case KVM_CAP_IMMEDIATE_EXIT:
> +#ifdef CONFIG_HAVE_KVM_IRQFD
> + case KVM_CAP_IRQFD_RESAMPLE:
> +#endif
> r = 1;
> break;
> case KVM_CAP_NR_VCPUS:
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index 875c30c12db0..87698ffef3be 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -591,6 +591,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long
> ext)
> break;
> #endif
>
> +#ifdef CONFIG_HAVE_KVM_IRQFD
> + case KVM_CAP_IRQFD_RESAMPLE:
> + r = !xive_enabled();
> + break;
> +#endif
> +
> case KVM_CAP_PPC_ALLOC_HTAB:
> r = hv_enabled;
> break;
> diff --git a/arch/riscv/kvm/vm.c b/arch/riscv/kvm/vm.c
> index c768f75279ef..b58579b386bb 100644
> --- a/arch/riscv/kvm/vm.c
> +++ b/arch/riscv/kvm/vm.c
> @@ -63,6 +63,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
> case KVM_CAP_READONLY_MEM:
> case KVM_CAP_MP_STATE:
> case KVM_CAP_IMMEDIATE_EXIT:
> +#ifdef CONFIG_HAVE_KVM_IRQFD
> + case KVM_CAP_IRQFD_RESAMPLE:
> +#endif
> r = 1;
> break;
> case KVM_CAP_NR_VCPUS:
> diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
> index 156d1c25a3c1..85e093fc8d13 100644
> --- a/arch/s390/kvm/kvm-s390.c
> +++ b/arch/s390/kvm/kvm-s390.c
> @@ -564,6 +564,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long
> ext)
> case KVM_CAP_SET_GUEST_DEBUG:
> case KVM_CAP_S390_DIAG318:
> case KVM_CAP_S390_MEM_OP_EXTENSION:
> +#ifdef CONFIG_HAVE_KVM_IRQFD
> + case KVM_CAP_IRQFD_RESAMPLE:
> +#endif
> r = 1;
> break;
> case KVM_CAP_SET_GUEST_DEBUG2:
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 0c0ca599a353..a0a7b769483d 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -4273,6 +4273,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long
> ext)
> case KVM_CAP_SYS_ATTRIBUTES:
> case KVM_CAP_VAPIC:
> case KVM_CAP_ENABLE_CAP:
> +#ifdef CONFIG_HAVE_KVM_IRQFD
> + case KVM_CAP_IRQFD_RESAMPLE:
> +#endif
> r = 1;
> break;
> case KVM_CAP_EXIT_HYPERCALL:
> diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
> index 70e05af5ebea..885e72e668a5 100644
> --- a/virt/kvm/kvm_main.c
> +++ b/virt/kvm/kvm_main.c
> @@ -4293,7 +4293,6 @@ static long kvm_vm_ioctl_check_extension_generic(struct
> kvm *kvm, long arg)
> #endif
> #ifdef CONFIG_HAVE_KVM_IRQFD
> case KVM_CAP_IRQFD:
> - case KVM_CAP_IRQFD_RESAMPLE:
> #endif
> case KVM_CAP_IOEVENTFD_ANY_LENGTH:
> case KVM_CAP_CHECK_EXTENSION_VM:
> --
> 2.30.2
>
Re: [PATCH v2 05/44] cpuidle,riscv: Push RCU-idle into driver
On Mon, Sep 19, 2022 at 3:47 PM Peter Zijlstra wrote: > > Doing RCU-idle outside the driver, only to then temporarily enable it > again, at least twice, before going idle is daft. > > Signed-off-by: Peter Zijlstra (Intel) Looks good to me. For RISC-V cpuidle: Reviewed-by: Anup Patel Regards, Anup > --- > drivers/cpuidle/cpuidle-riscv-sbi.c |9 + > 1 file changed, 5 insertions(+), 4 deletions(-) > > --- a/drivers/cpuidle/cpuidle-riscv-sbi.c > +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c > @@ -116,12 +116,12 @@ static int __sbi_enter_domain_idle_state > return -1; > > /* Do runtime PM to manage a hierarchical CPU toplogy. */ > - ct_irq_enter_irqson(); > if (s2idle) > dev_pm_genpd_suspend(pd_dev); > else > pm_runtime_put_sync_suspend(pd_dev); > - ct_irq_exit_irqson(); > + > + ct_idle_enter(); > > if (sbi_is_domain_state_available()) > state = sbi_get_domain_state(); > @@ -130,12 +130,12 @@ static int __sbi_enter_domain_idle_state > > ret = sbi_suspend(state) ? -1 : idx; > > - ct_irq_enter_irqson(); > + ct_idle_exit(); > + > if (s2idle) > dev_pm_genpd_resume(pd_dev); > else > pm_runtime_get_sync(pd_dev); > - ct_irq_exit_irqson(); > > cpu_pm_exit(); > > @@ -246,6 +246,7 @@ static int sbi_dt_cpu_init_topology(stru > * of a shared state for the domain, assumes the domain states are all > * deeper states. > */ > + drv->states[state_count - 1].flags |= CPUIDLE_FLAG_RCU_IDLE; > drv->states[state_count - 1].enter = sbi_enter_domain_idle_state; > drv->states[state_count - 1].enter_s2idle = > sbi_enter_s2idle_domain_idle_state; > >
Re: [PATCH v4 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
On Wed, Nov 22, 2023 at 4:06 AM Samuel Holland
wrote:
>
> Hi Anup,
>
> On 2023-11-17 9:38 PM, Anup Patel wrote:
> > The functions sbi_console_putchar() and sbi_console_getchar() are
> > not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
> > stub of these functions to avoid "#ifdef" on user side.
> >
> > Signed-off-by: Anup Patel
> > Reviewed-by: Andrew Jones
> > ---
> > arch/riscv/include/asm/sbi.h | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> > index 0892f4421bc4..66f3933c14f6 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned
> > long arg0,
> > unsigned long arg3, unsigned long arg4,
> > unsigned long arg5);
> >
> > +#ifdef CONFIG_RISCV_SBI_V01
> > void sbi_console_putchar(int ch);
> > int sbi_console_getchar(void);
> > +#else
> > +static inline void sbi_console_putchar(int ch) { }
> > +static inline int sbi_console_getchar(void) { return -ENOENT; }
>
> "The SBI call returns the byte on success, or -1 for failure."
>
> So -ENOENT is not really an appropriate value to return here.
Actually, I had -1 over here previously but based on GregKH's
suggestion, we are now returning proper Linux error code here.
Also, all users of sbi_console_getchar() onlyl expect a negative
value upon error so better to return proper Linux error code.
>
> Regards,
> Samuel
>
> > +#endif
> > long sbi_get_mvendorid(void);
> > long sbi_get_marchid(void);
> > long sbi_get_mimpid(void);
>
Regards,
Anup
Re: [PATCH v4 5/5] RISC-V: Enable SBI based earlycon support
On Wed, Nov 22, 2023 at 4:18 AM Samuel Holland
wrote:
>
> Hi Anup,
>
> On 2023-11-17 9:38 PM, Anup Patel wrote:
> > Let us enable SBI based earlycon support in defconfigs for both RV32
> > and RV64 so that "earlycon=sbi" can be used again.
> >
> > Signed-off-by: Anup Patel
> > Reviewed-by: Andrew Jones
> > ---
> > arch/riscv/configs/defconfig | 1 +
> > arch/riscv/configs/rv32_defconfig | 1 +
> > 2 files changed, 2 insertions(+)
> >
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index 905881282a7c..eaf34e871e30 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
> > CONFIG_SERIAL_8250_DW=y
> > CONFIG_SERIAL_OF_PLATFORM=y
> > CONFIG_SERIAL_SH_SCI=y
> > +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > CONFIG_VIRTIO_CONSOLE=y
> > CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
> > diff --git a/arch/riscv/configs/rv32_defconfig
> > b/arch/riscv/configs/rv32_defconfig
> > index 89b601e253a6..5721af39afd1 100644
> > --- a/arch/riscv/configs/rv32_defconfig
> > +++ b/arch/riscv/configs/rv32_defconfig
>
> This file isn't used anymore since 72f045d19f25 ("riscv: Fixup difference with
> defconfig"), so there's no need to update it. I'll send a patch deleting it.
Okay, I will drop the changes in rv32_defconfig.
>
> Regards,
> Samuel
>
> > @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y
> > CONFIG_SERIAL_8250=y
> > CONFIG_SERIAL_8250_CONSOLE=y
> > CONFIG_SERIAL_OF_PLATFORM=y
> > +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > CONFIG_VIRTIO_CONSOLE=y
> > CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
>
Regards,
Anup
Re: [PATCH v4 3/5] tty/serial: Add RISC-V SBI debug console based earlycon
On Wed, Nov 22, 2023 at 4:11 AM Samuel Holland
wrote:
>
> Hi Anup,
>
> On 2023-11-17 9:38 PM, Anup Patel wrote:
> > We extend the existing RISC-V SBI earlycon support to use the new
> > RISC-V SBI debug console extension.
> >
> > Signed-off-by: Anup Patel
> > Reviewed-by: Andrew Jones
> > ---
> > drivers/tty/serial/Kconfig | 2 +-
> > drivers/tty/serial/earlycon-riscv-sbi.c | 24
> > 2 files changed, 21 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> > index 732c893c8d16..1f2594b8ab9d 100644
> > --- a/drivers/tty/serial/Kconfig
> > +++ b/drivers/tty/serial/Kconfig
> > @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
> >
> > config SERIAL_EARLYCON_RISCV_SBI
> > bool "Early console using RISC-V SBI"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select SERIAL_CORE
> > select SERIAL_CORE_CONSOLE
> > select SERIAL_EARLYCON
> > diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
> > b/drivers/tty/serial/earlycon-riscv-sbi.c
> > index 27afb0b74ea7..5351e1e31f45 100644
> > --- a/drivers/tty/serial/earlycon-riscv-sbi.c
> > +++ b/drivers/tty/serial/earlycon-riscv-sbi.c
> > @@ -15,17 +15,33 @@ static void sbi_putc(struct uart_port *port, unsigned
> > char c)
> > sbi_console_putchar(c);
> > }
> >
> > -static void sbi_console_write(struct console *con,
> > - const char *s, unsigned n)
> > +static void sbi_0_1_console_write(struct console *con,
> > + const char *s, unsigned int n)
> > {
> > struct earlycon_device *dev = con->data;
> > uart_console_write(&dev->port, s, n, sbi_putc);
> > }
> >
> > +static void sbi_dbcn_console_write(struct console *con,
> > +const char *s, unsigned int n)
> > +{
> > + sbi_debug_console_write(n, __pa(s));
>
> This only works for strings in the linear mapping or the kernel mapping (not
> vmalloc, which includes the stack). So I don't think we can use __pa() here.
In which case, we need extend sbi_debug_console_write() to
do the va-to-pa conversion for both earlycon-riscv-sbi.c and
hvc_riscv_sbi.c
>
> > +}
> > +
> > static int __init early_sbi_setup(struct earlycon_device *device,
> > const char *opt)
> > {
> > - device->con->write = sbi_console_write;
> > - return 0;
> > + int ret = 0;
> > +
> > + if (sbi_debug_console_available) {
> > + device->con->write = sbi_dbcn_console_write;
> > + } else {
> > + if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
>
> "else if", no need for the extra block/indentation.
Okay, I will update.
>
> Regards,
> Samuel
>
> > + device->con->write = sbi_0_1_console_write;
> > + else
> > + ret = -ENODEV;
> > + }
> > +
> > + return ret;
> > }
> > EARLYCON_DECLARE(sbi, early_sbi_setup);
>
Regards,
Anup
Re: [PATCH v4 2/5] RISC-V: Add SBI debug console helper routines
On Wed, Nov 22, 2023 at 4:15 AM Samuel Holland
wrote:
>
> Hi Anup,
>
> On 2023-11-17 9:38 PM, Anup Patel wrote:
> > Let us provide SBI debug console helper routines which can be
> > shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.
> >
> > Signed-off-by: Anup Patel
> > ---
> > arch/riscv/include/asm/sbi.h | 5 +
> > arch/riscv/kernel/sbi.c | 43
> > 2 files changed, 48 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> > index 66f3933c14f6..ee7aef5f6233 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigned
> > long major,
> > }
> >
> > int sbi_err_map_linux_errno(int err);
> > +
> > +extern bool sbi_debug_console_available;
> > +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr);
> > +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr);
> > +
> > #else /* CONFIG_RISCV_SBI */
> > static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) {
> > return -1; }
> > static inline void sbi_init(void) {}
> > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> > index 5a62ed1da453..73a9c22c3945 100644
> > --- a/arch/riscv/kernel/sbi.c
> > +++ b/arch/riscv/kernel/sbi.c
> > @@ -571,6 +571,44 @@ long sbi_get_mimpid(void)
> > }
> > EXPORT_SYMBOL_GPL(sbi_get_mimpid);
> >
> > +bool sbi_debug_console_available;
> > +
> > +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr)
> > +{
> > + struct sbiret ret;
> > +
> > + if (!sbi_debug_console_available)
> > + return -EOPNOTSUPP;
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + num_bytes, lower_32_bits(base_addr),
> > + upper_32_bits(base_addr), 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + num_bytes, base_addr, 0, 0, 0, 0);
> > +
> > + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
> > +}
> > +
> > +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr)
> > +{
> > + struct sbiret ret;
> > +
> > + if (!sbi_debug_console_available)
> > + return -EOPNOTSUPP;
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + num_bytes, lower_32_bits(base_addr),
> > + upper_32_bits(base_addr), 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + num_bytes, base_addr, 0, 0, 0, 0);
> > +
> > + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
> > +}
>
> Since every place that calls these functions will need to do the vmalloc
> lookup,
> would it make sense to do it here, and have these take a pointer instead?
Yes, that's better. I will update.
Regards,
Anup
Re: [PATCH v4 2/5] RISC-V: Add SBI debug console helper routines
On Mon, Nov 20, 2023 at 1:35 PM Andrew Jones wrote:
>
> On Sat, Nov 18, 2023 at 09:08:56AM +0530, Anup Patel wrote:
> > Let us provide SBI debug console helper routines which can be
> > shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.
> >
> > Signed-off-by: Anup Patel
> > ---
> > arch/riscv/include/asm/sbi.h | 5 +
> > arch/riscv/kernel/sbi.c | 43
> > 2 files changed, 48 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> > index 66f3933c14f6..ee7aef5f6233 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigned
> > long major,
> > }
> >
> > int sbi_err_map_linux_errno(int err);
> > +
> > +extern bool sbi_debug_console_available;
> > +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr);
> > +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr);
> > +
> > #else /* CONFIG_RISCV_SBI */
> > static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) {
> > return -1; }
> > static inline void sbi_init(void) {}
> > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> > index 5a62ed1da453..73a9c22c3945 100644
> > --- a/arch/riscv/kernel/sbi.c
> > +++ b/arch/riscv/kernel/sbi.c
> > @@ -571,6 +571,44 @@ long sbi_get_mimpid(void)
> > }
> > EXPORT_SYMBOL_GPL(sbi_get_mimpid);
> >
> > +bool sbi_debug_console_available;
> > +
> > +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr)
> > +{
> > + struct sbiret ret;
> > +
> > + if (!sbi_debug_console_available)
> > + return -EOPNOTSUPP;
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + num_bytes, lower_32_bits(base_addr),
> > + upper_32_bits(base_addr), 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> > + num_bytes, base_addr, 0, 0, 0, 0);
> > +
> > + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
>
> We can't get perfect mappings, but I wonder if we can do better than
> returning ENOTSUPP for "Failed to write the byte due to I/O errors."
>
> How about
>
> if (ret.error == SBI_ERR_FAILURE)
> return -EIO;
>
> return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
Seems overkill but I will update anyway.
>
>
> > +}
> > +
> > +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr)
> > +{
> > + struct sbiret ret;
> > +
> > + if (!sbi_debug_console_available)
> > + return -EOPNOTSUPP;
> > +
> > + if (IS_ENABLED(CONFIG_32BIT))
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + num_bytes, lower_32_bits(base_addr),
> > + upper_32_bits(base_addr), 0, 0, 0);
> > + else
> > + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
> > + num_bytes, base_addr, 0, 0, 0, 0);
> > +
> > + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
>
> Same comment as above.
Okay.
>
> > +}
> > +
> > void __init sbi_init(void)
> > {
> > int ret;
> > @@ -612,6 +650,11 @@ void __init sbi_init(void)
> > sbi_srst_reboot_nb.priority = 192;
> > register_restart_handler(&sbi_srst_reboot_nb);
> > }
> > + if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
> > + (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
> > + pr_info("SBI DBCN extension detected\n");
> > + sbi_debug_console_available = true;
> > + }
> > } else {
> > __sbi_set_timer = __sbi_set_timer_v01;
> > __sbi_send_ipi = __sbi_send_ipi_v01;
> > --
> > 2.34.1
> >
>
> Otherwise,
>
> Reviewed-by: Andrew Jones
>
> Thanks,
> drew
Regards,
Anup
[PATCH v5 0/5] RISC-V SBI debug console extension support
The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 functions sbi_console_putchar() and sbi_console_getchar(). (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) This series adds support for SBI debug console (DBCN) extension in Linux RISC-V. To try these patches with KVM RISC-V, use KVMTOOL from the riscv_zbx_zicntr_smstateen_condops_v1 branch at: https://github.com/avpatel/kvmtool.git These patches can also be found in the riscv_sbi_dbcn_v5 branch at: https://github.com/avpatel/linux.git Changes since v4: - Rebased on Linux-6.7-rc2 - Addressed Drew's comments in PATCH2 - Improved sbi_debug_console_write/read() to directly take virtual address of data so that virtual address to physical address conversion can be shared between tty/serial/earlycon-riscv-sbi.c and tty/hvc/hvc_riscv_sbi.c - Addressed Samuel's comments in PATCH3 and PATCH4 Changes since v3: - Rebased on Linux-6.7-rc1 - Dropped PATCH1 to PATCH5 of v3 series since these were merged through KVM RISC-V tree for Linux-6.7 - Used proper error code in PATCH1 - Added new PATCH2 which add common SBI debug console helper functions - Updated PATCH3 and PATCH4 to use SBI debug console helper functions Changes since v2: - Rebased on Linux-6.6-rc5 - Handled page-crossing in PATCH7 of v2 series - Addressed Drew's comment in PATCH3 of v2 series - Added new PATCH5 to make get-reg-list test aware of SBI DBCN extension Changes since v1: - Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series - Improved commit description of PATCH3 in v1 series - Introduced new PATCH3 in this series to allow some SBI extensions (such as SBI DBCN) do to disabled by default so that older KVM user space work fine and newer KVM user space have to explicitly opt-in for emulating SBI DBCN. - Introduced new PATCH5 in this series which adds inline version of sbi_console_getchar() and sbi_console_putchar() for the case where CONFIG_RISCV_SBI_V01 is disabled. Anup Patel (4): RISC-V: Add stubs for sbi_console_putchar/getchar() RISC-V: Add SBI debug console helper routines tty/serial: Add RISC-V SBI debug console based earlycon RISC-V: Enable SBI based earlycon support Atish Patra (1): tty: Add SBI debug console support to HVC SBI driver arch/riscv/configs/defconfig| 1 + arch/riscv/include/asm/sbi.h| 10 arch/riscv/kernel/sbi.c | 66 + drivers/tty/hvc/Kconfig | 2 +- drivers/tty/hvc/hvc_riscv_sbi.c | 37 +++--- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 27 -- 7 files changed, 133 insertions(+), 12 deletions(-) -- 2.34.1
[PATCH v5 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
stub of these functions to avoid "#ifdef" on user side.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 0892f4421bc4..66f3933c14f6 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -271,8 +271,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long
arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+#ifdef CONFIG_RISCV_SBI_V01
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+#else
+static inline void sbi_console_putchar(int ch) { }
+static inline int sbi_console_getchar(void) { return -ENOENT; }
+#endif
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
--
2.34.1
[PATCH v5 2/5] RISC-V: Add SBI debug console helper routines
Let us provide SBI debug console helper routines which can be
shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 5 +++
arch/riscv/kernel/sbi.c | 66
2 files changed, 71 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 66f3933c14f6..9eef25308d53 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigned long
major,
}
int sbi_err_map_linux_errno(int err);
+
+extern bool sbi_debug_console_available;
+int sbi_debug_console_write(const char *bytes, unsigned int num_bytes);
+int sbi_debug_console_read(char *bytes, unsigned int num_bytes);
+
#else /* CONFIG_RISCV_SBI */
static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return
-1; }
static inline void sbi_init(void) {}
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 5a62ed1da453..e66e0999a800 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -7,6 +7,7 @@
#include
#include
+#include
#include
#include
#include
@@ -571,6 +572,66 @@ long sbi_get_mimpid(void)
}
EXPORT_SYMBOL_GPL(sbi_get_mimpid);
+bool sbi_debug_console_available;
+
+int sbi_debug_console_write(const char *bytes, unsigned int num_bytes)
+{
+ phys_addr_t base_addr;
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (is_vmalloc_addr(bytes))
+ base_addr = page_to_phys(vmalloc_to_page(bytes)) +
+ offset_in_page(bytes);
+ else
+ base_addr = __pa(bytes);
+ if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
+ num_bytes = PAGE_SIZE - offset_in_page(bytes);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ if (ret.error == SBI_ERR_FAILURE)
+ return -EIO;
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
+int sbi_debug_console_read(char *bytes, unsigned int num_bytes)
+{
+ phys_addr_t base_addr;
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (is_vmalloc_addr(bytes))
+ base_addr = page_to_phys(vmalloc_to_page(bytes)) +
+ offset_in_page(bytes);
+ else
+ base_addr = __pa(bytes);
+ if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
+ num_bytes = PAGE_SIZE - offset_in_page(bytes);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ if (ret.error == SBI_ERR_FAILURE)
+ return -EIO;
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
void __init sbi_init(void)
{
int ret;
@@ -612,6 +673,11 @@ void __init sbi_init(void)
sbi_srst_reboot_nb.priority = 192;
register_restart_handler(&sbi_srst_reboot_nb);
}
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ pr_info("SBI DBCN extension detected\n");
+ sbi_debug_console_available = true;
+ }
} else {
__sbi_set_timer = __sbi_set_timer_v01;
__sbi_send_ipi = __sbi_send_ipi_v01;
--
2.34.1
[PATCH v5 3/5] tty/serial: Add RISC-V SBI debug console based earlycon
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 27 ++---
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 732c893c8d16..1f2594b8ab9d 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..0162155f0c83 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,38 @@ static void sbi_putc(struct uart_port *port, unsigned char
c)
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ int ret;
+
+ while (n) {
+ ret = sbi_debug_console_write(s, n);
+ if (ret < 0)
+ break;
+
+ s += ret;
+ n -= ret;
+ }
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
+ if (sbi_debug_console_available)
+ device->con->write = sbi_dbcn_console_write;
+ else if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ return -ENODEV;
+
return 0;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
[PATCH v5 4/5] tty: Add SBI debug console support to HVC SBI driver
From: Atish Patra
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 37 ++---
2 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..2f3571f17ecd 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -39,21 +39,44 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int
count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ return sbi_debug_console_write(buf, count);
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ return sbi_debug_console_read(buf, count);
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if (sbi_debug_console_available) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
[PATCH v5 5/5] RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfig for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 905881282a7c..eaf34e871e30 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -- 2.34.1
Re: [PATCH 15/26] KVM: Move include/kvm/iodev.h to include/linux as kvm_iodev.h
On Sat, Sep 16, 2023 at 6:01 AM Sean Christopherson wrote:
>
> Move iodev.h, the last remaining holdout in include/kvm, to the standard
> include/linux directory as kvm_iodev.h and delete include/kvm.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> MAINTAINERS| 1 -
> arch/arm64/include/asm/kvm_vgic.h | 2 +-
> arch/arm64/kvm/vgic/vgic-mmio-v2.c | 2 +-
> arch/arm64/kvm/vgic/vgic-mmio-v3.c | 2 +-
> arch/arm64/kvm/vgic/vgic-mmio.c| 2 +-
> arch/mips/include/asm/kvm_host.h | 3 +--
> arch/powerpc/kvm/mpic.c| 2 +-
> arch/riscv/kvm/aia_aplic.c | 2 +-
> arch/riscv/kvm/aia_imsic.c | 2 +-
> arch/x86/kvm/i8254.h | 2 +-
> arch/x86/kvm/ioapic.h | 2 +-
> arch/x86/kvm/irq.h | 2 +-
> arch/x86/kvm/lapic.h | 2 +-
> include/{kvm/iodev.h => linux/kvm_iodev.h} | 0
> virt/kvm/coalesced_mmio.c | 3 +--
> virt/kvm/eventfd.c | 2 +-
> virt/kvm/kvm_main.c| 3 +--
> 17 files changed, 15 insertions(+), 19 deletions(-)
> rename include/{kvm/iodev.h => linux/kvm_iodev.h} (100%)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 90f13281d297..ddc8375d536c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -11498,7 +11498,6 @@ W: http://www.linux-kvm.org
> T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git
> F: Documentation/virt/kvm/
> F: include/asm-generic/kvm*
> -F: include/kvm/iodev.h
> F: include/linux/kvm*
> F: include/trace/events/kvm.h
> F: include/uapi/asm-generic/kvm*
> diff --git a/arch/arm64/include/asm/kvm_vgic.h
> b/arch/arm64/include/asm/kvm_vgic.h
> index 5b27f94d4fad..2ca52888bc75 100644
> --- a/arch/arm64/include/asm/kvm_vgic.h
> +++ b/arch/arm64/include/asm/kvm_vgic.h
> @@ -13,7 +13,7 @@
> #include
> #include
> #include
> -#include
> +#include
> #include
> #include
>
> diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v2.c
> b/arch/arm64/kvm/vgic/vgic-mmio-v2.c
> index bba0cfeefffe..646053ee892f 100644
> --- a/arch/arm64/kvm/vgic/vgic-mmio-v2.c
> +++ b/arch/arm64/kvm/vgic/vgic-mmio-v2.c
> @@ -6,9 +6,9 @@
> #include
> #include
> #include
> +#include
> #include
>
> -#include
> #include
>
> #include "vgic.h"
> diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> index d54a90beef61..b79a2e860415 100644
> --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
> @@ -7,8 +7,8 @@
> #include
> #include
> #include
> +#include
> #include
> -#include
>
> #include
> #include
> diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c
> index 68a3d8062473..4feca3b1d915 100644
> --- a/arch/arm64/kvm/vgic/vgic-mmio.c
> +++ b/arch/arm64/kvm/vgic/vgic-mmio.c
> @@ -9,7 +9,7 @@
> #include
> #include
> #include
> -#include
> +#include
> #include
> #include
>
> diff --git a/arch/mips/include/asm/kvm_host.h
> b/arch/mips/include/asm/kvm_host.h
> index 54a85f1d4f2c..f8f63d0aa399 100644
> --- a/arch/mips/include/asm/kvm_host.h
> +++ b/arch/mips/include/asm/kvm_host.h
> @@ -16,6 +16,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -24,8 +25,6 @@
> #include
> #include
>
> -#include
> -
> /* MIPS KVM register ids */
> #define MIPS_CP0_32(_R, _S)\
> (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
> diff --git a/arch/powerpc/kvm/mpic.c b/arch/powerpc/kvm/mpic.c
> index 23e9c2bd9f27..b25a03251544 100644
> --- a/arch/powerpc/kvm/mpic.c
> +++ b/arch/powerpc/kvm/mpic.c
> @@ -26,6 +26,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -33,7 +34,6 @@
> #include
> #include
> #include
> -#include
>
> #define MAX_CPU 32
> #define MAX_SRC 256
> diff --git a/arch/riscv/kvm/aia_aplic.c b/arch/riscv/kvm/aia_aplic.c
> index 39e72aa016a4..b49e747f2bad 100644
> --- a/arch/riscv/kvm/aia_aplic.c
> +++ b/arch/riscv/kvm/aia_aplic.c
> @@ -11,7 +11,7 @@
> #include
> #include
> #include
> -#include
> +#include
> #include
>
> struct aplic_irq {
> diff --git a/arch/riscv/kvm/aia_imsic.c b/arch/riscv/kvm/aia_imsic.c
> index 6cf23b8adb71..586e466a1c6d 100644
> --- a/arch/riscv/kvm/aia_imsic.
Re: [PATCH 19/26] KVM: Standardize include paths across all architectures
On Sat, Sep 16, 2023 at 6:01 AM Sean Christopherson wrote:
>
> Standardize KVM's include paths across all architectures by declaring
> the KVM-specific includes in the common Makefile.kvm. Having common KVM
> "own" the included paths reduces the temptation to unnecessarily add
> virt/kvm to arch include paths, and conversely if allowing arch code to
> grab headers from virt/kvm becomes desirable, virt/kvm can be added to
> all architecture's include path with a single line update.
>
> Having the common KVM makefile append to ccflags also provides a
> convenient location to append other things, e.g. KVM-specific #defines.
>
> Note, this changes the behavior of s390 and PPC, as s390 and PPC
> previously overwrote ccflags-y instead of adding on. There is no evidence
> that overwriting ccflags-y was necessary or even deliberate, as both s390
> and PPC switched to the overwrite behavior without so much as a passing
> mention when EXTRA_CFLAGS was replaced with ccflags-y (commit c73028a02887
> ("s390: change to new flag variable") and commit 4108d9ba9091
> ("powerpc/Makefiles: Change to new flag variables")).
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/arm64/kvm/Makefile | 2 --
> arch/mips/kvm/Makefile| 2 --
> arch/powerpc/kvm/Makefile | 2 --
> arch/riscv/kvm/Makefile | 2 --
> arch/s390/kvm/Makefile| 2 --
> arch/x86/kvm/Makefile | 1 -
> virt/kvm/Makefile.kvm | 2 ++
> 7 files changed, 2 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/kvm/Makefile b/arch/arm64/kvm/Makefile
> index c0c050e53157..3996489baeef 100644
> --- a/arch/arm64/kvm/Makefile
> +++ b/arch/arm64/kvm/Makefile
> @@ -3,8 +3,6 @@
> # Makefile for Kernel-based Virtual Machine module
> #
>
> -ccflags-y += -I $(srctree)/$(src)
> -
> include $(srctree)/virt/kvm/Makefile.kvm
>
> obj-$(CONFIG_KVM) += kvm.o
> diff --git a/arch/mips/kvm/Makefile b/arch/mips/kvm/Makefile
> index 96a7cd21b140..d198e1addea7 100644
> --- a/arch/mips/kvm/Makefile
> +++ b/arch/mips/kvm/Makefile
> @@ -4,8 +4,6 @@
>
> include $(srctree)/virt/kvm/Makefile.kvm
>
> -ccflags-y += -Iarch/mips/kvm
> -
> kvm-$(CONFIG_CPU_HAS_MSA) += msa.o
>
> kvm-y +=mips.o emulate.o entry.o \
> diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
> index 08a0e53d58c7..d6c6678ddf65 100644
> --- a/arch/powerpc/kvm/Makefile
> +++ b/arch/powerpc/kvm/Makefile
> @@ -3,8 +3,6 @@
> # Makefile for Kernel-based Virtual Machine module
> #
>
> -ccflags-y := -Iarch/powerpc/kvm
> -
> include $(srctree)/virt/kvm/Makefile.kvm
>
> common-objs-y += powerpc.o emulate_loadstore.o
> diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
> index 4c2067fc59fc..ff7d5f67e229 100644
> --- a/arch/riscv/kvm/Makefile
> +++ b/arch/riscv/kvm/Makefile
> @@ -3,8 +3,6 @@
> # Makefile for RISC-V KVM support
> #
>
> -ccflags-y += -I $(srctree)/$(src)
> -
> include $(srctree)/virt/kvm/Makefile.kvm
>
> obj-$(CONFIG_KVM) += kvm.o
> diff --git a/arch/s390/kvm/Makefile b/arch/s390/kvm/Makefile
> index f17249ab2a72..f8153189e003 100644
> --- a/arch/s390/kvm/Makefile
> +++ b/arch/s390/kvm/Makefile
> @@ -5,8 +5,6 @@
>
> include $(srctree)/virt/kvm/Makefile.kvm
>
> -ccflags-y := -Iarch/s390/kvm
> -
> kvm-y += kvm-s390.o intercept.o interrupt.o priv.o sigp.o
> kvm-y += diag.o gaccess.o guestdbg.o vsie.o pv.o
>
> diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile
> index 80e3fe184d17..d13f1a7b7b3d 100644
> --- a/arch/x86/kvm/Makefile
> +++ b/arch/x86/kvm/Makefile
> @@ -1,6 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
>
> -ccflags-y += -I $(srctree)/arch/x86/kvm
> ccflags-$(CONFIG_KVM_WERROR) += -Werror
>
> ifeq ($(CONFIG_FRAME_POINTER),y)
> diff --git a/virt/kvm/Makefile.kvm b/virt/kvm/Makefile.kvm
> index 29373b59d89a..e85079ad245d 100644
> --- a/virt/kvm/Makefile.kvm
> +++ b/virt/kvm/Makefile.kvm
> @@ -3,6 +3,8 @@
> # Makefile for Kernel-based Virtual Machine module
> #
>
> +ccflags-y += -I$(srctree)/$(src)
> +
> KVM ?= ../../../virt/kvm
>
> kvm-y := $(KVM)/kvm_main.o $(KVM)/eventfd.o $(KVM)/binary_stats.o
> --
> 2.42.0.459.ge4e396fd5e-goog
>
Re: [PATCH 22/26] entry/kvm: KVM: Move KVM details related to signal/-EINTR into KVM proper
On Sat, Sep 16, 2023 at 6:02 AM Sean Christopherson wrote:
>
> Move KVM's morphing of pending signals into exits to userspace into KVM
> proper, and drop the @vcpu param from xfer_to_guest_mode_handle_work().
> How KVM responds to -EINTR is a detail that really belongs in KVM itself,
> and removing the non-KVM call to kvm_handle_signal_exit() will allow
> hiding said API and the definition of "struct kvm_vcpu" from the kernel.
>
> Alternatively, entry/kvm.c could be treated as part of KVM, i.e. be given
> access to KVM internals, but that's not obviously better than having KVM
> react to -EINTR (though it's not obviously worse either).
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Anup Patel
Regards,
Anup
> ---
> arch/arm64/kvm/arm.c | 3 +--
> arch/riscv/kvm/vcpu.c | 2 +-
> arch/x86/kvm/vmx/vmx.c| 1 -
> arch/x86/kvm/x86.c| 3 +--
> include/linux/entry-kvm.h | 3 +--
> include/linux/kvm_host.h | 13 -
> kernel/entry/kvm.c| 11 ---
> 7 files changed, 20 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 6480628197b4..641df091e46b 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -6,7 +6,6 @@
>
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -929,7 +928,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> /*
> * Check conditions before entering the guest
> */
> - ret = xfer_to_guest_mode_handle_work(vcpu);
> + ret = kvm_xfer_to_guest_mode_handle_work(vcpu);
> if (!ret)
> ret = 1;
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 82229db1ce73..c313f4e90e70 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -667,7 +667,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> run->exit_reason = KVM_EXIT_UNKNOWN;
> while (ret > 0) {
> /* Check conditions before entering the guest */
> - ret = xfer_to_guest_mode_handle_work(vcpu);
> + ret = kvm_xfer_to_guest_mode_handle_work(vcpu);
> if (ret)
> continue;
> ret = 1;
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index faf0071566ef..43b87ad5fde8 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -28,7 +28,6 @@
> #include
> #include
> #include
> -#include
>
> #include
> #include
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 6c9c81e82e65..aab095f89d9e 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -59,7 +59,6 @@
> #include
> #include
> #include
> -#include
> #include
> #include
>
> @@ -10987,7 +10986,7 @@ static int vcpu_run(struct kvm_vcpu *vcpu)
>
> if (__xfer_to_guest_mode_work_pending()) {
> kvm_vcpu_srcu_read_unlock(vcpu);
> - r = xfer_to_guest_mode_handle_work(vcpu);
> + r = kvm_xfer_to_guest_mode_handle_work(vcpu);
> kvm_vcpu_srcu_read_lock(vcpu);
> if (r)
> return r;
> diff --git a/include/linux/entry-kvm.h b/include/linux/entry-kvm.h
> index e7d90d06e566..e235a91d28fc 100644
> --- a/include/linux/entry-kvm.h
> +++ b/include/linux/entry-kvm.h
> @@ -42,11 +42,10 @@ static inline int
> arch_xfer_to_guest_mode_handle_work(unsigned long ti_work)
> /**
> * xfer_to_guest_mode_handle_work - Check and handle pending work which needs
> * to be handled before going to guest mode
> - * @vcpu: Pointer to current's VCPU data
> *
> * Returns: 0 or an error code
> */
> -int xfer_to_guest_mode_handle_work(struct kvm_vcpu *vcpu);
> +int xfer_to_guest_mode_handle_work(void);
>
> /**
> * xfer_to_guest_mode_prepare - Perform last minute preparation work that
> diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
> index fb6c6109fdca..d520d6801070 100644
> --- a/include/linux/kvm_host.h
> +++ b/include/linux/kvm_host.h
> @@ -2,7 +2,7 @@
> #ifndef __KVM_HOST_H
> #define __KVM_HOST_H
>
> -
> +#include
> #include
> #include
> #include
> @@ -2293,6 +2293,17 @@ static inline void kvm_handle_signal_exit(struct
> kvm_vcpu *vcpu)
> vcpu->run->exit_reason = KVM_EXIT_INTR;
> vcpu->stat.signal_exits++;
> }
> +
> +static inline int kvm_xfer_to_guest_mode_handle_work(struc
Re: [PATCH 26/26] KVM: Hide KVM internal data structures and values from kernel at-large
On Sat, Sep 16, 2023 at 6:02 AM Sean Christopherson wrote: > > Wrap all KVM internal APIs, data structures, values, etc. in public > headers with "#ifdef __KVM__" to effectively hide KVM's internal details > from other subsystems and the kernel at-large. Hiding KVM details for > all architectures will, in the very distant future, allow loading a new > (or old) KVM module without needing to rebuild and reboot the entire > kernel, or to even allow loading and running multiple versions of KVM > simultaneously on a single host. > > To allow different instances of KVM modules to freely modify KVM data > structures, enums, #defines, etc., e.g. the struct kvm_vcpu layout, there > must be exactly zero dereferences of KVM-defined structures/values in > non-KVM code (excepting code for architectures that don't support such > shenanigans). Any such references could lead to latent bugs, e.g. as the > kernel would think a KVM structure has layout X, but in reality the > current incarnation of KVM uses layout Y. > > In KVM x86, all remaining non-KVM references to KVM details have been now > eliminated. To harden KVM against new references being introduced, hide > KVM's details to ensure that KVM doesn’t create a de facto ABI with the > rest of the kernel. > > Use #ifdeffery to hide KVM details as doing so requires, by far, the least > amount of churn and impact on architectures that freely share select KVM > details with the rest of the kernel, e.g. s390, ARM64 and PPC, have > significant usage of KVM-defined APIs, structures, values, etc. E.g. > attempting to extract the "private" chunks into dedicated KVM-internal > headers would require massive churn, even on x86, and it's not obvious the > end result would be a net positive (all attempts at moving code around > failed long before getting anywhere near compiling cleanly). > > Another (bad) alternative that would be relative churn-free would be to > move the KVM headers to a dedicated KVM-specific path while maintaining > the generic layout, e.g. something like virt/kvm/include/linux. That > would allow x86 to simply omit the KVM-specific include path. But that > would require modifying the global include path, i.e. would make KVM a > really special snowflake and set the awful precedent that it's "ok" to > add subsystem specific directories to the global include path. > > Grant exceptions to asm-offsets.c as needed, and to s390's VFIO AP driver. > Creating a KVM-specific asm-offsets, as was done for x86, adds no value > (x86 did so to avoid exposing vendor specific headers) and doesn't create > much of a "slippery slope" risk. s390's VFIO AP driver on the other hand > is simply too intertwined with KVM to realistically treat it as anything > other than KVM code, despite it living in crypto drivers, e.g. the driver > has some rather crazy lock ordering rules between the device and KVM. > > Add a static assert that __KVM__ is defined in trace/events/kvm.h, as that > is effectively a private KVM header that just happens to live in a public > path. > > Shuffle a few PPC includes and an s390 declaration as needed, and > opportunistically include kvm_host.h in trace/events.kvm.h instead of > relying on the parent to provide the right includes. > > Cc: Anish Ghulati > Cc: Venkatesh Srinivas > Cc: Andrew Thornton > Signed-off-by: Sean Christopherson For KVM RISC-V: Anup Patel Regards, Anup > --- > arch/arm64/include/asm/kvm_emulate.h | 3 +++ > arch/arm64/include/asm/kvm_host.h| 2 ++ > arch/arm64/include/asm/kvm_mmu.h | 4 > arch/arm64/kernel/asm-offsets.c | 2 ++ > arch/arm64/kvm/hyp/Makefile | 2 +- > arch/arm64/kvm/hyp/nvhe/Makefile | 3 ++- > arch/arm64/kvm/hyp/vhe/Makefile | 2 +- > arch/mips/include/asm/kvm_host.h | 2 ++ > arch/mips/kernel/asm-offsets.c | 2 ++ > arch/powerpc/include/asm/kvm_book3s.h| 3 +++ > arch/powerpc/include/asm/kvm_book3s_64.h | 2 ++ > arch/powerpc/include/asm/kvm_booke.h | 4 > arch/powerpc/include/asm/kvm_host.h | 7 --- > arch/powerpc/include/asm/kvm_ppc.h | 2 ++ > arch/powerpc/kernel/asm-offsets.c| 1 + > arch/riscv/include/asm/kvm_host.h| 3 +++ > arch/riscv/kernel/asm-offsets.c | 1 + > arch/s390/include/asm/kvm_host.h | 7 +-- > arch/s390/kernel/asm-offsets.c | 1 + > arch/x86/include/asm/kvm_host.h | 3 +++ > drivers/s390/crypto/vfio_ap_drv.c| 1 + > drivers/s390/crypto/vfio_ap_ops.c| 2 ++ > include/linux/kvm_host.h | 4 > include/linux/kvm_types.h| 3 +++ > include/tra
Re: Re: [PATCH] RISC-V: KVM: Require HAVE_KVM
On Thu, Jan 4, 2024 at 4:51 PM Andrew Jones wrote:
>
> On Thu, Jan 04, 2024 at 12:07:51PM +0100, Alexandre Ghiti wrote:
> > On 04/01/2024 11:52, Andrew Jones wrote:
> > > This applies to linux-next, but I forgot to append -next to the PATCH
> > > prefix.
> >
> >
> > Shoudn't this go to -fixes instead? With a Fixes tag?
>
> I'm not sure how urgent it is since it's a randconfig thing, but if we
> think it deserves the -fixes track then I can do that. The Fixes tag isn't
> super easy to select since, while it seems like it should be 8132d887a702
> ("KVM: remove CONFIG_HAVE_KVM_EVENTFD"), it could also be 99cdc6c18c2d
> ("RISC-V: Add initial skeletal KVM support").
>
> I'll leave both the urgency decision and the Fixes tag selection up to
> the maintainers. Anup? Paolo?
Lets add
Fixes: 99cdc6c18c2d ("RISC-V: Add initial skeletal KVM support")
Regards,
Anup
Re: [PATCH -fixes v2] RISC-V: KVM: Require HAVE_KVM
On Thu, Jan 4, 2024 at 6:07 PM Andrew Jones wrote:
>
> KVM requires EVENTFD, which is selected by HAVE_KVM. Other KVM
> supporting architectures select HAVE_KVM and then their KVM
> Kconfigs ensure its there with a depends on HAVE_KVM. Make RISCV
> consistent with that approach which fixes configs which have KVM
> but not EVENTFD, as was discovered with a randconfig test.
>
> Fixes: 99cdc6c18c2d ("RISC-V: Add initial skeletal KVM support")
> Reported-by: Randy Dunlap
> Closes:
> https://lore.kernel.org/all/44907c6b-c5bd-4e4a-a921-e4d382553...@infradead.org/
> Signed-off-by: Andrew Jones
Queued this patch for Linux-6.8
Regards,
Anup
> ---
>
> v2:
> - Added Fixes tag and -fixes prefix [Alexandre/Anup]
>
> arch/riscv/Kconfig | 1 +
> arch/riscv/kvm/Kconfig | 2 +-
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index a935a5f736b9..daba06a3b76f 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -128,6 +128,7 @@ config RISCV
> select HAVE_KPROBES if !XIP_KERNEL
> select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL
> select HAVE_KRETPROBES if !XIP_KERNEL
> + select HAVE_KVM
> # https://github.com/ClangBuiltLinux/linux/issues/1881
> select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD
> select HAVE_MOVE_PMD
> diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig
> index 1fd76aee3b71..36fa8ec9e5ba 100644
> --- a/arch/riscv/kvm/Kconfig
> +++ b/arch/riscv/kvm/Kconfig
> @@ -19,7 +19,7 @@ if VIRTUALIZATION
>
> config KVM
> tristate "Kernel-based Virtual Machine (KVM) support (EXPERIMENTAL)"
> - depends on RISCV_SBI && MMU
> + depends on HAVE_KVM && RISCV_SBI && MMU
> select HAVE_KVM_IRQCHIP
> select HAVE_KVM_IRQ_ROUTING
> select HAVE_KVM_MSI
> --
> 2.43.0
>
Re: [PATCH -fixes v2] RISC-V: KVM: Require HAVE_KVM
On Thu, Jan 18, 2024 at 11:10 PM Sean Christopherson wrote:
>
> On Thu, Jan 18, 2024, Anup Patel wrote:
> > On Thu, Jan 4, 2024 at 6:07 PM Andrew Jones wrote:
> > >
> > > KVM requires EVENTFD, which is selected by HAVE_KVM. Other KVM
> > > supporting architectures select HAVE_KVM and then their KVM
> > > Kconfigs ensure its there with a depends on HAVE_KVM. Make RISCV
> > > consistent with that approach which fixes configs which have KVM
> > > but not EVENTFD, as was discovered with a randconfig test.
> > >
> > > Fixes: 99cdc6c18c2d ("RISC-V: Add initial skeletal KVM support")
> > > Reported-by: Randy Dunlap
> > > Closes:
> > > https://lore.kernel.org/all/44907c6b-c5bd-4e4a-a921-e4d382553...@infradead.org/
> > > Signed-off-by: Andrew Jones
> >
> > Queued this patch for Linux-6.8
>
> That should be unnecessary. Commit caadf876bb74 ("KVM: introduce
> CONFIG_KVM_COMMON"),
> which is in Paolo's pull request for 6.8, addresses the EVENTFD issue. And
> the
> rest of Paolo's series[*], which presumably will get queued for 6.9,
> eliminates
> HAVE_KVM entirely.
>
> [*] https://lore.kernel.org/all/20240108124740.114453-6-pbonz...@redhat.com
I was not sure about the timeline of when Paolo's series would be merged
hence thought of taking this patch as a fix.
For now, I will drop this patch from my queue. If required we can have it
as a 6.8-rc fix.
Regards,
Anup
Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
On Sat, Jan 13, 2024 at 12:00 AM Palmer Dabbelt wrote: > > On Thu, 11 Jan 2024 06:50:37 PST (-0800), > patchwork-bot+linux-ri...@kernel.org wrote: > > Hello: > > > > This series was applied to riscv/linux.git (for-next) > > by Palmer Dabbelt : > > > > On Fri, 24 Nov 2023 12:39:00 +0530 you wrote: > >> The SBI v2.0 specification is now frozen. The SBI v2.0 specification > >> defines > >> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 > >> functions sbi_console_putchar() and sbi_console_getchar(). > >> (Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases) > >> > >> This series adds support for SBI debug console (DBCN) extension in > >> Linux RISC-V. > >> > >> [...] > > > > Here is the summary with links: > > - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar() > > https://git.kernel.org/riscv/c/f503b167b660 > > - [v5,2/5] RISC-V: Add SBI debug console helper routines > > https://git.kernel.org/riscv/c/f43fabf444ca > > - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon > > https://git.kernel.org/riscv/c/c77bf3607a0f > > - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver > > https://git.kernel.org/riscv/c/88ead68e764c > > - [v5,5/5] RISC-V: Enable SBI based earlycon support > > https://git.kernel.org/riscv/c/50942ad6ddb5 > > > > You are awesome, thank you! > > Nathan points out that this has some semantic conflicts with a patch in > Greg's TTY tree: > https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787 > > So I think the best bet is to wait on Greg's patch to land in Linus' > tree, and then base a v6 of this patch set on that merged patch. I'm > going to drop this one from for-next. Greg's patch is now available in upstream Linux so I will rebase and send out v6. Thanks, Anup
[PATCH v6 0/5] RISC-V SBI debug console extension support
The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
functions sbi_console_putchar() and sbi_console_getchar().
(Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)
This series adds support for SBI debug console (DBCN) extension in
Linux RISC-V.
To try these patches with KVM RISC-V, use KVMTOOL from the
riscv_zbx_zicntr_smstateen_condops_v1 branch at:
https://github.com/avpatel/kvmtool.git
These patches can also be found in the riscv_sbi_dbcn_v6 branch at:
https://github.com/avpatel/linux.git
Changes since v5:
- Rebased on commit 9d1694dc91ce7b80bc96d6d8eaf1a1eca668d847
("Merge tag 'for-6.8/block-2024-01-18' of git://git.kernel.dk/linux")
- Added Acked-by from GregKH in PATCH3 and PATCH4
Changes since v4:
- Rebased on Linux-6.7-rc2
- Addressed Drew's comments in PATCH2
- Improved sbi_debug_console_write/read() to directly take virtual
address of data so that virtual address to physical address
conversion can be shared between tty/serial/earlycon-riscv-sbi.c
and tty/hvc/hvc_riscv_sbi.c
- Addressed Samuel's comments in PATCH3 and PATCH4
Changes since v3:
- Rebased on Linux-6.7-rc1
- Dropped PATCH1 to PATCH5 of v3 series since these were merged through
KVM RISC-V tree for Linux-6.7
- Used proper error code in PATCH1
- Added new PATCH2 which add common SBI debug console helper functions
- Updated PATCH3 and PATCH4 to use SBI debug console helper functions
Changes since v2:
- Rebased on Linux-6.6-rc5
- Handled page-crossing in PATCH7 of v2 series
- Addressed Drew's comment in PATCH3 of v2 series
- Added new PATCH5 to make get-reg-list test aware of SBI DBCN extension
Changes since v1:
- Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series
- Improved commit description of PATCH3 in v1 series
- Introduced new PATCH3 in this series to allow some SBI extensions
(such as SBI DBCN) do to disabled by default so that older KVM user space
work fine and newer KVM user space have to explicitly opt-in for emulating
SBI DBCN.
- Introduced new PATCH5 in this series which adds inline version of
sbi_console_getchar() and sbi_console_putchar() for the case where
CONFIG_RISCV_SBI_V01 is disabled.
Anup Patel (4):
RISC-V: Add stubs for sbi_console_putchar/getchar()
RISC-V: Add SBI debug console helper routines
tty/serial: Add RISC-V SBI debug console based earlycon
RISC-V: Enable SBI based earlycon support
Atish Patra (1):
tty: Add SBI debug console support to HVC SBI driver
arch/riscv/configs/defconfig| 1 +
arch/riscv/include/asm/sbi.h| 10
arch/riscv/kernel/sbi.c | 66 +
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 37 +++---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 27 --
7 files changed, 133 insertions(+), 12 deletions(-)
--
2.34.1
[PATCH v6 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()
The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
stub of these functions to avoid "#ifdef" on user side.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index b6f898c56940..e0a8eca32ba5 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -288,8 +288,13 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long
arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+#ifdef CONFIG_RISCV_SBI_V01
void sbi_console_putchar(int ch);
int sbi_console_getchar(void);
+#else
+static inline void sbi_console_putchar(int ch) { }
+static inline int sbi_console_getchar(void) { return -ENOENT; }
+#endif
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
--
2.34.1
[PATCH v6 2/5] RISC-V: Add SBI debug console helper routines
Let us provide SBI debug console helper routines which can be
shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
---
arch/riscv/include/asm/sbi.h | 5 +++
arch/riscv/kernel/sbi.c | 66
2 files changed, 71 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index e0a8eca32ba5..13594efb24bd 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -351,6 +351,11 @@ static inline unsigned long sbi_mk_version(unsigned long
major,
}
int sbi_err_map_linux_errno(int err);
+
+extern bool sbi_debug_console_available;
+ssize_t sbi_debug_console_write(const u8 *bytes, size_t num_bytes);
+ssize_t sbi_debug_console_read(u8 *bytes, size_t num_bytes);
+
#else /* CONFIG_RISCV_SBI */
static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return
-1; }
static inline void sbi_init(void) {}
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 5a62ed1da453..b06ad29f54b5 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -7,6 +7,7 @@
#include
#include
+#include
#include
#include
#include
@@ -571,6 +572,66 @@ long sbi_get_mimpid(void)
}
EXPORT_SYMBOL_GPL(sbi_get_mimpid);
+bool sbi_debug_console_available;
+
+ssize_t sbi_debug_console_write(const u8 *bytes, size_t num_bytes)
+{
+ phys_addr_t base_addr;
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (is_vmalloc_addr(bytes))
+ base_addr = page_to_phys(vmalloc_to_page(bytes)) +
+ offset_in_page(bytes);
+ else
+ base_addr = __pa(bytes);
+ if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
+ num_bytes = PAGE_SIZE - offset_in_page(bytes);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ if (ret.error == SBI_ERR_FAILURE)
+ return -EIO;
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
+ssize_t sbi_debug_console_read(u8 *bytes, size_t num_bytes)
+{
+ phys_addr_t base_addr;
+ struct sbiret ret;
+
+ if (!sbi_debug_console_available)
+ return -EOPNOTSUPP;
+
+ if (is_vmalloc_addr(bytes))
+ base_addr = page_to_phys(vmalloc_to_page(bytes)) +
+ offset_in_page(bytes);
+ else
+ base_addr = __pa(bytes);
+ if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
+ num_bytes = PAGE_SIZE - offset_in_page(bytes);
+
+ if (IS_ENABLED(CONFIG_32BIT))
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, lower_32_bits(base_addr),
+ upper_32_bits(base_addr), 0, 0, 0);
+ else
+ ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
+ num_bytes, base_addr, 0, 0, 0, 0);
+
+ if (ret.error == SBI_ERR_FAILURE)
+ return -EIO;
+ return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
+}
+
void __init sbi_init(void)
{
int ret;
@@ -612,6 +673,11 @@ void __init sbi_init(void)
sbi_srst_reboot_nb.priority = 192;
register_restart_handler(&sbi_srst_reboot_nb);
}
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
+ pr_info("SBI DBCN extension detected\n");
+ sbi_debug_console_available = true;
+ }
} else {
__sbi_set_timer = __sbi_set_timer_v01;
__sbi_send_ipi = __sbi_send_ipi_v01;
--
2.34.1
[PATCH v6 3/5] tty/serial: Add RISC-V SBI debug console based earlycon
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
Acked-by: Greg Kroah-Hartman
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 27 ++---
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 8b1f5756002f..ffcf4882b25f 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c
b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..0162155f0c83 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,38 @@ static void sbi_putc(struct uart_port *port, unsigned char
c)
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ int ret;
+
+ while (n) {
+ ret = sbi_debug_console_write(s, n);
+ if (ret < 0)
+ break;
+
+ s += ret;
+ n -= ret;
+ }
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
+ if (sbi_debug_console_available)
+ device->con->write = sbi_dbcn_console_write;
+ else if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ return -ENODEV;
+
return 0;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
[PATCH v6 4/5] tty: Add SBI debug console support to HVC SBI driver
From: Atish Patra
RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.
Extend the HVC SBI driver to support it.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Andrew Jones
Acked-by: Greg Kroah-Hartman
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 37 ++---
2 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index a72591279f86..cede8a572594 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -40,21 +40,44 @@ static ssize_t hvc_sbi_tty_get(uint32_t vtermno, u8 *buf,
size_t count)
return i;
}
-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};
-static int __init hvc_sbi_init(void)
+static ssize_t hvc_sbi_dbcn_tty_put(uint32_t vtermno, const u8 *buf, size_t
count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ return sbi_debug_console_write(buf, count);
}
-device_initcall(hvc_sbi_init);
-static int __init hvc_sbi_console_init(void)
+static ssize_t hvc_sbi_dbcn_tty_get(uint32_t vtermno, u8 *buf, size_t count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ return sbi_debug_console_read(buf, count);
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if (sbi_debug_console_available) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1
[PATCH v6 5/5] RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfig for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 905881282a7c..eaf34e871e30 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -- 2.34.1
Re: [PATCH v2] tty: hvc: Fix the RISC-V SBI driver for a refactoring
On Sat, Jan 20, 2024 at 4:15 AM Palmer Dabbelt wrote:
>
> From: Palmer Dabbelt
>
> I missed the int->size_t refactoring in f32fcbedbe92 ("tty: hvc: convert
> to u8 and size_t"), which causes the newly used ops in 88ead68e764c
> ("tty: Add SBI debug console support to HVC SBI driver") to fail to
> build due to a
>
> linux/drivers/tty/hvc/hvc_riscv_sbi.c:59:15: error: incompatible function
> pointer types initializing 'ssize_t (*)(uint32_t, const u8 *, size_t)' (aka
> 'long (*)(unsigned int, const unsigned char *, unsigned long)') with an
> expression of type 'int (uint32_t, const char *, int)' (aka 'int (unsigned
> int, const char *, int)') [-Wincompatible-function-pointer-types]
> .put_chars = hvc_sbi_dbcn_tty_put,
>
> Fixes: f32fcbedbe92 ("tty: hvc: convert to u8 and size_t")
> Fixes: 88ead68e764c ("tty: Add SBI debug console support to HVC SBI driver")
> Link: https://lore.kernel.org/r/20240119215612.20529-2-pal...@rivosinc.com
> Signed-off-by: Palmer Dabbelt
> ---
> Changes since v1 <20240119215612.20529-2-pal...@rivosinc.com>:
> * Fix the return and arguments correctly.
> * Also fix the hvc_sbi_dbcn_tty_{get,put}().
> ---
> drivers/tty/hvc/hvc_riscv_sbi.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
> index 2f3571f17ecd..f8cd3310ef35 100644
> --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> @@ -15,7 +15,7 @@
>
> #include "hvc_console.h"
>
> -static int hvc_sbi_tty_put(uint32_t vtermno, const char *buf, int count)
> +static ssize_t hvc_sbi_tty_put(uint32_t vtermno, const u8 *buf, size_t count)
> {
> int i;
>
> @@ -25,7 +25,7 @@ static int hvc_sbi_tty_put(uint32_t vtermno, const char
> *buf, int count)
> return i;
> }
>
> -static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int count)
> +static ssize_t hvc_sbi_tty_get(uint32_t vtermno, u8 *buf, size_t count)
The hvc_sbi_tty_put() and hvc_sbi_tty_get() functions are already
updated in Linus's tree. We only need to fix hvc_sbi_dbcn_tty_put()
and hvc_sbi_dbcn_tty_get()
Please rebase this fix upon Linux-6.8-rc1 whenever that is available.
> {
> int i, c;
>
> @@ -44,12 +44,12 @@ static const struct hv_ops hvc_sbi_v01_ops = {
> .put_chars = hvc_sbi_tty_put,
> };
>
> -static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
> +static ssize_t hvc_sbi_dbcn_tty_put(uint32_t vtermno, const u8 *buf, size_t
> count)
> {
> return sbi_debug_console_write(buf, count);
> }
>
> -static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> +static ssize_t hvc_sbi_dbcn_tty_get(uint32_t vtermno, u8 *buf, size_t count)
> {
> return sbi_debug_console_read(buf, count);
> }
> --
> 2.43.0
>
>
Reviewed-by: Anup Patel
Thanks,
Anup
Re: [PATCH v5 0/5] RISC-V SBI debug console extension support
On Sat, Jan 20, 2024 at 3:29 AM Palmer Dabbelt wrote: > > On Fri, 19 Jan 2024 02:09:18 PST (-0800), apa...@ventanamicro.com wrote: > > On Sat, Jan 13, 2024 at 12:00 AM Palmer Dabbelt wrote: > >> > >> On Thu, 11 Jan 2024 06:50:37 PST (-0800), > >> patchwork-bot+linux-ri...@kernel.org wrote: > >> > Hello: > >> > > >> > This series was applied to riscv/linux.git (for-next) > >> > by Palmer Dabbelt : > >> > > >> > On Fri, 24 Nov 2023 12:39:00 +0530 you wrote: > >> >> The SBI v2.0 specification is now frozen. The SBI v2.0 specification > >> >> defines > >> >> SBI debug console (DBCN) extension which replaces the legacy SBI v0.1 > >> >> functions sbi_console_putchar() and sbi_console_getchar(). > >> >> (Refer v2.0-rc5 at > >> >> https://github.com/riscv-non-isa/riscv-sbi-doc/releases) > >> >> > >> >> This series adds support for SBI debug console (DBCN) extension in > >> >> Linux RISC-V. > >> >> > >> >> [...] > >> > > >> > Here is the summary with links: > >> > - [v5,1/5] RISC-V: Add stubs for sbi_console_putchar/getchar() > >> > https://git.kernel.org/riscv/c/f503b167b660 > >> > - [v5,2/5] RISC-V: Add SBI debug console helper routines > >> > https://git.kernel.org/riscv/c/f43fabf444ca > >> > - [v5,3/5] tty/serial: Add RISC-V SBI debug console based earlycon > >> > https://git.kernel.org/riscv/c/c77bf3607a0f > >> > - [v5,4/5] tty: Add SBI debug console support to HVC SBI driver > >> > https://git.kernel.org/riscv/c/88ead68e764c > >> > - [v5,5/5] RISC-V: Enable SBI based earlycon support > >> > https://git.kernel.org/riscv/c/50942ad6ddb5 > >> > > >> > You are awesome, thank you! > >> > >> Nathan points out that this has some semantic conflicts with a patch in > >> Greg's TTY tree: > >> https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787 > >> > >> So I think the best bet is to wait on Greg's patch to land in Linus' > >> tree, and then base a v6 of this patch set on that merged patch. I'm > >> going to drop this one from for-next. > > > > Greg's patch is now available in upstream Linux so I will rebase and > > send out v6. > > Sorry, I forgot about this one and merged it. I just sent up a fixup: > https://lore.kernel.org/all/20240119215612.20529-2-pal...@rivosinc.com/ No issues. Apart from a minor comment, your fixup looks good to me. Thanks, Anup > . > > > > > Thanks, > > Anup >
Re: [PATCH] tty: hvc: Don't enable the RISC-V SBI console by default
On Wed, Feb 14, 2024 at 9:06 PM Palmer Dabbelt wrote:
>
> From: Palmer Dabbelt
>
> The new SBI console has the same problem as the old one: there's only
> one shared backing hardware and no synchronization, so the two drivers
> end up stepping on each other. This was the same issue the old SBI-0.1
> console drivers had, but that was disabled by default when SBI-0.1 was.
>
> So just mark the new driver as nonportable.
>
> Reported-by: Emil Renner Berthing
> Fixes: 88ead68e764c ("tty: Add SBI debug console support to HVC SBI driver")
> Signed-off-by: Palmer Dabbelt
LTGM.
Reviewed-by: Anup Patel
Regards,
Anup
> ---
> drivers/tty/hvc/Kconfig | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> index 6e05c5c7bca1..c2a4e88b328f 100644
> --- a/drivers/tty/hvc/Kconfig
> +++ b/drivers/tty/hvc/Kconfig
> @@ -108,13 +108,15 @@ config HVC_DCC_SERIALIZE_SMP
>
> config HVC_RISCV_SBI
> bool "RISC-V SBI console support"
> - depends on RISCV_SBI
> + depends on RISCV_SBI && NONPORTABLE
> select HVC_DRIVER
> help
> This enables support for console output via RISC-V SBI calls, which
> - is normally used only during boot to output printk.
> + is normally used only during boot to output printk. This driver
> + conflicts with real console drivers and should not be enabled on
> + systems that directly access the console.
>
> - If you don't know what do to here, say Y.
> + If you don't know what do to here, say N.
>
> config HVCS
> tristate "IBM Hypervisor Virtual Console Server support"
> --
> 2.43.0
>
>
Re: [PATCH 1/4] KVM: delete .change_pte MMU notifier callback
On Fri, Apr 5, 2024 at 5:28 PM Paolo Bonzini wrote:
>
> The .change_pte() MMU notifier callback was intended as an
> optimization. The original point of it was that KSM could tell KVM to flip
> its secondary PTE to a new location without having to first zap it. At
> the time there was also an .invalidate_page() callback; both of them were
> *not* bracketed by calls to mmu_notifier_invalidate_range_{start,end}(),
> and .invalidate_page() also doubled as a fallback implementation of
> .change_pte().
>
> Later on, however, both callbacks were changed to occur within an
> invalidate_range_start/end() block.
>
> In the case of .change_pte(), commit 6bdb913f0a70 ("mm: wrap calls to
> set_pte_at_notify with invalidate_range_start and invalidate_range_end",
> 2012-10-09) did so to remove the fallback from .invalidate_page() to
> .change_pte() and allow sleepable .invalidate_page() hooks.
>
> This however made KVM's usage of the .change_pte() callback completely
> moot, because KVM unmaps the sPTEs during .invalidate_range_start()
> and therefore .change_pte() has no hope of finding a sPTE to change.
> Drop the generic KVM code that dispatches to kvm_set_spte_gfn(), as
> well as all the architecture specific implementations.
>
> Signed-off-by: Paolo Bonzini
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/arm64/kvm/mmu.c | 34 -
> arch/loongarch/include/asm/kvm_host.h | 1 -
> arch/loongarch/kvm/mmu.c | 32
> arch/mips/kvm/mmu.c | 30 ---
> arch/powerpc/include/asm/kvm_ppc.h| 1 -
> arch/powerpc/kvm/book3s.c | 5 ---
> arch/powerpc/kvm/book3s.h | 1 -
> arch/powerpc/kvm/book3s_64_mmu_hv.c | 12 --
> arch/powerpc/kvm/book3s_hv.c | 1 -
> arch/powerpc/kvm/book3s_pr.c | 7
> arch/powerpc/kvm/e500_mmu_host.c | 6 ---
> arch/riscv/kvm/mmu.c | 20 --
> arch/x86/kvm/mmu/mmu.c| 54 +--
> arch/x86/kvm/mmu/spte.c | 16
> arch/x86/kvm/mmu/spte.h | 2 -
> arch/x86/kvm/mmu/tdp_mmu.c| 46 ---
> arch/x86/kvm/mmu/tdp_mmu.h| 1 -
> include/linux/kvm_host.h | 2 -
> include/trace/events/kvm.h| 15
> virt/kvm/kvm_main.c | 43 -
> 20 files changed, 2 insertions(+), 327 deletions(-)
>
> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> index dc04bc767865..ff17849be9f4 100644
> --- a/arch/arm64/kvm/mmu.c
> +++ b/arch/arm64/kvm/mmu.c
> @@ -1768,40 +1768,6 @@ bool kvm_unmap_gfn_range(struct kvm *kvm, struct
> kvm_gfn_range *range)
> return false;
> }
>
> -bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
> -{
> - kvm_pfn_t pfn = pte_pfn(range->arg.pte);
> -
> - if (!kvm->arch.mmu.pgt)
> - return false;
> -
> - WARN_ON(range->end - range->start != 1);
> -
> - /*
> -* If the page isn't tagged, defer to user_mem_abort() for sanitising
> -* the MTE tags. The S2 pte should have been unmapped by
> -* mmu_notifier_invalidate_range_end().
> -*/
> - if (kvm_has_mte(kvm) && !page_mte_tagged(pfn_to_page(pfn)))
> - return false;
> -
> - /*
> -* We've moved a page around, probably through CoW, so let's treat
> -* it just like a translation fault and the map handler will clean
> -* the cache to the PoC.
> -*
> -* The MMU notifiers will have unmapped a huge PMD before calling
> -* ->change_pte() (which in turn calls kvm_set_spte_gfn()) and
> -* therefore we never need to clear out a huge PMD through this
> -* calling path and a memcache is not required.
> -*/
> - kvm_pgtable_stage2_map(kvm->arch.mmu.pgt, range->start << PAGE_SHIFT,
> - PAGE_SIZE, __pfn_to_phys(pfn),
> - KVM_PGTABLE_PROT_R, NULL, 0);
> -
> - return false;
> -}
> -
> bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
> {
> u64 size = (range->end - range->start) << PAGE_SHIFT;
> diff --git a/arch/loongarch/include/asm/kvm_host.h
> b/arch/loongarch/include/asm/kvm_host.h
> index 2d62f7b0d377..69305441f40d 100644
> --- a/arch/loongarch/include/asm/kvm_host.h
> +++ b/arch/loongarch/include/asm/kvm_host.h
> @@ -203,7 +203,6 @@ void kvm_flush_tlb_all(void);
> void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa);
>
Re: [PATCH 09/44] KVM: Drop arch hardware (un)setup hooks
On Thu, Nov 3, 2022 at 4:49 AM Sean Christopherson wrote:
>
> Drop kvm_arch_hardware_setup() and kvm_arch_hardware_unsetup() now that
> all implementations are nops.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Thanks,
Anup
> ---
> arch/arm64/include/asm/kvm_host.h | 1 -
> arch/arm64/kvm/arm.c| 5 -
> arch/mips/include/asm/kvm_host.h| 1 -
> arch/mips/kvm/mips.c| 5 -
> arch/powerpc/include/asm/kvm_host.h | 1 -
> arch/powerpc/kvm/powerpc.c | 5 -
> arch/riscv/include/asm/kvm_host.h | 1 -
> arch/riscv/kvm/main.c | 5 -
> arch/s390/kvm/kvm-s390.c| 10 --
> arch/x86/kvm/x86.c | 10 --
> include/linux/kvm_host.h| 2 --
> virt/kvm/kvm_main.c | 7 ---
> 12 files changed, 53 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_host.h
> b/arch/arm64/include/asm/kvm_host.h
> index 45e2136322ba..5d5a887e63a5 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -859,7 +859,6 @@ static inline bool kvm_system_needs_idmapped_vectors(void)
>
> void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu);
>
> -static inline void kvm_arch_hardware_unsetup(void) {}
> static inline void kvm_arch_sync_events(struct kvm *kvm) {}
> static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 94d33e296e10..2ee729f54ce0 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -63,11 +63,6 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
> return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
> }
>
> -int kvm_arch_hardware_setup(void *opaque)
> -{
> - return 0;
> -}
> -
> int kvm_arch_check_processor_compat(void *opaque)
> {
> return 0;
> diff --git a/arch/mips/include/asm/kvm_host.h
> b/arch/mips/include/asm/kvm_host.h
> index 5cedb28e8a40..28f0ba97db71 100644
> --- a/arch/mips/include/asm/kvm_host.h
> +++ b/arch/mips/include/asm/kvm_host.h
> @@ -888,7 +888,6 @@ extern unsigned long kvm_mips_get_ramsize(struct kvm
> *kvm);
> extern int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
> struct kvm_mips_interrupt *irq);
>
> -static inline void kvm_arch_hardware_unsetup(void) {}
> static inline void kvm_arch_sync_events(struct kvm *kvm) {}
> static inline void kvm_arch_free_memslot(struct kvm *kvm,
> struct kvm_memory_slot *slot) {}
> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
> index a25e0b73ee70..af29490d9740 100644
> --- a/arch/mips/kvm/mips.c
> +++ b/arch/mips/kvm/mips.c
> @@ -135,11 +135,6 @@ void kvm_arch_hardware_disable(void)
> kvm_mips_callbacks->hardware_disable();
> }
>
> -int kvm_arch_hardware_setup(void *opaque)
> -{
> - return 0;
> -}
> -
> int kvm_arch_check_processor_compat(void *opaque)
> {
> return 0;
> diff --git a/arch/powerpc/include/asm/kvm_host.h
> b/arch/powerpc/include/asm/kvm_host.h
> index caea15dcb91d..5d2c3a487e73 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -877,7 +877,6 @@ struct kvm_vcpu_arch {
> #define __KVM_HAVE_CREATE_DEVICE
>
> static inline void kvm_arch_hardware_disable(void) {}
> -static inline void kvm_arch_hardware_unsetup(void) {}
> static inline void kvm_arch_sync_events(struct kvm *kvm) {}
> static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index b850b0efa201..74ea5687ecbc 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -441,11 +441,6 @@ int kvm_arch_hardware_enable(void)
> return 0;
> }
>
> -int kvm_arch_hardware_setup(void *opaque)
> -{
> - return 0;
> -}
> -
> int kvm_arch_check_processor_compat(void *opaque)
> {
> return kvmppc_core_check_processor_compat();
> diff --git a/arch/riscv/include/asm/kvm_host.h
> b/arch/riscv/include/asm/kvm_host.h
> index dbbf43d52623..8c771fc4f5d2 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -229,7 +229,6 @@ struct kvm_vcpu_arch {
> bool pause;
> };
>
> -static inline void kvm_arch_hardware_unsetup(void) {}
> static inline void kvm_arch_sync_events(struct kvm *kvm) {}
> static inline void kvm_arch_sched_in(struct kvm_vcp
Re: [PATCH 22/44] KVM: RISC-V: Do arch init directly in riscv_kvm_init()
On Thu, Nov 3, 2022 at 4:49 AM Sean Christopherson wrote:
>
> Fold the guts of kvm_arch_init() into riscv_kvm_init() instead of
> bouncing through kvm_init()=>kvm_arch_init(). Functionally, this is a
> glorified nop as invoking kvm_arch_init() is the very first action
> performed by kvm_init().
>
> Moving setup to riscv_kvm_init(), which is tagged __init, will allow
> tagging more functions and data with __init and __ro_after_init. And
> emptying kvm_arch_init() will allow dropping the hook entirely once all
> architecture implementations are nops.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/riscv/kvm/main.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c
> index a146fa0ce4d2..cb063b8a9a0f 100644
> --- a/arch/riscv/kvm/main.c
> +++ b/arch/riscv/kvm/main.c
> @@ -66,6 +66,15 @@ void kvm_arch_hardware_disable(void)
> }
>
> int kvm_arch_init(void *opaque)
> +{
> + return 0;
> +}
> +
> +void kvm_arch_exit(void)
> +{
> +}
> +
> +static int __init riscv_kvm_init(void)
> {
> const char *str;
>
> @@ -110,15 +119,6 @@ int kvm_arch_init(void *opaque)
>
> kvm_info("VMID %ld bits available\n", kvm_riscv_gstage_vmid_bits());
>
> - return 0;
> -}
> -
> -void kvm_arch_exit(void)
> -{
> -}
> -
> -static int __init riscv_kvm_init(void)
> -{
> return kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> }
> module_init(riscv_kvm_init);
> --
> 2.38.1.431.g37b22c650d-goog
>
Re: [PATCH 23/44] KVM: RISC-V: Tag init functions and data with __init, __ro_after_init
On Thu, Nov 3, 2022 at 4:49 AM Sean Christopherson wrote:
>
> Now that KVM setup is handled directly in riscv_kvm_init(), tag functions
> and data that are used/set only during init with __init/__ro_after_init.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Thanks,
Anup
> ---
> arch/riscv/include/asm/kvm_host.h | 6 +++---
> arch/riscv/kvm/mmu.c | 12 ++--
> arch/riscv/kvm/vmid.c | 4 ++--
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h
> b/arch/riscv/include/asm/kvm_host.h
> index 8c771fc4f5d2..778ff0f282b7 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -295,11 +295,11 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
> int kvm_riscv_gstage_alloc_pgd(struct kvm *kvm);
> void kvm_riscv_gstage_free_pgd(struct kvm *kvm);
> void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu);
> -void kvm_riscv_gstage_mode_detect(void);
> -unsigned long kvm_riscv_gstage_mode(void);
> +void __init kvm_riscv_gstage_mode_detect(void);
> +unsigned long __init kvm_riscv_gstage_mode(void);
> int kvm_riscv_gstage_gpa_bits(void);
>
> -void kvm_riscv_gstage_vmid_detect(void);
> +void __init kvm_riscv_gstage_vmid_detect(void);
> unsigned long kvm_riscv_gstage_vmid_bits(void);
> int kvm_riscv_gstage_vmid_init(struct kvm *kvm);
> bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid);
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> index 3620ecac2fa1..f42a34c7879a 100644
> --- a/arch/riscv/kvm/mmu.c
> +++ b/arch/riscv/kvm/mmu.c
> @@ -20,12 +20,12 @@
> #include
>
> #ifdef CONFIG_64BIT
> -static unsigned long gstage_mode = (HGATP_MODE_SV39X4 << HGATP_MODE_SHIFT);
> -static unsigned long gstage_pgd_levels = 3;
> +static unsigned long gstage_mode __ro_after_init = (HGATP_MODE_SV39X4 <<
> HGATP_MODE_SHIFT);
> +static unsigned long gstage_pgd_levels __ro_after_init = 3;
> #define gstage_index_bits 9
> #else
> -static unsigned long gstage_mode = (HGATP_MODE_SV32X4 << HGATP_MODE_SHIFT);
> -static unsigned long gstage_pgd_levels = 2;
> +static unsigned long gstage_mode __ro_after_init = (HGATP_MODE_SV32X4 <<
> HGATP_MODE_SHIFT);
> +static unsigned long gstage_pgd_levels __ro_after_init = 2;
> #define gstage_index_bits 10
> #endif
>
> @@ -760,7 +760,7 @@ void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu)
> kvm_riscv_local_hfence_gvma_all();
> }
>
> -void kvm_riscv_gstage_mode_detect(void)
> +void __init kvm_riscv_gstage_mode_detect(void)
> {
> #ifdef CONFIG_64BIT
> /* Try Sv57x4 G-stage mode */
> @@ -784,7 +784,7 @@ void kvm_riscv_gstage_mode_detect(void)
> #endif
> }
>
> -unsigned long kvm_riscv_gstage_mode(void)
> +unsigned long __init kvm_riscv_gstage_mode(void)
> {
> return gstage_mode >> HGATP_MODE_SHIFT;
> }
> diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c
> index 6cd93995fb65..5246da1c9167 100644
> --- a/arch/riscv/kvm/vmid.c
> +++ b/arch/riscv/kvm/vmid.c
> @@ -17,10 +17,10 @@
>
> static unsigned long vmid_version = 1;
> static unsigned long vmid_next;
> -static unsigned long vmid_bits;
> +static unsigned long vmid_bits __ro_after_init;
> static DEFINE_SPINLOCK(vmid_lock);
>
> -void kvm_riscv_gstage_vmid_detect(void)
> +void __init kvm_riscv_gstage_vmid_detect(void)
> {
> unsigned long old;
>
> --
> 2.38.1.431.g37b22c650d-goog
>
Re: [PATCH 27/44] KVM: Drop kvm_arch_{init,exit}() hooks
On Thu, Nov 3, 2022 at 4:50 AM Sean Christopherson wrote:
>
> Drop kvm_arch_init() and kvm_arch_exit() now that all implementations
> are nops.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Thanks,
Anup
> ---
> arch/arm64/kvm/arm.c| 11 ---
> arch/mips/kvm/mips.c| 10 --
> arch/powerpc/include/asm/kvm_host.h | 1 -
> arch/powerpc/kvm/powerpc.c | 5 -
> arch/riscv/kvm/main.c | 9 -
> arch/s390/kvm/kvm-s390.c| 10 --
> arch/x86/kvm/x86.c | 10 --
> include/linux/kvm_host.h| 3 ---
> virt/kvm/kvm_main.c | 19 ++-
> 9 files changed, 2 insertions(+), 76 deletions(-)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 6e0061eac627..75c5125b0dd3 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -2284,17 +2284,6 @@ static __init int kvm_arm_init(void)
> return err;
> }
>
> -int kvm_arch_init(void *opaque)
> -{
> - return 0;
> -}
> -
> -/* NOP: Compiling as a module not supported */
> -void kvm_arch_exit(void)
> -{
> -
> -}
> -
> static int __init early_kvm_mode_cfg(char *arg)
> {
> if (!arg)
> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
> index ae7a24342fdf..3cade648827a 100644
> --- a/arch/mips/kvm/mips.c
> +++ b/arch/mips/kvm/mips.c
> @@ -1010,16 +1010,6 @@ long kvm_arch_vm_ioctl(struct file *filp, unsigned int
> ioctl, unsigned long arg)
> return r;
> }
>
> -int kvm_arch_init(void *opaque)
> -{
> - return 0;
> -}
> -
> -void kvm_arch_exit(void)
> -{
> -
> -}
> -
> int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
> struct kvm_sregs *sregs)
> {
> diff --git a/arch/powerpc/include/asm/kvm_host.h
> b/arch/powerpc/include/asm/kvm_host.h
> index 5d2c3a487e73..0a80e80c7b9e 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -881,7 +881,6 @@ static inline void kvm_arch_sync_events(struct kvm *kvm)
> {}
> static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
> static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
> -static inline void kvm_arch_exit(void) {}
> static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
> static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
>
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index 36c27381a769..34278042ad27 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -2525,11 +2525,6 @@ void kvmppc_init_lpid(unsigned long nr_lpids_param)
> }
> EXPORT_SYMBOL_GPL(kvmppc_init_lpid);
>
> -int kvm_arch_init(void *opaque)
> -{
> - return 0;
> -}
> -
> EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr);
>
> void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry
> *debugfs_dentry)
> diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c
> index cb063b8a9a0f..4710a6751687 100644
> --- a/arch/riscv/kvm/main.c
> +++ b/arch/riscv/kvm/main.c
> @@ -65,15 +65,6 @@ void kvm_arch_hardware_disable(void)
> csr_write(CSR_HIDELEG, 0);
> }
>
> -int kvm_arch_init(void *opaque)
> -{
> - return 0;
> -}
> -
> -void kvm_arch_exit(void)
> -{
> -}
> -
> static int __init riscv_kvm_init(void)
> {
> const char *str;
> diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
> index f6ae845bc1c1..7c1c6d81b5d7 100644
> --- a/arch/s390/kvm/kvm-s390.c
> +++ b/arch/s390/kvm/kvm-s390.c
> @@ -533,16 +533,6 @@ static void __kvm_s390_exit(void)
> debug_unregister(kvm_s390_dbf_uv);
> }
>
> -int kvm_arch_init(void *opaque)
> -{
> - return 0;
> -}
> -
> -void kvm_arch_exit(void)
> -{
> -
> -}
> -
> /* Section: device related */
> long kvm_arch_dev_ioctl(struct file *filp,
> unsigned int ioctl, unsigned long arg)
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 218707597bea..2b4530a33298 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -9271,16 +9271,6 @@ static inline void kvm_ops_update(struct
> kvm_x86_init_ops *ops)
> kvm_pmu_ops_update(ops->pmu_ops);
> }
>
> -int kvm_arch_init(void *opaque)
> -{
> - return 0;
> -}
> -
> -void kvm_arch_exit(void)
> -{
> -
> -}
> -
> static int __kvm_x86_vendor_init(struc
Re: [PATCH 30/44] KVM: Drop kvm_arch_check_processor_compat() hook
On Thu, Nov 3, 2022 at 4:50 AM Sean Christopherson wrote:
>
> Drop kvm_arch_check_processor_compat() and its support code now that all
> architecture implementations are nops.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Thanks,
Anup
> ---
> arch/arm64/kvm/arm.c | 7 +--
> arch/mips/kvm/mips.c | 7 +--
> arch/powerpc/kvm/book3s.c | 2 +-
> arch/powerpc/kvm/e500.c| 2 +-
> arch/powerpc/kvm/e500mc.c | 2 +-
> arch/powerpc/kvm/powerpc.c | 5 -
> arch/riscv/kvm/main.c | 7 +--
> arch/s390/kvm/kvm-s390.c | 7 +--
> arch/x86/kvm/svm/svm.c | 4 ++--
> arch/x86/kvm/vmx/vmx.c | 4 ++--
> arch/x86/kvm/x86.c | 5 -
> include/linux/kvm_host.h | 4 +---
> virt/kvm/kvm_main.c| 24 +---
> 13 files changed, 13 insertions(+), 67 deletions(-)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 75c5125b0dd3..ed1836b6f044 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -63,11 +63,6 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
> return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> -{
> - return 0;
> -}
> -
> int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
> struct kvm_enable_cap *cap)
> {
> @@ -2268,7 +2263,7 @@ static __init int kvm_arm_init(void)
> * FIXME: Do something reasonable if kvm_init() fails after pKVM
> * hypervisor protection is finalized.
> */
> - err = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> + err = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> if (err)
> goto out_subs;
>
> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
> index 3cade648827a..36c8991b5d39 100644
> --- a/arch/mips/kvm/mips.c
> +++ b/arch/mips/kvm/mips.c
> @@ -135,11 +135,6 @@ void kvm_arch_hardware_disable(void)
> kvm_mips_callbacks->hardware_disable();
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> -{
> - return 0;
> -}
> -
> extern void kvm_init_loongson_ipi(struct kvm *kvm);
>
> int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
> @@ -1636,7 +1631,7 @@ static int __init kvm_mips_init(void)
>
> register_die_notifier(&kvm_mips_csr_die_notifier);
>
> - ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> + ret = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> if (ret) {
> unregister_die_notifier(&kvm_mips_csr_die_notifier);
> return ret;
> diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
> index 87283a0e33d8..57f4e7896d67 100644
> --- a/arch/powerpc/kvm/book3s.c
> +++ b/arch/powerpc/kvm/book3s.c
> @@ -1052,7 +1052,7 @@ static int kvmppc_book3s_init(void)
> {
> int r;
>
> - r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> + r = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE);
> if (r)
> return r;
> #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
> diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
> index 0ea61190ec04..b0f695428733 100644
> --- a/arch/powerpc/kvm/e500.c
> +++ b/arch/powerpc/kvm/e500.c
> @@ -531,7 +531,7 @@ static int __init kvmppc_e500_init(void)
> flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
>ivor[max_ivor] + handler_len);
>
> - r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
> + r = kvm_init(sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
> if (r)
> goto err_out;
> kvm_ops_e500.owner = THIS_MODULE;
> diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
> index 795667f7ebf0..611532a0dedc 100644
> --- a/arch/powerpc/kvm/e500mc.c
> +++ b/arch/powerpc/kvm/e500mc.c
> @@ -404,7 +404,7 @@ static int __init kvmppc_e500mc_init(void)
> */
> kvmppc_init_lpid(KVMPPC_NR_LPIDS/threads_per_core);
>
> - r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
> + r = kvm_init(sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
> if (r)
> goto err_out;
> kvm_ops_e500mc.owner = THIS_MODULE;
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index 34278042ad27..51268be60dac 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -441,11 +441,6 @@ int kvm_arch_hardware_enable(void)
> return 0;
> }
>
> -int kvm_arch_check_processor_compa
Re: [PATCH 44/44] KVM: Opt out of generic hardware enabling on s390 and PPC
On Thu, Nov 3, 2022 at 4:50 AM Sean Christopherson wrote:
>
> Allow architectures to opt out of the generic hardware enabling logic,
> and opt out on both s390 and PPC, which don't need to manually enable
> virtualization as it's always on (when available).
>
> In addition to letting s390 and PPC drop a bit of dead code, this will
> hopefully also allow ARM to clean up its related code, e.g. ARM has its
> own per-CPU flag to track which CPUs have enable hardware due to the
> need to keep hardware enabled indefinitely when pKVM is enabled.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Thanks,
Anup
> ---
> arch/arm64/kvm/Kconfig | 1 +
> arch/mips/kvm/Kconfig | 1 +
> arch/powerpc/include/asm/kvm_host.h | 1 -
> arch/powerpc/kvm/powerpc.c | 5 -
> arch/riscv/kvm/Kconfig | 1 +
> arch/s390/include/asm/kvm_host.h| 1 -
> arch/s390/kvm/kvm-s390.c| 6 --
> arch/x86/kvm/Kconfig| 1 +
> include/linux/kvm_host.h| 4
> virt/kvm/Kconfig| 3 +++
> virt/kvm/kvm_main.c | 30 +++--
> 11 files changed, 35 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
> index 815cc118c675..0a7d2116b27b 100644
> --- a/arch/arm64/kvm/Kconfig
> +++ b/arch/arm64/kvm/Kconfig
> @@ -21,6 +21,7 @@ if VIRTUALIZATION
> menuconfig KVM
> bool "Kernel-based Virtual Machine (KVM) support"
> depends on HAVE_KVM
> + select KVM_GENERIC_HARDWARE_ENABLING
> select MMU_NOTIFIER
> select PREEMPT_NOTIFIERS
> select HAVE_KVM_CPU_RELAX_INTERCEPT
> diff --git a/arch/mips/kvm/Kconfig b/arch/mips/kvm/Kconfig
> index 91d197bee9c0..29e51649203b 100644
> --- a/arch/mips/kvm/Kconfig
> +++ b/arch/mips/kvm/Kconfig
> @@ -28,6 +28,7 @@ config KVM
> select MMU_NOTIFIER
> select SRCU
> select INTERVAL_TREE
> + select KVM_GENERIC_HARDWARE_ENABLING
> help
> Support for hosting Guest kernels.
>
> diff --git a/arch/powerpc/include/asm/kvm_host.h
> b/arch/powerpc/include/asm/kvm_host.h
> index 0a80e80c7b9e..959f566a455c 100644
> --- a/arch/powerpc/include/asm/kvm_host.h
> +++ b/arch/powerpc/include/asm/kvm_host.h
> @@ -876,7 +876,6 @@ struct kvm_vcpu_arch {
> #define __KVM_HAVE_ARCH_WQP
> #define __KVM_HAVE_CREATE_DEVICE
>
> -static inline void kvm_arch_hardware_disable(void) {}
> static inline void kvm_arch_sync_events(struct kvm *kvm) {}
> static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
> static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index 51268be60dac..ed426c9ee0e9 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -436,11 +436,6 @@ int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int
> size, void *ptr,
> }
> EXPORT_SYMBOL_GPL(kvmppc_ld);
>
> -int kvm_arch_hardware_enable(void)
> -{
> - return 0;
> -}
> -
> int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
> {
> struct kvmppc_ops *kvm_ops = NULL;
> diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig
> index f36a737d5f96..d5a658a047a7 100644
> --- a/arch/riscv/kvm/Kconfig
> +++ b/arch/riscv/kvm/Kconfig
> @@ -20,6 +20,7 @@ if VIRTUALIZATION
> config KVM
> tristate "Kernel-based Virtual Machine (KVM) support (EXPERIMENTAL)"
> depends on RISCV_SBI && MMU
> + select KVM_GENERIC_HARDWARE_ENABLING
> select MMU_NOTIFIER
> select PREEMPT_NOTIFIERS
> select KVM_MMIO
> diff --git a/arch/s390/include/asm/kvm_host.h
> b/arch/s390/include/asm/kvm_host.h
> index b1e98a9ed152..d3e4b5d7013a 100644
> --- a/arch/s390/include/asm/kvm_host.h
> +++ b/arch/s390/include/asm/kvm_host.h
> @@ -1023,7 +1023,6 @@ extern char sie_exit;
> extern int kvm_s390_gisc_register(struct kvm *kvm, u32 gisc);
> extern int kvm_s390_gisc_unregister(struct kvm *kvm, u32 gisc);
>
> -static inline void kvm_arch_hardware_disable(void) {}
> static inline void kvm_arch_sync_events(struct kvm *kvm) {}
> static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
> static inline void kvm_arch_free_memslot(struct kvm *kvm,
> diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
> index 949231f1393e..129c159ab5ee 100644
> --- a/arch/s390/kvm/kvm-s390.c
> +++ b/arch/s390/kvm/kvm-s390.c
> @@ -248,12 +248,6 @@ debug_info_t *kvm_s390_dbf;
> debug_info_t *kvm_s390_dbf_uv;
>
> /* Section: not file
Re: [PATCH v5 05/12] KVM: RISC-V: Use Makefile.kvm for common files
On Sun, Nov 21, 2021 at 6:25 PM David Woodhouse wrote: > > From: David Woodhouse > > Signed-off-by: David Woodhouse Looks good to me. For KVM RISC-V, Acked-by: Anup Patel Reviewed-by: Anup Patel Thanks, Anup > --- > arch/riscv/kvm/Makefile | 6 +- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile > index 30cdd1df0098..300590225348 100644 > --- a/arch/riscv/kvm/Makefile > +++ b/arch/riscv/kvm/Makefile > @@ -5,14 +5,10 @@ > > ccflags-y += -I $(srctree)/$(src) > > -KVM := ../../../virt/kvm > +include $(srctree)/virt/kvm/Makefile.kvm > > obj-$(CONFIG_KVM) += kvm.o > > -kvm-y += $(KVM)/kvm_main.o > -kvm-y += $(KVM)/coalesced_mmio.o > -kvm-y += $(KVM)/binary_stats.o > -kvm-y += $(KVM)/eventfd.o > kvm-y += main.o > kvm-y += vm.o > kvm-y += vmid.o > -- > 2.31.1 >
Re: [PATCH v3 2/3] riscv: Introduce CONFIG_RELOCATABLE
ddr addr = (rela->r_offset - va_kernel_link_pa_offset); > + Elf_Addr relocated_addr = rela->r_addend; > + > + if (rela->r_info != R_RISCV_RELATIVE) > + continue; > + > + /* > +* Make sure to not relocate vdso symbols like rt_sigreturn > +* which are linked from the address 0 in vmlinux since > +* vdso symbol addresses are actually used as an offset from > +* mm->context.vdso in VDSO_OFFSET macro. > +*/ > + if (relocated_addr >= KERNEL_LINK_ADDR) > + relocated_addr += reloc_offset; > + > + *(Elf_Addr *)addr = relocated_addr; > + } > +} > + > +#endif > + > static uintptr_t load_pa, load_sz; > > void create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size) > @@ -405,6 +455,19 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) > > pfn_base = PFN_DOWN(load_pa); > > +#ifdef CONFIG_RELOCATABLE > +#ifdef CONFIG_64BIT > + /* > +* Early page table uses only one PGDIR, which makes it possible > +* to map PGDIR_SIZE aligned on PGDIR_SIZE: if the relocation offset > + * makes the kernel cross over a PGDIR_SIZE boundary, raise a bug > +* since a part of the kernel would not get mapped. > +* This cannot happen on rv32 as we use the entire page directory > level. > +*/ > + BUG_ON(PGDIR_SIZE - (kernel_virt_addr & (PGDIR_SIZE - 1)) < load_sz); > +#endif > + relocate_kernel(load_pa); > +#endif > /* > * Enforce boot alignment requirements of RV32 and > * RV64 by only allowing PMD or PGD mappings. > -- > 2.20.1 > > Looks good to me as well. Reviewed-by: Anup Patel Regards, Anup
Re: [PATCH v3 3/3] arch, scripts: Add script to check relocations at compile time
> +num_bad=$(echo "$bad_relocs" | wc -l)
> +echo "WARNING: $num_bad bad relocations"
> +echo "$bad_relocs"
> diff --git a/scripts/relocs_check.sh b/scripts/relocs_check.sh
> new file mode 100755
> index ..137c660499f3
> --- /dev/null
> +++ b/scripts/relocs_check.sh
> @@ -0,0 +1,20 @@
> +#!/bin/sh
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +
> +# Get a list of all the relocations, remove from it the relocations
> +# that are known to be legitimate and return this list to arch specific
> +# script that will look for suspicious relocations.
> +
> +objdump="$1"
> +nm="$2"
> +vmlinux="$3"
> +
> +# Remove from the possible bad relocations those that match an undefined
> +# weak symbol which will result in an absolute relocation to 0.
> +# Weak unresolved symbols are of that form in nm output:
> +# " w _binary__btf_vmlinux_bin_end"
> +undef_weak_symbols=$($nm "$vmlinux" | awk '$1 ~ /w/ { print $2 }')
> +
> +$objdump -R "$vmlinux" |
> + grep -E '\ + ([ "$undef_weak_symbols" ] && grep -F -w -v "$undef_weak_symbols" ||
> cat)
> --
> 2.20.1
>
Otherwise, looks good to me.
Reviewed-by: Anup Patel
Regards,
Anup
Re: [PATCH V5 21/21] KVM: compat: riscv: Prevent KVM_COMPAT from being selected
+Paolo On Tue, Feb 1, 2022 at 8:38 PM wrote: > > From: Guo Ren > > Current riscv doesn't support the 32bit KVM API. Let's make it > clear by not selecting KVM_COMPAT. > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Anup Patel This looks good to me. Reviewed-by: Anup Patel Regards, Anup > --- > virt/kvm/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/virt/kvm/Kconfig b/virt/kvm/Kconfig > index f4834c20e4a6..a8c5c9f06b3c 100644 > --- a/virt/kvm/Kconfig > +++ b/virt/kvm/Kconfig > @@ -53,7 +53,7 @@ config KVM_GENERIC_DIRTYLOG_READ_PROTECT > > config KVM_COMPAT > def_bool y > - depends on KVM && COMPAT && !(S390 || ARM64) > + depends on KVM && COMPAT && !(S390 || ARM64 || RISCV) > > config HAVE_KVM_IRQ_BYPASS > bool > -- > 2.25.1 >
Re: [PATCH V5 21/21] KVM: compat: riscv: Prevent KVM_COMPAT from being selected
On Tue, Feb 1, 2022 at 9:31 PM Paolo Bonzini wrote: > > On 2/1/22 16:44, Anup Patel wrote: > > +Paolo > > > > On Tue, Feb 1, 2022 at 8:38 PM wrote: > >> > >> From: Guo Ren > >> > >> Current riscv doesn't support the 32bit KVM API. Let's make it > >> clear by not selecting KVM_COMPAT. > >> > >> Signed-off-by: Guo Ren > >> Signed-off-by: Guo Ren > >> Cc: Arnd Bergmann > >> Cc: Anup Patel > > > > This looks good to me. > > > > Reviewed-by: Anup Patel > > Hi Anup, > > feel free to send this via a pull request (perhaps together with Mark > Rutland's entry/exit rework). Sure, I will do like you suggested. Regards, Anup > > Paolo >
Re: [PATCH v4 2/6] Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs"
On Wed, Feb 16, 2022 at 8:46 AM Chao Gao wrote:
>
> This partially reverts commit b99040853738 ("KVM: Pass kvm_init()'s opaque
> param to additional arch funcs") remove opaque from
> kvm_arch_check_processor_compat because no one uses this opaque now.
> Address conflicts for ARM (due to file movement) and manually handle RISC-V
> which comes after the commit.
>
> And changes about kvm_arch_hardware_setup() in original commit are still
> needed so they are not reverted.
>
> Signed-off-by: Chao Gao
> Reviewed-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/arm64/kvm/arm.c | 2 +-
> arch/mips/kvm/mips.c | 2 +-
> arch/powerpc/kvm/powerpc.c | 2 +-
> arch/riscv/kvm/main.c | 2 +-
> arch/s390/kvm/kvm-s390.c | 2 +-
> arch/x86/kvm/x86.c | 2 +-
> include/linux/kvm_host.h | 2 +-
> virt/kvm/kvm_main.c| 16 +++-
> 8 files changed, 10 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index ecc5958e27fe..0165cf3aac3a 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -73,7 +73,7 @@ int kvm_arch_hardware_setup(void *opaque)
> return 0;
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> +int kvm_arch_check_processor_compat(void)
> {
> return 0;
> }
> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
> index a25e0b73ee70..092d09fb6a7e 100644
> --- a/arch/mips/kvm/mips.c
> +++ b/arch/mips/kvm/mips.c
> @@ -140,7 +140,7 @@ int kvm_arch_hardware_setup(void *opaque)
> return 0;
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> +int kvm_arch_check_processor_compat(void)
> {
> return 0;
> }
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index 2ad0ccd202d5..30c817f3fa0c 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
> @@ -423,7 +423,7 @@ int kvm_arch_hardware_setup(void *opaque)
> return 0;
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> +int kvm_arch_check_processor_compat(void)
> {
> return kvmppc_core_check_processor_compat();
> }
> diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c
> index 2e5ca43c8c49..992877e78393 100644
> --- a/arch/riscv/kvm/main.c
> +++ b/arch/riscv/kvm/main.c
> @@ -20,7 +20,7 @@ long kvm_arch_dev_ioctl(struct file *filp,
> return -EINVAL;
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> +int kvm_arch_check_processor_compat(void)
> {
> return 0;
> }
> diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
> index 577f1ead6a51..0053b81c6b02 100644
> --- a/arch/s390/kvm/kvm-s390.c
> +++ b/arch/s390/kvm/kvm-s390.c
> @@ -252,7 +252,7 @@ int kvm_arch_hardware_enable(void)
> return 0;
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> +int kvm_arch_check_processor_compat(void)
> {
> return 0;
> }
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 9b484ed61f37..ffb88f0b7265 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -11509,7 +11509,7 @@ void kvm_arch_hardware_unsetup(void)
> static_call(kvm_x86_hardware_unsetup)();
> }
>
> -int kvm_arch_check_processor_compat(void *opaque)
> +int kvm_arch_check_processor_compat(void)
> {
> struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
>
> diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
> index f11039944c08..2ad78e729bf7 100644
> --- a/include/linux/kvm_host.h
> +++ b/include/linux/kvm_host.h
> @@ -1413,7 +1413,7 @@ int kvm_arch_hardware_enable(void);
> void kvm_arch_hardware_disable(void);
> int kvm_arch_hardware_setup(void *opaque);
> void kvm_arch_hardware_unsetup(void);
> -int kvm_arch_check_processor_compat(void *opaque);
> +int kvm_arch_check_processor_compat(void);
> int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu);
> bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu);
> int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu);
> diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
> index 83c57bcc6eb6..ee47d33d69e1 100644
> --- a/virt/kvm/kvm_main.c
> +++ b/virt/kvm/kvm_main.c
> @@ -5643,22 +5643,14 @@ void kvm_unregister_perf_callbacks(void)
> }
> #endif
>
> -struct kvm_cpu_compat_check {
> - void *opaque;
> - int *ret;
> -};
> -
> -static void check_processor_compat(void *data)
> +static void check_processor_compat(void *rtn)
> {
> - struct kvm_cpu_compat_check *c = data;
> -
> - *c->ret = kvm_arch_check_processor_compat(c->opaque);
> + *
Re: [PATCH v12 56/84] KVM: RISC-V: Mark "struct page" pfns dirty iff a stage-2 PTE is installed
On Sat, Jul 27, 2024 at 5:24 AM Sean Christopherson wrote:
>
> Don't mark pages dirty if KVM bails from the page fault handler without
> installing a stage-2 mapping, i.e. if the page is guaranteed to not be
> written by the guest.
>
> In addition to being a (very) minor fix, this paves the way for converting
> RISC-V to use kvm_release_faultin_page().
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/riscv/kvm/mmu.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> index b63650f9b966..06aa5a0d056d 100644
> --- a/arch/riscv/kvm/mmu.c
> +++ b/arch/riscv/kvm/mmu.c
> @@ -669,7 +669,6 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
> goto out_unlock;
>
> if (writable) {
> - kvm_set_pfn_dirty(hfn);
> mark_page_dirty(kvm, gfn);
> ret = gstage_map_page(kvm, pcache, gpa, hfn << PAGE_SHIFT,
> vma_pagesize, false, true);
> @@ -682,6 +681,9 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
> kvm_err("Failed to map in G-stage\n");
>
> out_unlock:
> + if ((!ret || ret == -EEXIST) && writable)
> + kvm_set_pfn_dirty(hfn);
> +
> spin_unlock(&kvm->mmu_lock);
> kvm_set_pfn_accessed(hfn);
> kvm_release_pfn_clean(hfn);
> --
> 2.46.0.rc1.232.g9752f9e123-goog
>
Re: [PATCH v12 57/84] KVM: RISC-V: Mark "struct page" pfns accessed before dropping mmu_lock
On Sat, Jul 27, 2024 at 5:24 AM Sean Christopherson wrote: > > Mark pages accessed before dropping mmu_lock when faulting in guest memory > so that RISC-V can convert to kvm_release_faultin_page() without tripping > its lockdep assertion on mmu_lock being held. Marking pages accessed > outside of mmu_lock is ok (not great, but safe), but marking pages _dirty_ > outside of mmu_lock can make filesystems unhappy. > > Signed-off-by: Sean Christopherson For KVM RISC-V: Acked-by: Anup Patel Regards, Anup > --- > arch/riscv/kvm/mmu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c > index 06aa5a0d056d..806f68e70642 100644 > --- a/arch/riscv/kvm/mmu.c > +++ b/arch/riscv/kvm/mmu.c > @@ -683,10 +683,10 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu, > out_unlock: > if ((!ret || ret == -EEXIST) && writable) > kvm_set_pfn_dirty(hfn); > + else > + kvm_release_pfn_clean(hfn); > > spin_unlock(&kvm->mmu_lock); > - kvm_set_pfn_accessed(hfn); > - kvm_release_pfn_clean(hfn); > return ret; > } > > -- > 2.46.0.rc1.232.g9752f9e123-goog >
Re: [PATCH v12 58/84] KVM: RISC-V: Use kvm_faultin_pfn() when mapping pfns into the guest
On Sat, Jul 27, 2024 at 5:24 AM Sean Christopherson wrote:
>
> Convert RISC-V to __kvm_faultin_pfn()+kvm_release_faultin_page(), which
> are new APIs to consolidate arch code and provide consistent behavior
> across all KVM architectures.
>
> Signed-off-by: Sean Christopherson
For KVM RISC-V:
Acked-by: Anup Patel
Regards,
Anup
> ---
> arch/riscv/kvm/mmu.c | 11 ---
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> index 806f68e70642..f73d6a79a78c 100644
> --- a/arch/riscv/kvm/mmu.c
> +++ b/arch/riscv/kvm/mmu.c
> @@ -601,6 +601,7 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
> bool logging = (memslot->dirty_bitmap &&
> !(memslot->flags & KVM_MEM_READONLY)) ? true : false;
> unsigned long vma_pagesize, mmu_seq;
> + struct page *page;
>
> /* We need minimum second+third level pages */
> ret = kvm_mmu_topup_memory_cache(pcache, gstage_pgd_levels);
> @@ -631,7 +632,7 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
>
> /*
> * Read mmu_invalidate_seq so that KVM can detect if the results of
> -* vma_lookup() or gfn_to_pfn_prot() become stale priort to acquiring
> +* vma_lookup() or __kvm_faultin_pfn() become stale priort to
> acquiring
> * kvm->mmu_lock.
> *
> * Rely on mmap_read_unlock() for an implicit smp_rmb(), which pairs
> @@ -647,7 +648,7 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
> return -EFAULT;
> }
>
> - hfn = gfn_to_pfn_prot(kvm, gfn, is_write, &writable);
> + hfn = kvm_faultin_pfn(vcpu, gfn, is_write, &writable, &page);
> if (hfn == KVM_PFN_ERR_HWPOISON) {
> send_sig_mceerr(BUS_MCEERR_AR, (void __user *)hva,
> vma_pageshift, current);
> @@ -681,11 +682,7 @@ int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu,
> kvm_err("Failed to map in G-stage\n");
>
> out_unlock:
> - if ((!ret || ret == -EEXIST) && writable)
> - kvm_set_pfn_dirty(hfn);
> - else
> - kvm_release_pfn_clean(hfn);
> -
> + kvm_release_faultin_page(kvm, page, ret && ret != -EEXIST, writable);
> spin_unlock(&kvm->mmu_lock);
> return ret;
> }
> --
> 2.46.0.rc1.232.g9752f9e123-goog
>
