[PATCH 0/5] powerpc: A bit more way paved toward 64-bit Book3E support

2009-06-02 Thread Benjamin Herrenschmidt
These are a few patches that are extracted or cleaned up from
the current 64-bit Book3E support pile and that could be merged
already in 2.6.31 to make subsequent patches easier to maintain
and apply.
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[PATCH 1/5] powerpc: Move VMX and VSX asm code to vector.S

2009-06-02 Thread Benjamin Herrenschmidt
Currently, load_up_altivec and give_up_altivec are duplicated
in 32-bit and 64-bit. This creates a common implementation that
is moved away from head_32.S, head_64.S and misc_64.S and into
vector.S, using the same macros we already use for our common
implementation of load_up_fpu.

I also moved the VSX code over to vector.S though in that case
I didn't make it build on 32-bit (yet).

Signed-off-by: Benjamin Herrenschmidt 
---

 arch/powerpc/Makefile |1 
 arch/powerpc/kernel/Makefile  |3 
 arch/powerpc/kernel/head_32.S |   95 ---
 arch/powerpc/kernel/head_64.S |  118 ---
 arch/powerpc/kernel/misc_64.S |   92 --
 arch/powerpc/kernel/vector.S  |  210 ++
 6 files changed, 213 insertions(+), 306 deletions(-)

--- linux-work.orig/arch/powerpc/kernel/vector.S2009-06-02 
15:37:39.0 +1000
+++ linux-work/arch/powerpc/kernel/vector.S 2009-06-02 16:22:03.0 
+1000
@@ -1,5 +1,215 @@
+#include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * load_up_altivec(unused, unused, tsk)
+ * Disable VMX for the task which had it previously,
+ * and save its vector registers in its thread_struct.
+ * Enables the VMX for use in the kernel on return.
+ * On SMP we know the VMX is free, since we give it up every
+ * switch (ie, no lazy save of the vector registers).
+ */
+_GLOBAL(load_up_altivec)
+   mfmsr   r5  /* grab the current MSR */
+   orisr5,r5,msr_...@h
+   MTMSRD(r5)  /* enable use of AltiVec now */
+   isync
+
+/*
+ * For SMP, we don't do lazy VMX switching because it just gets too
+ * horrendously complex, especially when a task switches from one CPU
+ * to another.  Instead we call giveup_altvec in switch_to.
+ * VRSAVE isn't dealt with here, that is done in the normal context
+ * switch code. Note that we could rely on vrsave value to eventually
+ * avoid saving all of the VREGs here...
+ */
+#ifndef CONFIG_SMP
+   LOAD_REG_ADDRBASE(r3, last_task_used_altivec)
+   toreal(r3)
+   PPC_LL  r4,ADDROFF(last_task_used_altivec)(r3)
+   PPC_LCMPI   0,r4,0
+   beq 1f
+
+   /* Save VMX state to last_task_used_altivec's THREAD struct */
+   toreal(r4)
+   addir4,r4,THREAD
+   SAVE_32VRS(0,r5,r4)
+   mfvscr  vr0
+   li  r10,THREAD_VSCR
+   stvxvr0,r10,r4
+   /* Disable VMX for last_task_used_altivec */
+   PPC_LL  r5,PT_REGS(r4)
+   toreal(r5)
+   PPC_LL  r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+   lis r10,msr_...@h
+   andcr4,r4,r10
+   PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#endif /* CONFIG_SMP */
+
+   /* Hack: if we get an altivec unavailable trap with VRSAVE
+* set to all zeros, we assume this is a broken application
+* that fails to set it properly, and thus we switch it to
+* all 1's
+*/
+   mfspr   r4,SPRN_VRSAVE
+   cmpdi   0,r4,0
+   bne+1f
+   li  r4,-1
+   mtspr   SPRN_VRSAVE,r4
+1:
+   /* enable use of VMX after return */
+#ifdef CONFIG_PPC32
+   mfspr   r5,SPRN_SPRG3   /* current task's THREAD (phys) */
+   orisr9,r9,msr_...@h
+#else
+   ld  r4,PACACURRENT(r13)
+   addir5,r4,THREAD/* Get THREAD */
+   orisr12,r12,msr_...@h
+   std r12,_MSR(r1)
+#endif
+   li  r4,1
+   li  r10,THREAD_VSCR
+   stw r4,THREAD_USED_VR(r5)
+   lvx vr0,r10,r5
+   mtvscr  vr0
+   REST_32VRS(0,r4,r5)
+#ifndef CONFIG_SMP
+   /* Update last_task_used_math to 'current' */
+   subir4,r5,THREAD/* Back to 'current' */
+   fromreal(r4)
+   PPC_STL r4,ADDROFF(last_task_used_math)(r3)
+#endif /* CONFIG_SMP */
+   /* restore registers and return */
+   blr
+
+/*
+ * giveup_altivec(tsk)
+ * Disable VMX for the task given as the argument,
+ * and save the vector registers in its thread_struct.
+ * Enables the VMX for use in the kernel on return.
+ */
+_GLOBAL(giveup_altivec)
+   mfmsr   r5
+   orisr5,r5,msr_...@h
+   SYNC
+   MTMSRD(r5)  /* enable use of VMX now */
+   isync
+   PPC_LCMPI   0,r3,0
+   beqlr-  /* if no previous owner, done */
+   addir3,r3,THREAD/* want THREAD of task */
+   PPC_LL  r5,PT_REGS(r3)
+   PPC_LCMPI   0,r5,0
+   SAVE_32VRS(0,r4,r3)
+   mfvscr  vr0
+   li  r4,THREAD_VSCR
+   stvxvr0,r4,r3
+   beq 1f
+   PPC_LL  r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+#ifdef CONFIG_VSX
+BEGIN_FTR_SECTION
+   lis r3,(MSR_VEC|MSR_VSX)@h
+FTR_SECTION_ELSE
+   lis r3,msr_...@h
+ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX)
+#else
+   lis r3,msr_...@h
+#endif
+   andcr4,r4,r3/* disable FP for previous task */
+   PPC_STL r4,_MSR-STACK_FRAM

[PATCH 2/5] powerpc: Split exception handling out of head_64.S

2009-06-02 Thread Benjamin Herrenschmidt
To prepare for future support of Book3E 64-bit PowerPC processors,
which use a completely different exception handling, we move that
code to a new exceptions-64s.S file.

This file is #included from head_64.S due to some of the absolute
address requirements which can currently only be fulfilled from
within that file.

Signed-off-by: Benjamin Herrenschmidt 
---

 arch/powerpc/kernel/exceptions-64s.S |  978 +++
 arch/powerpc/kernel/head_64.S|  977 --
 2 files changed, 995 insertions(+), 960 deletions(-)

--- /dev/null   1970-01-01 00:00:00.0 +
+++ linux-work/arch/powerpc/kernel/exceptions-64s.S 2009-06-02 
15:47:18.0 +1000
@@ -0,0 +1,978 @@
+/*
+ * This file contains the 64-bit "server" PowerPC variant
+ * of the low level exception handling including exception
+ * vectors, exception return, part of the slb and stab
+ * handling and other fixed offset specific things.
+ *
+ * This file is meant to be #included from head_64.S due to
+ * position dependant assembly.
+ *
+ * Most of this originates from head_64.S and thus has the same
+ * copyright history.
+ *
+ */
+
+/*
+ * We layout physical memory as follows:
+ * 0x - 0x00ff : Secondary processor spin code
+ * 0x0100 - 0x2fff : pSeries Interrupt prologs
+ * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
+ * 0x6000 - 0x6fff : Initial (CPU0) segment table
+ * 0x7000 - 0x7fff : FWNMI data area
+ * 0x8000 -: Early init and support code
+ */
+
+
+/*
+ *   SPRG Usage
+ *
+ *   Register  Definition
+ *
+ *   SPRG0 reserved for hypervisor
+ *   SPRG1 temp - used to save gpr
+ *   SPRG2 temp - used to save gpr
+ *   SPRG3 virt addr of paca
+ */
+
+/*
+ * This is the start of the interrupt handlers for pSeries
+ * This code runs with relocation off.
+ * Code from here to __end_interrupts gets copied down to real
+ * address 0x100 when we are running a relocatable kernel.
+ * Therefore any relative branches in this section must only
+ * branch to labels in this section.
+ */
+   . = 0x100
+   .globl __start_interrupts
+__start_interrupts:
+
+   STD_EXCEPTION_PSERIES(0x100, system_reset)
+
+   . = 0x200
+_machine_check_pSeries:
+   HMT_MEDIUM
+   mtspr   SPRN_SPRG1,r13  /* save r13 */
+   EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
+
+   . = 0x300
+   .globl data_access_pSeries
+data_access_pSeries:
+   HMT_MEDIUM
+   mtspr   SPRN_SPRG1,r13
+BEGIN_FTR_SECTION
+   mtspr   SPRN_SPRG2,r12
+   mfspr   r13,SPRN_DAR
+   mfspr   r12,SPRN_DSISR
+   srdir13,r13,60
+   rlwimi  r13,r12,16,0x20
+   mfcrr12
+   cmpwi   r13,0x2c
+   beq do_stab_bolted_pSeries
+   mtcrf   0x80,r12
+   mfspr   r12,SPRN_SPRG2
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+   EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
+
+   . = 0x380
+   .globl data_access_slb_pSeries
+data_access_slb_pSeries:
+   HMT_MEDIUM
+   mtspr   SPRN_SPRG1,r13
+   mfspr   r13,SPRN_SPRG3  /* get paca address into r13 */
+   std r3,PACA_EXSLB+EX_R3(r13)
+   mfspr   r3,SPRN_DAR
+   std r9,PACA_EXSLB+EX_R9(r13)/* save r9 - r12 */
+   mfcrr9
+#ifdef __DISABLED__
+   /* Keep that around for when we re-implement dynamic VSIDs */
+   cmpdi   r3,0
+   bge slb_miss_user_pseries
+#endif /* __DISABLED__ */
+   std r10,PACA_EXSLB+EX_R10(r13)
+   std r11,PACA_EXSLB+EX_R11(r13)
+   std r12,PACA_EXSLB+EX_R12(r13)
+   mfspr   r10,SPRN_SPRG1
+   std r10,PACA_EXSLB+EX_R13(r13)
+   mfspr   r12,SPRN_SRR1   /* and SRR1 */
+#ifndef CONFIG_RELOCATABLE
+   b   .slb_miss_realmode
+#else
+   /*
+* We can't just use a direct branch to .slb_miss_realmode
+* because the distance from here to there depends on where
+* the kernel ends up being put.
+*/
+   mfctr   r11
+   ld  r10,PACAKBASE(r13)
+   LOAD_HANDLER(r10, .slb_miss_realmode)
+   mtctr   r10
+   bctr
+#endif
+
+   STD_EXCEPTION_PSERIES(0x400, instruction_access)
+
+   . = 0x480
+   .globl instruction_access_slb_pSeries
+instruction_access_slb_pSeries:
+   HMT_MEDIUM
+   mtspr   SPRN_SPRG1,r13
+   mfspr   r13,SPRN_SPRG3  /* get paca address into r13 */
+   std r3,PACA_EXSLB+EX_R3(r13)
+   mfspr   r3,SPRN_SRR0/* SRR0 is faulting address */
+   std r9,PACA_EXSLB+EX_R9(r13)/* save r9 - r12 */
+   mfcrr9
+#ifdef __DISABLED__
+   /* Keep that around for when we re-implement dynamic VSIDs */
+   cmpdi   r3,0
+   bge slb_miss_user_pseries
+#endif /* __DISABLED__ */
+   std r10,PACA_EXSLB+EX_R10(r13)
+   std r11,PACA_EXSLB+EX_R11(r13)
+   std r12,PACA_EXSLB+EX_R12(r13)
+   mfspr   r10,SPRN_SPRG1
+   std r10,PACA_EXS

[PATCH 3/5] powerpc: Introduce CONFIG_PPC_BOOK3S

2009-06-02 Thread Benjamin Herrenschmidt
This patch introduce a new Kconfig option, CONFIG_PPC_BOOK3S
that represents processors that are compliant with the "classic"
(aka "server") variant of the PowerPC architecture.

It replaces CONFIG_6xx on 32-bit (though the symbol is still
defined for compatibility) and encompass all currently supported
64-bit processors.

Signed-off-by: Benjamin Herrenschmidt 
---

 arch/powerpc/platforms/Kconfig.cputype |   28 +---
 1 file changed, 17 insertions(+), 11 deletions(-)

--- linux-work.orig/arch/powerpc/platforms/Kconfig.cputype  2009-06-02 
16:29:27.0 +1000
+++ linux-work/arch/powerpc/platforms/Kconfig.cputype   2009-06-02 
16:55:01.0 +1000
@@ -9,7 +9,6 @@ menu "Processor support"
 choice
prompt "Processor Type"
depends on PPC32
-   default 6xx
help
  There are five families of 32 bit PowerPC chips supported.
  The most common ones are the desktop and server CPUs (601, 603,
@@ -21,24 +20,27 @@ choice
 
  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
 
-config 6xx
+config PPC_BOOK3S
bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
select PPC_FPU
 
 config PPC_85xx
bool "Freescale 85xx"
+   depends on PPC32
select E500
select FSL_SOC
select MPC85xx
 
 config PPC_8xx
bool "Freescale 8xx"
+   depends on PPC32
select FSL_SOC
select 8xx
select PPC_LIB_RHEAP
 
 config 40x
bool "AMCC 40x"
+   depends on PPC32
select PPC_DCR_NATIVE
select PPC_UDBG_16550
select 4xx_SOC
@@ -46,6 +48,7 @@ config 40x
 
 config 44x
bool "AMCC 44x"
+   depends on PPC32
select PPC_DCR_NATIVE
select PPC_UDBG_16550
select 4xx_SOC
@@ -54,16 +57,15 @@ config 44x
 
 config E200
bool "Freescale e200"
+   depends on PPC32
 
 endchoice
 
-# Until we have a choice of exclusive CPU types on 64-bit, we always
-# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
-# "classic" MMU
-
 config PPC_BOOK3S
-   def_bool y
-   depends on PPC64 || 6xx
+   default y
+   depends on PPC64
+   select PPC_FPU
+
 
 config POWER4_ONLY
bool "Optimize for POWER4"
@@ -74,6 +76,10 @@ config POWER4_ONLY
  The resulting binary will not work on POWER3 or RS64 processors
  when compiled with binutils 2.15 or later.
 
+config 6xx
+   def_bool y
+   depends on PPC32 && PPC_BOOK3S
+
 config POWER3
bool
depends on PPC64 && PPC_BOOK3S
@@ -125,6 +131,7 @@ config BOOKE
 config FSL_BOOKE
bool
depends on E200 || E500
+   select PPC_BOOK3E_MMU
default y
 
 config FSL_EMB_PERFMON
@@ -203,7 +210,7 @@ config SPE
 
 config PPC_STD_MMU
bool
-   depends on 6xx || PPC64
+   depends on PPC_BOOK3S
default y
 
 config PPC_STD_MMU_32
@@ -219,8 +226,7 @@ config PPC_MMU_NOHASH
depends on !PPC_STD_MMU
 
 config PPC_BOOK3E_MMU
-   def_bool y
-   depends on FSL_BOOKE
+   def_bool n
 
 config PPC_MM_SLICES
bool
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[PATCH 4/5] powerpc: Separate PACA fields for server CPUs

2009-06-02 Thread Benjamin Herrenschmidt
This patch has no effect other than re-ordering PACA fields on
current server CPUs. It however is a pre-requisite for future
support of BookE 64-bit processors. Various parts of the PACA
struct are now moved under some ifdef's, either the new
CONFIG_PPC_BOOK3S or CONFIG_PPC_STD_MMU_64, whatever seems more
appropriate.

Signed-off-by: Benjamin Herrenschmidt 
---

 arch/powerpc/include/asm/paca.h   |   12 +---
 arch/powerpc/kernel/asm-offsets.c |   32 +---
 arch/powerpc/kernel/paca.c|   14 +-
 3 files changed, 39 insertions(+), 19 deletions(-)

--- linux-work.orig/arch/powerpc/include/asm/paca.h 2009-06-02 
17:05:07.0 +1000
+++ linux-work/arch/powerpc/include/asm/paca.h  2009-06-02 17:05:09.0 
+1000
@@ -43,6 +43,7 @@ struct task_struct;
  * processor.
  */
 struct paca_struct {
+#ifdef CONFIG_PPC_BOOK3S
/*
 * Because hw_cpu_id, unlike other paca fields, is accessed
 * routinely from other CPUs (from the IRQ code), we stick to
@@ -51,7 +52,7 @@ struct paca_struct {
 */
 
struct lppaca *lppaca_ptr;  /* Pointer to LpPaca for PLIC */
-
+#endif /* CONFIG_PPC_BOOK3S */
/*
 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c 
 * load lock_token and paca_index with a single lwz
@@ -64,13 +65,16 @@ struct paca_struct {
u64 kernel_toc; /* Kernel TOC address */
u64 kernelbase; /* Base address of kernel */
u64 kernel_msr; /* MSR while running in kernel */
+#ifdef CONFIG_PPC_STD_MMU_64
u64 stab_real;  /* Absolute address of segment table */
u64 stab_addr;  /* Virtual address of segment table */
+#endif /* CONFIG_PPC_STD_MMU_64 */
void *emergency_sp; /* pointer to emergency stack */
u64 data_offset;/* per cpu data offset */
s16 hw_cpu_id;  /* Physical processor number */
u8 cpu_start;   /* At startup, processor spins until */
/* this becomes non-zero. */
+#ifdef CONFIG_PPC_STD_MMU_64
struct slb_shadow *slb_shadow_ptr;
 
/*
@@ -81,11 +85,13 @@ struct paca_struct {
u64 exmc[10];   /* used for machine checks */
u64 exslb[10];  /* used for SLB/segment table misses
 * on the linear mapping */
-
-   mm_context_t context;
+   /* SLB related definitions */
u16 vmalloc_sllp;
u16 slb_cache_ptr;
u16 slb_cache[SLB_CACHE_ENTRIES];
+#endif /* CONFIG_PPC_STD_MMU_64 */
+
+   mm_context_t context;
 
/*
 * then miscellaneous read-write fields
Index: linux-work/arch/powerpc/kernel/asm-offsets.c
===
--- linux-work.orig/arch/powerpc/kernel/asm-offsets.c   2009-06-02 
17:05:07.0 +1000
+++ linux-work/arch/powerpc/kernel/asm-offsets.c2009-06-02 
17:05:23.0 +1000
@@ -122,8 +122,6 @@ int main(void)
DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
-   DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
-   DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
@@ -131,35 +129,30 @@ int main(void)
DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
-   DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
-   DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
-   DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
 #ifdef CONFIG_PPC_MM_SLICES
DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
context.low_slices_psize));
DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
context.high_slices_psize));
DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
+#endif /* CONFIG_PPC_MM_SLICES */
+#ifdef CONFIG_PPC_STD_MMU_64
+   DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
+   DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
+   DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
+   DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
+   DEFINE(PACAVMALLOCSLLP, offsetof(struct paca

[PATCH 5/5] powerpc: Shield code specific to 64-bit server processors

2009-06-02 Thread Benjamin Herrenschmidt
This is a random collection of added ifdef's around portions of
code that only mak sense on server processors. Using either
CONFIG_PPC_STD_MMU_64 or CONFIG_PPC_BOOK3S as seems appropriate.

This is meant to make the future merging of Book3E 64-bit support
easier.

Signed-off-by: Benjamin Herrenschmidt 
---

 arch/powerpc/include/asm/lppaca.h|6 ++
 arch/powerpc/include/asm/mmu.h   |4 ++--
 arch/powerpc/include/asm/pgtable-ppc64.h |5 +
 arch/powerpc/kernel/irq.c|2 ++
 arch/powerpc/kernel/pci_64.c |5 +
 arch/powerpc/kernel/process.c|2 +-
 arch/powerpc/kernel/prom.c   |2 +-
 arch/powerpc/kernel/setup_64.c   |5 -
 arch/powerpc/mm/Makefile |7 ---
 arch/powerpc/mm/init_64.c|2 ++
 10 files changed, 32 insertions(+), 8 deletions(-)

--- linux-work.orig/arch/powerpc/mm/Makefile2009-06-02 16:53:18.0 
+1000
+++ linux-work/arch/powerpc/mm/Makefile 2009-06-02 16:55:46.0 +1000
@@ -11,10 +11,11 @@ obj-y   := fault.o mem.o 
pgtable.o gup.
   pgtable_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_PPC_MMU_NOHASH)   += mmu_context_nohash.o tlb_nohash.o \
   tlb_nohash_low.o
-hash-$(CONFIG_PPC_NATIVE)  := hash_native_64.o
-obj-$(CONFIG_PPC64)+= hash_utils_64.o \
+obj-$(CONFIG_PPC64)+= mmap_64.o
+hash64-$(CONFIG_PPC_NATIVE):= hash_native_64.o
+obj-$(CONFIG_PPC_STD_MMU_64)   += hash_utils_64.o \
   slb_low.o slb.o stab.o \
-  mmap_64.o $(hash-y)
+  mmap_64.o $(hash64-y)
 obj-$(CONFIG_PPC_STD_MMU_32)   += ppc_mmu_32.o
 obj-$(CONFIG_PPC_STD_MMU)  += hash_low_$(CONFIG_WORD_SIZE).o \
   tlb_hash$(CONFIG_WORD_SIZE).o \
Index: linux-work/arch/powerpc/include/asm/pgtable-ppc64.h
===
--- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc64.h2009-06-02 
16:53:18.0 +1000
+++ linux-work/arch/powerpc/include/asm/pgtable-ppc64.h 2009-06-02 
16:55:46.0 +1000
@@ -31,9 +31,11 @@
 #error TASK_SIZE_USER64 exceeds pagetable range
 #endif
 
+#ifdef CONFIG_PPC_STD_MMU_64
 #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
 #error TASK_SIZE_USER64 exceeds user VSID range
 #endif
+#endif
 
 /*
  * Define the address range of the vmalloc VM area.
@@ -199,8 +201,11 @@ static inline unsigned long pte_update(s
if (!huge)
assert_pte_locked(mm, addr);
 
+#ifdef CONFIG_PPC_STD_MMU_64
if (old & _PAGE_HASHPTE)
hpte_need_flush(mm, addr, ptep, old, huge);
+#endif
+
return old;
 }
 
Index: linux-work/arch/powerpc/include/asm/mmu.h
===
--- linux-work.orig/arch/powerpc/include/asm/mmu.h  2009-06-02 
16:53:18.0 +1000
+++ linux-work/arch/powerpc/include/asm/mmu.h   2009-06-02 16:55:46.0 
+1000
@@ -74,10 +74,10 @@ extern void early_init_mmu_secondary(voi
 #endif /* !__ASSEMBLY__ */
 
 
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PPC_STD_MMU_64)
 /* 64-bit classic hash table MMU */
 #  include 
-#elif defined(CONFIG_PPC_STD_MMU)
+#elif defined(CONFIG_PPC_STD_MMU_32)
 /* 32-bit classic hash table MMU */
 #  include 
 #elif defined(CONFIG_40x)
Index: linux-work/arch/powerpc/kernel/pci_64.c
===
--- linux-work.orig/arch/powerpc/kernel/pci_64.c2009-06-02 
16:53:18.0 +1000
+++ linux-work/arch/powerpc/kernel/pci_64.c 2009-06-02 16:55:46.0 
+1000
@@ -420,6 +420,9 @@ int pcibios_unmap_io_space(struct pci_bu
 * so flushing the hash table is the only sane way to make sure
 * that no hash entries are covering that removed bridge area
 * while still allowing other busses overlapping those pages
+*
+* Note: If we ever support P2P hotplug on Book3E, we'll have
+* to do an appropriate TLB flush here too
 */
if (bus->self) {
struct resource *res = bus->resource[0];
@@ -427,8 +430,10 @@ int pcibios_unmap_io_space(struct pci_bu
pr_debug("IO unmapping for PCI-PCI bridge %s\n",
 pci_name(bus->self));
 
+#ifdef CONFIG_PPC_STD_MMU_64
__flush_hash_table_range(&init_mm, res->start + _IO_BASE,
 res->end + _IO_BASE + 1);
+#endif
return 0;
}
 
Index: linux-work/arch/powerpc/include/asm/lppaca.h
===
--- linux-work.orig/arch/powerpc/include/asm/lppaca.h   2009-06-02 
16:53:18.0 +1000
+++ linux-work/arch/powerpc/include/asm/lppaca.h2009-06-02 
16:55:46.0 +1000
@@ -20,6 +20,

Re: [PATCH] powerpc/kvm: fix some init/exit annotations

2009-06-02 Thread Avi Kivity

Stephen Rothwell wrote:

Fixes a couple of warnings like this one:

WARNING: arch/powerpc/kvm/kvm-440.o(.text+0x1e8c): Section mismatch in 
reference from the function kvmppc_44x_exit() to the function 
.exit.text:kvmppc_booke_exit()
The function kvmppc_44x_exit() references a function in an exit section.
Often the function kvmppc_booke_exit() has valid usage outside the exit section
and the fix is to remove the __exit annotation of kvmppc_booke_exit.
  


Applied, thanks.

--
error compiling committee.c: too many arguments to function

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Re: [PATCH 2/5] powerpc: Split exception handling out of head_64.S

2009-06-02 Thread Benjamin Herrenschmidt
On Tue, 2009-06-02 at 17:50 +1000, Benjamin Herrenschmidt wrote:

> +#ifdef CONFIG_PPC_BOOK3S
> +#include "exceptions-64s.S"
>  #endif

Patches are in the wrong order ... the symbol above is only
define by patch 3/5 :-)

I'll flip the around before mering if there's no other comment.

Cheers,
Ben.


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Re: [PATCH 3/5] powerpc: Introduce CONFIG_PPC_BOOK3S

2009-06-02 Thread Arnd Bergmann
On Tuesday 02 June 2009, Benjamin Herrenschmidt wrote:
> --- linux-work.orig/arch/powerpc/platforms/Kconfig.cputype2009-06-02 
> 16:29:27.0 +1000
> +++ linux-work/arch/powerpc/platforms/Kconfig.cputype 2009-06-02 
> 16:55:01.0 +1000
> @@ -9,7 +9,6 @@ menu "Processor support"
>  choice
>   prompt "Processor Type"
>   depends on PPC32
> - default 6xx
>   help
> There are five families of 32 bit PowerPC chips supported.
> The most common ones are the desktop and server CPUs (601, 603,

It looks like you couldn't decide which route to take here. You leave the
'depends on PPC32' above, but

> @@ -21,24 +20,27 @@ choice
>  
> If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
>  
> -config 6xx
> +config PPC_BOOK3S
>   bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
>   select PPC_FPU
>  
>  config PPC_85xx
>   bool "Freescale 85xx"
> + depends on PPC32
>   select E500
>   select FSL_SOC
>   select MPC85xx
>  
>  config PPC_8xx
>   bool "Freescale 8xx"
> + depends on PPC32
>   select FSL_SOC
>   select 8xx
>   select PPC_LIB_RHEAP

also add it (redundantly) in all other processor types except BOOK3S, and

> -# Until we have a choice of exclusive CPU types on 64-bit, we always
> -# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
> -# "classic" MMU
> -
>  config PPC_BOOK3S
> -   def_bool y
> -   depends on PPC64 || 6xx
> + default y
> + depends on PPC64
> + select PPC_FPU
> +

then add the other BOOK3S option depending on PPC64. Even though
it might look silly to have a choice statement with just one possible
option in case of PPC64, why not integrate it right away, for consistency
reasons. It seems strange to have the same Kconfig symbol both
as a choice and a simple bool.

> @@ -125,6 +131,7 @@ config BOOKE
>  config FSL_BOOKE
>   bool
>   depends on E200 || E500
> + select PPC_BOOK3E_MMU
>   default y
>  
>  config FSL_EMB_PERFMON
> @@ -203,7 +210,7 @@ config SPE
>  
>  config PPC_STD_MMU
>   bool
> - depends on 6xx || PPC64
> + depends on PPC_BOOK3S
>   default y
>  
>  config PPC_STD_MMU_32

This also feels inconsistent, using a 'select' in one case and 'depends on' in 
the
other one. The two ways are obviously equivalent, but I find it a bit confusing
to mix them.

Arnd <><
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How to add i2c platform data in dts file

2009-06-02 Thread Stefan Strobl
Hi
I'm using the i2c/chips/tsl2550 driver. In the tsl2550_probe() function
the driver checks for platform data to set the operating_mode. I suppose
I can provide this data in my dts file but I don't know how to do that.
Currently my dts looks like this:

tsl2...@39 {
compatible = "taos,tsl2550";
reg = <0x39>;
};

Can anyone help me on how to set the operating_mode here?
Thanks, Stefan.
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Re: [PATCH 3/5] powerpc: Introduce CONFIG_PPC_BOOK3S

2009-06-02 Thread Benjamin Herrenschmidt
On Tue, 2009-06-02 at 11:49 +0100, Arnd Bergmann wrote:
> On Tuesday 02 June 2009, Benjamin Herrenschmidt wrote:
> > --- linux-work.orig/arch/powerpc/platforms/Kconfig.cputype  2009-06-02 
> > 16:29:27.0 +1000
> > +++ linux-work/arch/powerpc/platforms/Kconfig.cputype   2009-06-02 
> > 16:55:01.0 +1000
> > @@ -9,7 +9,6 @@ menu "Processor support"
> >  choice
> > prompt "Processor Type"
> > depends on PPC32
> > -   default 6xx
> > help
> >   There are five families of 32 bit PowerPC chips supported.
> >   The most common ones are the desktop and server CPUs (601, 603,
> 
> It looks like you couldn't decide which route to take here. You leave the
> 'depends on PPC32' above, but

The choice depends on PPC32 since there is no choice .. yet for 64-bit.
I removed the default 6xx because I noticed a warning from Kbuild that
it doesn't like defaults for choices.

> >  config PPC_85xx
> > bool "Freescale 85xx"
> > +   depends on PPC32

Ah right, I can remove these. Initially, the choice was available for
both 32 and 64 bit ;-) That's an artifact of the patch splitting since I
only introduce Book3E for 64-bit later.

> also add it (redundantly) in all other processor types except BOOK3S, and

Right. As I said, artifact of the split. I'll remove them for now.

> > -# Until we have a choice of exclusive CPU types on 64-bit, we always
> > -# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
> > -# "classic" MMU
> > -
> >  config PPC_BOOK3S
> > -   def_bool y
> > -   depends on PPC64 || 6xx
> > +   default y
> > +   depends on PPC64
> > +   select PPC_FPU
> > +
> 
> then add the other BOOK3S option depending on PPC64. Even though
> it might look silly to have a choice statement with just one possible
> option in case of PPC64, why not integrate it right away, for consistency
> reasons. It seems strange to have the same Kconfig symbol both
> as a choice and a simple bool.

Well, I was hesitating. The initial patch added the choice with E and S
for both 32 and 64 as you can guess. But we aren't ready for that yet.

I suppose I can do a one-option choice in the meantime.

> > @@ -125,6 +131,7 @@ config BOOKE
> >  config FSL_BOOKE
> > bool
> > depends on E200 || E500
> > +   select PPC_BOOK3E_MMU
> > default y
> >  
> >  config FSL_EMB_PERFMON
> > @@ -203,7 +210,7 @@ config SPE
> >  
> >  config PPC_STD_MMU
> > bool
> > -   depends on 6xx || PPC64
> > +   depends on PPC_BOOK3S
> > default y
> >  
> >  config PPC_STD_MMU_32
> 
> This also feels inconsistent, using a 'select' in one case and 'depends on' 
> in the
> other one. The two ways are obviously equivalent, but I find it a bit 
> confusing
> to mix them.

Right, I should probably use select in both.

Cheers,
Ben.


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Re: MPC8343 - serial8250: too much work

2009-06-02 Thread Alemao
Hi all,

In a normal situation, I have something like this:

serial8250_interrupt()
serial8250_handle_port()
transmit_chars()
pass_counter: 0
serial8250_handle_port()
pass_counter: 1
serial8250_handle_port()
pass_counter: 2
pass_counter: 3


But when the problem happends:

serial8250_interrupt(16)
serial8250_handle_port()
transmit_chars()
uart_circ_empty()
pass_counter: 0
.
.
.
serial8250_handle_port()
transmit_chars()
uart_circ_empty()
pass_counter: 257
serial8250: too much work for irq16

If the circ buffer is empty, why iterate 256 times?

How can I trace the application that is calling serial routines?

Its difficult to debug cause I use serial console to communicate with the board.

Thanks in advance,

--
Alemao
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Re: [PATCH 1/4] net/phy/marvell: update m88e1111 support for SGMII mode

2009-06-02 Thread Haiying Wang
On Mon, 2009-06-01 at 02:51 -0700, David Miller wrote:
> Patch 3 of this series doesn't apply cleanly to net-next-2.6
> so I'm dropping the entire patch set.

> Also, in patch 3 you put your signoff in the Subject line.
> 
> Please fix all of this up and resubmit your patch series.

I only verified the first three patches could be applied to your
net-2.6, did not verify whether they could be applied for net-next-2.6.
Sorry.
I've fixed the patch3 against net-next-2.6 now, and will resubmit the
patches.
But the patch4 can not be applied to your net-next-2.6 since there is
not 8569mds support in that tree. Hope Kumar can pick up the patch 4.

Thanks.

Haiying


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[PATCH 1/4] net/phy/marvell: update m88e1111 support for SGMII mode

2009-06-02 Thread Haiying Wang
Disable fiber/copper auto selection for Marvell m88e SGMII support.

Signed-off-by: Haiying Wang 
---
 drivers/net/phy/marvell.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 7a3ec9d..dd6f54d 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -243,6 +243,7 @@ static int m88e_config_init(struct phy_device *phydev)
 
temp &= ~(MII_M_HWCFG_MODE_MASK);
temp |= MII_M_HWCFG_MODE_SGMII_NO_CLK;
+   temp |= MII_M_HWCFG_FIBER_COPPER_AUTO;
 
err = phy_write(phydev, MII_M_PHY_EXT_SR, temp);
if (err < 0)
-- 
1.6.0.2

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[PATCH 2/4] fsl_pq_mido: Set the first UCC as the mii management interface master

2009-06-02 Thread Haiying Wang
Current code makes the UCC whose register range includes the current mdio
register to be the MII managemnt interface master of the QE. If there is more
than one mdio bus for QE, the UCC of the last mdio bus will be the MII
management interface master which will make the primary mdio bus working
unproperly, e.g. can not get the right clock. Normally the primary mdio bus is
the first UEC's mdio bus.
This patch allows the first UCC to be the MII management interface master of the
multiple UCC mdio buses.

Signed-off-by: Haiying Wang 
---
 drivers/net/fsl_pq_mdio.c |6 +-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index d12e0e0..3af5813 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -301,13 +301,17 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
of_device_is_compatible(np, "ucc_geth_phy")) {
 #ifdef CONFIG_UCC_GETH
u32 id;
+   static u32 mii_mng_master;
 
tbipa = ®s->utbipar;
 
if ((err = get_ucc_id_for_range(addr, addr + size, &id)))
goto err_free_irqs;
 
-   ucc_set_qe_mux_mii_mng(id - 1);
+   if (!mii_mng_master) {
+   mii_mng_master = id;
+   ucc_set_qe_mux_mii_mng(id - 1);
+   }
 #else
err = -ENODEV;
goto err_free_irqs;
-- 
1.6.0.2

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[PATCH 3/4 v2] net/ucc_geth: Add SGMII support for UEC GETH driver

2009-06-02 Thread Haiying Wang
Signed-off-by: Haiying Wang 
---
 arch/powerpc/include/asm/qe.h |2 +
 drivers/net/ucc_geth.c|   79 -
 drivers/net/ucc_geth.h|   28 ++-
 3 files changed, 107 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 2701753..4459d20 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -668,6 +668,8 @@ struct ucc_slow_pram {
 #define UCC_GETH_UPSMR_RMM  0x1000
 #define UCC_GETH_UPSMR_CAM  0x0400
 #define UCC_GETH_UPSMR_BRO  0x0200
+#define UCC_GETH_UPSMR_SMM 0x0080
+#define UCC_GETH_UPSMR_SGMM0x0020
 
 /* UCC Transmit On Demand Register (UTODR) */
 #define UCC_SLOW_TOD   0x8000
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 0cf22c4..fd6140b 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2006-2007 Freescale Semicondutor, Inc. All rights reserved.
+ * Copyright (C) 2006-2009 Freescale Semicondutor, Inc. All rights reserved.
  *
  * Author: Shlomi Gridish 
  *Li Yang 
@@ -65,6 +65,8 @@
 
 static DEFINE_SPINLOCK(ugeth_lock);
 
+static void uec_configure_serdes(struct net_device *dev);
+
 static struct {
u32 msg_enable;
 } debug = { -1 };
@@ -1410,6 +1412,9 @@ static int adjust_enet_interface(struct ucc_geth_private 
*ugeth)
(ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) {
upsmr |= UCC_GETH_UPSMR_TBIM;
}
+   if ((ugeth->phy_interface == PHY_INTERFACE_MODE_SGMII))
+   upsmr |= UCC_GETH_UPSMR_SGMM;
+
out_be32(&uf_regs->upsmr, upsmr);
 
/* Disable autonegotiation in tbi mode, because by default it
@@ -1554,6 +1559,9 @@ static int init_phy(struct net_device *dev)
return -ENODEV;
}
 
+   if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII)
+   uec_configure_serdes(dev);
+
phydev->supported &= (ADVERTISED_10baseT_Half |
 ADVERTISED_10baseT_Full |
 ADVERTISED_100baseT_Half |
@@ -1569,7 +1577,41 @@ static int init_phy(struct net_device *dev)
return 0;
 }
 
+/* Initialize TBI PHY interface for communicating with the
+ * SERDES lynx PHY on the chip.  We communicate with this PHY
+ * through the MDIO bus on each controller, treating it as a
+ * "normal" PHY at the address found in the UTBIPA register.  We assume
+ * that the UTBIPA register is valid.  Either the MDIO bus code will set
+ * it to a value that doesn't conflict with other PHYs on the bus, or the
+ * value doesn't matter, as there are no other PHYs on the bus.
+ */
+static void uec_configure_serdes(struct net_device *dev)
+{
+   struct ucc_geth_private *ugeth = netdev_priv(dev);
+
+   if (!ugeth->tbiphy) {
+   printk(KERN_WARNING "SGMII mode requires that the device "
+   "tree specify a tbi-handle\n");
+   return;
+   }
+
+   /*
+* If the link is already up, we must already be ok, and don't need to
+* configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
+* everything for us?  Resetting it takes the link down and requires
+* several seconds for it to come back.
+*/
+   if (phy_read(ugeth->tbiphy, ENET_TBI_MII_SR) & TBISR_LSTATUS)
+   return;
+
+   /* Single clk mode, mii mode off(for serdes communication) */
+   phy_write(ugeth->tbiphy, ENET_TBI_MII_ANA, TBIANA_SETTINGS);
 
+   phy_write(ugeth->tbiphy, ENET_TBI_MII_TBICON, TBICON_CLK_SELECT);
+
+   phy_write(ugeth->tbiphy, ENET_TBI_MII_CR, TBICR_SETTINGS);
+
+}
 
 static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth)
 {
@@ -3523,6 +3565,8 @@ static phy_interface_t to_phy_interface(const char 
*phy_connection_type)
return PHY_INTERFACE_MODE_RGMII_RXID;
if (strcasecmp(phy_connection_type, "rtbi") == 0)
return PHY_INTERFACE_MODE_RTBI;
+   if (strcasecmp(phy_connection_type, "sgmii") == 0)
+   return PHY_INTERFACE_MODE_SGMII;
 
return PHY_INTERFACE_MODE_MII;
 }
@@ -3567,6 +3611,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const 
struct of_device_id *ma
PHY_INTERFACE_MODE_RMII, PHY_INTERFACE_MODE_RGMII,
PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_RGMII,
PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_RTBI,
+   PHY_INTERFACE_MODE_SGMII,
};
 
ugeth_vdbg("%s: IN", __func__);
@@ -3682,6 +3727,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const 
struct of_device_id *ma
case PHY_INTERFACE_MODE_RGMII_TXID:
case PHY_INTERFACE_MODE_TBI:
case PHY_INTERFACE_MODE_RTBI:
+   case PHY_INTERFACE_MODE_SGMII:
max_speed = SPEED_1000;
break;
de

[PATCH 4/4] MPC85xx: Add UCC6 and UCC8 nodes in SGMII mode for MPC8569MDS

2009-06-02 Thread Haiying Wang
Signed-off-by: Haiying Wang 
---
 arch/powerpc/boot/dts/mpc8569mds.dts |   63 ++
 1 files changed, 63 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts 
b/arch/powerpc/boot/dts/mpc8569mds.dts
index 39c2927..4e95abd 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -24,6 +24,8 @@
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
+   ethernet5 = &enet5;
+   ethernet7 = &enet7;
pci1 = &pci1;
rapidio0 = &rio0;
};
@@ -466,6 +468,37 @@
reg = <0x3>;
device_type = "ethernet-phy";
};
+   qe_phy5: ethernet-...@04 {
+   interrupt-parent = <&mpic>;
+   reg = <0x04>;
+   device_type = "ethernet-phy";
+   };
+   qe_phy7: ethernet-...@06 {
+   interrupt-parent = <&mpic>;
+   reg = <0x6>;
+   device_type = "ethernet-phy";
+   };
+   };
+   m...@3520 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x3520 0x18>;
+   compatible = "fsl,ucc-mdio";
+
+   tbi0: tbi-...@15 {
+   reg = <0x15>;
+   device_type = "tbi-phy";
+   };
+   };
+   m...@3720 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0x3720 0x38>;
+   compatible = "fsl,ucc-mdio";
+   tbi1: tbi-...@17 {
+   reg = <0x17>;
+   device_type = "tbi-phy";
+   };
};
 
enet2: u...@2200 {
@@ -513,6 +546,36 @@
phy-connection-type = "rgmii-id";
};
 
+   enet5: u...@3400 {
+   device_type = "network";
+   compatible = "ucc_geth";
+   cell-index = <6>;
+   reg = <0x3400 0x200>;
+   interrupts = <41>;
+   interrupt-parent = <&qeic>;
+   local-mac-address = [ 00 00 00 00 00 00 ];
+   rx-clock-name = "none";
+   tx-clock-name = "none";
+   tbi-handle = <&tbi0>;
+   phy-handle = <&qe_phy5>;
+   phy-connection-type = "sgmii";
+   };
+
+   enet7: u...@3600 {
+   device_type = "network";
+   compatible = "ucc_geth";
+   cell-index = <8>;
+   reg = <0x3600 0x200>;
+   interrupts = <43>;
+   interrupt-parent = <&qeic>;
+   local-mac-address = [ 00 00 00 00 00 00 ];
+   rx-clock-name = "none";
+   tx-clock-name = "none";
+   tbi-handle = <&tbi1>;
+   phy-handle = <&qe_phy7>;
+   phy-connection-type = "sgmii";
+   };
+
mu...@1 {
#address-cells = <1>;
#size-cells = <1>;
-- 
1.6.0.2

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MPC52xx simple GPIO support

2009-06-02 Thread Stefan Strobl
Hi
I still don't quite understand how to use the Flattened Device Tree /
Open Firmware. I see there's a driver (mpc52xx_gpt.c) that supports to
use the Pins on the GPT as simple GPIOs. I activated it by adding these
lines to my dts file:

gpt2: ti...@620 {
compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
reg = <0x620 0x10>;
interrupts = <1 11 0>;
gpio-controller;
#gpio-cells = <2>;
};

I can see the appropriate entries in sysfs
(/sys/devices/f000.soc5200/f620.timer), but how can I actually
use these GPIO's now?

Many thanks
Stefan.
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Re: MPC52xx simple GPIO support

2009-06-02 Thread Anton Vorontsov
Hi Stefan,

On Tue, Jun 02, 2009 at 07:02:25PM +0200, Stefan Strobl wrote:
> Hi
> I still don't quite understand how to use the Flattened Device Tree /
> Open Firmware. I see there's a driver (mpc52xx_gpt.c) that supports to
> use the Pins on the GPT as simple GPIOs. I activated it by adding these
> lines to my dts file:
> 
> gpt2: ti...@620 {
>   compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
>   reg = <0x620 0x10>;
>   interrupts = <1 11 0>;
>   gpio-controller;
>   #gpio-cells = <2>;
> };
> 
> I can see the appropriate entries in sysfs
> (/sys/devices/f000.soc5200/f620.timer), but how can I actually
> use these GPIO's now?

For in-kernel usage example you can take a look at:
arch/powerpc/boot/dts/mpc836x_rdk.dts (upm node, notice gpios = <>)
drivers/mtd/nand/fsl_upm.c (of_get_gpio() then gpio_request()).

For userland usage you need to enable CONFIG_GPIO_SYSFS, and then
look into /sys/class/gpio/{gpiochip,export,gpioNNN}.

-- 
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Re: [PATCH] mmc: Fix the wrong accessor to HOSTVER register

2009-06-02 Thread Anton Vorontsov
On Wed, May 06, 2009 at 06:40:07PM +0800, Dave Liu wrote:
> Freescale eSDHC controller has the special order for
> the HOST version register. that is not same as the other's
> registers. The address of HOSTVER in spec is 0xFE, and
> we need use the in_be16(0xFE) to access it, not in_be16(0xFC).
> 
> Signed-off-by: Dave Liu 

Sorry for the delay Dave. This patch is surely

Acked-by: Anton Vorontsov 

> ---
>  drivers/mmc/host/sdhci-of.c |8 +++-
>  1 files changed, 7 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c
> index 3ff4ac3..e167131 100644
> --- a/drivers/mmc/host/sdhci-of.c
> +++ b/drivers/mmc/host/sdhci-of.c
> @@ -55,7 +55,13 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
>  
>  static u16 esdhc_readw(struct sdhci_host *host, int reg)
>  {
> - return in_be16(host->ioaddr + (reg ^ 0x2));
> + u16 ret;
> +
> + if (unlikely(reg == SDHCI_HOST_VERSION))
> + ret = in_be16(host->ioaddr + reg);
> + else
> + ret = in_be16(host->ioaddr + (reg ^ 0x2));
> + return ret;
>  }
>  
>  static u8 esdhc_readb(struct sdhci_host *host, int reg)
> -- 
> 1.5.4

Thanks,

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Re: [PATCH] powerpc: tiny memcpy_(to|from)io optimisation

2009-06-02 Thread Albrecht Dreß

Am 01.06.09 08:14 schrieb(en) Joakim Tjernlund:
.. not even 4.2.2 which is fairly modern will get it right. It breaks  
very easy as gcc has never been any good at this type of  
optimization. Sometimes small changes will make gcc unhappy and it  
won't do the right optimization.


It's even worse...  Looking at the assembly output of the simple  
function



void loop2(void * src, void * dst, int n)
{
  volatile uint32_t * _dst = (volatile uint32_t *) (dst - 4);
  volatile uint32_t * _src = (volatile uint32_t *) (src - 4);
  n >>= 2;
  do {
*(++_dst) = *(++_src);
  } while (--n);
}


gcc 4.0.1 coming with Apple's Developer Tools (on Tiger) with options  
"-O3 -mcpu=603e -mtune=603e" produces



_loop2:
srawi r5,r5,2
mtctr r5
addi r4,r4,-4
addi r3,r3,-4
L11:
lwzu r0,4(r3)
stwu r0,4(r4)
bdnz L11
blr


which looks perfect to me.  However, gcc 4.3.3 on Ubuntu/PPC produces  
with the same options



loop2:
srawi 5,5,2
stwu 1,-16(1)
mtctr 5
li 9,0
.L8:
lwzx 0,3,9
stwx 0,4,9
addi 9,9,4
bdnz .L8
addi 1,1,16
blr


wasting a register and a statement in the loop core, and fiddles around  
with the stack pointer for no good reason.  Gcc 4.4.0 produces



loop2:
srawi 5,5,2
mtctr 5
li 9,0
.L9:
lwzx 0,3,9
stwx 0,4,9
addi 9,9,4
bdnz .L9
blr


which drops the r1 accesses, but still produces the sub-optimal loop.   
Is this a gcc regression, or did I miss something here?  Probably the  
only bullet-proof way is to write some core loops in assembly... :-/


Thanks, Albrecht.


pgpMRQRHxmbwt.pgp
Description: PGP signature
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Re: is the resolution of do_gettimeofday in usec?

2009-06-02 Thread Chris Friesen
wael showair wrote:
> Hi All,
> i have board that contains MPC8555 processor with linux 2.6.27 ported to it.
> i want to use an accurate function to measure the time. i searched the
> kernel code & i found several functions but i read that the do_gettimeofday
> is the most accurate one since it has a timer resolution of usec.

You might also look at clock_gettime(), which has a theoretical accuracy
of nanoseconds.  Both this and gettimeofday are NTP-corrected if you are
synced to an NTP clock.

> my question is how this function give this accuracy while the kernel timer
> is 4msec?

The accuracy of the timestamp is not related to the tick interval.

Chris
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Re: [PATCH v2] i2c-mpc: generate START condition after STOP caused by read i2c_msg

2009-06-02 Thread Ben Dooks
On Thu, May 28, 2009 at 10:15:22PM +0200, Esben Haabendal wrote:
> On Thu, May 28, 2009 at 9:31 PM, Grant Likely  
> wrote:
> > On Tue, May 26, 2009 at 5:30 AM, Esben Haabendal wrote:
> >> On Tue, May 19, 2009 at 7:22 AM, Esben Haabendal wrote:
> >>> This fixes MAL (arbitration lost) bug caused by illegal use of
> >>> RSTA (repeated START) after STOP condition generated after last byte
> >>> of reads. With this patch, it is possible to do an i2c_transfer() with
> >>> additional i2c_msg's following the I2C_M_RD messages.
> >>>
> >>> It still needs to be resolved if it is possible to fix this issue
> >>> by removing the STOP condition after reads in a robust way.
> >>>
> >>> Signed-off-by: Esben Haabendal 
> >>> ---
> >>> ?drivers/i2c/busses/i2c-mpc.c | ? ?9 +++--
> >>> ?1 files changed, 7 insertions(+), 2 deletions(-)
> >>
> >> Any blockers to get this accepted?
> >
> > It helps if you cc: developers/maintainers of the device. ?ie. Kumar
> > for mpc8xxx, me for 52xx.
> >
> > This is the first time I noticed your posting. ?It will take me a few
> > days before I get a chance to review it.
> 
> Kumar, will you take a look at this patch?

is anyone else likely to review it, or should I merge?

-- 
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  'a smiley only costs 4 bytes'
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Re: [PATCH] powerpc: tiny memcpy_(to|from)io optimisation

2009-06-02 Thread Benjamin Herrenschmidt
On Tue, 2009-06-02 at 20:45 +0200, Albrecht Dreß wrote:

> 
> which drops the r1 accesses, but still produces the sub-optimal loop.   
> Is this a gcc regression, or did I miss something here?  Probably the  
> only bullet-proof way is to write some core loops in assembly... :-/

Well, gcc may be right here. What you call the "optimal" loop uses the
lwzu instruction. An interesting thing about this instruction is that
it updates two GPRs at completion (I'm ignoring the load multiple and
string instructions on purpose here).

Now, quite a few simple implementations don't have two write ports to
the GPR file, nor the logic to handle hazards properly with two GPRs
being updated... which means the instruction is very likely to take a
very inefficient path through the pipeline. On server processors, I'm
pretty sure it's just cracked into a load and an add anyway.

I wouldn't be surprised thus if the loop variant with the separate add
ends up more efficient on most implementations around.

Of course, the loop above could use some unrolling to put some distance
between the load and the store of the loaded value.

Cheers,
Ben.

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Re: [PATCH v2] i2c-mpc: generate START condition after STOP caused by read i2c_msg

2009-06-02 Thread Grant Likely
Hi Esben and Ben,

Sorry for the lateness in reviewing this.  FWIW, here are my comments.

g.

On Mon, May 18, 2009 at 11:22 PM, Esben Haabendal
 wrote:
> This fixes MAL (arbitration lost) bug caused by illegal use of
> RSTA (repeated START) after STOP condition generated after last byte
> of reads. With this patch, it is possible to do an i2c_transfer() with
> additional i2c_msg's following the I2C_M_RD messages.
>
> It still needs to be resolved if it is possible to fix this issue
> by removing the STOP condition after reads in a robust way.
>
> Signed-off-by: Esben Haabendal 
> ---
>  drivers/i2c/busses/i2c-mpc.c |    9 +++--
>  1 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
> index 4af5c09..0199f9a 100644
> --- a/drivers/i2c/busses/i2c-mpc.c
> +++ b/drivers/i2c/busses/i2c-mpc.c
> @@ -456,17 +456,22 @@ static int mpc_xfer(struct i2c_adapter *adap, struct
> i2c_msg *msgs, int num)
>        }
>
>        for (i = 0; ret >= 0 && i < num; i++) {
> +               int restart = i;
>                pmsg = &msgs[i];
>                dev_dbg(i2c->dev,
>                        "Doing %s %d bytes to 0x%02x - %d of %d messages\n",
>                        pmsg->flags & I2C_M_RD ? "read" : "write",
>                        pmsg->len, pmsg->addr, i + 1, num);
> +               if (i > 0 && ((pmsg - 1)->flags & I2C_M_RD))
> +                       restart = 0;
>                if (pmsg->flags & I2C_M_RD)
>                        ret =
> -                           mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> i);
> +                           mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> +                                    restart);
>                else
>                        ret =
> -                           mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> i);
> +                           mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> +                                     restart);
>        }

Hmmm, seems to be a rather convoluted code path.  Surely this could be
handled in a clearer way.  The whole (pmsg - 1) bit raises my eyebrows
(I'd rather see msgs[i-1]).  At the very least this deserves an
comment describing what it is doing.  The following might be better
for the next person who has to read this code:

+  int restart = 0;
   for (i = 0; ret >= 0 && i < num; i++) {
   pmsg = &msgs[i];
   dev_dbg(i2c->dev,
   "Doing %s %d bytes to 0x%02x - %d of %d messages\n",
   pmsg->flags & I2C_M_RD ? "read" : "write",
   pmsg->len, pmsg->addr, i + 1, num);
   if (pmsg->flags & I2C_M_RD)
   ret =
-   mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
i);
+   mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
+restart);
   else
   ret =
-   mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
i);
+   mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
+ restart);
+   /* Only set the restart flag if this was not an
I2C_M_RD transaction
+* because it causes an illegal use of
+* RSTA (repeated START) after STOP condition
generated after last byte
+* of reads  */
+   restart = (pmsg->flags & I2C_M_RD == 0);
   }

g.

-- 
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Secret Lab Technologies Ltd.
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[git pull] Please pull powerpc.git merge branch

2009-06-02 Thread Benjamin Herrenschmidt
Hi Linus !

Here's a defconfig update if you still get things in .30

Cheers,
Ben.

The following changes since commit d9244b5d2fbfe9fa540024b410047af13ceec90f:
  Linus Torvalds (1):
Merge branch 'hwmon-for-linus' of 
git://git.kernel.org/.../jdelvare/staging

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge

Benjamin Herrenschmidt (1):
  powerpc/pmac: Update PowerMac 32-bit defconfig

 arch/powerpc/configs/pmac32_defconfig |  278 +++--
 1 files changed, 195 insertions(+), 83 deletions(-)


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Re: [PATCH 3/5] powerpc: Introduce CONFIG_PPC_BOOK3S

2009-06-02 Thread Benjamin Herrenschmidt
On Tue, 2009-06-02 at 11:49 +0100, Arnd Bergmann wrote:
> 
> then add the other BOOK3S option depending on PPC64. Even though
> it might look silly to have a choice statement with just one possible
> option in case of PPC64, why not integrate it right away, for
> consistency
> reasons. It seems strange to have the same Kconfig symbol both
> as a choice and a simple bool.

After some thinking I decided to keep the PPC64 variant as a separate
simple bool for now, among others, because it should be a separate
choice anyway due to the help text being different for 32 and 64-bit
anyway and I'm not fan of a one-option choice.

Ben.


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[PATCH] powerpc/spufs: remove unused error path

2009-06-02 Thread Stephen Rothwell
Commit 45db9240890d9343c934db1fe82d6e68ac2d28da ("powerpc/spufs: Remove
double check for non-negative dentry") removed the only user of the
out_dput label, so remove it and the code following it.

Gets rid of this warning:

arch/powerpc/platforms/cell/spufs/inode.c: In function 'spufs_create':
arch/powerpc/platforms/cell/spufs/inode.c:647: warning: label 'out_dput' 
defined but not used

Signed-off-by: Stephen Rothwell 
---
 arch/powerpc/platforms/cell/spufs/inode.c |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/cell/spufs/inode.c 
b/arch/powerpc/platforms/cell/spufs/inode.c
index 36b6700..24b30b6 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -644,8 +644,6 @@ long spufs_create(struct nameidata *nd, unsigned int flags, 
mode_t mode,
fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
return ret;
 
-out_dput:
-   dput(dentry);
 out_dir:
mutex_unlock(&nd->path.dentry->d_inode->i_mutex);
 out:
-- 
1.6.3.1

-- 
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[PATCH] powerpc: fix warning when printing a resource_size_t

2009-06-02 Thread Stephen Rothwell
resource_size_t is 64 bits on PowerPC 64.

Gets rid of this warning:

arch/powerpc/kernel/pci_64.c: In function 'pcibios_map_io_space':
arch/powerpc/kernel/pci_64.c:504: warning: format '%016lx' expects type 'long 
unsigned int', but argument 2 has type 'resource_size_t'

Signed-off-by: Stephen Rothwell 
---
 arch/powerpc/kernel/pci_64.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index dd6c7a3..a165fec 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -501,7 +501,7 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
pr_debug("IO mapping for PHB %s\n", hose->dn->full_name);
pr_debug("  phys=0x%016llx, virt=0x%p (alloc=0x%p)\n",
 hose->io_base_phys, hose->io_base_virt, hose->io_base_alloc);
-   pr_debug("  size=0x%016lx (alloc=0x%016lx)\n",
+   pr_debug("  size=0x%016llx (alloc=0x%016lx)\n",
 hose->pci_io_size, size_page);
 
/* Establish the mapping */
-- 
1.6.3.1

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au
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[PATCH] powerpc/xmon: remove unused variable in xmon.c

2009-06-02 Thread Stephen Rothwell
Gets rid of this warning:

arch/powerpc/xmon/xmon.c: In function 'dump_log_buf':
arch/powerpc/xmon/xmon.c:2133: warning: unused variable 'i'

Signed-off-by: Stephen Rothwell 
---
 arch/powerpc/xmon/xmon.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 08121d3..e1f33a8 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2130,7 +2130,7 @@ void
 dump_log_buf(void)
 {
 const unsigned long size = 128;
-unsigned long i, end, addr;
+unsigned long end, addr;
 unsigned char buf[size + 1];
 
 addr = 0;
-- 
1.6.3.1

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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[PATCH] powerpc/pseries: fix warnings when printing resource_size_t

2009-06-02 Thread Stephen Rothwell
resource_size_t is 64 bits on pseries

Gets rid of these warnings:

arch/powerpc/platforms/pseries/iommu.c: In function 'pci_dma_bus_setup_pSeries':
arch/powerpc/platforms/pseries/iommu.c:391: warning: format '%lx' expects type 
'long unsigned int', but argument 2 has type 'resource_size_t'
arch/powerpc/platforms/pseries/iommu.c:417: warning: format '%lx' expects type 
'long unsigned int', but argument 2 has type 'resource_size_t'

Signed-off-by: Stephen Rothwell 
---
 arch/powerpc/platforms/pseries/iommu.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/iommu.c 
b/arch/powerpc/platforms/pseries/iommu.c
index 3ee01b4..661c8e0 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -388,7 +388,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
 
while (pci->phb->dma_window_size * children > 0x8000ul)
pci->phb->dma_window_size >>= 1;
-   pr_debug("No ISA/IDE, window size is 0x%lx\n",
+   pr_debug("No ISA/IDE, window size is 0x%llx\n",
 pci->phb->dma_window_size);
pci->phb->dma_window_base_cur = 0;
 
@@ -414,7 +414,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
while (pci->phb->dma_window_size * children > 0x7000ul)
pci->phb->dma_window_size >>= 1;
 
-   pr_debug("ISA/IDE, window size is 0x%lx\n", pci->phb->dma_window_size);
+   pr_debug("ISA/IDE, window size is 0x%llx\n", pci->phb->dma_window_size);
 }
 
 
-- 
1.6.3.1

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au
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[PATCH] powerpc/mm: Fix a AB->BA deadlock scenario with nohash MMU context lock

2009-06-02 Thread Benjamin Herrenschmidt
The MMU context_lock can be taken from switch_mm() while the
rq->lock is held. The rq->lock can also be taken from interrupts,
thus if we get interrupted in destroy_context() with the context
lock held and that interrupt tries to take the rq->lock, there's
a possible deadlock scenario with another CPU having the rq->lock
and calling switch_mm() which takes our context lock.

The fix is to always ensure interrupts are off when taking our
context lock. The switch_mm() path is already good so this fixes
the destroy_context() path.

While at it, turn the context lock into a new style spinlock.

Signed-off-by: Benjamin Herrenschmidt 
---


 arch/powerpc/mm/mmu_context_nohash.c |7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

--- linux-work.orig/arch/powerpc/mm/mmu_context_nohash.c2009-06-03 
14:14:47.0 +1000
+++ linux-work/arch/powerpc/mm/mmu_context_nohash.c 2009-06-03 
14:25:30.0 +1000
@@ -46,7 +46,7 @@ static unsigned int next_context, nr_fre
 static unsigned long *context_map;
 static unsigned long *stale_map[NR_CPUS];
 static struct mm_struct **context_mm;
-static spinlock_t context_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(context_lock);
 
 #define CTX_MAP_SIZE   \
(sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1))
@@ -272,6 +272,7 @@ int init_new_context(struct task_struct 
  */
 void destroy_context(struct mm_struct *mm)
 {
+   unsigned long flags;
unsigned int id;
 
if (mm->context.id == MMU_NO_CONTEXT)
@@ -279,7 +280,7 @@ void destroy_context(struct mm_struct *m
 
WARN_ON(mm->context.active != 0);
 
-   spin_lock(&context_lock);
+   spin_lock_irqsave(&context_lock, flags);
id = mm->context.id;
if (id != MMU_NO_CONTEXT) {
__clear_bit(id, context_map);
@@ -290,7 +291,7 @@ void destroy_context(struct mm_struct *m
 #endif
nr_free_contexts++;
}
-   spin_unlock(&context_lock);
+   spin_unlock_irqrestore(&context_lock, flags);
 }
 
 #ifdef CONFIG_SMP
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[PATCH] sound/ppc: update annotations of serveral functions

2009-06-02 Thread Stephen Rothwell
[I am not sure if this is the correct approach as I don't know if any of
this actual hardware or drivers are really hot pluggable.]

Gets rid of these build warnings:

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x5c): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_new()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_new().
If .snd_pmac_new is only used by .snd_pmac_probe then
annotate .snd_pmac_new with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x10c): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_burgundy_init()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_burgundy_init().
If .snd_pmac_burgundy_init is only used by .snd_pmac_probe then
annotate .snd_pmac_burgundy_init with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x164): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_daca_init()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_daca_init().
If .snd_pmac_daca_init is only used by .snd_pmac_probe then
annotate .snd_pmac_daca_init with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x1dc): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_tumbler_init()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_tumbler_init().
If .snd_pmac_tumbler_init is only used by .snd_pmac_probe then
annotate .snd_pmac_tumbler_init with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x1ec): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_tumbler_post_init()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_tumbler_post_init().
If .snd_pmac_tumbler_post_init is only used by .snd_pmac_probe then
annotate .snd_pmac_tumbler_post_init with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x28c): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_awacs_init()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_awacs_init().
If .snd_pmac_awacs_init is only used by .snd_pmac_probe then
annotate .snd_pmac_awacs_init with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x2bc): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_pcm_new()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_pcm_new().
If .snd_pmac_pcm_new is only used by .snd_pmac_probe then
annotate .snd_pmac_pcm_new with a matching annotation.

WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x2f8): Section mismatch in 
reference from the function .snd_pmac_probe() to the function 
.init.text:.snd_pmac_attach_beep()
The function __devinit .snd_pmac_probe() references
a function __init .snd_pmac_attach_beep().
If .snd_pmac_attach_beep is only used by .snd_pmac_probe then
annotate .snd_pmac_attach_beep with a matching annotation.

Signed-off-by: Stephen Rothwell 
---
 sound/ppc/awacs.c|2 +-
 sound/ppc/beep.c |2 +-
 sound/ppc/burgundy.c |2 +-
 sound/ppc/daca.c |2 +-
 sound/ppc/keywest.c  |4 ++--
 sound/ppc/pmac.c |8 
 sound/ppc/tumbler.c  |4 ++--
 7 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/sound/ppc/awacs.c b/sound/ppc/awacs.c
index 80df9b1..0d2d62d 100644
--- a/sound/ppc/awacs.c
+++ b/sound/ppc/awacs.c
@@ -872,7 +872,7 @@ static void snd_pmac_awacs_update_automute(struct snd_pmac 
*chip, int do_notify)
 /*
  * initialize chip
  */
-int __init
+int __devinit
 snd_pmac_awacs_init(struct snd_pmac *chip)
 {
int pm7500 = IS_PM7500;
diff --git a/sound/ppc/beep.c b/sound/ppc/beep.c
index 89f5c32..a9d3507 100644
--- a/sound/ppc/beep.c
+++ b/sound/ppc/beep.c
@@ -215,7 +215,7 @@ static struct snd_kcontrol_new snd_pmac_beep_mixer = {
 };
 
 /* Initialize beep stuff */
-int __init snd_pmac_attach_beep(struct snd_pmac *chip)
+int __devinit snd_pmac_attach_beep(struct snd_pmac *chip)
 {
struct pmac_beep *beep;
struct input_dev *input_dev;
diff --git a/sound/ppc/burgundy.c b/sound/ppc/burgundy.c
index 45a7629..aba3814 100644
--- a/sound/ppc/burgundy.c
+++ b/sound/ppc/burgundy.c
@@ -618,7 +618,7 @@ static void snd_pmac_burgundy_update_automute(struct 
snd_pmac *chip, int do_noti
 /*
  * initialize burgundy
  */
-int __init snd_pmac_burgundy_init(struct snd_pmac *chip)
+int __devinit snd_pmac_burgundy_init(struct snd_pmac *chip)
 {
int imac = machine_is_compatible("iMac");
int i, err;
diff --git a/sound/ppc/daca.c b/sound/ppc/daca.c
index f8d478c..24200b7 100644
--- a/sound/ppc/daca.c
+++ b/sound/ppc/daca.c
@@ -244,7 +244,

Re: [PATCH v2] i2c-mpc: generate START condition after STOP caused by read i2c_msg

2009-06-02 Thread Grant Likely
On Tue, Jun 2, 2009 at 5:12 PM, Grant Likely  wrote:
> Hi Esben and Ben,
>
> Sorry for the lateness in reviewing this.  FWIW, here are my comments.
>
> g.
>
> On Mon, May 18, 2009 at 11:22 PM, Esben Haabendal
>  wrote:
>> This fixes MAL (arbitration lost) bug caused by illegal use of
>> RSTA (repeated START) after STOP condition generated after last byte
>> of reads. With this patch, it is possible to do an i2c_transfer() with
>> additional i2c_msg's following the I2C_M_RD messages.
>>
>> It still needs to be resolved if it is possible to fix this issue
>> by removing the STOP condition after reads in a robust way.
>>
>> Signed-off-by: Esben Haabendal 
>> ---
>>  drivers/i2c/busses/i2c-mpc.c |    9 +++--
>>  1 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
>> index 4af5c09..0199f9a 100644
>> --- a/drivers/i2c/busses/i2c-mpc.c
>> +++ b/drivers/i2c/busses/i2c-mpc.c
>> @@ -456,17 +456,22 @@ static int mpc_xfer(struct i2c_adapter *adap, struct
>> i2c_msg *msgs, int num)
>>        }
>>
>>        for (i = 0; ret >= 0 && i < num; i++) {
>> +               int restart = i;
>>                pmsg = &msgs[i];
>>                dev_dbg(i2c->dev,
>>                        "Doing %s %d bytes to 0x%02x - %d of %d messages\n",
>>                        pmsg->flags & I2C_M_RD ? "read" : "write",
>>                        pmsg->len, pmsg->addr, i + 1, num);
>> +               if (i > 0 && ((pmsg - 1)->flags & I2C_M_RD))
>> +                       restart = 0;
>>                if (pmsg->flags & I2C_M_RD)
>>                        ret =
>> -                           mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
>> i);
>> +                           mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
>> +                                    restart);
>>                else
>>                        ret =
>> -                           mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
>> i);
>> +                           mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
>> +                                     restart);
>>        }
>
> Hmmm, seems to be a rather convoluted code path.  Surely this could be
> handled in a clearer way.  The whole (pmsg - 1) bit raises my eyebrows
> (I'd rather see msgs[i-1]).  At the very least this deserves an
> comment describing what it is doing.  The following might be better
> for the next person who has to read this code:
>
> +      int restart = 0;
>       for (i = 0; ret >= 0 && i < num; i++) {
>               pmsg = &msgs[i];
>               dev_dbg(i2c->dev,
>                       "Doing %s %d bytes to 0x%02x - %d of %d messages\n",
>                       pmsg->flags & I2C_M_RD ? "read" : "write",
>                       pmsg->len, pmsg->addr, i + 1, num);
>               if (pmsg->flags & I2C_M_RD)
>                       ret =
> -                           mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> i);
> +                           mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> +                                    restart);
>               else
>                       ret =
> -                           mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> i);
> +                           mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len,
> +                                     restart);
> +               /* Only set the restart flag if this was not an
> I2C_M_RD transaction
> +                * because it causes an illegal use of
> +                * RSTA (repeated START) after STOP condition
> generated after last byte
> +                * of reads  */
> +               restart = (pmsg->flags & I2C_M_RD == 0);
>       }

BTW, since you're touching these lines anyway, please clean up the
whitespace usage.  Since you have to break the line anyway, it no
longer makes sense for the "ret = " to be on a separate line anymore.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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Re: [PATCH] sound/ppc: update annotations of serveral functions

2009-06-02 Thread Takashi Iwai
At Wed, 3 Jun 2009 15:35:19 +1000,
Stephen Rothwell wrote:
> 
> [I am not sure if this is the correct approach as I don't know if any of
> this actual hardware or drivers are really hot pluggable.]

I thought it can be bound/unbound dynamically via sysfs.

Anyway, the patch looks correct, so I applied it now.
There were still places with __initdata (and one forgotten __init), so
I fixed them as well.

Thanks!

Takashi


> Gets rid of these build warnings:
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x5c): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_new()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_new().
> If .snd_pmac_new is only used by .snd_pmac_probe then
> annotate .snd_pmac_new with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x10c): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_burgundy_init()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_burgundy_init().
> If .snd_pmac_burgundy_init is only used by .snd_pmac_probe then
> annotate .snd_pmac_burgundy_init with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x164): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_daca_init()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_daca_init().
> If .snd_pmac_daca_init is only used by .snd_pmac_probe then
> annotate .snd_pmac_daca_init with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x1dc): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_tumbler_init()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_tumbler_init().
> If .snd_pmac_tumbler_init is only used by .snd_pmac_probe then
> annotate .snd_pmac_tumbler_init with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x1ec): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_tumbler_post_init()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_tumbler_post_init().
> If .snd_pmac_tumbler_post_init is only used by .snd_pmac_probe then
> annotate .snd_pmac_tumbler_post_init with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x28c): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_awacs_init()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_awacs_init().
> If .snd_pmac_awacs_init is only used by .snd_pmac_probe then
> annotate .snd_pmac_awacs_init with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x2bc): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_pcm_new()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_pcm_new().
> If .snd_pmac_pcm_new is only used by .snd_pmac_probe then
> annotate .snd_pmac_pcm_new with a matching annotation.
> 
> WARNING: sound/ppc/snd-powermac.o(.devinit.text+0x2f8): Section mismatch in 
> reference from the function .snd_pmac_probe() to the function 
> .init.text:.snd_pmac_attach_beep()
> The function __devinit .snd_pmac_probe() references
> a function __init .snd_pmac_attach_beep().
> If .snd_pmac_attach_beep is only used by .snd_pmac_probe then
> annotate .snd_pmac_attach_beep with a matching annotation.
> 
> Signed-off-by: Stephen Rothwell 
> ---
>  sound/ppc/awacs.c|2 +-
>  sound/ppc/beep.c |2 +-
>  sound/ppc/burgundy.c |2 +-
>  sound/ppc/daca.c |2 +-
>  sound/ppc/keywest.c  |4 ++--
>  sound/ppc/pmac.c |8 
>  sound/ppc/tumbler.c  |4 ++--
>  7 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/sound/ppc/awacs.c b/sound/ppc/awacs.c
> index 80df9b1..0d2d62d 100644
> --- a/sound/ppc/awacs.c
> +++ b/sound/ppc/awacs.c
> @@ -872,7 +872,7 @@ static void snd_pmac_awacs_update_automute(struct 
> snd_pmac *chip, int do_notify)
>  /*
>   * initialize chip
>   */
> -int __init
> +int __devinit
>  snd_pmac_awacs_init(struct snd_pmac *chip)
>  {
>   int pm7500 = IS_PM7500;
> diff --git a/sound/ppc/beep.c b/sound/ppc/beep.c
> index 89f5c32..a9d3507 100644
> --- a/sound/ppc/beep.c
> +++ b/sound/ppc/beep.c
> @@ -215,7 +215,7 @@ static struct snd_kcontrol_new snd_pmac_beep_mixer = {
>  };
>  
>  /* Initialize beep stuff */
> -int __init snd_pmac_attach_beep(struct snd_pmac *chip)
> +int __devinit snd_pmac_attach_beep(struct snd_pmac *chip)
>  {
>   struct pmac_beep *beep;
>   struct input_dev *input_dev;
> diff --git a/sound/ppc/burgundy.c b/sound/ppc/burgundy.c
> index 45a7629..aba3814 100644
> --- a/sound/ppc/burgun

MPC8572 PCIe error recovery

2009-06-02 Thread Reifman, Boris
We are using the MPC8572 running SMP Linux 2.6.23 kernel. Having
problems reliably recovering from core_fault_in which is generated by
the PCIe 2 Controller (RC) on reception of UR/CA messages. The PCIe
Controller has error detection and interrupts turned on in PEX_ERR_XX
registers.  Also, AER capability is enabled via controller configuration
space. The ISR handler which performs recovery action uses the following
epilog: if the ISR is running on the same core (0 or 1) from which the
failed PCIe transaction was made, it increments NIP by 4 and exits.  If
the core is different, the ISR sends an IPI message to the other core
which in its turn does all chores and then recovers the execution in a
similar way, i.e., it bumps NIP by 4 and exits.  The code works well
when running on core 0; however, the moment it switches to core 1, it
always generates a kernel paging error:

 

[   77.169436] Unable to handle kernel paging request for data at
address 0x0080
[   77.176899] Faulting instruction address: 0xc0006d94
[   77.181850] Oops: Kernel access of bad area, sig: 11 [#1]

 

Anyone has any idea why Core 1 chokes on the code which Core 0 runs
flawlessly?  Is there a known problem with 2.6.23 kernel?  Should I be
concern with L1/L2 icache state?

 

Any pointers would be greatly appreciated!

 

Thanks in advance...

 

Boris Reifman | Principal Engineer P&T
breif...@ciena.com | 1185 Sanctuary Parkway, Suite 300 | Alpharetta, GA
30009 USA
Direct +1.678.867.3323 | Mobile +1.770.851.3440 | Fax +1.678.867.5101

 




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