Re: Move bootwrapper's strchr() and strncmp() from .h to string.S
On Tue, 28 Aug 2007, David Gibson wrote:
> Currently the bootwrapper has implementations of strchr() and
> strncmp(), but they're inlines in flatdevtree_env.h, rather than in
> string.S with all the rest of the string functions. This patch moves
^
Nice move ;-)
... replaces them by assembler versions?
> them to string.S.
>
> Signed-off-by: David Gibson <[EMAIL PROTECTED]>
> ---
>
> Paul, please apply to the for-2.6.24 branch.
>
> Index: working-2.6/arch/powerpc/boot/string.S
> ===
> --- working-2.6.orig/arch/powerpc/boot/string.S 2006-12-08
> 10:42:48.0 +1100
> +++ working-2.6/arch/powerpc/boot/string.S2007-08-28 14:48:52.0
> +1000
> @@ -49,6 +49,17 @@ strcat:
> bne 1b
> blr
>
> + .globl strchr
> +strchr:
> + addir3,r3,-1
> +1: lbzur0,1(r3)
> + cmpw0,r0,r4
> + beqlr
> + cmpwi 0,r0,0
> + bne 1b
> + li r3,0
> + blr
> +
> .globl strcmp
> strcmp:
> addir5,r3,-1
> @@ -61,6 +72,19 @@ strcmp:
> beq 1b
> blr
>
> + .globl strncmp
> +strncmp:
> + mtctr r5
> + addir5,r3,-1
> + addir4,r4,-1
> +1: lbzur3,1(r5)
> + cmpwi 1,r3,0
> + lbzur0,1(r4)
> + subf. r3,r0,r3
> + beqlr 1
> + bdnzt eq,1b
> + blr
> +
> .globl strlen
> strlen:
> addir4,r3,-1
> Index: working-2.6/arch/powerpc/boot/flatdevtree_env.h
> ===
> --- working-2.6.orig/arch/powerpc/boot/flatdevtree_env.h 2007-08-15
> 16:56:30.0 +1000
> +++ working-2.6/arch/powerpc/boot/flatdevtree_env.h 2007-08-28
> 14:38:29.0 +1000
> @@ -24,24 +24,4 @@
> #define be64_to_cpu(x) (x)
> #define cpu_to_be64(x) (x)
>
> -static inline int strncmp(const char *cs, const char *ct, size_t count)
> -{
> - signed char __res = 0;
> -
> - while (count) {
> - if ((__res = *cs - *ct++) != 0 || !*cs++)
> - break;
> - count--;
> - }
> - return __res;
> -}
> -
> -static inline char *strchr(const char *s, int c)
> -{
> - for (; *s != (char)c; ++s)
> - if (*s == '\0')
> - return NULL;
> - return (char *)s;
> -}
> -
> #endif /* _PPC_BOOT_FLATDEVTREE_ENV_H_ */
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[PATCH 1/5] Add an optional device_node pointer to the irq_host
The majority of irq_host implementations (3 out of 4) are associated
with a device_node, and need to stash it somewhere. Rather than having
it somewhere different for each host, add an optional device_node pointer
to the irq_host structure.
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/irq.c | 10 ++
arch/powerpc/platforms/52xx/mpc52xx_pic.c |5 ++---
arch/powerpc/platforms/82xx/mpc82xx_ads.c |7 ++-
arch/powerpc/platforms/cell/axon_msi.c| 14 +-
arch/powerpc/platforms/cell/interrupt.c |2 +-
arch/powerpc/platforms/cell/spider-pic.c | 18 +++---
arch/powerpc/platforms/celleb/interrupt.c |2 +-
arch/powerpc/platforms/iseries/irq.c |3 ++-
arch/powerpc/platforms/powermac/pic.c |2 +-
arch/powerpc/platforms/ps3/interrupt.c|2 +-
arch/powerpc/platforms/pseries/xics.c |2 +-
arch/powerpc/sysdev/commproc.c|8 +++-
arch/powerpc/sysdev/cpm2_pic.c|7 +++
arch/powerpc/sysdev/i8259.c |8 +++-
arch/powerpc/sysdev/ipic.c|7 ++-
arch/powerpc/sysdev/ipic.h|3 ---
arch/powerpc/sysdev/mpc8xx_pic.c | 19 ++-
arch/powerpc/sysdev/mpic.c| 11 ---
arch/powerpc/sysdev/mpic_msi.c|7 ---
arch/powerpc/sysdev/mv64x60_pic.c |8 +++-
arch/powerpc/sysdev/qe_lib/qe_ic.c|7 ++-
arch/powerpc/sysdev/qe_lib/qe_ic.h|3 ---
arch/powerpc/sysdev/tsi108_pci.c |8
arch/powerpc/sysdev/uic.c | 11 +++
include/asm-powerpc/irq.h |8 ++--
include/asm-powerpc/mpic.h|3 ---
26 files changed, 76 insertions(+), 109 deletions(-)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index dfad0e4..79b4512 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -418,10 +418,11 @@ irq_hw_number_t virq_to_hw(unsigned int virq)
}
EXPORT_SYMBOL_GPL(virq_to_hw);
-__init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
- unsigned int revmap_arg,
- struct irq_host_ops *ops,
- irq_hw_number_t inval_irq)
+__init_refok struct irq_host *irq_alloc_host(struct device_node *of_node,
+ unsigned int revmap_type,
+ unsigned int revmap_arg,
+ struct irq_host_ops *ops,
+ irq_hw_number_t inval_irq)
{
struct irq_host *host;
unsigned int size = sizeof(struct irq_host);
@@ -446,6 +447,7 @@ __init_refok struct irq_host *irq_alloc_host(unsigned int
revmap_type,
host->revmap_type = revmap_type;
host->inval_irq = inval_irq;
host->ops = ops;
+ host->of_node = of_node;
spin_lock_irqsave(&irq_big_lock, flags);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 8c464c5..1d793e4 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -244,7 +244,7 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node)
{
pr_debug("%s: node=%p\n", __func__, node);
- return mpc52xx_irqhost->host_data == node;
+ return h->of_node == node;
}
static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
@@ -419,14 +419,13 @@ void __init mpc52xx_init_irq(void)
* hw irq information provided by the ofw to linux virq
*/
- mpc52xx_irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR,
+ mpc52xx_irqhost = irq_alloc_host(picnode, IRQ_HOST_MAP_LINEAR,
MPC52xx_IRQ_HIGHTESTHWIRQ,
&mpc52xx_irqhost_ops, -1);
if (!mpc52xx_irqhost)
panic(__FILE__ ": Cannot allocate the IRQ host\n");
- mpc52xx_irqhost->host_data = picnode;
printk(KERN_INFO "MPC52xx PIC is up and running!\n");
}
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
index c0a0c56..91ddbd2 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
@@ -61,7 +61,6 @@ static struct {
static unsigned long pci_int_base;
static struct irq_host *pci_pic_host;
-static struct device_node *pci_pic_node;
#endif
static void __init mpc82xx_ads_pic_init(void)
@@ -401,7 +400,7 @@ m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
{
- return node == pci_pic_node;
+ return h->of_node == node;
}
static
[PATCH 2/5] Invert null match behaviour for irq_hosts
Currently if you don't specify a match callback for your irq_host it's
assumed you match everything. This is a kind of opt-out approach, and
turns out to be the exception rather than the rule.
So change the semantics to be opt-in, ie. you don't match anything unless
you provide a match callback. This in itself isn't very useful, but will
allow us to provide a default match implementation in a subsequent patch.
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/irq.c |2 +-
arch/powerpc/platforms/celleb/interrupt.c |7 +++
arch/powerpc/platforms/iseries/irq.c |7 +++
arch/powerpc/platforms/ps3/interrupt.c|7 +++
4 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 79b4512..30fb8e2 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -523,7 +523,7 @@ struct irq_host *irq_find_host(struct device_node *node)
*/
spin_lock_irqsave(&irq_big_lock, flags);
list_for_each_entry(h, &irq_hosts, link)
- if (h->ops->match == NULL || h->ops->match(h, node)) {
+ if (h->ops->match != NULL && h->ops->match(h, node)) {
found = h;
break;
}
diff --git a/arch/powerpc/platforms/celleb/interrupt.c
b/arch/powerpc/platforms/celleb/interrupt.c
index 4ecdf06..c7c68ca 100644
--- a/arch/powerpc/platforms/celleb/interrupt.c
+++ b/arch/powerpc/platforms/celleb/interrupt.c
@@ -175,11 +175,18 @@ static int beatic_pic_host_xlate(struct irq_host *h,
struct device_node *ct,
return 0;
}
+static int beatic_pic_host_match(struct irq_host *h, struct device_node *np)
+{
+ /* Match all */
+ return 1;
+}
+
static struct irq_host_ops beatic_pic_host_ops = {
.map = beatic_pic_host_map,
.remap = beatic_pic_host_remap,
.unmap = beatic_pic_host_unmap,
.xlate = beatic_pic_host_xlate,
+ .match = beatic_pic_host_match,
};
/*
diff --git a/arch/powerpc/platforms/iseries/irq.c
b/arch/powerpc/platforms/iseries/irq.c
index 3666746..701d929 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -346,8 +346,15 @@ static int iseries_irq_host_map(struct irq_host *h,
unsigned int virq,
return 0;
}
+static int iseries_irq_host_match(struct irq_host *h, struct device_node *np)
+{
+ /* Match all */
+ return 1;
+}
+
static struct irq_host_ops iseries_irq_host_ops = {
.map = iseries_irq_host_map,
+ .match = iseries_irq_host_match,
};
/*
diff --git a/arch/powerpc/platforms/ps3/interrupt.c
b/arch/powerpc/platforms/ps3/interrupt.c
index 30b9f4c..3a6db04 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -673,9 +673,16 @@ static int ps3_host_map(struct irq_host *h, unsigned int
virq,
return 0;
}
+static int ps3_host_match(struct irq_host *h, struct device_node *np)
+{
+ /* Match all */
+ return 1;
+}
+
static struct irq_host_ops ps3_host_ops = {
.map = ps3_host_map,
.unmap = ps3_host_unmap,
+ .match = ps3_host_match,
};
void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq)
--
1.5.1.3.g7a33b
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[PATCH 3/5] Provide a default irq_host match, which matches on an exact of_node
The most common match semantic is an exact match based on the device node.
So provide a default implementation that does this, and hook it up if no
match routine is specified.
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/irq.c | 10 +-
arch/powerpc/platforms/52xx/mpc52xx_pic.c |7 ---
arch/powerpc/platforms/82xx/mpc82xx_ads.c |6 --
arch/powerpc/platforms/cell/axon_msi.c|6 --
arch/powerpc/platforms/cell/spider-pic.c |6 --
arch/powerpc/sysdev/commproc.c|6 --
arch/powerpc/sysdev/cpm2_pic.c|6 --
arch/powerpc/sysdev/mpc8xx_pic.c |6 --
arch/powerpc/sysdev/mv64x60_pic.c |6 --
arch/powerpc/sysdev/tsi108_pci.c |6 --
arch/powerpc/sysdev/uic.c |6 --
11 files changed, 9 insertions(+), 62 deletions(-)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 30fb8e2..d5c7e4c 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -418,6 +418,11 @@ irq_hw_number_t virq_to_hw(unsigned int virq)
}
EXPORT_SYMBOL_GPL(virq_to_hw);
+static int default_irq_host_match(struct irq_host *h, struct device_node *np)
+{
+ return h->of_node != NULL && h->of_node == np;
+}
+
__init_refok struct irq_host *irq_alloc_host(struct device_node *of_node,
unsigned int revmap_type,
unsigned int revmap_arg,
@@ -449,6 +454,9 @@ __init_refok struct irq_host *irq_alloc_host(struct
device_node *of_node,
host->ops = ops;
host->of_node = of_node;
+ if (host->ops->match == NULL)
+ host->ops->match = default_irq_host_match;
+
spin_lock_irqsave(&irq_big_lock, flags);
/* If it's a legacy controller, check for duplicates and
@@ -523,7 +531,7 @@ struct irq_host *irq_find_host(struct device_node *node)
*/
spin_lock_irqsave(&irq_big_lock, flags);
list_for_each_entry(h, &irq_hosts, link)
- if (h->ops->match != NULL && h->ops->match(h, node)) {
+ if (h->ops->match(h, node)) {
found = h;
break;
}
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 1d793e4..0f4ca8a 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -241,12 +241,6 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
* irq_host
*/
-static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node)
-{
- pr_debug("%s: node=%p\n", __func__, node);
- return h->of_node == node;
-}
-
static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
u32 * intspec, unsigned int intsize,
irq_hw_number_t * out_hwirq,
@@ -367,7 +361,6 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned
int virq,
}
static struct irq_host_ops mpc52xx_irqhost_ops = {
- .match = mpc52xx_irqhost_match,
.xlate = mpc52xx_irqhost_xlate,
.map = mpc52xx_irqhost_map,
};
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
index 91ddbd2..4008795 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
@@ -398,11 +398,6 @@ m82xx_pci_irq_demux(unsigned int irq, struct irq_desc
*desc)
}
}
-static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
-{
- return h->of_node == node;
-}
-
static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
irq_hw_number_t hw)
{
@@ -418,7 +413,6 @@ static void pci_host_unmap(struct irq_host *h, unsigned int
virq)
}
static struct irq_host_ops pci_pic_host_ops = {
- .match = pci_pic_host_match,
.map = pci_pic_host_map,
.unmap = pci_host_unmap,
};
diff --git a/arch/powerpc/platforms/cell/axon_msi.c
b/arch/powerpc/platforms/cell/axon_msi.c
index bdd97bb..74407af 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -294,13 +294,7 @@ static int msic_host_map(struct irq_host *h, unsigned int
virq,
return 0;
}
-static int msic_host_match(struct irq_host *host, struct device_node *dn)
-{
- return host->of_node == dn;
-}
-
static struct irq_host_ops msic_host_ops = {
- .match = msic_host_match,
.map= msic_host_map,
};
diff --git a/arch/powerpc/platforms/cell/spider-pic.c
b/arch/powerpc/platforms/cell/spider-pic.c
index 4309c2c..3f4b4ae 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -175,11 +175,6 @@ static struct irq_chip spider_pic = {
.set_type = spider_set_irq_type,
};
-static int spider_host_match(struct irq_host *h, struct de
[PATCH 4/5] Initialise hwirq for legacy irqs
Although no one uses the hwirq value for legacy irqs at the moment, we
should really setup the correct value in the irq_map.
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/irq.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index d5c7e4c..1339f32 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -487,7 +487,7 @@ __init_refok struct irq_host *irq_alloc_host(struct
device_node *of_node,
host->inval_irq = 0;
/* setup us as the host for all legacy interrupts */
for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
- irq_map[i].hwirq = 0;
+ irq_map[i].hwirq = i;
smp_wmb();
irq_map[i].host = host;
smp_wmb();
--
1.5.1.3.g7a33b
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Re: [PATCH 1/5] Add an optional device_node pointer to the irq_host
On Tue, 2007-08-28 at 18:47 +1000, Michael Ellerman wrote: > The majority of irq_host implementations (3 out of 4) are associated > with a device_node, and need to stash it somewhere. Rather than having > it somewhere different for each host, add an optional device_node pointer > to the irq_host structure. > > Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]> This series is basically unchanged since I last sent it, but applies cleanly now onto the powerpc-for-2.6.24 branch. cheers -- Michael Ellerman OzLabs, IBM Australia Development Lab wwweb: http://michael.ellerman.id.au phone: +61 2 6212 1183 (tie line 70 21183) We do not inherit the earth from our ancestors, we borrow it from our children. - S.M.A.R.T Person signature.asc Description: This is a digitally signed message part ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 5/5] Export virq mapping via debugfs
This patch adds a debugfs file "powerpc/virq_mapping", which shows the virtual
to real mapping of irq numbers. Enable it with CONFIG_VIRQ_DEBUG.
Signed-off-by: Zhang Wei <[EMAIL PROTECTED]>
Signed-off-by: Chen Gong <[EMAIL PROTECTED]>
Signed-off-by: Michael Ellerman <[EMAIL PROTECTED]>
---
arch/powerpc/Kconfig.debug | 10 +++
arch/powerpc/kernel/irq.c | 63
2 files changed, 73 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 22acece..c38bc22 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -124,6 +124,16 @@ config IRQSTACKS
for handling hard and soft interrupts. This can help avoid
overflowing the process kernel stacks.
+config VIRQ_DEBUG
+ bool "Expose hardware/virtual IRQ mapping via debugfs"
+ depends on DEBUG_FS && PPC_MERGE
+ help
+ This option will show the mapping relationship between hardware irq
+ numbers and virtual irq numbers. The mapping is exposed via debugfs
+ in the file powerpc/virq_mapping.
+
+ If you don't know what this means you don't need it.
+
config BDI_SWITCH
bool "Include BDI-2000 user context switcher"
depends on DEBUG_KERNEL && PPC32
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 1339f32..0e47c8c 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -52,6 +52,7 @@
#include
#include
#include
+#include
#include
#include
@@ -1006,6 +1007,68 @@ static int irq_late_init(void)
}
arch_initcall(irq_late_init);
+#ifdef CONFIG_VIRQ_DEBUG
+static int virq_debug_show(struct seq_file *m, void *private)
+{
+ unsigned long flags;
+ irq_desc_t *desc;
+ const char *p;
+ char none[] = "none";
+ int i;
+
+ seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq",
+ "chip name", "host name");
+
+ for (i = 1; i < NR_IRQS; i++) {
+ desc = get_irq_desc(i);
+ spin_lock_irqsave(&desc->lock, flags);
+
+ if (desc->action && desc->action->handler) {
+ seq_printf(m, "%5d ", i);
+ seq_printf(m, "0x%05lx ", virq_to_hw(i));
+
+ if (desc->chip && desc->chip->typename)
+ p = desc->chip->typename;
+ else
+ p = none;
+ seq_printf(m, "%-15s ", p);
+
+ if (irq_map[i].host && irq_map[i].host->of_node)
+ p = irq_map[i].host->of_node->full_name;
+ else
+ p = none;
+ seq_printf(m, "%s\n", p);
+ }
+
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+
+ return 0;
+}
+
+static int virq_debug_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, virq_debug_show, inode->i_private);
+}
+
+static const struct file_operations virq_debug_fops = {
+ .open = virq_debug_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static int __init irq_debugfs_init(void)
+{
+ if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
+NULL, &virq_debug_fops))
+ return -ENOMEM;
+
+ return 0;
+}
+__initcall(irq_debugfs_init);
+#endif /* CONFIG_VIRQ_DEBUG */
+
#endif /* CONFIG_PPC_MERGE */
#ifdef CONFIG_PPC64
--
1.5.1.3.g7a33b
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Re: RFC: issues concerning the next NAPI interface
David Miller wrote:
> From: James Chapman <[EMAIL PROTECTED]>
> Date: Mon, 27 Aug 2007 22:41:43 +0100
>
>> I don't recall saying anything in previous posts about this. Are you
>> confusing my posts with Jan-Bernd's?
>
> Yes, my bad.
>
>> Jan-Bernd has been talking about using hrtimers to _reschedule_
>> NAPI. My posts are suggesting an alternative mechanism that keeps
>> NAPI active (with interrupts disabled) for a jiffy or two after it
>> would otherwise have gone idle in order to avoid too many interrupts
>> when the packet rate is such that NAPI thrashes between poll-on and
>> poll-off.
>
> So in this scheme what runs ->poll() to process incoming packets?
> The hrtimer?
No, the regular NAPI networking core calls ->poll() as usual; no timers
are involved. This scheme simply delays the napi_complete() from the
driver so the device stays in the poll list longer. It means that its
->poll() will be called when there is no work to do for 1-2 jiffies,
hence the optimization at the top of ->poll() to efficiently handle that
case. The device's ->poll() is called by the NAPI core until it has
continuously done no work for 1-2 jiffies, at which point it finally
does the netif_rx_complete() and re-enables its interrupts.
If people feel that holding the device in the poll list for 1-2 jiffies
is too long (because there are too many wasted polls), a counter could
be used to to delay the netif_rx_complete() by N polls instead. N would
be a value depending on CPU speed. I use the jiffy sampling method
because it results in some natural randomization of the actual delay
depending on when the jiffy value was sampled in relation to the jiffy tick.
Here is the tg3 patch again that illustrates the idea. The patch changes
only the ->poll() routine; note how the netif_rx_complete() call is delayed.
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 710dccc..59e151b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -3473,6 +3473,24 @@ static int tg3_poll(struct napi_struct *napi,
struct tg3_hw_status *sblk = tp->hw_status;
int work_done = 0;
+/* fastpath having no work while we're holding ourself in
+ * polled mode
+ */
+if ((tp->exit_poll_time) && (!tg3_has_work(tp))) {
+if (time_after(jiffies, tp->exit_poll_time)) {
+tp->exit_poll_time = 0;
+/* tell net stack and NIC we're done */
+netif_rx_complete(netdev, napi);
+tg3_restart_ints(tp);
+}
+return 0;
+}
+
+/* if we get here, there might be work to do so disable the
+ * poll hold fastpath above
+ */
+tp->exit_poll_time = 0;
+
/* handle link change and other phy events */
if (!(tp->tg3_flags &
(TG3_FLAG_USE_LINKCHG_REG |
@@ -3511,11 +3529,11 @@ static int tg3_poll(struct napi_struct *napi,
} else
sblk->status &= ~SD_STATUS_UPDATED;
-/* if no more work, tell net stack and NIC we're done */
-if (!tg3_has_work(tp)) {
-netif_rx_complete(netdev, napi);
-tg3_restart_ints(tp);
-}
+/* if no more work, set the time in jiffies when we should
+ * exit polled mode
+ */
+if (!tg3_has_work(tp))
+tp->exit_poll_time = jiffies + 2;
return work_done;
}
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index a6a23bb..a0d24d3 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2163,6 +2163,7 @@ struct tg3 {
u32last_tag;
u32msg_enable;
+unsigned longexit_poll_time;
/* begin "tx thread" cacheline section */
void(*write32_tx_mbox) (struct tg3 *, u32,
--
James Chapman
Katalix Systems Ltd
http://www.katalix.com
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Re: RFC: issues concerning the next NAPI interface
On Monday 27 August 2007 22:37, David Miller wrote: > From: Jan-Bernd Themann <[EMAIL PROTECTED]> > Date: Mon, 27 Aug 2007 11:47:01 +0200 > > > So the question is simply: Do we want drivers that need (benefit > > from) a timer based polling support to implement their own timers > > each, or should there be a generic support? > > I'm trying to figure out how an hrtimer implementation would > even work. > > Would you start the timer from the chip interrupt handler? If so, > that's taking two steps backwards as you've already taken all of the > overhead of running the interrupt handler. I'm also still trying to understand how hrtimer work exactly. The implementation of hrtimers for P6 has not been finished yet, so I can't do experiments with hrtimers and eHEA now. I will try the following scheme (once we get hrtimers): Each device (queue) has a hrtimer. Schedule the timer in the poll function instead of reactivating IRQs when a high load situation has been detected and all packets have been emptied from the receive queue. The timer function could then just call netif_rx_schedule to register the rx_queue for NAPI again. The advantages of this scheme (if it works as I understood it) would be: - we don't have to modify NAPI - benefit from fairness amoung rx_queues / network devices - The poll function can decide how long to stick to the timer based polling mode, and when to switch back to it's HW IRQs. - driver can determine the time to wait based on the receive queue length and speed Regards, Jan-Bernd ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: RFC: issues concerning the next NAPI interface
Hi On Monday 27 August 2007 23:02, David Miller wrote: > But there are huger fish to fry for you I think. Talk to your > platform maintainers and ask for an interface for obtaining > a flat static distribution of interrupts to cpus in order to > support multiqueue NAPI better. > > In your previous postings you made arguments saying that the > automatic placement of interrupts to cpus made everything > bunch of to a single cpu and you wanted to propagate the > NAPI work to other cpu's software interrupts from there. > > That logic is bogus, because it merely proves that the hardware > interrupt distribution is broken. If it's a bad cpu to run > software interrupts on, it's also a bad cpu to run hardware > interrupts on. > As already mentioned some mails were mixed up here. To clarify the interrupt issue that has nothing to do with the reduction of interrupts: - Interrupts are distributed the round robin way on IBM POWER6 processors - Interrupt distribution can be modified by user/daemons (smp_affinity, pinning) - NAPI is scheduled on CPU where interrupt is catched - NAPI polls on that CPU as long as poll has packets to process (default) (David please correct if there is a misunderstanding here) Problem for multi queue driver with interrupt distribution scheme set to round robin for this simple example: Assuming we have 2 SLOW CPUs. CPU_1 is under heavy load (applications). CPU_2 is not under heavy load. Now we receive a lot of packets (high load situation). Receive queue 1 (RQ1) is scheduled on CPU_1. NAPI-Poll does not manage to empty RQ1 ever, so it stays on CPU_1. The second receive queue (RQ2) is scheduled on CPU_2. As that CPU is not under heavy load, RQ2 can be emptied, and the next IRQ for RQ2 will go to CPU_1. Then both RQs are on CPU_1 and will stay there if no IRQ is forced at some time as both RQs are never emptied completely. This is a simplified example to demonstrate the problem. The interrupt scheme is not bogus, it is just an effect you see if you don't use pinning. The user can avoid this problem by pinning the interrupts to CPUs. As pointed out by David, it will be too expensive to schedule NAPI poll on a different CPU than the one that gets the IRQ. So I guess one solution is to "force" an HW interrupt when two many RQs are processed on the same CPU (when no IRQ pinning is used). This is something the driver has to handle. Regards, Jan-Bernd ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: RFC: issues concerning the next NAPI interface
On Tuesday 28 August 2007 11:22, James Chapman wrote: > > So in this scheme what runs ->poll() to process incoming packets? > > The hrtimer? > > No, the regular NAPI networking core calls ->poll() as usual; no timers > are involved. This scheme simply delays the napi_complete() from the > driver so the device stays in the poll list longer. It means that its > ->poll() will be called when there is no work to do for 1-2 jiffies, > hence the optimization at the top of ->poll() to efficiently handle that > case. The device's ->poll() is called by the NAPI core until it has > continuously done no work for 1-2 jiffies, at which point it finally > does the netif_rx_complete() and re-enables its interrupts. > I'm not sure if I understand your approach correctly. This approach may reduce the number of interrupts, but it does so by blocking the CPU for up to 1 jiffy (that can be quite some time on some platforms). So no other application / tasklet / softIRQ type can do anything in between. The CPU utilization does not drop at all, and I thought that is one reason why we try to reduce the number of interrupts. > If people feel that holding the device in the poll list for 1-2 jiffies > is too long (because there are too many wasted polls), a counter could > be used to to delay the netif_rx_complete() by N polls instead. N would > be a value depending on CPU speed. I use the jiffy sampling method > because it results in some natural randomization of the actual delay > depending on when the jiffy value was sampled in relation to the jiffy tick. > Waiting for N polls seems to make no sense if there are no further network adapters in that machine. It would take no time to call poll N times in a row when no new packets arrive. There is no real delay as the net_rx_action function will do nothing else between the poll calls. Please correct me if I'm wrong. Regards, Jan-Bernd ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] PS3: fix the bug the major version part is not compared
Fix the bug that the major version part of the firmware
is not compared.
Signed-off-by: Masakazu Mokuno <[EMAIL PROTECTED]>
CC: Geoff Levand <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/ps3/setup.c |2 +-
include/asm-powerpc/ps3.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -54,7 +54,7 @@ void ps3_get_firmware_version(union ps3_
}
EXPORT_SYMBOL_GPL(ps3_get_firmware_version);
-int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev)
+s64 ps3_compare_firmware_version(u16 major, u16 minor, u16 rev)
{
union ps3_firmware_version x;
--- a/include/asm-powerpc/ps3.h
+++ b/include/asm-powerpc/ps3.h
@@ -36,7 +36,7 @@ union ps3_firmware_version {
};
void ps3_get_firmware_version(union ps3_firmware_version *v);
-int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev);
+s64 ps3_compare_firmware_version(u16 major, u16 minor, u16 rev);
/* 'Other OS' area */
--
Masakazu MOKUNO
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Re: RFC: issues concerning the next NAPI interface
On Tue, Aug 28, 2007 at 01:48:20PM +0200, Jan-Bernd Themann ([EMAIL PROTECTED]) wrote: > I'm not sure if I understand your approach correctly. > This approach may reduce the number of interrupts, but it does so > by blocking the CPU for up to 1 jiffy (that can be quite some time > on some platforms). So no other application / tasklet / softIRQ type > can do anything in between. The CPU utilization does not drop at all, > and I thought that is one reason why we try to reduce the number of > interrupts. Only NICs interrupts are suposed to be stopped, system will continue to work as usual, since all others are alive. Having hrtimer to reshcedule NIC procesing can work only if number of timer's interrupts are much less than NICs and if rate of the timer's starts/changes (presumbly in NICs interrupt) is small too, otherwise having too many NIC interrupts will not gain anything (actually it is what is supposed to be dropped noticebly). -- Evgeniy Polyakov ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 3/4] PowerPC 440EPx: Sequoia bootwrapper
David Gibson wrote: > On Wed, Aug 15, 2007 at 04:22:58PM +0400, Valentine Barshak wrote: >> David Gibson wrote: >>> On Tue, Aug 14, 2007 at 10:53:55PM +0400, Valentine Barshak wrote: Bootwrapper code for AMCC 440EPx Sequoia board. The DDR2 Denali controller support has been moved to arch/powerpc/boot/4xx.c The code also uses 440EP clocking fixups initially provided for 440EP Bamboo. Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]> >>> [snip] diff -ruN linux-2.6.orig/arch/powerpc/boot/cuboot-sequoia.c linux-2.6/arch/powerpc/boot/cuboot-sequoia.c --- linux-2.6.orig/arch/powerpc/boot/cuboot-sequoia.c 1970-01-01 03:00:00.0 +0300 +++ linux-2.6/arch/powerpc/boot/cuboot-sequoia.c 2007-08-14 17:25:37.0 +0400 @@ -0,0 +1,31 @@ +/* + * Old U-boot compatibility for Sequoia + * + * Based on Ebony code by David Gibson <[EMAIL PROTECTED]> + * + * Copyright 2007 David Gibson, IBM Corporatio. + * Based on cuboot-83xx.c, which is: + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "44x.h" +#include "cuboot.h" + +#define TARGET_4xx +#define TARGET_44x >>> Surely you need to be more specific than that to select the correct >>> bd_t structure? >> Both TARGET_4xx and TARGET_44x should be selected for 44x. Otherwise I >> get wrong bd_t structure (wrong offsets to the eth0/eth1 MAC addresses). >> In the older arch/ppc code it used to be CONFIG_4xx and it was selected >> for CONFIG_40x and CONFIG_44x as well. > > Yes, I'm not objecting to those TARGET macros, but I'd be very > surprised if you don't need more to really get the correct bd_t > structure. Sorry, I don't quite follow. As far as I can tell the bd_t structure looks OK. Could you be more specific, please? What exactly do you think I need to get the correct bd_t? Thanks, Valentine. > > [snip] diff -ruN linux-2.6.orig/arch/powerpc/boot/sequoia.c linux-2.6/arch/powerpc/boot/sequoia.c --- linux-2.6.orig/arch/powerpc/boot/sequoia.c 1970-01-01 03:00:00.0 +0300 +++ linux-2.6/arch/powerpc/boot/sequoia.c 2007-08-14 20:52:10.0 +0400 >>> Unless another bootloader is expected to come along for Sequoia, >>> there's no reason to separate sequoia.c from cuboot-sequoia.c >> The previous version of Sequoia series had treeboot-sequoia.c, but I've >> removed it since only u-boot is used now. >> I'm not sure if there are any other bootloaders expected, but is it OK >> if I leave 2 separate files just in case? :) > > Not unless you have a particular reason to expect another bootloader > will come along, which doesn't seem that likely to me. Or rather the > only likely future bootloader I'd see is newer versions of u-boot > which are device tree aware and handled separately anyway. > ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] PS3: fix the bug the major version part is not compared
Masakazu Mokuno <[EMAIL PROTECTED]> writes:
> Fix the bug that the major version part of the firmware
> is not compared.
>
> Signed-off-by: Masakazu Mokuno <[EMAIL PROTECTED]>
> CC: Geoff Levand <[EMAIL PROTECTED]>
> ---
> arch/powerpc/platforms/ps3/setup.c |2 +-
> include/asm-powerpc/ps3.h |2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> --- a/arch/powerpc/platforms/ps3/setup.c
> +++ b/arch/powerpc/platforms/ps3/setup.c
> @@ -54,7 +54,7 @@ void ps3_get_firmware_version(union ps3_
> }
> EXPORT_SYMBOL_GPL(ps3_get_firmware_version);
>
> -int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev)
> +s64 ps3_compare_firmware_version(u16 major, u16 minor, u16 rev)
> {
> union ps3_firmware_version x;
>
Better yet: normalize the return value.
return (ps3_firmware_version.raw > x.raw) -
(ps3_firmware_version.raw < x.raw);
Andreas.
--
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Re: [Cbe-oss-dev] [patch 1/5] spu_manage: use newer physical-id
On Thu, 23 Aug 2007 18:12:19 +0200
Arnd Bergmann <[EMAIL PROTECTED]> wrote:
> On Thursday 23 August 2007, [EMAIL PROTECTED] wrote:
> > Please check "unit-id" if "physical-id" doesn't exist. Because Celleb
> > uses "unit-id" to provide spe_id.
Sorry for the late answer, wasn't on cc
and had to receive all mails of the last 6 month once again :-(
Can you check if the patch below is working with celleb device tree ?
--
Subject: spu_manage: fix spu_unit_number for celleb device tree
From: Christian Krafft <[EMAIL PROTECTED]>
New device trees provide "physical-id".
Celleb device tree provide the "unit-id".
Legacy device tree used the reg property for the physical id of an spe.
This patch fixes find_spu_unit_number to look for the spu id in that order.
The length is checked to avoid misinterpretation in case the attributes
unit-id or reg do not contain the id.
Signed-off-by: Christian Krafft <[EMAIL PROTECTED]>
Index: linux/arch/powerpc/platforms/cell/spu_manage.c
===
--- linux.orig/arch/powerpc/platforms/cell/spu_manage.c
+++ linux/arch/powerpc/platforms/cell/spu_manage.c
@@ -48,10 +48,18 @@ static u64 __init find_spu_unit_number(s
{
const unsigned int *prop;
int proplen;
+
+ /* new device trees should provide the physical-id attribute */
prop = of_get_property(spe, "physical-id", &proplen);
if (proplen == 4)
return (u64)*prop;
+ /* celleb device tree provides the unit-id */
+ prop = of_get_property(spe, "unit-id", &proplen);
+ if (proplen == 4)
+ return (u64)*prop;
+
+ /* legacy device trees provide the id in the reg attribute */
prop = of_get_property(spe, "reg", &proplen);
if (proplen == 4)
return (u64)*prop;
--
Mit freundlichen Grüssen,
kind regards,
Christian Krafft
IBM Systems & Technology Group,
Linux Kernel Development
IT Specialist
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Re: RFC: issues concerning the next NAPI interface
Jan-Bernd Themann wrote: > On Tuesday 28 August 2007 11:22, James Chapman wrote: >>> So in this scheme what runs ->poll() to process incoming packets? >>> The hrtimer? >> No, the regular NAPI networking core calls ->poll() as usual; no timers >> are involved. This scheme simply delays the napi_complete() from the >> driver so the device stays in the poll list longer. It means that its >> ->poll() will be called when there is no work to do for 1-2 jiffies, >> hence the optimization at the top of ->poll() to efficiently handle that >> case. The device's ->poll() is called by the NAPI core until it has >> continuously done no work for 1-2 jiffies, at which point it finally >> does the netif_rx_complete() and re-enables its interrupts. >> > I'm not sure if I understand your approach correctly. > This approach may reduce the number of interrupts, but it does so > by blocking the CPU for up to 1 jiffy (that can be quite some time > on some platforms). So no other application / tasklet / softIRQ type > can do anything in between. I think I've misread the reworked NAPI net_rx_action code. I thought that it ran each device ->poll() just once, rescheduling the NET_RX softirq again if a device stayed in polled mode. I can see now that it loops while one or more devices stays in the poll list for up to a jiffy, just like it always has. So by keeping the device in the poll list and not consuming quota, net_rx_action() spins until the next jiffy tick unless another device consumes quota, like you say. I can only assume that the encouraging results that I get with this scheme are specific to my test setups (measuring packet forwarding rates). I agree that it isn't desirable to tie up the CPU for up to a jiffy in net_rx_action() in order to do this. I need to go away and rework my ideas. Perhaps it is possible to get the behavior I'm looking for by somehow special-casing the zero return from ->poll() in net_rx_action(), but I'm not sure. Thanks for asking questions. -- James Chapman Katalix Systems Ltd http://www.katalix.com Catalysts for your Embedded Linux software development ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 3/4] Use strcasecmp() rather than strncasecmp() when determining device node compatibility.
On Mon, 20 Aug 2007 11:36:59 -0500 Scott Wood <[EMAIL PROTECTED]> wrote: > The current code assumes "foo-bar" must always be compatible with a node > compatible with "foo", which breaks device trees where this is not so. > > The "case" part is also wrong according to Open Firmware, but it's more > likely to have drivers and/or device trees depending on it, and thus > needs to be handled more carefully. After wasting about an hour with git bisect, I finally realized that this patch "caught" an error in the walnut patches I'm working on (by making it not boot). So thanks! josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: what is ~1MB of memory allocated at fffea000-fffff000 on ppc64?
Paul Mackerras wrote: > Chris Friesen writes: >>For some background, we're running an emulator that uses a null pointer >>value of 0x and we want any accesses to that address to trap. > Can you fix this in userspace instead by moving the stack down below > 0x and then doing munmap(0x, 0x1000) ? It sounds like it would work. I'm not entirely clear on how to move the starting point of the stack though--could you elaborate or point me to a reference? Chris ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 0/4] PowerPC 440EPx: Initial Sequoia support take 3
The following patches add initial PowerPC 440EPx Sequoia board support. The code is based mainly on the Bamboo board support by Josh Boyer. These patches have been modified according the comments for the previous 440EPx Sequoia patch series. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/4] PowerPC 440EPx: Sequoia bootwrapper
Bootwrapper code for AMCC PPC440EPx Sequoia.
Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
---
arch/powerpc/boot/4xx.c| 108 +
arch/powerpc/boot/4xx.h|1
arch/powerpc/boot/Makefile |4 +
arch/powerpc/boot/cuboot-sequoia.c | 67 ++
4 files changed, 179 insertions(+), 1 deletion(-)
diff -ruN linux-2.6.orig/arch/powerpc/boot/4xx.c
linux-2.6/arch/powerpc/boot/4xx.c
--- linux-2.6.orig/arch/powerpc/boot/4xx.c 2007-08-27 14:08:42.0
+0400
+++ linux-2.6/arch/powerpc/boot/4xx.c 2007-08-28 17:04:51.0 +0400
@@ -39,6 +39,114 @@
dt_fixup_memory(0, memsize);
}
+/* 4xx DDR1/2 Denali memory controller support */
+/* DDR0 registers */
+#define DDR0_022
+#define DDR0_088
+#define DDR0_1010
+#define DDR0_1414
+#define DDR0_4242
+#define DDR0_4343
+
+/* DDR0_02 */
+#define DDR_START 0x1
+#define DDR_START_SHIFT0
+#define DDR_MAX_CS_REG 0x3
+#define DDR_MAX_CS_REG_SHIFT 24
+#define DDR_MAX_COL_REG0xf
+#define DDR_MAX_COL_REG_SHIFT 16
+#define DDR_MAX_ROW_REG0xf
+#define DDR_MAX_ROW_REG_SHIFT 8
+/* DDR0_08 */
+#define DDR_DDR2_MODE 0x1
+#define DDR_DDR2_MODE_SHIFT0
+/* DDR0_10 */
+#define DDR_CS_MAP 0x3
+#define DDR_CS_MAP_SHIFT 8
+/* DDR0_14 */
+#define DDR_REDUC 0x1
+#define DDR_REDUC_SHIFT16
+/* DDR0_42 */
+#define DDR_APIN 0x7
+#define DDR_APIN_SHIFT 24
+/* DDR0_43 */
+#define DDR_COL_SZ 0x7
+#define DDR_COL_SZ_SHIFT 8
+#define DDR_BANK8 0x1
+#define DDR_BANK8_SHIFT0
+
+#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
+
+static inline u32 mfdcr_sdram0(u32 reg)
+{
+mtdcr(DCRN_SDRAM0_CFGADDR, reg);
+return mfdcr(DCRN_SDRAM0_CFGDATA);
+}
+
+void ibm4xx_denali_fixup_memsize(void)
+{
+ u32 val, max_cs, max_col, max_row;
+ u32 cs, col, row, bank, dpath;
+ unsigned long memsize;
+
+ val = mfdcr_sdram0(DDR0_02);
+ if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
+ fatal("DDR controller is not initialized\n");
+
+ /* get maximum cs col and row values */
+ max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);
+ max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);
+ max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
+
+ /* get CS value */
+ val = mfdcr_sdram0(DDR0_10);
+
+ val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
+ cs = 0;
+ while (val) {
+ if (val && 0x1)
+ cs++;
+ val = val >> 1;
+ }
+
+ if (!cs)
+ fatal("No memory installed\n");
+ if (cs > max_cs)
+ fatal("DDR wrong CS configuration\n");
+
+ /* get data path bytes */
+ val = mfdcr_sdram0(DDR0_14);
+
+ if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
+ dpath = 8; /* 64 bits */
+ else
+ dpath = 4; /* 32 bits */
+
+ /* get adress pins (rows) */
+ val = mfdcr_sdram0(DDR0_42);
+
+ row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
+ if (row > max_row)
+ fatal("DDR wrong APIN configuration\n");
+ row = max_row - row;
+
+ /* get collomn size and banks */
+ val = mfdcr_sdram0(DDR0_43);
+
+ col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
+ if (col > max_col)
+ fatal("DDR wrong COL configuration\n");
+ col = max_col - col;
+
+ if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT))
+ bank = 8; /* 8 banks */
+ else
+ bank = 4; /* 4 banks */
+
+ memsize = cs * (1 << (col+row)) * bank * dpath;
+ dt_fixup_memory(0, memsize);
+}
+
#define SPRN_DBCR0_40X 0x3F2
#define SPRN_DBCR0_44X 0x134
#define DBCR0_RST_SYSTEM 0x3000
diff -ruN linux-2.6.orig/arch/powerpc/boot/4xx.h
linux-2.6/arch/powerpc/boot/4xx.h
--- linux-2.6.orig/arch/powerpc/boot/4xx.h 2007-08-27 14:08:42.0
+0400
+++ linux-2.6/arch/powerpc/boot/4xx.h 2007-08-28 17:04:51.0 +0400
@@ -12,6 +12,7 @@
#define _POWERPC_BOOT_4XX_H_
void ibm4xx_fixup_memsize(void);
+void ibm4xx_denali_fixup_memsize(void);
void ibm44x_dbcr_reset(void);
void ibm40x_dbcr_reset(void);
void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
diff -ruN linux-2.6.orig/arch/powerpc/boot/cuboot-sequoia.c
linux-2.6/arch/powerpc/boot/cuboot-sequoia.c
--- linux-2.6.orig/arch/powerpc/boot/cuboot-sequoia.c 1970-01-01
03:00:00.0 +0300
+++ linux-2.6/arch/powerpc/boot/cuboot-sequoia.c2007-08-28
17:21:55.0 +0400
@@ -0,0 +1,67 @@
+/*
+ * Old U-boot compatibility for Sequo
[PATCH 2/4] PowerPC 440EPx: Sequoia device tree
AMCC PPC440EPx Sequoia device tree.
Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/sequoia.dts | 286 ++
1 files changed, 286 insertions(+)
diff -ruN linux-2.6.orig/arch/powerpc/boot/dts/sequoia.dts
linux-2.6/arch/powerpc/boot/dts/sequoia.dts
--- linux-2.6.orig/arch/powerpc/boot/dts/sequoia.dts1970-01-01
03:00:00.0 +0300
+++ linux-2.6/arch/powerpc/boot/dts/sequoia.dts 2007-08-28 17:04:51.0
+0400
@@ -0,0 +1,286 @@
+/*
+ * Device Tree Source for AMCC Sequoia
+ *
+ * Based on Bamboo code by Josh Boyer <[EMAIL PROTECTED]>
+ * Copyright (c) 2006, 2007 IBM Corp.
+ *
+ * FIXME: Draft only!
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ */
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "amcc,sequoia";
+ compatible = "amcc,sequoia";
+ dcr-parent = <&/cpus/PowerPC,[EMAIL PROTECTED]>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ timebase-frequency = <0>; /* Filled in by zImage */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <8000>;
+ d-cache-size = <8000>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0>; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = "ibm,uic-440epx","ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0c0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = "ibm,uic-440epx","ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0d0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1e 4 1f 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = "ibm,uic-440epx","ibm,uic";
+ interrupt-controller;
+ cell-index = <2>;
+ dcr-reg = <0e0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1c 4 1d 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ SDR0: sdr {
+ compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
+ dcr-reg = <00e 002>;
+ };
+
+ CPR0: cpr {
+ compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
+ dcr-reg = <00c 002>;
+ };
+
+ plb {
+ compatible = "ibm,plb-440epx", "ibm,plb4";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ SDRAM0: sdram {
+ device_type = "memory-controller";
+ compatible = "ibm,sdram-440epx",
"ibm,sdram-44x-ddr2denali";
+ dcr-reg = <010 2>;
+ };
+
+ DMA0: dma {
+ compatible = "ibm,dma-440epx", "ibm,dma-4xx";
+ dcr-reg = <100 027>;
+ };
+
+ MAL0: mcmal {
+ compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
+ dcr-reg = <180 62>;
+ num-tx-chans = <4>;
+ num-rx-chans = <4>;
+ interrupt-parent = <&MAL0>;
+ interrupts = <0 1 2 3 4>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = ;
+ interrupt-map-mask = ;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-440epx", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = < 1 8000
+ 8000 1 8000 8000>;
+ interrupt-parent = <&UIC1>;
+ interrupts = <7 4>;
+
[PATCH 3/4] PowerPC 440EPx: Sequoia board support
AMCC PPC440EPx Sequoia board support.
Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/cputable.c | 18 +
arch/powerpc/kernel/head_44x.S |2 -
arch/powerpc/platforms/44x/Kconfig | 17 -
arch/powerpc/platforms/44x/Makefile |1
arch/powerpc/platforms/44x/sequoia.c | 66 +++
5 files changed, 102 insertions(+), 2 deletions(-)
diff -ruN linux-2.6.orig/arch/powerpc/kernel/cputable.c
linux-2.6/arch/powerpc/kernel/cputable.c
--- linux-2.6.orig/arch/powerpc/kernel/cputable.c 2007-08-27
14:08:42.0 +0400
+++ linux-2.6/arch/powerpc/kernel/cputable.c2007-08-28 17:04:51.0
+0400
@@ -1132,6 +1132,24 @@
.dcache_bsize = 32,
.platform = "ppc440",
},
+ { /* 440EPX */
+ .pvr_mask = 0xfffb,
+ .pvr_value = 0x28D0,
+ .cpu_name = "440EPX",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE |
PPC_FEATURE_HAS_FPU,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
+ { /* 440GRX */
+ .pvr_mask = 0xfffb,
+ .pvr_value = 0x28D8,
+ .cpu_name = "440GRX",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
{ /* 440GP Rev. B */
.pvr_mask = 0xffff,
.pvr_value = 0x4440,
diff -ruN linux-2.6.orig/arch/powerpc/kernel/head_44x.S
linux-2.6/arch/powerpc/kernel/head_44x.S
--- linux-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-08-27
14:08:43.0 +0400
+++ linux-2.6/arch/powerpc/kernel/head_44x.S2007-08-28 17:04:51.0
+0400
@@ -217,7 +217,7 @@
lis r4,[EMAIL PROTECTED]/* IVPR only uses the high 16-bits */
mtspr SPRN_IVPR,r4
-#ifdef CONFIG_440EP
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
/* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
mfspr r2,SPRN_CCR0
lis r3,0xffef
diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/Kconfig
linux-2.6/arch/powerpc/platforms/44x/Kconfig
--- linux-2.6.orig/arch/powerpc/platforms/44x/Kconfig 2007-08-27
14:08:43.0 +0400
+++ linux-2.6/arch/powerpc/platforms/44x/Kconfig2007-08-28
17:04:51.0 +0400
@@ -14,6 +14,14 @@
help
This option enables support for the IBM PPC440GP evaluation board.
+config SEQUOIA
+ bool "Sequoia"
+ depends on 44x
+ default n
+ select 440EPX
+ help
+ This option enables support for the AMCC PPC440EPX evaluation board.
+
#config LUAN
# bool "Luan"
# depends on 44x
@@ -37,6 +45,13 @@
select IBM440EP_ERR42
# select IBM_NEW_EMAC_ZMII
+config 440EPX
+ bool
+ select PPC_FPU
+# Disabled until the new EMAC Driver is merged.
+# select IBM_NEW_EMAC_EMAC4
+# select IBM_NEW_EMAC_ZMII
+
config 440GP
bool
# Disabled until the new EMAC Driver is merged.
@@ -50,7 +65,7 @@
config 440A
bool
- depends on 440GX
+ depends on 440GX || 440EPX
default y
# 44x errata/workaround config symbols, selected by the CPU models above
diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/Makefile
linux-2.6/arch/powerpc/platforms/44x/Makefile
--- linux-2.6.orig/arch/powerpc/platforms/44x/Makefile 2007-08-27
14:08:43.0 +0400
+++ linux-2.6/arch/powerpc/platforms/44x/Makefile 2007-08-28
17:04:51.0 +0400
@@ -1,3 +1,4 @@
obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY)+= ebony.o
obj-$(CONFIG_BAMBOO) += bamboo.o
+obj-$(CONFIG_SEQUOIA) += sequoia.o
diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/sequoia.c
linux-2.6/arch/powerpc/platforms/44x/sequoia.c
--- linux-2.6.orig/arch/powerpc/platforms/44x/sequoia.c 1970-01-01
03:00:00.0 +0300
+++ linux-2.6/arch/powerpc/platforms/44x/sequoia.c 2007-08-28
17:04:51.0 +0400
@@ -0,0 +1,66 @@
+/*
+ * Sequoia board specific routines
+ *
+ * Valentine Barshak <[EMAIL PROTECTED]>
+ * Copyright 2007 MontaVista Software Inc.
+ *
+ * Based on the Bamboo code by
+ * Josh Boyer <[EMAIL PROTECTED]>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "44x.h"
+
+static struct of_devic
[PATCH 4/4] PowerPC 440EPx: Sequoia defconfig
AMCC PPC440EPx Sequoia default config. Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]> --- arch/powerpc/configs/sequoia_defconfig | 776 + 1 files changed, 776 insertions(+) diff -ruN linux-2.6.orig/arch/powerpc/configs/sequoia_defconfig linux-2.6/arch/powerpc/configs/sequoia_defconfig --- linux-2.6.orig/arch/powerpc/configs/sequoia_defconfig 1970-01-01 03:00:00.0 +0300 +++ linux-2.6/arch/powerpc/configs/sequoia_defconfig2007-08-28 17:04:51.0 +0400 @@ -0,0 +1,776 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.23-rc3 +# Mon Aug 27 20:19:13 2007 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +CONFIG_44x=y +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +CONFIG_4xx=y +CONFIG_BOOKE=y +CONFIG_PTE_64BIT=y +CONFIG_PHYS_64BIT=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_IRQ_PER_CPU=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +# CONFIG_DEFAULT_UIMAGE is not set +CONFIG_PPC_DCR_NATIVE=y +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_PPC_DCR=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# Platform support +# +# CONFIG_PPC_MPC52xx is not set +# CONFIG_PPC_MPC5200 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +# CONFIG_BAMBOO is not set +# CONFIG_EBONY is not set +CONFIG_SEQUOIA=y +CONFIG_440EPX=y +CONFIG_440A=y +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_CPM2 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +# CONFIG_MATH_EMULATION is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_PROC_DEVICETREE=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="" +CONFIG_SECCOMP=y +CONFIG_WANT_DEVICE_TREE=y +CONFIG_DEVICE_TREE
Re: [PATCH 3/4] PowerPC 440EPx: Sequoia board support
On Tue, 28 Aug 2007 21:00:07 +0400
Valentine Barshak <[EMAIL PROTECTED]> wrote:
> diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/sequoia.c
> linux-2.6/arch/powerpc/platforms/44x/sequoia.c
> --- linux-2.6.orig/arch/powerpc/platforms/44x/sequoia.c 1970-01-01
> 03:00:00.0 +0300
> +++ linux-2.6/arch/powerpc/platforms/44x/sequoia.c2007-08-28
> 17:04:51.0 +0400
> @@ -0,0 +1,66 @@
> +/*
> + * Sequoia board specific routines
> + *
> + * Valentine Barshak <[EMAIL PROTECTED]>
> + * Copyright 2007 MontaVista Software Inc.
> + *
> + * Based on the Bamboo code by
> + * Josh Boyer <[EMAIL PROTECTED]>
> + * Copyright 2007 IBM Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "44x.h"
> +
> +static struct of_device_id sequoia_of_bus[] = {
> + { .compatible = "ibm,plb", },
As we discussed on IRC, this needs to explicitly match one of the
compatible properties in the Sequoia DTS file. Otherwise it won't
probe your PLB and find anything.
josh
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[PATCH 1/1] Fix bus probe on Bamboo board
Commit 804ace8881d21 changed the behavior of how compatible nodes are found.
This highlighted a bug on the Bamboo board where it wasn't probing the bus
specified in the DTS file. We fix it by being explicit about which bus to
probe.
Signed-off-by: Josh Boyer <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/44x/bamboo.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- linux-2.6.orig/arch/powerpc/platforms/44x/bamboo.c
+++ linux-2.6/arch/powerpc/platforms/44x/bamboo.c
@@ -23,7 +23,7 @@
#include "44x.h"
static struct of_device_id bamboo_of_bus[] = {
- { .compatible = "ibm,plb", },
+ { .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
{},
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[PATCH 3/4] PowerPC 440EPx: Sequoia board support
Same as above, just corrected the plb bus entry in the sequoia_of_bus array
It should be "ibm,plb4" instead of "ibm,plb". The original bamboo code has the
same problem.
AMCC PPC440EPx Sequoia board support.
Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/cputable.c | 18 +
arch/powerpc/kernel/head_44x.S |2 -
arch/powerpc/platforms/44x/Kconfig | 17 -
arch/powerpc/platforms/44x/Makefile |1
arch/powerpc/platforms/44x/sequoia.c | 66 +++
5 files changed, 102 insertions(+), 2 deletions(-)
diff -ruN linux-2.6.orig/arch/powerpc/kernel/cputable.c
linux-2.6/arch/powerpc/kernel/cputable.c
--- linux-2.6.orig/arch/powerpc/kernel/cputable.c 2007-08-27
14:08:42.0 +0400
+++ linux-2.6/arch/powerpc/kernel/cputable.c2007-08-28 17:04:51.0
+0400
@@ -1132,6 +1132,24 @@
.dcache_bsize = 32,
.platform = "ppc440",
},
+ { /* 440EPX */
+ .pvr_mask = 0xfffb,
+ .pvr_value = 0x28D0,
+ .cpu_name = "440EPX",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE |
PPC_FEATURE_HAS_FPU,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
+ { /* 440GRX */
+ .pvr_mask = 0xfffb,
+ .pvr_value = 0x28D8,
+ .cpu_name = "440GRX",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
{ /* 440GP Rev. B */
.pvr_mask = 0xffff,
.pvr_value = 0x4440,
diff -ruN linux-2.6.orig/arch/powerpc/kernel/head_44x.S
linux-2.6/arch/powerpc/kernel/head_44x.S
--- linux-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-08-27
14:08:43.0 +0400
+++ linux-2.6/arch/powerpc/kernel/head_44x.S2007-08-28 17:04:51.0
+0400
@@ -217,7 +217,7 @@
lis r4,[EMAIL PROTECTED]/* IVPR only uses the high 16-bits */
mtspr SPRN_IVPR,r4
-#ifdef CONFIG_440EP
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
/* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
mfspr r2,SPRN_CCR0
lis r3,0xffef
diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/Kconfig
linux-2.6/arch/powerpc/platforms/44x/Kconfig
--- linux-2.6.orig/arch/powerpc/platforms/44x/Kconfig 2007-08-27
14:08:43.0 +0400
+++ linux-2.6/arch/powerpc/platforms/44x/Kconfig2007-08-28
17:04:51.0 +0400
@@ -14,6 +14,14 @@
help
This option enables support for the IBM PPC440GP evaluation board.
+config SEQUOIA
+ bool "Sequoia"
+ depends on 44x
+ default n
+ select 440EPX
+ help
+ This option enables support for the AMCC PPC440EPX evaluation board.
+
#config LUAN
# bool "Luan"
# depends on 44x
@@ -37,6 +45,13 @@
select IBM440EP_ERR42
# select IBM_NEW_EMAC_ZMII
+config 440EPX
+ bool
+ select PPC_FPU
+# Disabled until the new EMAC Driver is merged.
+# select IBM_NEW_EMAC_EMAC4
+# select IBM_NEW_EMAC_ZMII
+
config 440GP
bool
# Disabled until the new EMAC Driver is merged.
@@ -50,7 +65,7 @@
config 440A
bool
- depends on 440GX
+ depends on 440GX || 440EPX
default y
# 44x errata/workaround config symbols, selected by the CPU models above
diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/Makefile
linux-2.6/arch/powerpc/platforms/44x/Makefile
--- linux-2.6.orig/arch/powerpc/platforms/44x/Makefile 2007-08-27
14:08:43.0 +0400
+++ linux-2.6/arch/powerpc/platforms/44x/Makefile 2007-08-28
17:04:51.0 +0400
@@ -1,3 +1,4 @@
obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY)+= ebony.o
obj-$(CONFIG_BAMBOO) += bamboo.o
+obj-$(CONFIG_SEQUOIA) += sequoia.o
diff -ruN linux-2.6.orig/arch/powerpc/platforms/44x/sequoia.c
linux-2.6/arch/powerpc/platforms/44x/sequoia.c
--- linux-2.6.orig/arch/powerpc/platforms/44x/sequoia.c 1970-01-01
03:00:00.0 +0300
+++ linux-2.6/arch/powerpc/platforms/44x/sequoia.c 2007-08-28
17:04:51.0 +0400
@@ -0,0 +1,66 @@
+/*
+ * Sequoia board specific routines
+ *
+ * Valentine Barshak <[EMAIL PROTECTED]>
+ * Copyright 2007 MontaVista Software Inc.
+ *
+ * Based on the Bamboo code by
+ * Josh Boyer <[EMAIL PROTECTED]>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License
Re: [PATCH 1/4] PowerPC 440EPx: Sequoia bootwrapper
On Tue, 28 Aug 2007 20:56:10 +0400 Valentine Barshak <[EMAIL PROTECTED]> wrote: > +/* 4xx DDR1/2 Denali memory controller support */ > +/* DDR0 registers */ > +#define DDR0_02 2 > +#define DDR0_08 8 > +#define DDR0_10 10 > +#define DDR0_14 14 > +#define DDR0_42 42 > +#define DDR0_43 43 > + > +/* DDR0_02 */ > +#define DDR_START0x1 > +#define DDR_START_SHIFT 0 > +#define DDR_MAX_CS_REG 0x3 > +#define DDR_MAX_CS_REG_SHIFT 24 > +#define DDR_MAX_COL_REG 0xf > +#define DDR_MAX_COL_REG_SHIFT16 > +#define DDR_MAX_ROW_REG 0xf > +#define DDR_MAX_ROW_REG_SHIFT8 > +/* DDR0_08 */ > +#define DDR_DDR2_MODE0x1 > +#define DDR_DDR2_MODE_SHIFT 0 > +/* DDR0_10 */ > +#define DDR_CS_MAP 0x3 > +#define DDR_CS_MAP_SHIFT 8 > +/* DDR0_14 */ > +#define DDR_REDUC0x1 > +#define DDR_REDUC_SHIFT 16 > +/* DDR0_42 */ > +#define DDR_APIN 0x7 > +#define DDR_APIN_SHIFT 24 > +/* DDR0_43 */ > +#define DDR_COL_SZ 0x7 > +#define DDR_COL_SZ_SHIFT 8 > +#define DDR_BANK80x1 > +#define DDR_BANK8_SHIFT 0 > + > +#define DDR_GET_VAL(val, mask, shift)(((val) >> (shift)) & (mask)) Hm. Having these as just DDR_... seems like it would lead to confusion if there are other DDR controllers that get added later. But I'm not too picky either way. > diff -ruN linux-2.6.orig/arch/powerpc/boot/4xx.h > linux-2.6/arch/powerpc/boot/4xx.h > --- linux-2.6.orig/arch/powerpc/boot/4xx.h2007-08-27 14:08:42.0 > +0400 > +++ linux-2.6/arch/powerpc/boot/4xx.h 2007-08-28 17:04:51.0 +0400 > @@ -12,6 +12,7 @@ > #define _POWERPC_BOOT_4XX_H_ > > void ibm4xx_fixup_memsize(void); > +void ibm4xx_denali_fixup_memsize(void); > void ibm44x_dbcr_reset(void); > void ibm40x_dbcr_reset(void); > void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1); > diff -ruN linux-2.6.orig/arch/powerpc/boot/cuboot-sequoia.c > linux-2.6/arch/powerpc/boot/cuboot-sequoia.c > --- linux-2.6.orig/arch/powerpc/boot/cuboot-sequoia.c 1970-01-01 > 03:00:00.0 +0300 > +++ linux-2.6/arch/powerpc/boot/cuboot-sequoia.c 2007-08-28 > 17:21:55.0 +0400 > @@ -0,0 +1,67 @@ > + > +#include > +#include > +#include "types.h" > +#include "elf.h" > +#include "string.h" > +#include "stdio.h" > +#include "page.h" > +#include "ops.h" > +#include "dcr.h" > +#include "4xx.h" > +#include "44x.h" > +#include "cuboot.h" > + > +#define TARGET_4xx > +#define TARGET_44x > +#include "ppcboot.h" > + > +static bd_t bd; > +static u8 *sequoia_mac0, *sequoia_mac1; > + > +extern char _dtb_start[]; > +extern char _dtb_end[]; These got added to ops.h in commit 2f1d4899321be so you don't need to specify them here anymore. josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
ide/libata and powerpc arch/device tree
Hi, I'm currently/still trying to describe legacy ports and interrupts for a VIA southbridge PCI IDE controller in a device tree. While the legacy ports can be described in the PCI device node (as suggested to me by some developers here in a previous discussion thread - by imitating the Pegasos), this doesn't seem to be possible for the legacy IDE interrupts. The general IDE driver code contains an interrupt quirk for the Pegasos, whereas some PowerPC platforms still use the obsolete(?) IDE ppc_md interface to define legacy ports and interrupts for an onboard IDE controller. Anyway, AFAIU libata will supersede the code under drivers/ide/, but libata's VIA driver doesn't have the quirk for Pegasos. I would like to know, if there are any plans to adapt the quirk for libata or if there will be an OF interface for libata (to define the legacy IDE interrupts in the device tree)? Thanks! regards, Gerhard BTW: Can somebody send me a dump of the Pegasos's device tree? -- Pt! Schon vom neuen GMX MultiMessenger gehört? Der kanns mit allen: http://www.gmx.net/de/go/multimessenger ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Document and implement an improved flash device binding for powerpc
On Tue, 28 Aug 2007 13:47:51 +1000
David Gibson <[EMAIL PROTECTED]> wrote:
> This patch replaces the binding for flash chips in
> booting-without-of.txt with an clarified and improved version. It
> also makes drivers/mtd/maps/physmap_of.c recognize this new binding.
> Finally it revises the Ebony device tree source to use the new binding
> as an example.
>
> Signed-off-by: David Gibson <[EMAIL PROTECTED]>
> ---
> I don't know that this is ready yet, but I thought I'd try to kick
> along the rather stalled process of getting this new flash binding in
> place by sending out my current draft.
>
> Index: working-2.6/Documentation/powerpc/booting-without-of.txt
> ===
> --- working-2.6.orig/Documentation/powerpc/booting-without-of.txt
> 2007-08-28 13:25:42.0 +1000
> +++ working-2.6/Documentation/powerpc/booting-without-of.txt 2007-08-28
> 13:38:10.0 +1000
> @@ -1757,45 +1757,46 @@ platforms are moved over to use the flat
> };
> };
>
> -j) Flash chip nodes
> + j) CFI or JEDEC memory-mapped NOR flash
> - Example:
> -
> - [EMAIL PROTECTED] {
> - device_type = "rom";
> - compatible = "direct-mapped";
> - probe-type = "CFI";
> - reg = ;
> - bank-width = <4>;
> - partitions = < 00f8
> - 00f8 00080001>;
> - partition-names = "fs\0firmware";
> - };
Instead of removing it completely, could you fix the example to match
the new binding?
> + - compatible : should contain the specific model of flash chip(s)
> + used, if known, followed by either "cfi-flash" or "jedec-flash"
> + - reg : Address range of the flash chip
> + - bank-width : Width (in bytes) of the flash bank. Equal to the
> + device width times the number of interleaved chips.
> + - device-width : (optional) Width of a single flash chip. If
> + omitted, assumed to be equal to 'bank-width'.
> + - #address-cells, #size-cells : Must be present if the flash has
> + sub-nodes representing partitions (see below). In this case
> + both #address-cells and #size-cells must be equal to 1.
Why is that? Are we explicitly not caring about chips that are > 4
GiB? I think MTD has a limitation here anyway, but it seems a bit
short-sighted to explicitly limit what #address-cells can be.
> +
> +For JEDEC compatible devices, the following additional properties
> +are defined:
> +
> + - vendor-id : Contains the flash chip's vendor id (1 byte).
> + - device-id : Contains the flash chip's device id (1 byte).
> +
> +In addition to the information on the flash bank itself, the
> +device tree may optionally contain additional information
> +describing partitions of the flash address space. This can be
> +used on platforms which have strong conventions about which
> +portions of the flash are used for what purposes, but which don't
> +use an on-flash partition table such as RedBoot.
> +
> +Each partitions is represented as a sub-node of the flash device.
"Each partition.."
>
> Index: working-2.6/drivers/mtd/maps/physmap_of.c
> ===
> --- working-2.6.orig/drivers/mtd/maps/physmap_of.c2007-08-28
> 13:25:42.0 +1000
> +++ working-2.6/drivers/mtd/maps/physmap_of.c 2007-08-28 13:26:43.0
> +1000
> @@ -4,6 +4,9 @@
> * Copyright (C) 2006 MontaVista Software Inc.
> * Author: Vitaly Wool <[EMAIL PROTECTED]>
> *
> + * Revised to handle newer style flash binding by:
> + * Copyright (C) 2007 David Gibson, IBM Corporation.
> + *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms of the GNU General Public License as published by the
> * Free Software Foundation; either version 2 of the License, or (at your
> @@ -30,56 +33,129 @@ struct physmap_flash_info {
> struct map_info map;
> struct resource *res;
> #ifdef CONFIG_MTD_PARTITIONS
> - int nr_parts;
> struct mtd_partition*parts;
> #endif
> };
>
> -static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe",
> "map_rom", NULL };
> -#ifdef CONFIG_MTD_PARTITIONS
> -static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
> -#endif
> -
> #ifdef CONFIG_MTD_PARTITIONS
> -static int parse_flash_partitions(struct device_node *node,
> - struct mtd_partition **parts)
> +static int parse_obsolete_partitions(struct physmap_flash_info *info,
> + struct device_node *dp)
> {
If this is going to be obsoleted, can we put a printk in here whining
about the fact that the device tree still uses it if parititions are
found?
josh
___
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htt
Re: [PATCH 3/4] PowerPC 440EPx: Sequoia board support
Hi, On Tue, Aug 28, 2007 at 09:50:22PM +0400, Valentine Barshak wrote: > diff -ruN linux-2.6.orig/arch/powerpc/kernel/head_44x.S > linux-2.6/arch/powerpc/kernel/head_44x.S > --- linux-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-08-27 > 14:08:43.0 +0400 > +++ linux-2.6/arch/powerpc/kernel/head_44x.S 2007-08-28 17:04:51.0 > +0400 > @@ -217,7 +217,7 @@ > lis r4,[EMAIL PROTECTED]/* IVPR only uses the high 16-bits */ > mtspr SPRN_IVPR,r4 > > -#ifdef CONFIG_440EP > +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) > /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */ > mfspr r2,SPRN_CCR0 > lis r3,0xffef This is obviously nothing urgent given that the ifdef already existed, but this looks like it really should be a runtime check instead. Multiplatform kernels will require it (if/whenever that becomes a priority for 44x). -Olof ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 3/4] PowerPC 440EPx: Sequoia board support
On Tue, 28 Aug 2007 13:14:37 -0500 Olof Johansson <[EMAIL PROTECTED]> wrote: > Hi, > > On Tue, Aug 28, 2007 at 09:50:22PM +0400, Valentine Barshak wrote: > > > diff -ruN linux-2.6.orig/arch/powerpc/kernel/head_44x.S > > linux-2.6/arch/powerpc/kernel/head_44x.S > > --- linux-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-08-27 > > 14:08:43.0 +0400 > > +++ linux-2.6/arch/powerpc/kernel/head_44x.S2007-08-28 > > 17:04:51.0 +0400 > > @@ -217,7 +217,7 @@ > > lis r4,[EMAIL PROTECTED]/* IVPR only uses the high 16-bits */ > > mtspr SPRN_IVPR,r4 > > > > -#ifdef CONFIG_440EP > > +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) > > /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */ > > mfspr r2,SPRN_CCR0 > > lis r3,0xffef > > This is obviously nothing urgent given that the ifdef already existed, but > this looks like it really should be a runtime check instead. Multiplatform > kernels will require it (if/whenever that becomes a priority for 44x). Yep, indeed. It's on my todo list, hopefully before 2.6.24. Don't think we need to hold up 440EPx in the meantime, since it's a slightly larger issue. Thanks for the reminder! josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] PS3: fix the bug the major version part is not compared
Masakazu Mokuno wrote: > Fix the bug that the major version part of the firmware > is not compared. > > Signed-off-by: Masakazu Mokuno <[EMAIL PROTECTED]> > CC: Geoff Levand <[EMAIL PROTECTED]> > --- > arch/powerpc/platforms/ps3/setup.c |2 +- > include/asm-powerpc/ps3.h |2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) Paul, Firmware 2.0.x will be out in the coming months, so it would be nice if this could go in for 2.6.23. Acked-by: Geoff Levand <[EMAIL PROTECTED]> ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/1] Fix bus probe on Bamboo board
On Tue, 28 Aug 2007 12:51:00 -0500 Josh Boyer <[EMAIL PROTECTED]> wrote: > Commit 804ace8881d21 changed the behavior of how compatible nodes are found. > This highlighted a bug on the Bamboo board where it wasn't probing the bus > specified in the DTS file. We fix it by being explicit about which bus to > probe. > > Signed-off-by: Josh Boyer <[EMAIL PROTECTED]> Paul, this is 2.6.24 material. You can either pick it up, or get it from my git tree later. I mostly sent it out now in case people were using the bamboo patches already. josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3 1/8] Generic bitbanged MDIO library
Previously, bitbanged MDIO was only supported in individual
hardware-specific drivers. This code factors out the higher level
protocol implementation, reducing the hardware-specific portion to
functions setting direction, data, and clock.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/net/phy/Kconfig|9 ++
drivers/net/phy/Makefile |1 +
drivers/net/phy/mdio-bitbang.c | 187
include/linux/mdio-bitbang.h | 42 +
4 files changed, 239 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/phy/mdio-bitbang.c
create mode 100644 include/linux/mdio-bitbang.h
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index dd09011..72a98dd 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -76,4 +76,13 @@ config FIXED_MII_100_FDX
bool "Emulation for 100M Fdx fixed PHY behavior"
depends on FIXED_PHY
+config MDIO_BITBANG
+ tristate "Support for bitbanged MDIO buses"
+ help
+ This module implements the MDIO bus protocol in software,
+ for use by low level drivers that export the ability to
+ drive the relevant pins.
+
+ If in doubt, say N.
+
endif # PHYLIB
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 8885650..3d6cc7b 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_VITESSE_PHY) += vitesse.o
obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
obj-$(CONFIG_ICPLUS_PHY) += icplus.o
obj-$(CONFIG_FIXED_PHY)+= fixed.o
+obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
diff --git a/drivers/net/phy/mdio-bitbang.c b/drivers/net/phy/mdio-bitbang.c
new file mode 100644
index 000..9bfc9ce
--- /dev/null
+++ b/drivers/net/phy/mdio-bitbang.c
@@ -0,0 +1,187 @@
+/*
+ * Bitbanged MDIO support.
+ *
+ * Author: Scott Wood <[EMAIL PROTECTED]>
+ * Copyright (c) 2007 Freescale Semiconductor
+ *
+ * Based on CPM2 MDIO code which is:
+ *
+ * Copyright (c) 2003 Intracom S.A.
+ * by Pantelis Antoniou <[EMAIL PROTECTED]>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <[EMAIL PROTECTED]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define MDIO_READ 1
+#define MDIO_WRITE 0
+
+#define MDIO_SETUP_TIME 10
+#define MDIO_HOLD_TIME 10
+
+/* Minimum MDC period is 400 ns, plus some margin for error */
+#define MDIO_DELAY 250
+
+/* The PHY may take up to 300 ns to produce data, plus some margin
+ * for error.
+ */
+#define MDIO_READ_DELAY 350
+
+/* MDIO must already be configured as output. */
+static void mdio_bitbang_send_bit(struct mdio_bitbang_ctrl *ctrl, int val)
+{
+ const struct mdio_bitbang_ops *ops = ctrl->ops;
+
+ ops->set_mdio_data(ctrl, val);
+ ndelay(MDIO_DELAY);
+ ops->set_mdc(ctrl, 1);
+ ndelay(MDIO_DELAY);
+ ops->set_mdc(ctrl, 0);
+}
+
+/* MDIO must already be configured as input. */
+static int mdio_bitbang_get_bit(struct mdio_bitbang_ctrl *ctrl)
+{
+ const struct mdio_bitbang_ops *ops = ctrl->ops;
+
+ ndelay(MDIO_DELAY);
+ ops->set_mdc(ctrl, 1);
+ ndelay(MDIO_READ_DELAY);
+ ops->set_mdc(ctrl, 0);
+
+ return ops->get_mdio_data(ctrl);
+}
+
+/* MDIO must already be configured as output. */
+static void mdio_bitbang_send_num(struct mdio_bitbang_ctrl *ctrl,
+ u16 val, int bits)
+{
+ int i;
+
+ for (i = bits - 1; i >= 0; i--)
+ mdio_bitbang_send_bit(ctrl, (val >> i) & 1);
+}
+
+/* MDIO must already be configured as input. */
+static u16 mdio_bitbang_get_num(struct mdio_bitbang_ctrl *ctrl, int bits)
+{
+ int i;
+ u16 ret = 0;
+
+ for (i = bits - 1; i >= 0; i--) {
+ ret <<= 1;
+ ret |= mdio_bitbang_get_bit(ctrl);
+ }
+
+ return ret;
+}
+
+/* Utility to send the preamble, address, and
+ * register (common to read and write).
+ */
+static void mdio_bitbang_cmd(struct mdio_bitbang_ctrl *ctrl,
+ int read, u8 phy, u8 reg)
+{
+ const struct mdio_bitbang_ops *ops = ctrl->ops;
+ int i;
+
+ ops->set_mdio_dir(ctrl, 1);
+
+ /*
+* Send a 32 bit preamble ('1's) with an extra '1' bit for good
+* measure. The IEEE spec says this is a PHY optional
+* requirement. The AMD 79C874 requires one after power up and
+* one after a MII communications error. This means that we are
+* doing more preambles than we need, but it is safer and will be
+* much more robust.
+*/
+
+ for (i = 0; i < 32; i++)
+ mdio_bitbang_send_bit(ctrl, 1);
+
+ /* send the start bit (01) and the read opcode (10) or write (10) */
+ mdio_bitbang_send_bit(ctrl, 0);
+
[PATCH v3 2/8] fs_enet: Whitespace cleanup.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/net/fs_enet/fs_enet-main.c | 85 ---
drivers/net/fs_enet/fs_enet.h |4 +-
drivers/net/fs_enet/mac-fcc.c |1 -
drivers/net/fs_enet/mii-fec.c |1 -
4 files changed, 41 insertions(+), 50 deletions(-)
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index a4a2a0e..f261b90 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -353,7 +353,6 @@ static void fs_enet_tx(struct net_device *dev)
do_wake = do_restart = 0;
while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
-
dirtyidx = bdp - fep->tx_bd_base;
if (fep->tx_free == fep->tx_ring)
@@ -454,7 +453,6 @@ fs_enet_interrupt(int irq, void *dev_id)
nr = 0;
while ((int_events = (*fep->ops->get_int_events)(dev)) != 0) {
-
nr++;
int_clr_events = int_events;
@@ -710,45 +708,43 @@ static void fs_timeout(struct net_device *dev)
*-*/
static void generic_adjust_link(struct net_device *dev)
{
- struct fs_enet_private *fep = netdev_priv(dev);
- struct phy_device *phydev = fep->phydev;
- int new_state = 0;
-
- if (phydev->link) {
-
- /* adjust to duplex mode */
- if (phydev->duplex != fep->oldduplex){
- new_state = 1;
- fep->oldduplex = phydev->duplex;
- }
-
- if (phydev->speed != fep->oldspeed) {
- new_state = 1;
- fep->oldspeed = phydev->speed;
- }
-
- if (!fep->oldlink) {
- new_state = 1;
- fep->oldlink = 1;
- netif_schedule(dev);
- netif_carrier_on(dev);
- netif_start_queue(dev);
- }
-
- if (new_state)
- fep->ops->restart(dev);
-
- } else if (fep->oldlink) {
- new_state = 1;
- fep->oldlink = 0;
- fep->oldspeed = 0;
- fep->oldduplex = -1;
- netif_carrier_off(dev);
- netif_stop_queue(dev);
- }
-
- if (new_state && netif_msg_link(fep))
- phy_print_status(phydev);
+ struct fs_enet_private *fep = netdev_priv(dev);
+ struct phy_device *phydev = fep->phydev;
+ int new_state = 0;
+
+ if (phydev->link) {
+ /* adjust to duplex mode */
+ if (phydev->duplex != fep->oldduplex) {
+ new_state = 1;
+ fep->oldduplex = phydev->duplex;
+ }
+
+ if (phydev->speed != fep->oldspeed) {
+ new_state = 1;
+ fep->oldspeed = phydev->speed;
+ }
+
+ if (!fep->oldlink) {
+ new_state = 1;
+ fep->oldlink = 1;
+ netif_schedule(dev);
+ netif_carrier_on(dev);
+ netif_start_queue(dev);
+ }
+
+ if (new_state)
+ fep->ops->restart(dev);
+ } else if (fep->oldlink) {
+ new_state = 1;
+ fep->oldlink = 0;
+ fep->oldspeed = 0;
+ fep->oldduplex = -1;
+ netif_carrier_off(dev);
+ netif_stop_queue(dev);
+ }
+
+ if (new_state && netif_msg_link(fep))
+ phy_print_status(phydev);
}
@@ -792,7 +788,6 @@ static int fs_init_phy(struct net_device *dev)
return 0;
}
-
static int fs_enet_open(struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
@@ -978,7 +973,7 @@ static struct net_device *fs_init_instance(struct device
*dev,
#endif
#ifdef CONFIG_FS_ENET_HAS_SCC
- if (fs_get_scc_index(fpi->fs_no) >=0 )
+ if (fs_get_scc_index(fpi->fs_no) >=0)
fep->ops = &fs_scc_ops;
#endif
@@ -1069,9 +1064,8 @@ static struct net_device *fs_init_instance(struct device
*dev,
return ndev;
- err:
+err:
if (ndev != NULL) {
-
if (registered)
unregister_netdev(ndev);
@@ -1262,7 +1256,6 @@ static int __init fs_init(void)
err:
cleanup_immap();
return r;
-
}
static void __exit fs_cleanup(void)
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
index 569be22..72a61e9 100644
--- a/drivers/net/fs_enet/fs_enet.h
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -15,8 +15,8 @@
#include
struct fec_info {
-fec_t* fecp;
- u32 mii_speed;
+ fec_t *fecp;
+ u32 mii_speed;
};
#endif
diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_
[PATCH v3 3/8] fs_enet: Include linux/string.h from linux/fs_enet_pd.h
It is needed for strstr(). Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- include/linux/fs_enet_pd.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h index 543cd3c..815c6f9 100644 --- a/include/linux/fs_enet_pd.h +++ b/include/linux/fs_enet_pd.h @@ -16,6 +16,7 @@ #ifndef FS_ENET_PD_H #define FS_ENET_PD_H +#include #include #define FS_ENET_NAME "fs_enet" -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3 4/8] fs_enet: Don't share the interrupt.
This driver can't handle an interrupt immediately after request_irq (making it fail with CONFIG_DEBUG_SHIRQ), and has unshared interrupts on all hardware I'm aware of. Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- drivers/net/fs_enet/fs_enet-main.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c index f261b90..da79a45 100644 --- a/drivers/net/fs_enet/fs_enet-main.c +++ b/drivers/net/fs_enet/fs_enet-main.c @@ -667,7 +667,7 @@ static int fs_request_irq(struct net_device *dev, int irq, const char *name, struct fs_enet_private *fep = netdev_priv(dev); (*fep->ops->pre_request_irq)(dev, irq); - return request_irq(irq, irqf, IRQF_SHARED, name, dev); + return request_irq(irq, irqf, 0, name, dev); } static void fs_free_irq(struct net_device *dev, int irq) -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3 5/8] fs_enet: mac-fcc: Eliminate __fcc-* macros.
These macros accomplish nothing other than defeating type checking. This patch also fixes one instance of the wrong register size being used that was revealed by enabling type checking. Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- drivers/net/fs_enet/mac-fcc.c | 25 - 1 files changed, 8 insertions(+), 17 deletions(-) diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c index ad3c5fa..8b30361 100644 --- a/drivers/net/fs_enet/mac-fcc.c +++ b/drivers/net/fs_enet/mac-fcc.c @@ -48,28 +48,19 @@ /* FCC access macros */ -#define __fcc_out32(addr, x) out_be32((unsigned *)addr, x) -#define __fcc_out16(addr, x) out_be16((unsigned short *)addr, x) -#define __fcc_out8(addr, x)out_8((unsigned char *)addr, x) -#define __fcc_in32(addr) in_be32((unsigned *)addr) -#define __fcc_in16(addr) in_be16((unsigned short *)addr) -#define __fcc_in8(addr)in_8((unsigned char *)addr) - -/* parameter space */ - /* write, read, set bits, clear bits */ -#define W32(_p, _m, _v)__fcc_out32(&(_p)->_m, (_v)) -#define R32(_p, _m)__fcc_in32(&(_p)->_m) +#define W32(_p, _m, _v)out_be32(&(_p)->_m, (_v)) +#define R32(_p, _m)in_be32(&(_p)->_m) #define S32(_p, _m, _v)W32(_p, _m, R32(_p, _m) | (_v)) #define C32(_p, _m, _v)W32(_p, _m, R32(_p, _m) & ~(_v)) -#define W16(_p, _m, _v)__fcc_out16(&(_p)->_m, (_v)) -#define R16(_p, _m)__fcc_in16(&(_p)->_m) +#define W16(_p, _m, _v)out_be16(&(_p)->_m, (_v)) +#define R16(_p, _m)in_be16(&(_p)->_m) #define S16(_p, _m, _v)W16(_p, _m, R16(_p, _m) | (_v)) #define C16(_p, _m, _v)W16(_p, _m, R16(_p, _m) & ~(_v)) -#define W8(_p, _m, _v) __fcc_out8(&(_p)->_m, (_v)) -#define R8(_p, _m) __fcc_in8(&(_p)->_m) +#define W8(_p, _m, _v) out_8(&(_p)->_m, (_v)) +#define R8(_p, _m) in_8(&(_p)->_m) #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v)) #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v)) @@ -290,7 +281,7 @@ static void restart(struct net_device *dev) /* clear everything (slow & steady does it) */ for (i = 0; i < sizeof(*ep); i++) - __fcc_out8((char *)ep + i, 0); + out_8((char *)ep + i, 0); /* get physical address */ rx_bd_base_phys = fep->ring_mem_addr; @@ -495,7 +486,7 @@ static void tx_kickstart(struct net_device *dev) struct fs_enet_private *fep = netdev_priv(dev); fcc_t *fccp = fep->fcc.fccp; - S32(fccp, fcc_ftodr, 0x80); + S16(fccp, fcc_ftodr, 0x8000); } static u32 get_int_events(struct net_device *dev) -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3 6/8] fs_enet: Align receive buffers.
At least some hardware driven by this driver needs receive buffers
to be aligned on a 16-byte boundary. This usually happens by chance,
but it breaks if slab debugging is enabled.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/net/fs_enet/fs_enet-main.c | 21 +++--
drivers/net/fs_enet/fs_enet.h |3 ++-
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index da79a45..a4b76cd 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -69,6 +69,14 @@ static void fs_set_multicast_list(struct net_device *dev)
(*fep->ops->set_multicast_list)(dev);
}
+static void skb_align(struct sk_buff *skb, int align)
+{
+ int off = ((unsigned long)skb->data) & (align - 1);
+
+ if (off)
+ skb_reserve(skb, align - off);
+}
+
/* NAPI receive function */
static int fs_enet_rx_napi(struct net_device *dev, int *budget)
{
@@ -166,9 +174,13 @@ static int fs_enet_rx_napi(struct net_device *dev, int
*budget)
skb = skbn;
skbn = skbt;
}
- } else
+ } else {
skbn = dev_alloc_skb(ENET_RX_FRSIZE);
+ if (skbn)
+ skb_align(skbn, ENET_RX_ALIGN);
+ }
+
if (skbn != NULL) {
skb_put(skb, pkt_len); /* Make room */
skb->protocol = eth_type_trans(skb, dev);
@@ -300,9 +312,13 @@ static int fs_enet_rx_non_napi(struct net_device *dev)
skb = skbn;
skbn = skbt;
}
- } else
+ } else {
skbn = dev_alloc_skb(ENET_RX_FRSIZE);
+ if (skbn)
+ skb_align(skbn, ENET_RX_ALIGN);
+ }
+
if (skbn != NULL) {
skb_put(skb, pkt_len); /* Make room */
skb->protocol = eth_type_trans(skb, dev);
@@ -512,6 +528,7 @@ void fs_init_bds(struct net_device *dev)
dev->name);
break;
}
+ skb_align(skb, ENET_RX_ALIGN);
fep->rx_skbuff[i] = skb;
CBDW_BUFADDR(bdp,
dma_map_single(fep->dev, skb->data,
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
index 72a61e9..f8c7ee8 100644
--- a/drivers/net/fs_enet/fs_enet.h
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -82,7 +82,8 @@ struct phy_info {
/* Must be a multiple of 32 (to cover both FEC & FCC) */
#define PKT_MAXBLR_SIZE((PKT_MAXBUF_SIZE + 31) & ~31)
/* This is needed so that invalidate_xxx wont invalidate too much */
-#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
+#define ENET_RX_ALIGN 16
+#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)
struct fs_enet_mii_bus {
struct list_head list;
--
1.5.0.3
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3 8/8] fs_enet: sparse fixes
Mostly a bunch of __iomem annotations.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/net/fs_enet/fs_enet-main.c | 16 +-
drivers/net/fs_enet/fs_enet.h | 30 +-
drivers/net/fs_enet/mac-fcc.c | 60 ---
drivers/net/fs_enet/mac-fec.c | 34 ++--
drivers/net/fs_enet/mac-scc.c | 37 +++---
drivers/net/fs_enet/mii-fec.c |6 ++--
6 files changed, 96 insertions(+), 87 deletions(-)
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index 281b7d7..876de8c 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -62,7 +62,7 @@ MODULE_DESCRIPTION("Freescale Ethernet Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_MODULE_VERSION);
-int fs_enet_debug = -1;/* -1 == use FS_ENET_DEF_MSG_ENABLE as
value */
+static int fs_enet_debug = -1; /* -1 == use FS_ENET_DEF_MSG_ENABLE as value */
module_param(fs_enet_debug, int, 0);
MODULE_PARM_DESC(fs_enet_debug,
"Freescale bitmapped debugging message enable value");
@@ -88,7 +88,7 @@ static int fs_enet_rx_napi(struct net_device *dev, int
*budget)
{
struct fs_enet_private *fep = netdev_priv(dev);
const struct fs_platform_info *fpi = fep->fpi;
- cbd_t *bdp;
+ cbd_t __iomem *bdp;
struct sk_buff *skb, *skbn, *skbt;
int received = 0;
u16 pkt_len, sc;
@@ -240,7 +240,7 @@ static int fs_enet_rx_non_napi(struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
const struct fs_platform_info *fpi = fep->fpi;
- cbd_t *bdp;
+ cbd_t __iomem *bdp;
struct sk_buff *skb, *skbn, *skbt;
int received = 0;
u16 pkt_len, sc;
@@ -365,7 +365,7 @@ static int fs_enet_rx_non_napi(struct net_device *dev)
static void fs_enet_tx(struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
- cbd_t *bdp;
+ cbd_t __iomem *bdp;
struct sk_buff *skb;
int dirtyidx, do_wake, do_restart;
u16 sc;
@@ -513,7 +513,7 @@ fs_enet_interrupt(int irq, void *dev_id)
void fs_init_bds(struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
- cbd_t *bdp;
+ cbd_t __iomem *bdp;
struct sk_buff *skb;
int i;
@@ -567,7 +567,7 @@ void fs_cleanup_bds(struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
struct sk_buff *skb;
- cbd_t *bdp;
+ cbd_t __iomem *bdp;
int i;
/*
@@ -608,7 +608,7 @@ void fs_cleanup_bds(struct net_device *dev)
static int fs_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct fs_enet_private *fep = netdev_priv(dev);
- cbd_t *bdp;
+ cbd_t __iomem *bdp;
int curidx;
u16 sc;
unsigned long flags;
@@ -1144,7 +1144,7 @@ static int fs_cleanup_instance(struct net_device *ndev)
/**/
/* handy pointer to the immap */
-void *fs_enet_immap = NULL;
+void __iomem *fs_enet_immap = NULL;
static int setup_immap(void)
{
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
index 14ebba8..4a8a101 100644
--- a/drivers/net/fs_enet/fs_enet.h
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -15,7 +15,7 @@
#include
struct fec_info {
- fec_t *fecp;
+ fec_t __iomem *fecp;
u32 mii_speed;
};
#endif
@@ -80,14 +80,14 @@ struct fs_enet_private {
const struct fs_ops *ops;
int rx_ring, tx_ring;
dma_addr_t ring_mem_addr;
- void *ring_base;
+ void __iomem *ring_base;
struct sk_buff **rx_skbuff;
struct sk_buff **tx_skbuff;
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers.*/
- cbd_t *tx_bd_base;
- cbd_t *dirty_tx;/* ring entries to be free()ed. */
- cbd_t *cur_rx;
- cbd_t *cur_tx;
+ cbd_t __iomem *rx_bd_base; /* Address of Rx and Tx buffers.*/
+ cbd_t __iomem *tx_bd_base;
+ cbd_t __iomem *dirty_tx;/* ring entries to be free()ed. */
+ cbd_t __iomem *cur_rx;
+ cbd_t __iomem *cur_tx;
int tx_free;
struct net_device_stats stats;
struct timer_list phy_timer_list;
@@ -112,23 +112,23 @@ struct fs_enet_private {
union {
struct {
int idx;/* FEC1 = 0, FEC2 = 1 */
- void *fecp; /* hw registers*/
+ void __iomem *fecp; /* hw registers*/
u32 hthi, htlo; /* state for multicast */
} fec;
struct {
int idx;/* FCC1-3 = 0-2*/
- void *fccp; /* hw registers*/
-
[PATCH v3 7/8] fs_enet: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
The existing OF glue code was crufty and broken. Rather than fix it, it
will be removed, and the ethernet driver now talks to the device tree
directly.
The old, non-CONFIG_PPC_CPM_NEW_BINDING code can go away once CPM
platforms are dropped from arch/ppc (which will hopefully be soon), and
existing arch/powerpc boards that I wasn't able to test on for this
patchset get converted (which should be even sooner).
mii-bitbang.c now also uses the generic bitbang code, and is generally
cleaned up,
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/net/fs_enet/Kconfig|1 +
drivers/net/fs_enet/fs_enet-main.c | 259 --
drivers/net/fs_enet/fs_enet.h | 55 +-
drivers/net/fs_enet/mac-fcc.c | 89 ++--
drivers/net/fs_enet/mac-fec.c | 19 ++-
drivers/net/fs_enet/mac-scc.c | 53 +++--
drivers/net/fs_enet/mii-bitbang.c | 440 +---
drivers/net/fs_enet/mii-fec.c | 144 -
include/linux/fs_enet_pd.h |5 +
9 files changed, 716 insertions(+), 349 deletions(-)
diff --git a/drivers/net/fs_enet/Kconfig b/drivers/net/fs_enet/Kconfig
index e27ee21..2765e49 100644
--- a/drivers/net/fs_enet/Kconfig
+++ b/drivers/net/fs_enet/Kconfig
@@ -11,6 +11,7 @@ config FS_ENET_HAS_SCC
config FS_ENET_HAS_FCC
bool "Chip has an FCC usable for ethernet"
depends on FS_ENET && CPM2
+ select MDIO_BITBANG
default y
config FS_ENET_HAS_FEC
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index a4b76cd..281b7d7 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -44,12 +44,18 @@
#include
#include
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#include
+#endif
+
#include "fs_enet.h"
/*/
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
static char version[] __devinitdata =
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
+#endif
MODULE_AUTHOR("Pantelis Antoniou <[EMAIL PROTECTED]>");
MODULE_DESCRIPTION("Freescale Ethernet Driver");
@@ -953,6 +959,7 @@ static int fs_ioctl(struct net_device *dev, struct ifreq
*rq, int cmd)
extern int fs_mii_connect(struct net_device *dev);
extern void fs_mii_disconnect(struct net_device *dev);
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
static struct net_device *fs_init_instance(struct device *dev,
struct fs_platform_info *fpi)
{
@@ -1132,6 +1139,7 @@ static int fs_cleanup_instance(struct net_device *ndev)
return 0;
}
+#endif
/**/
@@ -1140,35 +1148,250 @@ void *fs_enet_immap = NULL;
static int setup_immap(void)
{
- phys_addr_t paddr = 0;
- unsigned long size = 0;
-
#ifdef CONFIG_CPM1
- paddr = IMAP_ADDR;
- size = 0x1; /* map 64K */
-#endif
-
-#ifdef CONFIG_CPM2
- paddr = CPM_MAP_ADDR;
- size = 0x4; /* map 256 K */
+ fs_enet_immap = ioremap(IMAP_ADDR, 0x4000);
+ WARN_ON(!fs_enet_immap);
+#elif defined(CONFIG_CPM2)
+ fs_enet_immap = cpm2_immr;
#endif
- fs_enet_immap = ioremap(paddr, size);
- if (fs_enet_immap == NULL)
- return -EBADF; /* XXX ahem; maybe just BUG_ON? */
return 0;
}
static void cleanup_immap(void)
{
- if (fs_enet_immap != NULL) {
- iounmap(fs_enet_immap);
- fs_enet_immap = NULL;
- }
+#if defined(CONFIG_CPM1)
+ iounmap(fs_enet_immap);
+#endif
}
/**/
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+static int __devinit find_phy(struct device_node *np,
+ struct fs_platform_info *fpi)
+{
+ struct device_node *phynode, *mdionode;
+ struct resource res;
+ int ret = 0, len;
+
+ const u32 *data = of_get_property(np, "phy-handle", &len);
+ if (!data || len != 4)
+ return -EINVAL;
+
+ phynode = of_find_node_by_phandle(*data);
+ if (!phynode)
+ return -EINVAL;
+
+ mdionode = of_get_parent(phynode);
+ if (!phynode)
+ goto out_put_phy;
+
+ ret = of_address_to_resource(mdionode, 0, &res);
+ if (ret)
+ goto out_put_mdio;
+
+ data = of_get_property(phynode, "reg", &len);
+ if (!data || len != 4)
+ goto out_put_mdio;
+
+ snprintf(fpi->bus_id, 16, PHY_ID_FMT, res.start, *data);
+
+out_put_mdio:
+ of_node_put(mdionode);
+out_put_phy:
+ of_node_put(phynode);
+ return ret;
+}
+
+#ifdef CONFIG_FS_ENET_HAS_FEC
+#define IS_FEC(match) ((match)->data == &fs_fec_ops)
+#else
+#define IS_FEC(match) 0
+#endif
+
+static int __devinit fs_enet_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct net_device *ndev;
+
Re: RFC: issues concerning the next NAPI interface
From: Jan-Bernd Themann <[EMAIL PROTECTED]> Date: Tue, 28 Aug 2007 13:19:03 +0200 > I will try the following scheme (once we get hrtimers): Each device > (queue) has a hrtimer. Schedule the timer in the poll function > instead of reactivating IRQs when a high load situation has been > detected and all packets have been emptied from the receive queue. > The timer function could then just call netif_rx_schedule to > register the rx_queue for NAPI again. Interrupt mitigation only works if it helps you avoid interrupts. This scheme potentially makes more of them happen. The hrtimer is just another interrupt, a cpu locally triggered one, but it has much of the same costs nonetheless. So if you set this timer, it triggers, and no packets arrive, you are taking more interrupts and doing more work than if you had disabled NAPI. In fact, for certain packet rates, your scheme would result in twice as many interrupts than the current scheme. This is one of several reasons why hardware is the only truly proper place for this kind of logic. Only the hardware can see the packet arrive, and do the interrupt deferral without any cpu intervention whatsoever. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/3] Add early debug console for CPM serial ports.
This code assumes that the ports have been previously set up, with
buffers in DPRAM, and the descriptor address defined by platform code.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/Kconfig.debug |9 +++
arch/powerpc/kernel/head_32.S| 16 +
arch/powerpc/kernel/udbg.c |2 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/cpm_common.c | 44 ++
arch/powerpc/sysdev/cpm_common.h | 16 +
include/asm-powerpc/udbg.h |1 +
7 files changed, 89 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/cpm_common.c
create mode 100644 arch/powerpc/sysdev/cpm_common.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 22acece..d471154 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -211,6 +211,15 @@ config PPC_EARLY_DEBUG_44x
Select this to enable early debugging for IBM 44x chips via the
inbuilt serial port.
+config PPC_EARLY_DEBUG_CPM
+ bool "Early serial debugging for Freescale CPM-based serial ports"
+ depends on SERIAL_CPM
+ select PIN_TLB if PPC_8xx
+ help
+ Select this to enable early debugging for Freescale chips
+ using a CPM-based serial port. This assumes that the bootwrapper
+ has run, and set up the CPM in a particular way.
+
endchoice
config PPC_EARLY_DEBUG_44x_PHYSLOW
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 7d73a13..e950a75 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -152,6 +152,9 @@ __after_mmu_off:
#if defined(CONFIG_BOOTX_TEXT)
bl setup_disp_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+ bl setup_cpm_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1248,6 +1251,19 @@ setup_disp_bat:
blr
#endif /* CONFIG_BOOTX_TEXT */
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+setup_cpm_bat:
+ lis r8, 0xf000
+ ori r8, r8, 0x002a
+ mtspr SPRN_DBAT1L, r8
+
+ lis r11, 0xf000
+ ori r11, r11, (BL_1M << 2) | 2
+ mtspr SPRN_DBAT1U, r11
+
+ blr
+#endif
+
#ifdef CONFIG_8260
/* Jump into the system reset for the rom.
* We first disable the MMU, and then jump to the ROM reset address.
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 0f9b4ea..d723070 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -54,6 +54,8 @@ void __init udbg_early_init(void)
#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
/* PPC44x debug */
udbg_init_44x_as1();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
+ udbg_init_cpm();
#endif
}
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 08ce31e..5063e74 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -34,6 +34,7 @@ endif
# Temporary hack until we have migrated to asm-powerpc
ifeq ($(ARCH),powerpc)
+obj-$(CONFIG_CPM1)$(CONFIG_CPM2) += cpm_common.o
obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
obj-$(CONFIG_8xx) += mpc8xx_pic.o commproc.o
obj-$(CONFIG_UCODE_PATCH) += micropatch.o
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
new file mode 100644
index 000..1972a8f
--- /dev/null
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -0,0 +1,44 @@
+/*
+ * Common CPM code
+ *
+ * Author: Scott Wood <[EMAIL PROTECTED]>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "cpm_common.h"
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+static void udbg_putc_cpm(char c)
+{
+ u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
+
+ if (c == '\n')
+ udbg_putc('\r');
+
+ while (in_be32(&cpm_udbg_txdesc[0]) & 0x8000)
+ ;
+
+ out_8(txbuf, c);
+ out_be32(&cpm_udbg_txdesc[0], 0xa001);
+}
+
+void __init udbg_init_cpm(void)
+{
+ if (cpm_udbg_txdesc) {
+#ifdef CONFIG_CPM2
+ setbat(1, 0xf000, 0xf000, 1024*1024, _PAGE_IO);
+#endif
+ udbg_putc = udbg_putc_cpm;
+ }
+}
+#endif
diff --git a/arch/powerpc/sysdev/cpm_common.h b/arch/powerpc/sysdev/cpm_common.h
new file mode 100644
index 000..f42343f
--- /dev/null
+++ b/arch/powerpc/sysdev/cpm_common.h
@@ -0,0 +1,16 @@
+#ifndef _POWERPC_SYSDEV_CPM_COMMON_H
+#define _POWERPC_SYSDEV_CPM_COMMON_H
+
+#include
+
+/*
+ * Board code must define this address if the early console is used.
+ *
+ * Note that this is not multi-platform safe, and thus the CPM
+ * UDBG console must only be enabled when only a single platform
+ * is selected. It is done
[PATCH 2/3] Introduce new CPM device bindings.
This introduces a new device binding for the CPM and other devices on
these boards. Some of the changes include:
1. Proper namespace scoping for Freescale compatibles and properties.
2. Use compatible rather than things like device_type and model
to determine which particular variant of a device is present.
3. Give the drivers the relevant CPM command word directly, rather than
requiring it to have a lookup table based on device-id, SCC v. SMC, and
CPM version.
4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.
Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
all existing boards are converted and tested, the config option can
become default y to prevent new boards from using the old model. Once
arch/ppc is gone, the config option can be removed altogether.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
Documentation/powerpc/booting-without-of.txt | 169 +-
arch/powerpc/platforms/Kconfig | 11 ++
arch/powerpc/sysdev/fsl_soc.c|2 +
3 files changed, 181 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index 76733a3..2e0853b 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1510,7 +1510,10 @@ platforms are moved over to use the
flattened-device-tree model.
i) Freescale QUICC Engine module (QE)
This represents qe module that is installed on PowerQUICC II Pro.
- Hopefully it will merge backward compatibility with CPM/CPM2.
+
+ NOTE: This is an interim binding; it should be updated to fit
+ in with the CPM binding later in this document.
+
Basically, it is a bus of devices, that could act more or less
as a complete entity (UCC, USB etc ). All of them should be siblings on
the "root" qe node, using the common properties from there.
@@ -1824,6 +1827,170 @@ platforms are moved over to use the
flattened-device-tree model.
fsl,has-rstcr;
};
+ l) Freescale Communications Processor Module
+
+ NOTE: This is an interim binding, and will likely change slightly,
+ as more devices are supported. The QE bindings especially are
+ incomplete.
+
+ i) Root CPM node
+
+ Properties:
+ - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
+ - reg : The first resource is a 48-byte region beginning with
+ CPCR. The second is the available general-purpose
+ DPRAM.
+ - fsl,brg-frequency : the internal clock source frequency for baud-rate
+ generators in Hz.
+
+ Example:
+ [EMAIL PROTECTED] {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
+ reg = <119c0 30 0 2000>;
+ bus-frequency = ;
+ }
+
+ ii) Properties common to mulitple CPM/QE devices
+
+ - fsl,cpm-command : This value is ORed with the opcode and command flag
+ to specify the device on which a CPM command operates.
+
+ - fsl,cpm-brg : Indicates which baud rate generator the device
+ is associated with. If absent, an unused BRG
+ should be dynamically allocated.
+
+ - reg : Unless otherwise specified, the first resource represents the
+ scc/fcc/ucc registers, and the second represents the device's
+ parameter RAM region (if it has one).
+
+ iii) Serial
+
+ Currently defined compatibles:
+ - fsl,cpm1-smc-uart
+ - fsl,cpm2-smc-uart
+ - fsl,cpm1-scc-uart
+ - fsl,cpm2-scc-uart
+ - fsl,qe-uart
+
+ Example:
+
+ [EMAIL PROTECTED] {
+ device_type = "serial";
+ compatible = "fsl,mpc8272-scc-uart",
+"fsl,cpm2-scc-uart";
+ reg = <11a00 20 8000 100>;
+ interrupts = <28 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-brg = <1>;
+ fsl,cpm-command = <0080>;
+ };
+
+ iii) Network
+
+ Currently defined compatibles:
+ - fsl,cpm1-scc-enet
+ - fsl,cpm2-scc-enet
+ - fsl,cpm1-fec-enet
+ - fsl,cpm2-fcc-enet (third resource is GFEMR)
+ - fsl,qe-enet
+
+ Example:
+
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "fsl,mpc8272-fcc-enet",
+"fsl,cpm2-fcc-enet";
+ reg = <11300 20 8400 100 11390 1>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY0>;
+ linux,network-index = <0>;
+ fsl,cpm-command = <12000300>;
+ };
+
+ iv) MDIO
+
+ Currently defined compatibles:
+ fsl,pq1-fec-mdio (reg is same as first resource of FEC devic
[PATCH 1/3] fsl_soc.c cleanup
1. Fix get_immrbase() to use ranges, rather than reg.
It is not always the case that the SoC's first reg property points
to the beginning of the entire SoC block.
2. Update the way get_brgfreq() finds things in the device tree.
It now uses names that are less namespace polluting. The old names
are supported until all boards are converted.
3. "size" is changed from unsigned int to int, to match what
of_get_property() expects.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/fsl_soc.c | 38 +++---
1 files changed, 27 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index f3abce1..63e2350 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -52,11 +52,20 @@ phys_addr_t get_immrbase(void)
soc = of_find_node_by_type(NULL, "soc");
if (soc) {
- unsigned int size;
- const void *prop = of_get_property(soc, "reg", &size);
+ int size;
+ u32 naddr;
+ const u32 *prop = of_get_property(soc, "#address-cells", &size);
+
+ if (prop && size == 4)
+ naddr = *prop;
+ else
+ naddr = 2;
+
+ prop = of_get_property(soc, "ranges", &size);
+
+ if (prop && size >= 12)
+ immrbase = of_translate_address(soc, prop + naddr);
- if (prop)
- immrbase = of_translate_address(soc, prop);
of_node_put(soc);
};
@@ -76,16 +85,23 @@ u32 get_brgfreq(void)
if (brgfreq != -1)
return brgfreq;
- node = of_find_node_by_type(NULL, "cpm");
+ node = of_find_compatible_node(NULL, NULL, "fsl,cpm1");
+ if (!node)
+ node = of_find_compatible_node(NULL, NULL, "fsl,cpm2");
+ if (!node)
+ node = of_find_node_by_type(NULL, "cpm");
if (node) {
- unsigned int size;
- const unsigned int *prop = of_get_property(node,
- "brg-frequency", &size);
+ int size;
+ const unsigned int *prop;
- if (prop)
+ prop = of_get_property(node, "fsl,brg-frequency", &size);
+ if (!prop)
+ prop = of_get_property(node, "brg-frequency", &size);
+ if (prop && size == 4)
brgfreq = *prop;
+
of_node_put(node);
- };
+ }
return brgfreq;
}
@@ -103,7 +119,7 @@ u32 get_baudrate(void)
node = of_find_node_by_type(NULL, "serial");
if (node) {
- unsigned int size;
+ int size;
const unsigned int *prop = of_get_property(node,
"current-speed", &size);
--
1.5.0.3
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[PATCH 1/4] ppc: Add clrbits8 and setbits8.
These I/O accessors will be used in code under drivers/, which is expected to still work in arch/ppc. Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- include/asm-ppc/io.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 95d5904..f776c49 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -553,4 +553,7 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *); #define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v)) #define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v)) +#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) | (_v)) +#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) & ~(_v)) + #endif /* __KERNEL__ */ -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/4] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
The existing OF glue code was crufty and broken. Rather than fix it,
it has been removed, and the serial driver now talks to the device tree
directly.
The non-CONFIG_PPC_CPM_NEW_BINDING code can go away once CPM platforms
are dropped from arch/ppc (which will hopefully be soon), and existing
arch/powerpc boards that I wasn't able to test on for this patchset get
converted (which should be even sooner).
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/serial/cpm_uart/cpm_uart.h |6 +-
drivers/serial/cpm_uart/cpm_uart_core.c | 241 ---
drivers/serial/cpm_uart/cpm_uart_cpm1.c | 16 ++-
drivers/serial/cpm_uart/cpm_uart_cpm1.h |2 +
drivers/serial/cpm_uart/cpm_uart_cpm2.c | 18 +++-
drivers/serial/cpm_uart/cpm_uart_cpm2.h |2 +
6 files changed, 260 insertions(+), 25 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart.h
b/drivers/serial/cpm_uart/cpm_uart.h
index a8f894c..4e1987a 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -80,14 +80,18 @@ struct uart_cpm_port {
int is_portb;
/* wait on close if needed */
int wait_closing;
+ /* value to combine with opcode to form cpm command */
+ u32 command;
};
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
extern int cpm_uart_port_map[UART_NR];
+#endif
extern int cpm_uart_nr;
extern struct uart_cpm_port cpm_uart_ports[UART_NR];
/* these are located in their respective files */
-void cpm_line_cr_cmd(int line, int cmd);
+void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
int cpm_uart_init_portdesc(void);
int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index cefde58..78171d0 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -10,7 +10,7 @@
* Maintainer: Kumar Gala ([EMAIL PROTECTED]) (CPM2)
* Pantelis Antoniou ([EMAIL PROTECTED]) (CPM1)
*
- * Copyright (C) 2004 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
*(C) 2004 Intracom, S.A.
*(C) 2005-2006 MontaVista Software, Inc.
* Vitaly Bordug <[EMAIL PROTECTED]>
@@ -47,6 +47,11 @@
#include
#include
#include
+#include
+
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#include
+#endif
#if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
@@ -57,12 +62,6 @@
#include "cpm_uart.h"
-/***/
-
-/* Track which ports are configured as uarts */
-int cpm_uart_port_map[UART_NR];
-/* How many ports did we config as uarts */
-int cpm_uart_nr = 0;
/**/
@@ -73,6 +72,11 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
/**/
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
+/* Track which ports are configured as uarts */
+int cpm_uart_port_map[UART_NR];
+/* How many ports did we config as uarts */
+int cpm_uart_nr;
/* Place-holder for board-specific stuff */
struct platform_device* __attribute__ ((weak)) __init
@@ -119,6 +123,7 @@ static int cpm_uart_id2nr(int id)
/* not found or invalid argument */
return -1;
}
+#endif
/*
* Check, if transmit buffers are processed
@@ -232,15 +237,14 @@ static void cpm_uart_enable_ms(struct uart_port *port)
static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
- int line = pinfo - cpm_uart_ports;
pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
break_state);
if (break_state)
- cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
+ cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
else
- cpm_line_cr_cmd(line, CPM_CR_RESTART_TX);
+ cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
}
/*
@@ -407,7 +411,6 @@ static int cpm_uart_startup(struct uart_port *port)
{
int retval;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
- int line = pinfo - cpm_uart_ports;
pr_debug("CPM uart[%d]:startup\n", port->line);
@@ -426,7 +429,7 @@ static int cpm_uart_startup(struct uart_port *port)
}
if (!(pinfo->flags & FLAG_CONSOLE))
- cpm_line_cr_cmd(line,CPM_CR_INIT_TRX);
+ cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
return 0;
}
@@ -442,7 +445,6 @@ inline void cpm_uart_wait_until_send(struct uart_cpm_port
*pinfo)
static void cpm_uart_shutdown(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
- int line = pin
[PATCH 4/4] cpm_uart: Issue STOP_TX command before initializing console.
This prevents some bootloader/bootwrapper characters from being lost.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/serial/cpm_uart/cpm_uart_core.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index c43706e..336e05e 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -1325,6 +1325,8 @@ static int __init cpm_uart_console_setup(struct console
*co, char *options)
udbg_putc = NULL;
#endif
+ cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
+
if (IS_SMC(pinfo)) {
clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
@@ -1346,6 +1348,7 @@ static int __init cpm_uart_console_setup(struct console
*co, char *options)
cpm_uart_init_scc(pinfo);
uart_set_options(port, co, baud, parity, bits, flow);
+ cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
return 0;
}
--
1.5.0.3
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[PATCH 3/4] cpm_uart: sparse fixes
Mostly a bunch of direct access to in/out conversions, plus a few
cast removals, __iomem annotations, and miscellaneous cleanup.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
drivers/serial/cpm_uart/cpm_uart.h | 42 +++--
drivers/serial/cpm_uart/cpm_uart_core.c | 299 ---
drivers/serial/cpm_uart/cpm_uart_cpm1.c |2 +-
drivers/serial/cpm_uart/cpm_uart_cpm1.h | 14 +-
drivers/serial/cpm_uart/cpm_uart_cpm2.c |4 +-
drivers/serial/cpm_uart/cpm_uart_cpm2.h | 14 +-
6 files changed, 192 insertions(+), 183 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart.h
b/drivers/serial/cpm_uart/cpm_uart.h
index 4e1987a..32b9737 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -56,21 +56,21 @@ struct uart_cpm_port {
u16 rx_fifosize;
u16 tx_nrfifos;
u16 tx_fifosize;
- smc_t *smcp;
- smc_uart_t *smcup;
- scc_t *sccp;
- scc_uart_t *sccup;
- volatile cbd_t *rx_bd_base;
- volatile cbd_t *rx_cur;
- volatile cbd_t *tx_bd_base;
- volatile cbd_t *tx_cur;
+ smc_t __iomem *smcp;
+ smc_uart_t __iomem *smcup;
+ scc_t __iomem *sccp;
+ scc_uart_t __iomem *sccup;
+ cbd_t __iomem *rx_bd_base;
+ cbd_t __iomem *rx_cur;
+ cbd_t __iomem *tx_bd_base;
+ cbd_t __iomem *tx_cur;
unsigned char *tx_buf;
unsigned char *rx_buf;
u32 flags;
void(*set_lineif)(struct uart_cpm_port *);
u8 brg;
uint dp_addr;
- void*mem_addr;
+ void*mem_addr;
dma_addr_t dma_addr;
u32 mem_size;
/* helpers */
@@ -106,34 +106,36 @@ void scc4_lineif(struct uart_cpm_port *pinfo);
/*
virtual to phys transtalion
*/
-static inline unsigned long cpu2cpm_addr(void* addr, struct uart_cpm_port
*pinfo)
+static inline unsigned long cpu2cpm_addr(void *addr,
+ struct uart_cpm_port *pinfo)
{
int offset;
u32 val = (u32)addr;
+ u32 mem = (u32)pinfo->mem_addr;
/* sane check */
- if (likely((val >= (u32)pinfo->mem_addr)) &&
- (val<((u32)pinfo->mem_addr + pinfo->mem_size))) {
- offset = val - (u32)pinfo->mem_addr;
- return pinfo->dma_addr+offset;
+ if (likely(val >= mem && val < mem + pinfo->mem_size)) {
+ offset = val - mem;
+ return pinfo->dma_addr + offset;
}
/* something nasty happened */
BUG();
return 0;
}
-static inline void *cpm2cpu_addr(unsigned long addr, struct uart_cpm_port
*pinfo)
+static inline void *cpm2cpu_addr(unsigned long addr,
+ struct uart_cpm_port *pinfo)
{
int offset;
u32 val = addr;
+ u32 dma = (u32)pinfo->dma_addr;
/* sane check */
- if (likely((val >= pinfo->dma_addr) &&
- (val<(pinfo->dma_addr + pinfo->mem_size {
- offset = val - (u32)pinfo->dma_addr;
- return (void*)(pinfo->mem_addr+offset);
+ if (likely(val >= dma && val < dma + pinfo->mem_size)) {
+ offset = val - dma;
+ return pinfo->mem_addr + offset;
}
/* something nasty happened */
BUG();
- return 0;
+ return NULL;
}
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index 78171d0..c43706e 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -131,14 +131,14 @@ static int cpm_uart_id2nr(int id)
static unsigned int cpm_uart_tx_empty(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
- volatile cbd_t *bdp = pinfo->tx_bd_base;
+ cbd_t __iomem *bdp = pinfo->tx_bd_base;
int ret = 0;
while (1) {
- if (bdp->cbd_sc & BD_SC_READY)
+ if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
break;
- if (bdp->cbd_sc & BD_SC_WRAP) {
+ if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
ret = TIOCSER_TEMT;
break;
}
@@ -167,15 +167,15 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port
*port)
static void cpm_uart_stop_tx(struct uart_port *port)
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
- volatile smc_t *smcp = pinfo->smcp;
- volatile scc_t *sccp = pinfo->sccp;
+ smc_t __iomem *smcp = pinfo->smcp;
+
[PATCH 1/9] 8xx: Fix CONFIG_PIN_TLB.
1. Only map 512K of the IMMR, rather than 8M, to avoid conflicting with the default ioremap region. 2. The wrong register was being loaded into SPRN_MD_RPN. Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- arch/powerpc/kernel/head_8xx.S | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 901be47..e40e122 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -695,7 +695,7 @@ initial_mmu: mtspr SPRN_MI_AP, r8 mtspr SPRN_MD_AP, r8 - /* Map another 8 MByte at the IMMR to get the processor + /* Map another 512 KByte at the IMMR to get the processor * internal registers (among other things). */ #ifdef CONFIG_PIN_TLB @@ -703,12 +703,12 @@ initial_mmu: mtspr SPRN_MD_CTR, r10 #endif mfspr r9, 638 /* Get current IMMR */ - andis. r9, r9, 0xff80 /* Get 8Mbyte boundary */ + andis. r9, r9, 0xfff8 /* Get 512K boundary */ mr r8, r9 /* Create vaddr for TLB */ ori r8, r8, MD_EVALID /* Mark it valid */ mtspr SPRN_MD_EPN, r8 - li r8, MD_PS8MEG /* Set 8M byte page */ + li r8, MD_PS512K /* Set 512K byte page */ ori r8, r8, MD_SVALID /* Make it valid */ mtspr SPRN_MD_TWC, r8 mr r8, r9 /* Create paddr for TLB */ @@ -730,13 +730,13 @@ initial_mmu: mtspr SPRN_MD_TWC, r9 li r11, MI_BOOTINIT/* Create RPN for address 0 */ addis r11, r11, 0x0080/* Add 8M */ - mtspr SPRN_MD_RPN, r8 + mtspr SPRN_MD_RPN, r11 addis r8, r8, 0x0080 /* Add 8M */ mtspr SPRN_MD_EPN, r8 mtspr SPRN_MD_TWC, r9 addis r11, r11, 0x0080/* Add 8M */ - mtspr SPRN_MD_RPN, r8 + mtspr SPRN_MD_RPN, r11 #endif /* Since the cache is enabled according to the information we -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/9] 8xx: Add pin and clock setting functions.
These let board code set up pins and clocks without having to
put magic numbers directly into the registers.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/commproc.c | 201
include/asm-powerpc/commproc.h | 41
2 files changed, 242 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index af26659..a21a292 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -405,3 +405,204 @@ uint cpm_dpram_phys(u8 *addr)
return (dpram_pbase + (uint)(addr - (u8 __force *)dpram_vbase));
}
EXPORT_SYMBOL(cpm_dpram_addr);
+
+struct cpm_ioport16 {
+ __be16 dir, par, sor, dat, intr;
+ __be16 res[3];
+};
+
+struct cpm_ioport32 {
+ __be32 dir, par, sor;
+};
+
+static void cpm1_set_pin32(int port, int pin, int flags)
+{
+ struct cpm_ioport32 __iomem *iop;
+ pin = 1 << (31 - pin);
+
+ if (port == 1)
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pbdir;
+ else
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pedir;
+
+ if (flags & CPM_PIN_OUTPUT)
+ setbits32(&iop->dir, pin);
+ else
+ clrbits32(&iop->dir, pin);
+
+ if (!(flags & CPM_PIN_GPIO))
+ setbits32(&iop->par, pin);
+ else
+ clrbits32(&iop->par, pin);
+
+ if (port == 4) {
+ if (flags & CPM_PIN_SECONDARY)
+ setbits32(&iop->sor, pin);
+ else
+ clrbits32(&iop->sor, pin);
+
+ if (flags & CPM_PIN_OPENDRAIN)
+ setbits32(&mpc8xx_immr->im_cpm.cp_peodr, pin);
+ else
+ clrbits32(&mpc8xx_immr->im_cpm.cp_peodr, pin);
+ }
+}
+
+static void cpm1_set_pin16(int port, int pin, int flags)
+{
+ struct cpm_ioport16 __iomem *iop =
+ (struct cpm_ioport16 __iomem *)&mpc8xx_immr->im_ioport;
+
+ pin = 1 << (15 - pin);
+
+ if (port != 0)
+ iop += port - 1;
+
+ if (flags & CPM_PIN_OUTPUT)
+ setbits16(&iop->dir, pin);
+ else
+ clrbits16(&iop->dir, pin);
+
+ if (!(flags & CPM_PIN_GPIO))
+ setbits16(&iop->par, pin);
+ else
+ clrbits16(&iop->par, pin);
+
+ if (port == 2) {
+ if (flags & CPM_PIN_SECONDARY)
+ setbits16(&iop->sor, pin);
+ else
+ clrbits16(&iop->sor, pin);
+ }
+}
+
+void cpm1_set_pin(int port, int pin, int flags)
+{
+ if (port == 1 || port == 4)
+ cpm1_set_pin32(port, pin, flags);
+ else
+ cpm1_set_pin16(port, pin, flags);
+}
+
+int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
+{
+ int shift;
+ int i, bits = 0;
+ u32 __iomem *reg;
+ u32 mask = 7;
+
+ u8 clk_map[][3] = {
+ {CPM_CLK_SCC1, CPM_BRG1, 0},
+ {CPM_CLK_SCC1, CPM_BRG2, 1},
+ {CPM_CLK_SCC1, CPM_BRG3, 2},
+ {CPM_CLK_SCC1, CPM_BRG4, 3},
+ {CPM_CLK_SCC1, CPM_CLK1, 4},
+ {CPM_CLK_SCC1, CPM_CLK2, 5},
+ {CPM_CLK_SCC1, CPM_CLK3, 6},
+ {CPM_CLK_SCC1, CPM_CLK4, 7},
+
+ {CPM_CLK_SCC2, CPM_BRG1, 0},
+ {CPM_CLK_SCC2, CPM_BRG2, 1},
+ {CPM_CLK_SCC2, CPM_BRG3, 2},
+ {CPM_CLK_SCC2, CPM_BRG4, 3},
+ {CPM_CLK_SCC2, CPM_CLK1, 4},
+ {CPM_CLK_SCC2, CPM_CLK2, 5},
+ {CPM_CLK_SCC2, CPM_CLK3, 6},
+ {CPM_CLK_SCC2, CPM_CLK4, 7},
+
+ {CPM_CLK_SCC3, CPM_BRG1, 0},
+ {CPM_CLK_SCC3, CPM_BRG2, 1},
+ {CPM_CLK_SCC3, CPM_BRG3, 2},
+ {CPM_CLK_SCC3, CPM_BRG4, 3},
+ {CPM_CLK_SCC3, CPM_CLK5, 4},
+ {CPM_CLK_SCC3, CPM_CLK6, 5},
+ {CPM_CLK_SCC3, CPM_CLK7, 6},
+ {CPM_CLK_SCC3, CPM_CLK8, 7},
+
+ {CPM_CLK_SCC4, CPM_BRG1, 0},
+ {CPM_CLK_SCC4, CPM_BRG2, 1},
+ {CPM_CLK_SCC4, CPM_BRG3, 2},
+ {CPM_CLK_SCC4, CPM_BRG4, 3},
+ {CPM_CLK_SCC4, CPM_CLK5, 4},
+ {CPM_CLK_SCC4, CPM_CLK6, 5},
+ {CPM_CLK_SCC4, CPM_CLK7, 6},
+ {CPM_CLK_SCC4, CPM_CLK8, 7},
+
+ {CPM_CLK_SMC1, CPM_BRG1, 0},
+ {CPM_CLK_SMC1, CPM_BRG2, 1},
+ {CPM_CLK_SMC1, CPM_BRG3, 2},
+ {CPM_CLK_SMC1, CPM_BRG4, 3},
+ {CPM_CLK_SMC1, CPM_CLK1, 4},
+ {CPM_CLK_SMC1, CPM_CLK2, 5},
+ {CPM_CLK_SMC1, CPM_CLK3, 6},
+ {CPM_CLK_SMC1, CPM_CLK4, 7},
+
+ {CPM_CLK_SMC2, CPM_BRG1, 0},
+ {CPM_CLK_SMC2, CPM_BRG2, 1},
+ {CPM_CLK
[PATCH 2/9] 8xx: Infrastructure code cleanup.
1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kernel is about to
use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files
to sysdev/commproc.h.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/8xx/m8xx_setup.c | 90 ++
arch/powerpc/platforms/8xx/mpc86xads.h |3 -
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 10 +---
arch/powerpc/platforms/8xx/mpc885ads.h |3 -
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 11 +---
arch/powerpc/sysdev/commproc.c | 71 +++-
arch/powerpc/sysdev/commproc.h | 12
arch/powerpc/sysdev/mpc8xx_pic.c | 16 ++--
include/asm-powerpc/commproc.h |5 +-
include/asm-powerpc/fs_pd.h | 19 +
10 files changed, 90 insertions(+), 150 deletions(-)
create mode 100644 arch/powerpc/sysdev/commproc.h
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c
b/arch/powerpc/platforms/8xx/m8xx_setup.c
index b2b98dd..d35eda8 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -10,57 +10,33 @@
* bootup setup stuff..
*/
-#include
-#include
#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
-#include
#include
-#include
#include
-#include
-#include
-#include
-#include
-#include
#include
#include
-#include
-#include
-#include
#include
-#include
#include
#include
-#include
-#include
#include
#include
#include
-#include "sysdev/mpc8xx_pic.h"
+#include
+#include
#ifdef CONFIG_PCMCIA_M8XX
struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops;
#endif
void m8xx_calibrate_decr(void);
-#ifdef CONFIG_8xx_WDT
-extern void m8xx_wdt_handler_install(bd_t *bp);
-#endif
extern int cpm_pic_init(void);
extern int cpm_get_irq(void);
/* A place holder for time base interrupts, if they are ever enabled. */
-irqreturn_t timebase_interrupt(int irq, void * dev)
+static irqreturn_t timebase_interrupt(int irq, void *dev)
{
printk ("timebase_interrupt()\n");
@@ -77,7 +53,7 @@ static struct irqaction tbint_irqaction = {
void __init __attribute__ ((weak))
init_internal_rtc(void)
{
- sit8xx_t *sys_tmr = (sit8xx_t *) immr_map(im_sit);
+ sit8xx_t __iomem *sys_tmr = immr_map(im_sit);
/* Disable the RTC one second and alarm interrupts. */
clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
@@ -116,13 +92,13 @@ static int __init get_freq(char *name, unsigned long *val)
void __init mpc8xx_calibrate_decr(void)
{
struct device_node *cpu;
- cark8xx_t *clk_r1;
- car8xx_t *clk_r2;
- sitk8xx_t *sys_tmr1;
- sit8xx_t *sys_tmr2;
+ cark8xx_t __iomem *clk_r1;
+ car8xx_t __iomem *clk_r2;
+ sitk8xx_t __iomem *sys_tmr1;
+ sit8xx_t __iomem *sys_tmr2;
int irq, virq;
- clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
+ clk_r1 = immr_map(im_clkrstk);
/* Unlock the SCCR. */
out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
@@ -130,7 +106,7 @@ void __init mpc8xx_calibrate_decr(void)
immr_unmap(clk_r1);
/* Force all 8xx processors to use divide by 16 processor clock. */
- clk_r2 = (car8xx_t *) immr_map(im_clkrst);
+ clk_r2 = immr_map(im_clkrst);
setbits32(&clk_r2->car_sccr, 0x0200);
immr_unmap(clk_r2);
@@ -164,7 +140,7 @@ void __init mpc8xx_calibrate_decr(void)
* we guarantee the registers are locked, then we unlock them
* for our use.
*/
- sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+ sys_tmr1 = immr_map(im_sitk);
out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
@@ -184,20 +160,13 @@ void __init mpc8xx_calibrate_decr(void)
virq= irq_of_parse_and_map(cpu, 0);
irq = irq_map[virq].hwirq;
- sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
+ sys_tmr2 = immr_map(im_sit);
out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) |
(TBSCR_TBF | TBSCR_TBE));
immr_unmap(sys_tmr2);
if (setup_irq(virq, &tbint_irqaction))
panic("Could not allocate timer IRQ!");
-
-#ifdef CONFIG_8xx_WDT
- /* Install watchdog timer handler early because it mi
[PATCH 4/9] 8xx: Work around CPU15 erratum.
The CPU15 erratum on MPC8xx chips can cause incorrect code execution under certain circumstances, where there is a conditional or indirect branch in the last word of a page, with a target in the last cache line of the next page. This patch implements one of the suggested workarounds, by forcing a TLB miss whenever execution crosses a page boundary. This is done by invalidating the pages before and after the one being loaded into the TLB in the ITLB miss handler. Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- arch/powerpc/kernel/head_8xx.S |6 ++ arch/powerpc/platforms/8xx/Kconfig | 16 2 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index e40e122..dd223df 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -301,6 +301,12 @@ InstructionTLBMiss: stw r10, 0(r0) stw r11, 4(r0) mfspr r10, SPRN_SRR0 /* Get effective address of fault */ +#ifdef CONFIG_8xx_CPU15 + addir11, r10, 0x1000 + tlbie r11 + addir11, r10, -0x1000 + tlbie r11 +#endif DO_8xx_CPU6(0x3780, r3) mtspr SPRN_MD_EPN, r10/* Have to use MD_EPN for walk, MI_EPN can't */ mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */ diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig index 39bb8c5..b8dd515 100644 --- a/arch/powerpc/platforms/8xx/Kconfig +++ b/arch/powerpc/platforms/8xx/Kconfig @@ -99,6 +99,22 @@ config 8xx_CPU6 If in doubt, say N here. +config 8xx_CPU15 + bool "CPU15 Silicon Errata" + default y + help + This enables a workaround for erratum CPU15 on MPC8xx chips. + This bug can cause incorrect code execution under certain + circumstances. This workaround adds some overhead (a TLB miss + every time execution crosses a page boundary), and you may wish + to disable it if you have worked around the bug in the compiler + (by not placing conditional branches or branches to LR or CTR + in the last word of a page, with a target of the last cache + line in the next page), or if you have used some other + workaround. + + If in doubt, say Y here. + choice prompt "Microcode patch selection" default NO_UCODE_PATCH -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 5/9] 8xx: Don't call non-existent Soft_emulate_8xx from SoftwareEmulation.
On arch/ppc, Soft_emulate_8xx was used when full math emulation was
turned off to emulate a minimal subset of floating point load/store
instructions, to avoid needing a soft-float toolchain. This function
is called, but not present, on arch/powerpc, causing a build error
if floating point emulation is turned off.
As:
1. soft-float toolchains are now common,
2. partial emulation could mislead someone into thinking they have
a soft-float userspace because things usually work, only to have it
fail when actual FP gets executed under unusual circumstances, and
3. full emulation is still available for those who need to run
non-soft-float userspace,
I'm deleting the call rather than moving Soft_emulate_8xx over to
arch/powerpc.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/traps.c | 16 +++-
1 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index d8502e3..28ac64c 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -911,9 +911,10 @@ void performance_monitor_exception(struct pt_regs *regs)
#ifdef CONFIG_8xx
void SoftwareEmulation(struct pt_regs *regs)
{
+#ifdef CONFIG_MATH_EMULATION
extern int do_mathemu(struct pt_regs *);
- extern int Soft_emulate_8xx(struct pt_regs *);
int errcode;
+#endif
CHECK_FULL_REGS(regs);
@@ -944,18 +945,7 @@ void SoftwareEmulation(struct pt_regs *regs)
}
#else
- errcode = Soft_emulate_8xx(regs);
- switch (errcode) {
- case 0:
- emulate_single_step(regs);
- return;
- case 1:
- _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
- return;
- case -EFAULT:
- _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
- return;
- }
+ _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
#endif
}
#endif /* CONFIG_8xx */
--
1.5.0.3
___
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[PATCH 6/9] 8xx: Set initial memory limit.
The 8xx can only support a max of 8M during early boot (it seems a lot of 8xx boards only have 8M so the bug was never triggered), but the early allocator isn't aware of this. The following change makes it able to run with larger memory. Signed-off-by: Vitaly Bordug <[EMAIL PROTECTED]> Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- arch/powerpc/mm/init_32.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index d65995a..e09513a 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -132,6 +132,9 @@ void __init MMU_init(void) /* 601 can only access 16MB at the moment */ if (PVR_VER(mfspr(SPRN_PVR)) == 1) __initial_memory_limit = 0x0100; + /* 8xx can only access 8MB at the moment */ + if (PVR_VER(mfspr(SPRN_PVR)) == 0x50) + __initial_memory_limit = 0x0080; /* parse args from command line */ MMU_setup(); -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: RFC: issues concerning the next NAPI interface
From: Jan-Bernd Themann <[EMAIL PROTECTED]> Date: Tue, 28 Aug 2007 13:21:09 +0200 > Problem for multi queue driver with interrupt distribution scheme set to > round robin for this simple example: > Assuming we have 2 SLOW CPUs. CPU_1 is under heavy load (applications). CPU_2 > is not under heavy load. Now we receive a lot of packets (high load > situation). > Receive queue 1 (RQ1) is scheduled on CPU_1. NAPI-Poll does not manage to > empty > RQ1 ever, so it stays on CPU_1. The second receive queue (RQ2) is scheduled on > CPU_2. As that CPU is not under heavy load, RQ2 can be emptied, and the next > IRQ > for RQ2 will go to CPU_1. Then both RQs are on CPU_1 and will stay there if > no IRQ is forced at some time as both RQs are never emptied completely. Why would RQ2's IRQ move over to CPU_1? That's stupid. If you lock the IRQs to specific cpus, the load adjusts automatically. Because packet work, in high load situations, will be processed via ksoftirqd daemons even if the packet is not for a user application's socket. In such a case the scheduler will move the user applications that are now not able to get their timeslices over to a less busy cpu. If you keep moving the interrupts around, the scheduler cannot react properly and it makes the situation worse. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 6/9] 8xx: Set initial memory limit.
From: John Traill <[EMAIL PROTECTED]> The 8xx can only support a max of 8M during early boot (it seems a lot of 8xx boards only have 8M so the bug was never triggered), but the early allocator isn't aware of this. The following change makes it able to run with larger memory. Signed-off-by: Vitaly Bordug <[EMAIL PROTECTED]> Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- Sorry, forgot to move the From: line out of the actual From: field on the previous e-mail. arch/powerpc/mm/init_32.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index d65995a..e09513a 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -132,6 +132,9 @@ void __init MMU_init(void) /* 601 can only access 16MB at the moment */ if (PVR_VER(mfspr(SPRN_PVR)) == 1) __initial_memory_limit = 0x0100; + /* 8xx can only access 8MB at the moment */ + if (PVR_VER(mfspr(SPRN_PVR)) == 0x50) + __initial_memory_limit = 0x0080; /* parse args from command line */ MMU_setup(); -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 7/9] 8xx: mpc885ads cleanup
It now uses the new CPM binding and the generic pin/clock functions, and
has assorted fixes and cleanup.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/mpc885ads.dts | 192 ++-
arch/powerpc/configs/mpc885_ads_defconfig| 445 +++---
arch/powerpc/platforms/8xx/Kconfig |1 +
arch/powerpc/platforms/8xx/mpc885ads.h | 38 ---
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 455 +-
5 files changed, 455 insertions(+), 676 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts
b/arch/powerpc/boot/dts/mpc885ads.dts
index dc7ab9c..76c0a06 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -2,6 +2,7 @@
* MPC885 ADS Device Tree Source
*
* Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -12,7 +13,7 @@
/ {
model = "MPC885ADS";
- compatible = "mpc8xx";
+ compatible = "fsl,mpc885ads";
#address-cells = <1>;
#size-cells = <1>;
@@ -23,161 +24,180 @@
PowerPC,[EMAIL PROTECTED] {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <2000>; // L1, 8K
- i-cache-size = <2000>; // L1, 8K
+ d-cache-line-size = ;
+ i-cache-line-size = ;
+ d-cache-size = ;
+ i-cache-size = ;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- 32-bit;
interrupts = ; // decrementer interrupt
- interrupt-parent = <&Mpc8xx_pic>;
+ interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
- reg = < 80>;
+ reg = <0 0>;
};
- [EMAIL PROTECTED] {
+ chipselect {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ [EMAIL PROTECTED] {
+ device_type = "rom";
+ compatible = "direct-mapped";
+ reg = ;
+ probe-type = "JEDEC";
+ bank-width = <4>;
+ };
+
+ [EMAIL PROTECTED] {
+ reg = ;
+ compatible = "fsl,mpc885ads-bcsr";
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "fsl,mpc885", "fsl,pq1-soc";
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
device_type = "soc";
- ranges = <0 ff00 0010>;
- reg = ;
+ ranges = <0 ff00 4000>;
bus-frequency = <0>;
- [EMAIL PROTECTED] {
- device_type = "mdio";
- compatible = "fs_enet";
- reg = ;
+
+ [EMAIL PROTECTED] {
+ compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
+ reg = ;
#address-cells = <1>;
#size-cells = <0>;
- Phy0: [EMAIL PROTECTED] {
+
+ PHY0: [EMAIL PROTECTED] {
reg = <0>;
device_type = "ethernet-phy";
};
- Phy1: [EMAIL PROTECTED] {
+
+ PHY1: [EMAIL PROTECTED] {
reg = <1>;
device_type = "ethernet-phy";
};
- Phy2: [EMAIL PROTECTED] {
+
+ PHY2: [EMAIL PROTECTED] {
reg = <2>;
device_type = "ethernet-phy";
};
};
- [EMAIL PROTECTED] {
+ [EMAIL PROTECTED] {
device_type = "network";
- compatible = "fs_enet";
- model = "FEC";
- device-id = <1>;
+ compatible = "fsl,mpc885-fec-enet",
+"fsl,pq1-fec-enet";
reg = ;
- mac-address = [ 00 00 0C 00 01 FD ];
+ local-mac-address = [ 00 00 00 00 00 00 ];
[PATCH 8/9] 8xx: Embedded Planet EP88xC support
This board is also resold by Freescale under the names
"QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/Makefile|3 +-
arch/powerpc/boot/dts/ep88xc.dts | 192 +
arch/powerpc/boot/ep88xc.c| 54 +++
arch/powerpc/configs/ep88xc_defconfig | 747 +
arch/powerpc/platforms/8xx/Kconfig| 10 +
arch/powerpc/platforms/8xx/Makefile |1 +
arch/powerpc/platforms/8xx/ep88xc.c | 181
7 files changed, 1187 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/boot/dts/ep88xc.dts
create mode 100644 arch/powerpc/boot/ep88xc.c
create mode 100644 arch/powerpc/configs/ep88xc_defconfig
create mode 100644 arch/powerpc/platforms/8xx/ep88xc.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index d96b06a..10f1fc0 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -49,7 +49,7 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c
flatdevtree_misc.c \
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c \
- cuboot-8xx.c cuboot-pq2.c fixed-head.S
+ cuboot-8xx.c cuboot-pq2.c fixed-head.S ep88xc.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -142,6 +142,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
ifneq ($(CONFIG_DEVICE_TREE),"")
image-$(CONFIG_PPC_8xx)+= cuImage.8xx
+image-$(CONFIG_PPC_EP88XC) += zImage.bin.ep88xc
image-$(CONFIG_8260) += cuImage.pq2
image-$(CONFIG_PPC_83xx) += cuImage.83xx
image-$(CONFIG_PPC_85xx) += cuImage.85xx
diff --git a/arch/powerpc/boot/dts/ep88xc.dts b/arch/powerpc/boot/dts/ep88xc.dts
new file mode 100644
index 000..0a62059
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep88xc.dts
@@ -0,0 +1,192 @@
+/*
+ * EP88xC Device Tree Source
+ *
+ * Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = "EP88xC";
+ compatible = "fsl,ep88xc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = ;
+ i-cache-line-size = ;
+ d-cache-size = ;
+ i-cache-size = ;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ interrupts = ; // decrementer interrupt
+ interrupt-parent = <&PIC>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0>;
+ };
+
+ chipselect {
+ [EMAIL PROTECTED] {
+ reg = ;
+ compatible = "fsl,ep88xc-bcsr";
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = "rom";
+ compatible = "direct-mapped";
+ reg = ;
+ probe-type = "CFI";
+ bank-width = <4>;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "fsl,mpc885", "fsl,pq1-soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 fa20 4000>;
+ bus-frequency = <0>;
+
+ [EMAIL PROTECTED] {
+ compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
+ reg = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PHY0: [EMAIL PROTECTED] {
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+
+ PHY1: [EMAIL PROTECTED] {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "fsl,mpc885-fec-enet",
+"fsl,pq1-fec-enet";
+ reg = ;
+
[PATCH 9/9] 8xx: Adder 875 support
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/adder875.dts| 158 +++
arch/powerpc/configs/adder875_config | 802 +
arch/powerpc/platforms/8xx/Kconfig|8 +
arch/powerpc/platforms/8xx/Makefile |1 +
arch/powerpc/platforms/8xx/adder875.c | 127 ++
5 files changed, 1096 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/adder875.dts
create mode 100644 arch/powerpc/configs/adder875_config
create mode 100644 arch/powerpc/platforms/8xx/adder875.c
diff --git a/arch/powerpc/boot/dts/adder875.dts
b/arch/powerpc/boot/dts/adder875.dts
new file mode 100644
index 000..6b5ba1d
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875.dts
@@ -0,0 +1,158 @@
+/*
+ * MPC885 ADS Device Tree Source
+ *
+ * Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = "Analogue & Micro Adder MPC875";
+ compatible = "analogue-and-micro,adder875";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = ;
+ i-cache-line-size = ;
+ d-cache-size = ;
+ i-cache-size = ;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ interrupts = ; // decrementer interrupt
+ interrupt-parent = <&PIC>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0>;
+ };
+
+ chipselect {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ [EMAIL PROTECTED] {
+ device_type = "rom";
+ compatible = "direct-mapped";
+ reg = ;
+ probe-type = "CFI";
+ bank-width = <2>;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "fsl,mpc875", "fsl,pq1-soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 ff00 4000>;
+ bus-frequency = <0>;
+
+ [EMAIL PROTECTED] {
+ compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
+ reg = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PHY0: [EMAIL PROTECTED] {
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+
+ PHY1: [EMAIL PROTECTED] {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "fsl,mpc875-fec-enet",
+"fsl,pq1-fec-enet";
+ reg = ;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <3 1>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY0>;
+ linux,network-index = <0>;
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "fsl,mpc875-fec-enet",
+"fsl,pq1-fec-enet";
+ reg = <1e00 188>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <7 1>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY1>;
+ linux,network-index = <1>;
+ };
+
+ PIC: [EMAIL PROTECTED] {
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0 24>;
+ compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc875-cpm", "fsl,cpm1";
+ command-proc = <9c0>;
+ fsl,b
[PATCH 1/9] cpm2: Infrastructure code cleanup.
Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr
is used rather than creating many temporary mappings.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c | 56 +---
arch/powerpc/sysdev/cpm2_pic.c|2 +-
include/asm-powerpc/cpm2.h|2 +-
include/asm-powerpc/fs_pd.h | 19 ++--
include/asm-powerpc/immap_cpm2.h |4 ++-
5 files changed, 47 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c
b/arch/powerpc/sysdev/cpm2_common.c
index dbe8d18..dbef50c 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -33,6 +33,8 @@
#include
#include
#include
+#include
+
#include
#include
#include
@@ -45,13 +47,12 @@
#include
static void cpm2_dpinit(void);
-cpm_cpm2_t *cpmp; /* Pointer to comm processor space */
+cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
/* We allocate this here because it is used almost exclusively for
* the communication processor devices.
*/
-cpm2_map_t *cpm2_immr;
-intctl_cpm2_t *cpm2_intctl;
+cpm2_map_t __iomem *cpm2_immr;
#define CPM_MAP_SIZE (0x4) /* 256k - the PQ3 reserve this amount
of space for CPM as it is larger
@@ -60,8 +61,7 @@ intctl_cpm2_t *cpm2_intctl;
void
cpm2_reset(void)
{
- cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
- cpm2_intctl = cpm2_map(im_intctl);
+ cpm2_immr = ioremap(get_immrbase(), CPM_MAP_SIZE);
/* Reclaim the DP memory for our use.
*/
@@ -91,7 +91,7 @@ cpm2_reset(void)
void
cpm_setbrg(uint brg, uint rate)
{
- volatile uint *bp;
+ u32 __iomem *bp;
/* This is good enough to get SMCs running.
*/
@@ -102,7 +102,7 @@ cpm_setbrg(uint brg, uint rate)
brg -= 4;
}
bp += brg;
- *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
+ out_be32(bp, ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN);
cpm2_unmap(bp);
}
@@ -113,7 +113,8 @@ cpm_setbrg(uint brg, uint rate)
void
cpm2_fastbrg(uint brg, uint rate, int div16)
{
- volatile uint *bp;
+ u32 __iomem *bp;
+ u32 val;
if (brg < 4) {
bp = cpm2_map_size(im_brgc1, 16);
@@ -123,10 +124,11 @@ cpm2_fastbrg(uint brg, uint rate, int div16)
brg -= 4;
}
bp += brg;
- *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
+ val = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
if (div16)
- *bp |= CPM_BRG_DIV16;
+ val |= CPM_BRG_DIV16;
+ out_be32(bp, val);
cpm2_unmap(bp);
}
@@ -135,8 +137,8 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock,
int mode)
int ret = 0;
int shift;
int i, bits = 0;
- cpmux_t *im_cpmux;
- u32 *reg;
+ cpmux_t __iomem *im_cpmux;
+ u32 __iomem *reg;
u32 mask = 7;
u8 clk_map [24][3] = {
{CPM_CLK_FCC1, CPM_BRG5, 0},
@@ -228,13 +230,33 @@ static spinlock_t cpm_dpmem_lock;
* until the memory subsystem goes up... */
static rh_block_t cpm_boot_dpmem_rh_block[16];
static rh_info_t cpm_dpmem_info;
-static u8* im_dprambase;
+static u8 __iomem *im_dprambase;
static void cpm2_dpinit(void)
{
- spin_lock_init(&cpm_dpmem_lock);
+ struct resource r;
+
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2");
+ if (!np)
+ panic("Cannot find CPM2 node");
- im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE +
CPM_DATAONLY_SIZE);
+ if (of_address_to_resource(np, 1, &r))
+ panic("Cannot get CPM2 resource 1");
+
+ of_node_put(np);
+#else
+ r.start = CPM_MAP_ADDR + CPM_DATAONLY_BASE;
+ r.end = r.start + CPM_DATAONLY_SIZE - 1;
+#endif
+
+ im_dprambase = ioremap(r.start, r.end - r.start + 1);
+ if (!im_dprambase)
+ panic("Cannot map DPRAM");
+
+ spin_lock_init(&cpm_dpmem_lock);
/* initialize the info header */
rh_init(&cpm_dpmem_info, 1,
@@ -248,7 +270,7 @@ static void cpm2_dpinit(void)
* varies with the processor and the microcode patches activated.
* But the following should be at least safe.
*/
- rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
+ rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
}
/* This function returns an index into the DPRAM area.
@@ -303,6 +325,6 @@ EXPORT_SYMBOL(cpm_dpdump);
void *cpm_dpram_addr(unsigned long offset)
{
- return (void *)(im_dprambase + offset);
+ return (void __force *)(im_dprambase + offset);
}
EXPORT_SYMBOL(cpm_dpram_addr);
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index eabfe06..470ddd7 100644
--- a/arch/powerpc/sysde
[PATCH 2/9] cpm2: Fix off-by-one error in setbrg().
The hardware adds one to the BRG value to get the divider, so it must be subtracted by software. Signed-off-by: Scott Wood <[EMAIL PROTECTED]> --- arch/powerpc/sysdev/cpm2_common.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c index dbef50c..99ad1ed 100644 --- a/arch/powerpc/sysdev/cpm2_common.c +++ b/arch/powerpc/sysdev/cpm2_common.c @@ -102,7 +102,7 @@ cpm_setbrg(uint brg, uint rate) brg -= 4; } bp += brg; - out_be32(bp, ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN); + out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN); cpm2_unmap(bp); } -- 1.5.0.3 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/9] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c | 100 +++--
include/asm-powerpc/cpm2.h|5 ++-
2 files changed, 99 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c
b/arch/powerpc/sysdev/cpm2_common.c
index 99ad1ed..549da4b 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -140,7 +140,8 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock,
int mode)
cpmux_t __iomem *im_cpmux;
u32 __iomem *reg;
u32 mask = 7;
- u8 clk_map [24][3] = {
+
+ u8 clk_map[][3] = {
{CPM_CLK_FCC1, CPM_BRG5, 0},
{CPM_CLK_FCC1, CPM_BRG6, 1},
{CPM_CLK_FCC1, CPM_BRG7, 2},
@@ -164,8 +165,40 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock,
int mode)
{CPM_CLK_FCC3, CPM_CLK13, 4},
{CPM_CLK_FCC3, CPM_CLK14, 5},
{CPM_CLK_FCC3, CPM_CLK15, 6},
- {CPM_CLK_FCC3, CPM_CLK16, 7}
- };
+ {CPM_CLK_FCC3, CPM_CLK16, 7},
+ {CPM_CLK_SCC1, CPM_BRG1, 0},
+ {CPM_CLK_SCC1, CPM_BRG2, 1},
+ {CPM_CLK_SCC1, CPM_BRG3, 2},
+ {CPM_CLK_SCC1, CPM_BRG4, 3},
+ {CPM_CLK_SCC1, CPM_CLK11, 4},
+ {CPM_CLK_SCC1, CPM_CLK12, 5},
+ {CPM_CLK_SCC1, CPM_CLK3, 6},
+ {CPM_CLK_SCC1, CPM_CLK4, 7},
+ {CPM_CLK_SCC2, CPM_BRG1, 0},
+ {CPM_CLK_SCC2, CPM_BRG2, 1},
+ {CPM_CLK_SCC2, CPM_BRG3, 2},
+ {CPM_CLK_SCC2, CPM_BRG4, 3},
+ {CPM_CLK_SCC2, CPM_CLK11, 4},
+ {CPM_CLK_SCC2, CPM_CLK12, 5},
+ {CPM_CLK_SCC2, CPM_CLK3, 6},
+ {CPM_CLK_SCC2, CPM_CLK4, 7},
+ {CPM_CLK_SCC3, CPM_BRG1, 0},
+ {CPM_CLK_SCC3, CPM_BRG2, 1},
+ {CPM_CLK_SCC3, CPM_BRG3, 2},
+ {CPM_CLK_SCC3, CPM_BRG4, 3},
+ {CPM_CLK_SCC3, CPM_CLK5, 4},
+ {CPM_CLK_SCC3, CPM_CLK6, 5},
+ {CPM_CLK_SCC3, CPM_CLK7, 6},
+ {CPM_CLK_SCC3, CPM_CLK8, 7},
+ {CPM_CLK_SCC4, CPM_BRG1, 0},
+ {CPM_CLK_SCC4, CPM_BRG2, 1},
+ {CPM_CLK_SCC4, CPM_BRG3, 2},
+ {CPM_CLK_SCC4, CPM_BRG4, 3},
+ {CPM_CLK_SCC4, CPM_CLK5, 4},
+ {CPM_CLK_SCC4, CPM_CLK6, 5},
+ {CPM_CLK_SCC4, CPM_CLK7, 6},
+ {CPM_CLK_SCC4, CPM_CLK8, 7},
+ };
im_cpmux = cpm2_map(im_cpmux);
@@ -205,23 +238,80 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock,
int mode)
if (mode == CPM_CLK_RX)
shift += 3;
- for (i=0; i<24; i++) {
+ for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
if (clk_map[i][0] == target && clk_map[i][1] == clock) {
bits = clk_map[i][2];
break;
}
}
- if (i == sizeof(clk_map)/3)
+ if (i == ARRAY_SIZE(clk_map))
ret = -EINVAL;
bits <<= shift;
mask <<= shift;
+
out_be32(reg, (in_be32(reg) & ~mask) | bits);
cpm2_unmap(im_cpmux);
return ret;
}
+int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
+{
+ int ret = 0;
+ int shift;
+ int i, bits = 0;
+ cpmux_t __iomem *im_cpmux;
+ u8 __iomem *reg;
+ u8 mask = 3;
+
+ u8 clk_map[][3] = {
+ {CPM_CLK_SMC1, CPM_BRG1, 0},
+ {CPM_CLK_SMC1, CPM_BRG7, 1},
+ {CPM_CLK_SMC1, CPM_CLK7, 2},
+ {CPM_CLK_SMC1, CPM_CLK9, 3},
+ {CPM_CLK_SMC2, CPM_BRG2, 0},
+ {CPM_CLK_SMC2, CPM_BRG8, 1},
+ {CPM_CLK_SMC2, CPM_CLK4, 2},
+ {CPM_CLK_SMC2, CPM_CLK15, 3},
+ };
+
+ im_cpmux = cpm2_map(im_cpmux);
+
+ switch (target) {
+ case CPM_CLK_SMC1:
+ reg = &im_cpmux->cmx_smr;
+ mask = 3;
+ shift = 4;
+ break;
+ case CPM_CLK_SMC2:
+ reg = &im_cpmux->cmx_smr;
+ mask = 3;
+ shift = 0;
+ break;
+ default:
+ printk(KERN_ERR "cpm2_smc_clock_setup: invalid clock target\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
+ if (clk_map[i][0] == target && clk_map[i][1] == clock) {
+ bits = clk_map[i][2];
+ break;
+ }
+ }
+ if (i == ARRAY_SIZE(clk_map))
+ ret = -EINVAL;
+
+ bits <<= shift;
+ mask <<= shift;
+
+ out_8(reg, (in_8(reg) & ~mask) | bits);
+
+ cpm2_unmap(im_cpmux);
+ return ret;
+}
+
/*
* dpalloc / dpfree bits.
*/
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index c036506..41a45db
[PATCH 4/9] cpm2: Add cpm2_set_pin().
This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/cpm2_common.c | 33 +
include/asm-powerpc/cpm2.h|9 +
2 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c
b/arch/powerpc/sysdev/cpm2_common.c
index 549da4b..b8460c0 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -418,3 +418,36 @@ void *cpm_dpram_addr(unsigned long offset)
return (void __force *)(im_dprambase + offset);
}
EXPORT_SYMBOL(cpm_dpram_addr);
+
+struct cpm2_ioports {
+ u32 dir, par, sor, odr, dat;
+ u32 res[3];
+};
+
+void cpm2_set_pin(int port, int pin, int flags)
+{
+ struct cpm2_ioports __iomem *iop =
+ (struct cpm2_ioports __iomem *)&cpm2_immr->im_ioport;
+
+ pin = 1 << (31 - pin);
+
+ if (flags & CPM_PIN_OUTPUT)
+ setbits32(&iop[port].dir, pin);
+ else
+ clrbits32(&iop[port].dir, pin);
+
+ if (!(flags & CPM_PIN_GPIO))
+ setbits32(&iop[port].par, pin);
+ else
+ clrbits32(&iop[port].par, pin);
+
+ if (flags & CPM_PIN_SECONDARY)
+ setbits32(&iop[port].sor, pin);
+ else
+ clrbits32(&iop[port].sor, pin);
+
+ if (flags & CPM_PIN_OPENDRAIN)
+ setbits32(&iop[port].odr, pin);
+ else
+ clrbits32(&iop[port].odr, pin);
+}
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index 41a45db..d7b57ac 100644
--- a/include/asm-powerpc/cpm2.h
+++ b/include/asm-powerpc/cpm2.h
@@ -1247,5 +1247,14 @@ enum cpm_clk {
extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
extern int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock);
+#define CPM_PIN_INPUT 0
+#define CPM_PIN_OUTPUT1
+#define CPM_PIN_PRIMARY 0
+#define CPM_PIN_SECONDARY 2
+#define CPM_PIN_GPIO 4
+#define CPM_PIN_OPENDRAIN 8
+
+void cpm2_set_pin(int port, int pin, int flags);
+
#endif /* __CPM2__ */
#endif /* __KERNEL__ */
--
1.5.0.3
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[PATCH 5/9] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
m82xx_calibrate_decr(), mpc82xx_ads_show_cpuinfo(), and mpc82xx_halt() do
anything useful beyond what the generic code does.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/82xx/Makefile |1 -
arch/powerpc/platforms/82xx/mpc82xx.c | 109 -
arch/powerpc/platforms/82xx/mpc82xx_ads.c | 10 +--
arch/powerpc/platforms/82xx/pq2ads.h |6 --
4 files changed, 2 insertions(+), 124 deletions(-)
delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx.c
diff --git a/arch/powerpc/platforms/82xx/Makefile
b/arch/powerpc/platforms/82xx/Makefile
index d9fd4c8..534c353 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -1,5 +1,4 @@
#
# Makefile for the PowerPC 82xx linux kernel.
#
-obj-$(CONFIG_PPC_82xx) += mpc82xx.o
obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o
diff --git a/arch/powerpc/platforms/82xx/mpc82xx.c
b/arch/powerpc/platforms/82xx/mpc82xx.c
deleted file mode 100644
index c706871..000
--- a/arch/powerpc/platforms/82xx/mpc82xx.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * MPC82xx setup and early boot code plus other random bits.
- *
- * Author: Vitaly Bordug <[EMAIL PROTECTED]>
- *
- * Copyright (c) 2006 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-
-#include "pq2ads.h"
-
-static int __init get_freq(char *name, unsigned long *val)
-{
- struct device_node *cpu;
- const unsigned int *fp;
- int found = 0;
-
- /* The cpu node should have timebase and clock frequency properties */
- cpu = of_find_node_by_type(NULL, "cpu");
-
- if (cpu) {
- fp = of_get_property(cpu, name, NULL);
- if (fp) {
- found = 1;
- *val = *fp;
- }
-
- of_node_put(cpu);
- }
-
- return found;
-}
-
-void __init m82xx_calibrate_decr(void)
-{
- ppc_tb_freq = 12500;
- if (!get_freq("bus-frequency", &ppc_tb_freq)) {
- printk(KERN_ERR "WARNING: Estimating decrementer frequency "
- "(not found)\n");
- }
- ppc_tb_freq /= 4;
- ppc_proc_freq = 10;
- if (!get_freq("clock-frequency", &ppc_proc_freq))
- printk(KERN_ERR "WARNING: Estimating processor frequency"
- "(not found)\n");
-}
-
-void mpc82xx_ads_show_cpuinfo(struct seq_file *m)
-{
- uint pvid, svid, phid1;
- uint memsize = total_memory;
-
- pvid = mfspr(SPRN_PVR);
- svid = mfspr(SPRN_SVR);
-
- seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
- seq_printf(m, "Machine\t\t: %s\n", CPUINFO_MACHINE);
- seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
- seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
- /* Display cpu Pll setting */
- phid1 = mfspr(SPRN_HID1);
- seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-
- /* Display the amount of memory */
- seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
-}
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
index c0a0c56..64e8ca9 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
@@ -621,12 +621,6 @@ static void m82xx_restart(char *cmd)
while (1) ;
}
-static void m82xx_halt(void)
-{
- local_irq_disable();
- while (1) ;
-}
-
define_machine(mpc82xx_ads)
{
.name = "MPC82xx ADS",
@@ -635,6 +629,6 @@ define_machine(mpc82xx_ads)
.init_IRQ =mpc82xx_ads_pic_init,
.show_cpuinfo =mpc82xx_ads_show_cpuinfo,
.get_irq =cpm2_get_irq,
- .calibrate_decr =m82xx_calibrate_decr,
- .restart = m82xx_restart,.halt = m82xx_halt,
+ .calibrate_decr = generic_calibrate_decr,
+ .restart = m82xx_restart,
};
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h
b/arch/powerpc/platforms/82xx/pq2ads.h
index 6f749b7..8b67048 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -24,10 +24,6 @@
#include
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "Freescale Semiconductor"
-#define CPUINFO_MACHINE"PQ2 ADS PowerPC"
-
/* Backword-compatibility stuff for the drivers */
#define CPM_MAP_ADDR
[PATCH 6/9] mpc82xx: Rename mpc82xx_ads to mpc8272_ads.
This is just a rename patch; internal references to mpc82xx_ads will be
changed in the next one.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/82xx/Kconfig|8
arch/powerpc/platforms/82xx/Makefile |2 +-
.../82xx/{mpc82xx_ads.c => mpc8272_ads.c} |0
3 files changed, 5 insertions(+), 5 deletions(-)
rename arch/powerpc/platforms/82xx/{mpc82xx_ads.c => mpc8272_ads.c} (100%)
diff --git a/arch/powerpc/platforms/82xx/Kconfig
b/arch/powerpc/platforms/82xx/Kconfig
index 89fde43..f260c01 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,17 +1,17 @@
choice
prompt "82xx Board Type"
depends on PPC_82xx
- default MPC82xx_ADS
+ default MPC8272_ADS
-config MPC82xx_ADS
- bool "Freescale MPC82xx ADS"
+config MPC8272_ADS
+ bool "Freescale MPC8272 ADS"
select DEFAULT_UIMAGE
select PQ2ADS
select 8272
select 8260
select FSL_SOC
help
- This option enables support for the MPC8272 ADS board
+ This option enables support for the MPC8272 ADS board
endchoice
diff --git a/arch/powerpc/platforms/82xx/Makefile
b/arch/powerpc/platforms/82xx/Makefile
index 534c353..9b7c851 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -1,4 +1,4 @@
#
# Makefile for the PowerPC 82xx linux kernel.
#
-obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o
+obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
b/arch/powerpc/platforms/82xx/mpc8272_ads.c
similarity index 100%
rename from arch/powerpc/platforms/82xx/mpc82xx_ads.c
rename to arch/powerpc/platforms/82xx/mpc8272_ads.c
--
1.5.0.3
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[PATCH 7/9] mpc8272ads: Change references from 82xx_ADS to 8272_ADS.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/82xx/mpc8272_ads.c | 26 +-
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c
b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index 64e8ca9..994a859 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -1,5 +1,5 @@
/*
- * MPC82xx_ads setup and early boot code plus other random bits.
+ * MPC8272_ads setup and early boot code plus other random bits.
*
* Author: Vitaly Bordug <[EMAIL PROTECTED]>
* m82xx_restart fix by Wade Farnsworth <[EMAIL PROTECTED]>
@@ -64,7 +64,7 @@ static struct irq_host *pci_pic_host;
static struct device_node *pci_pic_node;
#endif
-static void __init mpc82xx_ads_pic_init(void)
+static void __init mpc8272_ads_pic_init(void)
{
struct device_node *np = of_find_compatible_node(NULL, "cpm-pic",
"CPM2");
struct resource r;
@@ -562,14 +562,14 @@ static void __init mpc82xx_add_bridge(struct device_node
*np)
/*
* Setup the architecture
*/
-static void __init mpc82xx_ads_setup_arch(void)
+static void __init mpc8272_ads_setup_arch(void)
{
#ifdef CONFIG_PCI
struct device_node *np;
#endif
if (ppc_md.progress)
- ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
+ ppc_md.progress("mpc8272_ads_setup_arch()", 0);
cpm2_reset();
/* Map I/O region to a 256MB BAT */
@@ -591,13 +591,13 @@ static void __init mpc82xx_ads_setup_arch(void)
#endif
if (ppc_md.progress)
- ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
+ ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0);
}
/*
* Called very early, device-tree isn't unflattened
*/
-static int __init mpc82xx_ads_probe(void)
+static int __init mpc8272_ads_probe(void)
{
/* We always match for now, eventually we should look at
* the flat dev tree to ensure this is the board we are
@@ -621,14 +621,14 @@ static void m82xx_restart(char *cmd)
while (1) ;
}
-define_machine(mpc82xx_ads)
+define_machine(mpc8272_ads)
{
- .name = "MPC82xx ADS",
- .probe = mpc82xx_ads_probe,
- .setup_arch =mpc82xx_ads_setup_arch,
- .init_IRQ =mpc82xx_ads_pic_init,
- .show_cpuinfo =mpc82xx_ads_show_cpuinfo,
- .get_irq =cpm2_get_irq,
+ .name = "MPC8272 ADS",
+ .probe = mpc8272_ads_probe,
+ .setup_arch = mpc8272_ads_setup_arch,
+ .init_IRQ = mpc8272_ads_pic_init,
+ .show_cpuinfo = mpc8272_ads_show_cpuinfo,
+ .get_irq = cpm2_get_irq,
.calibrate_decr = generic_calibrate_decr,
.restart = m82xx_restart,
};
--
1.5.0.3
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[PATCH 9/9] mpc82xx: Add pq2fads board support.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/pq2fads.dts | 240
arch/powerpc/configs/pq2fads_defconfig | 928
arch/powerpc/platforms/82xx/Kconfig| 11 +
arch/powerpc/platforms/82xx/Makefile |1 +
arch/powerpc/platforms/82xx/pq2fads.c | 202 +++
5 files changed, 1382 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/pq2fads.dts
create mode 100644 arch/powerpc/configs/pq2fads_defconfig
create mode 100644 arch/powerpc/platforms/82xx/pq2fads.c
diff --git a/arch/powerpc/boot/dts/pq2fads.dts
b/arch/powerpc/boot/dts/pq2fads.dts
new file mode 100644
index 000..4bdbc57
--- /dev/null
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -0,0 +1,240 @@
+/*
+ * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = "pq2fads";
+ compatible = "fsl,pq2fads";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ [EMAIL PROTECTED] {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = ;
+ i-cache-line-size = ;
+ d-cache-size = ;
+ i-cache-size = ;
+ timebase-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ CS: chipselect {
+ compatible = "fsl,pq2fads-chipselect",
+"fsl,mpc8280-chipselect",
+"fsl,pq2-chipselect";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ fsl,ctrl = <&CSCTRL>;
+
+ ranges = <0 0 fe00 0080
+ 1 0 f450 8000
+ 8 0 f820 8000>;
+
+ [EMAIL PROTECTED],0 {
+ device_type = "rom";
+ compatible = "direct-mapped";
+ reg = <0 0 80>;
+ probe-type = "JEDEC";
+ bank-width = <4>;
+ };
+
+ [EMAIL PROTECTED],0 {
+ reg = <1 0 20>;
+ compatible = "fsl,pq2fads-bcsr";
+ };
+
+ PCI_PIC: [EMAIL PROTECTED],0 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <8 0 8>;
+ compatible = "fsl,pq2ads-pci-pic";
+ interrupt-parent = <&PIC>;
+ interrupts = <18 8>;
+ };
+ };
+
+ PCI: [EMAIL PROTECTED] {
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ fsl,ctrl = <&PCICTRL>;
+ clock-frequency = ;
+ interrupt-map-mask = ;
+ interrupt-map = <
+ /* IDSEL 0x16 */
+b000 0 0 1 &PCI_PIC 0
+b000 0 0 2 &PCI_PIC 1
+b000 0 0 3 &PCI_PIC 2
+b000 0 0 4 &PCI_PIC 3
+
+ /* IDSEL 0x17 */
+b800 0 0 1 &PCI_PIC 4
+b800 0 0 2 &PCI_PIC 5
+b800 0 0 3 &PCI_PIC 6
+b800 0 0 4 &PCI_PIC 7
+
+ /* IDSEL 0x18 */
+c000 0 0 1 &PCI_PIC 8
+c000 0 0 2 &PCI_PIC 9
+c000 0 0 3 &PCI_PIC a
+c000 0 0 4 &PCI_PIC b>;
+
+ interrupt-parent = <&PIC>;
+ interrupts = <12 8>;
+ ranges = <4200 0 8000 8000 0 2000
+ 0200 0 a000 a000 0 2000
+ 0100 0 f600 0 0200>;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0>;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,mpc8280", "fsl,pq2-soc";
+ ranges = < f000 00053000>;
+
+ CSCTRL: chipselect {
+ compatible = "fsl,mpc8280-chipselect-ctrl",
+"fsl,pq2-chip
[PATCH 8/9] mpc82xx: Update mpc8272ads, and factor out PCI and reset.
1. PCI and reset are factored out into pq2.c. I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).
2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-pic.c.
3. The new CPM binding is used.
4. General cleanup.
Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
---
arch/powerpc/Kconfig |2 +-
arch/powerpc/boot/dts/mpc8272ads.dts | 321 +++--
arch/powerpc/configs/mpc8272_ads_defconfig | 380 ---
arch/powerpc/platforms/82xx/Kconfig |5 +
arch/powerpc/platforms/82xx/Makefile |2 +
arch/powerpc/platforms/82xx/mpc8272_ads.c| 671 +-
arch/powerpc/platforms/82xx/pq2.c| 93
arch/powerpc/platforms/82xx/pq2.h| 20 +
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 202
arch/powerpc/platforms/82xx/pq2ads.h |2 -
10 files changed, 816 insertions(+), 882 deletions(-)
create mode 100644 arch/powerpc/platforms/82xx/pq2.c
create mode 100644 arch/powerpc/platforms/82xx/pq2.h
create mode 100644 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 00099ef..d800d52 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -465,7 +465,7 @@ config PCI_8260
config 8260_PCI9
bool "Enable workaround for MPC826x erratum PCI 9"
- depends on PCI_8260 && !ADS8272
+ depends on PCI_8260 && !8272
default y
choice
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts
b/arch/powerpc/boot/dts/mpc8272ads.dts
index 4d09dca..bd751d7 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -11,7 +11,7 @@
/ {
model = "MPC8272ADS";
- compatible = "MPC8260ADS";
+ compatible = "fsl,mpc8272ads";
#address-cells = <1>;
#size-cells = <1>;
@@ -22,192 +22,219 @@
PowerPC,[EMAIL PROTECTED] {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = ;
+ i-cache-line-size = ;
+ d-cache-size = ;
+ i-cache-size = ;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- 32-bit;
};
};
- pci_pic: [EMAIL PROTECTED] {
- #address-cells = <0>;
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = ;
- built-in;
- device_type = "pci-pic";
+ CS: chipselect {
+ compatible = "fsl,mpc8272ads-chipselect",
+"fsl,mpc8272-chipselect",
+"fsl,pq2-chipselect";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ fsl,ctrl = <&CSCTRL>;
+
+ ranges = <0 0 fe00 0200
+ 1 0 f450 8000
+ 3 0 f820 8000>;
+
+ [EMAIL PROTECTED],0 {
+ device_type = "rom";
+ compatible = "direct-mapped";
+ reg = <0 0 200>;
+ probe-type = "JEDEC";
+ bank-width = <4>;
+ };
+
+ [EMAIL PROTECTED],0 {
+ reg = <1 0 20>;
+ compatible = "fsl,mpc8272ads-bcsr";
+ };
+
+ PCI_PIC: [EMAIL PROTECTED],0 {
+ compatible = "fsl,mpc8272ads-pci-pic",
+"fsl,pq2ads-pci-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <3 0 8>;
+ interrupt-parent = <&PIC>;
+ interrupts = <14 8>;
+ };
};
- memory {
- device_type = "memory";
- reg = < 400 f450 0020>;
+ PCI: [EMAIL PROTECTED] {
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ fsl,ctrl = <&PCICTRL>;
+ clock-frequency = ;
+ interrupt-map-mask = ;
+ interrupt-map = <
+ /* IDSEL 0x16 */
+b000 0 0 1 &PCI_PIC 0
+b000 0 0 2 &PCI_PIC 1
+
Re: RFC: issues concerning the next NAPI interface
From: Jan-Bernd Themann <[EMAIL PROTECTED]> Date: Tue, 28 Aug 2007 13:21:09 +0200 > So I guess one solution is to "force" an HW interrupt when two many > RQs are processed on the same CPU (when no IRQ pinning is > used). This is something the driver has to handle. No, the solution is to lock the interrupts onto one specific processor and don't move it around. That's what's causing all of the problems. And you can enforce this policy now in the driver even if just for testing by calling the set_affinity() interfaces on the interrupts your driver has. You can even walk over the cpu_online_map and choose a load distribution of your liking. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH, RFC] linkstation: implement standby
Implement suspend/resume for "mpc10x" compatible fsl host PCI controllers,
use it for linkstation standby. This is version 2, taking into account
comments to the previous version and re-implementing MPC10x suspend in a
separate pci driver.
Signed-off-by: Guennadi Liakhovetski <[EMAIL PROTECTED]>
---
On Sun, 26 Aug 2007, Stephen Rothwell wrote:
> On Sun, 26 Aug 2007 02:03:49 +0200 (CEST) Guennadi Liakhovetski <[EMAIL
> PROTECTED]> wrote:
> >
> > +fail:
>
> Unused label?
Removed.
On Mon, 27 Aug 2007, Tony Breeds wrote:
> On Sun, Aug 26, 2007 at 02:03:49AM +0200, Guennadi Liakhovetski wrote:
>
> > +static int __init ls_pm_init(void)
> > +{
> > + if (!machine_is(linkstation))
> > + return 0;
>
> This should probably be -ENODEV.
Fixed. The rest your comments are no longer relevant for this version,
since mpc10x_{suspend,resume} functions are not called directly from
linkstation.c, rather using late_suspend / early_resume (pci) hooks.
On Mon, 27 Aug 2007, Johannes Berg wrote:
> On Sun, 2007-08-26 at 02:03 +0200, Guennadi Liakhovetski wrote:
>
> > +#ifdef CONFIG_PM
>
> some of those probably want to be CONFIG_PM_SLEEP now.
Well, I wasn't sure when PM can be used not meaning PM_SLEEP, so, I left
PM for now. Can certainly change, if it really matters.
A couple more thing:
1. the driver is called mpc10x.c, but the comment says it is for MPC8241.
I don't know what PCI IDs other fsl chips have and which of them are
compatible with 824[15].
2. the probe function, that just returns 0 seems to be redundant, but
without it device-driver linking is incomplete and suspend/resume are not
called.
3. the patch(es) from Scott Wood that are required for this one are still
not merged, and I cannot remember having seen any comments / objections...
Thanks
Guennadi
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c
b/arch/powerpc/platforms/embedded6xx/linkstation.c
index ab9e3f9..eb214d0 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -196,3 +196,53 @@ define_machine(linkstation){
.halt = linkstation_halt,
.calibrate_decr = generic_calibrate_decr,
};
+
+#ifdef CONFIG_PM
+
+#include
+#include
+#include
+
+static int ls_pm_valid(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_STANDBY:
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+static int ls_pm_enter(suspend_state_t state)
+{
+ u64 tb;
+
+ /* Get timebase */
+ tb = get_tb();
+
+ /* put CPU to sleep, re-enabling interrupts */
+ mpc6xx_enter_sleep();
+
+ local_irq_disable();
+
+ set_tb(tb >> 32, tb & 0xul);
+
+ return 0;
+}
+
+static struct pm_ops ls_pm_ops = {
+ .valid = ls_pm_valid,
+ .enter = ls_pm_enter,
+};
+
+static int __init ls_pm_init(void)
+{
+ if (!machine_is(linkstation))
+ return -ENODEV;
+
+ pm_set_ops(&ls_pm_ops);
+ return 0;
+}
+
+device_initcall(ls_pm_init);
+#endif
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 7a1d6d5..4676cc8 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -39,3 +39,6 @@ config HT_IRQ
This allows native hypertransport devices to use interrupts.
If unsure say Y.
+
+config MPC10X_PM
+ def_bool FSL_SOC && PCI && PM
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 006054a..161e36b 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -43,6 +43,8 @@ obj-$(CONFIG_HOTPLUG) += setup-bus.o
obj-$(CONFIG_PCI_SYSCALL) += syscall.o
+obj-$(CONFIG_MPC10X_PM) += mpc10x.o
+
ifeq ($(CONFIG_PCI_DEBUG),y)
EXTRA_CFLAGS += -DDEBUG
endif
diff --git a/drivers/pci/mpc10x.c b/drivers/pci/mpc10x.c
index e9891df..6bd773b 100644
--- a/drivers/pci/mpc10x.c
+++ b/drivers/pci/mpc10x.c
@@ -0,0 +1,73 @@
+/*
+ * Power-management driver for MPC8241 host-PCI controller
+ *
+ * Copyright (C) 2007 G. Liakhovetski ([EMAIL PROTECTED])
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of
+ * any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+
+#defineMPC10X_LP_REF_EN(1<<12)
+#defineMPC10X_PM (1<<7)
+#define MPC10X_DOZE(1<<5)
+#defineMPC10X_NAP (1<<4)
+#defineMPC10X_SLEEP(1<<3)
+
+static int __devinit mpc10x_pm_probe(struct pci_dev *pdev,
+const struct pci_device_id *id)
+{
+ return 0;
+}
+
+static int mpc10x_pm_suspend_late(struct pci_dev *dev, pm_message_t state)
+{
+ u16 pmcr1;
+
+ pci_read_config_word(dev, 0x70, &pmcr1);
+ pmcr1 &= ~(MPC10X_DOZE | MPC10X_NAP);
+ pmcr1 |= MPC10X_PM | MPC10X_SLEEP | MPC10X_LP_REF_EN;
+ pci_write_config_wo
Re: wmb vs mmiowb
On Tue, Aug 28, 2007 at 03:56:28PM -0500, Brent Casavant wrote: > On Fri, 24 Aug 2007, Nick Piggin wrote: > > > And all platforms other than sn2 don't appear to reorder IOs after > > they leave the CPU, so only sn2 needs to do the mmiowb thing before > > spin_unlock. > > I'm sure all of the following is already known to most readers, but > I thought the paragraph above might potentially cause confusion as > to the nature of the problem mmiowb() is solving on SN2. So for > the record... > > SN2 does not reorder IOs issued from a single CPU (that would be > insane). Neither does it reorder IOs once they've reached the IO > fabric (equally insane). From an individual CPU's perspective, all > IOs that it issues to a device will arrive at that device in program > order. This is why I think mmiowb() is not like a Linux memory barrier. And I presume that the device would see IOs and regular stores from a CPU in program order, given the correct wmb()s? (but maybe I'm wrong... more below). > (In this entire message, all IOs are assumed to be memory-mapped.) > > The problem mmiowb() helps solve on SN2 is the ordering of IOs issued > from multiple CPUs to a single device. That ordering is undefined, as > IO transactions are not ordered across CPUs. That is, if CPU A issues > an IO at time T, and CPU B at time T+1, CPU B's IO may arrive at the > IO fabric before CPU A's IO, particularly if CPU B happens to be closer > than CPU B to the target IO bridge on the NUMA network. > > The simplistic method to solve this is a lock around the section > issuing IOs, thereby ensuring serialization of access to the IO > device. However, as SN2 does not enforce an ordering between normal > memory transactions and memory-mapped IO transactions, you cannot > be sure that an IO transaction will arrive at the IO fabric "on the > correct side" of the unlock memory transaction using this scheme. Hmm. So what if you had the following code executed by a single CPU: writel(data, ioaddr); wmb(); *mem = 10; Will the device see the io write before the store to mem? > Enter mmiowb(). > > mmiowb() causes SN2 to drain the pending IOs from the current CPU's > node. Once the IOs are drained the CPU can safely unlock a normal > memory based lock without fear of the unlock's memory write passing > any outstanding IOs from that CPU. mmiowb needs to have the disclaimer that it's probably wrong if called outside a lock, and it's probably wrong if called between two io writes (need a regular wmb() in that case). I think some drivers are getting this wrong. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
dtc: Fix summary calculation in testsuite
The bookkeeping for producing the testsuite summary (total number of tests passed, failed and so forth) is broken. It uses $? across several tests, but for checks after the first, the value of $? will no longer contain the original return code, but just that from the previous test. This patch fixes the problem. Signed-off-by: David Gibson <[EMAIL PROTECTED]> Index: dtc/tests/run_tests.sh === --- dtc.orig/tests/run_tests.sh 2007-08-29 12:04:11.0 +1000 +++ dtc/tests/run_tests.sh 2007-08-29 12:04:37.0 +1000 @@ -15,12 +15,15 @@ echo -n "$@: " if PATH=".:$PATH" $ENV "$@"; then tot_pass=$[tot_pass + 1] -elif [ "$?" == "1" ]; then - tot_config=$[tot_config + 1] -elif [ "$?" == "2" ]; then - tot_fail=$[tot_fail + 1] else - tot_strange=$[tot_strange + 1] + ret="$?" + if [ "$ret" == "1" ]; then + tot_config=$[tot_config + 1] + elif [ "$ret" == "2" ]; then + tot_fail=$[tot_fail + 1] + else + tot_strange=$[tot_strange + 1] + fi fi } -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
libfdt: Fix handling of trailing / in fdt_path_offset()
Currently, fdt_path_offset() returns FDL_ERR_BADOFFSET if given a path
with a trailing '/'. In particular this means that
fdt_path_offset("/") returns FDT_ERR_BADOFFSET rather than 0 as one
would expect.
This patch fixes the function to accept and ignore trailing '/'
characters. As well as allowing fdt_path_offset("/") this means that
fdt_path_offset("/foo/") will return the same as
fdt_path_offset("/foo") which seems in keeping with the principle of
least surprise.
This also adds a testcase to ensure that fdt_path_offset("/") returns
0 as it should.
Signed-off-by: David Gibson <[EMAIL PROTECTED]>
Index: dtc/tests/path_offset.c
===
--- dtc.orig/tests/path_offset.c2007-08-29 12:04:54.0 +1000
+++ dtc/tests/path_offset.c 2007-08-29 12:04:57.0 +1000
@@ -58,6 +58,7 @@
int main(int argc, char *argv[])
{
void *fdt;
+ int root_offset;
int subnode1_offset, subnode2_offset;
int subnode1_offset_p, subnode2_offset_p;
int subsubnode1_offset, subsubnode2_offset;
@@ -66,6 +67,13 @@
test_init(argc, argv);
fdt = load_blob_arg(argc, argv);
+ root_offset = fdt_path_offset(fdt, "/");
+ if (root_offset < 0)
+ FAIL("fdt_path_offset(\"/\") failed: %s",
+fdt_strerror(root_offset));
+ else if (root_offset != 0)
+ FAIL("fdt_path_offset(\"/\") returns incorrect offset %d",
+root_offset);
subnode1_offset = check_subnode(fdt, 0, "subnode1");
subnode2_offset = check_subnode(fdt, 0, "subnode2");
Index: dtc/libfdt/fdt_ro.c
===
--- dtc.orig/libfdt/fdt_ro.c2007-08-29 12:08:48.0 +1000
+++ dtc/libfdt/fdt_ro.c 2007-08-29 12:08:55.0 +1000
@@ -154,7 +154,7 @@
while (*p == '/')
p++;
if (! *p)
- return -FDT_ERR_BADPATH;
+ return offset;
q = strchr(p, '/');
if (! q)
q = end;
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Where to put tip to fix very jerky mouse on iBook G3?
Hi All, SHORT VERSION: -- 1. I had a problem with my USB mouse on an iBook G3. 2. It took a lot of hard work to solve the problem. 3. I'd like to know where to put my solution for others to find (and find easily! ;). For more details read on... LONG VERSION: - I am wondering where I should put this tip/solution I worked out for fixing a very jerky mouse pointer under X on my iBook G3. The problem goes something like this: - While running X (happens in both Gnome and KDE) - and using the mouse - the pointer will freeze - at irregular intervals - for about 0.5 sec or so - then jump, to where it (probably?) "should be" - by which point I have "over moved" the mouse - and missed the button I was trying to hit - all of which - results in a system which is very hard to use. I noted that the problem was *less* pronounced when the system was under heavy load (eg. by running system monitor - which takes a lot of CPU!). This made sense once I discovered the cause of the jerkiness. The specs of the machine/setup are: - Apple iBook G3 600MHz - 384 MB RAM - USB Mouse Connected - Debian Etch (4.0) And uname -a gives: >> Linux ibook3 2.6.18-5-powerpc #1 Sun Aug 12 21:01:27 UTC 2007 ppc GNU/Linux So, as for the solution... It turns out the cause is apparently the CPU frequency switching done by (power saving part of) the linux kernel. I don't believe the issue is necessarily with the kernel itself, though I could be wrong. It seems more likely it is some hardware problem, where a CPU frequency change causes a pause in processing. And perhaps only with this generation and model of iBook? For anyone else who has this problem, my tip is to: - Try disabling the cpu frequency switching of the linux kernel. To do so, my current method is to execute: >> echo 60 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq This confines the governor to using a range between 600 and 600MHz, instead of between 400 and 600MHz as it is at bootup, which effectively disables frequency switching. It took me about 2 days to work out the cause and above solution. I actually found one very fleeting hint indicating a link between such system hiccups and CPU frequency changes on a website while Googling early one, but it was another 1.5 days before, after trying a bunch of other methods, I decided I really should work out if completely disabling it would do the trick. Playing with governors, which I did at various points, did seem to help some, but didn't make the problem disappear altogether. Unfortunately, no amount of Googling since then has brought up that "life saving" site, or any other that mentions anything similar. So I guess I was very lucky I found it! I also guess not too many other people have suffered this problem, since, as I said, I can't get much on Google about the issue. But just in case someone does try installing Debian + Linux 2.6 on an iBook G3 and does just happen to have the same problem crop up, I thought I should park my tip somewhere they would be able to find it. My question therefore is: > Where should we be putting such tips on issues with Linux on iBook hardware? Any and all advice is appreciated (including how to disable frequency switching permanently!). Cheers, Jarrod. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: wmb vs mmiowb
On Fri, 24 Aug 2007, Nick Piggin wrote: > And all platforms other than sn2 don't appear to reorder IOs after > they leave the CPU, so only sn2 needs to do the mmiowb thing before > spin_unlock. I'm sure all of the following is already known to most readers, but I thought the paragraph above might potentially cause confusion as to the nature of the problem mmiowb() is solving on SN2. So for the record... SN2 does not reorder IOs issued from a single CPU (that would be insane). Neither does it reorder IOs once they've reached the IO fabric (equally insane). From an individual CPU's perspective, all IOs that it issues to a device will arrive at that device in program order. (In this entire message, all IOs are assumed to be memory-mapped.) The problem mmiowb() helps solve on SN2 is the ordering of IOs issued from multiple CPUs to a single device. That ordering is undefined, as IO transactions are not ordered across CPUs. That is, if CPU A issues an IO at time T, and CPU B at time T+1, CPU B's IO may arrive at the IO fabric before CPU A's IO, particularly if CPU B happens to be closer than CPU B to the target IO bridge on the NUMA network. The simplistic method to solve this is a lock around the section issuing IOs, thereby ensuring serialization of access to the IO device. However, as SN2 does not enforce an ordering between normal memory transactions and memory-mapped IO transactions, you cannot be sure that an IO transaction will arrive at the IO fabric "on the correct side" of the unlock memory transaction using this scheme. Enter mmiowb(). mmiowb() causes SN2 to drain the pending IOs from the current CPU's node. Once the IOs are drained the CPU can safely unlock a normal memory based lock without fear of the unlock's memory write passing any outstanding IOs from that CPU. Brent -- Brent Casavant All music is folk music. I ain't [EMAIL PROTECTED]never heard a horse sing a song. Silicon Graphics, Inc.-- Louis Armstrong ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: wmb vs mmiowb
On Thu, 23 Aug 2007, Jesse Barnes wrote: > On Thursday, August 23, 2007 12:27 am Benjamin Herrenschmidt wrote: > > > Of course, the normal memory barrier would usually be a > > > "spin_unlock()" or something like that, not a "wmb()". In fact, I > > > don't think the powerpc implementation (as an example of this) will > > > actually synchronize with anything *but* a spin_unlock(). > > > > We are even more sneaky in the sense that we set a per-cpu flag on > > any MMIO write and do the sync automatically in spin_unlock() :-) > > Yeah, that's a reasonable thing to do, and in fact I think there's code > to do something similar when a task is switched out (this keeps user > level drivers from having do mmiowb() type things). Yes there is, git commit e08e6c521355cd33e647b2f739885bc3050eead6. On SN2 any user process performing memory-mapped IO directly to a device needs something like mmiowb() to be performed at the node of the CPU it last ran on when the task context switches onto a new CPU. The current code performs this action for all inter-CPU context switches, but we had discussed the possibility of targetting the action only when the user process has actually mapped a device for IO. I believe it was decided that this level of complexity wasn't warranted unless this simple solution was found to cause a problem. That reminds me. Are the people who are working on the user-level driver effort including a capability similar to mmiowb()? If we had that capability we could eventually do away with the change mentioned above. But that would come after all user-level drivers were coded to include the mmiowb()-like calls, and existing drivers which provide mmap() capability directly to hardware go away. Brent -- Brent Casavant All music is folk music. I ain't [EMAIL PROTECTED]never heard a horse sing a song. Silicon Graphics, Inc.-- Louis Armstrong ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: wmb vs mmiowb
> "Brent" == Brent Casavant <[EMAIL PROTECTED]> writes: Brent> That reminds me. Are the people who are working on the Brent> user-level driver effort including a capability similar to Brent> mmiowb()? If we had that capability we could eventually do Brent> away with the change mentioned above. But that would come Brent> after all user-level drivers were coded to include the Brent> mmiowb()-like calls, and existing drivers which provide mmap() Brent> capability directly to hardware go away. Not at present, because the platforms *I'm* mostly targetting at the moment don't need it. -- Dr Peter Chubb http://www.gelato.unsw.edu.au peterc AT gelato.unsw.edu.au http://www.ertos.nicta.com.au ERTOS within National ICT Australia ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Document and implement an improved flash device binding for powerpc
On Tue, Aug 28, 2007 at 01:39:26PM -0500, Josh Boyer wrote:
> On Tue, 28 Aug 2007 13:47:51 +1000
> David Gibson <[EMAIL PROTECTED]> wrote:
>
> > This patch replaces the binding for flash chips in
> > booting-without-of.txt with an clarified and improved version. It
> > also makes drivers/mtd/maps/physmap_of.c recognize this new binding.
> > Finally it revises the Ebony device tree source to use the new binding
> > as an example.
> >
> > Signed-off-by: David Gibson <[EMAIL PROTECTED]>
> > ---
> > I don't know that this is ready yet, but I thought I'd try to kick
> > along the rather stalled process of getting this new flash binding in
> > place by sending out my current draft.
> >
> > Index: working-2.6/Documentation/powerpc/booting-without-of.txt
> > ===
> > --- working-2.6.orig/Documentation/powerpc/booting-without-of.txt
> > 2007-08-28 13:25:42.0 +1000
> > +++ working-2.6/Documentation/powerpc/booting-without-of.txt
> > 2007-08-28 13:38:10.0 +1000
> > @@ -1757,45 +1757,46 @@ platforms are moved over to use the flat
> > };
> > };
> >
> > -j) Flash chip nodes
> > + j) CFI or JEDEC memory-mapped NOR flash
>
> > - Example:
> > -
> > - [EMAIL PROTECTED] {
> > - device_type = "rom";
> > - compatible = "direct-mapped";
> > - probe-type = "CFI";
> > - reg = ;
> > - bank-width = <4>;
> > - partitions = < 00f8
> > - 00f8 00080001>;
> > - partition-names = "fs\0firmware";
> > - };
>
> Instead of removing it completely, could you fix the example to match
> the new binding?
Oops, meant to do that. Done now.
> > + - compatible : should contain the specific model of flash chip(s)
> > + used, if known, followed by either "cfi-flash" or "jedec-flash"
> > + - reg : Address range of the flash chip
> > + - bank-width : Width (in bytes) of the flash bank. Equal to the
> > + device width times the number of interleaved chips.
> > + - device-width : (optional) Width of a single flash chip. If
> > + omitted, assumed to be equal to 'bank-width'.
>
> > + - #address-cells, #size-cells : Must be present if the flash has
> > + sub-nodes representing partitions (see below). In this case
> > + both #address-cells and #size-cells must be equal to 1.
>
> Why is that? Are we explicitly not caring about chips that are > 4
> GiB? I think MTD has a limitation here anyway, but it seems a bit
> short-sighted to explicitly limit what #address-cells can be.
>4GiB of NOR flash would be rather unusual (and pricey). I think it's
simplest to leave this in the binding for now - it's a restriction
which can easily be removed later without breaking backwards
compatibility.
> > +
> > +For JEDEC compatible devices, the following additional properties
> > +are defined:
> > +
> > + - vendor-id : Contains the flash chip's vendor id (1 byte).
> > + - device-id : Contains the flash chip's device id (1 byte).
> > +
> > +In addition to the information on the flash bank itself, the
> > +device tree may optionally contain additional information
> > +describing partitions of the flash address space. This can be
> > +used on platforms which have strong conventions about which
> > +portions of the flash are used for what purposes, but which don't
> > +use an on-flash partition table such as RedBoot.
> > +
> > +Each partitions is represented as a sub-node of the flash device.
>
> "Each partition.."
Oops, fixed.
> > Index: working-2.6/drivers/mtd/maps/physmap_of.c
> > ===
> > --- working-2.6.orig/drivers/mtd/maps/physmap_of.c 2007-08-28
> > 13:25:42.0 +1000
> > +++ working-2.6/drivers/mtd/maps/physmap_of.c 2007-08-28
> > 13:26:43.0 +1000
> > @@ -4,6 +4,9 @@
> > * Copyright (C) 2006 MontaVista Software Inc.
> > * Author: Vitaly Wool <[EMAIL PROTECTED]>
> > *
> > + * Revised to handle newer style flash binding by:
> > + * Copyright (C) 2007 David Gibson, IBM Corporation.
> > + *
> > * This program is free software; you can redistribute it and/or modify it
> > * under the terms of the GNU General Public License as published by the
> > * Free Software Foundation; either version 2 of the License, or (at your
> > @@ -30,56 +33,129 @@ struct physmap_flash_info {
> > struct map_info map;
> > struct resource *res;
> > #ifdef CONFIG_MTD_PARTITIONS
> > - int nr_parts;
> > struct mtd_partition*parts;
> > #endif
> > };
> >
> > -static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe",
> > "map_rom", NULL };
> > -#ifdef CONFIG_MTD_PARTITIONS
> > -static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
> > -#endif
> > -
> > #ifdef CONFIG_MTD_P
Re: [PATCH 1/3] fsl_soc.c cleanup
Hrm.. in future could you add a separate 0/N for each of your series, and make sure the In-Reply-To fields are right... as it is, my mailer has threaded together these 4 or so patch series you posted into one great wodge. -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/3] Introduce new CPM device bindings.
On Tue, Aug 28, 2007 at 03:16:19PM -0500, Scott Wood wrote:
> This introduces a new device binding for the CPM and other devices on
> these boards. Some of the changes include:
>
> 1. Proper namespace scoping for Freescale compatibles and properties.
>
> 2. Use compatible rather than things like device_type and model
> to determine which particular variant of a device is present.
>
> 3. Give the drivers the relevant CPM command word directly, rather than
> requiring it to have a lookup table based on device-id, SCC v. SMC, and
> CPM version.
>
> 4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.
>
> Boards that do not require the legacy bindings should select
> CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
> all existing boards are converted and tested, the config option can
> become default y to prevent new boards from using the old model. Once
> arch/ppc is gone, the config option can be removed altogether.
I think it would be better to change the name and reverse the sense of
this config option, since what it actually does is disable the old
binding, not enable the new one.
[snip]
> @@ -1824,6 +1827,170 @@ platforms are moved over to use the
> flattened-device-tree model.
> fsl,has-rstcr;
> };
>
> + l) Freescale Communications Processor Module
> +
> + NOTE: This is an interim binding, and will likely change slightly,
> + as more devices are supported. The QE bindings especially are
> + incomplete.
> +
> + i) Root CPM node
> +
> + Properties:
> + - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
> + - reg : The first resource is a 48-byte region beginning with
> + CPCR. The second is the available general-purpose
> + DPRAM.
> + - fsl,brg-frequency : the internal clock source frequency for baud-rate
> + generators in Hz.
> +
> + Example:
> + [EMAIL PROTECTED] {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #interrupt-cells = <2>;
> + compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
> + reg = <119c0 30 0 2000>;
> + bus-frequency = ;
> + }
Your example has bus-frequency, but lacks fsl,brg-frequency, in
contrast to the description above.
Since you have a separate brg node defined below, maybe
fsl,brg-frequency should just be replaced with a 'clock-frequency'
property in that subnode.
> + ii) Properties common to mulitple CPM/QE devices
> +
> + - fsl,cpm-command : This value is ORed with the opcode and command flag
> + to specify the device on which a CPM command operates.
> +
> + - fsl,cpm-brg : Indicates which baud rate generator the device
> + is associated with. If absent, an unused BRG
> + should be dynamically allocated.
Maybe a property with the brg node's phandle could be included as
well, to avoid having to hop up to the CPM node, then back down to the
brg-compatible node to find it?
Or maybe even have a separate subnode for each brg, and just have a
phandle to reference it from the other devices, rather than using this
index.
> +
> + - reg : Unless otherwise specified, the first resource represents the
> + scc/fcc/ucc registers, and the second represents the device's
> + parameter RAM region (if it has one).
> +
> + iii) Serial
> +
> + Currently defined compatibles:
> + - fsl,cpm1-smc-uart
> + - fsl,cpm2-smc-uart
> + - fsl,cpm1-scc-uart
> + - fsl,cpm2-scc-uart
> + - fsl,qe-uart
> +
> + Example:
> +
> + [EMAIL PROTECTED] {
> + device_type = "serial";
> + compatible = "fsl,mpc8272-scc-uart",
> + "fsl,cpm2-scc-uart";
> + reg = <11a00 20 8000 100>;
> + interrupts = <28 8>;
> + interrupt-parent = <&PIC>;
> + fsl,cpm-brg = <1>;
> + fsl,cpm-command = <0080>;
> + };
> +
> + iii) Network
> +
> + Currently defined compatibles:
> + - fsl,cpm1-scc-enet
> + - fsl,cpm2-scc-enet
> + - fsl,cpm1-fec-enet
> + - fsl,cpm2-fcc-enet (third resource is GFEMR)
> + - fsl,qe-enet
> +
> + Example:
> +
> + [EMAIL PROTECTED] {
> + device_type = "network";
> + compatible = "fsl,mpc8272-fcc-enet",
> + "fsl,cpm2-fcc-enet";
> + reg = <11300 20 8400 100 11390 1>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <20 8>;
> + interrupt-parent = <&PIC>;
> + phy-handle = <&PHY0>;
> + linux,network-index = <0>;
> + fsl,cpm-command = <12000300>;
> + };
Should this also have a phandle pointer to the mdio node?
> + iv) MDIO
> +
> + Currently defined compatibles:
> + fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
> + fsl,cpm2-mdio-bitbang (reg is port C registers)
> +
> + Properties for fsl,cpm2-mdio-bitbang:
> +
Re: [PATCH 3/3] Add early debug console for CPM serial ports.
On Tue, Aug 28, 2007 at 03:16:21PM -0500, Scott Wood wrote:
> This code assumes that the ports have been previously set up, with
> buffers in DPRAM, and the descriptor address defined by platform code.
>
> Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
> ---
> arch/powerpc/Kconfig.debug |9 +++
> arch/powerpc/kernel/head_32.S| 16 +
> arch/powerpc/kernel/udbg.c |2 +
> arch/powerpc/sysdev/Makefile |1 +
> arch/powerpc/sysdev/cpm_common.c | 44
> ++
> arch/powerpc/sysdev/cpm_common.h | 16 +
> include/asm-powerpc/udbg.h |1 +
> 7 files changed, 89 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/sysdev/cpm_common.c
> create mode 100644 arch/powerpc/sysdev/cpm_common.h
>
> diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
> index 22acece..d471154 100644
> --- a/arch/powerpc/Kconfig.debug
> +++ b/arch/powerpc/Kconfig.debug
> @@ -211,6 +211,15 @@ config PPC_EARLY_DEBUG_44x
> Select this to enable early debugging for IBM 44x chips via the
> inbuilt serial port.
>
> +config PPC_EARLY_DEBUG_CPM
> + bool "Early serial debugging for Freescale CPM-based serial ports"
> + depends on SERIAL_CPM
> + select PIN_TLB if PPC_8xx
I see this Kconfig line, but I don't see any code below that would set
up a suitable TLB on 8xx for the CPM...?
[snip]
> diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
> index 08ce31e..5063e74 100644
> --- a/arch/powerpc/sysdev/Makefile
> +++ b/arch/powerpc/sysdev/Makefile
> @@ -34,6 +34,7 @@ endif
>
> # Temporary hack until we have migrated to asm-powerpc
> ifeq ($(ARCH),powerpc)
> +obj-$(CONFIG_CPM1)$(CONFIG_CPM2) += cpm_common.o
Uh.. I don't think this will work properly. If CONFIG_CPM1 and
CONFIG_CPM2 are both enabled, it will set obj-yy rather than obj-y.
> obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
> obj-$(CONFIG_8xx)+= mpc8xx_pic.o commproc.o
> obj-$(CONFIG_UCODE_PATCH)+= micropatch.o
> diff --git a/arch/powerpc/sysdev/cpm_common.c
> b/arch/powerpc/sysdev/cpm_common.c
> new file mode 100644
> index 000..1972a8f
> --- /dev/null
> +++ b/arch/powerpc/sysdev/cpm_common.c
> @@ -0,0 +1,44 @@
> +/*
> + * Common CPM code
> + *
> + * Author: Scott Wood <[EMAIL PROTECTED]>
> + *
> + * Copyright 2007 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of version 2 of the GNU General Public License as
> + * published by the Free Software Foundation.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "cpm_common.h"
> +
> +#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
> +static void udbg_putc_cpm(char c)
> +{
> + u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
> +
> + if (c == '\n')
> + udbg_putc('\r');
> +
> + while (in_be32(&cpm_udbg_txdesc[0]) & 0x8000)
> + ;
> +
> + out_8(txbuf, c);
> + out_be32(&cpm_udbg_txdesc[0], 0xa001);
> +}
> +
> +void __init udbg_init_cpm(void)
> +{
> + if (cpm_udbg_txdesc) {
> +#ifdef CONFIG_CPM2
> + setbat(1, 0xf000, 0xf000, 1024*1024, _PAGE_IO);
> +#endif
> + udbg_putc = udbg_putc_cpm;
> + }
> +}
> +#endif
Since this is all udbg related, it could go (within an ifdef) into
udbg.c rather than creating a new file for it.
> diff --git a/arch/powerpc/sysdev/cpm_common.h
> b/arch/powerpc/sysdev/cpm_common.h
> new file mode 100644
> index 000..f42343f
> --- /dev/null
> +++ b/arch/powerpc/sysdev/cpm_common.h
> @@ -0,0 +1,16 @@
> +#ifndef _POWERPC_SYSDEV_CPM_COMMON_H
> +#define _POWERPC_SYSDEV_CPM_COMMON_H
> +
> +#include
> +
> +/*
> + * Board code must define this address if the early console is used.
> + *
> + * Note that this is not multi-platform safe, and thus the CPM
> + * UDBG console must only be enabled when only a single platform
> + * is selected. It is done this way because udbg init runs before
> + * platform probing.
> + */
> +extern u32 __iomem *cpm_udbg_txdesc;
Urg... this is ugly, because it looks like it can be muti-platform,
but actually isn't. I think a better approach is to set the magic
address as a Kconfig variable, as we do on 44x. This approach can
also be useful for hacking up early debug for new chips during the
process of creating platform code for them.
> +
> +#endif
> diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h
> index ce9d82f..a9e0b0e 100644
> --- a/include/asm-powerpc/udbg.h
> +++ b/include/asm-powerpc/udbg.h
> @@ -48,6 +48,7 @@ extern void __init udbg_init_rtas_console(void);
> extern void __init udbg_init_debug_beat(void);
> extern void __init udbg_init_btext(void);
> extern void __init udbg_init_44x_as1(void);
> +extern void __init udbg_init_cpm(void);
>
> #endif /* __KERNEL__ */
> #endif /* _ASM_POWERPC_UDBG_H */
--
David Gibson
Re: [PATCH 6/9] mpc82xx: Rename mpc82xx_ads to mpc8272_ads.
On Tue, Aug 28, 2007 at 03:19:26PM -0500, Scott Wood wrote:
> This is just a rename patch; internal references to mpc82xx_ads will be
> changed in the next one.
>
> Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
> ---
> arch/powerpc/platforms/82xx/Kconfig|8
> arch/powerpc/platforms/82xx/Makefile |2 +-
> .../82xx/{mpc82xx_ads.c => mpc8272_ads.c} |0
> 3 files changed, 5 insertions(+), 5 deletions(-)
> rename arch/powerpc/platforms/82xx/{mpc82xx_ads.c => mpc8272_ads.c} (100%)
>
> diff --git a/arch/powerpc/platforms/82xx/Kconfig
> b/arch/powerpc/platforms/82xx/Kconfig
> index 89fde43..f260c01 100644
> --- a/arch/powerpc/platforms/82xx/Kconfig
> +++ b/arch/powerpc/platforms/82xx/Kconfig
> @@ -1,17 +1,17 @@
> choice
> prompt "82xx Board Type"
> depends on PPC_82xx
> - default MPC82xx_ADS
> + default MPC8272_ADS
Not actually relevant to this patch, but we should be getting rid of
all these 'choice' things for board selection and instead allowing
each board to be separately enabled or disabled.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Document and implement an improved flash device binding
for powerpc (v3)
Reply-To:
This patch replaces the binding for flash chips in
booting-without-of.txt with an clarified and improved version. It
also makes drivers/mtd/maps/physmap_of.c recognize this new binding.
Finally it revises the Ebony device tree source to use the new binding
as an example.
Signed-off-by: David Gibson <[EMAIL PROTECTED]>
---
Third try at this...
Index: working-2.6/Documentation/powerpc/booting-without-of.txt
===
--- working-2.6.orig/Documentation/powerpc/booting-without-of.txt
2007-08-29 15:56:19.0 +1000
+++ working-2.6/Documentation/powerpc/booting-without-of.txt2007-08-29
16:10:32.0 +1000
@@ -50,7 +50,7 @@
g) Freescale SOC SEC Security Engines
h) Board Control and Status (BCSR)
i) Freescale QUICC Engine module (QE)
- j) Flash chip nodes
+ j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
VII - Specifying interrupt information for devices
@@ -1757,45 +1757,61 @@
};
};
-j) Flash chip nodes
+ j) CFI or JEDEC memory-mapped NOR flash
Flash chips (Memory Technology Devices) are often used for solid state
file systems on embedded devices.
-Required properties:
-
- - device_type : has to be "rom"
- - compatible : Should specify what this flash device is compatible with.
- Currently, this is most likely to be "direct-mapped" (which
- corresponds to the MTD physmap mapping driver).
- - reg : Offset and length of the register set (or memory mapping) for
- the device.
- - bank-width : Width of the flash data bus in bytes. Required
- for the NOR flashes (compatible == "direct-mapped" and others) ONLY.
-
-Recommended properties :
-
- - partitions : Several pairs of 32-bit values where the first value is
- partition's offset from the start of the device and the second one is
- partition size in bytes with LSB used to signify a read only
- partition (so, the partition size should always be an even number).
- - partition-names : The list of concatenated zero terminated strings
- representing the partition names.
- - probe-type : The type of probe which should be done for the chip
- (JEDEC vs CFI actually). Valid ONLY for NOR flashes.
+ - compatible : should contain the specific model of flash chip(s)
+ used, if known, followed by either "cfi-flash" or "jedec-flash"
+ - reg : Address range of the flash chip
+ - bank-width : Width (in bytes) of the flash bank. Equal to the
+ device width times the number of interleaved chips.
+ - device-width : (optional) Width of a single flash chip. If
+ omitted, assumed to be equal to 'bank-width'.
+ - #address-cells, #size-cells : Must be present if the flash has
+ sub-nodes representing partitions (see below). In this case
+ both #address-cells and #size-cells must be equal to 1.
+
+For JEDEC compatible devices, the following additional properties
+are defined:
+
+ - vendor-id : Contains the flash chip's vendor id (1 byte).
+ - device-id : Contains the flash chip's device id (1 byte).
+
+In addition to the information on the flash bank itself, the
+device tree may optionally contain additional information
+describing partitions of the flash address space. This can be
+used on platforms which have strong conventions about which
+portions of the flash are used for what purposes, but which don't
+use an on-flash partition table such as RedBoot.
+
+Each partition is represented as a sub-node of the flash device.
+Each node's name represents the name of the corresponding
+partition of the flash device.
+
+Flash partitions
+ - reg : The partition's offset and size within the flash bank.
+ - read-only : (optional) This parameter, if present, is a hint to
+ Linux that this flash partition should only be mounted
+ read-only. This is usually used for flash partitions
+ containing early-boot firmware images or data which should not
+ be clobbered.
- Example:
+Example:
- [EMAIL PROTECTED] {
- device_type = "rom";
- compatible = "direct-mapped";
- probe-type = "CFI";
- reg = ;
- bank-width = <4>;
- partitions = < 00f8
- 00f8 00080001>;
- partition-names = "fs\0firmware";
- };
+ [EMAIL PROTECTED] {
+ compatible = "amd,am29lv128ml", "cfi-flash";
+ reg = ;
+ bank-width = <4>;
+ [EMAIL PROTECTED] {
+ reg = <0 f8>;
+ };
+ [EMAIL PROTECTED] {
+ reg = ;
+ read-only;
+ };
+ };
k) Global Utilities Block
Index:
Re: [PATCH 1/4] PowerPC 440EPx: Sequoia bootwrapper
On Tue, Aug 28, 2007 at 08:56:10PM +0400, Valentine Barshak wrote:
> Bootwrapper code for AMCC PPC440EPx Sequoia.
>
> Signed-off-by: Valentine Barshak <[EMAIL PROTECTED]>
[snip]
> +static void sequoia_fixups(void)
> +{
> + unsigned long sysclk = ;
> +
> + ibm440ep_fixup_clocks(sysclk, 11059200);
> + ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
> + ibm4xx_denali_fixup_memsize();
> + dt_fixup_mac_addresses(sequoia_mac0, sequoia_mac1);
> +}
> +
> +static void sequoia_init(void *mac0, void *mac1)
No need to separate this function out, just drop it into
platform_init(). Also no need for the seqouia_mac* variables - they
were in ebony to handle the cuboot vs. openbios variants. For
sequoia, you can just pull the values straight from the bd_t in
sequoia_fixups()
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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