[PATCH] pinctrl: rockchip: don't disable clk when irq mask is already set
From: Jacob Chen
In some drivers, disable_irq() call don't be symmetric with enable_irq()
, disable_irq() will be called before call free_irq().
But both disable_irq() and free_irq() will call rockchip_irq_gc_mask_set_bit,
and clk_disable() will be called more times than clk_enable(), which will
cause bugs.
I think we can correct that by checking of mask.If mask is already set, do
nothing.
Change-Id: If19912c7658253e15531c04db6c70fdbffd5960a
Signed-off-by: Jacob Chen
---
drivers/pinctrl/pinctrl-rockchip.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c
b/drivers/pinctrl/pinctrl-rockchip.c
index c6c04ac..9a8804a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2334,8 +2334,12 @@ static void rockchip_irq_gc_mask_clr_bit(struct irq_data
*d)
void rockchip_irq_gc_mask_set_bit(struct irq_data *d)
{
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ struct irq_chip_type *ct = irq_data_get_chip_type(d);
struct rockchip_pin_bank *bank = gc->private;
+ if (*ct->mask_cache & d->mask)
+ return;
+
irq_gc_mask_set_bit(d);
clk_disable(bank->clk);
}
--
2.7.4
Re: [RFC PATCH] media: vb2: add bidirectional flag in vb2_queue
Hi,
2017-08-17 20:11 GMT+08:00 Stanimir Varbanov :
> Hi Laurent,
>
> On 08/16/2017 03:28 PM, Laurent Pinchart wrote:
>> Hi Stan,
>>
>> On Wednesday 16 Aug 2017 14:46:50 Stanimir Varbanov wrote:
>>> On 08/15/2017 01:04 PM, Hans Verkuil wrote:
On 08/14/17 10:41, Stanimir Varbanov wrote:
> Hi,
>
> This RFC patch is intended to give to the drivers a choice to change
> the default behavior of the v4l2-core DMA mapping direction from
> DMA_TO/FROM_DEVICE (depending on the buffer type CAPTURE or OUTPUT)
> to DMA_BIDIRECTIONAL during queue_init time.
>
> Initially the issue with DMA mapping direction has been found in
> Venus encoder driver where the firmware side of the driver adds few
> lines padding on bottom of the image buffer, and the consequence was
> triggering of IOMMU protection faults.
>
> Probably other drivers could also has a benefit of this feature (hint)
> in the future.
>
Just butt in.
some codec hardware also need it, which will use
capture buffers as reference to decode other buffers.
> Signed-off-by: Stanimir Varbanov
> ---
>
> drivers/media/v4l2-core/videobuf2-core.c | 3 +++
> include/media/videobuf2-core.h | 11 +++
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/media/v4l2-core/videobuf2-core.c
> b/drivers/media/v4l2-core/videobuf2-core.c index
> 14f83cecfa92..17d07fda4cdc 100644
> --- a/drivers/media/v4l2-core/videobuf2-core.c
> +++ b/drivers/media/v4l2-core/videobuf2-core.c
> @@ -200,6 +200,9 @@ static int __vb2_buf_mem_alloc(struct vb2_buffer *vb)
>
>int plane;
>int ret = -ENOMEM;
>
> + if (q->bidirectional)
> + dma_dir = DMA_BIDIRECTIONAL;
> +
Does this only have to be used in mem_alloc? In the __prepare_*() it is
still using DMA_TO/FROM_DEVICE.
>>>
>>> Yes, it looks like the DMA direction should be covered in the
>>> __prepare_* too. Thus the patch should look like below:
>>>
>>> diff --git a/drivers/media/v4l2-core/videobuf2-core.c
>>> b/drivers/media/v4l2-core/videobuf2-core.c
>>> index 14f83cecfa92..0089e7dac7dd 100644
>>> --- a/drivers/media/v4l2-core/videobuf2-core.c
>>> +++ b/drivers/media/v4l2-core/videobuf2-core.c
>>> @@ -188,14 +188,21 @@ module_param(debug, int, 0644);
>>> static void __vb2_queue_cancel(struct vb2_queue *q);
>>> static void __enqueue_in_driver(struct vb2_buffer *vb);
>>>
>>> +static enum dma_data_direction __get_dma_dir(struct vb2_queue *q)
>>> +{
>>> +if (q->bidirectional)
>>> +return DMA_BIDIRECTIONAL;
>>> +
>>> +return q->is_output ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
>>
>> We could also compute the DMA direction once only and store it in the queue.
>> I
>> have no big preference at the moment.
>
> Yes, I like the idea. I'll cook a regular patch where the DMA direction
> will be computed in vb2_core_queue_init().
>
> --
> regards,
> Stan
[PATCH v6 00/17] Rockchip ISP1 Driver
From: Jacob Chen changes in V6: - add mipi txrx phy support - remove bool and enum from uapi header - add buf_prepare op - correct some spelling problems - return all queued buffers when starting stream failed changes in V5: Sync with local changes, - fix the SP height limit - speed up the second stream capture - the second stream can't force sync for rsz when start/stop streaming - add frame id to param vb2 buf - enable luminance maximum threshold changes in V4: - fix some bugs during development - move quantization settings to rkisp1 subdev - correct some spelling problems - describe ports in dt-binding documents changes in V3: - add some comments - fix wrong use of v4l2_async_subdev_notifier_register - optimize two paths capture at a time - remove compose - re-struct headers - add a tmp wiki page: http://opensource.rock-chips.com/wiki_Rockchip-isp1 changes in V2: mipi-phy: - use async probing - make it be a child device of the GRF isp: - add dummy buffer - change the way to get bus configuration, which make it possible to add parallel sensor support in the future(without mipi-phy driver). This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 SoC. Wiki Pages: http://opensource.rock-chips.com/wiki_Rockchip-isp1 The deprecated g_mbus_config op is not dropped in V6 because i am waiting tomasz's patches. v4l2-compliance for V6(isp params/stats nodes are passed): v4l2-compliance SHA : 93dc5f20727fede5097d67f8b9adabe4b8046d5b Compliance test for device /dev/video0: Driver Info: Driver name : rkisp1 Card type: rkisp1 Bus info : platform:ff91.isp Driver version : 4.16.0 Capabilities : 0x84201000 Video Capture Multiplanar Streaming Extended Pix Format Device Capabilities Device Caps : 0x04201000 Video Capture Multiplanar Streaming Extended Pix Format Media Driver Info: Driver name : rkisp1 Model: rkisp1 Serial : Bus info : Media version: 4.16.0 Hardware revision: 0x (0) Driver version : 4.16.0 Interface Info: ID : 0x0307 Type : V4L Video Entity Info: ID : 0x0006 (6) Name : rkisp1_selfpath Function : V4L2 I/O Pad 0x0109 : Sink Link 0x0221: from remote pad 0x104 of entity 'rkisp1-isp-subdev': Data, Enabled Required ioctls: test MC information (see 'Media Driver Info' above): OK test VIDIOC_QUERYCAP: OK Allow for multiple opens: test second /dev/video0 open: OK test VIDIOC_QUERYCAP: OK test VIDIOC_G/S_PRIORITY: OK test for unlimited opens: OK Debug ioctls: test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported) test VIDIOC_LOG_STATUS: OK (Not Supported) Input ioctls: test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported) test VIDIOC_G/S_FREQUENCY: OK (Not Supported) test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported) test VIDIOC_ENUMAUDIO: OK (Not Supported) test VIDIOC_G/S/ENUMINPUT: OK test VIDIOC_G/S_AUDIO: OK (Not Supported) Inputs: 1 Audio Inputs: 0 Tuners: 0 Output ioctls: test VIDIOC_G/S_MODULATOR: OK (Not Supported) test VIDIOC_G/S_FREQUENCY: OK (Not Supported) test VIDIOC_ENUMAUDOUT: OK (Not Supported) test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported) test VIDIOC_G/S_AUDOUT: OK (Not Supported) Outputs: 0 Audio Outputs: 0 Modulators: 0 Input/Output configuration ioctls: test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported) test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported) test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported) test VIDIOC_G/S_EDID: OK (Not Supported) Control ioctls (Input 0): test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK test VIDIOC_QUERYCTRL: OK test VIDIOC_G/S_CTRL: OK test VIDIOC_G/S/TRY_EXT_CTRLS: OK test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK test VIDIOC_G/S_JPEGCOMP: OK (Not Supported) Standard Controls: 9 Private Controls: 0 Format ioctls (Input 0): test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK test VIDIOC_G/S_PARM: OK (Not Supported) test VIDIOC_G_FBUF: OK (Not Supported) fail: v4l2-test-formats.cpp(330): !colorspace
[PATCH v6 05/17] media: rkisp1: add Rockchip ISP1 subdev driver
From: Jacob Chen
Add the subdev driver for rockchip isp1.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/rkisp1.c | 1177 +
drivers/media/platform/rockchip/isp1/rkisp1.h | 105 +++
2 files changed, 1282 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.c
create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.h
diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c
b/drivers/media/platform/rockchip/isp1/rkisp1.c
new file mode 100644
index ..bb16c8118c16
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -0,0 +1,1177 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "common.h"
+#include "regs.h"
+
+#define CIF_ISP_INPUT_W_MAX4032
+#define CIF_ISP_INPUT_H_MAX3024
+#define CIF_ISP_INPUT_W_MIN32
+#define CIF_ISP_INPUT_H_MIN32
+#define CIF_ISP_OUTPUT_W_MAX CIF_ISP_INPUT_W_MAX
+#define CIF_ISP_OUTPUT_H_MAX CIF_ISP_INPUT_H_MAX
+#define CIF_ISP_OUTPUT_W_MIN CIF_ISP_INPUT_W_MIN
+#define CIF_ISP_OUTPUT_H_MIN CIF_ISP_INPUT_H_MIN
+
+/*
+ * NOTE: MIPI controller and input MUX are also configured in this file,
+ * because ISP Subdev is not only describe ISP submodule(input size,format,
output size, format),
+ * but also a virtual route device.
+ */
+
+/*
+ * There are many variables named with format/frame in below code,
+ * please see here for their meaning.
+ *
+ * Cropping regions of ISP
+ *
+ * +-+
+ * | Sensor image|
+ * | +---+ |
+ * | | ISP_ACQ (for black level) | |
+ * | | in_frm| |
+ * | | ++| |
+ * | | |ISP_OUT || |
+ * | | |in_crop || |
+ * | | |+-+ || |
+ * | | || ISP_IS| || |
+ * | | || rkisp1_isp_subdev: out_crop | || |
+ * | | |+-+ || |
+ * | | ++| |
+ * | +---+ |
+ * +-+
+ */
+
+static inline struct rkisp1_device *sd_to_isp_dev(struct v4l2_subdev *sd)
+{
+ return container_of(sd->v4l2_dev, struct rkisp1_device, v4l2_dev);
+}
+
+/* Get sensor by enabled media link */
+static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd)
+{
+ struct media_pad *local;
+ struct media_entity *sensor_me;
+
+ local = &sd->entity.pads[RKISP1_ISP_PAD_SINK];
+ sensor_me = media_entity_remote_pad(local)->entity;
+
+ return media_entity_to_v4l2_subdev(sensor_me);
+}
+
+static struct rkisp1_sensor_info *sd_to_sensor(struct rkisp1_device *dev,
+ struct v4l2_subdev *sd)
+{
+ int i;
+
+ for (i = 0; i < dev->num_sensors; ++i)
+ if (dev->sensors[i].sd == sd)
+ return &dev->sensors[i];
+
+ return NULL;
+}
+
+/ register operations /
+
+/*
+ * Image Stabilization.
+ * This should only be called when configuring CIF
+ * or at the frame end interrupt
+ */
+static void rkisp1_config_ism(struct rkisp1_device *dev)
+{
+ void __iomem *base = dev->base_addr;
+ struct v4l2_rect *out_crop = &dev->isp_sdev.out_crop;
+ u32 val;
+
+ writel(0, base + CIF_ISP_IS_RECENTER);
+ writel(0, base + CIF_ISP_IS_MAX_DX);
+ writel(0, base + CIF_ISP_IS_MAX_DY);
+ writel(0, base + CIF_ISP_IS_DISPLACE);
+ writel(out_crop->left, base + CIF_ISP_IS_H_OFFS);
+ writel(out_crop->top, base + CIF_ISP_IS_V_OFFS);
+ writel(out_crop->width, base + CIF_ISP_IS_H_SIZE);
+ writel(out_crop->height, base + CIF_ISP_IS_V_SIZE);
+
+ /* IS(Image Stabilization) is always on, working as output crop */
+ writel(1, base + CIF_ISP_IS_CTRL);
+ val = readl(base + CIF_ISP_CTRL);
+ val |= CIF_ISP_CTRL_ISP_CFG_UPD;
+ writel(val, base + CIF_ISP_CTRL);
+}
+
+/*
+ * configure isp blocks with input format, size..
+ */
+static int rkisp1_config_isp(struct rkisp1_device *dev)
+{
+ struct ispsd_in_fmt *in_fmt;
+ struct ispsd_out_
[PATCH v6 07/17] media: rkisp1: add ISP1 params driver
From: Jacob Chen
Add the output video driver that accept params from userspace.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/isp_params.c | 1539 +
drivers/media/platform/rockchip/isp1/isp_params.h | 49 +
2 files changed, 1588 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.h
diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c
b/drivers/media/platform/rockchip/isp1/isp_params.c
new file mode 100644
index ..747108e02836
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -0,0 +1,1539 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include/* for ISP params */
+#include "dev.h"
+#include "regs.h"
+
+#define RKISP1_ISP_PARAMS_REQ_BUFS_MIN 2
+#define RKISP1_ISP_PARAMS_REQ_BUFS_MAX 8
+
+#define BLS_START_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_H_MAX)
+#define BLS_STOP_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_H_MAX)
+
+#define BLS_START_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_V_MAX)
+#define BLS_STOP_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_V_MAX)
+
+#define BLS_SAMPLE_MAX_IS_VALID(val) ((val) < CIFISP_BLS_SAMPLES_MAX)
+
+#define BLS_FIX_SUB_IS_VALID(val) \
+ ((val) > (s16) CIFISP_BLS_FIX_SUB_MIN && (val) < CIFISP_BLS_FIX_SUB_MAX)
+
+#define RKISP1_ISP_DPCC_LINE_THRESH(n) (CIF_ISP_DPCC_LINE_THRESH_1 + 0x14 *
(n))
+#define RKISP1_ISP_DPCC_LINE_MAD_FAC(n) (CIF_ISP_DPCC_LINE_MAD_FAC_1 + 0x14 *
(n))
+#define RKISP1_ISP_DPCC_PG_FAC(n) (CIF_ISP_DPCC_PG_FAC_1 + 0x14 * (n))
+#define RKISP1_ISP_DPCC_RND_THRESH(n) (CIF_ISP_DPCC_RND_THRESH_1 + 0x14 * (n))
+#define RKISP1_ISP_DPCC_RG_FAC(n) (CIF_ISP_DPCC_RG_FAC_1 + 0x14 * (n))
+#define RKISP1_ISP_CC_COEFF(n) (CIF_ISP_CC_COEFF_0 + (n) * 4)
+
+static inline void rkisp1_iowrite32(struct rkisp1_isp_params_vdev *params_vdev,
+ u32 value, u32 addr)
+{
+ iowrite32(value, params_vdev->dev->base_addr + addr);
+}
+
+static inline u32 rkisp1_ioread32(struct rkisp1_isp_params_vdev *params_vdev,
+ u32 addr)
+{
+ return ioread32(params_vdev->dev->base_addr + addr);
+}
+
+static inline void isp_param_set_bits(struct rkisp1_isp_params_vdev
+*params_vdev,
+ u32 reg, u32 bit_mask)
+{
+ u32 val;
+
+ val = rkisp1_ioread32(params_vdev, reg);
+ rkisp1_iowrite32(params_vdev, val | bit_mask, reg);
+}
+
+static inline void isp_param_clear_bits(struct rkisp1_isp_params_vdev
+ *params_vdev,
+ u32 reg, u32 bit_mask)
+{
+ u32 val;
+
+ val = rkisp1_ioread32(params_vdev, reg);
+ rkisp1_iowrite32(params_vdev, val & ~bit_mask, reg);
+}
+
+/* ISP BP interface function */
+static void dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_dpcc_config *arg)
+{
+ unsigned int i;
+
+ rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_DPCC_MODE);
+ rkisp1_iowrite32(params_vdev, arg->output_mode,
+CIF_ISP_DPCC_OUTPUT_MODE);
+ rkisp1_iowrite32(params_vdev, arg->set_use, CIF_ISP_DPCC_SET_USE);
+
+ rkisp1_iowrite32(params_vdev, arg->methods[0].method,
+CIF_ISP_DPCC_METHODS_SET_1);
+ rkisp1_iowrite32(params_vdev, arg->methods[1].method,
+CIF_ISP_DPCC_METHODS_SET_2);
+ rkisp1_iowrite32(params_vdev, arg->methods[2].method,
+CIF_ISP_DPCC_METHODS_SET_3);
+ for (i = 0; i < CIFISP_DPCC_METHODS_MAX; i++) {
+ rkisp1_iowrite32(params_vdev, arg->methods[i].line_thresh,
+RKISP1_ISP_DPCC_LINE_THRESH(i));
+ rkisp1_iowrite32(params_vdev, arg->methods[i].line_mad_fac,
+RKISP1_ISP_DPCC_LINE_MAD_FAC(i));
+ rkisp1_iowrite32(params_vdev, arg->methods[i].pg_fac,
+RKISP1_ISP_DPCC_PG_FAC(i));
+ rkisp1_iowrite32(params_vdev, arg->methods[i].rnd_thresh,
+RKISP1_ISP_DPCC_RND_THRESH(i));
+ rkisp1_iowrite32(params_vdev, arg->methods[i].rg_fac,
+RKISP1_ISP_DPCC_RG_FAC(i));
+ }
+
+ rkisp1_iowrite32(params_vdev, arg->rnd_offs, CIF_ISP_DPCC_RND_OFFS);
[PATCH v6 02/17] media: doc: add document for rkisp1 meta buffer format
From: Jacob Chen This commit add docuemnt for rkisp1 meta buffer format Signed-off-by: Jacob Chen Acked-by: Hans Verkuil --- Documentation/media/uapi/v4l/meta-formats.rst| 2 ++ .../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 20 .../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 ++ 3 files changed, 40 insertions(+) create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/media/uapi/v4l/meta-formats.rst index 0c4e1ecf5879..44e7edbf1dae 100644 --- a/Documentation/media/uapi/v4l/meta-formats.rst +++ b/Documentation/media/uapi/v4l/meta-formats.rst @@ -15,3 +15,5 @@ These formats are used for the :ref:`metadata` interface only. pixfmt-meta-uvc pixfmt-meta-vsp1-hgo pixfmt-meta-vsp1-hgt +pixfmt-meta-rkisp1-params +pixfmt-meta-rkisp1-stat diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst new file mode 100644 index ..2ff4f4309795 --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst @@ -0,0 +1,20 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _v4l2-meta-fmt-rkisp1-params: + +*** +V4L2_META_FMT_RK_ISP1_PARAMS +*** + +Rockchip ISP1 Parameters Data + +Description +=== + +This format describes input parameters for the Rockchip ISP1. + +It uses c-struct :c:type:`rkisp1_isp_params_cfg`, which is defined in +the ``linux/rkisp1-config.h`` header file, see it for details. + +The parameters consist of multiple modules. +The module won't be updated if the correspond bit was not set in module_*_update. diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst new file mode 100644 index ..dca8befe58f1 --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst @@ -0,0 +1,18 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _v4l2-meta-fmt-rkisp1-stat: + +*** +V4L2_META_FMT_RK_ISP1_STAT_3A +*** + +Rockchip ISP1 Statistics Data + +Description +=== + +This format describes image color statistics information generated by the Rockchip +ISP1. + +It use c-struct :c:type:`rkisp1_stat_buffer`, which is defined in +the ``linux/cifisp_stat.h`` header file, see it for details. -- 2.16.1
[PATCH v6 09/17] media: rkisp1: add rockchip isp1 core driver
From: Jacob Chen
Add the core driver for rockchip isp1.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/Kconfig| 10 +
drivers/media/platform/Makefile | 1 +
drivers/media/platform/rockchip/isp1/Makefile | 8 +
drivers/media/platform/rockchip/isp1/common.h | 110 +
drivers/media/platform/rockchip/isp1/dev.c| 626 ++
drivers/media/platform/rockchip/isp1/dev.h| 93
6 files changed, 848 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/Makefile
create mode 100644 drivers/media/platform/rockchip/isp1/common.h
create mode 100644 drivers/media/platform/rockchip/isp1/dev.c
create mode 100644 drivers/media/platform/rockchip/isp1/dev.h
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 614fbef08ddc..3dff763b731d 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -117,6 +117,16 @@ config VIDEO_QCOM_CAMSS
select VIDEOBUF2_DMA_SG
select V4L2_FWNODE
+config VIDEO_ROCKCHIP_ISP1
+ tristate "Rockchip Image Signal Processing v1 Unit driver"
+ depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+ depends on ARCH_ROCKCHIP || COMPILE_TEST
+ select VIDEOBUF2_DMA_CONTIG
+ select V4L2_FWNODE
+ default n
+ ---help---
+ Support for ISP1 on the rockchip SoC.
+
config VIDEO_S3C_CAMIF
tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver"
depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index 7f3080437be6..0d5e1b3e6f22 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o
obj-$(CONFIG_VIDEO_RENESAS_JPU)+= rcar_jpu.o
obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
+obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip/isp1/
obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) += rockchip/rga/
obj-y += omap/
diff --git a/drivers/media/platform/rockchip/isp1/Makefile
b/drivers/media/platform/rockchip/isp1/Makefile
new file mode 100644
index ..18af64853734
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/Makefile
@@ -0,0 +1,8 @@
+obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += video_rkisp1.o
+video_rkisp1-objs += rkisp1.o \
+ dev.o \
+ regs.o \
+ isp_stats.o \
+ isp_params.o \
+ mipi_dphy_sy.o \
+ capture.o
diff --git a/drivers/media/platform/rockchip/isp1/common.h
b/drivers/media/platform/rockchip/isp1/common.h
new file mode 100644
index ..b58cdaf7da06
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/common.h
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _RKISP1_COMMON_H
+#define _RKISP1_COMMON_H
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RKISP1_DEFAULT_WIDTH 800
+#define RKISP1_DEFAULT_HEIGHT 600
+
+#define RKISP1_MAX_STREAM 2
+#define RKISP1_STREAM_SP 0
+#define RKISP1_STREAM_MP 1
+
+#define RKISP1_PLANE_Y 0
+#define RKISP1_PLANE_CB1
+#define RKISP1_PLANE_CR2
+
+enum rkisp1_sd_type {
+ RKISP1_SD_SENSOR,
+ RKISP1_SD_PHY_CSI,
+ RKISP1_SD_VCM,
+ RKISP1_SD_FLASH,
+ RKISP1_SD_MAX,
+};
+
+/* One structure per video node */
+struct rkisp1_vdev_node {
+ struct vb2_queue buf_queue;
+ /* vfd lock */
+ struct mutex vlock;
+ struct video_device vdev;
+ struct media_pad pad;
+};
+
+enum rkisp1_fmt_pix_type {
+ FMT_YUV,
+ FMT_RGB,
+ FMT_BAYER,
+ FMT_JPEG,
+ FMT_MAX
+};
+
+enum rkisp1_fmt_raw_pat_type {
+ RAW_RGGB = 0,
+ RAW_GRBG,
+ RAW_GBRG,
+ RAW_BGGR,
+};
+
+enum rkisp1_state {
+ /* path not yet opened: */
+ RKISP1_STATE_DISABLED,
+ /* path opened and configured, ready for streaming: */
+ RKISP1_STATE_READY,
+ /* path is streaming: */
+ RKISP1_STATE_STREAMING
+};
+
+struct rkisp1_buffer {
+ struct vb2_v4l2_buffer vb;
+ struct list_head queue;
+ union {
+ u32 buff_addr[VIDEO_MAX_PLANES];
+ void *vaddr[VIDEO_MAX_PLANES];
+ };
+};
+
+struct rkisp1_dummy_buffer {
+ void *vaddr;
+ dma_addr_t dma_addr;
+ u32 size;
+};
+
+extern int rkisp1_debu
[PATCH v6 03/17] media: rkisp1: Add user space ABI definitions
From: Jeffy Chen
Add the header for userspace
Signed-off-by: Jeffy Chen
Signed-off-by: Jacob Chen
---
include/uapi/linux/rkisp1-config.h | 798 +
1 file changed, 798 insertions(+)
create mode 100644 include/uapi/linux/rkisp1-config.h
diff --git a/include/uapi/linux/rkisp1-config.h
b/include/uapi/linux/rkisp1-config.h
new file mode 100644
index ..1284eb9fd09d
--- /dev/null
+++ b/include/uapi/linux/rkisp1-config.h
@@ -0,0 +1,798 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+/*
+ * References:
+ * REF_01 - ISP_user_manual, Rev 2.57
+ */
+
+#ifndef _UAPI_RKISP1_CONFIG_H
+#define _UAPI_RKISP1_CONFIG_H
+
+#include
+#include
+
+#define CIFISP_MODULE_DPCC (1 << 0)
+#define CIFISP_MODULE_BLS (1 << 1)
+#define CIFISP_MODULE_SDG (1 << 2)
+#define CIFISP_MODULE_HST (1 << 3)
+#define CIFISP_MODULE_LSC (1 << 4)
+#define CIFISP_MODULE_AWB_GAIN (1 << 5)
+#define CIFISP_MODULE_FLT (1 << 6)
+#define CIFISP_MODULE_BDM (1 << 7)
+#define CIFISP_MODULE_CTK (1 << 8)
+#define CIFISP_MODULE_GOC (1 << 9)
+#define CIFISP_MODULE_CPROC (1 << 10)
+#define CIFISP_MODULE_AFC (1 << 11)
+#define CIFISP_MODULE_AWB (1 << 12)
+#define CIFISP_MODULE_IE(1 << 13)
+#define CIFISP_MODULE_AEC (1 << 14)
+#define CIFISP_MODULE_WDR (1 << 15)
+#define CIFISP_MODULE_DPF (1 << 16)
+#define CIFISP_MODULE_DPF_STRENGTH (1 << 17)
+
+#define CIFISP_CTK_COEFF_MAX0x100
+#define CIFISP_CTK_OFFSET_MAX 0x800
+
+#define CIFISP_AE_MEAN_MAX 25
+#define CIFISP_HIST_BIN_N_MAX 16
+#define CIFISP_AFM_MAX_WINDOWS 3
+#define CIFISP_DEGAMMA_CURVE_SIZE 17
+
+#define CIFISP_BDM_MAX_TH 0xFF
+
+/*
+ * Black level compensation
+ */
+/* maximum value for horizontal start address */
+#define CIFISP_BLS_START_H_MAX 0x0FFF
+/* maximum value for horizontal stop address */
+#define CIFISP_BLS_STOP_H_MAX 0x0FFF
+/* maximum value for vertical start address */
+#define CIFISP_BLS_START_V_MAX 0x0FFF
+/* maximum value for vertical stop address */
+#define CIFISP_BLS_STOP_V_MAX 0x0FFF
+/* maximum is 2^18 = 262144*/
+#define CIFISP_BLS_SAMPLES_MAX 0x0012
+/* maximum value for fixed black level */
+#define CIFISP_BLS_FIX_SUB_MAX 0x0FFF
+/* minimum value for fixed black level */
+#define CIFISP_BLS_FIX_SUB_MIN 0xF000
+/* 13 bit range (signed)*/
+#define CIFISP_BLS_FIX_MASK0x1FFF
+
+/*
+ * Automatic white balance measurments
+ */
+#define CIFISP_AWB_MAX_GRID1
+#define CIFISP_AWB_MAX_FRAMES 7
+
+/*
+ * Gamma out
+ */
+/* Maximum number of color samples supported */
+#define CIFISP_GAMMA_OUT_MAX_SAMPLES 17
+
+/*
+ * Lens shade correction
+ */
+#define CIFISP_LSC_GRAD_TBL_SIZE 8
+#define CIFISP_LSC_SIZE_TBL_SIZE 8
+/*
+ * The following matches the tuning process,
+ * not the max capabilities of the chip.
+ * Last value unused.
+ */
+#defineCIFISP_LSC_DATA_TBL_SIZE 290
+
+/*
+ * Histogram calculation
+ */
+/* Last 3 values unused. */
+#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 28
+
+/*
+ * Defect Pixel Cluster Correction
+ */
+#define CIFISP_DPCC_METHODS_MAX 3
+
+/*
+ * Denoising pre filter
+ */
+#define CIFISP_DPF_MAX_NLF_COEFFS 17
+#define CIFISP_DPF_MAX_SPATIAL_COEFFS 6
+
+/*
+ * Measurement types
+ */
+#define CIFISP_STAT_AWB (1 << 0)
+#define CIFISP_STAT_AUTOEXP (1 << 1)
+#define CIFISP_STAT_AFM_FIN (1 << 2)
+#define CIFISP_STAT_HIST (1 << 3)
+
+enum cifisp_histogram_mode {
+ CIFISP_HISTOGRAM_MODE_DISABLE,
+ CIFISP_HISTOGRAM_MODE_RGB_COMBINED,
+ CIFISP_HISTOGRAM_MODE_R_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_G_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_B_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_Y_HISTOGRAM
+};
+
+enum cifisp_awb_mode_type {
+ CIFISP_AWB_MODE_MANUAL,
+ CIFISP_AWB_MODE_RGB,
+ CIFISP_AWB_MODE_YCBCR
+};
+
+enum cifisp_flt_mode {
+ CIFISP_FLT_STATIC_MODE,
+ CIFISP_FLT_DYNAMIC_MODE
+};
+
+/**
+ * enum cifisp_exp_ctrl_autostop - stop modes
+ * @CIFISP_EXP_CTRL_AUTOSTOP_0: continuous measurement
+ * @CIFISP_EXP_CTRL_AUTOSTOP_1: stop measuring after a complete frame
+ */
+enum cifisp_exp_ctrl_autostop {
+ CIFISP_EXP_CTRL_AUTOSTOP_0 = 0,
+ CIFISP_EXP_CTRL_AUTOSTOP_1 = 1,
+};
+
+/**
+ * enum cifisp_exp_meas_mode - Exposure measure mode
+ * @CIFISP_EXP_MEASURING_
[PATCH v6 11/17] dt-bindings: Document the Rockchip MIPI RX D-PHY bindings
From: Jacob Chen
Add DT bindings documentation for Rockchip MIPI D-PHY RX
Signed-off-by: Jacob Chen
Reviewed-by: Rob Herring
---
.../bindings/media/rockchip-mipi-dphy.txt | 90 ++
1 file changed, 90 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
new file mode 100644
index ..d83700faf4c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
@@ -0,0 +1,90 @@
+Rockchip SoC MIPI RX D-PHY
+-
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3288-mipi-dphy"
+ "rockchip,rk3399-mipi-dphy"
+- clocks : list of clock specifiers, corresponding to entries in
+ clock-names property;
+- clock-names: required clock name.
+
+MIPI RX D-PHY use registers in "general register files", it
+should be a child of the GRF.
+MIPI TXRX D-PHY have its own registers, it must have a reg property.
+
+Optional properties:
+- reg: offset and length of the register set for the device.
+- rockchip,grf: MIPI TX1RX1 D-PHY not only has its own register but also
+ the GRF, so it is only necessary for MIPI TX1RX1 D-PHY.
+
+port node
+---
+
+The device node should contain two 'port' child nodes, according to the
bindings
+defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+The first port show the sensors connected in this mipi-dphy.
+- endpoint:
+ - remote-endpoint: Linked to a sensor with a MIPI CSI-2 video bus.
+ - data-lanes : (required) an array specifying active physical MIPI-CSI2
+ data input lanes and their mapping to logical lanes; the
+ D-PHY can't reroute lanes, so the array's content should
+ be consecutive and only its length is meaningful.
+
+The port node must contain at least one endpoint. It could have multiple
endpoints
+linked to different sensors, but please note that they are not supposed to be
+activated at the same time.
+
+The second port should be connected to isp node.
+- endpoint:
+ - remote-endpoint: Linked to Rockchip ISP1, which is defined
+ in rockchip-isp1.txt.
+
+Device node example
+---
+
+grf: syscon@ff77 {
+ compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
+
+...
+
+ mipi_dphy_rx0: mipi-dphy-rx0 {
+ compatible = "rockchip,rk3399-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDPHY_REF>,
+ <&cru SCLK_DPHY_RX0_CFG>,
+ <&cru PCLK_VIO_GRF>;
+ clock-names = "dphy-ref", "dphy-cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in_wcam: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&wcam_out>;
+ data-lanes = <1 2>;
+ };
+ mipi_in_ucam: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&ucam_out>;
+ data-lanes = <1>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ dphy_rx0_out: endpoint {
+ remote-endpoint = <&isp0_mipi_in>;
+ };
+ };
+ };
+ };
+};
--
2.16.1
[PATCH v6 14/17] ARM: dts: rockchip: Add dts mipi-dphy TXRX1 node for rk3288
From: Wen Nuan
Change-Id: I0b6122b2b34ae0f24f0d4ac1bbe6018cac4e
Signed-off-by: Wen Nuan
---
arch/arm/boot/dts/rk3288.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 3a530b72c057..ed05f3d77358 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1164,6 +1164,15 @@
};
};
+ mipi_phy_tx1rx1: mipi-phy-tx1rx1@ff968000 {
+ compatible = "rockchip,rk3288-mipi-dphy";
+ reg = <0x0 0xff968000 0x0 0x4000>;
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>;
+ clock-names = "dphy-ref", "pclk";
+ status = "disabled";
+ };
+
edp: dp@ff97 {
compatible = "rockchip,rk3288-dp";
reg = <0x0 0xff97 0x0 0x4000>;
--
2.16.1
[PATCH v6 16/17] arm64: dts: rockchip: add rx0 mipi-phy for rk3399
From: Shunqian Zheng
It's a Designware MIPI D-PHY, used for ISP0 in rk3399.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 14ed016f2fdd..d18ab8f56ef2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1308,6 +1308,16 @@
status = "disabled";
};
+ mipi_dphy_rx0: mipi-dphy-rx0 {
+ compatible = "rockchip,rk3399-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDPHY_REF>,
+ <&cru SCLK_DPHY_RX0_CFG>,
+ <&cru PCLK_VIO_GRF>;
+ clock-names = "dphy-ref", "dphy-cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+ status = "disabled";
+ };
+
u2phy0: usb2-phy@e450 {
compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>;
--
2.16.1
[PATCH v6 17/17] MAINTAINERS: add entry for Rockchip ISP1 driver
From: Jacob Chen Add MAINTAINERS entry for the rockchip isp1 driver. This driver is maintained by rockchip officially and it will be used for rockchip SoC on all linux-kernel based OS. Signed-off-by: Jacob Chen --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 4623caf8d72d..7a9ff4fa4592 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11852,6 +11852,16 @@ F: drivers/hid/hid-roccat* F: include/linux/hid-roccat* F: Documentation/ABI/*/sysfs-driver-hid-roccat* +ROCKCHIP ISP V1 DRIVER +M: Jacob chen +M: Shunqian Zheng +M: Yichong Zhong +L: linux-me...@vger.kernel.org +S: Maintained +F: drivers/media/platform/rockchip/isp1/ +F: Documentation/devicetree/bindings/media/rockchip-isp1.txt +F: Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt + ROCKCHIP RASTER 2D GRAPHIC ACCELERATION UNIT DRIVER M: Jacob chen L: linux-me...@vger.kernel.org -- 2.16.1
[PATCH v6 13/17] ARM: dts: rockchip: add rx0 mipi-phy for rk3288
From: Jacob Chen
It's a Designware MIPI D-PHY, used by ISP in rk3288.
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6c122aaf06a7..3a530b72c057 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -864,6 +864,13 @@
status = "disabled";
};
+ mipi_phy_rx0: mipi-phy-rx0 {
+ compatible = "rockchip,rk3288-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>;
+ clock-names = "dphy-ref", "pclk";
+ status = "disabled";
+ };
+
io_domains: io-domains {
compatible = "rockchip,rk3288-io-voltage-domain";
status = "disabled";
--
2.16.1
[PATCH v6 15/17] arm64: dts: rockchip: add isp0 node for rk3399
From: Shunqian Zheng
rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 2605118d4b4c..14ed016f2fdd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1614,6 +1614,21 @@
status = "disabled";
};
+ isp0: isp0@ff91 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP0>,
+<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+ status = "disabled";
+ };
+
isp0_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.16.1
[PATCH v6 10/17] dt-bindings: Document the Rockchip ISP1 bindings
From: Jacob Chen
Add DT bindings documentation for Rockchip ISP1
Signed-off-by: Jacob Chen
Reviewed-by: Rob Herring
---
.../devicetree/bindings/media/rockchip-isp1.txt| 69 ++
1 file changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-isp1.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.txt
b/Documentation/devicetree/bindings/media/rockchip-isp1.txt
new file mode 100644
index ..4631a4b7c88a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-isp1.txt
@@ -0,0 +1,69 @@
+Rockchip SoC Image Signal Processing unit v1
+--
+
+Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs
+which contains image processing, scaling, and compression funcitons.
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3288-cif-isp";
+ "rockchip,rk3399-cif-isp";
+- reg : offset and length of the register set for the device.
+- interrupts: should contain ISP interrupt.
+- clocks: phandle to the required clocks.
+- clock-names: required clock name.
+- iommus: required a iommu node.
+
+port node
+---
+
+The device node should contain one 'port' child node with child 'endpoint'
+nodes, according to the bindings defined in Documentation/devicetree/bindings/
+media/video-interfaces.txt.
+
+- endpoint(parallel):
+ - remote-endpoint: Connecting to a sensor with a parallel video bus.
+ - parallel_bus properties: Refer to Documentation/devicetree/bindings/
+ media/video-interfaces.txt.
+- endpoint(mipi):
+ - remote-endpoint: Connecting to Rockchip MIPI-DPHY,
+ which is defined in rockchip-mipi-dphy.txt.
+
+The port node must contain at least one endpoint, either parallel or mipi.
+It could have multiple endpoints, but please note the hardware don't support
+two sensors work at a time, they are supposed to work asynchronously.
+
+Device node example
+---
+
+ isp0: isp0@ff91 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP0>,
+<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* mipi */
+ isp0_mipi_in: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&dphy_rx0_out>;
+ };
+
+ /* parallel */
+ isp0_parallel_in: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&ov5640_out>;
+ bus-width = <8>;
+ };
+ };
+ };
--
2.16.1
[PATCH v6 12/17] ARM: dts: rockchip: add isp node for rk3288
From: Jacob Chen
rk3288 have a Embedded 13M ISP
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ad6bda85c85a..6c122aaf06a7 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -962,6 +962,23 @@
status = "disabled";
};
+ isp: isp@ff91 {
+ compatible = "rockchip,rk3288-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP>, <&cru ACLK_ISP>,
+<&cru HCLK_ISP>, <&cru PCLK_ISP_IN>,
+<&cru SCLK_ISP_JPE>;
+ clock-names = "clk_isp", "aclk_isp",
+ "hclk_isp", "pclk_isp_in",
+ "sclk_isp_jpe";
+ assigned-clocks = <&cru SCLK_ISP>, <&cru SCLK_ISP_JPE>;
+ assigned-clock-rates = <4>, <4>;
+ power-domains = <&power RK3288_PD_VIO>;
+ iommus = <&isp_mmu>;
+ status = "disabled";
+ };
+
isp_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.16.1
[PATCH v6 08/17] media: rkisp1: add capture device driver
From: Jacob Chen
This is the capture device interface driver that provides the v4l2
user interface. Frames can be received from ISP1.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/capture.c | 1751
drivers/media/platform/rockchip/isp1/capture.h | 167 +++
drivers/media/platform/rockchip/isp1/regs.c| 239
drivers/media/platform/rockchip/isp1/regs.h| 1550 +
4 files changed, 3707 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/capture.c
create mode 100644 drivers/media/platform/rockchip/isp1/capture.h
create mode 100644 drivers/media/platform/rockchip/isp1/regs.c
create mode 100644 drivers/media/platform/rockchip/isp1/regs.h
diff --git a/drivers/media/platform/rockchip/isp1/capture.c
b/drivers/media/platform/rockchip/isp1/capture.c
new file mode 100644
index ..53484f882704
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -0,0 +1,1751 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "dev.h"
+#include "regs.h"
+
+/*
+ * NOTE:
+ * 1. There are two capture video devices in rkisp1, selfpath and mainpath
+ * 2. Two capture device have separated memory-interface/crop/scale units.
+ * 3. Besides describing stream hardware, this file also contain entries
+ *for pipeline operations.
+ * 4. The register read/write operations in this file are put into regs.c.
+ */
+
+/*
+ * differences between selfpatch and mainpath
+ * available mp sink input: isp
+ * available sp sink input : isp, dma(TODO)
+ * available mp sink pad fmts: yuv422, raw
+ * available sp sink pad fmts: yuv422, yuv420..
+ * available mp source fmts: yuv, raw, jpeg(TODO)
+ * available sp source fmts: yuv, rgb
+ */
+
+#define CIF_ISP_REQ_BUFS_MIN 1
+#define CIF_ISP_REQ_BUFS_MAX 8
+
+#define STREAM_PAD_SINK0
+#define STREAM_PAD_SOURCE 1
+
+#define STREAM_MAX_MP_RSZ_OUTPUT_WIDTH 4416
+#define STREAM_MAX_MP_RSZ_OUTPUT_HEIGHT3312
+#define STREAM_MAX_SP_RSZ_OUTPUT_WIDTH 1920
+#define STREAM_MAX_SP_RSZ_OUTPUT_HEIGHT1920
+#define STREAM_MIN_RSZ_OUTPUT_WIDTH32
+#define STREAM_MIN_RSZ_OUTPUT_HEIGHT 16
+
+#define STREAM_MAX_MP_SP_INPUT_WIDTH STREAM_MAX_MP_RSZ_OUTPUT_WIDTH
+#define STREAM_MAX_MP_SP_INPUT_HEIGHT STREAM_MAX_MP_RSZ_OUTPUT_HEIGHT
+#define STREAM_MIN_MP_SP_INPUT_WIDTH 32
+#define STREAM_MIN_MP_SP_INPUT_HEIGHT 32
+
+/* Get xsubs and ysubs for fourcc formats
+ *
+ * @xsubs: horizontal color samples in a 4*4 matrix, for yuv
+ * @ysubs: vertical color samples in a 4*4 matrix, for yuv
+ */
+static int fcc_xysubs(u32 fcc, u32 *xsubs, u32 *ysubs)
+{
+ switch (fcc) {
+ case V4L2_PIX_FMT_GREY:
+ case V4L2_PIX_FMT_YUV444M:
+ *xsubs = 1;
+ *ysubs = 1;
+ break;
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_YVYU:
+ case V4L2_PIX_FMT_VYUY:
+ case V4L2_PIX_FMT_YUV422P:
+ case V4L2_PIX_FMT_NV16:
+ case V4L2_PIX_FMT_NV61:
+ case V4L2_PIX_FMT_YVU422M:
+ *xsubs = 2;
+ *ysubs = 1;
+ break;
+ case V4L2_PIX_FMT_NV21:
+ case V4L2_PIX_FMT_NV12:
+ case V4L2_PIX_FMT_NV21M:
+ case V4L2_PIX_FMT_NV12M:
+ case V4L2_PIX_FMT_YUV420:
+ case V4L2_PIX_FMT_YVU420:
+ *xsubs = 2;
+ *ysubs = 2;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int mbus_code_xysubs(u32 code, u32 *xsubs, u32 *ysubs)
+{
+ switch (code) {
+ case MEDIA_BUS_FMT_YUYV8_2X8:
+ case MEDIA_BUS_FMT_YUYV8_1X16:
+ case MEDIA_BUS_FMT_YVYU8_1X16:
+ case MEDIA_BUS_FMT_UYVY8_1X16:
+ case MEDIA_BUS_FMT_VYUY8_1X16:
+ *xsubs = 2;
+ *ysubs = 1;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int mbus_code_sp_in_fmt(u32 code, u32 *format)
+{
+ switch (code) {
+ case MEDIA_BUS_FMT_YUYV8_2X8:
+ *format = MI_CTRL_SP_INPUT_YUV422;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct capture_fmt mp_fmts[] = {
+ /* yuv422 */
+ {
+ .fourcc = V4L2_PIX_FMT_YUYV,
+ .fmt_type = FMT_YUV,
+ .bpp = { 16 },
+ .cplanes = 1,
+ .mplanes = 1,
+ .uv_swap = 0,
+
[PATCH v6 06/17] media: rkisp1: add ISP1 statistics driver
From: Jacob Chen
Add the capture video driver for rockchip isp1 statistics block.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/isp_stats.c | 508 +++
drivers/media/platform/rockchip/isp1/isp_stats.h | 58 +++
2 files changed, 566 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.h
diff --git a/drivers/media/platform/rockchip/isp1/isp_stats.c
b/drivers/media/platform/rockchip/isp1/isp_stats.c
new file mode 100644
index ..3ba86ccbc42d
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/isp_stats.c
@@ -0,0 +1,508 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include/* for ISP statistics */
+#include "dev.h"
+#include "regs.h"
+
+#define RKISP1_ISP_STATS_REQ_BUFS_MIN 2
+#define RKISP1_ISP_STATS_REQ_BUFS_MAX 8
+
+static int rkisp1_stats_enum_fmt_meta_cap(struct file *file, void *priv,
+ struct v4l2_fmtdesc *f)
+{
+ struct video_device *video = video_devdata(file);
+ struct rkisp1_isp_stats_vdev *stats_vdev = video_get_drvdata(video);
+
+ if (f->index > 0 || f->type != video->queue->type)
+ return -EINVAL;
+
+ f->pixelformat = stats_vdev->vdev_fmt.fmt.meta.dataformat;
+ return 0;
+}
+
+static int rkisp1_stats_g_fmt_meta_cap(struct file *file, void *priv,
+ struct v4l2_format *f)
+{
+ struct video_device *video = video_devdata(file);
+ struct rkisp1_isp_stats_vdev *stats_vdev = video_get_drvdata(video);
+ struct v4l2_meta_format *meta = &f->fmt.meta;
+
+ if (f->type != video->queue->type)
+ return -EINVAL;
+
+ memset(meta, 0, sizeof(*meta));
+ meta->dataformat = stats_vdev->vdev_fmt.fmt.meta.dataformat;
+ meta->buffersize = stats_vdev->vdev_fmt.fmt.meta.buffersize;
+
+ return 0;
+}
+
+static int rkisp1_stats_querycap(struct file *file,
+void *priv, struct v4l2_capability *cap)
+{
+ struct video_device *vdev = video_devdata(file);
+
+ strlcpy(cap->driver, DRIVER_NAME, sizeof(cap->driver));
+ strlcpy(cap->card, vdev->name, sizeof(cap->card));
+ strlcpy(cap->bus_info, "platform: " DRIVER_NAME, sizeof(cap->bus_info));
+
+ return 0;
+}
+
+/* ISP video device IOCTLs */
+static const struct v4l2_ioctl_ops rkisp1_stats_ioctl = {
+ .vidioc_reqbufs = vb2_ioctl_reqbufs,
+ .vidioc_querybuf = vb2_ioctl_querybuf,
+ .vidioc_create_bufs = vb2_ioctl_create_bufs,
+ .vidioc_qbuf = vb2_ioctl_qbuf,
+ .vidioc_dqbuf = vb2_ioctl_dqbuf,
+ .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
+ .vidioc_expbuf = vb2_ioctl_expbuf,
+ .vidioc_streamon = vb2_ioctl_streamon,
+ .vidioc_streamoff = vb2_ioctl_streamoff,
+ .vidioc_enum_fmt_meta_cap = rkisp1_stats_enum_fmt_meta_cap,
+ .vidioc_g_fmt_meta_cap = rkisp1_stats_g_fmt_meta_cap,
+ .vidioc_s_fmt_meta_cap = rkisp1_stats_g_fmt_meta_cap,
+ .vidioc_try_fmt_meta_cap = rkisp1_stats_g_fmt_meta_cap,
+ .vidioc_querycap = rkisp1_stats_querycap,
+ .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
+ .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
+};
+
+struct v4l2_file_operations rkisp1_stats_fops = {
+ .mmap = vb2_fop_mmap,
+ .unlocked_ioctl = video_ioctl2,
+ .poll = vb2_fop_poll,
+ .open = v4l2_fh_open,
+ .release = vb2_fop_release
+};
+
+static int rkisp1_stats_vb2_queue_setup(struct vb2_queue *vq,
+ unsigned int *num_buffers,
+ unsigned int *num_planes,
+ unsigned int sizes[],
+ struct device *alloc_devs[])
+{
+ struct rkisp1_isp_stats_vdev *stats_vdev = vq->drv_priv;
+
+ *num_planes = 1;
+
+ *num_buffers = clamp_t(u32, *num_buffers, RKISP1_ISP_STATS_REQ_BUFS_MIN,
+ RKISP1_ISP_STATS_REQ_BUFS_MAX);
+
+ sizes[0] = sizeof(struct rkisp1_stat_buffer);
+
+ INIT_LIST_HEAD(&stats_vdev->stat);
+
+ return 0;
+}
+
+static void rkisp1_stats_vb2_buf_queue(struct vb2_buffer *vb)
+{
+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+ struct rkisp1_buffer *stats_buf = to_rkisp1_buffer(vbuf);
+ struct vb2_queue *vq = vb->vb2_queue;
+ struct rkisp1_isp_stats_vdev *stats_dev = vq->drv_
[PATCH v6 04/17] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
From: Jacob Chen
This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
---
.../media/platform/rockchip/isp1/mipi_dphy_sy.c| 868 +
.../media/platform/rockchip/isp1/mipi_dphy_sy.h| 15 +
2 files changed, 883 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.h
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
new file mode 100644
index ..32140960557a
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -0,0 +1,868 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip MIPI Synopsys DPHY driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RK3288_GRF_SOC_CON60x025c
+#define RK3288_GRF_SOC_CON80x0264
+#define RK3288_GRF_SOC_CON90x0268
+#define RK3288_GRF_SOC_CON10 0x026c
+#define RK3288_GRF_SOC_CON14 0x027c
+#define RK3288_GRF_SOC_STATUS210x02d4
+#define RK3288_GRF_IO_VSEL 0x0380
+#define RK3288_GRF_SOC_CON15 0x03a4
+
+#define RK3399_GRF_SOC_CON90x6224
+#define RK3399_GRF_SOC_CON21 0x6254
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_SOC_CON23 0x625c
+#define RK3399_GRF_SOC_CON24 0x6260
+#define RK3399_GRF_SOC_CON25 0x6264
+#define RK3399_GRF_SOC_STATUS1 0xe2a4
+
+#define CLOCK_LANE_HS_RX_CONTROL 0x34
+#define LANE0_HS_RX_CONTROL0x44
+#define LANE1_HS_RX_CONTROL0x54
+#define LANE2_HS_RX_CONTROL0x84
+#define LANE3_HS_RX_CONTROL0x94
+#define HS_RX_DATA_LANES_THS_SETTLE_CONTROL0x75
+
+/*
+ * CSI HOST
+ */
+#define CSIHOST_PHY_TEST_CTRL0 0x30
+#define CSIHOST_PHY_TEST_CTRL1 0x34
+#define CSIHOST_PHY_SHUTDOWNZ 0x08
+#define CSIHOST_DPHY_RSTZ 0x0c
+
+#define PHY_TESTEN_ADDR(0x1 << 16)
+#define PHY_TESTEN_DATA(0x0 << 16)
+#define PHY_TESTCLK(0x1 << 1)
+#define PHY_TESTCLR(0x1 << 0)
+#define THS_SETTLE_COUNTER_THRESHOLD 0x04
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
+enum mipi_dphy_sy_pads {
+ MIPI_DPHY_SY_PAD_SINK = 0,
+ MIPI_DPHY_SY_PAD_SOURCE,
+ MIPI_DPHY_SY_PADS_NUM,
+};
+
+enum dphy_reg_id {
+ GRF_DPHY_RX0_TURNDISABLE = 0,
+ GRF_DPHY_RX0_FORCERXMODE,
+ GRF_DPHY_RX0_FORCETXSTOPMODE,
+ GRF_DPHY_RX0_ENABLE,
+ GRF_DPHY_RX0_TESTCLR,
+ GRF_DPHY_RX0_TESTCLK,
+ GRF_DPHY_RX0_TESTEN,
+ GRF_DPHY_RX0_TESTDIN,
+ GRF_DPHY_RX0_TURNREQUEST,
+ GRF_DPHY_RX0_TESTDOUT,
+ GRF_DPHY_TX0_TURNDISABLE,
+ GRF_DPHY_TX0_FORCERXMODE,
+ GRF_DPHY_TX0_FORCETXSTOPMODE,
+ GRF_DPHY_TX0_TURNREQUEST,
+ GRF_DPHY_TX1RX1_TURNDISABLE,
+ GRF_DPHY_TX1RX1_FORCERXMODE,
+ GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
+ GRF_DPHY_TX1RX1_ENABLE,
+ GRF_DPHY_TX1RX1_MASTERSLAVEZ,
+ GRF_DPHY_TX1RX1_BASEDIR,
+ GRF_DPHY_TX1RX1_ENABLECLK,
+ GRF_DPHY_TX1RX1_TURNREQUEST,
+ GRF_DPHY_RX1_SRC_SEL,
+ /* rk3288 only */
+ GRF_CON_DISABLE_ISP,
+ GRF_CON_ISP_DPHY_SEL,
+ GRF_DSI_CSI_TESTBUS_SEL,
+ GRF_DVP_V18SEL,
+ /* below is for rk3399 only */
+ GRF_DPHY_RX0_CLK_INV_SEL,
+ GRF_DPHY_RX1_CLK_INV_SEL,
+};
+
+struct dphy_reg {
+ u32 offset;
+ u32 mask;
+ u32 shift;
+};
+
+#define PHY_REG(_offset, _width, _shift) \
+ { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
+
+static const struct dphy_reg rk3399_grf_dphy_regs[] = {
+ [GRF_DPHY_RX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON9, 4, 0),
+ [GRF_DPHY_RX0_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 10),
+ [GRF_DPHY_RX1_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 11),
+ [GRF_DPHY_RX0_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 0),
+ [GRF_DPHY_RX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 4),
+ [GRF_DPHY_RX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 8),
+ [GRF_DPHY_RX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 12),
+ [GRF_DPHY_TX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 0),
+ [GRF_DPHY_TX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 4),
+ [GRF_DPHY_TX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 8),
+ [GRF_DPHY_TX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 12),
+ [GRF_DPHY_TX1RX1_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 0),
+ [GRF_DPHY_TX1RX1_FORCERXMODE]
[PATCH v6 01/17] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
Acked-by: Hans Verkuil
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index 1be54429d601..bdd469290d66 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1257,6 +1257,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_META_FMT_VSP1_HGO:descr = "R-Car VSP1 1-D Histogram";
break;
case V4L2_META_FMT_VSP1_HGT:descr = "R-Car VSP1 2-D Histogram";
break;
case V4L2_META_FMT_UVC: descr = "UVC payload header metadata";
break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A
params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A
statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index e20d10df75c1..359ad8bbf9bf 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -698,6 +698,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VSP1_HGTv4l2_fourcc('V', 'S', 'P', 'T') /* R-Car
VSP1 2-D Histogram */
#define V4L2_META_FMT_UVC v4l2_fourcc('U', 'V', 'C', 'H') /* UVC
Payload Header metadata */
+/* Vendor specific - used for IPU3 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC0xfeedcafe
--
2.16.1
Re: [PATCH v5 02/16] media: doc: add document for rkisp1 meta buffer format
Hi Hans, 2018-02-06 22:27 GMT+08:00 Hans Verkuil : > On 12/29/17 08:52, Shunqian Zheng wrote: >> From: Jacob Chen >> >> This commit add docuemnt for rkisp1 meta buffer format >> >> Signed-off-by: Jacob Chen >> --- >> Documentation/media/uapi/v4l/meta-formats.rst | 2 ++ >> .../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 >> + >> .../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 >> ++ >> 3 files changed, 37 insertions(+) >> create mode 100644 >> Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst >> create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst >> >> diff --git a/Documentation/media/uapi/v4l/meta-formats.rst >> b/Documentation/media/uapi/v4l/meta-formats.rst >> index 01e24e3..1b82814 100644 >> --- a/Documentation/media/uapi/v4l/meta-formats.rst >> +++ b/Documentation/media/uapi/v4l/meta-formats.rst >> @@ -14,3 +14,5 @@ These formats are used for the :ref:`metadata` interface >> only. >> >> pixfmt-meta-vsp1-hgo >> pixfmt-meta-vsp1-hgt >> +pixfmt-meta-rkisp1-params >> +pixfmt-meta-rkisp1-stat >> diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst >> b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst >> new file mode 100644 >> index 000..ed344d4 >> --- /dev/null >> +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst >> @@ -0,0 +1,17 @@ >> +.. -*- coding: utf-8; mode: rst -*- >> + >> +.. _v4l2-meta-fmt-rkisp1-params: >> + >> +*** >> +V4L2_META_FMT_RK_ISP1_PARAMS >> +*** >> + >> +Rockchip ISP1 Parameters Data >> + >> +Description >> +=== >> + >> +This format describes input parameters for the Rockchip ISP1. >> + >> +The data use c-struct :c:type:`rkisp1_isp_params_cfg`, which is defined in >> +the ``linux/rkisp1-config.h`` header file, See it for details. > > One more question: does the ISP produce a reasonable picture if it doesn't > receive these params? If not (i.e. you always need to provide params), then > I think you should provide a default rkisp1_isp_params_cfg struct that > can be used as a template for application writers. > > Perhaps it can be part of the driver as the initial params config. > > I think even if the ISP does work without params it is still worthwhile > doing this. The params are complex and having an example on how to initialize > it would be helpful. > The ISP don't need a default rkisp1_isp_params_cfg to produce picture, those params just effect image quality and stats data. The params are not very complex. They consist of multiple modules and each of modules can be enabled/disable/updated individually. > Regards, > > Hans > >> diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst >> b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst >> new file mode 100644 >> index 000..5ecc403 >> --- /dev/null >> +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst >> @@ -0,0 +1,18 @@ >> +.. -*- coding: utf-8; mode: rst -*- >> + >> +.. _v4l2-meta-fmt-rkisp1-stat: >> + >> +*** >> +V4L2_META_FMT_RK_ISP1_STAT_3A >> +*** >> + >> +Rockchip ISP1 Statistics Data >> + >> +Description >> +=== >> + >> +This format describes image color statistics information generated by the >> Rockchip >> +ISP1. >> + >> +The data use c-struct :c:type:`rkisp1_stat_buffer`, which is defined in >> +the ``linux/cifisp_stat.h`` header file, See it for details. >> >
Re: [PATCH v5 03/16] media: rkisp1: Add user space ABI definitions
Hi Hans, 2018-02-07 20:00 GMT+08:00 Hans Verkuil : > On 12/29/17 08:52, Shunqian Zheng wrote: >> From: Jeffy Chen >> >> Add the header for userspace > > General note: I saw four cases where this documentation referred to the > datasheet. Three comments on that: > > 1) You don't say which datasheet. > 2) I assume the datasheet is under NDA? This datasheet can't be got by customers, even under NDA. > 3) You do need to give enough information so a reasonable default can be >used. I mentioned in an earlier review that creating an initial params >struct that can be used as a templete would be helpful (or even >required), and that would be a good place to put such defaults. > It don't need a default config For applcation writers, they can just init it with zero data, and only set value for the part they concerned. As for ABI, i have checked there is no mismatches. Those structures is 32 bit aligned both in 64bit/32bit env, since there is no 64bit value. "__attribute__ ((packed))" can avoid mismatches happen when we add a 64bit value to those structures. As robin said, enums and bools are not guaranteed to be consistent between different compiler, so it's a potential risk. I have replace bools with unsigned char and enums with unsigned int. > Regards, > > Hans
Re: [PATCH v6 00/17] Rockchip ISP1 Driver
Hi Baruch, 2018-03-08 20:02 GMT+08:00 Baruch Siach : > Hi Jacob, > > On Thu, Mar 08, 2018 at 05:47:50PM +0800, Jacob Chen wrote: >> This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 >> SoC. >> >> Wiki Pages: >> http://opensource.rock-chips.com/wiki_Rockchip-isp1 >> >> The deprecated g_mbus_config op is not dropped in V6 because i am waiting >> tomasz's patches. > > Which tree is this series based on? On top of v4.16-rc4 I get the build > failure below. The V4L2_BUF_TYPE_META_OUTPUT macro, for example, is not even > in media_tree.git. > This series is based on v4.16-rc4 with below patch. https://patchwork.kernel.org/patch/9792001/ > drivers/media/platform/rockchip/isp1/isp_params.c:1321:3: error: ‘const > struct v4l2_ioctl_ops’ has no member named ‘vidioc_enum_fmt_meta_out’; did > you mean ‘vidioc_enum_fmt_meta_cap’? > .vidioc_enum_fmt_meta_out = rkisp1_params_enum_fmt_meta_out, >^~~~ >vidioc_enum_fmt_meta_cap > drivers/media/platform/rockchip/isp1/isp_params.c:1321:30: error: > initialization from incompatible pointer type > [-Werror=incompatible-pointer-types] > .vidioc_enum_fmt_meta_out = rkisp1_params_enum_fmt_meta_out, > ^~~ > drivers/media/platform/rockchip/isp1/isp_params.c:1321:30: note: (near > initialization for ‘rkisp1_params_ioctl.vidioc_g_std’) > drivers/media/platform/rockchip/isp1/isp_params.c:1322:3: error: ‘const > struct v4l2_ioctl_ops’ has no member named ‘vidioc_g_fmt_meta_out’; did you > mean ‘vidioc_g_fmt_meta_cap’? > .vidioc_g_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >^ >vidioc_g_fmt_meta_cap > drivers/media/platform/rockchip/isp1/isp_params.c:1322:27: error: > initialization from incompatible pointer type > [-Werror=incompatible-pointer-types] > .vidioc_g_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >^~~~ > drivers/media/platform/rockchip/isp1/isp_params.c:1322:27: note: (near > initialization for ‘rkisp1_params_ioctl.vidioc_s_std’) > drivers/media/platform/rockchip/isp1/isp_params.c:1323:3: error: ‘const > struct v4l2_ioctl_ops’ has no member named ‘vidioc_s_fmt_meta_out’; did you > mean ‘vidioc_s_fmt_meta_cap’? > .vidioc_s_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >^ >vidioc_s_fmt_meta_cap > drivers/media/platform/rockchip/isp1/isp_params.c:1323:27: error: > initialization from incompatible pointer type > [-Werror=incompatible-pointer-types] > .vidioc_s_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >^~~~ > drivers/media/platform/rockchip/isp1/isp_params.c:1323:27: note: (near > initialization for ‘rkisp1_params_ioctl.vidioc_querystd’) > drivers/media/platform/rockchip/isp1/isp_params.c:1324:3: error: ‘const > struct v4l2_ioctl_ops’ has no member named ‘vidioc_try_fmt_meta_out’; did you > mean ‘vidioc_try_fmt_meta_cap’? > .vidioc_try_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >^~~ >vidioc_try_fmt_meta_cap > drivers/media/platform/rockchip/isp1/isp_params.c:1324:29: error: > initialization from incompatible pointer type > [-Werror=incompatible-pointer-types] > .vidioc_try_fmt_meta_out = rkisp1_params_g_fmt_meta_out, > ^~~~ > drivers/media/platform/rockchip/isp1/isp_params.c:1324:29: note: (near > initialization for ‘rkisp1_params_ioctl.vidioc_enum_input’) > drivers/media/platform/rockchip/isp1/isp_params.c: In function > ‘rkisp1_params_init_vb2_queue’: > drivers/media/platform/rockchip/isp1/isp_params.c:1462:12: error: > ‘V4L2_BUF_TYPE_META_OUTPUT’ undeclared (first use in this function); did you > mean ‘V4L2_BUF_TYPE_SDR_OUTPUT’? > q->type = V4L2_BUF_TYPE_META_OUTPUT; > ^ > V4L2_BUF_TYPE_SDR_OUTPUT > drivers/media/platform/rockchip/isp1/isp_params.c:1462:12: note: each > undeclared identifier is reported only once for each function it appears in > CC drivers/media/platform/rockchip/isp1/mipi_dphy_sy.o > drivers/media/platform/rockchip/isp1/isp_params.c: In function > ‘rkisp1_register_params_vdev’: > drivers/media/platform/rockchip/isp1/isp_params.c:1507:43: error: > ‘V4L2_CAP_META_OUTPUT’ undeclared (first use in this function); did you mean > ‘V4L2_CAP_VBI_OUTPUT’? > vdev->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_META_OUTPUT; >^~~~ >V4L2_CAP_VBI_OUTPUT > > Thanks, > baruch > >> Jacob Chen (12): >>
Re: [PATCH v6 00/17] Rockchip ISP1 Driver
Hi Baruch, 2018-03-09 12:09 GMT+08:00 Baruch Siach : > Hi Jacob, > > On Fri, Mar 09, 2018 at 08:53:57AM +0800, Jacob Chen wrote: >> 2018-03-08 20:02 GMT+08:00 Baruch Siach : >> > On Thu, Mar 08, 2018 at 05:47:50PM +0800, Jacob Chen wrote: >> >> This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 >> >> SoC. >> >> >> >> Wiki Pages: >> >> http://opensource.rock-chips.com/wiki_Rockchip-isp1 >> >> >> >> The deprecated g_mbus_config op is not dropped in V6 because i am waiting >> >> tomasz's patches. >> > >> > Which tree is this series based on? On top of v4.16-rc4 I get the build >> > failure below. The V4L2_BUF_TYPE_META_OUTPUT macro, for example, is not >> > even >> > in media_tree.git. >> >> This series is based on v4.16-rc4 with below patch. >> https://patchwork.kernel.org/patch/9792001/ > > This patch does not apply on v4.16-rc4. I also tried v2 of this patch with the > same result: > > https://patchwork.linuxtv.org/patch/44682/ It need resolve merge conflict. > > Can you push your series to a public git repo branch? > Sure, I have push it to my github. https://github.com/wzyy2/linux/tree/4.16-rc4 This commit might be a bit of a mess https://github.com/wzyy2/linux/commit/ff68323c4804adc10f64836ea1be172c54a9d6c6 > Thanks, > baruch > >> > drivers/media/platform/rockchip/isp1/isp_params.c:1321:3: error: ‘const >> > struct v4l2_ioctl_ops’ has no member named ‘vidioc_enum_fmt_meta_out’; did >> > you mean ‘vidioc_enum_fmt_meta_cap’? >> > .vidioc_enum_fmt_meta_out = rkisp1_params_enum_fmt_meta_out, >> >^~~~ >> >vidioc_enum_fmt_meta_cap >> > drivers/media/platform/rockchip/isp1/isp_params.c:1321:30: error: >> > initialization from incompatible pointer type >> > [-Werror=incompatible-pointer-types] >> > .vidioc_enum_fmt_meta_out = rkisp1_params_enum_fmt_meta_out, >> > ^~~ >> > drivers/media/platform/rockchip/isp1/isp_params.c:1321:30: note: (near >> > initialization for ‘rkisp1_params_ioctl.vidioc_g_std’) >> > drivers/media/platform/rockchip/isp1/isp_params.c:1322:3: error: ‘const >> > struct v4l2_ioctl_ops’ has no member named ‘vidioc_g_fmt_meta_out’; did >> > you mean ‘vidioc_g_fmt_meta_cap’? >> > .vidioc_g_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >> >^ >> >vidioc_g_fmt_meta_cap >> > drivers/media/platform/rockchip/isp1/isp_params.c:1322:27: error: >> > initialization from incompatible pointer type >> > [-Werror=incompatible-pointer-types] >> > .vidioc_g_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >> >^~~~ >> > drivers/media/platform/rockchip/isp1/isp_params.c:1322:27: note: (near >> > initialization for ‘rkisp1_params_ioctl.vidioc_s_std’) >> > drivers/media/platform/rockchip/isp1/isp_params.c:1323:3: error: ‘const >> > struct v4l2_ioctl_ops’ has no member named ‘vidioc_s_fmt_meta_out’; did >> > you mean ‘vidioc_s_fmt_meta_cap’? >> > .vidioc_s_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >> >^ >> >vidioc_s_fmt_meta_cap >> > drivers/media/platform/rockchip/isp1/isp_params.c:1323:27: error: >> > initialization from incompatible pointer type >> > [-Werror=incompatible-pointer-types] >> > .vidioc_s_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >> >^~~~ >> > drivers/media/platform/rockchip/isp1/isp_params.c:1323:27: note: (near >> > initialization for ‘rkisp1_params_ioctl.vidioc_querystd’) >> > drivers/media/platform/rockchip/isp1/isp_params.c:1324:3: error: ‘const >> > struct v4l2_ioctl_ops’ has no member named ‘vidioc_try_fmt_meta_out’; did >> > you mean ‘vidioc_try_fmt_meta_cap’? >> > .vidioc_try_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >> >^~~ >> >vidioc_try_fmt_meta_cap >> > drivers/media/platform/rockchip/isp1/isp_params.c:1324:29: error: >> > initialization from incompatible pointer type >> > [-Werror=incompatible-pointer-types] >> > .vidioc_try_fmt_meta_out = rkisp1_params_g_fmt_meta_out, >> > ^~~~ >> > drivers/media/platform/rockchip/isp1/isp_params.c:1324:29: note: (near >> > initialization for ‘rkisp1_params_ioctl.vidioc_enum_input’)
Re: [PATCH v6 04/17] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
Hi Laurent,
2018-05-16 13:20 GMT+08:00 Laurent Pinchart :
> Hi Jacob,
>
> Thank you for the patch.
>
> On Thursday, 8 March 2018 11:47:54 EEST Jacob Chen wrote:
>> From: Jacob Chen
>>
>> This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
>
> Should this really be a subdev driver ? After a quick look at the code, the
> only parameters you need to configure the PHY is the number of lanes and the
> data rate. Implementing the whole subdev API seems overcomplicated to me,
> especially given that the D-PHY doesn't deal with video streams as such, but
> operates one level down. Shouldn't we model the D-PHY using the Linux PHY
> framework ? I believe all the features you need are there except for a D-PHY-
> specific configuration function that should be very easy to add.
>
It deserves a subdev driver since the ISP is not the only user.
Other driver, like VIP, use it too.
>> Signed-off-by: Jacob Chen
>> Signed-off-by: Shunqian Zheng
>> Signed-off-by: Tomasz Figa
>> ---
>> .../media/platform/rockchip/isp1/mipi_dphy_sy.c| 868 ++
>> .../media/platform/rockchip/isp1/mipi_dphy_sy.h| 15 +
>> 2 files changed, 883 insertions(+)
>> create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>> create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.h
>>
>> diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>> b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c new file mode 100644
>> index ..32140960557a
>> --- /dev/null
>> +++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>> @@ -0,0 +1,868 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Rockchip MIPI Synopsys DPHY driver
>> + *
>> + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define RK3288_GRF_SOC_CON6 0x025c
>> +#define RK3288_GRF_SOC_CON8 0x0264
>> +#define RK3288_GRF_SOC_CON9 0x0268
>> +#define RK3288_GRF_SOC_CON10 0x026c
>> +#define RK3288_GRF_SOC_CON14 0x027c
>> +#define RK3288_GRF_SOC_STATUS21 0x02d4
>> +#define RK3288_GRF_IO_VSEL 0x0380
>> +#define RK3288_GRF_SOC_CON15 0x03a4
>> +
>> +#define RK3399_GRF_SOC_CON9 0x6224
>> +#define RK3399_GRF_SOC_CON21 0x6254
>> +#define RK3399_GRF_SOC_CON22 0x6258
>> +#define RK3399_GRF_SOC_CON23 0x625c
>> +#define RK3399_GRF_SOC_CON24 0x6260
>> +#define RK3399_GRF_SOC_CON25 0x6264
>> +#define RK3399_GRF_SOC_STATUS1 0xe2a4
>> +
>> +#define CLOCK_LANE_HS_RX_CONTROL 0x34
>> +#define LANE0_HS_RX_CONTROL 0x44
>> +#define LANE1_HS_RX_CONTROL 0x54
>> +#define LANE2_HS_RX_CONTROL 0x84
>> +#define LANE3_HS_RX_CONTROL 0x94
>> +#define HS_RX_DATA_LANES_THS_SETTLE_CONTROL 0x75
>> +
>> +/*
>> + * CSI HOST
>> + */
>> +#define CSIHOST_PHY_TEST_CTRL0 0x30
>> +#define CSIHOST_PHY_TEST_CTRL1 0x34
>> +#define CSIHOST_PHY_SHUTDOWNZ0x08
>> +#define CSIHOST_DPHY_RSTZ0x0c
>> +
>> +#define PHY_TESTEN_ADDR (0x1 << 16)
>> +#define PHY_TESTEN_DATA (0x0 << 16)
>> +#define PHY_TESTCLK (0x1 << 1)
>> +#define PHY_TESTCLR (0x1 << 0)
>> +#define THS_SETTLE_COUNTER_THRESHOLD 0x04
>> +
>> +#define HIWORD_UPDATE(val, mask, shift) \
>> + ((val) << (shift) | (mask) << ((shift) + 16))
>> +
>> +enum mipi_dphy_sy_pads {
>> + MIPI_DPHY_SY_PAD_SINK = 0,
>> + MIPI_DPHY_SY_PAD_SOURCE,
>> + MIPI_DPHY_SY_PADS_NUM,
>> +};
>> +
>> +enum dphy_reg_id {
>> + GRF_DPHY_RX0_TURNDISABLE = 0,
>> + GRF_DPHY_RX0_FORCERXMODE,
>> + GRF_DPHY_RX0_FORCETXSTOPMODE,
>> + GRF_DPHY_RX0_ENABLE,
>> + GRF_DPHY_RX0_TESTCLR,
>> + GRF_DPHY_RX0_TESTCLK,
>> + GRF_DPHY_RX0_TESTEN,
>> + GRF_DPHY_RX0_TESTDIN,
>> + GRF_DPHY_RX0_TURNREQUEST,
>> + GRF_DPHY_RX0_TESTDOUT,
>> + GRF_DPHY_TX0_TURNDISABLE,
>> + GRF_DPHY_TX0_FORCERXMODE,
>> + GRF_DPHY_TX0_FORCETXSTOPMODE,
>> + GRF_DPHY_TX0_TURNREQUEST,
>> + GRF_DPHY_TX1RX1_TURNDISABLE,
>> + GRF_DPHY_TX1RX1_FORCE
Re: [PATCH v6 04/17] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
2018-05-16 22:39 GMT+08:00 Jacob Chen : > Hi Laurent, > > 2018-05-16 13:20 GMT+08:00 Laurent Pinchart > : >> Hi Jacob, >> >> Thank you for the patch. >> >> On Thursday, 8 March 2018 11:47:54 EEST Jacob Chen wrote: >>> From: Jacob Chen >>> >>> This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver >> >> Should this really be a subdev driver ? After a quick look at the code, the >> only parameters you need to configure the PHY is the number of lanes and the >> data rate. Implementing the whole subdev API seems overcomplicated to me, >> especially given that the D-PHY doesn't deal with video streams as such, but >> operates one level down. Shouldn't we model the D-PHY using the Linux PHY >> framework ? I believe all the features you need are there except for a D-PHY- >> specific configuration function that should be very easy to add. >> > > It deserves a subdev driver since the ISP is not the only user. > Other driver, like VIP, use it too. > > For example, if there are two sensors connected to a rk3399 board. Sensor1 --> DPHY1 Sensor2 --> DPHY2 With a subdev phy driver, i can choose either ISP or VIP for sensor1/sensor2 by enable/disable media link in the run time. 1. Sensor1 --> DPHY1 ---> VIP Sensor2 --> DPHY2 ---> ISP1 2. Sensor1 --> DPHY1 ---> ISP1 Sensor2 --> DPHY2 ---> VIP >>> Signed-off-by: Jacob Chen >>> Signed-off-by: Shunqian Zheng >>> Signed-off-by: Tomasz Figa >>> --- >>> .../media/platform/rockchip/isp1/mipi_dphy_sy.c| 868 ++ >>> .../media/platform/rockchip/isp1/mipi_dphy_sy.h| 15 + >>> 2 files changed, 883 insertions(+) >>> create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c >>> create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.h >>> >>> diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c >>> b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c new file mode 100644 >>> index ..32140960557a >>> --- /dev/null >>> +++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c >>> @@ -0,0 +1,868 @@ >>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >>> +/* >>> + * Rockchip MIPI Synopsys DPHY driver >>> + * >>> + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd. >>> + */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#define RK3288_GRF_SOC_CON6 0x025c >>> +#define RK3288_GRF_SOC_CON8 0x0264 >>> +#define RK3288_GRF_SOC_CON9 0x0268 >>> +#define RK3288_GRF_SOC_CON10 0x026c >>> +#define RK3288_GRF_SOC_CON14 0x027c >>> +#define RK3288_GRF_SOC_STATUS21 0x02d4 >>> +#define RK3288_GRF_IO_VSEL 0x0380 >>> +#define RK3288_GRF_SOC_CON15 0x03a4 >>> + >>> +#define RK3399_GRF_SOC_CON9 0x6224 >>> +#define RK3399_GRF_SOC_CON21 0x6254 >>> +#define RK3399_GRF_SOC_CON22 0x6258 >>> +#define RK3399_GRF_SOC_CON23 0x625c >>> +#define RK3399_GRF_SOC_CON24 0x6260 >>> +#define RK3399_GRF_SOC_CON25 0x6264 >>> +#define RK3399_GRF_SOC_STATUS1 0xe2a4 >>> + >>> +#define CLOCK_LANE_HS_RX_CONTROL 0x34 >>> +#define LANE0_HS_RX_CONTROL 0x44 >>> +#define LANE1_HS_RX_CONTROL 0x54 >>> +#define LANE2_HS_RX_CONTROL 0x84 >>> +#define LANE3_HS_RX_CONTROL 0x94 >>> +#define HS_RX_DATA_LANES_THS_SETTLE_CONTROL 0x75 >>> + >>> +/* >>> + * CSI HOST >>> + */ >>> +#define CSIHOST_PHY_TEST_CTRL0 0x30 >>> +#define CSIHOST_PHY_TEST_CTRL1 0x34 >>> +#define CSIHOST_PHY_SHUTDOWNZ0x08 >>> +#define CSIHOST_DPHY_RSTZ0x0c >>> + >>> +#define PHY_TESTEN_ADDR (0x1 << 16) >>> +#define PHY_TESTEN_DATA (0x0 << 16) >>> +#define PHY_TESTCLK (0x1 << 1) >>> +#define PHY_TESTCLR (0x1 << 0) >>> +#define THS_SETTLE_COUNTER_THRESHOLD 0x04 >>> + >>> +#define HIWORD_UPDATE(val, mask, shift) \ >>> + ((val) << (shift) | (mask) << ((shift
[PATCH] ARM: dts: rockchip: fix uart4 pin-num for rk3288
According to TRM, uart4 tx/rx should be 14/15
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ed05f3d77358..40327c764385 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1938,16 +1938,16 @@
uart4 {
uart4_xfer: uart4-xfer {
- rockchip,pins = <5 12 3 &pcfg_pull_up>,
- <5 13 3 &pcfg_pull_none>;
+ rockchip,pins = <5 15 3 &pcfg_pull_up>,
+ <5 14 3 &pcfg_pull_none>;
};
uart4_cts: uart4-cts {
- rockchip,pins = <5 14 3 &pcfg_pull_up>;
+ rockchip,pins = <5 12 3 &pcfg_pull_up>;
};
uart4_rts: uart4-rts {
- rockchip,pins = <5 15 3 &pcfg_pull_none>;
+ rockchip,pins = <5 13 3 &pcfg_pull_none>;
};
};
--
2.16.1
[PATCH v2 3/3] clk: rockchip: rk3288: make all niu clocks critical
NIU clocks are related to the interconnect and it's important to other blocks.
Since we don't have a driver to handle it, we should always enable it to avoid
casually close.
Make all of them critical,so that we don't have to each clock on its own
once things break.
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 3d02aa2..c50386c 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -808,8 +808,15 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
__initdata = {
static const char *const rk3288_critical_clocks[] __initconst = {
"aclk_cpu",
"aclk_peri",
+ "aclk_peri_niu",
+ "aclk_vio0_niu",
+ "aclk_vio1_niu",
+ "aclk_rga_niu",
"hclk_peri",
+ "hclk_vio_niu",
+ "pclk_alive_niu",
"pclk_pd_pmu",
+ "pclk_pmu_niu",
};
static void __iomem *rk3288_cru_base;
--
2.7.4
[PATCH v2 1/3] clk: rockchip: add rk3288 vip_out clock ids
Add clock-ids for the vip block of the rk3288 Signed-off-by: Jacob Chen --- include/dt-bindings/clock/rk3288-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index 9a586e2..11183bf 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -88,6 +88,7 @@ #define SCLK_PVTM_GPU 124 #define SCLK_CRYPTO125 #define SCLK_MIPIDSI_24M 126 +#define SCLK_VIP_OUT 127 #define SCLK_MAC 151 #define SCLK_MACREF_OUT152 -- 2.7.4
[PATCH v2 2/3] clk: rockchip: use rk3288 vip_out clock ids
Reference the newly added vip clock-ids in the clock-tree.
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 39af05a..3d02aa2 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -469,7 +469,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
__initdata = {
COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
RK3288_CLKGATE_CON(3), 7, GFLAGS),
- COMPOSITE_NOGATE(0, "sclk_vip_out", mux_vip_out_p, 0,
+ COMPOSITE_NOGATE(SCLK_VIP_OUT, "sclk_vip_out", mux_vip_out_p, 0,
RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
DIV(0, "pclk_pd_alive", "gpll", 0,
--
2.7.4
Re: [PATCH 4/4] clk: rockchip: add rk3288 cif_out clock
2017-01-13 21:53 GMT+08:00 Heiko Stuebner :
> Hi Jacob,
>
> Am Dienstag, 10. Januar 2017, 19:59:20 CET schrieb Jacob Chen:
>> Add the clocks for the cif block of the rk3288
>>
>> Signed-off-by: Jacob Chen
>> ---
>> drivers/clk/rockchip/clk-rk3288.c | 7 +++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/clk/rockchip/clk-rk3288.c
>> b/drivers/clk/rockchip/clk-rk3288.c index 8047cea..f071c24 100644
>> --- a/drivers/clk/rockchip/clk-rk3288.c
>> +++ b/drivers/clk/rockchip/clk-rk3288.c
>> @@ -192,6 +192,7 @@ PNAME(mux_uart1_p)= { "uart1_src", "uart1_frac",
>> "xin24m" }; PNAME(mux_uart2_p)= { "uart2_src", "uart2_frac",
>> "xin24m" };
>> PNAME(mux_uart3_p) = { "uart3_src", "uart3_frac", "xin24m" };
>> PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" };
>> +PNAME(mux_cif_out_p) = { "cif_src", "xin24m" };
>> PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
>> PNAME(mux_mac_p) = { "mac_pll_src", "ext_gmac" };
>> PNAME(mux_hsadcout_p)= { "hsadc_src", "ext_hsadc" };
>> @@ -448,6 +449,12 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
>> __initdata = { RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
>> RK3288_CLKGATE_CON(3), 15, GFLAGS),
>>
>> + COMPOSITE_NOGATE(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
>> + RK3288_CLKSEL_CON(26), 8, 1, MFLAGS, 9, 5, DFLAGS),
>> + COMPOSITE_NODIV(SCLK_CIF_OUT, "sclk_cif_out", mux_cif_out_p, 0,
>> + RK3288_CLKSEL_CON(26), 15, 1, MFLAGS,
>> + RK3288_CLKGATE_CON(3), 7, GFLAGS),
>> +
>
> we already have vip_src and sclk_vip_out defined, which I guess are the clocks
> you are adding here and according to the TRM I have the names are also correct
> (clock diagram 2).
>
> But the clkid is not set yet, so I'd suggest adding SCLK_VIP_OUT and assigning
> to the existing clocks.
>
> Also, according to the clock diagram, the gate needs to be (and already is)
> part of the vip_src clock and not the sclk_vip_out.
>
>
> Heiko
Right, I didn't find that it have already been defined..
[PATCH 1/4] clk: rockchip: add rk3288 isp_in clock ids
Add clock-ids for the isp block of the rk3288. Signed-off-by: Jacob Chen --- include/dt-bindings/clock/rk3288-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index 9a586e2..08de7de 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -168,6 +168,7 @@ #define PCLK_WDT 368 #define PCLK_EFUSE256 369 #define PCLK_EFUSE1024 370 +#define PCLK_ISP_IN371 /* hclk gates */ #define HCLK_GPS 448 -- 2.7.4
[PATCH 3/4] clk: rockchip: add rk3288 cif_out clock ids
Add clock-ids for the cif block of the rk3288 Signed-off-by: Jacob Chen --- include/dt-bindings/clock/rk3288-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index 08de7de..128b191 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -88,6 +88,7 @@ #define SCLK_PVTM_GPU 124 #define SCLK_CRYPTO125 #define SCLK_MIPIDSI_24M 126 +#define SCLK_CIF_OUT 127 #define SCLK_MAC 151 #define SCLK_MACREF_OUT152 -- 2.7.4
[PATCH 4/4] clk: rockchip: add rk3288 cif_out clock
Add the clocks for the cif block of the rk3288
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 8047cea..f071c24 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -192,6 +192,7 @@ PNAME(mux_uart1_p) = { "uart1_src", "uart1_frac", "xin24m"
};
PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" };
PNAME(mux_uart3_p) = { "uart3_src", "uart3_frac", "xin24m" };
PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" };
+PNAME(mux_cif_out_p) = { "cif_src", "xin24m" };
PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
PNAME(mux_mac_p) = { "mac_pll_src", "ext_gmac" };
PNAME(mux_hsadcout_p) = { "hsadc_src", "ext_hsadc" };
@@ -448,6 +449,12 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
__initdata = {
RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 15, GFLAGS),
+ COMPOSITE_NOGATE(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
+ RK3288_CLKSEL_CON(26), 8, 1, MFLAGS, 9, 5, DFLAGS),
+ COMPOSITE_NODIV(SCLK_CIF_OUT, "sclk_cif_out", mux_cif_out_p, 0,
+ RK3288_CLKSEL_CON(26), 15, 1, MFLAGS,
+ RK3288_CLKGATE_CON(3), 7, GFLAGS),
+
GATE(SCLK_HDMI_HDCP, "sclk_hdmi_hdcp", "xin24m", 0,
RK3288_CLKGATE_CON(5), 12, GFLAGS),
GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
--
2.7.4
[PATCH 2/4] clk: rockchip: use rk3288 isp_in clock ids
Reference the newly added isp clock-ids in the clock-tree.
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 39af05a..8047cea 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -801,7 +801,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
__initdata = {
GATE(0, "pclk_vip_in", "ext_vip", 0, RK3288_CLKGATE_CON(16), 0, GFLAGS),
INVERTER(0, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4,
IFLAGS),
- GATE(0, "pclk_isp_in", "ext_isp", 0, RK3288_CLKGATE_CON(16), 3, GFLAGS),
+ GATE(PCLK_ISP_IN, "pclk_isp_in", "ext_isp", 0, RK3288_CLKGATE_CON(16),
3, GFLAGS),
INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3,
IFLAGS),
};
--
2.7.4
Re: [PATCH v2 3/3] clk: rockchip: rk3288: make all niu clocks critical
2017-01-18 13:42 GMT+08:00 Jacob Chen :
> NIU clocks are related to the interconnect and it's important to other blocks.
> Since we don't have a driver to handle it, we should always enable it to avoid
> casually close.
>
> Make all of them critical,so that we don't have to each clock on its own
> once things break.
>
> Signed-off-by: Jacob Chen
> ---
> drivers/clk/rockchip/clk-rk3288.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk-rk3288.c
> b/drivers/clk/rockchip/clk-rk3288.c
> index 3d02aa2..c50386c 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -808,8 +808,15 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
> __initdata = {
> static const char *const rk3288_critical_clocks[] __initconst = {
> "aclk_cpu",
> "aclk_peri",
> + "aclk_peri_niu",
> + "aclk_vio0_niu",
> + "aclk_vio1_niu",
> + "aclk_rga_niu",
> "hclk_peri",
> + "hclk_vio_niu",
> + "pclk_alive_niu",
> "pclk_pd_pmu",
> + "pclk_pmu_niu",
> };
>
> static void __iomem *rk3288_cru_base;
> --
> 2.7.4
>
I just got an another bug that caused by closed niu clock.
Making niu clock always enabled is really useful, it could save me a
lot of time.
I just wonder why we don't do that before. Would it have great impact
on power consumption?
[PATCH 1/2] ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
From: Jacob Chen
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk1108.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
index 9dccfea..6a06ad7 100644
--- a/arch/arm/boot/dts/rk1108.dtsi
+++ b/arch/arm/boot/dts/rk1108.dtsi
@@ -321,6 +321,31 @@
input-enable;
};
+sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_1
&pcfg_pull_none_drv_4ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <3 RK_PC5 RK_FUNC_1
&pcfg_pull_up_drv_4ma>;
+ };
+
+ sdmmc_cd: sdmmc-cd {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_1
&pcfg_pull_up_drv_4ma>;
+ };
+
+ sdmmc_bus1: sdmmc-bus1 {
+ rockchip,pins = <3 RK_PC3 RK_FUNC_1
&pcfg_pull_up_drv_4ma>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <3 RK_PC3 RK_FUNC_1
&pcfg_pull_up_drv_4ma>,
+ <3 RK_PC2 RK_FUNC_1
&pcfg_pull_up_drv_4ma>,
+ <3 RK_PC1 RK_FUNC_1
&pcfg_pull_up_drv_4ma>,
+ <3 RK_PC0 RK_FUNC_1
&pcfg_pull_up_drv_4ma>;
+ };
+ };
+
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <2 RK_PD3 RK_FUNC_1
&pcfg_pull_up>,
--
2.7.4
[PATCH 2/2] ARM: dts: rockchip: enable sdmmc for rk1108-evb
From: Jacob Chen
This patch add sdmmc support for rk1108-evb, now I can load the rootfs
from sdmmc.
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk1108-evb.dts | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/rk1108-evb.dts b/arch/arm/boot/dts/rk1108-evb.dts
index 3956cff..cea26e5 100644
--- a/arch/arm/boot/dts/rk1108-evb.dts
+++ b/arch/arm/boot/dts/rk1108-evb.dts
@@ -56,6 +56,18 @@
};
};
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
@@ -67,3 +79,12 @@
&uart2 {
status = "okay";
};
+
+&pinctrl {
+
+ sdmmc {
+ sdmmc_pwr: sdmmc-pwr {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO
&pcfg_pull_up_drv_4ma>;
+ };
+ };
+};
--
2.7.4
[PATCH] clk: rockchip: rk3288: make aclk_vio1_niu a critical clock
According to the pd blocks, VIO1_NIU is required by RGA,ISP and VOP1.
Then at least one VIO_NIU should be turned on to supply eDP, HDMI, MIPI.
If eDP,HDMI,MIPI is inited early than VOP or RGA is inited early than VOP1,
system will hang.
So make aclk_vio1_niu a critical clock and turn it on at all times.
Signed-off-by: Jacob Chen
---
drivers/clk/rockchip/clk-rk3288.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index f071c24..59ee244 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -815,6 +815,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
__initdata = {
static const char *const rk3288_critical_clocks[] __initconst = {
"aclk_cpu",
"aclk_peri",
+ "aclk_vio1_niu",
"hclk_peri",
"pclk_pd_pmu",
};
--
2.7.4
Re: [PATCH v2 1/3] ARM: dts: rockchip: Add support for phyCORE-RK3288 SoM
Hi wadim,
2017-04-06 21:04 GMT+08:00 Wadim Egorov :
> The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
> The module can be connected to different carrier boards.
> It can be also equipped with different RAM, SPI flash and eMMC variants.
> The Rapid Development Kit option is using the following setup:
>
> - 1 GB DDR3 RAM (2 Banks)
> - 1x 4 KB EEPROM
> - DP83867 Gigabit Ethernet PHY
> - 16 MB SPI Flash
> - 4 GB eMMC Flash
>
> Signed-off-by: Wadim Egorov
> ---
> Changes in v2:
> - Added a dual license which is used for all rk3288 based boards.
>
> Include minor changes from Heiko Stübner:
> - moved phy-handle property up a bit
> - switches compatible and #address+#size-cells in mdio0
> - dropped rockchip,grf from &io_domains (grf is a simple-mfd and can
> get the grf syscon on its own via its parent)
> - vdd_cpu: regulator@60 (from fan53555@60)
> - serial_flash: flash@0 (from m25p80@0)
> Nodes should be named after their "category" not the actual device
>
> ---
> arch/arm/boot/dts/rk3288-phycore-som.dtsi | 497
> ++
> 1 file changed, 497 insertions(+)
> create mode 100644 arch/arm/boot/dts/rk3288-phycore-som.dtsi
>
> diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi
> b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
> new file mode 100644
> index 000..26cd3ad
> --- /dev/null
> +++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
> @@ -0,0 +1,497 @@
> +/*
> + * Device tree file for Phytec phyCORE-RK3288 SoM
> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
> + * Author: Wadim Egorov
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include
> +#include "rk3288.dtsi"
> +
> +/ {
> + model = "Phytec RK3288 phyCORE";
> + compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
> +
> + /*
> +* Set the minimum memory size here and
> +* let the bootloader set the real size.
> +*/
> + memory {
> + device_type = "memory";
> + reg = <0 0x800>;
> + };
> +
> + aliases {
> + rtc0 = &i2c_rtc;
> + rtc1 = &rk818;
> + };
> +
> + ext_gmac: external-gmac-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <12500>;
> + clock-output-names = "ext_gmac";
> + };
> +
> + leds: user-leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&user_led>;
> +
> + user {
> + label = "green_led";
> + gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "keep";
> + };
> + };
> +
> + vdd_emmc_io: vdd-emmc-io {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_emmc_io";
> + regul
Re: [PATCH 1/5] [media] rockchip/rga: v4l2 m2m support
Hi Nicolas. 2017-06-26 23:49 GMT+08:00 Nicolas Dufresne : > > Le lundi 26 juin 2017 à 22:51 +0800, Jacob Chen a écrit : > > Rockchip RGA is a separate 2D raster graphic acceleration unit. It > > accelerates 2D graphics operations, such as point/line drawing, image > > scaling, rotation, BitBLT, alpha blending and image blur/sharpness. > > > > The drvier is mostly based on s5p-g2d v4l2 m2m driver. > > And supports various operations from the rendering pipeline. > > - copy > > - fast solid color fill > > - rotation > > - flip > > - alpha blending > > > > The code in rga-hw.c is used to configure regs accroding to > > operations. > > > > The code in rga-buf.c is used to create private mmu table for RGA. > > The tables is stored in a list, and be removed when buffer is > > cleanup. > > > > Signed-off-by: Jacob Chen > > --- > > drivers/media/platform/Kconfig| 11 + > > drivers/media/platform/Makefile | 2 + > > drivers/media/platform/rockchip-rga/Makefile | 3 + > > drivers/media/platform/rockchip-rga/rga-buf.c | 176 + > > drivers/media/platform/rockchip-rga/rga-hw.c | 456 > > drivers/media/platform/rockchip-rga/rga-hw.h | 434 > > drivers/media/platform/rockchip-rga/rga.c | 979 > > ++ > > drivers/media/platform/rockchip-rga/rga.h | 133 > > 8 files changed, 2194 insertions(+) > > create mode 100644 drivers/media/platform/rockchip-rga/Makefile > > create mode 100644 drivers/media/platform/rockchip-rga/rga-buf.c > > create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.c > > create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.h > > create mode 100644 drivers/media/platform/rockchip-rga/rga.c > > create mode 100644 drivers/media/platform/rockchip-rga/rga.h > > > > diff --git a/drivers/media/platform/Kconfig > > b/drivers/media/platform/Kconfig > > index c9106e1..8199bcf 100644 > > --- a/drivers/media/platform/Kconfig > > +++ b/drivers/media/platform/Kconfig > > @@ -411,6 +411,17 @@ config VIDEO_RENESAS_VSP1 > > To compile this driver as a module, choose M here: the > > module > > will be called vsp1. > > > > +config VIDEO_ROCKCHIP_RGA > > + tristate "Rockchip Raster 2d Grapphic Acceleration Unit" > > + depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA > > + depends on ARCH_ROCKCHIP || COMPILE_TEST > > + select VIDEOBUF2_DMA_SG > > + select V4L2_MEM2MEM_DEV > > + default n > > + ---help--- > > + This is a v4l2 driver for Rockchip SOC RGA2 > > + 2d graphics accelerator. > > + > > config VIDEO_TI_VPE > > tristate "TI VPE (Video Processing Engine) driver" > > depends on VIDEO_DEV && VIDEO_V4L2 > > diff --git a/drivers/media/platform/Makefile > > b/drivers/media/platform/Makefile > > index 349ddf6..3bf096f 100644 > > --- a/drivers/media/platform/Makefile > > +++ b/drivers/media/platform/Makefile > > @@ -54,6 +54,8 @@ obj-$(CONFIG_VIDEO_RENESAS_FDP1)+= > > rcar_fdp1.o > > obj-$(CONFIG_VIDEO_RENESAS_JPU) += rcar_jpu.o > > obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/ > > > > +obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) += rockchip-rga/ > > + > > obj-y+= omap/ > > > > obj-$(CONFIG_VIDEO_AM437X_VPFE) += am437x/ > > diff --git a/drivers/media/platform/rockchip-rga/Makefile > > b/drivers/media/platform/rockchip-rga/Makefile > > new file mode 100644 > > index 000..92fe254 > > --- /dev/null > > +++ b/drivers/media/platform/rockchip-rga/Makefile > > @@ -0,0 +1,3 @@ > > +rockchip-rga-objs := rga.o rga-hw.o rga-buf.o > > + > > +obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) += rockchip-rga.o > > diff --git a/drivers/media/platform/rockchip-rga/rga-buf.c > > b/drivers/media/platform/rockchip-rga/rga-buf.c > > new file mode 100644 > > index 000..8582092 > > --- /dev/null > > +++ b/drivers/media/platform/rockchip-rga/rga-buf.c > > @@ -0,0 +1,176 @@ > > +/* > > + * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd > > + * Author: Jacob Chen > > + * > > + * This software is licensed under the terms of the GNU General > > Public > > + * License version 2, as published by the Free Software Foundation, > > and > > + * may be copied, distributed, and modified under those terms. > > + * > > + * This program is distributed in the hope that it will
Re: [PATCH 1/5] [media] rockchip/rga: v4l2 m2m support
Hi Tomasz, Yeah, the comments are wrong, i will correct it >> +*/ >> + pages = (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3); > > This is rather unfortunate and you should expect failures here on > actively used systems with uptime longer than few hours. Changing this > to dma_alloc_coherent() and enabling CMA _might_ give you a bit better > success rate, but... > > Normally, this kind of (scatter-gather capable) hardware would allow > some kind of linking of separate pages, e.g. last entry in the page > would point to the next page, or something like that. Doesn't this RGA > block have something similar? > Thx for pointing it out ! : ) I looked RGA drvier used in rockchip android and i find it use kmalloc, so i think it might support separate pages. I will test it. > Best regards, > Tomasz
Re: [PATCH 1/5] [media] rockchip/rga: v4l2 m2m support
Hi,
2017-06-27 16:39 GMT+08:00 Tomasz Figa :
> Hi Jacob,
>
> Please see my comments inline.
>
> On Mon, Jun 26, 2017 at 11:51 PM, Jacob Chen wrote:
>> Rockchip RGA is a separate 2D raster graphic acceleration unit. It
>> accelerates 2D graphics operations, such as point/line drawing, image
>> scaling, rotation, BitBLT, alpha blending and image blur/sharpness.
> [snip]
>> +static int rga_buf_init(struct vb2_buffer *vb)
>> +{
>> + struct rga_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
>> + struct rockchip_rga *rga = ctx->rga;
>> + struct sg_table *sgt;
>> + struct scatterlist *sgl;
>> + unsigned int *pages;
>> + struct rga_buf *buf;
>> + unsigned int address, len, i, p;
>> + unsigned int mapped_size = 0;
>> +
>> + /* Create local MMU table for RGA */
>> + sgt = vb2_plane_cookie(vb, 0);
>> +
>> + /*
>> +* Alloc (2^3 * 4K) = 32K byte for storing pages, those space could
>> +* cover 32K * 4K = 128M ram address.
>
> Unless I'm missing something, there is 1024 32-bit values in one 4K
> page, which can point to 4 MB of memory. The code allocates 8 of them,
> which in total allows at most 32 MB per buffer.
>
>> +*/
>> + pages = (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
>
> This is rather unfortunate and you should expect failures here on
> actively used systems with uptime longer than few hours. Changing this
> to dma_alloc_coherent() and enabling CMA _might_ give you a bit better
> success rate, but...
>
I decide to alloc a page pool when driver probe and get page from that poll.
> Normally, this kind of (scatter-gather capable) hardware would allow
> some kind of linking of separate pages, e.g. last entry in the page
> would point to the next page, or something like that. Doesn't this RGA
> block have something similar?
>
> Best regards,
> Tomasz
[PATCH 0/5] arm64: dts: add rk3399 display-related nodes
This series patches add the display-related nodes for rk3399. Tested with kernel base on drm-misc and below patches. https://cgit.freedesktop.org/drm/drm-misc/ "drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY" "iommu/rockchip: Enable Rockchip IOMMU on ARM64" HDMI could work and have a display output. eDP could link with panel but i didn't get a display(Maybe something wrong in power things). For convenience, i think we should have those nodes in kernel now. Jacob Chen (5): arm64: dts: rockchip: Add rk3399 vop and display-subsystem arm64: dts: rockchip: add pd_edp node for rk3399 arm64: dts: rockchip: add rk3399 edp nodes arm64: dts: rockchip: add rk3399 mipi nodes arm64: dts: rockchip: add rk3399 hdmi nodes arch/arm64/boot/dts/rockchip/rk3399.dtsi | 198 +++ 1 file changed, 198 insertions(+) -- 2.7.4
[PATCH 2/5] arm64: dts: rockchip: add pd_edp node for rk3399
1. add pd node for RK3399 Soc
2. create power domain tree
3. add qos node for domain
Signed-off-by: Elaine Zhang
Signed-off-by: Caesar Wang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 300e500..b88bd02 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -956,6 +956,10 @@
};
/* These power domains are grouped by VD_LOGIC */
+ pd_edp@RK3399_PD_EDP {
+ reg = ;
+ clocks = <&cru PCLK_EDP_CTRL>;
+ };
pd_emmc@RK3399_PD_EMMC {
reg = ;
clocks = <&cru ACLK_EMMC>;
--
2.7.4
[PATCH 5/5] arm64: dts: rockchip: add rk3399 hdmi nodes
Add an hdmi node, and also add hdmi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4965163..c398eb0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1485,6 +1485,11 @@
remote-endpoint = <&edp_in_vopl>;
};
+ vopl_out_hdmi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_vopl>;
+ };
+
};
};
@@ -1526,6 +1531,11 @@
remote-endpoint = <&mipi_in_vopb>;
};
+ vopb_out_hdmi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_vopb>;
+ };
+
};
};
@@ -1541,6 +1551,33 @@
status = "disabled";
};
+ hdmi: hdmi@ff94 {
+ compatible = "rockchip,rk3399-dw-hdmi";
+ reg = <0x0 0xff94 0x0 0x2>;
+ reg-io-width = <4>;
+ rockchip,grf = <&grf>;
+ power-domains = <&power RK3399_PD_HDCP>;
+ interrupts = ;
+ clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru
PLL_VPLL>, <&cru PCLK_VIO_GRF>;
+ clock-names = "iahb", "isfr", "vpll", "grf";
+ status = "disabled";
+
+ ports {
+ hdmi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_hdmi>;
+ };
+ hdmi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_hdmi>;
+ };
+ };
+ };
+ };
+
mipi_dsi: mipi@ff96 {
compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x0 0xff96 0x0 0x8000>;
--
2.7.4
[PATCH 3/5] arm64: dts: rockchip: add rk3399 edp nodes
Add an edp node, and also add edp endpoints to vopb and vopl
output port nodes.
Signed-off-by: Yakir Yang
Signed-off-by: Caesar Wang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b88bd02..b4ff50a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1474,6 +1474,12 @@
vopl_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vopl_out_edp: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&edp_in_vopl>;
+ };
+
};
};
@@ -1504,6 +1510,12 @@
vopb_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vopb_out_edp: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&edp_in_vopb>;
+ };
+
};
};
@@ -1519,6 +1531,42 @@
status = "disabled";
};
+ edp: edp@ff97 {
+ compatible = "rockchip,rk3399-edp";
+ reg = <0x0 0xff97 0x0 0x8000>;
+ interrupts = ;
+ clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ clock-names = "dp", "pclk";
+ power-domains = <&power RK3399_PD_EDP>;
+ resets = <&cru SRST_P_EDP_CTRL>;
+ reset-names = "dp";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_edp>;
+ };
+
+ edp_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_edp>;
+ };
+ };
+ };
+ };
+
display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vopl_out>, <&vopb_out>;
--
2.7.4
[PATCH 1/5] arm64: dts: rockchip: Add rk3399 vop and display-subsystem
Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
top level display-subsystem root node.
Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
VOPs' output ports.
Signed-off-by: Mark Yao
Signed-off-by: Yakir Yang
Signed-off-by: Caesar Wang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e795135..300e500 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1455,6 +1455,71 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f 0x0 0x1ffc>, <0x0 0xff8f2000 0x0 0x400>;
+ interrupts = ;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>,
<&cru DCLK_VOP1_DIV>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru
SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ power-domains = <&power RK3399_PD_VOPL>;
+ iommus = <&vopl_mmu>;
+ status = "disabled";
+
+ vopl_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vopl_mmu: iommu@ff8f3f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff8f3f00 0x0 0x100>;
+ interrupts = ;
+ interrupt-names = "vopl_mmu";
+ clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3399_PD_VOPL>;
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ vopb: vop@ff90 {
+ compatible = "rockchip,rk3399-vop-big";
+ reg = <0x0 0xff90 0x0 0x1ffc>, <0x0 0xff902000 0x0 0x1000>;
+ interrupts = ;
+ clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>,
<&cru DCLK_VOP0_DIV>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop", "dclk_source";
+ resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru
SRST_D_VOP0>;
+ reset-names = "axi", "ahb", "dclk";
+ power-domains = <&power RK3399_PD_VOPB>;
+ iommus = <&vopb_mmu>;
+ status = "disabled";
+
+ vopb_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vopb_mmu: iommu@ff903f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff903f00 0x0 0x100>;
+ interrupts = ;
+ interrupt-names = "vopb_mmu";
+ clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3399_PD_VOPB>;
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vopl_out>, <&vopb_out>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <&grf>;
--
2.7.4
[PATCH 4/5] arm64: dts: rockchip: add rk3399 mipi nodes
Add an mipi node, and also add mipi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 44
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b4ff50a..4965163 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1475,6 +1475,11 @@
#address-cells = <1>;
#size-cells = <0>;
+ vopl_out_mipi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
+
vopl_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopl>;
@@ -1516,6 +1521,11 @@
remote-endpoint = <&edp_in_vopb>;
};
+ vopb_out_mipi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
+
};
};
@@ -1531,6 +1541,40 @@
status = "disabled";
};
+ mipi_dsi: mipi@ff96 {
+ compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x0 0xff96 0x0 0x8000>;
+ interrupts = ;
+ clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+<&cru SCLK_DPHY_TX0_CFG>;
+ clock-names = "ref", "pclk", "phy_cfg";
+ power-domains = <&power RK3399_PD_VIO>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+ };
+
edp: edp@ff97 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff97 0x0 0x8000>;
--
2.7.4
Re: [PATCH 1/5] arm64: dts: rockchip: Add rk3399 vop and display-subsystem
Hi heko,
2017-07-14 7:34 GMT+08:00 Heiko Stuebner :
> Hi Jacob,
>
> Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen:
>> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
>> top level display-subsystem root node.
>>
>> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
>> VOPs' output ports.
>>
>> Signed-off-by: Mark Yao
>> Signed-off-by: Yakir Yang
>> Signed-off-by: Caesar Wang
>> Signed-off-by: Jacob Chen
>> ---
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65
>>
>> 1 file changed, 65 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index e795135..300e500 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -1455,6 +1455,71 @@
>> status = "disabled";
>> };
>>
>> + vopl: vop@ff8f {
>> + compatible = "rockchip,rk3399-vop-lit";
>> + reg = <0x0 0xff8f 0x0 0x1ffc>, <0x0 0xff8f2000 0x0 0x400>;
>
> What is this second memory region doing? It looks like this is the meant
> to cover VOP_GAMMA_LUT_ADDR, but can't you just map the whole area?
> ChromeOS seems to be doing fine using the whole area as
> <0x0 0xff8f 0x0 0x3efc>
> and I've also not seen any code changes actually mapping/using this
> second area.
>
0x1c00 - 0x200 for cabc_lut
0x2000 - 0x300 for gama_lut
My mistakes, It seems mark havn't send gamma and cabc support to upstream.
We shoud just using the whole area map.
>
>> + interrupts = ;
>> + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>,
>> <&cru DCLK_VOP1_DIV>;
>> + clock-names = "aclk_vop", "dclk_vop", "hclk_vop",
>> "dclk_source";
>
> While I know that this is based on my idea on handling the hdmi pll-rate
> requirements, I haven't found the matching code- and dt-binding-changes
> posted to a list yet.
>
Yeah, should i collect mark's patches or remove it at first?
>
> Heiko
>
Re: [PATCH 5/5] dt-bindings: Document the Rockchip RGA bindings
Hi rob,
2017-06-29 6:29 GMT+08:00 Rob Herring :
> On Mon, Jun 26, 2017 at 10:53:22PM +0800, Jacob Chen wrote:
>> Add DT bindings documentation for Rockchip RGA
>>
>> Signed-off-by: Yakir Yang
>> Signed-off-by: Jacob Chen
>> ---
>> .../devicetree/bindings/media/rockchip-rga.txt | 36
>> ++
>
> Should be under bindings/gpu/
>
>> 1 file changed, 36 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt
>>
>> diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt
>> b/Documentation/devicetree/bindings/media/rockchip-rga.txt
>> new file mode 100644
>> index 000..48a260e5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt
>> @@ -0,0 +1,36 @@
>> +device-tree bindings for rockchip 2D raster graphic acceleration controller
>> (RGA)
>> +
>> +RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D
>> +graphics operations, such as point/line drawing, image scaling, rotation,
>> +BitBLT, alpha blending and image blur/sharpness.
>> +
>> +Required properties:
>> +- compatible: value should be one of the following
>> + "rockchip,rk3228-rga";
>> + "rockchip,rk3288-rga";
>> + "rockchip,rk3399-rga";
>> +
>> +- interrupts: RGA interrupt number.
>> +
>> +- clocks: phandle to RGA sclk/hclk/aclk clocks
>> +
>> +- clock-names: should be "aclk" "hclk" and "sclk"
>> +
>> +- resets: Must contain an entry for each entry in reset-names.
>> + See ../reset/reset.txt for details.
>> +- reset-names: should be "core" "axi" and "ahb"
>> +
>> +Example:
>> +SoC specific DT entry:
>> + rga: rga@ff68 {
>
> gpu@...
>
It's used for v4l2 drvier, should i move it bindings/gpu/?
>> + compatible = "rockchip,rk3399-rga";
>> + reg = <0xff68 0x1>;
>> + interrupts = ;
>> + interrupt-names = "rga";
>> + clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru
>> SCLK_RGA_CORE>;
>> + clock-names = "aclk", "hclk", "sclk";
>> +
>> + resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru
>> SRST_H_RGA>;
>> + reset-names = "core, "axi", "ahb";
>> + status = "disabled";
>
> Don't show status in examples.
>
>> + };
>> --
>> 2.7.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/6] Add Rockchip RGA V4l2 support
This patch series add a v4l2 m2m drvier for rockchip RGA direct rendering based 2d graphics acceleration module. change in V2: - generalize the controls. - map buffers (10-50 us) in every cmd-run rather than in buffer-import to avoid get_free_pages failed on actively used systems. - remove status in dt-bindings examples. Jacob Chen (6): [media] v4l: add blend modes controls [media] rockchip/rga: v4l2 m2m support ARM: dts: rockchip: add RGA device node for RK3288 ARM: dts: rockchip: add RGA device node for RK3399 ARM: dts: rockchip: enable RGA for rk3288 devices dt-bindings: Document the Rockchip RGA bindings .../devicetree/bindings/media/rockchip-rga.txt | 35 + arch/arm/boot/dts/rk3288-evb.dtsi | 4 + arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 4 + arch/arm/boot/dts/rk3288-firefly.dtsi | 4 + arch/arm/boot/dts/rk3288-miqi.dts | 4 + arch/arm/boot/dts/rk3288-popmetal.dts | 4 + arch/arm/boot/dts/rk3288-tinker.dts| 4 + arch/arm/boot/dts/rk3288.dtsi | 13 + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 13 + drivers/media/platform/Kconfig | 11 + drivers/media/platform/Makefile| 2 + drivers/media/platform/rockchip-rga/Makefile | 3 + drivers/media/platform/rockchip-rga/rga-buf.c | 176 drivers/media/platform/rockchip-rga/rga-hw.c | 456 ++ drivers/media/platform/rockchip-rga/rga-hw.h | 434 + drivers/media/platform/rockchip-rga/rga.c | 979 + drivers/media/platform/rockchip-rga/rga.h | 133 +++ drivers/media/v4l2-core/v4l2-ctrls.c | 19 + include/uapi/linux/v4l2-controls.h | 18 +- 19 files changed, 2315 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt create mode 100644 drivers/media/platform/rockchip-rga/Makefile create mode 100644 drivers/media/platform/rockchip-rga/rga-buf.c create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.c create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.h create mode 100644 drivers/media/platform/rockchip-rga/rga.c create mode 100644 drivers/media/platform/rockchip-rga/rga.h -- 2.7.4
[PATCH v2 2/6] [media] rockchip/rga: v4l2 m2m support
Rockchip RGA is a separate 2D raster graphic acceleration unit. It
accelerates 2D graphics operations, such as point/line drawing, image
scaling, rotation, BitBLT, alpha blending and image blur/sharpness.
The drvier is mostly based on s5p-g2d v4l2 m2m driver.
And supports various operations from the rendering pipeline.
- copy
- fast solid color fill
- rotation
- flip
- alpha blending
The code in rga-hw.c is used to configure regs accroding to operations.
The code in rga-buf.c is used to create private mmu table for RGA.
The tables is stored in a list, and be removed when buffer is cleanup.
Signed-off-by: Jacob Chen
---
drivers/media/platform/Kconfig| 11 +
drivers/media/platform/Makefile | 2 +
drivers/media/platform/rockchip-rga/Makefile | 3 +
drivers/media/platform/rockchip-rga/rga-buf.c | 122
drivers/media/platform/rockchip-rga/rga-hw.c | 652 ++
drivers/media/platform/rockchip-rga/rga-hw.h | 437
drivers/media/platform/rockchip-rga/rga.c | 958 ++
drivers/media/platform/rockchip-rga/rga.h | 111 +++
8 files changed, 2296 insertions(+)
create mode 100644 drivers/media/platform/rockchip-rga/Makefile
create mode 100644 drivers/media/platform/rockchip-rga/rga-buf.c
create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.c
create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.h
create mode 100644 drivers/media/platform/rockchip-rga/rga.c
create mode 100644 drivers/media/platform/rockchip-rga/rga.h
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index c9106e1..8199bcf 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -411,6 +411,17 @@ config VIDEO_RENESAS_VSP1
To compile this driver as a module, choose M here: the module
will be called vsp1.
+config VIDEO_ROCKCHIP_RGA
+ tristate "Rockchip Raster 2d Grapphic Acceleration Unit"
+ depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
+ depends on ARCH_ROCKCHIP || COMPILE_TEST
+ select VIDEOBUF2_DMA_SG
+ select V4L2_MEM2MEM_DEV
+ default n
+ ---help---
+ This is a v4l2 driver for Rockchip SOC RGA2
+ 2d graphics accelerator.
+
config VIDEO_TI_VPE
tristate "TI VPE (Video Processing Engine) driver"
depends on VIDEO_DEV && VIDEO_V4L2
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index 349ddf6..3bf096f 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -54,6 +54,8 @@ obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o
obj-$(CONFIG_VIDEO_RENESAS_JPU)+= rcar_jpu.o
obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
+obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) += rockchip-rga/
+
obj-y += omap/
obj-$(CONFIG_VIDEO_AM437X_VPFE)+= am437x/
diff --git a/drivers/media/platform/rockchip-rga/Makefile
b/drivers/media/platform/rockchip-rga/Makefile
new file mode 100644
index 000..92fe254
--- /dev/null
+++ b/drivers/media/platform/rockchip-rga/Makefile
@@ -0,0 +1,3 @@
+rockchip-rga-objs := rga.o rga-hw.o rga-buf.o
+
+obj-$(CONFIG_VIDEO_ROCKCHIP_RGA) += rockchip-rga.o
diff --git a/drivers/media/platform/rockchip-rga/rga-buf.c
b/drivers/media/platform/rockchip-rga/rga-buf.c
new file mode 100644
index 000..efa5686
--- /dev/null
+++ b/drivers/media/platform/rockchip-rga/rga-buf.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
+ * Author: Jacob Chen
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "rga-hw.h"
+#include "rga.h"
+
+static int
+rga_queue_setup(struct vb2_queue *vq,
+unsigned int *nbuffers, unsigned int *nplanes,
+unsigned int sizes[], struct device *alloc_devs[])
+{
+ struct rga_ctx *ctx = vb2_get_drv_priv(vq);
+ struct rga_frame *f = rga_get_frame(ctx, vq->type);
+
+ if (IS_ERR(f))
+ return PTR_ERR(f);
+
+ sizes[0] = f->size;
+ *nplanes = 1;
+
+ if (*nbuffers == 0)
+ *nbuffers = 1;
+
+ return 0;
+}
+
+static int rga_buf_prepare(struct vb2_buffer *vb)
+{
+ struct rga_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
+ struct rga_frame *f = rga_get_frame(ctx, vb->vb2_queue->type);
+
+ if (IS_ERR(f))
+ return PTR_ERR(f);
+
+ vb2_set_plane_payload(vb, 0,
[PATCH v2 3/6] ARM: dts: rockchip: add RGA device node for RK3288
This patch add the RGA dt config of rk3288 SoC.
Signed-off-by: Yakir Yang
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 1efc2f2..83d025d 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -945,6 +945,19 @@
status = "okay";
};
+ rga: rga@ff92 {
+ compatible = "rockchip,rk3288-rga";
+ reg = <0xff92 0x180>;
+ interrupts = ;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
+ clock-names = "aclk", "hclk", "sclk";
+ power-domains = <&power RK3288_PD_VIO>;
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru
SRST_RGA_AHB>;
+ reset-names = "core", "axi", "ahb";
+ status = "disabled";
+ };
+
vopb: vop@ff93 {
compatible = "rockchip,rk3288-vop";
reg = <0xff93 0x19c>;
--
2.7.4
[PATCH v2 1/6] [media] v4l: add blend modes controls
At peresent, we don't have a control for Compositing and Blend.
All drivers are just doing copies while actually many hardwares
supports more functions.
So Adding V4L2 controls for Compositing and Blend, used for for
composting streams.
The values are based on porter duff operations.
Defined in below links.
https://developer.xamarin.com/api/type/Android.Graphics.PorterDuff+Mode/
Signed-off-by: Jacob Chen
Suggested-by: Nicolas Dufresne
---
drivers/media/v4l2-core/v4l2-ctrls.c | 19 +++
include/uapi/linux/v4l2-controls.h | 18 +-
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c
b/drivers/media/v4l2-core/v4l2-ctrls.c
index b9e08e3..8a235fd 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -216,6 +216,21 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
"Private Packet, IVTV Format",
NULL
};
+ static const char * const blend_modes[] = {
+ "Source",
+ "Source Top",
+ "Source In",
+ "Source Out",
+ "Source Over",
+ "Destination",
+ "Destination Top",
+ "Destination In",
+ "Destination Out",
+ "Destination Over",
+ "Add",
+ "Clear",
+ NULL
+ };
static const char * const camera_power_line_frequency[] = {
"Disabled",
"50 Hz",
@@ -522,6 +537,8 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
return camera_exposure_metering;
case V4L2_CID_AUTO_FOCUS_RANGE:
return camera_auto_focus_range;
+ case V4L2_CID_BLEND:
+ return blend_modes;
case V4L2_CID_COLORFX:
return colorfx;
case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
@@ -655,6 +672,7 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: return "Min Number of Output
Buffers";
case V4L2_CID_ALPHA_COMPONENT: return "Alpha Component";
case V4L2_CID_COLORFX_CBCR: return "Color Effects, CbCr";
+ case V4L2_CID_BLEND:return "Compositing and Blend
Modes";
/* Codec controls */
/* The MPEG controls are applicable to all codec controls
@@ -1033,6 +1051,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum
v4l2_ctrl_type *type,
case V4L2_CID_MPEG_STREAM_VBI_FMT:
case V4L2_CID_EXPOSURE_AUTO:
case V4L2_CID_AUTO_FOCUS_RANGE:
+ case V4L2_CID_BLEND:
case V4L2_CID_COLORFX:
case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
case V4L2_CID_TUNE_PREEMPHASIS:
diff --git a/include/uapi/linux/v4l2-controls.h
b/include/uapi/linux/v4l2-controls.h
index 0d2e1e0..019fdca 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -140,8 +140,24 @@ enum v4l2_colorfx {
#define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41)
#define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42)
+#define V4L2_CID_BLEND (V4L2_CID_BASE+43)
+enum v4l2_blend_mode {
+ V4L2_BLEND_SRC = 0,
+ V4L2_BLEND_SRCATOP = 1,
+ V4L2_BLEND_SRCIN= 2,
+ V4L2_BLEND_SRCOUT = 3,
+ V4L2_BLEND_SRCOVER = 4,
+ V4L2_BLEND_DST = 5,
+ V4L2_BLEND_DSTATOP = 6,
+ V4L2_BLEND_DSTIN= 7,
+ V4L2_BLEND_DSTOUT = 8,
+ V4L2_BLEND_DSTOVER = 9,
+ V4L2_BLEND_ADD = 10,
+ V4L2_BLEND_CLEAR= 11,
+};
+
/* last CID + 1 */
-#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43)
+#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44)
/* USER-class private control IDs */
--
2.7.4
[PATCH v2 5/6] ARM: dts: rockchip: enable RGA for rk3288 devices
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288-evb.dtsi | 4
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 4
arch/arm/boot/dts/rk3288-firefly.dtsi | 4
arch/arm/boot/dts/rk3288-miqi.dts | 4
arch/arm/boot/dts/rk3288-popmetal.dts | 4
arch/arm/boot/dts/rk3288-tinker.dts | 4
6 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi
b/arch/arm/boot/dts/rk3288-evb.dtsi
index 4905760..ec12162 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -379,6 +379,10 @@
};
};
+&rga {
+ status = "okay";
+};
+
&usbphy {
status = "okay";
};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
index 8134966..fffa92e2 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
@@ -283,6 +283,10 @@
};
};
+&rga {
+ status = "okay";
+};
+
&tsadc {
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi
b/arch/arm/boot/dts/rk3288-firefly.dtsi
index f520589..74a6ce5 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -500,6 +500,10 @@
};
};
+&rga {
+ status = "okay";
+};
+
&saradc {
vref-supply = <&vcc_18>;
status = "okay";
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts
b/arch/arm/boot/dts/rk3288-miqi.dts
index 21326f3..dc5e6bd 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -401,6 +401,10 @@
};
};
+&rga {
+ status = "okay";
+};
+
&saradc {
vref-supply = <&vcc_18>;
status = "okay";
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts
b/arch/arm/boot/dts/rk3288-popmetal.dts
index aa1f9ec..362e5aa 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -490,6 +490,10 @@
};
};
+&rga {
+ status = "okay";
+};
+
&tsadc {
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts
b/arch/arm/boot/dts/rk3288-tinker.dts
index 525b0e5..1a8c149 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -460,6 +460,10 @@
status = "okay";
};
+&rga {
+ status = "okay";
+};
+
&saradc {
vref-supply = <&vcc18_ldo1>;
status ="okay";
--
2.7.4
[PATCH v2 6/6] dt-bindings: Document the Rockchip RGA bindings
Add DT bindings documentation for Rockchip RGA
Signed-off-by: Yakir Yang
Signed-off-by: Jacob Chen
---
.../devicetree/bindings/media/rockchip-rga.txt | 35 ++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt
b/Documentation/devicetree/bindings/media/rockchip-rga.txt
new file mode 100644
index 000..966eba0
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt
@@ -0,0 +1,35 @@
+device-tree bindings for rockchip 2D raster graphic acceleration controller
(RGA)
+
+RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D
+graphics operations, such as point/line drawing, image scaling, rotation,
+BitBLT, alpha blending and image blur/sharpness.
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3228-rga";
+ "rockchip,rk3288-rga";
+ "rockchip,rk3399-rga";
+
+- interrupts: RGA interrupt number.
+
+- clocks: phandle to RGA sclk/hclk/aclk clocks
+
+- clock-names: should be "aclk" "hclk" and "sclk"
+
+- resets: Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+- reset-names: should be "core" "axi" and "ahb"
+
+Example:
+SoC specific DT entry:
+ rga: rga@ff68 {
+ compatible = "rockchip,rk3399-rga";
+ reg = <0xff68 0x1>;
+ interrupts = ;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+ clock-names = "aclk", "hclk", "sclk";
+
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru
SRST_H_RGA>;
+ reset-names = "core, "axi", "ahb";
+ };
--
2.7.4
[PATCH v2 4/6] ARM: dts: rockchip: add RGA device node for RK3399
This patch add the RGA dt config of RK3399 SoC.
Signed-off-by: Yakir Yang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8e6d1bd..fc33ce5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1056,6 +1056,19 @@
status = "disabled";
};
+ rga: rga@ff68 {
+ compatible = "rockchip,rk3399-rga";
+ reg = <0x0 0xff68 0x0 0x1>;
+ interrupts = ;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+ clock-names = "aclk", "hclk", "sclk";
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru
SRST_H_RGA>;
+ reset-names = "core", "axi", "ahb";
+ power-domains = <&power RK3399_PD_RGA>;
+ status = "disabled";
+ };
+
efuse0: efuse@ff69 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff69 0x0 0x80>;
--
2.7.4
Re: [PATCH v2 2/6] [media] rockchip/rga: v4l2 m2m support
Hi all, 2017-07-16 0:49 GMT+08:00 Personnel : > Le samedi 15 juillet 2017 à 12:42 +0300, Laurent Pinchart a écrit : >> Hi Jacob, >> >> Thank you for the patch. >> >> On Saturday 15 Jul 2017 14:58:36 Jacob Chen wrote: >> > Rockchip RGA is a separate 2D raster graphic acceleration unit. It >> > accelerates 2D graphics operations, such as point/line drawing, image >> > scaling, rotation, BitBLT, alpha blending and image blur/sharpness. >> > >> > The drvier is mostly based on s5p-g2d v4l2 m2m driver. >> > And supports various operations from the rendering pipeline. >> > - copy >> > - fast solid color fill >> > - rotation >> > - flip >> > - alpha blending >> >> I notice that you don't support the drawing operations. How do you plan to >> support them later through the V4L2 M2M API ? I hate stating the obvious, but >> wouldn't the DRM API be better fit for a graphic accelerator ? > > It could fit, maybe, but it really lacks some framework. Also, DRM is > not really meant for M2M operation, and it's also not great for multi- > process. Until recently, there was competing drivers for Exynos, both > implemented in V4L2 and DRM, for similar rational, all DRM ones are > being deprecated/removed. > > I think 2D blitters in V4L2 are fine, but they terribly lack something > to differentiate them from converters/scalers when looking up the HW > list. Could be as simple as a capability flag, if I can suggest. For > the reference, the 2D blitter on IMX6 has been used to implement a live > video mixer in GStreamer. > > https://bugzilla.gnome.org/show_bug.cgi?id=772766 > We have write a drm RGA driver. https://patchwork.kernel.org/patch/8630841/ Here are the reasons that why i rewrite it to V4l2 M2M. 1. V4l2 have a better buffer framework. If it use DRM-GEM to handle buffers, there will be much redundant cache flush, and we have to add much hack code to workaround. 2. This driver will be used in rockchip linux project. We mostly use it to scale/colorconvert/rotate/mix video/camera stream. A V4L2 M2M drvier can be directly used in gstreamer. The disadvantages of V4l2 M2M API is that it's not stateless. It's inconvenient if user change size frequently, but it's OK, we have not yet need this and I think it's possible to extend. ; ) >> >> Additionally, V4L2 M2M has one source and one destination. How do you >> implement alpha blending in that case, which by definition requires at least >> two sources ? > > This type of HW only do in-place blits. When using such a node, the > buffer queued on the V4L2_CAPTURE contains the destination image, and > the buffer queued on the V4L2_OUTPUT is the source image. > Yep. >> >> > The code in rga-hw.c is used to configure regs accroding to operations. >> > >> > The code in rga-buf.c is used to create private mmu table for RGA. >> > The tables is stored in a list, and be removed when buffer is cleanup. >> >> Looking at the implementation it seems to be a scatter-gather list, not an >> MMU. Is that right ? Does the hardware documentation refer to it as an MMU ? >> It's a 1-level MMU... We use it like a scatter-gather list, It's also the reason why we don't use RGA with DRM API. >> > Signed-off-by: Jacob Chen >> > --- >> > drivers/media/platform/Kconfig| 11 + >> > drivers/media/platform/Makefile | 2 + >> > drivers/media/platform/rockchip-rga/Makefile | 3 + >> > drivers/media/platform/rockchip-rga/rga-buf.c | 122 >> > drivers/media/platform/rockchip-rga/rga-hw.c | 652 ++ >> > drivers/media/platform/rockchip-rga/rga-hw.h | 437 >> > drivers/media/platform/rockchip-rga/rga.c | 958 >> > +++ >> > drivers/media/platform/rockchip-rga/rga.h | 111 +++ >> > 8 files changed, 2296 insertions(+) >> > create mode 100644 drivers/media/platform/rockchip-rga/Makefile >> > create mode 100644 drivers/media/platform/rockchip-rga/rga-buf.c >> > create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.c >> > create mode 100644 drivers/media/platform/rockchip-rga/rga-hw.h >> > create mode 100644 drivers/media/platform/rockchip-rga/rga.c >> > create mode 100644 drivers/media/platform/rockchip-rga/rga.h >> >>
Re: [PATCH v2 5/6] ARM: dts: rockchip: enable RGA for rk3288 devices
Hi Laurent,
2017-07-15 17:16 GMT+08:00 Laurent Pinchart :
> Hi Jacob,
>
> Thank you for the patch.
>
> On Saturday 15 Jul 2017 14:58:39 Jacob Chen wrote:
>> Signed-off-by: Jacob Chen
>> ---
>> arch/arm/boot/dts/rk3288-evb.dtsi | 4
>> arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 4
>> arch/arm/boot/dts/rk3288-firefly.dtsi | 4
>> arch/arm/boot/dts/rk3288-miqi.dts | 4
>> arch/arm/boot/dts/rk3288-popmetal.dts | 4
>> arch/arm/boot/dts/rk3288-tinker.dts | 4
>
> Some boards are missing from this list (Fennec, Phycore, ...) What criteria
> have you used to decide on which ones to enable the RGA ? That should be
> explained in the commit message.
>
Ok.
I just enable the boards i have tested, because i can't make sure it
won't break the other board
because of clocks or power-domains.
>> 6 files changed, 24 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi
>> b/arch/arm/boot/dts/rk3288-evb.dtsi index 4905760..ec12162 100644
>> --- a/arch/arm/boot/dts/rk3288-evb.dtsi
>> +++ b/arch/arm/boot/dts/rk3288-evb.dtsi
>> @@ -379,6 +379,10 @@
>> };
>> };
>>
>> +&rga {
>> + status = "okay";
>> +};
>> +
>> &usbphy {
>> status = "okay";
>> };
>> diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
>> b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi index 8134966..fffa92e2
>> 100644
>> --- a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
>> +++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
>> @@ -283,6 +283,10 @@
>> };
>> };
>>
>> +&rga {
>> + status = "okay";
>> +};
>> +
>> &tsadc {
>> rockchip,hw-tshut-mode = <0>;
>> rockchip,hw-tshut-polarity = <0>;
>> diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi
>> b/arch/arm/boot/dts/rk3288-firefly.dtsi index f520589..74a6ce5 100644
>> --- a/arch/arm/boot/dts/rk3288-firefly.dtsi
>> +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
>> @@ -500,6 +500,10 @@
>> };
>> };
>>
>> +&rga {
>> + status = "okay";
>> +};
>> +
>> &saradc {
>> vref-supply = <&vcc_18>;
>> status = "okay";
>> diff --git a/arch/arm/boot/dts/rk3288-miqi.dts
>> b/arch/arm/boot/dts/rk3288-miqi.dts index 21326f3..dc5e6bd 100644
>> --- a/arch/arm/boot/dts/rk3288-miqi.dts
>> +++ b/arch/arm/boot/dts/rk3288-miqi.dts
>> @@ -401,6 +401,10 @@
>> };
>> };
>>
>> +&rga {
>> + status = "okay";
>> +};
>> +
>> &saradc {
>> vref-supply = <&vcc_18>;
>> status = "okay";
>> diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts
>> b/arch/arm/boot/dts/rk3288-popmetal.dts index aa1f9ec..362e5aa 100644
>> --- a/arch/arm/boot/dts/rk3288-popmetal.dts
>> +++ b/arch/arm/boot/dts/rk3288-popmetal.dts
>> @@ -490,6 +490,10 @@
>> };
>> };
>>
>> +&rga {
>> + status = "okay";
>> +};
>> +
>> &tsadc {
>> rockchip,hw-tshut-mode = <0>;
>> rockchip,hw-tshut-polarity = <0>;
>> diff --git a/arch/arm/boot/dts/rk3288-tinker.dts
>> b/arch/arm/boot/dts/rk3288-tinker.dts index 525b0e5..1a8c149 100644
>> --- a/arch/arm/boot/dts/rk3288-tinker.dts
>> +++ b/arch/arm/boot/dts/rk3288-tinker.dts
>> @@ -460,6 +460,10 @@
>> status = "okay";
>> };
>>
>> +&rga {
>> + status = "okay";
>> +};
>> +
>> &saradc {
>> vref-supply = <&vcc18_ldo1>;
>> status ="okay";
>
> --
> Regards,
>
> Laurent Pinchart
>
Re: [PATCH v2 5/6] ARM: dts: rockchip: enable RGA for rk3288 devices
Hi Laurent, 2017-07-17 10:28 GMT+08:00 Laurent Pinchart : > Hi Jacob, > > On Sunday 16 Jul 2017 12:23:02 Jacob Chen wrote: >> 2017-07-15 17:16 GMT+08:00 Laurent Pinchart: >> > On Saturday 15 Jul 2017 14:58:39 Jacob Chen wrote: >> >> Signed-off-by: Jacob Chen >> >> --- >> >> >> >> arch/arm/boot/dts/rk3288-evb.dtsi | 4 >> >> arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 4 >> >> arch/arm/boot/dts/rk3288-firefly.dtsi | 4 >> >> arch/arm/boot/dts/rk3288-miqi.dts | 4 >> >> arch/arm/boot/dts/rk3288-popmetal.dts | 4 >> >> arch/arm/boot/dts/rk3288-tinker.dts | 4 >> > >> > Some boards are missing from this list (Fennec, Phycore, ...) What >> > criteria have you used to decide on which ones to enable the RGA ? That >> > should be explained in the commit message. >> >> Ok. >> >> I just enable the boards i have tested, because i can't make sure it >> won't break the other board because of clocks or power-domains. > > Given the clocks and power domains shouldn't be board-specific, would it make > sense to try and get the change tested on the remaining boards ? You could Not all drivers have handle power domains and clocks appropriately, It may triggers bugs, but since it's a V4l2 driver not DRM driver, i will enable it for all rk3288 boards. (DRM device will try to probe in very eraly stage and update clocks/power-domains...) > then enable the device in the SoC .dtsi file, which would be much simpler. > We have many different version RGA drivers in rockchip downstream kernel. To keep consistent, i didn't enable it in .dtsi. >> >> 6 files changed, 24 insertions(+) > > -- > Regards, > > Laurent Pinchart >
Re: [PATCH v2 2/6] [media] rockchip/rga: v4l2 m2m support
Hi, 2017-07-17 10:43 GMT+08:00 Laurent Pinchart : > Hi Jacob, > > On Sunday 16 Jul 2017 12:19:41 Jacob Chen wrote: >> 2017-07-16 0:49 GMT+08:00 Personnel: >> > Le samedi 15 juillet 2017 à 12:42 +0300, Laurent Pinchart a écrit : >> >> On Saturday 15 Jul 2017 14:58:36 Jacob Chen wrote: >> >> > Rockchip RGA is a separate 2D raster graphic acceleration unit. It >> >> > accelerates 2D graphics operations, such as point/line drawing, image >> >> > scaling, rotation, BitBLT, alpha blending and image blur/sharpness. >> >> > >> >> > The drvier is mostly based on s5p-g2d v4l2 m2m driver. >> >> > And supports various operations from the rendering pipeline. >> >> > >> >> > - copy >> >> > - fast solid color fill >> >> > - rotation >> >> > - flip >> >> > - alpha blending >> >> >> >> I notice that you don't support the drawing operations. How do you plan >> >> to support them later through the V4L2 M2M API ? I hate stating the >> >> obvious, but wouldn't the DRM API be better fit for a graphic accelerator >> >> ? >> > >> > It could fit, maybe, but it really lacks some framework. Also, DRM is >> > not really meant for M2M operation, and it's also not great for multi- >> > process. Until recently, there was competing drivers for Exynos, both >> > implemented in V4L2 and DRM, for similar rational, all DRM ones are >> > being deprecated/removed. >> > >> > I think 2D blitters in V4L2 are fine, but they terribly lack something >> > to differentiate them from converters/scalers when looking up the HW >> > list. Could be as simple as a capability flag, if I can suggest. For >> > the reference, the 2D blitter on IMX6 has been used to implement a live >> > video mixer in GStreamer. >> > >> > https://bugzilla.gnome.org/show_bug.cgi?id=772766 >> >> We have write a drm RGA driver. >> https://patchwork.kernel.org/patch/8630841/ >> >> Here are the reasons that why i rewrite it to V4l2 M2M. >> 1. V4l2 have a better buffer framework. If it use DRM-GEM to handle buffers, >> there will be much redundant cache flush, and we have to add much hack code >> to workaround. > > I'm glad to hear that you find buffer handling easy in V4L2 :-) > >> 2. This driver will be used in rockchip linux project. We mostly use it to >> scale/colorconvert/rotate/mix video/camera stream. >> A V4L2 M2M drvier can be directly used in gstreamer. >> >> The disadvantages of V4l2 M2M API is that it's not stateless. >> It's inconvenient if user change size frequently, but it's OK, >> we have not yet need this and I think it's possible to extend. ;) > > CC'ing Alexandre Courbot. Alex, how's the request API going ? :-) > >> >> Additionally, V4L2 M2M has one source and one destination. How do you >> >> implement alpha blending in that case, which by definition requires at >> >> least two sources ? >> > >> > This type of HW only do in-place blits. When using such a node, the >> > buffer queued on the V4L2_CAPTURE contains the destination image, and >> > the buffer queued on the V4L2_OUTPUT is the source image. >> >> Yep. > > So the device performs bi-directional DMA on the capture queue buffers ? > Interesting, does videobuf2 support that properly ? > >From the code, I think V4L2_CAPTURE and V4L2_OUTPUT are handled in the same way. In my test, it work properly. >> >>> The code in rga-hw.c is used to configure regs accroding to operations. >> >>> >> >>> The code in rga-buf.c is used to create private mmu table for RGA. >> >>> The tables is stored in a list, and be removed when buffer is cleanup. >> >> >> >> Looking at the implementation it seems to be a scatter-gather list, not >> >> an MMU. Is that right ? Does the hardware documentation refer to it as an >> >> MMU ? >> >> It's a 1-level MMU... We use it like a scatter-gather list, >> It's also the reason why we don't use RGA with DRM API. > > You might want to explain this in the code, otherwise someone will ask you why > you don't implement support for the MMU through the IOMMU API. Calling it > scatter-gather would solve that problem, but if the hardware manual calls it > an MMU, there's no reason not to use that name in the code. > ok, i will add comments >> >>> Signed-o
Re: [PATCH 1/5] arm64: dts: rockchip: Add rk3399 vop and display-subsystem
Hi heko, 2017-07-17 1:31 GMT+08:00 Heiko Stuebner : > Hi Jacob, > > Am Donnerstag, 13. Juli 2017, 00:03:51 CEST schrieb Jacob Chen: >> Add devicetree nodes for rk3399 VOP (Video Output Processors), and the >> top level display-subsystem root node. >> >> Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the >> VOPs' output ports. >> >> Signed-off-by: Mark Yao >> Signed-off-by: Yakir Yang >> Signed-off-by: Caesar Wang >> Signed-off-by: Jacob Chen > > you might want to reduce the number of Signed-offs a bit :-) > > Also authorship needs to be fixed. I.e. first Signed-off for this patch > is from Mark, so in that case Mark probably also was the original author > and the patch should reflect that. General rule, topmost Signed-off is > of course from the original author. > OK, get it. > > Heiko >
[PATCH v2 0/5] arm64: dts: add rk3399 display-related nodes
This series patches add the display-related nodes for rk3399. Tested with kernel base on drm-misc and below patches. https://cgit.freedesktop.org/drm/drm-misc/ "drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY" "iommu/rockchip: Enable Rockchip IOMMU on ARM64" HDMI could work and have a display output. eDP could link with panel but i didn't get a display(Maybe something wrong in power things). For convenience, i think we should have those nodes in kernel now. changes in V2: - remove unused clock and reg for VOP. - correct author. Mark Yao (1): arm64: dts: rockchip: Add rk3399 vop and display-subsystem Elaine Zhang (1): arm64: dts: rockchip: add pd_edp node for rk3399 Yakir Yang (1): arm64: dts: rockchip: add rk3399 edp nodes Jacob Chen (2): arm64: dts: rockchip: add rk3399 mipi nodes arm64: dts: rockchip: add rk3399 hdmi nodes arch/arm64/boot/dts/rockchip/rk3399.dtsi | 198 +++ 1 file changed, 198 insertions(+) -- 2.7.4
[PATCH v2 1/5] arm64: dts: rockchip: Add rk3399 vop and display-subsystem
From: Mark Yao
Add devicetree nodes for rk3399 VOP (Video Output Processors), and the
top level display-subsystem root node.
Later patches add endpoints (eDP, HDMI, MIPI, etc) that attach to the
VOPs' output ports.
Signed-off-by: Mark Yao
Signed-off-by: Yakir Yang
Signed-off-by: Caesar Wang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 65
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e795135..978057d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1455,6 +1455,71 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f 0x0 0x3efc>;
+ interrupts = ;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru
SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ power-domains = <&power RK3399_PD_VOPL>;
+ iommus = <&vopl_mmu>;
+ status = "disabled";
+
+ vopl_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vopl_mmu: iommu@ff8f3f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff8f3f00 0x0 0x100>;
+ interrupts = ;
+ interrupt-names = "vopl_mmu";
+ clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3399_PD_VOPL>;
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ vopb: vop@ff90 {
+ compatible = "rockchip,rk3399-vop-big";
+ reg = <0x0 0xff90 0x0 0x3efc>;
+ interrupts = ;
+ clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru
SRST_D_VOP0>;
+ reset-names = "axi", "ahb", "dclk";
+ power-domains = <&power RK3399_PD_VOPB>;
+ iommus = <&vopb_mmu>;
+ status = "disabled";
+
+ vopb_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vopb_mmu: iommu@ff903f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x0 0xff903f00 0x0 0x100>;
+ interrupts = ;
+ interrupt-names = "vopb_mmu";
+ clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
+ clock-names = "aclk", "hclk";
+ power-domains = <&power RK3399_PD_VOPB>;
+ #iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vopl_out>, <&vopb_out>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <&grf>;
--
2.7.4
[PATCH v2 5/5] arm64: dts: rockchip: add rk3399 hdmi nodes
Add an hdmi node, and also add hdmi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 5c5c9d9..e204929 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1485,6 +1485,11 @@
remote-endpoint = <&edp_in_vopl>;
};
+ vopl_out_hdmi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_vopl>;
+ };
+
};
};
@@ -1526,6 +1531,11 @@
remote-endpoint = <&mipi_in_vopb>;
};
+ vopb_out_hdmi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_vopb>;
+ };
+
};
};
@@ -1541,6 +1551,33 @@
status = "disabled";
};
+ hdmi: hdmi@ff94 {
+ compatible = "rockchip,rk3399-dw-hdmi";
+ reg = <0x0 0xff94 0x0 0x2>;
+ reg-io-width = <4>;
+ rockchip,grf = <&grf>;
+ power-domains = <&power RK3399_PD_HDCP>;
+ interrupts = ;
+ clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru
PLL_VPLL>, <&cru PCLK_VIO_GRF>;
+ clock-names = "iahb", "isfr", "vpll", "grf";
+ status = "disabled";
+
+ ports {
+ hdmi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_hdmi>;
+ };
+ hdmi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_hdmi>;
+ };
+ };
+ };
+ };
+
mipi_dsi: mipi@ff96 {
compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x0 0xff96 0x0 0x8000>;
--
2.7.4
[PATCH v2 3/5] arm64: dts: rockchip: add rk3399 edp nodes
From: Yakir Yang
Add an edp node, and also add edp endpoints to vopb and vopl
output port nodes.
Signed-off-by: Yakir Yang
Signed-off-by: Caesar Wang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e0285f8..c0371af 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1474,6 +1474,12 @@
vopl_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vopl_out_edp: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&edp_in_vopl>;
+ };
+
};
};
@@ -1504,6 +1510,12 @@
vopb_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vopb_out_edp: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&edp_in_vopb>;
+ };
+
};
};
@@ -1519,6 +1531,42 @@
status = "disabled";
};
+ edp: edp@ff97 {
+ compatible = "rockchip,rk3399-edp";
+ reg = <0x0 0xff97 0x0 0x8000>;
+ interrupts = ;
+ clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ clock-names = "dp", "pclk";
+ power-domains = <&power RK3399_PD_EDP>;
+ resets = <&cru SRST_P_EDP_CTRL>;
+ reset-names = "dp";
+ rockchip,grf = <&grf>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_edp>;
+ };
+
+ edp_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_edp>;
+ };
+ };
+ };
+ };
+
display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vopl_out>, <&vopb_out>;
--
2.7.4
[PATCH v2 4/5] arm64: dts: rockchip: add rk3399 mipi nodes
Add an mipi node, and also add mipi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 44
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c0371af..5c5c9d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1475,6 +1475,11 @@
#address-cells = <1>;
#size-cells = <0>;
+ vopl_out_mipi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
+
vopl_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopl>;
@@ -1516,6 +1521,11 @@
remote-endpoint = <&edp_in_vopb>;
};
+ vopb_out_mipi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
+
};
};
@@ -1531,6 +1541,40 @@
status = "disabled";
};
+ mipi_dsi: mipi@ff96 {
+ compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x0 0xff96 0x0 0x8000>;
+ interrupts = ;
+ clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+<&cru SCLK_DPHY_TX0_CFG>;
+ clock-names = "ref", "pclk", "phy_cfg";
+ power-domains = <&power RK3399_PD_VIO>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+ };
+
edp: edp@ff97 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff97 0x0 0x8000>;
--
2.7.4
[PATCH v2 2/5] arm64: dts: rockchip: add pd_edp node for rk3399
From: Elaine Zhang
1. add pd node for RK3399 Soc
2. create power domain tree
3. add qos node for domain
Signed-off-by: Elaine Zhang
Signed-off-by: Caesar Wang
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 978057d..e0285f8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -956,6 +956,10 @@
};
/* These power domains are grouped by VD_LOGIC */
+ pd_edp@RK3399_PD_EDP {
+ reg = ;
+ clocks = <&cru PCLK_EDP_CTRL>;
+ };
pd_emmc@RK3399_PD_EMMC {
reg = ;
clocks = <&cru ACLK_EMMC>;
--
2.7.4
Re: [PATCH v2 2/6] [media] rockchip/rga: v4l2 m2m support
Hi, 2017-07-17 22:45 GMT+08:00 Nicolas Dufresne : > Le lundi 17 juillet 2017 à 05:37 +0300, Laurent Pinchart a écrit : >> Hi Nicolas, >> >> On Saturday 15 Jul 2017 12:49:13 Personnel wrote: >> >> You might want to fix your mailer to use your name :-) >> >> > Le samedi 15 juillet 2017 à 12:42 +0300, Laurent Pinchart a écrit : >> > > On Saturday 15 Jul 2017 14:58:36 Jacob Chen wrote: >> > > > Rockchip RGA is a separate 2D raster graphic acceleration unit. It >> > > > accelerates 2D graphics operations, such as point/line drawing, image >> > > > scaling, rotation, BitBLT, alpha blending and image blur/sharpness. >> > > > >> > > > The drvier is mostly based on s5p-g2d v4l2 m2m driver. >> > > > And supports various operations from the rendering pipeline. >> > > > >> > > > - copy >> > > > - fast solid color fill >> > > > - rotation >> > > > - flip >> > > > - alpha blending >> > > >> > > I notice that you don't support the drawing operations. How do you plan >> > > to >> > > support them later through the V4L2 M2M API ? I hate stating the obvious, >> > > but wouldn't the DRM API be better fit for a graphic accelerator ? >> > >> > It could fit, maybe, but it really lacks some framework. Also, DRM is >> > not really meant for M2M operation, and it's also not great for multi- >> > process. >> >> GPUs on embedded devices are mem-to-mem, and they're definitely shared >> between >> multiple processes :-) >> >> > Until recently, there was competing drivers for Exynos, both >> > implemented in V4L2 and DRM, for similar rational, all DRM ones are >> > being deprecated/removed. >> > >> > I think 2D blitters in V4L2 are fine, but they terribly lack something >> > to differentiate them from converters/scalers when looking up the HW >> > list. Could be as simple as a capability flag, if I can suggest. For >> > the reference, the 2D blitter on IMX6 has been used to implement a live >> > video mixer in GStreamer. >> > >> > https://bugzilla.gnome.org/show_bug.cgi?id=772766 >> >> If we decide that 2D blitters should be supported by V4L2 (and I'm open to >> get >> convinced about that), we really need to define a proper API before merging a >> bunch of drivers that will implement things in slightly different ways, >> otherwise the future will be very painful. > > Arguably, Jacob is not proposing anything new, as at least one other > driver has been merged. > >> >> Among the issues that need to be solved are >> >> - stateful vs. stateless operation (as mentioned by Jacob in this mail >> thread), a.k.a. the request API > > Would it be possible to extend your thought. To me, Request API could > enable more use cases but is not strictly required. > >> >> - exposing capabilities to userspace (a single capability flag would be >> enough >> only if all blitters expose the same API, which I'm not sure we can assume) > > I am just rethinking this. With this patch series, Jacob is trying to > generalize the Blit Operation controls (still need a name, blend mode > does not work). We can easily make a recommendation to set the default > operation to a copy operation (drivers always support that). This way, > the node will behave like a converter (scaler, colorspace converter, > rotator and/or etc.) Checking the presence of that control, we can > clearly and quickly figure-out what this node is about. The capability > remains a nice idea, but probably optional. > > I totally agree we should document the behaviours and rationals for > picking a certain default. The control should maybe become a "menu" > too, so each driver can cherry-pick the blit operations they support > (using int with min/max requires userspace trial and error, we already > did that mistake for encoders profiles and level). > >> >> - single input (a.k.a. in-place blitters as you mentioned below) vs. multiple >> inputs > > I do think the second is something you can build on top of the first by > cascading (what we do in the refereed GStreamer element). So far this > is applicable to Exynos, IMX6 and now Rockchip (probably more). The > "optimal" form for the second case seems like something that will be > implemented using much lower level kernel interface, like a GPU > programming interface (aka proprietary Adreno C2D API), or through > multiple nodes (multi
Re: [PATCH v5 04/16] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
Hi hans,
2018-02-06 21:21 GMT+08:00 Hans Verkuil :
> On 12/29/17 08:52, Shunqian Zheng wrote:
>> From: Jacob Chen
>>
>> This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
>>
>> Signed-off-by: Jacob Chen
>> Signed-off-by: Shunqian Zheng
>> Signed-off-by: Tomasz Figa
>> ---
>> .../media/platform/rockchip/isp1/mipi_dphy_sy.c| 787
>> +
>> 1 file changed, 787 insertions(+)
>> create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>>
>> diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>> b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>> new file mode 100644
>> index 000..9421183
>> --- /dev/null
>> +++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
>> @@ -0,0 +1,787 @@
>> +/*
>> + * Rockchip MIPI Synopsys DPHY driver
>> + *
>> + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
>> + *
>> + * This software is available to you under a choice of one of two
>> + * licenses. You may choose to be licensed under the terms of the GNU
>> + * General Public License (GPL) Version 2, available from the file
>> + * COPYING in the main directory of this source tree, or the
>> + * OpenIB.org BSD license below:
>> + *
>> + * Redistribution and use in source and binary forms, with or
>> + * without modification, are permitted provided that the following
>> + * conditions are met:
>> + *
>> + * - Redistributions of source code must retain the above
>> + *copyright notice, this list of conditions and the following
>> + *disclaimer.
>> + *
>> + * - Redistributions in binary form must reproduce the above
>> + *copyright notice, this list of conditions and the following
>> + *disclaimer in the documentation and/or other materials
>> + *provided with the distribution.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
>> + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
>> + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
>> + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
>> + * SOFTWARE.
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define RK3288_GRF_SOC_CON6 0x025c
>> +#define RK3288_GRF_SOC_CON8 0x0264
>> +#define RK3288_GRF_SOC_CON9 0x0268
>> +#define RK3288_GRF_SOC_CON10 0x026c
>> +#define RK3288_GRF_SOC_CON14 0x027c
>> +#define RK3288_GRF_SOC_STATUS21 0x02d4
>> +#define RK3288_GRF_IO_VSEL 0x0380
>> +#define RK3288_GRF_SOC_CON15 0x03a4
>> +
>> +#define RK3399_GRF_SOC_CON9 0x6224
>> +#define RK3399_GRF_SOC_CON21 0x6254
>> +#define RK3399_GRF_SOC_CON22 0x6258
>> +#define RK3399_GRF_SOC_CON23 0x625c
>> +#define RK3399_GRF_SOC_CON24 0x6260
>> +#define RK3399_GRF_SOC_CON25 0x6264
>> +#define RK3399_GRF_SOC_STATUS1 0xe2a4
>> +
>> +#define CLOCK_LANE_HS_RX_CONTROL 0x34
>> +#define LANE0_HS_RX_CONTROL 0x44
>> +#define LANE1_HS_RX_CONTROL 0x54
>> +#define LANE2_HS_RX_CONTROL 0x84
>> +#define LANE3_HS_RX_CONTROL 0x94
>> +#define HS_RX_DATA_LANES_THS_SETTLE__CONTROL 0x75
>> +
>> +#define HIWORD_UPDATE(val, mask, shift) \
>> + ((val) << (shift) | (mask) << ((shift) + 16))
>> +
>> +enum mipi_dphy_sy_pads {
>> + MIPI_DPHY_SY_PAD_SINK = 0,
>> + MIPI_DPHY_SY_PAD_SOURCE,
>> + MIPI_DPHY_SY_PADS_NUM,
>> +};
>> +
>> +enum dphy_reg_id {
>> + GRF_DPHY_RX0_TURNDISABLE = 0,
>> + GRF_DPHY_RX0_FORCERXMODE,
>> + GRF_DPHY_RX0_FORCETXSTOPMODE,
>> + GRF_DPHY_RX0_ENABLE,
>> + GRF_DPHY_RX0_TESTCLR,
>> + GRF_DPHY_RX0_TESTCLK,
>> + GRF_DPHY_RX0_TESTEN,
>> + GRF_DPHY_RX0_TESTDIN,
>> + GRF_DPHY_RX0_TURNREQUEST,
>> + GRF_DPHY_RX0_TESTDOUT,
>> + GRF_DPHY_TX0_TURNDISABLE,
>> + GRF_DPHY_TX0_FORCERXMODE,
>> + GRF_DPHY_TX0_FORCETXSTOPMODE,
>> + GRF_DPHY_TX0_TURNREQUEST
[RFC PATCH 1/5] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index d6587b3ec33e..0604ae9ea444 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1252,6 +1252,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_TCH_FMT_TU08: descr = "8-bit unsigned touch data";
break;
case V4L2_META_FMT_VSP1_HGO:descr = "R-Car VSP1 1-D Histogram";
break;
case V4L2_META_FMT_VSP1_HGT:descr = "R-Car VSP1 2-D Histogram";
break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A
params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A
statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index e507b29ba1e0..14efa6513126 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -690,6 +690,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VSP1_HGOv4l2_fourcc('V', 'S', 'P', 'H') /* R-Car
VSP1 1-D Histogram */
#define V4L2_META_FMT_VSP1_HGTv4l2_fourcc('V', 'S', 'P', 'T') /* R-Car
VSP1 2-D Histogram */
+/* Vendor specific - used for IPU3 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC0xfeedcafe
--
2.14.2
[RFC PATCH 0/5] Rockchip ISP1 Driver
This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 SoC.
TODO:
- Thomas is rewriting the binding code between isp, phy, sensors, i hope we
could get suggestions.
https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/768633/2
rules:
- There are many mipi interfaces("rx0", "dxrx0")(actually it also could
be parallel interface) in SoC and isp can decide which one will be used.
- Sometimes there will be more than one senor in a mipi phy, the sofrware
should decide which one is used(media link).
- rk3399 have two isp.
- Add a dummy buffer(dma_alloc_coherent) so drvier won't hold buffer.
- Finish all TODO comments(mostly about hardware) in driver.
To help do a quick review, i have push source code to my Github.
https://github.com/wzyy2/linux/tree/rkisp1/drivers/media/platform/rockchip/isp1
Below are some infomations about driver/hardware:
Rockchip ISP1 have many Hardware Blocks(simplied):
MIPI --> ISP --> DCrop(Mainpath) --> RSZ(Mainpath) --> DMA(Mainpath)
DMA-Input --> --> DCrop(Selfpath) --> RSZ(Selfpath) --> DMA(Selfpath);)
(Acutally the TRM(rk3288, isp) could be found online.. which contains a
more detailed block diagrams ;-P)
The funcitons of each hardware block:
Mainpath : up to 4k resolution, support raw/yuv format
Selfpath : up tp 1080p, support rotate, support rgb/yuv format
RSZ: scaling
DCrop: crop
ISP: 3A, Color processing, Crop
MIPI: MIPI Camera interface
Media pipelines:
Mainpath, Selfpath <-- ISP subdev <-- MIPI <-- Sensor
3A stats <--<-- 3A parms
Code struct:
capture.c : Mainpath, Selfpath, RSZ, DCROP : capture device.
rkisp1.c : ISP : v4l2 sub-device.
isp_params.c : 3A parms : output device.
isp_stats.c : 3A stats : capture device.
mipi_dphy_sy.c : MIPI : sperated v4l2 sub-device.
Usage:
ChromiumOS:
use below v4l2-ctl command to capture frames.
v4l2-ctl --verbose -d /dev/video4 --stream-mmap=2
--stream-to=/tmp/stream.out --stream-count=60 --stream-poll
use below command to playback the video on your PC.
mplayer /tmp/stream.out -loop 0 --demuxer=rawvideo
--rawvideo=w=800:h=600:size=$((800*600*2)):format=yuy2
or
mplayer ./stream.out -loop 0 -demuxer rawvideo -rawvideo
w=800:h=600:size=$((800*600*2)):format=yuy2
Linux:
use rkcamsrc gstreamer plugin(just a modified v4l2src) to preview.
gst-launch-1.0 rkcamsrc device=/dev/video0 io-mode=4 disable-3A=true
videoconvert ! video/x-raw,format=NV12,width=640,height=480 ! kmssink
Jacob Chen (2):
media: rkisp1: add rockchip isp1 driver
ARM: dts: rockchip: add isp node for rk3288
Jeffy Chen (1):
media: rkisp1: Add user space ABI definitions
Shunqian Zheng (2):
media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
arm64: dts: rockchip: add isp0 node for rk3399
arch/arm/boot/dts/rk3288.dtsi | 24 +
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26 +
drivers/media/platform/Kconfig | 10 +
drivers/media/platform/Makefile|1 +
drivers/media/platform/rockchip/isp1/Makefile |9 +
drivers/media/platform/rockchip/isp1/capture.c | 1678
drivers/media/platform/rockchip/isp1/capture.h | 46 +
drivers/media/platform/rockchip/isp1/common.h | 327
drivers/media/platform/rockchip/isp1/dev.c | 728 +
drivers/media/platform/rockchip/isp1/isp_params.c | 1556 ++
drivers/media/platform/rockchip/isp1/isp_params.h | 81 +
drivers/media/platform/rockchip/isp1/isp_stats.c | 537 +++
drivers/media/platform/rockchip/isp1/isp_stats.h | 81 +
.../media/platform/rockchip/isp1/mipi_dphy_sy.c| 619
.../media/platform/rockchip/isp1/mipi_dphy_sy.h| 42 +
drivers/media/platform/rockchip/isp1/regs.c| 251 +++
drivers/media/platform/rockchip/isp1/regs.h| 1578 ++
drivers/media/platform/rockchip/isp1/rkisp1.c | 1132 +
drivers/media/platform/rockchip/isp1/rkisp1.h | 130 ++
drivers/media/v4l2-core/v4l2-ioctl.c |2 +
include/uapi/linux/rkisp1-config.h | 554 +++
include/uapi/linux/videodev2.h |4 +
22 files changed, 9416 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/Makefile
create mode 100644 drivers/media/platform/rockchip/isp1/capture.c
create mode 100644 drivers/media/platform/rockchip/isp1/capture.h
create mode 100644 drivers/media/platform/rockchip/isp1/common.h
create mode 100644 drivers/media/platform/rockchip/isp1/dev.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.h
create mode 100644 drivers/media/platform/rockchip/isp1/isp_
[RFC PATCH 1/5] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index d6587b3ec33e..0604ae9ea444 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1252,6 +1252,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_TCH_FMT_TU08: descr = "8-bit unsigned touch data";
break;
case V4L2_META_FMT_VSP1_HGO:descr = "R-Car VSP1 1-D Histogram";
break;
case V4L2_META_FMT_VSP1_HGT:descr = "R-Car VSP1 2-D Histogram";
break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A
params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A
statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index e507b29ba1e0..14efa6513126 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -690,6 +690,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VSP1_HGOv4l2_fourcc('V', 'S', 'P', 'H') /* R-Car
VSP1 1-D Histogram */
#define V4L2_META_FMT_VSP1_HGTv4l2_fourcc('V', 'S', 'P', 'T') /* R-Car
VSP1 2-D Histogram */
+/* Vendor specific - used for IPU3 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC0xfeedcafe
--
2.14.2
[RFC PATCH 2/5] media: rkisp1: Add user space ABI definitions
From: Jeffy Chen Add the header for userspace Signed-off-by: Jeffy Chen Signed-off-by: Jacob Chen --- include/uapi/linux/rkisp1-config.h | 554 + 1 file changed, 554 insertions(+) create mode 100644 include/uapi/linux/rkisp1-config.h diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h new file mode 100644 index ..a801fbc9ef47 --- /dev/null +++ b/include/uapi/linux/rkisp1-config.h @@ -0,0 +1,554 @@ +/* + * Rockchip isp1 driver + * + * Copyright (C) 2017 Rockchip Electronics Co., Ltd. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + *copyright notice, this list of conditions and the following + *disclaimer. + * + * - Redistributions in binary form must reproduce the above + *copyright notice, this list of conditions and the following + *disclaimer in the documentation and/or other materials + *provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef _UAPI_RKISP1_CONFIG_H +#define _UAPI_RKISP1_CONFIG_H + +#include +#include + +#define CIFISP_MODULE_DPCC (1 << 0) +#define CIFISP_MODULE_BLS (1 << 1) +#define CIFISP_MODULE_SDG (1 << 2) +#define CIFISP_MODULE_HST (1 << 3) +#define CIFISP_MODULE_LSC (1 << 4) +#define CIFISP_MODULE_AWB_GAIN (1 << 5) +#define CIFISP_MODULE_FLT (1 << 6) +#define CIFISP_MODULE_BDM (1 << 7) +#define CIFISP_MODULE_CTK (1 << 8) +#define CIFISP_MODULE_GOC (1 << 9) +#define CIFISP_MODULE_CPROC (1 << 10) +#define CIFISP_MODULE_AFC (1 << 11) +#define CIFISP_MODULE_AWB (1 << 12) +#define CIFISP_MODULE_IE(1 << 13) +#define CIFISP_MODULE_AEC (1 << 14) +#define CIFISP_MODULE_WDR (1 << 15) +#define CIFISP_MODULE_DPF (1 << 16) +#define CIFISP_MODULE_DPF_STRENGTH (1 << 17) + +#define CIFISP_CTK_COEFF_MAX0x100 +#define CIFISP_CTK_OFFSET_MAX 0x800 + +#define CIFISP_AE_MEAN_MAX 25 +#define CIFISP_HIST_BIN_N_MAX 16 +#define CIFISP_AFM_MAX_WINDOWS 3 +#define CIFISP_DEGAMMA_CURVE_SIZE 17 + +#define CIFISP_BDM_MAX_TH 0xFF + +/* maximum value for horizontal start address */ +#define CIFISP_BLS_START_H_MAX 0x0FFF +/* maximum value for horizontal stop address */ +#define CIFISP_BLS_STOP_H_MAX 0x0FFF +/* maximum value for vertical start address */ +#define CIFISP_BLS_START_V_MAX 0x0FFF +/* maximum value for vertical stop address */ +#define CIFISP_BLS_STOP_V_MAX 0x0FFF +/* maximum is 2^18 = 262144*/ +#define CIFISP_BLS_SAMPLES_MAX 0x0012 +/* maximum value for fixed black level */ +#define CIFISP_BLS_FIX_SUB_MAX 0x0FFF +/* minimum value for fixed black level */ +#define CIFISP_BLS_FIX_SUB_MIN 0xF000 +/* 13 bit range (signed)*/ +#define CIFISP_BLS_FIX_MASK0x1FFF +/* AWB */ +#define CIFISP_AWB_MAX_GRID1 +#define CIFISP_AWB_MAX_FRAMES 7 + +/* Gamma out*/ +/* Maximum number of color samples supported */ +#define CIFISP_GAMMA_OUT_MAX_SAMPLES 17 + +/* LSC */ +#define CIFISP_LSC_GRAD_TBL_SIZE 8 +#define CIFISP_LSC_SIZE_TBL_SIZE 8 +/* + * The following matches the tuning process, + * not the max capabilities of the chip. + * Last value unused. + */ +#defineCIFISP_LSC_DATA_TBL_SIZE 290 +/* HIST */ +/* Last 3 values unused. */ +#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 28 + +/* DPCC */ +#define CIFISP_DPCC_METHODS_MAX 3 + +/* DPF */ +#define CIFISP_DPF_MAX_NLF_COEFFS 17 +#define CIFISP_DPF_MAX_SPATIAL_COEFFS 6 + +/* measurement types */ +#define CIFISP_STAT_AWB (1 &
[RFC PATCH 4/5] arm64: dts: rockchip: add isp0 node for rk3399
From: Shunqian Zheng
rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index ab7629c5b856..f696e62d09dd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1577,6 +1577,32 @@
status = "disabled";
};
+ isp0: isp0@ff91 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP0>,
+<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+ status = "disabled";
+
+ isp_mipi_dphy_rx0: isp-mipi-dphy-rx0 {
+ compatible = "rockchip,rk3399-mipi-dphy";
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_MIPIDPHY_REF>,
+<&cru SCLK_DPHY_RX0_CFG>,
+<&cru PCLK_VIO_GRF>;
+ clock-names = "dphy-ref", "dphy-cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+ status = "disabled";
+ };
+ };
+
isp0_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.14.2
[RFC PATCH 5/5] ARM: dts: rockchip: add isp node for rk3288
From: Jacob Chen
rk3288 have a Embedded 13M ISP and MIPI-CSI2 interface.
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 60658c5c9a48..f9a81137146d 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -962,6 +962,30 @@
status = "disabled";
};
+ isp: isp@ff91 {
+ compatible = "rockchip,rk3288-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP>, <&cru ACLK_ISP>,
+<&cru HCLK_ISP>, <&cru PCLK_ISP_IN>,
+<&cru SCLK_ISP_JPE>;
+ clock-names = "clk_isp", "aclk_isp",
+ "hclk_isp", "pclk_isp_in",
+ "sclk_isp_jpe";
+ assigned-clocks = <&cru SCLK_ISP>;
+ assigned-clock-rates = <4>;
+ power-domains = <&power RK3288_PD_VIO>;
+ iommus = <&isp_mmu>;
+ status = "disabled";
+ isp_mipi_phy_rx0: isp-mipi-phy-rx0 {
+ compatible = "rockchip,rk3288-mipi-dphy";
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>;
+ clock-names = "dphy-ref", "pclk";
+ status = "disabled";
+ };
+ };
+
isp_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.14.2
Re: [RFC PATCH 0/5] Rockchip ISP1 Driver
Hi Tomasz,
2017-11-15 16:03 GMT+08:00 Tomasz Figa :
> Hi Jacob,
>
> Thanks for sending the series!
>
> On Wed, Nov 15, 2017 at 3:29 PM, Jacob Chen wrote:
>> This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399
>> SoC.
>>
>> TODO:
>> - Thomas is rewriting the binding code between isp, phy, sensors, i hope
>> we could get suggestions.
>>
>> https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/768633/2
>> rules:
>> - There are many mipi interfaces("rx0", "dxrx0")(actually it also
>> could be parallel interface) in SoC and isp can decide which one will be
>> used.
>> - Sometimes there will be more than one senor in a mipi phy, the
>> sofrware should decide which one is used(media link).
>> - rk3399 have two isp.
>
> Also the two ISP subsystems have their own, completely different, CSI2
> PHY blocks, so we need to make the ISP driver work with two different
> PHY drivers.
>
>> - Add a dummy buffer(dma_alloc_coherent) so drvier won't hold buffer.
>> - Finish all TODO comments(mostly about hardware) in driver.
>>
>> To help do a quick review, i have push source code to my Github.
>>
>> https://github.com/wzyy2/linux/tree/rkisp1/drivers/media/platform/rockchip/isp1
>>
>> Below are some infomations about driver/hardware:
>>
>> Rockchip ISP1 have many Hardware Blocks(simplied):
>>
>> MIPI --> ISP --> DCrop(Mainpath) --> RSZ(Mainpath) --> DMA(Mainpath)
>> DMA-Input --> --> DCrop(Selfpath) --> RSZ(Selfpath) --> DMA(Selfpath);)
>>
>> (Acutally the TRM(rk3288, isp) could be found online.. which contains a
>> more detailed block diagrams ;-P)
>>
>> The funcitons of each hardware block:
>>
>> Mainpath : up to 4k resolution, support raw/yuv format
>> Selfpath : up tp 1080p, support rotate, support rgb/yuv format
>> RSZ: scaling
>> DCrop: crop
>> ISP: 3A, Color processing, Crop
>> MIPI: MIPI Camera interface
>>
>> Media pipelines:
>>
>> Mainpath, Selfpath <-- ISP subdev <-- MIPI <-- Sensor
>> 3A stats <--<-- 3A parms
>>
>> Code struct:
>>
>> capture.c : Mainpath, Selfpath, RSZ, DCROP : capture device.
>> rkisp1.c : ISP : v4l2 sub-device.
>> isp_params.c : 3A parms : output device.
>> isp_stats.c : 3A stats : capture device.
>> mipi_dphy_sy.c : MIPI : sperated v4l2 sub-device.
>>
>> Usage:
>> ChromiumOS:
>> use below v4l2-ctl command to capture frames.
>>
>> v4l2-ctl --verbose -d /dev/video4 --stream-mmap=2
>> --stream-to=/tmp/stream.out --stream-count=60 --stream-poll
>>
>> use below command to playback the video on your PC.
>>
>> mplayer /tmp/stream.out -loop 0 --demuxer=rawvideo
>> --rawvideo=w=800:h=600:size=$((800*600*2)):format=yuy2
>> or
>> mplayer ./stream.out -loop 0 -demuxer rawvideo -rawvideo
>> w=800:h=600:size=$((800*600*2)):format=yuy2
>>
>> Linux:
>> use rkcamsrc gstreamer plugin(just a modified v4l2src) to preview.
>>
>> gst-launch-1.0 rkcamsrc device=/dev/video0 io-mode=4 disable-3A=true
>> videoconvert ! video/x-raw,format=NV12,width=640,height=480 ! kmssink
>
> Is the rkcamsrc plugin source available somewhere to download?
It could be download, but it's rough and just be used by me to test
driver at present since
Hal3 is not completed.
You can consider it as "media-ctl + gstreamer v4l2src"
https://github.com/GStreamer/gst-plugins-good/blob/master/sys/v4l2/gstv4l2src.c
>
> Thanks,
> Tomasz
Re: [PATCH 1/2] [media] Add Rockchip RK1608 driver
Hi leo,
2017-12-12 14:28 GMT+08:00 Leo Wen :
> Rk1608 is used as a PreISP to link on Soc, which mainly has two functions.
> One is to download the firmware of RK1608, and the other is to match the
> extra sensor such as camera and enable sensor by calling sensor's s_power.
>
> use below v4l2-ctl command to capture frames.
>
> v4l2-ctl --verbose -d /dev/video1 --stream-mmap=2
> --stream-to=/tmp/stream.out --stream-count=60 --stream-poll
>
> use below command to playback the video on your PC.
>
> mplayer ./stream.out -loop 0 -demuxer rawvideo -rawvideo
> w=640:h=480:size=$((640*480*3/2)):format=NV12
>
> Signed-off-by: Leo Wen
> ---
> MAINTAINERS|6 +
> drivers/media/spi/Makefile |1 +
> drivers/media/spi/rk1608.c | 1165
>
> drivers/media/spi/rk1608.h | 366 ++
> 4 files changed, 1538 insertions(+)
> create mode 100644 drivers/media/spi/rk1608.c
> create mode 100644 drivers/media/spi/rk1608.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 82ad0ea..48235d8 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -128,6 +128,12 @@ Maintainers List (try to look for most precise areas
> first)
>
> ---
>
> +ROCKCHIP RK1608 DRIVER
> +M: Leo Wen
> +S: Maintained
> +F: drivers/media/platform/spi/rk1608.c
> +F: drivers/media/platform/spi/rk1608.h
> +
> 3C59X NETWORK DRIVER
> M: Steffen Klassert
> L: net...@vger.kernel.org
> diff --git a/drivers/media/spi/Makefile b/drivers/media/spi/Makefile
> index ea64013..9d9d9ec 100644
> --- a/drivers/media/spi/Makefile
> +++ b/drivers/media/spi/Makefile
> @@ -1 +1,2 @@
> obj-$(CONFIG_VIDEO_GS1662) += gs1662.o
> +obj-$(CONFIG_ROCKCHIP_RK1608) += rk1608.o
> diff --git a/drivers/media/spi/rk1608.c b/drivers/media/spi/rk1608.c
> new file mode 100644
> index 000..e646204
> --- /dev/null
> +++ b/drivers/media/spi/rk1608.c
> @@ -0,0 +1,1165 @@
> +/**
> + * Rockchip rk1608 driver
> + *
> + * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
> + *
> + * This software is available to you under a choice of one of two
> + * licenses. You may choose to be licensed under the terms of the GNU
> + * General Public License (GPL) Version 2, available from the file
> + * COPYING in the main directory of this source tree, or the
> + * OpenIB.org BSD license below:
> + *
> + * Redistribution and use in source and binary forms, with or
> + * without modification, are permitted provided that the following
> + * conditions are met:
> + *
> + * - Redistributions of source code must retain the above
> + *copyright notice, this list of conditions and the following
> + *disclaimer.
> + *
> + * - Redistributions in binary form must reproduce the above
> + *copyright notice, this list of conditions and the following
> + *disclaimer in the documentation and/or other materials
> + *provided with the distribution.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
> + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
> + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
> + * SOFTWARE.
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "rk1608.h"
> +
> +/**
> + * Rk1608 is used as the Pre-ISP to link on Soc, which mainly has two
> + * functions. One is to download the firmware of RK1608, and the other
> + * is to match the extra sensor such as camera and enable sensor by
> + * calling sensor's s_power.
> + * |---|
> + * | Sensor Camera |
> + * |---|
> + * |---||--|
> + * |---||--|
> + * |---\/--|
> + * | Pre-ISP RK1608|
> + * |---|
> + * |---||--|
> + * |---||--|
> + * |---\/--|
> + * | Rockchip Soc |
> + * |---|
> + * Data Transfer As shown above. In RK1608, the data received from the
> + * extra sensor,and it is passed to the Soc through ISP.
> + */
> +struct rk1608_state {
> + struct v4l2_subdev sd;
> + struct v4l2_subdev *sensor_sd;
> + struct device *dev;
> + struct spi_device *spi;
> + struct media_padpad;
> + struct clk *mclk;
> + struct mutexlock; /* protect resource */
> + struct mutexsensor_lock;/* protect sensor *
[PATCH v3 00/12] Rockchip ISP1 Driver
changes in V3: - add some comments - fix wrong use of v4l2_async_subdev_notifier_register - optimize two paths capture at a time - remove compose - re-struct headers - add a tmp wiki page: http://opensource.rock-chips.com/wiki_Rockchip-isp1 changes in V2: mipi-phy: - use async probing - make it be a child device of the GRF isp: - add dummy buffer - change the way to get bus configuration, which make it possible to add parallel sensor support in the future(without mipi-phy driver). This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 SoC. Kernel Branch: https://github.com/wzyy2/linux/tree/rkisp1/drivers/media/platform/rockchip/isp1 Wiki Pages: http://opensource.rock-chips.com/wiki_Rockchip-isp1 Jacob Chen (8): media: doc: add document for rkisp1 meta buffer format media: rkisp1: add rockchip isp1 driver media: rkisp1: add Rockchip MIPI Synopsys DPHY driver dt-bindings: Document the Rockchip ISP1 bindings dt-bindings: Document the Rockchip MIPI RX D-PHY bindings ARM: dts: rockchip: add isp node for rk3288 ARM: dts: rockchip: add rx0 mipi-phy for rk3288 MAINTAINERS: add entry for Rockchip ISP1 driver Jeffy Chen (1): media: rkisp1: Add user space ABI definitions Shunqian Zheng (3): media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format arm64: dts: rockchip: add isp0 node for rk3399 arm64: dts: rockchip: add rx0 mipi-phy for rk3399 .../devicetree/bindings/media/rockchip-isp1.txt| 57 + .../bindings/media/rockchip-mipi-dphy.txt | 71 + Documentation/media/uapi/v4l/meta-formats.rst |2 + .../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 + .../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 + MAINTAINERS| 10 + arch/arm/boot/dts/rk3288.dtsi | 24 + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26 + drivers/media/platform/Kconfig | 10 + drivers/media/platform/Makefile|1 + drivers/media/platform/rockchip/isp1/Makefile |8 + drivers/media/platform/rockchip/isp1/capture.c | 1684 drivers/media/platform/rockchip/isp1/capture.h | 194 +++ drivers/media/platform/rockchip/isp1/common.h | 137 ++ drivers/media/platform/rockchip/isp1/dev.c | 655 drivers/media/platform/rockchip/isp1/dev.h | 120 ++ drivers/media/platform/rockchip/isp1/isp_params.c | 1543 ++ drivers/media/platform/rockchip/isp1/isp_params.h | 76 + drivers/media/platform/rockchip/isp1/isp_stats.c | 521 ++ drivers/media/platform/rockchip/isp1/isp_stats.h | 85 + .../media/platform/rockchip/isp1/mipi_dphy_sy.c| 787 + drivers/media/platform/rockchip/isp1/regs.c| 264 +++ drivers/media/platform/rockchip/isp1/regs.h| 1582 ++ drivers/media/platform/rockchip/isp1/rkisp1.c | 1201 ++ drivers/media/platform/rockchip/isp1/rkisp1.h | 131 ++ drivers/media/v4l2-core/v4l2-ioctl.c |2 + include/uapi/linux/rkisp1-config.h | 785 + include/uapi/linux/videodev2.h |4 + 28 files changed, 10015 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip-isp1.txt create mode 100644 Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst create mode 100644 drivers/media/platform/rockchip/isp1/Makefile create mode 100644 drivers/media/platform/rockchip/isp1/capture.c create mode 100644 drivers/media/platform/rockchip/isp1/capture.h create mode 100644 drivers/media/platform/rockchip/isp1/common.h create mode 100644 drivers/media/platform/rockchip/isp1/dev.c create mode 100644 drivers/media/platform/rockchip/isp1/dev.h create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.h create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.c create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.h create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c create mode 100644 drivers/media/platform/rockchip/isp1/regs.c create mode 100644 drivers/media/platform/rockchip/isp1/regs.h create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.c create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.h create mode 100644 include/uapi/linux/rkisp1-config.h -- 2.15.0
[PATCH v3 02/12] media: doc: add document for rkisp1 meta buffer format
Signed-off-by: Jacob Chen --- Documentation/media/uapi/v4l/meta-formats.rst | 2 ++ .../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 + .../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 ++ 3 files changed, 37 insertions(+) create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/media/uapi/v4l/meta-formats.rst index 01e24e3df571..1b8281423aa2 100644 --- a/Documentation/media/uapi/v4l/meta-formats.rst +++ b/Documentation/media/uapi/v4l/meta-formats.rst @@ -14,3 +14,5 @@ These formats are used for the :ref:`metadata` interface only. pixfmt-meta-vsp1-hgo pixfmt-meta-vsp1-hgt +pixfmt-meta-rkisp1-params +pixfmt-meta-rkisp1-stat diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst new file mode 100644 index ..ed344d463b52 --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst @@ -0,0 +1,17 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _v4l2-meta-fmt-rkisp1-params: + +*** +V4L2_META_FMT_RK_ISP1_PARAMS +*** + +Rockchip ISP1 Parameters Data + +Description +=== + +This format describes input parameters for the Rockchip ISP1. + +The data use c-struct :c:type:`rkisp1_isp_params_cfg`, which is defined in +the ``linux/rkisp1-config.h`` header file, See it for details. diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst new file mode 100644 index ..5ecc4031295f --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst @@ -0,0 +1,18 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _v4l2-meta-fmt-rkisp1-stat: + +*** +V4L2_META_FMT_RK_ISP1_STAT_3A +*** + +Rockchip ISP1 Statistics Data + +Description +=== + +This format describes image color statistics information generated by the Rockchip +ISP1. + +The data use c-struct :c:type:`rkisp1_stat_buffer`, which is defined in +the ``linux/cifisp_stat.h`` header file, See it for details. -- 2.15.0
[PATCH v3 03/12] media: rkisp1: Add user space ABI definitions
From: Jeffy Chen Add the header for userspace Signed-off-by: Jeffy Chen Signed-off-by: Jacob Chen --- include/uapi/linux/rkisp1-config.h | 785 + 1 file changed, 785 insertions(+) create mode 100644 include/uapi/linux/rkisp1-config.h diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h new file mode 100644 index ..82fecbee23a9 --- /dev/null +++ b/include/uapi/linux/rkisp1-config.h @@ -0,0 +1,785 @@ +/* + * Rockchip isp1 driver + * + * Copyright (C) 2017 Rockchip Electronics Co., Ltd. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + *copyright notice, this list of conditions and the following + *disclaimer. + * + * - Redistributions in binary form must reproduce the above + *copyright notice, this list of conditions and the following + *disclaimer in the documentation and/or other materials + *provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef _UAPI_RKISP1_CONFIG_H +#define _UAPI_RKISP1_CONFIG_H + +#include +#include + +#define CIFISP_MODULE_DPCC (1 << 0) +#define CIFISP_MODULE_BLS (1 << 1) +#define CIFISP_MODULE_SDG (1 << 2) +#define CIFISP_MODULE_HST (1 << 3) +#define CIFISP_MODULE_LSC (1 << 4) +#define CIFISP_MODULE_AWB_GAIN (1 << 5) +#define CIFISP_MODULE_FLT (1 << 6) +#define CIFISP_MODULE_BDM (1 << 7) +#define CIFISP_MODULE_CTK (1 << 8) +#define CIFISP_MODULE_GOC (1 << 9) +#define CIFISP_MODULE_CPROC (1 << 10) +#define CIFISP_MODULE_AFC (1 << 11) +#define CIFISP_MODULE_AWB (1 << 12) +#define CIFISP_MODULE_IE(1 << 13) +#define CIFISP_MODULE_AEC (1 << 14) +#define CIFISP_MODULE_WDR (1 << 15) +#define CIFISP_MODULE_DPF (1 << 16) +#define CIFISP_MODULE_DPF_STRENGTH (1 << 17) + +#define CIFISP_CTK_COEFF_MAX0x100 +#define CIFISP_CTK_OFFSET_MAX 0x800 + +#define CIFISP_AE_MEAN_MAX 25 +#define CIFISP_HIST_BIN_N_MAX 16 +#define CIFISP_AFM_MAX_WINDOWS 3 +#define CIFISP_DEGAMMA_CURVE_SIZE 17 + +#define CIFISP_BDM_MAX_TH 0xFF + +/* + * Black level compensation + */ +/* maximum value for horizontal start address */ +#define CIFISP_BLS_START_H_MAX 0x0FFF +/* maximum value for horizontal stop address */ +#define CIFISP_BLS_STOP_H_MAX 0x0FFF +/* maximum value for vertical start address */ +#define CIFISP_BLS_START_V_MAX 0x0FFF +/* maximum value for vertical stop address */ +#define CIFISP_BLS_STOP_V_MAX 0x0FFF +/* maximum is 2^18 = 262144*/ +#define CIFISP_BLS_SAMPLES_MAX 0x0012 +/* maximum value for fixed black level */ +#define CIFISP_BLS_FIX_SUB_MAX 0x0FFF +/* minimum value for fixed black level */ +#define CIFISP_BLS_FIX_SUB_MIN 0xF000 +/* 13 bit range (signed)*/ +#define CIFISP_BLS_FIX_MASK0x1FFF + +/* + * Automatic white balance measurments + */ +#define CIFISP_AWB_MAX_GRID1 +#define CIFISP_AWB_MAX_FRAMES 7 + +/* + * Gamma out + */ +/* Maximum number of color samples supported */ +#define CIFISP_GAMMA_OUT_MAX_SAMPLES 17 + +/* + * Lens shade correction + */ +#define CIFISP_LSC_GRAD_TBL_SIZE 8 +#define CIFISP_LSC_SIZE_TBL_SIZE 8 +/* + * The following matches the tuning process, + * not the max capabilities of the chip. + * Last value unused. + */ +#defineCIFISP_LSC_DATA_TBL_SIZE 290 + +/* + * Histogram calculation + */ +/* Last 3 values unused. */ +#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 28 + +/* + * Defect Pixel Cluster Correction + */ +#define CIFISP_DPCC_METHODS_MAX 3 +
[PATCH v3 08/12] ARM: dts: rockchip: add isp node for rk3288
From: Jacob Chen
rk3288 have a Embedded 13M ISP
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index a3c015628421..ea1dda001043 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -962,6 +962,23 @@
status = "disabled";
};
+ isp: isp@ff91 {
+ compatible = "rockchip,rk3288-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP>, <&cru ACLK_ISP>,
+<&cru HCLK_ISP>, <&cru PCLK_ISP_IN>,
+<&cru SCLK_ISP_JPE>;
+ clock-names = "clk_isp", "aclk_isp",
+ "hclk_isp", "pclk_isp_in",
+ "sclk_isp_jpe";
+ assigned-clocks = <&cru SCLK_ISP>, <&cru SCLK_ISP_JPE>;
+ assigned-clock-rates = <4>, <4>;
+ power-domains = <&power RK3288_PD_VIO>;
+ iommus = <&isp_mmu>;
+ status = "disabled";
+ };
+
isp_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.15.0
[PATCH v3 11/12] arm64: dts: rockchip: add rx0 mipi-phy for rk3399
From: Shunqian Zheng
It's a Designware MIPI D-PHY, used for ISP0 in rk3399.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 66a912fab5dd..a65b110afaf3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1292,6 +1292,17 @@
status = "disabled";
};
+ mipi_dphy_rx0: mipi-dphy-rx0 {
+ compatible = "rockchip,rk3399-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDPHY_REF>,
+ <&cru SCLK_DPHY_RX0_CFG>,
+ <&cru PCLK_VIO_GRF>;
+ clock-names = "dphy-ref", "dphy-cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
u2phy0: usb2-phy@e450 {
compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>;
--
2.15.0
[PATCH v3 12/12] MAINTAINERS: add entry for Rockchip ISP1 driver
From: Jacob Chen Add MAINTAINERS entry for the rockchip isp1 driver. This driver is maintained by rockchip officially and it will be used for rockchip SoC on all linux-kernel based OS. Signed-off-by: Jacob Chen --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b05bc2c5e85c..614196ed7265 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11665,6 +11665,16 @@ F: drivers/hid/hid-roccat* F: include/linux/hid-roccat* F: Documentation/ABI/*/sysfs-driver-hid-roccat* +ROCKCHIP ISP V1 DRIVER +M: Jacob chen +M: Shunqian Zheng +M: Yichong Zhong +L: linux-me...@vger.kernel.org +S: Maintained +F: drivers/media/platform/rockchip/isp1/ +F: Documentation/devicetree/bindings/media/rockchip-isp1.txt +F: Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt + ROCKCHIP RASTER 2D GRAPHIC ACCELERATION UNIT DRIVER M: Jacob chen L: linux-me...@vger.kernel.org -- 2.15.0
[PATCH v3 09/12] ARM: dts: rockchip: add rx0 mipi-phy for rk3288
From: Jacob Chen
It's a Designware MIPI D-PHY, used by ISP in rk3288.
Signed-off-by: Jacob Chen
---
arch/arm/boot/dts/rk3288.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ea1dda001043..baeedd2cb351 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -864,6 +864,13 @@
status = "disabled";
};
+ mipi_phy_rx0: mipi-phy-rx0 {
+ compatible = "rockchip,rk3288-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>;
+ clock-names = "dphy-ref", "pclk";
+ status = "disabled";
+ };
+
io_domains: io-domains {
compatible = "rockchip,rk3288-io-voltage-domain";
status = "disabled";
--
2.15.0
[PATCH v3 10/12] arm64: dts: rockchip: add isp0 node for rk3399
From: Shunqian Zheng
rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d340b58ab184..66a912fab5dd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1588,6 +1588,21 @@
status = "disabled";
};
+ isp0: isp0@ff91 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP0>,
+<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+ status = "disabled";
+ };
+
isp0_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.15.0
[PATCH v3 05/12] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
From: Jacob Chen
This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/Makefile | 1 +
.../media/platform/rockchip/isp1/mipi_dphy_sy.c| 787 +
2 files changed, 788 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
diff --git a/drivers/media/platform/rockchip/isp1/Makefile
b/drivers/media/platform/rockchip/isp1/Makefile
index 8f52f959398e..18af64853734 100644
--- a/drivers/media/platform/rockchip/isp1/Makefile
+++ b/drivers/media/platform/rockchip/isp1/Makefile
@@ -4,4 +4,5 @@ video_rkisp1-objs += rkisp1.o \
regs.o \
isp_stats.o \
isp_params.o \
+ mipi_dphy_sy.o \
capture.o
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
new file mode 100644
index ..942118366f49
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -0,0 +1,787 @@
+/*
+ * Rockchip MIPI Synopsys DPHY driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RK3288_GRF_SOC_CON60x025c
+#define RK3288_GRF_SOC_CON80x0264
+#define RK3288_GRF_SOC_CON90x0268
+#define RK3288_GRF_SOC_CON10 0x026c
+#define RK3288_GRF_SOC_CON14 0x027c
+#define RK3288_GRF_SOC_STATUS210x02d4
+#define RK3288_GRF_IO_VSEL 0x0380
+#define RK3288_GRF_SOC_CON15 0x03a4
+
+#define RK3399_GRF_SOC_CON90x6224
+#define RK3399_GRF_SOC_CON21 0x6254
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_SOC_CON23 0x625c
+#define RK3399_GRF_SOC_CON24 0x6260
+#define RK3399_GRF_SOC_CON25 0x6264
+#define RK3399_GRF_SOC_STATUS1 0xe2a4
+
+#define CLOCK_LANE_HS_RX_CONTROL 0x34
+#define LANE0_HS_RX_CONTROL0x44
+#define LANE1_HS_RX_CONTROL0x54
+#define LANE2_HS_RX_CONTROL0x84
+#define LANE3_HS_RX_CONTROL0x94
+#define HS_RX_DATA_LANES_THS_SETTLE__CONTROL 0x75
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
+enum mipi_dphy_sy_pads {
+ MIPI_DPHY_SY_PAD_SINK = 0,
+ MIPI_DPHY_SY_PAD_SOURCE,
+ MIPI_DPHY_SY_PADS_NUM,
+};
+
+enum dphy_reg_id {
+ GRF_DPHY_RX0_TURNDISABLE = 0,
+ GRF_DPHY_RX0_FORCERXMODE,
+ GRF_DPHY_RX0_FORCETXSTOPMODE,
+ GRF_DPHY_RX0_ENABLE,
+ GRF_DPHY_RX0_TESTCLR,
+ GRF_DPHY_RX0_TESTCLK,
+ GRF_DPHY_RX0_TESTEN,
+ GRF_DPHY_RX0_TESTDIN,
+ GRF_DPHY_RX0_TURNREQUEST,
+ GRF_DPHY_RX0_TESTDOUT,
+ GRF_DPHY_TX0_TURNDISABLE,
+ GRF_DPHY_TX0_FORCERXMODE,
+ GRF_DPHY_TX0_FORCETXSTOPMODE,
+ GRF_DPHY_TX0_TURNREQUEST,
+ GRF_DPHY_TX1RX1_TURNDISABLE,
+ GRF_DPHY_TX1RX1_FORCERXMODE,
+ GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
+ GRF_DPHY_TX1RX1_ENABLE,
+ GRF_DPHY_TX1RX1_MASTERSLAVEZ,
+ GRF_DPHY_TX1RX1_BASEDIR,
+ GRF_DPHY_TX1RX1_ENABLECLK,
+ GRF_DPHY_TX1RX1_TURNREQUEST,
+ GRF_DPHY_RX1_SRC_SEL,
+ /* rk3288 only */
+ GRF_CON_DISABLE_ISP,
+ GRF_CON_ISP_DPHY_SEL,
+ GRF_DSI_CSI_TESTBUS_SEL,
+ GRF_DVP_V18SEL,
+
[PATCH v3 07/12] dt-bindings: Document the Rockchip MIPI RX D-PHY bindings
From: Jacob Chen
Add DT bindings documentation for Rockchip MIPI D-PHY RX
Signed-off-by: Jacob Chen
---
.../bindings/media/rockchip-mipi-dphy.txt | 71 ++
1 file changed, 71 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
new file mode 100644
index ..cef9450db051
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
@@ -0,0 +1,71 @@
+Rockchip SoC MIPI RX D-PHY
+-
+
+Required properties:
+
+- compatible: value should be one of the following
+"rockchip,rk3288-mipi-dphy";
+"rockchip,rk3399-mipi-dphy";
+- rockchip,grf: GRF regs.
+- bus-width : maximum number of data lanes supported (SoC specific);
+- clocks : list of clock specifiers, corresponding to entries in
+ clock-names property;
+- clock-names: required clock name.
+
+The device node should contain two 'port' child node, according to the bindings
+defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
+The first port should be connected to sensor nodes, and the second port should
be
+connected to isp node. The following are properties specific to those nodes.
+
+endpoint node
+-
+
+- data-lanes : (required) an array specifying active physical MIPI-CSI2
+ data input lanes and their mapping to logical lanes; the
+ array's content is unused, only its length is meaningful;
+
+Device node example
+---
+
+mipi_dphy_rx0: mipi-dphy-rx0 {
+compatible = "rockchip,rk3399-mipi-dphy";
+clocks = <&cru SCLK_MIPIDPHY_REF>,
+<&cru SCLK_DPHY_RX0_CFG>,
+<&cru PCLK_VIO_GRF>;
+clock-names = "dphy-ref", "dphy-cfg", "grf";
+power-domains = <&power RK3399_PD_VIO>;
+bus-width = <4>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+#address-cells = <1>;
+#size-cells = <0>;
+
+mipi_in_wcam: endpoint@0 {
+reg = <0>;
+remote-endpoint = <&wcam_out>;
+data-lanes = <1 2>;
+};
+mipi_in_ucam: endpoint@1 {
+reg = <1>;
+remote-endpoint = <&ucam_out>;
+data-lanes = <1>;
+};
+};
+
+port@1 {
+reg = <1>;
+#address-cells = <1>;
+#size-cells = <0>;
+
+dphy_rx0_out: endpoint@0 {
+reg = <0>;
+remote-endpoint = <&isp0_mipi_in>;
+};
+};
+};
+};
\ No newline at end of file
--
2.15.0
[PATCH v3 06/12] dt-bindings: Document the Rockchip ISP1 bindings
From: Jacob Chen
Add DT bindings documentation for Rockchip ISP1
Signed-off-by: Jacob Chen
---
.../devicetree/bindings/media/rockchip-isp1.txt| 57 ++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-isp1.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.txt
b/Documentation/devicetree/bindings/media/rockchip-isp1.txt
new file mode 100644
index ..0971ed94ed69
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-isp1.txt
@@ -0,0 +1,57 @@
+Rockchip SoC Image Signal Processing unit v1
+--
+
+Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs
+which contains image processing, scaling, and compression funcitons.
+
+Required properties:
+ - compatible: value should be one of the following
+ "rockchip,rk3288-cif-isp";
+ "rockchip,rk3399-cif-isp";
+ - reg : offset and length of the register set for the device.
+ - interrupts: should contain ISP interrupt.
+ - clocks: phandle to the required clocks.
+ - clock-names: required clock name.
+ - iommus: required a iommu node.
+
+The device node should contain one 'port' child node with child 'endpoint'
+nodes, according to the bindings defined in Documentation/devicetree/bindings/
+media/video-interfaces.txt.
+
+For sensor with a parallel video bus, it could be linked directly to the isp.
+For sensor with a MIPI CSI-2 video bus, it should be linked through the
+MIPI-DPHY, which is defined in rockchip-mipi-dphy.txt.
+
+Device node example
+---
+
+ isp0: isp0@ff91 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff91 0x0 0x4000>;
+ interrupts = ;
+ clocks = <&cru SCLK_ISP0>,
+<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* mipi */
+ isp0_mipi_in: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&dphy_rx0_out>;
+ };
+
+ /* parallel */
+ isp0_parallel_in: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&ov5640_out>;
+ };
+ };
+ };
--
2.15.0
[PATCH v3 01/12] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index d6587b3ec33e..0604ae9ea444 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1252,6 +1252,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_TCH_FMT_TU08: descr = "8-bit unsigned touch data";
break;
case V4L2_META_FMT_VSP1_HGO:descr = "R-Car VSP1 1-D Histogram";
break;
case V4L2_META_FMT_VSP1_HGT:descr = "R-Car VSP1 2-D Histogram";
break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A
params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A
statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 7c871291c1fa..961545e64c12 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -691,6 +691,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VSP1_HGOv4l2_fourcc('V', 'S', 'P', 'H') /* R-Car
VSP1 1-D Histogram */
#define V4L2_META_FMT_VSP1_HGTv4l2_fourcc('V', 'S', 'P', 'T') /* R-Car
VSP1 2-D Histogram */
+/* Vendor specific - used for IPU3 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC0xfeedcafe
--
2.15.0
Re: [PATCH v3 07/12] dt-bindings: Document the Rockchip MIPI RX D-PHY bindings
Hi all,
2017-12-12 0:45 GMT+08:00 Laurent Pinchart :
> Hello Jacob,
>
> Thank you for the patch.
>
> On Wednesday, 6 December 2017 13:19:34 EET Jacob Chen wrote:
>> From: Jacob Chen
>>
>> Add DT bindings documentation for Rockchip MIPI D-PHY RX
>>
>> Signed-off-by: Jacob Chen
>> ---
>> .../bindings/media/rockchip-mipi-dphy.txt | 71 +++
>> 1 file changed, 71 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
>>
>> diff --git a/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
>> b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt new file
>> mode 100644
>> index ..cef9450db051
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
>> @@ -0,0 +1,71 @@
>> +Rockchip SoC MIPI RX D-PHY
>> +-
>> +
>> +Required properties:
>> +
>> +- compatible: value should be one of the following
>> +"rockchip,rk3288-mipi-dphy";
>> +"rockchip,rk3399-mipi-dphy";
>> +- rockchip,grf: GRF regs.
>> +- bus-width : maximum number of data lanes supported (SoC specific);
>
> Bus width isn't a standard property, should this be rockchip,data-lanes or
> rockchip,#data-lanes ?
I forgot to remove it, it's no unnecessary now.
>
>> +- clocks : list of clock specifiers, corresponding to entries in
>> + clock-names property;
>> +- clock-names: required clock name.
>> +
>> +The device node should contain two 'port' child node, according to the
>
> s/child node/child nodes/
>
>> bindings
>> +defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
>> +The first port should be connected to sensor nodes, and the second port
>> should be
>> +connected to isp node. The following are properties specific to those
>> nodes.
>> +
>> +endpoint node
>> +-
>> +
>> +- data-lanes : (required) an array specifying active physical MIPI-CSI2
>> + data input lanes and their mapping to logical lanes; the
>> + array's content is unused, only its length is meaningful;
>
> I assume this means that the D-PHY can't reroute lanes. I would mention that
> explicitly, and require that the data-lanes values start at one at are
> consecutive instead of ignoring them.
>
>> +Device node example
>> +---
>> +
>> +mipi_dphy_rx0: mipi-dphy-rx0 {
>> +compatible = "rockchip,rk3399-mipi-dphy";
>> +clocks = <&cru SCLK_MIPIDPHY_REF>,
>> +<&cru SCLK_DPHY_RX0_CFG>,
>> +<&cru PCLK_VIO_GRF>;
>> +clock-names = "dphy-ref", "dphy-cfg", "grf";
>> +power-domains = <&power RK3399_PD_VIO>;
>> +bus-width = <4>;
>> +
>> +ports {
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +
>> +port@0 {
>> +reg = <0>;
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +
>> +mipi_in_wcam: endpoint@0 {
>> +reg = <0>;
>> +remote-endpoint = <&wcam_out>;
>> +data-lanes = <1 2>;
>> +};
>> +mipi_in_ucam: endpoint@1 {
>> +reg = <1>;
>> +remote-endpoint = <&ucam_out>;
>> +data-lanes = <1>;
>> +};
>
> What do those two camera correspond to ? Can they be active at the same time,
> or do they use the same data lanes ? If they use the same data lanes, how does
> this work, is there a multiplexer on the board ?
>
They can not be active at the same time, and there is no multiplexer.
If they use the same mipi phy, then only one sensor is allowed to be actived.
See "MIPI Details" chapter
http://opensource.rock-chips.com/wiki_Rockchip-isp1
Let me enumerates soime hardware connections that is common in
rockchip tablet desgin.
rk3288:
-
ISP0 --> mipi TX1/RX1 --> front sensor
--> mipi RX0 --> rear sensor
-
ISP0 --> parallel --> front sensor
--> mipi RX0 --> rear sensor
rk3399
-
mipi TX1/RX1 , mipi TX0 --> dual-mipi screen
ISP0 --> mipi RX0 --> front sensor
--> rear sensor
-
ISP1 --> mipi TX1/RX1 --> front sensor
ISP0 --> mipi RX0 --> rear sensor
Only the last connection allow two sensor work at same time.
>> +};
>> +
>> +port@1 {
>> +reg = <1>;
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +
>> +dphy_rx0_out: endpoint@0 {
>> +reg = <0>;
>> +remote-endpoint = <&isp0_mipi_in>;
>> +};
>> +};
>> +};
>> +};
>> \ No newline at end of file
>
> --
> Regards,
>
> Laurent Pinchart
>
[PATCH v4 01/16] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
From: Shunqian Zheng
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
---
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index d6587b3ec33e..0604ae9ea444 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1252,6 +1252,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_TCH_FMT_TU08: descr = "8-bit unsigned touch data";
break;
case V4L2_META_FMT_VSP1_HGO:descr = "R-Car VSP1 1-D Histogram";
break;
case V4L2_META_FMT_VSP1_HGT:descr = "R-Car VSP1 2-D Histogram";
break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A
params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A
statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 7c871291c1fa..961545e64c12 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -691,6 +691,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VSP1_HGOv4l2_fourcc('V', 'S', 'P', 'H') /* R-Car
VSP1 1-D Histogram */
#define V4L2_META_FMT_VSP1_HGTv4l2_fourcc('V', 'S', 'P', 'T') /* R-Car
VSP1 2-D Histogram */
+/* Vendor specific - used for IPU3 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /*
Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /*
Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC0xfeedcafe
--
2.15.1
[PATCH v4 03/16] media: rkisp1: Add user space ABI definitions
From: Jeffy Chen
Add the header for userspace
Signed-off-by: Jeffy Chen
Signed-off-by: Jacob Chen
---
include/uapi/linux/rkisp1-config.h | 757 +
1 file changed, 757 insertions(+)
create mode 100644 include/uapi/linux/rkisp1-config.h
diff --git a/include/uapi/linux/rkisp1-config.h
b/include/uapi/linux/rkisp1-config.h
new file mode 100644
index ..0f9f42265a7a
--- /dev/null
+++ b/include/uapi/linux/rkisp1-config.h
@@ -0,0 +1,757 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip isp1 driver
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _UAPI_RKISP1_CONFIG_H
+#define _UAPI_RKISP1_CONFIG_H
+
+#include
+#include
+
+#define CIFISP_MODULE_DPCC (1 << 0)
+#define CIFISP_MODULE_BLS (1 << 1)
+#define CIFISP_MODULE_SDG (1 << 2)
+#define CIFISP_MODULE_HST (1 << 3)
+#define CIFISP_MODULE_LSC (1 << 4)
+#define CIFISP_MODULE_AWB_GAIN (1 << 5)
+#define CIFISP_MODULE_FLT (1 << 6)
+#define CIFISP_MODULE_BDM (1 << 7)
+#define CIFISP_MODULE_CTK (1 << 8)
+#define CIFISP_MODULE_GOC (1 << 9)
+#define CIFISP_MODULE_CPROC (1 << 10)
+#define CIFISP_MODULE_AFC (1 << 11)
+#define CIFISP_MODULE_AWB (1 << 12)
+#define CIFISP_MODULE_IE(1 << 13)
+#define CIFISP_MODULE_AEC (1 << 14)
+#define CIFISP_MODULE_WDR (1 << 15)
+#define CIFISP_MODULE_DPF (1 << 16)
+#define CIFISP_MODULE_DPF_STRENGTH (1 << 17)
+
+#define CIFISP_CTK_COEFF_MAX0x100
+#define CIFISP_CTK_OFFSET_MAX 0x800
+
+#define CIFISP_AE_MEAN_MAX 25
+#define CIFISP_HIST_BIN_N_MAX 16
+#define CIFISP_AFM_MAX_WINDOWS 3
+#define CIFISP_DEGAMMA_CURVE_SIZE 17
+
+#define CIFISP_BDM_MAX_TH 0xFF
+
+/*
+ * Black level compensation
+ */
+/* maximum value for horizontal start address */
+#define CIFISP_BLS_START_H_MAX 0x0FFF
+/* maximum value for horizontal stop address */
+#define CIFISP_BLS_STOP_H_MAX 0x0FFF
+/* maximum value for vertical start address */
+#define CIFISP_BLS_START_V_MAX 0x0FFF
+/* maximum value for vertical stop address */
+#define CIFISP_BLS_STOP_V_MAX 0x0FFF
+/* maximum is 2^18 = 262144*/
+#define CIFISP_BLS_SAMPLES_MAX 0x0012
+/* maximum value for fixed black level */
+#define CIFISP_BLS_FIX_SUB_MAX 0x0FFF
+/* minimum value for fixed black level */
+#define CIFISP_BLS_FIX_SUB_MIN 0xF000
+/* 13 bit range (signed)*/
+#define CIFISP_BLS_FIX_MASK0x1FFF
+
+/*
+ * Automatic white balance measurments
+ */
+#define CIFISP_AWB_MAX_GRID1
+#define CIFISP_AWB_MAX_FRAMES 7
+
+/*
+ * Gamma out
+ */
+/* Maximum number of color samples supported */
+#define CIFISP_GAMMA_OUT_MAX_SAMPLES 17
+
+/*
+ * Lens shade correction
+ */
+#define CIFISP_LSC_GRAD_TBL_SIZE 8
+#define CIFISP_LSC_SIZE_TBL_SIZE 8
+/*
+ * The following matches the tuning process,
+ * not the max capabilities of the chip.
+ * Last value unused.
+ */
+#defineCIFISP_LSC_DATA_TBL_SIZE 290
+
+/*
+ * Histogram calculation
+ */
+/* Last 3 values unused. */
+#define CIFISP_HISTOGRAM_WEIGHT_GRIDS_SIZE 28
+
+/*
+ * Defect Pixel Cluster Correction
+ */
+#define CIFISP_DPCC_METHODS_MAX 3
+
+/*
+ * Denoising pre filter
+ */
+#define CIFISP_DPF_MAX_NLF_COEFFS 17
+#define CIFISP_DPF_MAX_SPATIAL_COEFFS 6
+
+/*
+ * Measurement types
+ */
+#define CIFISP_STAT_AWB (1 << 0)
+#define CIFISP_STAT_AUTOEXP (1 << 1)
+#define CIFISP_STAT_AFM_FIN (1 << 2)
+#define CIFISP_STAT_HIST (1 << 3)
+
+enum cifisp_histogram_mode {
+ CIFISP_HISTOGRAM_MODE_DISABLE,
+ CIFISP_HISTOGRAM_MODE_RGB_COMBINED,
+ CIFISP_HISTOGRAM_MODE_R_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_G_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_B_HISTOGRAM,
+ CIFISP_HISTOGRAM_MODE_Y_HISTOGRAM
+};
+
+enum cifisp_awb_mode_type {
+ CIFISP_AWB_MODE_MANUAL,
+ CIFISP_AWB_MODE_RGB,
+ CIFISP_AWB_MODE_YCBCR
+};
+
+enum cifisp_flt_mode {
+ CIFISP_FLT_STATIC_MODE,
+ CIFISP_FLT_DYNAMIC_MODE
+};
+
+/**
+ * enum cifisp_exp_ctrl_auotostop - stop modes
+ * @CIFISP_EXP_CTRL_AUTOSTOP_0: continous measurement
+ * @CIFISP_EXP_CTRL_AUTOSTOP_1: stop measuring after a complete frame
+ */
+enum cifisp_exp_ctrl_auotostop {
+ CIFISP_EXP_CTRL_AUTOSTOP_0 = 0,
+ CIFISP_EXP_CTRL_AUTOSTOP_1 = 1,
+};
+
+/**
+ * enum cifisp_exp_meas_mode - Exposure measure mode
+ * @CIFISP_EXP_MEASURING_MODE_0: Y = 16 + 0.25R + 0.5G + 0.1094B
+ * @CIFISP_EXP_MEASURING_MODE_1: Y = (R + G + B) x (85/256)
+
[PATCH v4 00/16] Rockchip ISP1 Driver
From: Jacob Chen changes in V4: - fix some bugs during development - move quantization settings to rkisp1 subdev - correct some spelling problems - describe ports in dt-binding documents changes in V3: - add some comments - fix wrong use of v4l2_async_subdev_notifier_register - optimize two paths capture at a time - remove compose - re-struct headers - add a tmp wiki page: http://opensource.rock-chips.com/wiki_Rockchip-isp1 changes in V2: mipi-phy: - use async probing - make it be a child device of the GRF isp: - add dummy buffer - change the way to get bus configuration, which make it possible to add parallel sensor support in the future(without mipi-phy driver). This patch series add a ISP(Camera) v4l2 driver for rockchip rk3288/rk3399 SoC. Wiki Pages: http://opensource.rock-chips.com/wiki_Rockchip-isp1 Jacob Chen (12): media: doc: add document for rkisp1 meta buffer format media: rkisp1: add Rockchip MIPI Synopsys DPHY driver media: rkisp1: add Rockchip ISP1 subdev driver media: rkisp1: add ISP1 statistics driver media: rkisp1: add ISP1 params driver media: rkisp1: add capture device driver media: rkisp1: add rockchip isp1 core driver dt-bindings: Document the Rockchip ISP1 bindings dt-bindings: Document the Rockchip MIPI RX D-PHY bindings ARM: dts: rockchip: add isp node for rk3288 ARM: dts: rockchip: add rx0 mipi-phy for rk3288 MAINTAINERS: add entry for Rockchip ISP1 driver Jeffy Chen (1): media: rkisp1: Add user space ABI definitions Shunqian Zheng (3): media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format arm64: dts: rockchip: add isp0 node for rk3399 arm64: dts: rockchip: add rx0 mipi-phy for rk3399 .../devicetree/bindings/media/rockchip-isp1.txt| 69 + .../bindings/media/rockchip-mipi-dphy.txt | 88 + Documentation/media/uapi/v4l/meta-formats.rst |2 + .../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 + .../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 + MAINTAINERS| 10 + arch/arm/boot/dts/rk3288.dtsi | 24 + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 + drivers/media/platform/Kconfig | 10 + drivers/media/platform/Makefile|1 + drivers/media/platform/rockchip/isp1/Makefile |8 + drivers/media/platform/rockchip/isp1/capture.c | 1704 drivers/media/platform/rockchip/isp1/capture.h | 194 +++ drivers/media/platform/rockchip/isp1/common.h | 137 ++ drivers/media/platform/rockchip/isp1/dev.c | 653 drivers/media/platform/rockchip/isp1/dev.h | 120 ++ drivers/media/platform/rockchip/isp1/isp_params.c | 1537 ++ drivers/media/platform/rockchip/isp1/isp_params.h | 76 + drivers/media/platform/rockchip/isp1/isp_stats.c | 522 ++ drivers/media/platform/rockchip/isp1/isp_stats.h | 85 + .../media/platform/rockchip/isp1/mipi_dphy_sy.c| 787 + drivers/media/platform/rockchip/isp1/regs.c| 264 +++ drivers/media/platform/rockchip/isp1/regs.h| 1577 ++ drivers/media/platform/rockchip/isp1/rkisp1.c | 1211 ++ drivers/media/platform/rockchip/isp1/rkisp1.h | 132 ++ drivers/media/v4l2-core/v4l2-ioctl.c |2 + include/uapi/linux/rkisp1-config.h | 757 + include/uapi/linux/videodev2.h |4 + 28 files changed, 10034 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip-isp1.txt create mode 100644 Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst create mode 100644 drivers/media/platform/rockchip/isp1/Makefile create mode 100644 drivers/media/platform/rockchip/isp1/capture.c create mode 100644 drivers/media/platform/rockchip/isp1/capture.h create mode 100644 drivers/media/platform/rockchip/isp1/common.h create mode 100644 drivers/media/platform/rockchip/isp1/dev.c create mode 100644 drivers/media/platform/rockchip/isp1/dev.h create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.h create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.c create mode 100644 drivers/media/platform/rockchip/isp1/isp_stats.h create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c create mode 100644 drivers/media/platform/rockchip/isp1/regs.c create mode 100644 drivers/media/platform/rockchip/isp1/regs.h create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.c create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.h create mode 100644 include/uapi/linux/rkisp1-config.h -- 2.15.1
[PATCH v4 02/16] media: doc: add document for rkisp1 meta buffer format
From: Jacob Chen This commit add docuemnt for rkisp1 meta buffer format Signed-off-by: Jacob Chen --- Documentation/media/uapi/v4l/meta-formats.rst | 2 ++ .../media/uapi/v4l/pixfmt-meta-rkisp1-params.rst | 17 + .../media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 18 ++ 3 files changed, 37 insertions(+) create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/media/uapi/v4l/meta-formats.rst index 01e24e3df571..1b8281423aa2 100644 --- a/Documentation/media/uapi/v4l/meta-formats.rst +++ b/Documentation/media/uapi/v4l/meta-formats.rst @@ -14,3 +14,5 @@ These formats are used for the :ref:`metadata` interface only. pixfmt-meta-vsp1-hgo pixfmt-meta-vsp1-hgt +pixfmt-meta-rkisp1-params +pixfmt-meta-rkisp1-stat diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst new file mode 100644 index ..ed344d463b52 --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst @@ -0,0 +1,17 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _v4l2-meta-fmt-rkisp1-params: + +*** +V4L2_META_FMT_RK_ISP1_PARAMS +*** + +Rockchip ISP1 Parameters Data + +Description +=== + +This format describes input parameters for the Rockchip ISP1. + +The data use c-struct :c:type:`rkisp1_isp_params_cfg`, which is defined in +the ``linux/rkisp1-config.h`` header file, See it for details. diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst new file mode 100644 index ..5ecc4031295f --- /dev/null +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst @@ -0,0 +1,18 @@ +.. -*- coding: utf-8; mode: rst -*- + +.. _v4l2-meta-fmt-rkisp1-stat: + +*** +V4L2_META_FMT_RK_ISP1_STAT_3A +*** + +Rockchip ISP1 Statistics Data + +Description +=== + +This format describes image color statistics information generated by the Rockchip +ISP1. + +The data use c-struct :c:type:`rkisp1_stat_buffer`, which is defined in +the ``linux/cifisp_stat.h`` header file, See it for details. -- 2.15.1
[PATCH v4 04/16] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver
From: Jacob Chen
This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
---
.../media/platform/rockchip/isp1/mipi_dphy_sy.c| 787 +
1 file changed, 787 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
new file mode 100644
index ..942118366f49
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -0,0 +1,787 @@
+/*
+ * Rockchip MIPI Synopsys DPHY driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RK3288_GRF_SOC_CON60x025c
+#define RK3288_GRF_SOC_CON80x0264
+#define RK3288_GRF_SOC_CON90x0268
+#define RK3288_GRF_SOC_CON10 0x026c
+#define RK3288_GRF_SOC_CON14 0x027c
+#define RK3288_GRF_SOC_STATUS210x02d4
+#define RK3288_GRF_IO_VSEL 0x0380
+#define RK3288_GRF_SOC_CON15 0x03a4
+
+#define RK3399_GRF_SOC_CON90x6224
+#define RK3399_GRF_SOC_CON21 0x6254
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_SOC_CON23 0x625c
+#define RK3399_GRF_SOC_CON24 0x6260
+#define RK3399_GRF_SOC_CON25 0x6264
+#define RK3399_GRF_SOC_STATUS1 0xe2a4
+
+#define CLOCK_LANE_HS_RX_CONTROL 0x34
+#define LANE0_HS_RX_CONTROL0x44
+#define LANE1_HS_RX_CONTROL0x54
+#define LANE2_HS_RX_CONTROL0x84
+#define LANE3_HS_RX_CONTROL0x94
+#define HS_RX_DATA_LANES_THS_SETTLE__CONTROL 0x75
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
+enum mipi_dphy_sy_pads {
+ MIPI_DPHY_SY_PAD_SINK = 0,
+ MIPI_DPHY_SY_PAD_SOURCE,
+ MIPI_DPHY_SY_PADS_NUM,
+};
+
+enum dphy_reg_id {
+ GRF_DPHY_RX0_TURNDISABLE = 0,
+ GRF_DPHY_RX0_FORCERXMODE,
+ GRF_DPHY_RX0_FORCETXSTOPMODE,
+ GRF_DPHY_RX0_ENABLE,
+ GRF_DPHY_RX0_TESTCLR,
+ GRF_DPHY_RX0_TESTCLK,
+ GRF_DPHY_RX0_TESTEN,
+ GRF_DPHY_RX0_TESTDIN,
+ GRF_DPHY_RX0_TURNREQUEST,
+ GRF_DPHY_RX0_TESTDOUT,
+ GRF_DPHY_TX0_TURNDISABLE,
+ GRF_DPHY_TX0_FORCERXMODE,
+ GRF_DPHY_TX0_FORCETXSTOPMODE,
+ GRF_DPHY_TX0_TURNREQUEST,
+ GRF_DPHY_TX1RX1_TURNDISABLE,
+ GRF_DPHY_TX1RX1_FORCERXMODE,
+ GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
+ GRF_DPHY_TX1RX1_ENABLE,
+ GRF_DPHY_TX1RX1_MASTERSLAVEZ,
+ GRF_DPHY_TX1RX1_BASEDIR,
+ GRF_DPHY_TX1RX1_ENABLECLK,
+ GRF_DPHY_TX1RX1_TURNREQUEST,
+ GRF_DPHY_RX1_SRC_SEL,
+ /* rk3288 only */
+ GRF_CON_DISABLE_ISP,
+ GRF_CON_ISP_DPHY_SEL,
+ GRF_DSI_CSI_TESTBUS_SEL,
+ GRF_DVP_V18SEL,
+ /* below is for rk3399 only */
+ GRF_DPHY_RX0_CLK_INV_SEL,
+ GRF_DPHY_RX1_CLK_INV_SEL,
+};
+
+struct dphy_reg {
+ u32 offset;
+ u32 mask;
+ u32 shift;
+};
+
+#define PHY_REG(_offset, _width, _shift) \
+ { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
+
+static const struct dphy_reg rk3399_grf_dphy_regs[] = {
+ [GRF_DPHY_RX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON9, 4, 0),
+ [GRF_DPHY_RX0_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 10),
+ [GRF_DPHY_RX1_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 11),
+
[PATCH v4 05/16] media: rkisp1: add Rockchip ISP1 subdev driver
From: Jacob Chen
Add the subdev driver for rockchip isp1.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/rkisp1.c | 1211 +
drivers/media/platform/rockchip/isp1/rkisp1.h | 132 +++
2 files changed, 1343 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.c
create mode 100644 drivers/media/platform/rockchip/isp1/rkisp1.h
diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c
b/drivers/media/platform/rockchip/isp1/rkisp1.c
new file mode 100644
index ..abe62f30
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -0,0 +1,1211 @@
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "common.h"
+#include "regs.h"
+
+#define CIF_ISP_INPUT_W_MAX4032
+#define CIF_ISP_INPUT_H_MAX3024
+#define CIF_ISP_INPUT_W_MIN32
+#define CIF_ISP_INPUT_H_MIN32
+#define CIF_ISP_OUTPUT_W_MAX CIF_ISP_INPUT_W_MAX
+#define CIF_ISP_OUTPUT_H_MAX CIF_ISP_INPUT_H_MAX
+#define CIF_ISP_OUTPUT_W_MIN CIF_ISP_INPUT_W_MIN
+#define CIF_ISP_OUTPUT_H_MIN CIF_ISP_INPUT_H_MIN
+
+/*
+ * NOTE: MIPI controller and input MUX are also configured in this file,
+ * because ISP Subdev is not only describe ISP submodule(input size,format,
output size, format),
+ * but also a virtual route device.
+ */
+
+/*
+ * There are many variables named with format/frame in below code,
+ * please see here for their meaning.
+ *
+ * Cropping regions of ISP
+ *
+ * +-+
+ * | Sensor image|
+ * | +---+ |
+ * | | ISP_ACQ (for black level) | |
+ * | | in_frm| |
+ * | | ++| |
+ * | | |ISP_OUT || |
+ * | | |in_crop || |
+ * | | |+-+ || |
+ * | | || ISP_IS| || |
+ * | | || rkisp1_isp_subdev: out_crop | || |
+ * | | |+-+ || |
+ * | | ++| |
+ * | +---+ |
+ * +-+
+ */
+
+static inline struct rkisp1_device *sd_to_isp_dev(struct v4l2_subdev *sd)
+{
+ return container_of(sd->v4l2_dev, struct rkisp1_device, v4l2_dev);
+}
+
+/* Get sensor by enabled media link */
+static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd)
+{
+ struct media_pad *local;
+ struct media_entity *sensor_me;
+
+ local = &sd->entity.pads[RKISP1_ISP_PAD_SINK];
+ sensor_me = media_entity_remote_pad(local)->entity;
+
+ return media_entity_to_v4l2_subdev(sensor_me);
+}
+
+static struct rkisp1_sensor_info *sd_to_sensor(struct rkisp1_device *dev,
+ struct v4l2_subdev *sd)
+{
+ int i;
+
+ for (i = 0; i < dev->num_sensors; ++i)
+ if (dev->sens
[PATCH v4 07/16] media: rkisp1: add ISP1 params driver
From: Jacob Chen
Add the output video driver that accept params from userspace.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/isp_params.c | 1537 +
drivers/media/platform/rockchip/isp1/isp_params.h | 76 +
2 files changed, 1613 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.c
create mode 100644 drivers/media/platform/rockchip/isp1/isp_params.h
diff --git a/drivers/media/platform/rockchip/isp1/isp_params.c
b/drivers/media/platform/rockchip/isp1/isp_params.c
new file mode 100644
index ..287f8523dbd9
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/isp_params.c
@@ -0,0 +1,1537 @@
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include
+#include
+#include
+#include/* for ISP params */
+#include "dev.h"
+#include "regs.h"
+
+#define RKISP1_ISP_PARAMS_REQ_BUFS_MIN 2
+#define RKISP1_ISP_PARAMS_REQ_BUFS_MAX 8
+
+#define BLS_START_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_H_MAX)
+#define BLS_STOP_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_H_MAX)
+
+#define BLS_START_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_V_MAX)
+#define BLS_STOP_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_V_MAX)
+
+#define BLS_SAMPLE_MAX_IS_VALID(val) ((val) < CIFISP_BLS_SAMPLES_MAX)
+
+#define BLS_FIX_SUB_IS_VALID(val) \
+ ((val) > (s16) CIFISP_BLS_FIX_SUB_MIN && (val) < CIFISP_BLS_FIX_SUB_MAX)
+
+#define RKISP1_ISP_DPCC_LINE_THRESH(n) (CIF_ISP_DPCC_LINE_THRESH_1 + 0x14 *
(n))
+#define RKISP1_ISP_DPCC_LINE_MAD_FAC(n) (CIF_ISP_DPCC_LINE_MAD_FAC_1 + 0x14 *
(n))
+#define RKISP1_ISP_DPCC_PG_FAC(n) (CIF_ISP_DPCC_PG_FAC_1 + 0x14 * (n))
+#define RKISP1_ISP_DPCC_RND_THRESH(n) (CIF_ISP_DPCC_RND_THRESH_1 + 0x14 * (n))
+#define RKISP1_ISP_DPCC_RG_FAC(n) (CIF_ISP_DPCC_RG_FAC_1 + 0x14 * (n))
+#define RKISP1_ISP_CC_COEFF(n) (CIF_ISP_CC_COEFF_0 + (n) * 4)
+
+static inline void rkisp1_iowrite32(struct rkisp1_isp_params_vdev *params_vdev,
+ u32 value, u32 addr)
+{
+ iowrite32(value, params_vdev->dev->base_addr + addr);
+}
+
+static inline u32 rkisp1_ioread32(struct rkisp1_isp_params_vdev *params_vdev,
+ u32 addr)
+{
+ return ioread32(params_vdev->dev->base_addr + addr);
+}
+
+static inline void isp_param_set_bits(struct rkisp1_isp_params_vdev
+*params_vdev,
+ u32 reg, u32 bit_mask)
+{
+ u32 val;
+
+ val = rkisp1_ioread32(params_vdev, reg);
+ rkisp1_iowrite32(params_vdev, val | bit_mask, reg);
+}
+
+static inline void isp_param_clear_bits(struct rkisp1_isp_params_vdev
+ *params_vdev,
+ u32 reg, u32 bit_mask)
+{
+ u32 val;
+
+ val = rkisp1_ioread32(params_vdev, reg);
+ rkisp1_iowrite32(params_vdev, val & ~bit_mask, reg);
+}
+
+/* ISP BP interface function */
+static void dpcc_config(struct rkisp1_isp_params_vdev *params_vdev,
+ const struct cifisp_dpcc_config *arg)
+{
+ unsigned int i;
+
+ rkisp1_iowrite32(params_vdev, arg->mode, CIF_ISP_DPCC_MODE);
+ rkisp1_iowrite32(params_vdev, arg->output_mode,
+
[PATCH v4 08/16] media: rkisp1: add capture device driver
From: Jacob Chen
This is the capture device interface driver that provides the v4l2
user interface. Frames can be received from ISP1.
Signed-off-by: Jacob Chen
Signed-off-by: Shunqian Zheng
Signed-off-by: Yichong Zhong
Signed-off-by: Jacob Chen
Signed-off-by: Eddie Cai
Signed-off-by: Jeffy Chen
Signed-off-by: Allon Huang
Signed-off-by: Tomasz Figa
---
drivers/media/platform/rockchip/isp1/capture.c | 1704
drivers/media/platform/rockchip/isp1/capture.h | 194 +++
drivers/media/platform/rockchip/isp1/regs.c| 264
drivers/media/platform/rockchip/isp1/regs.h| 1577 ++
4 files changed, 3739 insertions(+)
create mode 100644 drivers/media/platform/rockchip/isp1/capture.c
create mode 100644 drivers/media/platform/rockchip/isp1/capture.h
create mode 100644 drivers/media/platform/rockchip/isp1/regs.c
create mode 100644 drivers/media/platform/rockchip/isp1/regs.h
diff --git a/drivers/media/platform/rockchip/isp1/capture.c
b/drivers/media/platform/rockchip/isp1/capture.c
new file mode 100644
index ..542c35223665
--- /dev/null
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -0,0 +1,1704 @@
+/*
+ * Rockchip isp1 driver
+ *
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "dev.h"
+#include "regs.h"
+
+/*
+ * NOTE:
+ * 1. There are two capture video devices in rkisp1, selfpath and mainpath
+ * 2. Two capture device have separated memory-interface/crop/scale units.
+ * 3. Besides describing stream hardware, this file also contain entries for
pipeline operations.
+ * 4. The register read/write operations in this file are put into regs.c.
+ */
+
+/*
+ * differences between selfpatch and mainpath
+ * available mp sink input: isp
+ * available sp sink input : isp, dma(TODO)
+ * available mp sink pad fmts: yuv422, raw
+ * available sp sink pad fmts: yuv422, yuv420..
+ * available mp source fmts: yuv, raw, jpeg(TODO)
+ * available sp source fmts: yuv, rgb
+ */
+
+#define CIF_ISP_REQ_BUFS_MIN 1
+#define CIF_ISP_REQ_BUFS_MAX 8
+
+#define STREAM_PAD_SINK0
+#define STREAM_PAD_SOURCE 1
+
+#define STREAM_MAX_MP_RSZ_OUTPUT_WIDTH 4416
+#define STREAM_MAX_MP_RSZ_OUTPUT_HEIGHT3312
+#define STREAM_MAX_SP_RSZ_OUTPUT_WIDTH 1920
+#define STREAM_MAX_SP_RSZ_OUTPUT_HEIGHT1080
+#define STREAM_MIN_RSZ_OUTPUT_WIDTH32
+#define STREAM_MIN_RSZ_OUTPUT_HEIGHT 16
+
+#define STREAM_MAX_MP_SP_INPUT_WIDTH STREAM_MAX_MP_RSZ_OUTPUT_WIDTH
+#define STREAM_MAX_MP_SP_INPUT_HEIGHT STREAM_MAX_MP_RSZ_OUTPUT_HEIGHT
+#define STREAM_MIN_MP_SP_INPUT_WIDTH 32
+#define STREAM_MIN_MP_SP_INPUT_HEIGHT 32
+
+/* Get xsubs and ysubs for fourcc formats
+ *
+ * @xsubs: horizontal color samples in a 4*4 matrix, for yuv
+ * @ysubs: vertical color samples in a 4*4 matrix, for yuv
+ */
+static int fcc_xysubs(u32 fcc, u32 *xsubs, u32 *ysubs)
+{
+ switch (fcc) {
+ case V4L2_PIX_FMT_GREY:
+ case V4L2_PIX_FMT_YUV444M:
+ *xsubs = 1;
+ *ysubs = 1;
+ break;
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_YVYU:
+ case V4L2_PIX_FMT_VYUY:
+ case V4L2_PIX_FMT_YUV422P:
+ case V4L2_PIX_FMT_NV16:
+ case V4L2_PIX_FMT_NV61:
+ case V4L2_PIX_FMT_YVU422M:
+ *xsubs = 2;
+ *ysubs = 1;
+ break;
+ case V4L2_PIX_FMT_NV21:
