Re: [PATCH V2 00/19] C-SKY(csky) Linux Kernel Port
On Wed, Jul 11, 2018 at 10:51:33AM +0100, David Howells wrote: > Can you say what the --target tuple should be so that I can add the arch to my > collection of Fedora cross-binutils and cross-gcc tools built from upstream > binutils and gcc sources? Metor Graghics are helping us upstream gcc and binutils. @Sandra, Could you help me to reply the question?
Re: [PATCH V2 00/19] C-SKY(csky) Linux Kernel Port
On Thu, Jul 12, 2018 at 10:04:10AM -0600, Sandra Loosemore wrote: > On 07/12/2018 06:51 AM, Guo Ren wrote: > >On Wed, Jul 11, 2018 at 10:51:33AM +0100, David Howells wrote: > >>Can you say what the --target tuple should be so that I can add the arch to > >>my > >>collection of Fedora cross-binutils and cross-gcc tools built from upstream > >>binutils and gcc sources? > >Metor Graghics are helping us upstream gcc and binutils. > > > >@Sandra, > > > >Could you help me to reply the question? > > Neither binutils nor gcc support for C-SKY are in the upstream repositories > yet. We should be resubmitting the binutils port soon (with bug fixes to > address the test failures that caused it to be rejected the last time), and > the gcc port will follow that shortly. > > The target triplets we have been testing are csky-elf, csky-linux-gnu, and > csky-linux-uclibc. Note that the gcc port will only support v2 > processors/ABI so that is the default ABI for these triplets. > > I'm not familiar with the Fedora tools, but to build a complete toolchain > you'll need library support as well and I'm not sure what the submission > status/plans for that are. E.g. Mentor did a newlib/libgloss port for local > testing of the ELF toolchain and provided it to C-SKY, but pushing that to > the upstream repository ourselves is not on our todo list. > > -Sandra Thank you, Sandra. Guo Ren
Re: [PATCH 00/19] C-SKY(csky) Linux Kernel Port
On Mon, Mar 26, 2018 at 03:30:34PM +0200, Arnd Bergmann wrote: > Thanks for your submission. I had started reviewing it over a week > ago, but never > completed since I was travelling in the meantime. I've completed my first pass > now and will wait for a new version before I take a more detailed look. > > Overall, it looks nice, but changing the rest of the system call interface > will > take a while, this includes several points I've mentioned already, but > to clarify, > every file in arch/csky/include/uapi/asm/ needs to be carefully reviewed to > contain only the minimum required additions to the asm-generic version. > > Changing the ABI will obviously get in the way of testing, but this should > be over as soon as the port is merged. I entirely agree with you. After modify the unistd.h, we found a lot of ltp-cases failed. We are dealing with them. Best Regards Guo Ren
Re: [PATCH 17/19] csky: defconfig
On Mon, Mar 26, 2018 at 03:16:31PM +0200, Arnd Bergmann wrote: > > arch/csky/configs/gx66xx_defconfig | 549 > > + > > arch/csky/configs/qemu_ck807_defconfig | 541 > > > > 2 files changed, 1090 insertions(+) > > create mode 100644 arch/csky/configs/gx66xx_defconfig > > create mode 100644 arch/csky/configs/qemu_ck807_defconfig > > These look a lot longer than they should be, they contain many symbols > that I suspenc > are not needed or useful for you. I'll cleanup the defconfig again. > > > diff --git a/arch/csky/configs/gx66xx_defconfig > > b/arch/csky/configs/gx66xx_defconfig > > new file mode 100644 > > index 000..7f2a987 > > --- /dev/null > > +++ b/arch/csky/configs/gx66xx_defconfig > > @@ -0,0 +1,549 @@ > > +# CONFIG_LOCALVERSION_AUTO is not set > > +CONFIG_DEFAULT_HOSTNAME="github.com/c-sky" > > This is not a well-formed hostname I'll remove it. > > > +# CONFIG_SWAP is not set > > +CONFIG_SYSVIPC=y > > +CONFIG_POSIX_MQUEUE=y > > +# CONFIG_FHANDLE is not set > > +CONFIG_USELIB=y > > +CONFIG_AUDIT=y > > +CONFIG_IRQ_DOMAIN_DEBUG=y > > +CONFIG_NO_HZ_IDLE=y > > +CONFIG_HIGH_RES_TIMERS=y > > +CONFIG_BSD_PROCESS_ACCT=y > > +CONFIG_BSD_PROCESS_ACCT_V3=y > > +CONFIG_RELAY=y > > +CONFIG_SYSCTL_SYSCALL=y > > +CONFIG_KALLSYMS_ALL=y > > +# CONFIG_AIO is not set > > Disabling swap, fhandle or AIO seems odd, those are commonly > used symbols. I'll try to enable them. > > +CONFIG_USERFAULTFD=y > > +CONFIG_EMBEDDED=y > > CONFIG_EMBEDDED should generally not be selected, it's only for > very unusual configurations that need to disable symbols that are > normally required. I'll try to enable EMBEDDED. > > > +# CONFIG_PERF_EVENTS is not set > > +# CONFIG_SLUB_DEBUG is not set > > +# CONFIG_COMPAT_BRK is not set > > +CONFIG_PROFILING=y > > +CONFIG_OPROFILE=y > > oprofile can go now, since you said you'd remove the code. Yes, remove it. > > +CONFIG_BLK_DEV_BSGLIB=y > > +CONFIG_BLK_DEV_INTEGRITY=y > > +CONFIG_PARTITION_ADVANCED=y > > +CONFIG_ACORN_PARTITION=y > > +CONFIG_ACORN_PARTITION_ICS=y > > +CONFIG_ACORN_PARTITION_RISCIX=y > > +CONFIG_AIX_PARTITION=y > > +CONFIG_OSF_PARTITION=y > > +CONFIG_AMIGA_PARTITION=y > > +CONFIG_ATARI_PARTITION=y > > +CONFIG_MAC_PARTITION=y > > +CONFIG_BSD_DISKLABEL=y > > +CONFIG_MINIX_SUBPARTITION=y > > +CONFIG_SOLARIS_X86_PARTITION=y > > +CONFIG_UNIXWARE_DISKLABEL=y > > +CONFIG_LDM_PARTITION=y > > +CONFIG_SGI_PARTITION=y > > +CONFIG_ULTRIX_PARTITION=y > > +CONFIG_SUN_PARTITION=y > > +CONFIG_KARMA_PARTITION=y > > +CONFIG_SYSV68_PARTITION=y > > These block device configuration options all seem misplaced > here, it's extremely unlikely that you need them. I'll try to remove it. > > +# CONFIG_IPV6 is not set I'll enable IPV6. > > +CONFIG_CFG80211=y > > +CONFIG_CFG80211_DEBUGFS=y > > +CONFIG_CFG80211_WEXT=y > > I would guess you want IPV6 but not WEXT here. Gx6605s devlepment board support usb-wifi. Perhaps WEXT is needed by iwconfig or iwlist? So I just enable it. However, I'll consider to remove it. > > +# CONFIG_STANDALONE is not set > > No need to turn this off, it might just get in the way of build > testing. Ok, I'll try to enable it. > > +CONFIG_KEYBOARD_ADP5588=m > > +CONFIG_KEYBOARD_ADP5589=m > > +CONFIG_KEYBOARD_QT1070=m > > +CONFIG_KEYBOARD_QT2160=m > > +CONFIG_KEYBOARD_LKKBD=m > > There are many input devices listed here, most of which you almost > certainly won't need. Yes, remove them. > > +CONFIG_IPMI_HANDLER=y > > +CONFIG_IPMI_DEVICE_INTERFACE=m > > +CONFIG_IPMI_SI=m > > +CONFIG_IPMI_WATCHDOG=m > > +CONFIG_IPMI_POWEROFF=m > > Are you sure you have IPMI hardware? No IPMI hardware, remove them. > > +CONFIG_FB=y > > +CONFIG_FB_TILEBLITTING=y > > +CONFIG_FB_SIMPLE=y > > +CONFIG_BACKLIGHT_LCD_SUPPORT=y > > +# CONFIG_LCD_CLASS_DEVICE is not set > > +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set > > +# CONFIG_VGA_CONSOLE is not set > > +CONFIG_FRAMEBUFFER_CONSOLE=y > > +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y > > +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y > > +CONFIG_LOGO=y > > +# CONFIG_LOGO_LINUX_MONO is not set > > +# CONFIG_LOGO_LINUX_VGA16 is not set > > For new platforms, using the DRM subsystem is the recommend > way to do graphics, it mostly replaces the framebuffer subsystem > here. These used by: https://github.com/c-sky/addons-linux/tree/master/addons/drivers/video/fbdev/nationalchip I'll consider the DRM subsystem. > > +CONFIG_STE_MODEM_RPROC=m > > I think this is no longer there. Yes, remove it. > > +CONFIG_EXT2_FS=y > > +CONFIG_EXT2_FS_XATTR=y > > +CONFIG_EXT2_FS_POSIX_ACL=y > > +CONFIG_EXT2_FS_SECURITY=y > > +CONFIG_EXT3_FS=y > > +CONFIG_EXT3_FS_POSIX_ACL=y > > +CONFIG_EXT3_FS_SECURITY=y > > Better use EXT4 for the defconfig instead. OK. Best Regards Guo Ren
Re: [PATCH 15/19] csky: Build infrastructure
On Mon, Mar 26, 2018 at 03:00:00PM +0200, Arnd Bergmann wrote: > Ok, I understand the part about ck610 being incompatible, but I'm > still not sure about the 8xx ones: Do you mean it's impossible to > have one kernel that runs across all of them for some other reason, > or is it something you haven't allowed because you see no use for it? Sorry, Csky gcc need "-mcpu=ck807" or "-mcpu=ck810" or "-mcpu=ck860" to determine the back-end policy. So I must seperate them with different vmlinux. > This is basically the same question as above: For c610, using the fixed > value is sufficient, because it's incompatible with the others. But if you > want > to run the same kernel on both ck810 and ck860, then it needs some form > of runtime detection. Sorry, currently no runtime detection. But I agree with you that one vmlinux for all cpus is a good design for compat. > On other architectures, the L1_CACHE_BYTES constant is the maximum > possible cache line size, and the cache flush function uses the actual size The same with above, we don't detect cpus on runtime. So we just make it simple here. > Ok. Just make sure that the DT always has this information as well, > so this can be changed in the future when desired, without having to > make incompatible changes to the devicetree binary files. Ok Best Regards Guo Ren
Re: [PATCH 10/19] csky: Signal handling
On Mon, Mar 26, 2018 at 03:04:01PM +0200, Arnd Bergmann wrote: > On Sun, Mar 18, 2018 at 8:51 PM, Guo Ren wrote: > > Signed-off-by: Guo Ren > > --- > > arch/csky/include/uapi/asm/sigcontext.h | 33 +++ > > arch/csky/include/uapi/asm/signal.h | 164 ++ > > arch/csky/kernel/signal.c | 379 > > > > 3 files changed, 576 insertions(+) > > Please have a look at arch/riscv and arch/nds32 for this, I think it can be > simplified. This is an incompatible change of course, but when we change > the system call ABI anyway, that is the right time to do it. Ok. > > > > +#define NSIG 32 > > +typedef unsigned long sigset_t; > > + > > +#endif /* __KERNEL__ */ > > + > > +#define SIGHUP 1 > > +#define SIGINT 2 > > +#define SIGQUIT 3 > > +#define SIGILL 4 > > +#define SIGTRAP 5 > > +#define SIGABRT 6 > > +#define SIGIOT 6 > > +#define SIGBUS 7 > > +#define SIGFPE 8 > > +#define SIGKILL 9 > > +#define SIGUSR110 > > +#define SIGSEGV11 > > +#define SIGUSR212 > > +#define SIGPIPE13 > > In particular the constants should come from the asm-generic headers > rather than being duplicated. If you need anything special, it may be > better to modify the generic headers. Ok, use asm-generic. Best Regards Guo Ren
Re: [PATCH 06/19] csky: IRQ handling
Hi Thomas,
On Mon, Mar 19, 2018 at 02:16:37PM +0100, Thomas Gleixner wrote:
> > +static inline unsigned long arch_local_irq_save(void)
> > +{
> > + unsigned long flags;
>
> Newline between declaration and code please.
OK
> > +void csky_do_IRQ(int irq, struct pt_regs *regs)
>
> static? If not, then it needs a declaration in a header somewhere.
Yes, need static.
> > +asmlinkage void csky_do_auto_IRQ(struct pt_regs *regs)
> > +{
> > + unsigned long irq, psr;
> > +
> > + asm volatile("mfcr %0, psr":"=r"(psr));
> > +
> > + irq = (psr >> 16) & 0xff;
> > +
> > + if (irq == 10)
> > + irq = csky_get_auto_irqno();
> > + else
> > + irq -= 32;
>
> Please add a comment explaining this magic here. Magic numbers w/o
> explanation are bad.
Yes, you are right. I will fixup them next.
PSR is our Processor Status Register and it store the vector number.
'10' is our auto-interrupt exception entry and we need get the irqno
from the interrupt-controller.
The "vector num > 32" is our vector interrupt exception entries, so we
can calculate the irq-num by vector-num and no need to access the
interrupt-controller's io regs.
Best Regards
Guo Ren
Re: [PATCH 14/19] csky: Misc headers
Hi Arnd,
On Tue, Mar 20, 2018 at 12:11:24AM +0800, Arnd Bergmann wrote:
> On Mon, Mar 19, 2018 at 3:51 AM, Guo Ren wrote:
> > +++ b/arch/csky/include/uapi/asm/fcntl.h
> > @@ -0,0 +1,13 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
> > +#ifndef __ASM_CSKY_FCNTL_H
> > +#define __ASM_CSKY_FCNTL_H
> > +
> > +#define O_DIRECTORY04
> > +#define O_NOFOLLOW 010
> > +#define O_DIRECT 020
> > +#define O_LARGEFILE040
> > +
> > +#include
>
> This should just use the generic file without overrides: Please don't diverge
> from the generic syscall ABI.
>
It's a stupid copy from arm/include/uapi/asm/fcntl.h and the csky/bits/fcntl.h
in uclibc-ng and glibc are also defined with:
#define __O_DIRECTORY04 /* Must be a directory. */
#define __O_NOFOLLOW010 /* Do not follow links. */
#define __O_DIRECT 020 /* Direct disk access. */
#define __O_LARGEFILE 040
So may I keep it for a while?
(I will let glibc uclibc-ng csky/bits/fcntl.h include the linux/uapi/asm/fcntl.h
first.)
> > +struct __old_kernel_stat {
> > + unsigned short st_dev;
>
> Same here: no need for __old_kernel_stat or the headers on new architectures.
>
OK
Best Regards
Guo Ren
Re: [PATCH 15/19] csky: Build infrastructure
together. > > +KBUILD_CFLAGS += -ffreestanding \ > > -ffreestanding usually results in worse code and should not be needed OK, remove it. > > + -fno-tree-dse \ > > + -pipe \ > > + -Wno-uninitialized \ > > For -Wno-uninitialized, better fix the bugs properly. Can you explain > why you want It will mask some warnings :P, and I will remove it. > -fno-tree-dse? This is from "gcc-4.5 compile linux-4.7" and it will cause wrong code without -fno-tree-dse for list.h. Now we use gcc-6.3, so I will try to remove it. > > +++ b/arch/csky/abiv1/Makefile > > @@ -0,0 +1,8 @@ > > +obj-y += src/bswapdi.o > > +obj-y += src/bswapsi.o > > +obj-y += src/cacheflush.o > > +obj-y += src/memcpy.o > > +obj-y += src/mmap.o > > + > > +obj-$(CONFIG_CPU_NEED_SOFTALIGN) +=src/alignment.o > > Better not use subdirectories like that. Ok, I will change them like this: obj-y += bswapdi.o obj-y += bswapsi.o ... > Can you explain why you need the alignement fixups? For abiv1 ck610 couldn't handle the unalignment address access, so we need soft-alignment exception to fixup. There is no problem in abiv2 cpus. Best Regards Guo Ren
Re: [PATCH 14/19] csky: Misc headers
On Tue, Mar 20, 2018 at 03:54:53PM +0800, Arnd Bergmann wrote: > We generally assume that any upstream kernel ABI cannot be changed, so this > has to be changed before the code gets merged upstream. > > You can obviously maintain the old and the new ABI in parallel for a while, > until the libc supports the new ABI, but you can't do that in the patches > you send for integration. > > This is more important for the list of system calls, but when you change > the ABI, it should be changed all at once. Ok, follow the rules. I will modify uclibc-ng and glibc now.
Re: [PATCH 16/19] csky: Device tree
Hi Arnd,
On Mon, Mar 19, 2018 at 11:28:03PM +0800, Arnd Bergmann wrote:
> Please add a changelog text to each patch, and send patches that add
> .dts files or
> binding documents to the devicetree mailing list.
Ok
> It is usually better for an SoC based board to split the SoC specific into a
> separate .dtsi file that gets included by the board .dts file.
Ok
> > +/ {
> > + model = "Nationalchip gx6605s ck610";
> > + compatible = "nationalchip,gx6605s,ck610";
>
> Is ck610 the name of the CPU core? The general convention is to have the
> top-level "compatible" property list first the name of the board, then the
> name of the soc, but not the name of the CPU core.
Yes, ck610 is a cpu core of abiv1. and I will change it like this:
model = "Zhuxian-sword gx6605s Development Board";
compatible = "zhuxian-sword,gx6605s";
ref: https://c-sky.github.io/docs/gx6605s.html
> Here you should list the specific type of CPU in the compatible property and
> document the binding for that string in the Documentations/devicetree/bindings
> hierarchy. Without a binding, the 'ccr' and 'hint' properties make no sense.
Sorry, I forget remove the cpu region. It's no use now.
> If there is any chance that you could have SMP systems in the future, it
> would be better to start with #address-cells=<1>, with appropriate reg
> properties.
Ok
> Each node with a register property also needs the address in the
> node name, e.g. "interrupt-controller@50"
Ok
> Try building the dtb file with 'make W=1' to get warnings about
> when you got that wrong.
Thx
> > + timer0 {
> > + compatible = "nationalchip,timer-v1";
>
> This should be "timer@400"
Ok
> Also, each device node should have a binding documentation
> to explain the binding associated with that "compatible"
> string.
Ok, I will add them.
> > + ohci0: ohci-hcd0 {
> The names here should be "usb@...", not "ehci-hcd"
Ok
> > + chosen {
> > + bootargs = "console=ttyS0,115200 rdinit=/sbin/init
> > root=/dev/ram0";
> > + };
>
> The bootargs should not be in the dts file normally, they should come from the
> boot loader.
I want to keep bootargs in dts, because the bootloader only pass the dtb to
kernel.
> For the console, use the "stdout-path" property.
Ok
Best Regards
Guo Ren
Re: [PATCH 19/19] irqchip: add irq-nationalchip.c and irq-csky.c
Hi Thomas,
On Mon, Mar 19, 2018 at 02:30:42PM +0100, Thomas Gleixner wrote:
> > +static struct irq_chip ck_irq_chip = {
> > + .name = "csky_intc_v1",
> > + .irq_mask = ck_irq_mask,
> > + .irq_unmask = ck_irq_unmask,
> > +};
>
> Please use the generic interrupt chip infrastructure for this.
Ok, I will learn it.
> > +static unsigned int ck_get_irqno(void)
> > +{
> > + unsigned int temp;
>
> newline between declaration and code.
Ok
> > + temp = __raw_readl(CK_VA_INTC_ISR);
> > + return temp & 0x3f;
> > +};
> > +
> > +static int __init
> > +__intc_init(struct device_node *np, struct device_node *parent, bool ave)
>
> What is 'ave'?
Ave means the irq-controller works on auto-vector-handler mode, it will
cause 10 exception number and it need read intc-reg to get irq-num.
> No magic numbers. Please use proper defines.
Ok
> > + else
> > + __raw_writel( 0x0, CK_VA_INTC_ICR);
> > + /*
> > +* csky irq ctrl has 64 sources.
> > +*/
> > + #define INTC_IRQS 64
>
> No defines in code.
Ok
>
> > + for (i=0; i
> checkpatch.pl would have told you what's wrong with the above
Ok, Thx
> > + __raw_writel((i+3)|((i+2)<<8)|((i+1)<<16)|(i<<24),
>
> Eew. Tons of magic numbers and a unreadable coding style. Please use an
> inline function with proper comments to calculate that value
Ok
> > + CK_VA_INTC_SOURCE + i);
> > +
> > + root_domain = irq_domain_add_legacy(np, INTC_IRQS, 0, 0, &ck_irq_ops,
> > NULL);
> > + if (!root_domain)
> > + panic("root irq domain not available\n");
> > +
> > + irq_set_default_host(root_domain);
> > +
> > + return 0;
> > +}
> > +
> > +static int __init
> > +intc_init(struct device_node *np, struct device_node *parent)
> > +{
> > +
>
> Stray newline
I'll remove, Thx.
> > + return __intc_init(np, parent, false);
> > +}
> > +IRQCHIP_DECLARE(csky_intc_v1, "csky,intc-v1", intc_init);
> > +
> > +/*
> > + * use auto vector exceptions 10 for interrupt.
> > + */
> > +static int __init
> > +intc_init_ave(struct device_node *np, struct device_node *parent)
> > +{
> > + return __intc_init(np, parent, true);
>
> Why is that 'ave' thing not a property of device tree?
I'll change it to a property.
> > +struct irq_chip nc_irq_chip = {
> > + .name = "nationalchip_intc_v1",
> > + .irq_mask = nc_irq_mask,
> > + .irq_unmask = nc_irq_unmask,
> > + .irq_enable = nc_irq_en,
> > + .irq_disable = nc_irq_dis,
> > +};
>
> Again. This all can use the generic interrupt chip.
I'll learn the generic interrupt chip.
> > +inline int ff1_64(unsigned int hi, unsigned int lo)
>
> What on earth means ff1_64?
Find the first high bit '1' of the reg :P
> > + asm volatile(
> > + "ff1 %0\n"
> > + :"=r"(lo)
> > + :"r"(lo)
> > + :
> > + );
>
> So you want to decode the interrupt number from a bitfield. What's wrong
> with ffs()?
There is no wrong with ffs(). Ok, I will use the ffs().
> > + if( lo != 32 )
> > + result = 31-lo;
>
> Why is this subtracted?
ff1 find from high bit, so we need reverse it to get the right num.
> That code makes no sense w/o comments.
Sorry, I will add.
> > + else if( hi != 32 ) result = 31-hi + 32;
> > + else {
> > + printk("nc_get_irqno error hi:%x, lo:%x.\n", hi, lo);
> > + result = NR_IRQS;
> > + }
>
> Pleas use braces consistently.
Ok
> > +unsigned int nc_get_irqno(void)
>
> static?
Yes
> Same comments as for the other variant.
Ok
Best Regards
Guo Ren
Re: [PATCH 15/19] csky: Build infrastructure
ather than linking it into the > kernel. The reason for preferring the appended one is that you > can more easily use the same kernel binary across boards with > different bootloaders. Ok, got it. I'll use the dtb passed by bootloader first. > I'd say it's better to get rid of it for the upstream port, more importantly > getting rid of the code that checks for this symbol. Usually what happens > with version checks like this one is that they get out of sync quickly > as a new kernel version does things differently and diverges more > from the old release you were comparing against. In device drivers, > we tend to remove all those checks. Ok, follow the rules. > > >> -fno-tree-dse? > > This is from "gcc-4.5 compile linux-4.7" and it will cause wrong code > > without > > -fno-tree-dse for list.h. Now we use gcc-6.3, so I will try to remove it. > > You can also use the cc-ifversion Makefile macro to apply it on > the old compiler. That way you can still use gcc-4.5 as long as > that remains relevant but don't get worse code generation on > modern versions. Thx for advice, but we don't need support gcc-4.5 now. I'll just remove them. > >> Can you explain why you need the alignement fixups? > > For abiv1 ck610 couldn't handle the unalignment address access, so we > > need soft-alignment exception to fixup. There is no problem in abiv2 cpus. > > Ok. Generally speaking, architectures that don't allow unaligned access > should have all code built in a way that uses aligned access (gcc normally > falls back to byte access when it encounters an unaligned pointer at > compile time), but if this is just for old CPUs that are not used in future > products, having the fixup does sound simpler, as it allows you to still > run new binaries on the old machines. I haven't looked at the implementation > for the fixup here, but I remember the same thing from the nds32 port. > In that case, we ended up keeping the fixup as an option for old > user space, but disabled to softalign fixups for kernel code. Can you do > the same thing here? Ok. I got it, I'll do the same as nds32. Best Regards Guo Ren
Re: [PATCH] csky: fixups after bootmem removal
On Wed, Sep 26, 2018 at 02:27:45PM +0300, Mike Rapoport wrote:
> Hi,
>
> The below patch fixes the bootmem leftovers in csky. It is based on the
> current mmots and csky build there fails because of undefined reference to
> dma_direct_ops:
>
> MODPOST vmlinux.o
> kernel/dma/mapping.o: In function `dmam_alloc_attrs':
> kernel/dma/mapping.c:143: undefined reference to `dma_direct_ops'
> kernel/dma/mapping.o: In function `dmam_declare_coherent_memory':
> kernel/dma/mapping.c:184: undefined reference to `dma_direct_ops'
> mm/dmapool.o: In function `dma_free_attrs':
> include/linux/dma-mapping.h:558: undefined reference to `dma_direct_ops'
>
> I've blindly added "select DMA_DIRECT_OPS" to arch/csky/Kconfig and it
> fixed the build, but I really have no idea if this the right thing to do...
You are almost right, the issue is come from the patch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=bc3ec75de5452db59b683487867ba562b950708a
we need:
- select DMA_NONCOHERENT_OPS
+ select DMA_DIRECT_OPS
I'll fixup it in my repo.
> From 63c3b24e661e6cad88f0432dd460d35a16741871 Mon Sep 17 00:00:00 2001
> From: Mike Rapoport
> Date: Wed, 26 Sep 2018 13:40:13 +0300
> Subject: [PATCH] csky: fixups after bootmem removal
>
> The bootmem removal patchest didn't take into account csky architecture and
> it still had bootmem leftovers. Remove them now.
>
> Signed-off-by: Mike Rapoport
> ---
> arch/csky/Kconfig| 1 -
> arch/csky/kernel/setup.c | 1 -
> arch/csky/mm/highmem.c | 4 ++--
> arch/csky/mm/init.c | 3 +--
> 4 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig
> index fb2a0ae..fc25ea6 100644
> --- a/arch/csky/Kconfig
> +++ b/arch/csky/Kconfig
> @@ -35,7 +35,6 @@ config CSKY
> select HAVE_C_RECORDMCOUNT
> select HAVE_DMA_API_DEBUG
> select HAVE_DMA_CONTIGUOUS
> - select HAVE_MEMBLOCK
> select MAY_HAVE_SPARSE_IRQ
> select MODULES_USE_ELF_RELA if MODULES
> select OF
> diff --git a/arch/csky/kernel/setup.c b/arch/csky/kernel/setup.c
> index 27f9e10..bee4d26 100644
> --- a/arch/csky/kernel/setup.c
> +++ b/arch/csky/kernel/setup.c
> @@ -3,7 +3,6 @@
>
> #include
> #include
> -#include
> #include
> #include
> #include
> diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
> index 149921a..5b90501 100644
> --- a/arch/csky/mm/highmem.c
> +++ b/arch/csky/mm/highmem.c
> @@ -4,7 +4,7 @@
> #include
> #include
> #include
> -#include
> +#include
> #include
> #include
> #include
> @@ -138,7 +138,7 @@ static void __init fixrange_init (unsigned long start,
> unsigned long end,
> pmd = (pmd_t *)pud;
> for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++,
> k++) {
> if (pmd_none(*pmd)) {
> - pte = (pte_t *)
> alloc_bootmem_low_pages(PAGE_SIZE);
> + pte = (pte_t *)
> memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);
> set_pmd(pmd, __pmd(__pa(pte)));
> BUG_ON(pte != pte_offset_kernel(pmd,
> 0));
> }
> diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c
> index fd2791b..46c5aaa 100644
> --- a/arch/csky/mm/init.c
> +++ b/arch/csky/mm/init.c
> @@ -14,7 +14,6 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -44,7 +43,7 @@ void __init mem_init(void)
> #endif
> high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
>
> - free_all_bootmem();
> + memblock_free_all();
>
> #ifdef CONFIG_HIGHMEM
> for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
The patch looks good for me.
Thx
Guo Ren
Re: [PATCH V5 17/30] csky: Misc headers
On Tue, Sep 25, 2018 at 12:45:41PM +0200, Peter Zijlstra wrote:
> On Tue, Sep 25, 2018 at 12:08:03PM +0200, Andrea Parri wrote:
> > Hi Guo,
> >
> > > +/*
> > > + * set_bit - Atomically set a bit in memory
> > > + * @nr: the bit to set
> > > + * @addr: the address to start counting from
> > > + *
> > > + * This function is atomic and may not be reordered. See __set_bit()
> > > + * if you do not require the atomic guarantees.
> > > + *
> > > + * Note: there are no guarantees that this function will not be reordered
> > > + * on non x86 architectures, so if you are writing portable code,
> > > + * make sure not to rely on its reordering guarantees.
> > > + *
> > > + * Note that @nr may be almost arbitrarily large; this function is not
> > > + * restricted to acting on a single-word quantity.
> > > + */
> > > +static inline void set_bit(int nr, volatile unsigned long *addr)
> > > +{
> > > + unsigned long mask = BIT_MASK(nr);
> > > + unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
> > > + unsigned long tmp;
> > > +
> > > + /* *p |= mask; */
> > > + smp_mb();
> > > + asm volatile (
> > > + "1: ldex.w %0, (%2)\n"
> > > + " or32%0, %0, %1 \n"
> > > + " stex.w %0, (%2)\n"
> > > + " bez %0, 1b \n"
> > > + : "=&r"(tmp)
> > > + : "r"(mask), "r"(p)
> > > + : "memory");
> > > + smp_mb();
> > > +}
> > > +
> > > +/**
> > > + * clear_bit - Clears a bit in memory
> > > + * @nr: Bit to clear
> > > + * @addr: Address to start counting from
> > > + *
> > > + * clear_bit() is atomic and may not be reordered. However, it does
> > > + * not contain a memory barrier, so if it is used for locking purposes,
> > > + * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic()
> > > + * in order to ensure changes are visible on other processors.
> > > + */
> > > +static inline void clear_bit(int nr, volatile unsigned long *addr)
> > > +{
> > > + unsigned long mask = BIT_MASK(nr);
> > > + unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
> > > + unsigned long tmp;
> > > +
> > > + /* *p &= ~mask; */
> > > + mask = ~mask;
> > > + smp_mb();
> > > + asm volatile (
> > > + "1: ldex.w %0, (%2)\n"
> > > + " and32 %0, %0, %1 \n"
> > > + " stex.w %0, (%2)\n"
> > > + " bez %0, 1b \n"
> > > + : "=&r"(tmp)
> > > + : "r"(mask), "r"(p)
> > > + : "memory");
> > > + smp_mb();
> > > +}
> > > +
> > > +/**
> > > + * change_bit - Toggle a bit in memory
> > > + * @nr: Bit to change
> > > + * @addr: Address to start counting from
> > > + *
> > > + * change_bit() is atomic and may not be reordered. It may be
> > > + * reordered on other architectures than x86.
> > > + * Note that @nr may be almost arbitrarily large; this function is not
> > > + * restricted to acting on a single-word quantity.
> > > + */
> > > +static inline void change_bit(int nr, volatile unsigned long *addr)
> > > +{
> > > + unsigned long mask = BIT_MASK(nr);
> > > + unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
> > > + unsigned long tmp;
> > > +
> > > + /* *p ^= mask; */
> > > + smp_mb();
> > > + asm volatile (
> > > + "1: ldex.w %0, (%2)\n"
> > > + " xor32 %0, %0, %1 \n"
> > > + " stex.w %0, (%2)\n"
> > > + " bez %0, 1b \n"
> > > + : "=&r"(tmp)
> > > + : "r"(mask), "r"(p)
> > > + : "memory");
> > > + smp_mb();
> > > +}
> >
> > The {set,clear,change}_bit() operations don't have to be ordered: you
> > might want to remove the above smp_mb()s (and adjust the comments).
I confused it with cmpxchg, seems cmpxchg need smp_mb() before&after.
See: https://lkml.org/lkml/2018/7/6/383
> Better yet, you can entirely delete all that and use
> asm-generic/bitops/atomic.h instead.
Yes, approve. Seems I only need care about asm/atomic.h, it's good for
me.
Best Regards
Guo Ren
Re: [PATCH V5 06/30] csky: Cache and TLB routines
On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote:
> On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote:
> > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h
> > b/arch/csky/abiv1/inc/abi/cacheflush.h
> > new file mode 100644
> > index 000..f0de49c
> > --- /dev/null
> > +++ b/arch/csky/abiv1/inc/abi/cacheflush.h
> > @@ -0,0 +1,43 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
> > +
> > +#ifndef __ABI_CSKY_CACHEFLUSH_H
> > +#define __ABI_CSKY_CACHEFLUSH_H
> > +
> > +#include
> > +#include
> > +#include
> > +
> > +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
> > +extern void flush_dcache_page(struct page *);
> > +
> > +#define flush_cache_mm(mm) cache_wbinv_all()
> > +#define flush_cache_page(vma,page,pfn) cache_wbinv_all()
> > +#define flush_cache_dup_mm(mm) cache_wbinv_all()
> > +
> > +#define flush_cache_range(mm,start,end)cache_wbinv_range(start, end)
> ^^^ should be vma
Yes, I'll change it to:
#define flush_cache_range(mm,start,end) cache_wbinv_all()
I'll improve it later after test.
>
> > +#endif /* __ABI_CSKY_CACHEFLUSH_H */
>
>
> > diff --git a/arch/csky/abiv1/inc/abi/tlb.h b/arch/csky/abiv1/inc/abi/tlb.h
> > new file mode 100644
> > index 000..6d461f3
> > --- /dev/null
> > +++ b/arch/csky/abiv1/inc/abi/tlb.h
> > @@ -0,0 +1,12 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
> > +
> > +#ifndef __ABI_CSKY_TLB_H
> > +#define __ABI_CSKY_TLB_H
> > +
> > +#define tlb_start_vma(tlb, vma) \
> > + do { \
> > + if (!tlb->fullmm) \
> > + cache_wbinv_all(); \
> > + } while (0)
> > +#endif /* __ABI_CSKY_TLB_H */
>
> That should be:
>
> if (!tlb->fullmm)
> flush_cache_range(vma, vma->vm_start, vma->vm_end);
>
> Because as per the whole abiv1 vs abiv2, you don't need write back
> invalidation for v2 at all, also, you only need to invalidate the vma
> range, no reason to shoot everything down.
>
> Also, I'll be shortly removing this:
>
> https://lkml.kernel.org/r/20180913092812.071989...@infradead.org
Ok, I'll follow the rules.
>
> > diff --git a/arch/csky/abiv2/inc/abi/cacheflush.h
> > b/arch/csky/abiv2/inc/abi/cacheflush.h
> > new file mode 100644
> > index 000..756beb7
> > --- /dev/null
> > +++ b/arch/csky/abiv2/inc/abi/cacheflush.h
> > @@ -0,0 +1,40 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +
> > +#ifndef __ABI_CSKY_CACHEFLUSH_H
> > +#define __ABI_CSKY_CACHEFLUSH_H
> > +
> > +/* Keep includes the same across arches. */
> > +#include
> > +
> > +/*
> > + * The cache doesn't need to be flushed when TLB entries change when
> > + * the cache is mapped to physical memory, not virtual memory
> > + */
> > +#define flush_cache_all() do { } while (0)
> > +#define flush_cache_mm(mm) do { } while (0)
> > +#define flush_cache_dup_mm(mm) do { } while (0)
> > +#define flush_cache_range(vma, start, end) do { } while (0)
> ^^^ like here..
#define flush_cache_range(vma, start, end) \
do { \
if (vma->vm_flags & VM_EXEC) \
icache_inv_all(); \
}
Hmm ?
I'll improve it later after test.
Best Regards
Guo Ren
Re: [PATCH V5 06/30] csky: Cache and TLB routines
On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote:
> On Thu, Sep 27, 2018 at 01:27:38PM +0800, Guo Ren wrote:
> > On Tue, Sep 25, 2018 at 09:24:07AM +0200, Peter Zijlstra wrote:
> > > On Mon, Sep 24, 2018 at 10:36:22PM +0800, Guo Ren wrote:
> > > > diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h
> > > > b/arch/csky/abiv1/inc/abi/cacheflush.h
> > > > new file mode 100644
> > > > index 000..f0de49c
> > > > --- /dev/null
> > > > +++ b/arch/csky/abiv1/inc/abi/cacheflush.h
>
> > > > +#define flush_cache_range(mm,start,end)
> > > > cache_wbinv_range(start, end)
> > > ^^^ should be vma
> > Yes, I'll change it to:
> > #define flush_cache_range(mm,start,end) cache_wbinv_all()
> >
> > I'll improve it later after test.
>
> That's not what I meant; I meant you need something like:
>
> #define flush_cache_range(vma, start, end) cache_wbinv_range(start, end)
If you remove the tlb_start_vma in my tlb.h, I want to use cache_wbinv_all() is
more safe. And I'll improve it in future.
My cache_wbinv_range(start, end) won't care vma->mm's asid and they just use
current
asid in mmu reg. If current_mm != vma->mm, then flush_cache_range will be
broken.
Perhaps, I need improve flush_cache_range first ...
>
> The first argument is a vma, not an mm.
Yes, vma! My fault :-P
> > > Also, I'll be shortly removing this:
> > >
> > > https://lkml.kernel.org/r/20180913092812.071989...@infradead.org
> > Ok, I'll follow the rules.
>
>
> > > > diff --git a/arch/csky/abiv2/inc/abi/cacheflush.h
> > > > b/arch/csky/abiv2/inc/abi/cacheflush.h
> > > > new file mode 100644
> > > > index 000..756beb7
> > > > --- /dev/null
> > > > +++ b/arch/csky/abiv2/inc/abi/cacheflush.h
> > > > @@ -0,0 +1,40 @@
>
> > > > +#define flush_cache_range(vma, start, end) do { } while (0)
> > > ^^^ like here..
> > #define flush_cache_range(vma, start, end) \
> > do { \
> > if (vma->vm_flags & VM_EXEC) \
> > icache_inv_all(); \
> > }
> >
> > Hmm ?
> >
>
> For v2, which IIUC is PIPT (as opposed to v1 which is VIPT), what you
> had was correct.
I'll improve icache_inv_all() with flush_range() in future.
>
> I was merely pointing out that the flush_cache_range() definition was
> inconsitent between v1 and v2; v1 using @mm and v2 using @vma for the
> first argument.
Must be vma, you are right. And I know it's a vma in mind, but fault in
code. Thx for your review.
Best Regards
Guo Ren
Re: [PATCH V5 06/30] csky: Cache and TLB routines
On Thu, Sep 27, 2018 at 11:01:34AM +0200, Peter Zijlstra wrote: > On Thu, Sep 27, 2018 at 04:11:42PM +0800, Guo Ren wrote: > > On Thu, Sep 27, 2018 at 09:08:59AM +0200, Peter Zijlstra wrote: > > > > That's not what I meant; I meant you need something like: > > > > > > #define flush_cache_range(vma, start, end) cache_wbinv_range(start, end) > > If you remove the tlb_start_vma in my tlb.h, I want to use > > cache_wbinv_all() is > > more safe. And I'll improve it in future. > > > > My cache_wbinv_range(start, end) won't care vma->mm's asid and they just > > use current > > asid in mmu reg. If current_mm != vma->mm, then flush_cache_range will be > > broken. > > Perhaps, I need improve flush_cache_range first ... > > Ah, ok. In that case I'll leave it to you to either use > cache_wbinv_all() or improve the range flush. My only request would to > stick on a comment to explain the reason you're not using > cache_wbinv_range() if you choose to use cache_wbinv_all() for > flush_cache_range(). Ok, the comment is necessary and I'll do it in next patchset. Best Regards Guo Ren
Re: [PATCH] csky: fixups after bootmem removal
Hi Christoph,
Don't forget arch/csky for the patch:
dma-mapping: merge direct and noncoherent ops.
arch/csky/Kconfig
- select DMA_NONCOHERENT_OPS
+ select DMA_DIRECT_OPS
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=bc3ec75de5452db59b683487867ba562b950708a
Thx!
Guo Ren
On Wed, Sep 26, 2018 at 02:27:45PM +0300, Mike Rapoport wrote:
> Hi,
>
> The below patch fixes the bootmem leftovers in csky. It is based on the
> current mmots and csky build there fails because of undefined reference to
> dma_direct_ops:
>
> MODPOST vmlinux.o
> kernel/dma/mapping.o: In function `dmam_alloc_attrs':
> kernel/dma/mapping.c:143: undefined reference to `dma_direct_ops'
> kernel/dma/mapping.o: In function `dmam_declare_coherent_memory':
> kernel/dma/mapping.c:184: undefined reference to `dma_direct_ops'
> mm/dmapool.o: In function `dma_free_attrs':
> include/linux/dma-mapping.h:558: undefined reference to `dma_direct_ops'
>
> I've blindly added "select DMA_DIRECT_OPS" to arch/csky/Kconfig and it
> fixed the build, but I really have no idea if this the right thing to do...
>
> From 63c3b24e661e6cad88f0432dd460d35a16741871 Mon Sep 17 00:00:00 2001
> From: Mike Rapoport
> Date: Wed, 26 Sep 2018 13:40:13 +0300
> Subject: [PATCH] csky: fixups after bootmem removal
>
> The bootmem removal patchest didn't take into account csky architecture and
> it still had bootmem leftovers. Remove them now.
>
> Signed-off-by: Mike Rapoport
> ---
> arch/csky/Kconfig| 1 -
> arch/csky/kernel/setup.c | 1 -
> arch/csky/mm/highmem.c | 4 ++--
> arch/csky/mm/init.c | 3 +--
> 4 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig
> index fb2a0ae..fc25ea6 100644
> --- a/arch/csky/Kconfig
> +++ b/arch/csky/Kconfig
> @@ -35,7 +35,6 @@ config CSKY
> select HAVE_C_RECORDMCOUNT
> select HAVE_DMA_API_DEBUG
> select HAVE_DMA_CONTIGUOUS
> - select HAVE_MEMBLOCK
> select MAY_HAVE_SPARSE_IRQ
> select MODULES_USE_ELF_RELA if MODULES
> select OF
> diff --git a/arch/csky/kernel/setup.c b/arch/csky/kernel/setup.c
> index 27f9e10..bee4d26 100644
> --- a/arch/csky/kernel/setup.c
> +++ b/arch/csky/kernel/setup.c
> @@ -3,7 +3,6 @@
>
> #include
> #include
> -#include
> #include
> #include
> #include
> diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
> index 149921a..5b90501 100644
> --- a/arch/csky/mm/highmem.c
> +++ b/arch/csky/mm/highmem.c
> @@ -4,7 +4,7 @@
> #include
> #include
> #include
> -#include
> +#include
> #include
> #include
> #include
> @@ -138,7 +138,7 @@ static void __init fixrange_init (unsigned long start,
> unsigned long end,
> pmd = (pmd_t *)pud;
> for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++,
> k++) {
> if (pmd_none(*pmd)) {
> - pte = (pte_t *)
> alloc_bootmem_low_pages(PAGE_SIZE);
> + pte = (pte_t *)
> memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);
> set_pmd(pmd, __pmd(__pa(pte)));
> BUG_ON(pte != pte_offset_kernel(pmd,
> 0));
> }
> diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c
> index fd2791b..46c5aaa 100644
> --- a/arch/csky/mm/init.c
> +++ b/arch/csky/mm/init.c
> @@ -14,7 +14,6 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -44,7 +43,7 @@ void __init mem_init(void)
> #endif
> high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
>
> - free_all_bootmem();
> + memblock_free_all();
>
> #ifdef CONFIG_HIGHMEM
> for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
> --
> 2.7.4
>
> --
> Sincerely yours,
> Mike.
[PATCH V6 02/33] csky: defconfig
This patch adds csky defconfig. Signed-off-by: Guo Ren --- arch/csky/configs/defconfig | 61 + 1 file changed, 61 insertions(+) create mode 100644 arch/csky/configs/defconfig diff --git a/arch/csky/configs/defconfig b/arch/csky/configs/defconfig new file mode 100644 index 000..7ef4289 --- /dev/null +++ b/arch/csky/configs/defconfig @@ -0,0 +1,61 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_DEFAULT_HOSTNAME="csky" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_DEFAULT_DEADLINE=y +CONFIG_CPU_CK807=y +CONFIG_CPU_HAS_FPU=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_TTY_PRINTK=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_CSKY_MPTIMER=y +CONFIG_GX6605S_TIMER=y +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_GENERIC_PHY=y +CONFIG_EXT4_FS=y +CONFIG_FANOTIFY=y +CONFIG_QUOTA=y +CONFIG_FSCACHE=m +CONFIG_FSCACHE_STATS=y +CONFIG_CACHEFILES=m +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_UTF8=y +CONFIG_NTFS_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_CHILDREN=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_CONFIGFS_FS=y +CONFIG_CRAMFS=y +CONFIG_ROMFS_FS=y +CONFIG_NFS_FS=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y -- 2.7.4
[PATCH V6 01/33] csky: Build infrastructure
This patch adds Makefile, Kconfig for build infrastructure. Signed-off-by: Guo Ren --- arch/csky/Kconfig | 204 + arch/csky/Kconfig.debug| 8 ++ arch/csky/Makefile | 92 +++ arch/csky/abiv1/Makefile | 8 ++ arch/csky/abiv2/Makefile | 10 ++ arch/csky/boot/Makefile| 24 arch/csky/boot/dts/Makefile| 13 +++ arch/csky/boot/dts/include/dt-bindings | 1 + arch/csky/include/asm/Kbuild | 69 +++ arch/csky/include/uapi/asm/Kbuild | 33 ++ arch/csky/kernel/Makefile | 8 ++ arch/csky/lib/Makefile | 1 + arch/csky/mm/Makefile | 13 +++ 13 files changed, 484 insertions(+) create mode 100644 arch/csky/Kconfig create mode 100644 arch/csky/Kconfig.debug create mode 100644 arch/csky/Makefile create mode 100644 arch/csky/abiv1/Makefile create mode 100644 arch/csky/abiv2/Makefile create mode 100644 arch/csky/boot/Makefile create mode 100644 arch/csky/boot/dts/Makefile create mode 12 arch/csky/boot/dts/include/dt-bindings create mode 100644 arch/csky/include/asm/Kbuild create mode 100644 arch/csky/include/uapi/asm/Kbuild create mode 100644 arch/csky/kernel/Makefile create mode 100644 arch/csky/lib/Makefile create mode 100644 arch/csky/mm/Makefile diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig new file mode 100644 index 000..fe2c94b --- /dev/null +++ b/arch/csky/Kconfig @@ -0,0 +1,204 @@ +config CSKY + def_bool y + select ARCH_HAS_SYNC_DMA_FOR_CPU + select ARCH_HAS_SYNC_DMA_FOR_DEVICE + select ARCH_USE_BUILTIN_BSWAP + select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2 + select COMMON_CLK + select CLKSRC_MMIO + select CLKSRC_OF + select DMA_NONCOHERENT_OPS + select IRQ_DOMAIN + select HANDLE_DOMAIN_IRQ + select DW_APB_TIMER_OF + select GENERIC_LIB_ASHLDI3 + select GENERIC_LIB_ASHRDI3 + select GENERIC_LIB_LSHRDI3 + select GENERIC_LIB_MULDI3 + select GENERIC_LIB_CMPDI2 + select GENERIC_LIB_UCMPDI2 + select GENERIC_ALLOCATOR + select GENERIC_ATOMIC64 + select GENERIC_CLOCKEVENTS + select GENERIC_CPU_DEVICES + select GENERIC_IRQ_CHIP + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_IRQ_MULTI_HANDLER + select GENERIC_SCHED_CLOCK + select GENERIC_SMP_IDLE_THREAD + select HAVE_ARCH_TRACEHOOK + select HAVE_GENERIC_DMA_COHERENT + select HAVE_KERNEL_GZIP + select HAVE_KERNEL_LZO + select HAVE_KERNEL_LZMA + select HAVE_C_RECORDMCOUNT + select HAVE_DMA_API_DEBUG + select HAVE_DMA_CONTIGUOUS + select HAVE_MEMBLOCK + select MAY_HAVE_SPARSE_IRQ + select MODULES_USE_ELF_RELA if MODULES + select NO_BOOTMEM + select OF + select OF_EARLY_FLATTREE + select OF_RESERVED_MEM + select PERF_USE_VMALLOC + select RTC_LIB + select TIMER_OF + select USB_ARCH_HAS_EHCI + select USB_ARCH_HAS_OHCI + +config CPU_HAS_CACHEV2 + bool + +config CPU_HAS_FPUV2 + bool + +config CPU_HAS_HILO + bool + +config CPU_HAS_TLBI + bool + +config CPU_HAS_LDSTEX + bool + help + For SMP, CPU needs "ldex&stex" instrcutions to atomic operations. + +config CPU_NEED_TLBSYNC + bool + +config CPU_NEED_SOFTALIGN + bool + +config CPU_NO_USER_BKPT + bool + help + For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because + abiv2 is 16/32bit instruction set and "trap 1" is 32bit. + So we need a 16bit instruction as user space bkpt, and it will cause an illegal + instruction exception. + In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. + +config GENERIC_CALIBRATE_DELAY + def_bool y + +config GENERIC_CSUM + def_bool y + +config GENERIC_HWEIGHT + def_bool y + +config MMU + def_bool y + +config RWSEM_GENERIC_SPINLOCK + def_bool y + +config TIME_LOW_RES + def_bool y + +config TRACE_IRQFLAGS_SUPPORT + def_bool y + +config CPU_TLB_SIZE + int + default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810) + default "1024" if (CPU_CK860) + +config CPU_ASID_BITS + int + default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) + default "12"if (CPU_CK860) + +config L1_CACHE_SHIFT + int + default "4" if (CPU_CK610) + default "5" if (CPU_CK807 || CPU_CK810) + default "6" if (CPU_CK860) + +menu "Processor type and features" + +choice + prompt "CPU MODEL" + default CPU_CK860 + +config CPU_CK610 + bool "CSKY C
[PATCH V6 00/33] C-SKY(csky) Linux Kernel Port
cheline flush when start isn't cacheline-aligned. 4e82c8d csky: use tlbi.alls for ck860 smp temporary. ae7149e csky: bugfix use kmap_atomic() to prevent no mapped addr. 5538795 csky: bugfix user access in kernel space. a7aa591 csky: add 16bit user space bkpt. 0de70ec csky: add sync.is for cmpxchg in SMP. c5c08a1 csky: seperate sync.is and sync for SMP and Non-SMP. dbbf4dc csky: use sync.is for ck860 mb(). f33f8da csky: rewrite the alignment implement. 68152c7 csky: bugfix alignment pt_regs error. d618d43 csky: support set_affinity for irq balance in SMP ebf86c9 csky: bugfix compile error without CONFIG_SMP. 8537eea csky: remove debug code. 4ebc051 csky: bugfix compile error with linux-4.9.56 75a938e csky: C-SKY SMP supported. 0eebc07 csky: use internal function for map_sg. 3d29751 csky: bugfix can't support highmem b545d2a csky: bugfix r26 is the link reg for jsri_to_jsr. 9e3313a csky: bugfix sync tls for abiv1 in ptrace. 587a0d2 csky: use __NR_rt_sigreturn in asm-generic. f562b46 csky: bugfix gpr_set & fpr_set f57266f csky: bugfix fpu_fpe_helper excute mtcr mfcr. c676669 csky: bugfix ave is default enable on reset. d40d34d csky: remove unused sc_mask in sigcontext.h. 274b7a2 csky: redesign the signal's api 7501771 csky: bugfix forget restore usp. 923e2ca csky: re-struct the pt_regs for regset. 2a1e499 csky: fixup config. ada81ec csky: bugfix abiv1 compile error. e34acb9 csky: bugfix abiv1 couldn't support -mno-stack-size. ec53560 csky: change irq map, reserve soft_irq&private_irq space. c7576f7 csky: bugfix modpost warning with -mno-stack-size c8ff9d4 csky: support csky mp timer alpha version. deabaaf csky: update .gitignore. 574815c csky: bugfix compile error with abiv1 in 4.15 0b426a7 csky: bugfix format of cpu verion id. 083435f csky: irq-csky-v2 alpha init. 21209e5 csky: add .gitignore 73e19b4 csky: remove FMFS_FPU_REGS/FMTS_FPU_REGS 07e8fac csky: add fpu regset in ptrace.c cac779d csky: add CSKY_VECIRQ_LEGENCY for SOC bug. 54bab1d csky: move usp into pt_regs. b167422 csky: support regset for ptrace. a098d4c csky: remove ARCH_WANT_IPC_PARSE_VERSION fe61a84 csky: add timer-of support. 27702e2 csky: bugfix boot error. ebe3edb csky: bugfix gx6605s boot failed - add __HEAD to head.section for head.S - move INIT_SECTION together to fix compile warning. 7138cae csky: coding convension for timer-nationalchip.c fa7f9bb csky: use ffs instead of fls. ddc9e81 csky: change to generic irq chip for irq-csky.c e9be8b9 irqchip: add generic irq chip for irq-nationalchip 2ee83fe csky: add set_handle_irq(), ref from openrisc & arm. 74181d6 csky: use irq_domain_add_linear instead of leagcy. fa45ae4 csky: bugfix setup stroge order for uncached. eb8030f csky: add HIGHMEM config in Kconfig 4f983d4 csky: remove "default n" in Kconfig 2467575 csky: use asm-generic/signal.h 77438e5 csky: coding conventions for irq.c 2e4a2b4 csky: optimize the cache flush ops. 96e1c58 csky: add CONFIG_CPU_ASID_BITS. 9339666 csky: add cprcr() cpwcr() for abiv1 ff05be4 csky: add THREAD_SHIFT define in asm/page.h 52ab022 csky: add mfcr() mtcr() in asm/reg_ops.h bdcd8f3 csky: revert back Kconfig select. 590c7e6 csky: bugfix compile error with CONFIG_AUDIT 1989292 csky: revert some back with cleanup unistd.h f1454fe csky: cleanup unistd.h 5d2985f csky: cleanup Kconfig and Makefile. 423d97e csky: cancel subdirectories cae2af4 csky: use asm-generic/fcntl.h Guo Ren (33): csky: Build infrastructure csky: defconfig csky: Kernel booting csky: Exception handling and mm-fault csky: System Call csky: Cache and TLB routines csky: MMU and page table management csky: Process management and Signal csky: VDSO and rt_sigreturn csky: IRQ handling csky: Atomic operations csky: ELF and module probe csky: Library functions csky: User access csky: Debug and Ptrace GDB csky: SMP support csky: Misc headers dt-bindings: csky CPU Bindings dt-bindings: Add vendor prefix for csky csky/dma: fix up dma_mapping error csky: remove irq_mapping from smp.c irqchip: add C-SKY SMP interrupt controller dt-bindings: interrupt-controller: C-SKY SMP intc clocksource: add C-SKY SMP timer dt-bindings: timer: C-SKY Multi-processor timer MAINTAINERS: Add csky dt-bindings: interrupt-controller: C-SKY APB intc irqchip: add C-SKY APB bus interrupt controller dt-bindings: timer: gx6605s SOC timer clocksource: add gx6605s SOC system timer csky: fix compile error in linux/bug.h with SMP enabled csky: fix flush_cache_range and tlb_start_vma csky: use asm-generic/bitops/atomic.h for all Documentation/devicetree/bindings/csky/cpus.txt| 70 .../interrupt-controller/csky,apb-intc.txt | 62 .../bindings/interrupt-controller/csky,mpintc.txt | 40 +++ .../bindings/timer/csky,gx6605s-timer.txt | 42 +++ .../devicetree/bindings/timer/csky,mptimer.txt | 46 +++ .../devicetree/bindings/vendor-prefixes.txt| 1 + MAINTAINERS
[PATCH V6 03/33] csky: Kernel booting
This patch add boot code. Thx boot params is all in dtb and it's
the only way to let kernel get bootloader param information.
Signed-off-by: Guo Ren
---
arch/csky/kernel/head.S| 78 +
arch/csky/kernel/setup.c | 151 +
arch/csky/kernel/vmlinux.lds.S | 64 +
3 files changed, 293 insertions(+)
create mode 100644 arch/csky/kernel/head.S
create mode 100644 arch/csky/kernel/setup.c
create mode 100644 arch/csky/kernel/vmlinux.lds.S
diff --git a/arch/csky/kernel/head.S b/arch/csky/kernel/head.S
new file mode 100644
index 000..80bb9c6
--- /dev/null
+++ b/arch/csky/kernel/head.S
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+
+__HEAD
+ENTRY(_start)
+ /* set super user mode */
+ lrw a3, DEFAULT_PSR_VALUE
+ mtcra3, psr
+ psrset ee
+
+ SETUP_MMU a3
+
+ /* set stack point */
+ lrw a3, init_thread_union + THREAD_SIZE
+ mov sp, a3
+
+ jmpicsky_start
+END(_start)
+
+#ifdef CONFIG_SMP
+.align 10
+ENTRY(_start_smp_secondary)
+ /* Invalid I/Dcache BTB BHT */
+ movia3, 7
+ lslia3, 16
+ addia3, (1<<4) | 3
+ mtcra3, cr17
+
+ tlbi.alls
+
+ /* setup PAGEMASK */
+ movia3, 0
+ mtcra3, cr<6, 15>
+
+ /* setup MEL0/MEL1 */
+ grs a0, _start_smp_pc
+_start_smp_pc:
+ bmaski a1, 13
+ andna0, a1
+ movia1, 0x0006
+ movia2, 0x1006
+ or a1, a0
+ or a2, a0
+ mtcra1, cr<2, 15>
+ mtcra2, cr<3, 15>
+
+ /* setup MEH */
+ mtcra0, cr<4, 15>
+
+ /* write TLB */
+ bgeni a3, 28
+ mtcra3, cr<8, 15>
+
+ SETUP_MMU a3
+
+ /* enable MMU */
+ movia3, 1
+ mtcra3, cr18
+
+ jmpi_goto_mmu_on
+_goto_mmu_on:
+ lrw a3, DEFAULT_PSR_VALUE
+ mtcra3, psr
+ psrset ee
+
+ /* set stack point */
+ lrw a3, secondary_stack
+ ld.wa3, (a3, 0)
+ mov sp, a3
+
+ jmpicsky_start_secondary
+END(_start_smp_secondary)
+#endif
diff --git a/arch/csky/kernel/setup.c b/arch/csky/kernel/setup.c
new file mode 100644
index 000..27f9e10
--- /dev/null
+++ b/arch/csky/kernel/setup.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+phys_addr_t __init_memblock memblock_end_of_REG0(void)
+{
+ return (memblock.memory.regions[0].base +
memblock.memory.regions[0].size);
+}
+
+phys_addr_t __init_memblock memblock_start_of_REG1(void)
+{
+ return memblock.memory.regions[1].base;
+}
+
+size_t __init_memblock memblock_size_of_REG1(void)
+{
+ return memblock.memory.regions[1].size;
+}
+
+static void __init csky_memblock_init(void)
+{
+ unsigned long zone_size[MAX_NR_ZONES];
+ unsigned long zhole_size[MAX_NR_ZONES];
+ signed long size;
+
+ memblock_reserve(__pa(_stext), _end - _stext);
+#ifdef CONFIG_BLK_DEV_INITRD
+ memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
+#endif
+
+ early_init_fdt_reserve_self();
+ early_init_fdt_scan_reserved_mem();
+
+ memblock_dump_all();
+
+ memset(zone_size, 0, sizeof(zone_size));
+ memset(zhole_size, 0, sizeof(zhole_size));
+
+ min_low_pfn = PFN_UP(memblock_start_of_DRAM());
+ max_pfn = PFN_DOWN(memblock_end_of_DRAM());
+
+ max_low_pfn = PFN_UP(memblock_end_of_REG0());
+ if (max_low_pfn == 0)
+ max_low_pfn = max_pfn;
+
+ size = max_pfn - min_low_pfn;
+
+ if (memblock.memory.cnt > 1) {
+ zone_size[ZONE_NORMAL] = PFN_DOWN(memblock_start_of_REG1()) -
min_low_pfn;
+ zhole_size[ZONE_NORMAL] = PFN_DOWN(memblock_start_of_REG1()) -
max_low_pfn;
+ } else {
+ if (size <= PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET))
+ zone_size[ZONE_NORMAL] = max_pfn - min_low_pfn;
+ else {
+ zone_size[ZONE_NORMAL] = PFN_DOWN(LOWMEM_LIMIT -
PHYS_OFFSET_OFFSET);
+ max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
+ }
+ }
+
+#ifdef CONFIG_HIGHMEM
+ size = 0;
+ if(memblock.memory.cnt > 1) {
+ size = PFN_DOWN(memblock_size_of_REG1());
+ highstart_pfn = PFN_DOWN(memblock_start_of_REG1());
+ } else {
+ size = max_pfn - min_low_pfn - PFN_DOWN(LOWMEM_LIMIT -
PHYS_OFFSET_OFFSET);
+ highstart_pfn = min_low_pfn + PFN_DOWN(LOWMEM_LIMIT -
PHYS_OFFSET_OFFSET);
+ }
+
+ if
[PATCH V6 06/33] csky: Cache and TLB routines
This patch adds cache and tlb sync codes for abiv1 & abiv2.
Signed-off-by: Guo Ren
---
arch/csky/abiv1/cacheflush.c | 51
arch/csky/abiv1/inc/abi/cacheflush.h | 43 +++
arch/csky/abiv1/inc/abi/tlb.h | 12 ++
arch/csky/abiv2/cacheflush.c | 59 ++
arch/csky/abiv2/inc/abi/cacheflush.h | 40 +++
arch/csky/abiv2/inc/abi/tlb.h | 13 ++
arch/csky/include/asm/barrier.h | 45 +++
arch/csky/include/asm/cache.h | 28 +
arch/csky/include/asm/cacheflush.h| 9 ++
arch/csky/include/asm/io.h| 24
arch/csky/include/asm/tlb.h | 20
arch/csky/include/asm/tlbflush.h | 23
arch/csky/include/uapi/asm/cachectl.h | 14 +++
arch/csky/mm/cachev1.c| 127
arch/csky/mm/cachev2.c| 80 +
arch/csky/mm/syscache.c | 29 +
arch/csky/mm/tlb.c| 215 ++
17 files changed, 832 insertions(+)
create mode 100644 arch/csky/abiv1/cacheflush.c
create mode 100644 arch/csky/abiv1/inc/abi/cacheflush.h
create mode 100644 arch/csky/abiv1/inc/abi/tlb.h
create mode 100644 arch/csky/abiv2/cacheflush.c
create mode 100644 arch/csky/abiv2/inc/abi/cacheflush.h
create mode 100644 arch/csky/abiv2/inc/abi/tlb.h
create mode 100644 arch/csky/include/asm/barrier.h
create mode 100644 arch/csky/include/asm/cache.h
create mode 100644 arch/csky/include/asm/cacheflush.h
create mode 100644 arch/csky/include/asm/io.h
create mode 100644 arch/csky/include/asm/tlb.h
create mode 100644 arch/csky/include/asm/tlbflush.h
create mode 100644 arch/csky/include/uapi/asm/cachectl.h
create mode 100644 arch/csky/mm/cachev1.c
create mode 100644 arch/csky/mm/cachev2.c
create mode 100644 arch/csky/mm/syscache.c
create mode 100644 arch/csky/mm/tlb.c
diff --git a/arch/csky/abiv1/cacheflush.c b/arch/csky/abiv1/cacheflush.c
new file mode 100644
index 000..e6650c3
--- /dev/null
+++ b/arch/csky/abiv1/cacheflush.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+void flush_dcache_page(struct page *page)
+{
+ struct address_space *mapping = page_mapping(page);
+ unsigned long addr;
+
+ if (mapping && !mapping_mapped(mapping)) {
+ set_bit(PG_arch_1, &(page)->flags);
+ return;
+ }
+
+ /*
+* We could delay the flush for the !page_mapping case too. But that
+* case is for exec env/arg pages and those are %99 certainly going to
+* get faulted into the tlb (and thus flushed) anyways.
+*/
+ addr = (unsigned long) page_address(page);
+ dcache_wb_range(addr, addr + PAGE_SIZE);
+}
+
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t
*pte)
+{
+ unsigned long addr;
+ struct page *page;
+ unsigned long pfn;
+
+ pfn = pte_pfn(*pte);
+ if (unlikely(!pfn_valid(pfn)))
+ return;
+
+ page = pfn_to_page(pfn);
+ addr = (unsigned long) page_address(page);
+
+ if (vma->vm_flags & VM_EXEC ||
+ pages_do_alias(addr, address & PAGE_MASK))
+ cache_wbinv_all();
+
+ clear_bit(PG_arch_1, &(page)->flags);
+}
diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h
b/arch/csky/abiv1/inc/abi/cacheflush.h
new file mode 100644
index 000..f0de49c
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/cacheflush.h
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ABI_CSKY_CACHEFLUSH_H
+#define __ABI_CSKY_CACHEFLUSH_H
+
+#include
+#include
+#include
+
+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
+extern void flush_dcache_page(struct page *);
+
+#define flush_cache_mm(mm) cache_wbinv_all()
+#define flush_cache_page(vma,page,pfn) cache_wbinv_all()
+#define flush_cache_dup_mm(mm) cache_wbinv_all()
+
+#define flush_cache_range(mm,start,end)cache_wbinv_range(start, end)
+#define flush_cache_vmap(start, end) cache_wbinv_range(start, end)
+#define flush_cache_vunmap(start, end) cache_wbinv_range(start, end)
+
+#define flush_icache_page(vma, page) cache_wbinv_all()
+#define flush_icache_range(start, end) cache_wbinv_range(start, end)
+#define flush_icache_user_range(vma,pg,adr,len)cache_wbinv_range(adr,
adr + len)
+
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+do { \
+ cache_wbinv_all(); \
+ memcpy(dst, src, len); \
+ cache_wbinv_all(); \
+} while(0)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+do { \
+ cache_wbinv_all(); \
+ memcpy(dst, src, len); \
+ cache_wbinv_all(); \
+} while(0)
+
+#define flush_dcache_mmap_lock(mapping)
[PATCH V6 05/33] csky: System Call
This patch adds files related to syscall.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/syscall.h | 69 +
arch/csky/include/asm/syscalls.h| 15
arch/csky/include/uapi/asm/unistd.h | 10 ++
arch/csky/kernel/syscall.c | 42 ++
arch/csky/kernel/syscall_table.c| 14
5 files changed, 150 insertions(+)
create mode 100644 arch/csky/include/asm/syscall.h
create mode 100644 arch/csky/include/asm/syscalls.h
create mode 100644 arch/csky/include/uapi/asm/unistd.h
create mode 100644 arch/csky/kernel/syscall.c
create mode 100644 arch/csky/kernel/syscall_table.c
diff --git a/arch/csky/include/asm/syscall.h b/arch/csky/include/asm/syscall.h
new file mode 100644
index 000..8966739
--- /dev/null
+++ b/arch/csky/include/asm/syscall.h
@@ -0,0 +1,69 @@
+#ifndef __ASM_SYSCALL_H
+#define __ASM_SYSCALL_H
+
+#include
+#include
+#include
+
+static inline int
+syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
+{
+ return regs_syscallid(regs);
+}
+
+static inline void
+syscall_rollback(struct task_struct *task, struct pt_regs *regs)
+{
+ regs->a0 = regs->orig_a0;
+}
+
+static inline long
+syscall_get_error(struct task_struct *task, struct pt_regs *regs)
+{
+ unsigned long error = regs->a0;
+
+ return IS_ERR_VALUE(error) ? error : 0;
+}
+
+static inline long
+syscall_get_return_value(struct task_struct *task, struct pt_regs *regs)
+{
+ return regs->a0;
+}
+
+static inline void
+syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
+int error, long val)
+{
+ regs->a0 = (long) error ?: val;
+}
+
+static inline void
+syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
+ unsigned int i, unsigned int n, unsigned long *args)
+{
+ BUG_ON(i + n > 6);
+ if (i == 0) {
+ args[0] = regs->orig_a0;
+ args++;
+ i++;
+ n--;
+ }
+ memcpy(args, ®s->a1 + i * sizeof(regs->a1), n * sizeof(args[0]));
+}
+
+static inline void
+syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
+ unsigned int i, unsigned int n, const unsigned long *args)
+{
+ BUG_ON(i + n > 6);
+if (i == 0) {
+ regs->orig_a0 = args[0];
+ args++;
+ i++;
+ n--;
+}
+ memcpy(®s->a1 + i * sizeof(regs->a1), args, n * sizeof(regs->a0));
+}
+
+#endif /* __ASM_SYSCALL_H */
diff --git a/arch/csky/include/asm/syscalls.h b/arch/csky/include/asm/syscalls.h
new file mode 100644
index 000..d1e2999
--- /dev/null
+++ b/arch/csky/include/asm/syscalls.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_SYSCALLS_H
+#define __ASM_CSKY_SYSCALLS_H
+
+#include
+
+long sys_cacheflush(void __user *, unsigned long, int);
+
+long sys_set_thread_area(unsigned long addr);
+
+long sys_csky_fadvise64_64(int fd, int advice, loff_t offset, loff_t len);
+
+#endif /* __ASM_CSKY_SYSCALLS_H */
diff --git a/arch/csky/include/uapi/asm/unistd.h
b/arch/csky/include/uapi/asm/unistd.h
new file mode 100644
index 000..6fc1448
--- /dev/null
+++ b/arch/csky/include/uapi/asm/unistd.h
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#define __ARCH_WANT_SYS_CLONE
+#include
+
+#define __NR_set_thread_area (__NR_arch_specific_syscall + 0)
+__SYSCALL(__NR_set_thread_area, sys_set_thread_area)
+#define __NR_cacheflush(__NR_arch_specific_syscall + 4)
+__SYSCALL(__NR_cacheflush, sys_cacheflush)
diff --git a/arch/csky/kernel/syscall.c b/arch/csky/kernel/syscall.c
new file mode 100644
index 000..3f38a28
--- /dev/null
+++ b/arch/csky/kernel/syscall.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+
+SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
+{
+ struct thread_info *ti = task_thread_info(current);
+ struct pt_regs *reg = current_pt_regs();
+
+ reg->tls = addr;
+ ti->tp_value = addr;
+
+ return 0;
+}
+
+SYSCALL_DEFINE6(mmap2,
+ unsigned long, addr,
+ unsigned long, len,
+ unsigned long, prot,
+ unsigned long, flags,
+ unsigned long, fd,
+ off_t, offset)
+{
+ if (unlikely(offset & (~PAGE_MASK >> 12)))
+ return -EINVAL;
+
+ return ksys_mmap_pgoff(addr, len, prot, flags, fd,
+ offset >> (PAGE_SHIFT - 12));
+}
+
+/*
+ * for abiv1 the 64bits args should be even th, So we need mov the advice
forward.
+ */
+SYSCALL_DEFINE4(csky_fadvise64_64,
+ int, fd,
+ int, advice,
+ loff_t, offset,
+ loff_t, len)
+{
+ return ksys_fadvise
[PATCH V6 08/33] csky: Process management and Signal
This patch adds files related to task_switch, sigcontext, signal.
Signed-off-by: Guo Ren
---
arch/csky/abiv2/fpu.c | 281 +
arch/csky/abiv2/inc/abi/fpu.h | 66 ++
arch/csky/include/asm/mmu_context.h | 149 ++
arch/csky/include/asm/processor.h | 121 +++
arch/csky/include/asm/switch_to.h | 36
arch/csky/include/asm/thread_info.h | 75 +++
arch/csky/include/uapi/asm/sigcontext.h | 14 ++
arch/csky/kernel/process.c | 135
arch/csky/kernel/signal.c | 351
arch/csky/kernel/time.c | 11 +
10 files changed, 1239 insertions(+)
create mode 100644 arch/csky/abiv2/fpu.c
create mode 100644 arch/csky/abiv2/inc/abi/fpu.h
create mode 100644 arch/csky/include/asm/mmu_context.h
create mode 100644 arch/csky/include/asm/processor.h
create mode 100644 arch/csky/include/asm/switch_to.h
create mode 100644 arch/csky/include/asm/thread_info.h
create mode 100644 arch/csky/include/uapi/asm/sigcontext.h
create mode 100644 arch/csky/kernel/process.c
create mode 100644 arch/csky/kernel/signal.c
create mode 100644 arch/csky/kernel/time.c
diff --git a/arch/csky/abiv2/fpu.c b/arch/csky/abiv2/fpu.c
new file mode 100644
index 000..8de6b2b
--- /dev/null
+++ b/arch/csky/abiv2/fpu.c
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+
+#define MTCR_MASK 0xFC00FFE0
+#define MFCR_MASK 0xFC00FFE0
+#define MTCR_DIST 0xC0006420
+#define MFCR_DIST 0xC0006020
+
+void __init init_fpu(void)
+{
+ mtcr("cr<1, 2>", 0);
+}
+
+/*
+ * fpu_libc_helper() is to help libc to excute:
+ * - mfcr %a, cr<1, 2>
+ * - mfcr %a, cr<2, 2>
+ * - mtcr %a, cr<1, 2>
+ * - mtcr %a, cr<2, 2>
+ */
+int fpu_libc_helper(struct pt_regs * regs)
+{
+ int fault;
+ unsigned long instrptr, regx = 0;
+ unsigned long index = 0, tmp = 0;
+ unsigned long tinstr = 0;
+ u16 instr_hi, instr_low;
+
+ instrptr = instruction_pointer(regs);
+ if (instrptr & 1) return 0;
+
+ fault = __get_user(instr_low, (u16 *)instrptr);
+ if (fault) return 0;
+
+ fault = __get_user(instr_hi, (u16 *)(instrptr + 2));
+ if (fault) return 0;
+
+ tinstr = instr_hi | ((unsigned long)instr_low << 16);
+
+ if (((tinstr >> 21) & 0x1F) != 2) return 0;
+
+ if ((tinstr & MTCR_MASK) == MTCR_DIST)
+ {
+ index = (tinstr >> 16) & 0x1F;
+ if(index > 13) return 0;
+
+ tmp = tinstr & 0x1F;
+ if (tmp > 2) return 0;
+
+ regx = *(®s->a0 + index);
+
+ if(tmp == 1)
+ mtcr("cr<1, 2>", regx);
+ else if (tmp == 2)
+ mtcr("cr<2, 2>", regx);
+ else
+ return 0;
+
+ regs->pc +=4;
+ return 1;
+ }
+
+ if ((tinstr & MFCR_MASK) == MFCR_DIST) {
+ index = tinstr & 0x1F;
+ if(index > 13) return 0;
+
+ tmp = ((tinstr >> 16) & 0x1F);
+ if (tmp > 2) return 0;
+
+ if (tmp == 1)
+ regx = mfcr("cr<1, 2>");
+ else if (tmp == 2)
+ regx = mfcr("cr<2, 2>");
+ else
+ return 0;
+
+ *(®s->a0 + index) = regx;
+
+ regs->pc +=4;
+ return 1;
+ }
+
+ return 0;
+}
+
+void fpu_fpe(struct pt_regs * regs)
+{
+ int sig;
+ unsigned int fesr;
+ siginfo_t info;
+
+ fesr = mfcr("cr<2, 2>");
+
+ if(fesr & FPE_ILLE){
+ info.si_code = ILL_ILLOPC;
+ sig = SIGILL;
+ }
+ else if(fesr & FPE_IDC){
+ info.si_code = ILL_ILLOPN;
+ sig = SIGILL;
+ }
+ else if(fesr & FPE_FEC){
+ sig = SIGFPE;
+ if(fesr & FPE_IOC){
+ info.si_code = FPE_FLTINV;
+ }
+ else if(fesr & FPE_DZC){
+ info.si_code = FPE_FLTDIV;
+ }
+ else if(fesr & FPE_UFC){
+ info.si_code = FPE_FLTUND;
+ }
+ else if(fesr & FPE_OFC){
+ info.si_code = FPE_FLTOVF;
+ }
+ else if(fesr & FPE_IXC){
+ info.si_code = FPE_FLTRES;
+ }
+ else {
+ info.si_code = NSIGFPE;
+ }
+ }
+ else {
+ info.si_code =
[PATCH V6 07/33] csky: MMU and page table management
This patch adds files related to memory management and here is our
memory-layout:
Fixmap : 0xffc02000 – 0xf000 (4 MB - 12KB)
Pkmap: 0xff80 – 0xffc0 (4 MB)
Vmalloc : 0xf020 – 0xff00 (238 MB)
Lowmem : 0x8000 – 0xc000 (1GB)
- abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem.
- abiv2 CPUs are all PIPT cache and they could support highmem.
Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup
memory page table for it.
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/ckmmu.h| 75 +
arch/csky/abiv1/inc/abi/page.h | 27 +++
arch/csky/abiv1/inc/abi/pgtable-bits.h | 37
arch/csky/abiv1/mmap.c | 66
arch/csky/abiv2/inc/abi/ckmmu.h| 87 ++
arch/csky/abiv2/inc/abi/page.h | 14 ++
arch/csky/abiv2/inc/abi/pgtable-bits.h | 37
arch/csky/include/asm/addrspace.h | 10 ++
arch/csky/include/asm/fixmap.h | 27 +++
arch/csky/include/asm/highmem.h| 51 ++
arch/csky/include/asm/mmu.h| 12 ++
arch/csky/include/asm/page.h | 101 +++
arch/csky/include/asm/pgalloc.h| 109
arch/csky/include/asm/pgtable.h| 300 +
arch/csky/include/asm/segment.h| 19 +++
arch/csky/include/asm/shmparam.h | 11 ++
arch/csky/mm/dma-mapping.c | 254
arch/csky/mm/highmem.c | 196 +
arch/csky/mm/init.c| 119 +
arch/csky/mm/ioremap.c | 49 ++
20 files changed, 1601 insertions(+)
create mode 100644 arch/csky/abiv1/inc/abi/ckmmu.h
create mode 100644 arch/csky/abiv1/inc/abi/page.h
create mode 100644 arch/csky/abiv1/inc/abi/pgtable-bits.h
create mode 100644 arch/csky/abiv1/mmap.c
create mode 100644 arch/csky/abiv2/inc/abi/ckmmu.h
create mode 100644 arch/csky/abiv2/inc/abi/page.h
create mode 100644 arch/csky/abiv2/inc/abi/pgtable-bits.h
create mode 100644 arch/csky/include/asm/addrspace.h
create mode 100644 arch/csky/include/asm/fixmap.h
create mode 100644 arch/csky/include/asm/highmem.h
create mode 100644 arch/csky/include/asm/mmu.h
create mode 100644 arch/csky/include/asm/page.h
create mode 100644 arch/csky/include/asm/pgalloc.h
create mode 100644 arch/csky/include/asm/pgtable.h
create mode 100644 arch/csky/include/asm/segment.h
create mode 100644 arch/csky/include/asm/shmparam.h
create mode 100644 arch/csky/mm/dma-mapping.c
create mode 100644 arch/csky/mm/highmem.c
create mode 100644 arch/csky/mm/init.c
create mode 100644 arch/csky/mm/ioremap.c
diff --git a/arch/csky/abiv1/inc/abi/ckmmu.h b/arch/csky/abiv1/inc/abi/ckmmu.h
new file mode 100644
index 000..330d543
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/ckmmu.h
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_CKMMUV1_H
+#define __ASM_CSKY_CKMMUV1_H
+#include
+
+static inline int read_mmu_index(void)
+{
+ return cprcr("cpcr0");
+}
+
+static inline void write_mmu_index(int value)
+{
+ cpwcr("cpcr0", value);
+}
+
+static inline int read_mmu_entrylo0(void)
+{
+ return cprcr("cpcr2") << 6;
+}
+
+static inline int read_mmu_entrylo1(void)
+{
+ return cprcr("cpcr3") << 6;
+}
+
+static inline void write_mmu_pagemask(int value)
+{
+ cpwcr("cpcr6", value);
+}
+
+static inline int read_mmu_entryhi(void)
+{
+ return cprcr("cpcr4");
+}
+
+static inline void write_mmu_entryhi(int value)
+{
+ cpwcr("cpcr4", value);
+}
+
+/*
+ * TLB operations.
+ */
+static inline void tlb_probe(void)
+{
+ cpwcr("cpcr8", 0x8000);
+}
+
+static inline void tlb_read(void)
+{
+ cpwcr("cpcr8", 0x4000);
+}
+
+static inline void tlb_invalid_all(void)
+{
+ cpwcr("cpcr8", 0x0400);
+}
+
+static inline void tlb_invalid_indexed(void)
+{
+ cpwcr("cpcr8", 0x0200);
+}
+
+static inline void setup_pgd(unsigned long pgd, bool kernel)
+{
+ cpwcr("cpcr29", pgd);
+}
+
+static inline unsigned long get_pgd(void)
+{
+ return cprcr("cpcr29");
+}
+#endif /* __ASM_CSKY_CKMMUV1_H */
diff --git a/arch/csky/abiv1/inc/abi/page.h b/arch/csky/abiv1/inc/abi/page.h
new file mode 100644
index 000..9723461
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/page.h
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+extern unsigned long shm_align_mask;
+extern void flush_dcache_page(struct page *);
+
+static inline unsigned long pages_do_alias(unsigned long addr1,
+ unsigned long addr2)
+{
+ return (addr1 ^ addr2) & shm_align_mask;
+}
+
+s
[PATCH V6 09/33] csky: VDSO and rt_sigreturn
This patch adds files related to VDSO and our VDSO only support
rt_sigreturn.
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/vdso.h | 18 +
arch/csky/abiv2/inc/abi/vdso.h | 24
arch/csky/include/asm/vdso.h | 13 +++
arch/csky/kernel/vdso.c| 85 ++
4 files changed, 140 insertions(+)
create mode 100644 arch/csky/abiv1/inc/abi/vdso.h
create mode 100644 arch/csky/abiv2/inc/abi/vdso.h
create mode 100644 arch/csky/include/asm/vdso.h
create mode 100644 arch/csky/kernel/vdso.c
diff --git a/arch/csky/abiv1/inc/abi/vdso.h b/arch/csky/abiv1/inc/abi/vdso.h
new file mode 100644
index 000..7b3dbde
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/vdso.h
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+
+static inline int setup_vdso_page(unsigned short *ptr)
+{
+ int err = 0;
+
+ /* movi r1, 127 */
+ err |= __put_user(0x67f1, ptr + 0);
+ /* addi r1, (139 - 127) */
+ err |= __put_user(0x20b1, ptr + 1);
+ /* trap 0 */
+ err |= __put_user(0x0008, ptr + 2);
+
+ return err;
+}
diff --git a/arch/csky/abiv2/inc/abi/vdso.h b/arch/csky/abiv2/inc/abi/vdso.h
new file mode 100644
index 000..2b5f43b
--- /dev/null
+++ b/arch/csky/abiv2/inc/abi/vdso.h
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ABI_CSKY_VDSO_H
+#define __ABI_CSKY_VDSO_H
+
+#include
+
+static inline int setup_vdso_page(unsigned short *ptr)
+{
+ int err = 0;
+
+ /* movi r7, 173 */
+ err |= __put_user(0xea07, ptr);
+ err |= __put_user(0x008b, ptr+1);
+
+ /* trap 0 */
+ err |= __put_user(0xc000, ptr+2);
+ err |= __put_user(0x2020, ptr+3);
+
+ return err;
+}
+
+#endif /* __ABI_CSKY_STRING_H */
diff --git a/arch/csky/include/asm/vdso.h b/arch/csky/include/asm/vdso.h
new file mode 100644
index 000..0345b0d
--- /dev/null
+++ b/arch/csky/include/asm/vdso.h
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_VDSO_H
+#define __ASM_CSKY_VDSO_H
+
+#include
+
+struct csky_vdso {
+ unsigned short rt_signal_retcode[4];
+};
+
+#endif /* __ASM_CSKY_VDSO_H */
diff --git a/arch/csky/kernel/vdso.c b/arch/csky/kernel/vdso.c
new file mode 100644
index 000..55ed68b
--- /dev/null
+++ b/arch/csky/kernel/vdso.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+static struct page *vdso_page;
+
+static int __init init_vdso(void)
+{
+ struct csky_vdso *vdso;
+ int err = 0;
+
+ vdso_page = alloc_page(GFP_KERNEL);
+ if (!vdso_page)
+ panic("Cannot allocate vdso");
+
+ vdso = vmap(&vdso_page, 1, 0, PAGE_KERNEL);
+ if (!vdso)
+ panic("Cannot map vdso");
+
+ clear_page(vdso);
+
+ err = setup_vdso_page(vdso->rt_signal_retcode);
+ if (err) panic("Cannot set signal return code, err: %x.", err);
+
+ dcache_wb_range((unsigned long)vdso, (unsigned long)vdso + 16);
+
+ vunmap(vdso);
+
+ return 0;
+}
+subsys_initcall(init_vdso);
+
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
+ int ret;
+ unsigned long addr;
+ struct mm_struct *mm = current->mm;
+
+ down_write(&mm->mmap_sem);
+
+ addr = get_unmapped_area(NULL, STACK_TOP, PAGE_SIZE, 0, 0);
+ if (IS_ERR_VALUE(addr)) {
+ ret = addr;
+ goto up_fail;
+ }
+
+ ret = install_special_mapping(
+ mm,
+ addr,
+ PAGE_SIZE,
+ VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC,
+ &vdso_page);
+ if (ret)
+ goto up_fail;
+
+ mm->context.vdso = (void *)addr;
+
+up_fail:
+ up_write(&mm->mmap_sem);
+ return ret;
+}
+
+const char *arch_vma_name(struct vm_area_struct *vma)
+{
+ if (vma->vm_mm == NULL)
+ return NULL;
+
+ if (vma->vm_start == (long)vma->vm_mm->context.vdso)
+ return "[vdso]";
+ else
+ return NULL;
+}
--
2.7.4
[PATCH V6 04/33] csky: Exception handling and mm-fault
This patch adds exception handling code, cpuinfo and mm-fault code.
Signed-off-by: Guo Ren
---
arch/csky/abiv1/alignment.c | 332 +
arch/csky/abiv1/inc/abi/entry.h | 160
arch/csky/abiv2/inc/abi/entry.h | 157
arch/csky/include/asm/traps.h | 40
arch/csky/include/asm/unistd.h | 4 +
arch/csky/kernel/cpu-probe.c| 79
arch/csky/kernel/entry.S| 397
arch/csky/kernel/traps.c| 168 +
arch/csky/mm/fault.c| 221 ++
9 files changed, 1558 insertions(+)
create mode 100644 arch/csky/abiv1/alignment.c
create mode 100644 arch/csky/abiv1/inc/abi/entry.h
create mode 100644 arch/csky/abiv2/inc/abi/entry.h
create mode 100644 arch/csky/include/asm/traps.h
create mode 100644 arch/csky/include/asm/unistd.h
create mode 100644 arch/csky/kernel/cpu-probe.c
create mode 100644 arch/csky/kernel/entry.S
create mode 100644 arch/csky/kernel/traps.c
create mode 100644 arch/csky/mm/fault.c
diff --git a/arch/csky/abiv1/alignment.c b/arch/csky/abiv1/alignment.c
new file mode 100644
index 000..e7dae10
--- /dev/null
+++ b/arch/csky/abiv1/alignment.c
@@ -0,0 +1,332 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+
+static int align_enable = 1;
+static int align_count = 0;
+
+static inline uint32_t get_ptreg(struct pt_regs *regs, uint32_t rx)
+{
+ return *((int *)&(regs->a0) - 2 + rx);
+}
+
+static inline void put_ptreg(struct pt_regs *regs, uint32_t rx, uint32_t val)
+{
+ *((int *)&(regs->a0) - 2 + rx) = val;
+}
+
+/*
+ * Get byte-value from addr and set it to *valp.
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static int ldb_asm(uint32_t addr, uint32_t *valp)
+{
+ uint32_t val;
+ int err;
+
+ if (!access_ok(VERIFY_READ, (void *)addr, 1))
+ return 1;
+
+ asm volatile (
+ "movi %0, 0 \n"
+ "1: \n"
+ "ldb%1, (%2)\n"
+ "br 3f \n"
+ "2: \n"
+ "movi %0, 1 \n"
+ "br 3f \n"
+ ".section __ex_table,\"a\" \n"
+ ".align 2 \n"
+ ".long 1b, 2b \n"
+ ".previous \n"
+ "3: \n"
+ : "=&r"(err), "=r"(val)
+ : "r" (addr)
+ );
+
+ *valp = val;
+
+ return err;
+}
+
+/*
+ * Put byte-value to addr.
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static volatile int stb_asm(uint32_t addr, uint32_t val)
+{
+ int err;
+
+ if (!access_ok(VERIFY_WRITE, (void *)addr, 1))
+ return 1;
+
+ asm volatile (
+ "movi %0, 0 \n"
+ "1: \n"
+ "stb%1, (%2)\n"
+ "br 3f \n"
+ "2: \n"
+ "movi %0, 1 \n"
+ "br 3f \n"
+ ".section __ex_table,\"a\" \n"
+ ".align 2 \n"
+ ".long 1b, 2b \n"
+ ".previous \n"
+ "3: \n"
+ : "=&r"(err)
+ : "r"(val), "r" (addr)
+ );
+
+ return err;
+}
+
+/*
+ * Get half-word from [rx + imm]
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static int ldh_c(struct pt_regs *regs, uint32_t rz, uint32_t addr)
+{
+ uint32_t byte0, byte1;
+
+ if (ldb_asm(addr, &byte0))
+ return 1;
+ addr += 1;
+ if (ldb_asm(addr, &byte1))
+ return 1;
+
+ byte0 |= byte1 << 8;
+ put_ptreg(regs, rz, byte0);
+
+ return 0;
+}
+
+/*
+ * Store half-word to [rx + imm]
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static int sth_c(struct pt_regs *regs, uint32_t rz, uint32_t addr)
+{
+ uint32_t byte0, byte1;
+
+ byte0 = byte1 = get_ptreg(regs, rz);
+
+ byte0 &= 0xff;
+
+ if (stb_asm(addr, byte0))
+ return 1;
+
+ addr += 1;
+ byte1 = (byte1 >> 8) & 0xff;
+ if (stb_asm(addr, byte1))
[PATCH V6 11/33] csky: Atomic operations
This patch adds atomic, cmpxchg, spinlock files.
- SMP supported
- ticklock supported
- queue-rwlock supported
Signed-off-by: Guo Ren
---
arch/csky/include/asm/atomic.h | 213 ++
arch/csky/include/asm/cmpxchg.h| 70 +
arch/csky/include/asm/spinlock.h | 272 +
arch/csky/include/asm/spinlock_types.h | 35 +
arch/csky/kernel/atomic.S | 87 +++
5 files changed, 677 insertions(+)
create mode 100644 arch/csky/include/asm/atomic.h
create mode 100644 arch/csky/include/asm/cmpxchg.h
create mode 100644 arch/csky/include/asm/spinlock.h
create mode 100644 arch/csky/include/asm/spinlock_types.h
create mode 100644 arch/csky/kernel/atomic.S
diff --git a/arch/csky/include/asm/atomic.h b/arch/csky/include/asm/atomic.h
new file mode 100644
index 000..0a15d50
--- /dev/null
+++ b/arch/csky/include/asm/atomic.h
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_ATOMIC_H
+#define __ASM_CSKY_ATOMIC_H
+
+#include
+#include
+#include
+
+#ifdef CONFIG_CPU_HAS_LDSTEX
+
+#define __atomic_add_unless __atomic_add_unless
+static inline int __atomic_add_unless(atomic_t *v, int a, int u)
+{
+ unsigned long tmp, ret;
+
+ smp_mb();
+
+ asm volatile (
+ "1: ldex.w %0, (%3) \n"
+ " mov %1, %0 \n"
+ " cmpne %0, %4 \n"
+ " bf 2f \n"
+ " add %0, %2 \n"
+ " stex.w %0, (%3) \n"
+ " bez %0, 1b \n"
+ "2: \n"
+ : "=&r" (tmp), "=&r" (ret)
+ : "r" (a), "r"(&v->counter), "r"(u)
+ : "memory");
+
+ if (ret != u)
+ smp_mb();
+
+ return ret;
+}
+
+#define ATOMIC_OP(op, c_op)\
+static inline void atomic_##op(int i, atomic_t *v) \
+{ \
+ unsigned long tmp; \
+ \
+ asm volatile ( \
+ "1: ldex.w %0, (%2) \n"\
+ " " #op " %0, %1 \n"\
+ " stex.w %0, (%2) \n"\
+ " bez %0, 1b \n"\
+ : "=&r" (tmp) \
+ : "r" (i), "r"(&v->counter) \
+ : "memory");\
+}
+
+#define ATOMIC_OP_RETURN(op, c_op) \
+static inline int atomic_##op##_return(int i, atomic_t *v) \
+{ \
+ unsigned long tmp, ret; \
+ \
+ smp_mb(); \
+ asm volatile ( \
+ "1: ldex.w %0, (%3) \n"\
+ " " #op " %0, %2 \n"\
+ " mov %1, %0 \n"\
+ " stex.w %0, (%3) \n"\
+ " bez %0, 1b \n"\
+ : "=&r" (tmp), "=&r" (ret) \
+ : "r" (i), "r"(&v->counter) \
+ : "memory");\
+ smp_mb(); \
+ \
+ return ret; \
+}
+
+#define ATOMIC_FETCH_OP(op, c_op) \
+static inline int atomic_fetch_##op(int i, atomic_t *v)
\
+{ \
+ unsigned long tmp, ret; \
+
[PATCH V6 12/33] csky: ELF and module probe
This patch adds ELF definition and module relocate codes. Signed-off-by: Guo Ren --- arch/csky/include/asm/elf.h | 150 arch/csky/kernel/module.c | 83 2 files changed, 233 insertions(+) create mode 100644 arch/csky/include/asm/elf.h create mode 100644 arch/csky/kernel/module.c diff --git a/arch/csky/include/asm/elf.h b/arch/csky/include/asm/elf.h new file mode 100644 index 000..7f40a57 --- /dev/null +++ b/arch/csky/include/asm/elf.h @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. + +#ifndef __ASMCSKY_ELF_H +#define __ASMCSKY_ELF_H + +/* + * ELF register definitions.. + */ + +#include +#include + +#define ELF_ARCH 252 + +/* CSKY Relocations */ +#define R_CSKY_NONE 0 +#define R_CSKY_32 1 +#define R_CSKY_PCIMM8BY4 2 +#define R_CSKY_PCIMM11BY2 3 +#define R_CSKY_PCIMM4BY2 4 +#define R_CSKY_PC32 5 +#define R_CSKY_PCRELJSR_IMM11BY2 6 +#define R_CSKY_GNU_VTINHERIT 7 +#define R_CSKY_GNU_VTENTRY8 +#define R_CSKY_RELATIVE 9 +#define R_CSKY_COPY 10 +#define R_CSKY_GLOB_DAT 11 +#define R_CSKY_JUMP_SLOT 12 +#define R_CSKY_ADDR_HI16 24 +#define R_CSKY_ADDR_LO16 25 +#define R_CSKY_PCRELJSR_IMM26BY2 40 + +typedef unsigned long elf_greg_t; + +typedef struct user_fp elf_fpregset_t; + +#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t)) + +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) + +/* + * These are used to set parameters in the core dumps. + */ +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 +#define ELF_CLASS ELFCLASS32 +#define ELF_PLAT_INIT(_r, load_addr) _r->a0 = 0 + +#ifdef __cskyBE__ +#define ELF_DATA ELFDATA2MSB +#else +#define ELF_DATA ELFDATA2LSB +#endif + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#define ELF_ET_DYN_BASE0x0UL + +/* The member sort in array pr_reg[x] is pc, r1, r0, psr, r2, r3,r4, + r5, r6.. Because GDB difine */ +#if defined(__CSKYABIV2__) + #define ELF_CORE_COPY_REGS(pr_reg, regs) \ +pr_reg[0] = regs->pc; \ +pr_reg[1] = regs->a1; \ +pr_reg[2] = regs->a0; \ +pr_reg[3] = regs->sr; \ +pr_reg[4] = regs->a2; \ +pr_reg[5] = regs->a3; \ +pr_reg[6] = regs->regs[0]; \ +pr_reg[7] = regs->regs[1]; \ +pr_reg[8] = regs->regs[2]; \ +pr_reg[9] = regs->regs[3]; \ +pr_reg[10] = regs->regs[4]; \ +pr_reg[11] = regs->regs[5]; \ +pr_reg[12] = regs->regs[6]; \ +pr_reg[13] = regs->regs[7]; \ +pr_reg[14] = regs->regs[8]; \ +pr_reg[15] = regs->regs[9]; \ +pr_reg[16] = regs->usp;\ +pr_reg[17] = regs->lr; \ +pr_reg[18] = regs->exregs[0]; \ +pr_reg[19] = regs->exregs[1]; \ +pr_reg[20] = regs->exregs[2]; \ +pr_reg[21] = regs->exregs[3]; \ +pr_reg[22] = regs->exregs[4]; \ +pr_reg[23] = regs->exregs[5]; \ +pr_reg[24] = regs->exregs[6]; \ +pr_reg[25] = regs->exregs[7]; \ +pr_reg[26] = regs->exregs[8]; \ +pr_reg[27] = regs->exregs[9]; \ +pr_reg[28] = regs->exregs[10]; \ +pr_reg[29] = regs->exregs[11]; \ +pr_reg[30] = regs->exregs[12]; \ +pr_reg[31] = regs->exregs[13]; \ +pr_reg[32] = regs->exregs[14]; \ +pr_reg[33] = regs->tls; +#else + #define ELF_CORE_COPY_REGS(pr_reg, regs) \ +pr_reg[0] = regs->pc; \ +pr_reg[1] = regs->regs[9]; \ +pr_reg[2] = regs->usp; \ +pr_reg[3] = regs->sr; \ +pr_reg[4] = regs->a0; \ +pr_reg[5] = regs->a1; \ +pr_reg[6] = regs->a2; \ +pr_reg[7] = regs->a3; \ +
[PATCH V6 15/33] csky: Debug and Ptrace GDB
This patch adds arch ptrace implementation, stack dump and bug.h.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/bug.h | 26 +++
arch/csky/include/uapi/asm/ptrace.h | 104
arch/csky/kernel/dumpstack.c| 65
arch/csky/kernel/ptrace.c | 318
4 files changed, 513 insertions(+)
create mode 100644 arch/csky/include/asm/bug.h
create mode 100644 arch/csky/include/uapi/asm/ptrace.h
create mode 100644 arch/csky/kernel/dumpstack.c
create mode 100644 arch/csky/kernel/ptrace.c
diff --git a/arch/csky/include/asm/bug.h b/arch/csky/include/asm/bug.h
new file mode 100644
index 000..10b9028
--- /dev/null
+++ b/arch/csky/include/asm/bug.h
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_BUG_H
+#define __ASM_CSKY_BUG_H
+
+#include
+#include
+#include
+
+#define BUG() \
+do { \
+ asm volatile ("bkpt\n");\
+ unreachable(); \
+} while (0)
+
+#define HAVE_ARCH_BUG
+
+#include
+
+struct pt_regs;
+
+void die_if_kernel (char *str, struct pt_regs *regs, int nr);
+void show_regs(struct pt_regs *);
+
+#endif /* __ASM_CSKY_BUG_H */
diff --git a/arch/csky/include/uapi/asm/ptrace.h
b/arch/csky/include/uapi/asm/ptrace.h
new file mode 100644
index 000..688c6fd
--- /dev/null
+++ b/arch/csky/include/uapi/asm/ptrace.h
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef _CSKY_PTRACE_H
+#define _CSKY_PTRACE_H
+
+#ifndef __ASSEMBLY__
+
+struct pt_regs {
+ unsigned long tls;
+ unsigned long lr;
+ unsigned long pc;
+ unsigned long sr;
+ unsigned long usp;
+
+ /*
+* a0, a1, a2, a3:
+* abiv1: r2, r3, r4, r5
+* abiv2: r0, r1, r2, r3
+*/
+ unsigned long orig_a0;
+ unsigned long a0;
+ unsigned long a1;
+ unsigned long a2;
+ unsigned long a3;
+
+ /*
+* ABIV2: r4 ~ r13
+* ABIV1: r6 ~ r14, r1
+*/
+ unsigned long regs[10];
+
+#if defined(__CSKYABIV2__)
+ /* r16 ~ r30 */
+ unsigned long exregs[15];
+
+ unsigned long rhi;
+ unsigned long rlo;
+ unsigned long pad; /* reserved */
+#endif
+};
+
+struct user_fp {
+ unsigned long vr[96];
+ unsigned long fcr;
+ unsigned long fesr;
+ unsigned long fid;
+ unsigned long reserved;
+};
+
+/*
+ * Switch stack for switch_to after push pt_regs.
+ *
+ * ABI_CSKYV2: r4 ~ r11, r15 ~ r17, r26 ~ r30;
+ * ABI_CSKYV1: r8 ~ r14, r15;
+ */
+struct switch_stack {
+#if defined(__CSKYABIV2__)
+ unsigned long r4;
+unsigned long r5;
+unsigned long r6;
+unsigned long r7;
+ unsigned long r8;
+unsigned long r9;
+unsigned long r10;
+unsigned long r11;
+#else
+ unsigned long r8;
+unsigned long r9;
+unsigned long r10;
+unsigned long r11;
+unsigned long r12;
+unsigned long r13;
+unsigned long r14;
+#endif
+unsigned long r15;
+#if defined(__CSKYABIV2__)
+unsigned long r16;
+unsigned long r17;
+unsigned long r26;
+unsigned long r27;
+unsigned long r28;
+unsigned long r29;
+unsigned long r30;
+#endif
+};
+
+#ifdef __KERNEL__
+
+#define PS_S0x8000 /* Supervisor Mode */
+
+#define arch_has_single_step() (1)
+#define current_pt_regs() \
+ (struct pt_regs *)((char *)current_thread_info() + THREAD_SIZE) - 1
+
+#define user_stack_pointer(regs) ((regs)->usp)
+
+#define user_mode(regs) (!((regs)->sr & PS_S))
+#define instruction_pointer(regs) ((regs)->pc)
+#define profile_pc(regs) instruction_pointer(regs)
+
+#endif /* __KERNEL__ */
+#endif /* __ASSEMBLY__ */
+#endif /* _CSKY_PTRACE_H */
diff --git a/arch/csky/kernel/dumpstack.c b/arch/csky/kernel/dumpstack.c
new file mode 100644
index 000..c7e46d8
--- /dev/null
+++ b/arch/csky/kernel/dumpstack.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+
+int kstack_depth_to_print = 48;
+
+void show_trace(unsigned long *stack)
+{
+ unsigned long *endstack;
+ unsigned long addr;
+ int i;
+
+ pr_info("Call Trace:\n");
+ addr = (unsigned long)stack + THREAD_SIZE - 1;
+ endstack = (unsigned long *)(addr & -THREAD_SIZE);
+ i = 0;
+ while (stack + 1 <= endstack) {
+ addr = *stack++;
+ /*
+* If the address is either in the text segment of the
+*
[PATCH V6 13/33] csky: Library functions
This patch adds string optimize codes and some auxiliary code.
Signed-off-by: Chen Linfei
Signed-off-by: Mao Han
Signed-off-by: Guo Ren
---
arch/csky/abiv1/bswapdi.c| 19 +++
arch/csky/abiv1/bswapsi.c| 15 ++
arch/csky/abiv1/inc/abi/string.h | 13 ++
arch/csky/abiv1/memcpy.S | 345 +++
arch/csky/abiv1/memset.c | 37 +
arch/csky/abiv1/strksyms.c | 7 +
arch/csky/abiv2/inc/abi/string.h | 28
arch/csky/abiv2/memcmp.S | 152 +
arch/csky/abiv2/memcpy.S | 110 +
arch/csky/abiv2/memcpy.c | 40 +
arch/csky/abiv2/memmove.S| 108
arch/csky/abiv2/memset.S | 83 ++
arch/csky/abiv2/strcmp.S | 168 +++
arch/csky/abiv2/strcpy.S | 123 ++
arch/csky/abiv2/strksyms.c | 12 ++
arch/csky/abiv2/strlen.S | 97 +++
arch/csky/abiv2/sysdep.h | 30
arch/csky/include/asm/string.h | 13 ++
arch/csky/kernel/platform.c | 17 ++
arch/csky/kernel/power.c | 30
arch/csky/lib/delay.c| 40 +
21 files changed, 1487 insertions(+)
create mode 100644 arch/csky/abiv1/bswapdi.c
create mode 100644 arch/csky/abiv1/bswapsi.c
create mode 100644 arch/csky/abiv1/inc/abi/string.h
create mode 100644 arch/csky/abiv1/memcpy.S
create mode 100644 arch/csky/abiv1/memset.c
create mode 100644 arch/csky/abiv1/strksyms.c
create mode 100644 arch/csky/abiv2/inc/abi/string.h
create mode 100644 arch/csky/abiv2/memcmp.S
create mode 100644 arch/csky/abiv2/memcpy.S
create mode 100644 arch/csky/abiv2/memcpy.c
create mode 100644 arch/csky/abiv2/memmove.S
create mode 100644 arch/csky/abiv2/memset.S
create mode 100644 arch/csky/abiv2/strcmp.S
create mode 100644 arch/csky/abiv2/strcpy.S
create mode 100644 arch/csky/abiv2/strksyms.c
create mode 100644 arch/csky/abiv2/strlen.S
create mode 100644 arch/csky/abiv2/sysdep.h
create mode 100644 arch/csky/include/asm/string.h
create mode 100644 arch/csky/kernel/platform.c
create mode 100644 arch/csky/kernel/power.c
create mode 100644 arch/csky/lib/delay.c
diff --git a/arch/csky/abiv1/bswapdi.c b/arch/csky/abiv1/bswapdi.c
new file mode 100644
index 000..80bf1e8
--- /dev/null
+++ b/arch/csky/abiv1/bswapdi.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+
+unsigned long long notrace __bswapdi2(unsigned long long u)
+{
+ return (((u) & 0xff00ull) >> 56) |
+ (((u) & 0x00ffull) >> 40) |
+ (((u) & 0xff00ull) >> 24) |
+ (((u) & 0x00ffull) >> 8) |
+ (((u) & 0xff00ull) << 8) |
+ (((u) & 0x00ffull) << 24) |
+ (((u) & 0xff00ull) << 40) |
+ (((u) & 0x00ffull) << 56);
+}
+
+EXPORT_SYMBOL(__bswapdi2);
diff --git a/arch/csky/abiv1/bswapsi.c b/arch/csky/abiv1/bswapsi.c
new file mode 100644
index 000..043a18f
--- /dev/null
+++ b/arch/csky/abiv1/bswapsi.c
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+
+unsigned int notrace __bswapsi2(unsigned int u)
+{
+ return (((u) & 0xff00) >> 24) |
+ (((u) & 0x00ff) >> 8) |
+ (((u) & 0xff00) << 8) |
+ (((u) & 0x00ff) << 24);
+}
+
+EXPORT_SYMBOL(__bswapsi2);
diff --git a/arch/csky/abiv1/inc/abi/string.h b/arch/csky/abiv1/inc/abi/string.h
new file mode 100644
index 000..60d4fc4
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/string.h
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ABI_CSKY_STRING_H
+#define __ABI_CSKY_STRING_H
+
+#define __HAVE_ARCH_MEMCPY
+extern void * memcpy(void *,const void *,__kernel_size_t);
+
+#define __HAVE_ARCH_MEMSET
+extern void * memset(void *,int,__kernel_size_t);
+
+#endif /* __ABI_CSKY_STRING_H */
diff --git a/arch/csky/abiv1/memcpy.S b/arch/csky/abiv1/memcpy.S
new file mode 100644
index 000..cae1d20
--- /dev/null
+++ b/arch/csky/abiv1/memcpy.S
@@ -0,0 +1,345 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+
+.macro GET_FRONT_BITS rx y
+#ifdef __cskyLE__
+ lsri\rx, \y
+#else
+ lsli\rx, \y
+#endif
+.endm
+
+.macro GET_AFTER_BITS rx y
+#ifdef __cskyLE__
+ lsli\rx, \y
+#else
+ lsri\rx, \y
+#endif
+.endm
+
+/* void *memcpy(void *dest, const void *src, size_t n); */
+ENTRY(memcpy)
+ mov r7, r2
+ cmplti r4, 4 /* If len less than 4
bytes */
+ bt
[PATCH V6 14/33] csky: User access
This patch adds "user access from kernel" codes.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/uaccess.h | 399
arch/csky/lib/usercopy.c| 271 +++
2 files changed, 670 insertions(+)
create mode 100644 arch/csky/include/asm/uaccess.h
create mode 100644 arch/csky/lib/usercopy.c
diff --git a/arch/csky/include/asm/uaccess.h b/arch/csky/include/asm/uaccess.h
new file mode 100644
index 000..b927391
--- /dev/null
+++ b/arch/csky/include/asm/uaccess.h
@@ -0,0 +1,399 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_UACCESS_H
+#define __ASM_CSKY_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define VERIFY_READ0
+#define VERIFY_WRITE 1
+
+static inline int access_ok(int type, const void * addr, unsigned long size)
+{
+ return (((unsigned long)addr < current_thread_info()->addr_limit.seg) &&
+ ((unsigned long)(addr + size) <
current_thread_info()->addr_limit.seg));
+}
+
+static inline int verify_area(int type, const void * addr, unsigned long size)
+{
+ return access_ok(type, addr, size) ? 0 : -EFAULT;
+}
+
+#define __addr_ok(addr) (access_ok(VERIFY_READ, addr,0))
+
+extern int __put_user_bad(void);
+
+/*
+ * Tell gcc we read from memory instead of writing: this is because
+ * we do not write to any memory gcc knows about, so there are no
+ * aliasing issues.
+ */
+
+/*
+ * These are the main single-value transfer routines. They automatically
+ * use the right size if we just have the right pointer type.
+ *
+ * This gets kind of ugly. We want to return _two_ values in "get_user()"
+ * and yet we don't want to do any pointers, because that is too much
+ * of a performance impact. Thus we have a few rather ugly macros here,
+ * and hide all the ugliness from the user.
+ *
+ * The "__xxx" versions of the user access functions are versions that
+ * do not verify the address space, that must have been done previously
+ * with a separate "access_ok()" call (this is used when we do multiple
+ * accesses to the same area of user memory).
+ *
+ * As we use the same address space for kernel and user data on
+ * Ckcore, we can just do these as direct assignments. (Of course, the
+ * exception handling means that it's no longer "just"...)
+ */
+
+#define put_user(x,ptr) \
+ __put_user_check((x), (ptr), sizeof(*(ptr)))
+
+#define __put_user(x,ptr) \
+ __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+#define __ptr(x) ((unsigned long *)(x))
+
+#define get_user(x,ptr) \
+ __get_user_check((x), (ptr), sizeof(*(ptr)))
+
+#define __get_user(x,ptr) \
+ __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+#define __put_user_nocheck(x, ptr, size) \
+({ \
+ long __pu_err=0;\
+ typeof(*(ptr)) *__pu_addr = (ptr); \
+ typeof(*(ptr)) __pu_val = (typeof(*(ptr)))(x); \
+ if(__pu_addr){ \
+ __put_user_size(__pu_val, (__pu_addr), (size), __pu_err); \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_check(x,ptr,size) \
+({ \
+ long __pu_err = -EFAULT;\
+ typeof(*(ptr)) *__pu_addr = (ptr); \
+ typeof(*(ptr)) __pu_val = (typeof(*(ptr)))(x); \
+ if (access_ok(VERIFY_WRITE, __pu_addr, size) && __pu_addr) \
+ __put_user_size(__pu_val, __pu_addr, (size), __pu_err); \
+ __pu_err; \
+})
+
+#define __put_user_size(x,ptr,size,retval) \
+do {\
+ retval = 0; \
+ switch (size) { \
+ case 1: __put_user_asm_b(x, ptr, retval); break;\
+ case 2: __put_user_asm_h(x, ptr, retval); break;\
+ case 4: __put_user_asm_w(x, ptr, retval); break;\
+ case 8: __put_user_asm_64(x, ptr, retval); break; \
+ default: __put_user_bad(); \
+ } \
+} while (0)
+
+/*
+ * We don't tell gcc that we are a
[PATCH V6 10/33] csky: IRQ handling
This patch adds IRQ handling files.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/irq.h | 9
arch/csky/include/asm/irqflags.h | 50
arch/csky/kernel/irq.c | 22 ++
3 files changed, 81 insertions(+)
create mode 100644 arch/csky/include/asm/irq.h
create mode 100644 arch/csky/include/asm/irqflags.h
create mode 100644 arch/csky/kernel/irq.c
diff --git a/arch/csky/include/asm/irq.h b/arch/csky/include/asm/irq.h
new file mode 100644
index 000..970ef4f
--- /dev/null
+++ b/arch/csky/include/asm/irq.h
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_IRQ_H
+#define __ASM_CSKY_IRQ_H
+
+#include
+
+#endif /* __ASM_CSKY_IRQ_H */
diff --git a/arch/csky/include/asm/irqflags.h b/arch/csky/include/asm/irqflags.h
new file mode 100644
index 000..a4fd2dd
--- /dev/null
+++ b/arch/csky/include/asm/irqflags.h
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_IRQFLAGS_H
+#define __ASM_CSKY_IRQFLAGS_H
+#include
+
+static inline unsigned long arch_local_irq_save(void)
+{
+ unsigned long flags;
+
+ flags = mfcr("psr");
+ asm volatile("psrclr ie\n":::"memory");
+ return flags;
+}
+#define arch_local_irq_save arch_local_irq_save
+
+static inline void arch_local_irq_enable(void)
+{
+ asm volatile("psrset ee, ie\n":::"memory");
+}
+#define arch_local_irq_enable arch_local_irq_enable
+
+static inline void arch_local_irq_disable(void)
+{
+ asm volatile("psrclr ie\n":::"memory");
+}
+#define arch_local_irq_disable arch_local_irq_disable
+
+static inline unsigned long arch_local_save_flags(void)
+{
+ return mfcr("psr");
+}
+#define arch_local_save_flags arch_local_save_flags
+
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+ mtcr("psr", flags);
+}
+#define arch_local_irq_restore arch_local_irq_restore
+
+static inline int arch_irqs_disabled_flags(unsigned long flags)
+{
+ return !(flags & (1<<6));
+}
+#define arch_irqs_disabled_flags arch_irqs_disabled_flags
+
+#include
+
+#endif /* __ASM_CSKY_IRQFLAGS_H */
diff --git a/arch/csky/kernel/irq.c b/arch/csky/kernel/irq.c
new file mode 100644
index 000..03a1930
--- /dev/null
+++ b/arch/csky/kernel/irq.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+void __init init_IRQ(void)
+{
+ irqchip_init();
+#ifdef CONFIG_SMP
+ setup_smp_ipi();
+#endif
+}
+
+asmlinkage void __irq_entry csky_do_IRQ(struct pt_regs *regs)
+{
+ handle_arch_irq(regs);
+}
--
2.7.4
[PATCH V6 16/33] csky: SMP support
This patch adds boot, ipi, hotplug code for SMP.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/smp.h | 26 +
arch/csky/kernel/smp.c | 234
2 files changed, 260 insertions(+)
create mode 100644 arch/csky/include/asm/smp.h
create mode 100644 arch/csky/kernel/smp.c
diff --git a/arch/csky/include/asm/smp.h b/arch/csky/include/asm/smp.h
new file mode 100644
index 000..9a53abf
--- /dev/null
+++ b/arch/csky/include/asm/smp.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_CSKY_SMP_H
+#define __ASM_CSKY_SMP_H
+
+#include
+#include
+#include
+
+#ifdef CONFIG_SMP
+
+void __init setup_smp(void);
+
+void __init setup_smp_ipi(void);
+
+void __init enable_smp_ipi(void);
+
+void arch_send_call_function_ipi_mask(struct cpumask *mask);
+
+void arch_send_call_function_single_ipi(int cpu);
+
+void __init set_send_ipi(void (*func)(const unsigned long *, unsigned long));
+
+#define raw_smp_processor_id() (current_thread_info()->cpu)
+
+#endif /* CONFIG_SMP */
+
+#endif /* __ASM_CSKY_SMP_H */
diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
new file mode 100644
index 000..522c73f
--- /dev/null
+++ b/arch/csky/kernel/smp.c
@@ -0,0 +1,234 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define IPI_IRQ15
+
+static struct {
+ unsigned long bits cacheline_aligned;
+} ipi_data[NR_CPUS] __cacheline_aligned;
+
+enum ipi_message_type {
+ IPI_EMPTY,
+ IPI_RESCHEDULE,
+ IPI_CALL_FUNC,
+ IPI_MAX
+};
+
+static irqreturn_t handle_ipi(int irq, void *dev)
+{
+ unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
+
+ while (true) {
+ unsigned long ops;
+
+ ops = xchg(pending_ipis, 0);
+ if (ops == 0)
+ return IRQ_HANDLED;
+
+ if (ops & (1 << IPI_RESCHEDULE))
+ scheduler_ipi();
+
+ if (ops & (1 << IPI_CALL_FUNC))
+ generic_smp_call_function_interrupt();
+
+ BUG_ON((ops >> IPI_MAX) != 0);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void (*send_arch_ipi)(const unsigned long *mask, unsigned long irq) =
NULL;
+
+void __init set_send_ipi(void (*func)(const unsigned long *, unsigned long))
+{
+ if (send_arch_ipi)
+ return;
+
+ send_arch_ipi = func;
+}
+
+static void
+send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type
operation)
+{
+ int i;
+
+ for_each_cpu(i, to_whom)
+ set_bit(operation, &ipi_data[i].bits);
+
+ smp_mb();
+ send_arch_ipi(cpumask_bits(to_whom), IPI_IRQ);
+}
+
+void arch_send_call_function_ipi_mask(struct cpumask *mask)
+{
+ send_ipi_message(mask, IPI_CALL_FUNC);
+}
+
+void arch_send_call_function_single_ipi(int cpu)
+{
+ send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
+}
+
+static void ipi_stop(void *unused)
+{
+ while (1);
+}
+
+void smp_send_stop(void)
+{
+ on_each_cpu(ipi_stop, NULL, 1);
+}
+
+void smp_send_reschedule(int cpu)
+{
+ send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
+}
+
+void *__cpu_up_stack_pointer[NR_CPUS];
+void *__cpu_up_task_pointer[NR_CPUS];
+
+void __init smp_prepare_boot_cpu(void)
+{
+}
+
+void __init smp_prepare_cpus(unsigned int max_cpus)
+{
+}
+
+static int ipi_dummy_dev;
+
+void __init enable_smp_ipi(void)
+{
+ enable_percpu_irq(IPI_IRQ, 0);
+}
+
+void __init setup_smp_ipi(void)
+{
+ int rc;
+
+ irq_create_mapping(NULL, IPI_IRQ);
+
+ rc = request_percpu_irq(IPI_IRQ, handle_ipi, "IPI Interrupt",
&ipi_dummy_dev);
+ if (rc)
+ panic("%s IRQ request failed\n", __func__);
+
+ enable_smp_ipi();
+}
+
+void __init setup_smp(void)
+{
+ struct device_node *node = NULL;
+ int cpu;
+
+ while ((node = of_find_node_by_type(node, "cpu"))) {
+ if (!of_device_is_available(node))
+ continue;
+
+ if (of_property_read_u32(node, "reg", &cpu))
+ continue;
+
+ if (cpu >= NR_CPUS)
+ continue;
+
+ set_cpu_possible(cpu, true);
+ set_cpu_present(cpu, true);
+ }
+}
+
+extern void _start_smp_secondary(void);
+
+volatile unsigned int secondary_hint;
+volatile unsigned int secondary_ccr;
+volatile unsigned int secondary_stack;
+
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
+{
+ unsigned int tmp;
+
+ secondary_stack = (unsigned int)tidle->stack + THREAD_SIZE;
+
+ secondary_hint = mfcr("cr31");
+
+ secondary_ccr = mfcr("cr18");
+
+ /* Flush dcache */
+ mtcr("cr1
[PATCH V6 17/33] csky: Misc headers
This patch adds csky register definition, byteorder, asm-offsets codes.
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/reg_ops.h | 27
arch/csky/abiv1/inc/abi/regdef.h | 26 +++
arch/csky/abiv2/inc/abi/reg_ops.h | 17 ++
arch/csky/abiv2/inc/abi/regdef.h | 26 +++
arch/csky/include/asm/bitops.h | 282 +
arch/csky/include/asm/checksum.h | 55 +++
arch/csky/include/asm/compat.h | 11 ++
arch/csky/include/asm/reg_ops.h| 22 +++
arch/csky/include/uapi/asm/byteorder.h | 9 ++
arch/csky/kernel/asm-offsets.c | 86 ++
10 files changed, 561 insertions(+)
create mode 100644 arch/csky/abiv1/inc/abi/reg_ops.h
create mode 100644 arch/csky/abiv1/inc/abi/regdef.h
create mode 100644 arch/csky/abiv2/inc/abi/reg_ops.h
create mode 100644 arch/csky/abiv2/inc/abi/regdef.h
create mode 100644 arch/csky/include/asm/bitops.h
create mode 100644 arch/csky/include/asm/checksum.h
create mode 100644 arch/csky/include/asm/compat.h
create mode 100644 arch/csky/include/asm/reg_ops.h
create mode 100644 arch/csky/include/uapi/asm/byteorder.h
create mode 100644 arch/csky/kernel/asm-offsets.c
diff --git a/arch/csky/abiv1/inc/abi/reg_ops.h
b/arch/csky/abiv1/inc/abi/reg_ops.h
new file mode 100644
index 000..6091788
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/reg_ops.h
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ABI_REG_OPS_H
+#define __ABI_REG_OPS_H
+#include
+
+#define cprcr(reg) \
+({ \
+ unsigned int tmp; \
+ asm volatile("cprcr %0, "reg"\n":"=b"(tmp));\
+ tmp;\
+})
+
+#define cpwcr(reg, val)\
+({ \
+ asm volatile("cpwcr %0, "reg"\n"::"b"(val));\
+})
+
+static inline unsigned int mfcr_hint(void)
+{
+ return mfcr("cr30");
+}
+
+static inline unsigned int mfcr_ccr2(void){return 0;}
+
+#endif /* __ABI_REG_OPS_H */
diff --git a/arch/csky/abiv1/inc/abi/regdef.h b/arch/csky/abiv1/inc/abi/regdef.h
new file mode 100644
index 000..68cf10f
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/regdef.h
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_REGDEF_H
+#define __ASM_CSKY_REGDEF_H
+
+#define syscallid r1
+#define r11_sigr11
+
+#define regs_syscallid(regs) regs->regs[9]
+
+/*
+ * PSR format:
+ * | 31 | 30-24 | 23-16 | 15 14 | 13-0 |
+ * S CPID VEC TM
+ *
+ *S: Super Mode
+ * CPID: Coprocessor id, only 15 for MMU
+ * VEC: Exception Number
+ * TM: Trace Mode
+ */
+#define DEFAULT_PSR_VALUE 0x8f00
+
+#define SYSTRACE_SAVENUM 2
+
+#endif /* __ASM_CSKY_REGDEF_H */
diff --git a/arch/csky/abiv2/inc/abi/reg_ops.h
b/arch/csky/abiv2/inc/abi/reg_ops.h
new file mode 100644
index 000..ffe4fc9
--- /dev/null
+++ b/arch/csky/abiv2/inc/abi/reg_ops.h
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ABI_REG_OPS_H
+#define __ABI_REG_OPS_H
+#include
+
+static inline unsigned int mfcr_hint(void)
+{
+ return mfcr("cr31");
+}
+
+static inline unsigned int mfcr_ccr2(void)
+{
+ return mfcr("cr23");
+}
+#endif /* __ABI_REG_OPS_H */
diff --git a/arch/csky/abiv2/inc/abi/regdef.h b/arch/csky/abiv2/inc/abi/regdef.h
new file mode 100644
index 000..676e74a
--- /dev/null
+++ b/arch/csky/abiv2/inc/abi/regdef.h
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_REGDEF_H
+#define __ASM_CSKY_REGDEF_H
+
+#define syscallid r7
+#define r11_sigr11
+
+#define regs_syscallid(regs) regs->regs[3]
+
+/*
+ * PSR format:
+ * | 31 | 30-24 | 23-16 | 15 14 | 13-10 | 9 | 8-0 |
+ * S VEC TMMM
+ *
+ * S: Super Mode
+ * VEC: Exception Number
+ * TM: Trace Mode
+ * MM: Memory unaligned addr access
+ */
+#define DEFAULT_PSR_VALUE 0x8200
+
+#define SYSTRACE_SAVENUM 5
+
+#endif /* __ASM_CSKY_REGDEF_H */
diff --git a/arch/csky/include/asm/bitops.h b/arch/csky/include/asm/bitops.h
new file mode 100644
index 000..c9834f1
--- /dev/null
+++ b/arch/csky/include/asm/bitops.h
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#ifndef __ASM_CSKY_BITOPS_H
+#define __ASM_CSKY_BITOPS_H
+
+#include
+#include
+
+/*
+ * asm-generic/bitops/ffs.h
+ */
+static inline int ffs(int x)
+{
+ if(!x) return 0;
+
+ asm volatile (
+
[PATCH V6 26/33] MAINTAINERS: Add csky
Add a maintainer information for the csky(C-SKY) architecture. Signed-off-by: Guo Ren --- MAINTAINERS | 16 1 file changed, 16 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d870cb5..6b7c1be 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3211,6 +3211,22 @@ T: git git://git.alsa-project.org/alsa-kernel.git S: Maintained F: sound/pci/oxygen/ +C-SKY ARCHITECTURE +M: Guo Ren +T: git https://github.com/c-sky/csky-linux.git +S: Supported +F: arch/csky/ +F: Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt +F: drivers/irqchip/irq-csky-mpintc.c +F: Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt +F: drivers/irqchip/irq-csky-apb-intc.c +F: Documentation/devicetree/bindings/timer/csky,mptimer.txt +F: drivers/clocksource/csky_mptimer.c +F: Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt +F: drivers/clocksource/timer-gx6605s.c +K: csky +N: csky + C6X ARCHITECTURE M: Mark Salter M: Aurelien Jacquiot -- 2.7.4
[PATCH V6 18/33] dt-bindings: csky CPU Bindings
This patch adds the documentation to describe that how to add cpu nodes in
dts for SMP.
Signed-off-by: Guo Ren
---
Documentation/devicetree/bindings/csky/cpus.txt | 70 +
1 file changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/csky/cpus.txt
diff --git a/Documentation/devicetree/bindings/csky/cpus.txt
b/Documentation/devicetree/bindings/csky/cpus.txt
new file mode 100644
index 000..ee3901d
--- /dev/null
+++ b/Documentation/devicetree/bindings/csky/cpus.txt
@@ -0,0 +1,70 @@
+==
+C-SKY CPU Bindings
+==
+
+The device tree allows to describe the layout of CPUs in a system through
+the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
+defining properties for every cpu.
+
+Only SMP system need to care about the cpus node and single processor
+needn't define cpus node at all.
+
+=
+cpus and cpu node bindings definition
+=
+
+- cpus node
+
+Description: Container of cpu nodes
+
+The node name must be "cpus".
+
+A cpus node must define the following properties:
+
+- #address-cells
+Usage: required
+Value type:
+Definition: must be set to 1
+- #size-cells
+Usage: required
+Value type:
+Definition: must be set to 0
+
+- cpu node
+
+Description: Describes one of SMP cores
+
+PROPERTIES
+
+- device_type
+Usage: required
+Value type:
+Definition: must be "cpu"
+- reg
+Usage: required
+Value type:
+Definition: CPU index
+- status:
+Usage: required
+Value type:
+Definition: "ok" means enable the cpu-core
+"disabled" means disable the cpu-core
+
+Example:
+
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ reg = <0>;
+ status = "ok";
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ reg = <1>;
+ status = "ok";
+ };
+ };
--
2.7.4
[PATCH V6 20/33] csky/dma: fix up dma_mapping error
The arch_sync_dma_for_cpu()/arch_sync_dma_for_device() implementation is
broken for some combinations that end up in a BUG() instead of performing
the necessary flushes.
The implementation of arch should follow the following rules:
map for_cpu for_device unmap
TO_DEV writeback nonewriteback none
TO_CPU invalidate invalidate* invalidate invalidate*
BIDIR writeback invalidate writeback invalidate
Link: https://lore.kernel.org/lkml/20180518215548.gh17...@n2100.armlinux.org.uk/
Signed-off-by: Guo Ren
---
arch/csky/mm/dma-mapping.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/csky/mm/dma-mapping.c b/arch/csky/mm/dma-mapping.c
index 16c2087..30a2041 100644
--- a/arch/csky/mm/dma-mapping.c
+++ b/arch/csky/mm/dma-mapping.c
@@ -217,7 +217,8 @@ void arch_sync_dma_for_device(struct device *dev,
phys_addr_t paddr,
break;
case DMA_FROM_DEVICE:
case DMA_BIDIRECTIONAL:
- BUG();
+ dma_wbinv_range(vaddr + offset, vaddr + offset + size);
+ break;
default:
BUG();
}
@@ -240,7 +241,7 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t
paddr,
switch (dir) {
case DMA_TO_DEVICE:
- BUG();
+ break;
case DMA_FROM_DEVICE:
case DMA_BIDIRECTIONAL:
dma_wbinv_range(vaddr + offset, vaddr + offset + size);
--
2.7.4
[PATCH V6 22/33] irqchip: add C-SKY SMP interrupt controller
- Irq-csky-mpintc is C-SKY smp system interrupt controller and it
could support 16 soft irqs, 16 private irqs, and 992 max common
irqs.
Changelog:
- Move IPI_IRQ into the driver
- Remove irq_set_default_host() and use set_ipi_irq_mapping()
- Change name with upstream feed-back
- Change irq map, reserve soft_irq & private_irq space
- Add License and Copyright
- Support set_affinity for irq balance in SMP
Signed-off-by: Guo Ren
---
drivers/irqchip/Kconfig | 8 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-csky-mpintc.c | 195 ++
3 files changed, 204 insertions(+)
create mode 100644 drivers/irqchip/irq-csky-mpintc.c
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 383e7b7..92e1c20 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -371,6 +371,14 @@ config QCOM_PDC
Power Domain Controller driver to manage and configure wakeup
IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
+config CSKY_MPINTC
+ bool "C-SKY Multi Processor Interrupt Controller"
+ depends on CSKY
+ help
+ Say yes here to enable C-SKY SMP interrupt controller driver used
+ for C-SKY SMP system. In fact it's not mmio map and it use ld/st
+ to visit the controller's register inside CPU.
+
endmenu
config SIFIVE_PLIC
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index fbd1ec8..6b739ea 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -87,4 +87,5 @@ obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o
obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
obj-$(CONFIG_NDS32)+= irq-ativic32.o
obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o
+obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o
obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
diff --git a/drivers/irqchip/irq-csky-mpintc.c
b/drivers/irqchip/irq-csky-mpintc.c
new file mode 100644
index 000..2b424d27
--- /dev/null
+++ b/drivers/irqchip/irq-csky-mpintc.c
@@ -0,0 +1,195 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static struct irq_domain *root_domain;
+static void __iomem *INTCG_base;
+static void __iomem *INTCL_base;
+
+#define IPI_IRQ15
+#define INTC_IRQS 256
+#define COMM_IRQ_BASE 32
+
+#define INTCG_SIZE 0x8000
+#define INTCL_SIZE 0x1000
+#define INTC_SIZE INTCL_SIZE*nr_cpu_ids + INTCG_SIZE
+
+#define INTCG_ICTLR0x0
+#define INTCG_CICFGR 0x100
+#define INTCG_CIDSTR 0x1000
+
+#define INTCL_PICTLR 0x0
+#define INTCL_SIGR 0x60
+#define INTCL_HPPIR0x68
+#define INTCL_RDYIR0x6c
+#define INTCL_SENR 0xa0
+#define INTCL_CENR 0xa4
+#define INTCL_CACR 0xb4
+
+static DEFINE_PER_CPU(void __iomem *, intcl_reg);
+
+static void csky_mpintc_handler(struct pt_regs *regs)
+{
+ void __iomem *reg_base = this_cpu_read(intcl_reg);
+
+ do {
+ handle_domain_irq(root_domain,
+ readl_relaxed(reg_base + INTCL_RDYIR),
+ regs);
+ } while (readl_relaxed(reg_base + INTCL_HPPIR) & BIT(31));
+}
+
+static void csky_mpintc_enable(struct irq_data *d)
+{
+ void __iomem *reg_base = this_cpu_read(intcl_reg);
+
+ writel_relaxed(d->hwirq, reg_base + INTCL_SENR);
+}
+
+static void csky_mpintc_disable(struct irq_data *d)
+{
+ void __iomem *reg_base = this_cpu_read(intcl_reg);
+
+ writel_relaxed(d->hwirq, reg_base + INTCL_CENR);
+}
+
+static void csky_mpintc_eoi(struct irq_data *d)
+{
+ void __iomem *reg_base = this_cpu_read(intcl_reg);
+
+ writel_relaxed(d->hwirq, reg_base + INTCL_CACR);
+}
+
+#ifdef CONFIG_SMP
+static int csky_irq_set_affinity(struct irq_data *d,
+const struct cpumask *mask_val,
+bool force)
+{
+ unsigned int cpu;
+ unsigned int offset = 4 * (d->hwirq - COMM_IRQ_BASE);
+
+ if (!force)
+ cpu = cpumask_any_and(mask_val, cpu_online_mask);
+ else
+ cpu = cpumask_first(mask_val);
+
+ if (cpu >= nr_cpu_ids)
+ return -EINVAL;
+
+ /* Enable interrupt destination */
+ cpu |= BIT(31);
+
+ writel_relaxed(cpu, INTCG_base + INTCG_CIDSTR + offset);
+
+ irq_data_update_effective_affinity(d, cpumask_of(cpu));
+
+ return IRQ_SET_MASK_OK_DONE;
+}
+#endif
+
+static struct irq_chip csky_irq_chip = {
+ .name = "C-SKY SMP Intc",
+ .irq_eoi= csky_mpintc_eoi,
+ .irq_enable = csky_mpintc_enable,
+ .irq_disable= csky_mpintc_disable,
+#ifdef CONFIG_SMP
+
[PATCH V6 28/33] irqchip: add C-SKY APB bus interrupt controller
- irq-csky-apb-intc is a simple SOC interrupt controller which is
used in a lot of C-SKY CPU SOC products.
Changelog:
- use "bool ret" instead of "int ret"
- add support-pulse-signal in irq-csky-apb-intc.c
- change name with upstream feed-back
- add INTC_IFR to clear irq-pending
- remove CSKY_VECIRQ_LEGENCY
- change to generic irq chip framework
- add License and Copyright
- use irq_domain_add_linear instead of leagcy
Signed-off-by: Guo Ren
---
drivers/irqchip/Kconfig | 8 ++
drivers/irqchip/Makefile| 1 +
drivers/irqchip/irq-csky-apb-intc.c | 260
3 files changed, 269 insertions(+)
create mode 100644 drivers/irqchip/irq-csky-apb-intc.c
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 92e1c20..bf12549 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -379,6 +379,14 @@ config CSKY_MPINTC
for C-SKY SMP system. In fact it's not mmio map and it use ld/st
to visit the controller's register inside CPU.
+config CSKY_APB_INTC
+ bool "C-SKY APB Interrupt Controller"
+ depends on CSKY
+ help
+ Say yes here to enable C-SKY APB interrupt controller driver used
+ by C-SKY single core SOC system. It use mmio map apb-bus to visit
+ the controller's register.
+
endmenu
config SIFIVE_PLIC
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 6b739ea..72eaf53 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -88,4 +88,5 @@ obj-$(CONFIG_GOLDFISH_PIC)+= irq-goldfish-pic.o
obj-$(CONFIG_NDS32)+= irq-ativic32.o
obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o
obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o
+obj-$(CONFIG_CSKY_APB_INTC)+= irq-csky-apb-intc.o
obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
diff --git a/drivers/irqchip/irq-csky-apb-intc.c
b/drivers/irqchip/irq-csky-apb-intc.c
new file mode 100644
index 000..cfe32a7
--- /dev/null
+++ b/drivers/irqchip/irq-csky-apb-intc.c
@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INTC_IRQS 64
+
+#define CK_INTC_ICR0x00
+#define CK_INTC_PEN31_00 0x14
+#define CK_INTC_PEN63_32 0x2c
+#define CK_INTC_NEN31_00 0x10
+#define CK_INTC_NEN63_32 0x28
+#define CK_INTC_SOURCE 0x40
+#define CK_INTC_DUAL_BASE 0x100
+
+#define GX_INTC_PEN31_00 0x00
+#define GX_INTC_PEN63_32 0x04
+#define GX_INTC_NEN31_00 0x40
+#define GX_INTC_NEN63_32 0x44
+#define GX_INTC_NMASK31_00 0x50
+#define GX_INTC_NMASK63_32 0x54
+#define GX_INTC_SOURCE 0x60
+
+static void __iomem *reg_base;
+static struct irq_domain *root_domain;
+
+static int nr_irq = INTC_IRQS;
+
+/*
+ * When controller support pulse signal, the PEN_reg will hold on signal
+ * without software trigger.
+ *
+ * So, to support pulse signal we need to clear IFR_reg and the address of
+ * IFR_offset is NEN_offset - 8.
+ */
+static void irq_ck_mask_set_bit(struct irq_data *d)
+{
+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ struct irq_chip_type *ct = irq_data_get_chip_type(d);
+ unsigned long ifr = ct->regs.mask - 8;
+ u32 mask = d->mask;
+
+ irq_gc_lock(gc);
+ *ct->mask_cache |= mask;
+ irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask);
+ irq_reg_writel(gc, irq_reg_readl(gc, ifr) & ~mask, ifr);
+ irq_gc_unlock(gc);
+}
+
+static void __init ck_set_gc(struct device_node *node, void __iomem *reg_base,
+u32 mask_reg, u32 irq_base)
+{
+ struct irq_chip_generic *gc;
+
+ gc = irq_get_domain_generic_chip(root_domain, irq_base);
+ gc->reg_base = reg_base;
+ gc->chip_types[0].regs.mask = mask_reg;
+ gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
+ gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
+
+ if (of_find_property(node, "csky,support-pulse-signal", NULL))
+ gc->chip_types[0].chip.irq_unmask = irq_ck_mask_set_bit;
+}
+
+static inline u32 build_channel_val(u32 idx, u32 magic)
+{
+ u32 res;
+
+ /*
+* Set the same index for each channel
+*/
+ res = idx | (idx << 8) | (idx << 16) | (idx << 24);
+
+ /*
+* Set the channel magic number in descending order.
+* The magic is 0x00010203 for ck-intc
+* The magic is 0x03020100 for gx6605s-intc
+*/
+ return res | magic;
+}
+
+static inline void setup_irq_channel(u32 magic, void __iomem *reg_addr)
+{
+ u32 i;
+
+ /* Setup 64 channel slots */
+ fo
[PATCH V6 33/33] csky: use asm-generic/bitops/atomic.h for all
Specific implementation do not improve the performance, fall
back to asm-generic/bitops/atomic.h.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/bitops.h | 201 -
1 file changed, 201 deletions(-)
diff --git a/arch/csky/include/asm/bitops.h b/arch/csky/include/asm/bitops.h
index c9834f1..5d2640b 100644
--- a/arch/csky/include/asm/bitops.h
+++ b/arch/csky/include/asm/bitops.h
@@ -68,208 +68,7 @@ static __always_inline unsigned long __fls(unsigned long x)
#include
#include
#include
-
-#ifdef CONFIG_CPU_HAS_LDSTEX
-
-/*
- * set_bit - Atomically set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * This function is atomic and may not be reordered. See __set_bit()
- * if you do not require the atomic guarantees.
- *
- * Note: there are no guarantees that this function will not be reordered
- * on non x86 architectures, so if you are writing portable code,
- * make sure not to rely on its reordering guarantees.
- *
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static inline void set_bit(int nr, volatile unsigned long *addr)
-{
- unsigned long mask = BIT_MASK(nr);
- unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
- unsigned long tmp;
-
- /* *p |= mask; */
- smp_mb();
- asm volatile (
- "1: ldex.w %0, (%2)\n"
- " or32%0, %0, %1 \n"
- " stex.w %0, (%2)\n"
- " bez %0, 1b \n"
- : "=&r"(tmp)
- : "r"(mask), "r"(p)
- : "memory");
- smp_mb();
-}
-
-/**
- * clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * clear_bit() is atomic and may not be reordered. However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic()
- * in order to ensure changes are visible on other processors.
- */
-static inline void clear_bit(int nr, volatile unsigned long *addr)
-{
- unsigned long mask = BIT_MASK(nr);
- unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
- unsigned long tmp;
-
- /* *p &= ~mask; */
- mask = ~mask;
- smp_mb();
- asm volatile (
- "1: ldex.w %0, (%2)\n"
- " and32 %0, %0, %1 \n"
- " stex.w %0, (%2)\n"
- " bez %0, 1b \n"
- : "=&r"(tmp)
- : "r"(mask), "r"(p)
- : "memory");
- smp_mb();
-}
-
-/**
- * change_bit - Toggle a bit in memory
- * @nr: Bit to change
- * @addr: Address to start counting from
- *
- * change_bit() is atomic and may not be reordered. It may be
- * reordered on other architectures than x86.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static inline void change_bit(int nr, volatile unsigned long *addr)
-{
- unsigned long mask = BIT_MASK(nr);
- unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
- unsigned long tmp;
-
- /* *p ^= mask; */
- smp_mb();
- asm volatile (
- "1: ldex.w %0, (%2)\n"
- " xor32 %0, %0, %1 \n"
- " stex.w %0, (%2)\n"
- " bez %0, 1b \n"
- : "=&r"(tmp)
- : "r"(mask), "r"(p)
- : "memory");
- smp_mb();
-}
-
-/**
- * test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It may be reordered on other architectures than x86.
- * It also implies a memory barrier.
- */
-static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
-{
- unsigned long mask = BIT_MASK(nr);
- unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
- unsigned long old, tmp;
-
- /*
-* old = *p;
-* *p = old | mask;
-*/
- smp_mb();
- asm volatile (
- "1: ldex.w %1, (%3)\n"
- " mov %0, %1 \n"
- " or32%0, %0, %2 \n"
- " stex.w %0, (%3)\n"
- "
[PATCH V6 24/33] clocksource: add C-SKY SMP timer
This timer is used by SMP system and use mfcr/mtcr instruction
to access the regs.
Changelog:
- Remove #define CPUHP_AP_CSKY_TIMER_STARTING
- Add CPUHP_AP_CSKY_TIMER_STARTING in cpuhotplug.h
- Support csky mp timer alpha version.
- Just use low-counter with 32bit width as clocksource.
- Coding convention with upstream feed-back.
Signed-off-by: Guo Ren
---
drivers/clocksource/Kconfig| 8 ++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/csky_mptimer.c | 176 +
include/linux/cpuhotplug.h | 1 +
4 files changed, 186 insertions(+)
create mode 100644 drivers/clocksource/csky_mptimer.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a11f4ba..a28043f 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -620,4 +620,12 @@ config RISCV_TIMER
is accessed via both the SBI and the rdcycle instruction. This is
required for all RISC-V systems.
+config CSKY_MPTIMER
+ bool "C-SKY Multi Processor Timer"
+ depends on CSKY
+ select TIMER_OF
+ help
+ Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
+ system.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index db51b24..848c676 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -79,3 +79,4 @@ obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o
obj-$(CONFIG_X86_NUMACHIP) += numachip.o
obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
+obj-$(CONFIG_CSKY_MPTIMER) += csky_mptimer.o
diff --git a/drivers/clocksource/csky_mptimer.c
b/drivers/clocksource/csky_mptimer.c
new file mode 100644
index 000..9dc3cfb
--- /dev/null
+++ b/drivers/clocksource/csky_mptimer.c
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define PTIM_CCVR "cr<3, 14>"
+#define PTIM_CTLR "cr<0, 14>"
+#define PTIM_LVR "cr<6, 14>"
+#define PTIM_TSR "cr<1, 14>"
+
+static int csky_mptimer_set_next_event(unsigned long delta, struct
clock_event_device *ce)
+{
+ mtcr(PTIM_LVR, delta);
+
+ return 0;
+}
+
+static int csky_mptimer_shutdown(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static int csky_mptimer_oneshot(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 1);
+
+ return 0;
+}
+
+static int csky_mptimer_oneshot_stopped(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static DEFINE_PER_CPU(struct timer_of, csky_to) = {
+ .flags = TIMER_OF_CLOCK,
+ .clkevt = {
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERCPU |
+ CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = csky_mptimer_shutdown,
+ .set_state_oneshot = csky_mptimer_oneshot,
+ .set_state_oneshot_stopped = csky_mptimer_oneshot_stopped,
+ .set_next_event = csky_mptimer_set_next_event,
+ },
+ .of_irq = {
+ .flags = IRQF_TIMER,
+ .percpu = 1,
+ },
+};
+
+static irqreturn_t timer_interrupt(int irq, void *dev)
+{
+ struct timer_of *to = this_cpu_ptr(&csky_to);
+
+ mtcr(PTIM_TSR, 0);
+
+ to->clkevt.event_handler(&to->clkevt);
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * clock event for percpu
+ */
+static int csky_mptimer_starting_cpu(unsigned int cpu)
+{
+ struct timer_of *to = per_cpu_ptr(&csky_to, cpu);
+
+ to->clkevt.cpumask = cpumask_of(cpu);
+
+ clockevents_config_and_register(&to->clkevt, timer_of_rate(to), 2,
ULONG_MAX);
+
+ enable_percpu_irq(timer_of_irq(to), 0);
+
+ return 0;
+}
+
+static int csky_mptimer_dying_cpu(unsigned int cpu)
+{
+ struct timer_of *to = per_cpu_ptr(&csky_to, cpu);
+
+ disable_percpu_irq(timer_of_irq(to));
+
+ return 0;
+}
+
+/*
+ * clock source
+ */
+static u64 sched_clock_read(void)
+{
+ return (u64) mfcr(PTIM_CCVR);
+}
+
+static u64 clksrc_read(struct clocksource *c)
+{
+ return (u64) mfcr(PTIM_CCVR);
+}
+
+struct clocksource csky_clocksource = {
+ .name = "csky",
+ .rating = 400,
+ .mask = CLOCKSOURCE_MASK(32),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+ .read = clksrc_read,
+};
+
+static int __init csky_mptimer_init(struct device_node *np)
+{
+ int ret, cpu;
+ struct
[PATCH V6 23/33] dt-bindings: interrupt-controller: C-SKY SMP intc
- Dt-bindings doc about C-SKY Multi-processors interrupt controller.
Signed-off-by: Guo Ren
---
.../bindings/interrupt-controller/csky,mpintc.txt | 40 ++
1 file changed, 40 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
new file mode 100644
index 000..9cdad74
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
@@ -0,0 +1,40 @@
+===
+C-SKY Multi-processors Interrupt Controller
+===
+
+C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
+SMP soc, and it also could be used in non-SMP system.
+
+Interrupt number definition:
+
+ 0-15 : software irq, and we use 15 as our IPI_IRQ.
+ 16-31 : private irq, and we use 16 as the co-processor timer.
+ 31-1024: common irq for soc ip.
+
+=
+intc node bindings definition
+=
+
+ Description: Describes SMP interrupt controller
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,mpintc"
+ - interrupt-cells
+ Usage: required
+ Value type:
+ Definition: must be <1>
+ - interrupt-controller:
+ Usage: required
+
+Examples:
+-
+
+ intc: interrupt-controller {
+ compatible = "csky,mpintc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
--
2.7.4
[PATCH V6 21/33] csky: remove irq_mapping from smp.c
There are some feedbacks from irqchip, and we need to adjust "smp.c & smp.h"
to match the csky_mptimer modification.
- Move IPI_IRQ define into drivers/irqchip/csky_mpintc.c, because it's a
interrupt controller specific.
- Bugfix request_irq with IPI_IRQ, we must use irq_mapping return value not
directly use IPI_IRQ. The modification also involves csky_mpintc.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/smp.h | 4 +++-
arch/csky/kernel/smp.c | 27 +++
2 files changed, 22 insertions(+), 9 deletions(-)
diff --git a/arch/csky/include/asm/smp.h b/arch/csky/include/asm/smp.h
index 9a53abf..f3e4f24 100644
--- a/arch/csky/include/asm/smp.h
+++ b/arch/csky/include/asm/smp.h
@@ -17,7 +17,9 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
void arch_send_call_function_single_ipi(int cpu);
-void __init set_send_ipi(void (*func)(const unsigned long *, unsigned long));
+void __init set_send_ipi(void (*func)(const unsigned long *));
+
+void __init set_ipi_irq_mapping(int (*func)(void));
#define raw_smp_processor_id() (current_thread_info()->cpu)
diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
index 522c73f..14877e2 100644
--- a/arch/csky/kernel/smp.c
+++ b/arch/csky/kernel/smp.c
@@ -20,8 +20,6 @@
#include
#include
-#define IPI_IRQ15
-
static struct {
unsigned long bits cacheline_aligned;
} ipi_data[NR_CPUS] __cacheline_aligned;
@@ -56,9 +54,9 @@ static irqreturn_t handle_ipi(int irq, void *dev)
return IRQ_HANDLED;
}
-static void (*send_arch_ipi)(const unsigned long *mask, unsigned long irq) =
NULL;
+static void (*send_arch_ipi)(const unsigned long *mask) = NULL;
-void __init set_send_ipi(void (*func)(const unsigned long *, unsigned long))
+void __init set_send_ipi(void (*func)(const unsigned long *))
{
if (send_arch_ipi)
return;
@@ -75,7 +73,7 @@ send_ipi_message(const struct cpumask *to_whom, enum
ipi_message_type operation)
set_bit(operation, &ipi_data[i].bits);
smp_mb();
- send_arch_ipi(cpumask_bits(to_whom), IPI_IRQ);
+ send_arch_ipi(cpumask_bits(to_whom));
}
void arch_send_call_function_ipi_mask(struct cpumask *mask)
@@ -115,19 +113,32 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
}
static int ipi_dummy_dev;
+static int ipi_irq;
void __init enable_smp_ipi(void)
{
- enable_percpu_irq(IPI_IRQ, 0);
+ enable_percpu_irq(ipi_irq, 0);
+}
+
+static int (*arch_ipi_irq_mapping)(void) = NULL;
+
+void __init set_ipi_irq_mapping(int (*func)(void))
+{
+ if (arch_ipi_irq_mapping)
+ return;
+
+ arch_ipi_irq_mapping = func;
}
void __init setup_smp_ipi(void)
{
int rc;
- irq_create_mapping(NULL, IPI_IRQ);
+ ipi_irq = arch_ipi_irq_mapping();
+ if (ipi_irq == 0)
+ panic("%s IRQ mapping failed\n", __func__);
- rc = request_percpu_irq(IPI_IRQ, handle_ipi, "IPI Interrupt",
&ipi_dummy_dev);
+ rc = request_percpu_irq(ipi_irq, handle_ipi, "IPI Interrupt",
&ipi_dummy_dev);
if (rc)
panic("%s IRQ request failed\n", __func__);
--
2.7.4
[PATCH V6 27/33] dt-bindings: interrupt-controller: C-SKY APB intc
- Dt-bindings doc about C-SKY apb bus interrupt controller.
Signed-off-by: Guo Ren
---
.../interrupt-controller/csky,apb-intc.txt | 62 ++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
new file mode 100644
index 000..44286dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
@@ -0,0 +1,62 @@
+==
+C-SKY APB Interrupt Controller
+==
+
+C-SKY APB Interrupt Controller is a simple soc interrupt controller
+on the apb bus and we only use it as root irq controller.
+
+ - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq
nums.
+ - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.
+ - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq
nums.
+
+=
+intc node bindings definition
+=
+
+ Description: Describes APB interrupt controller
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,apb-intc"
+ "csky,dual-apb-intc"
+ "csky,gx6605s-intc"
+ - #interrupt-cells
+ Usage: required
+ Value type:
+ Definition: must be <1>
+ - reg
+ Usage: required
+ Value type:
+ Definition: in soc from cpu view
+ - interrupt-controller:
+ Usage: required
+ - csky,support-pulse-signal:
+ Usage: select
+ Description: to support pulse signal flag
+
+Examples:
+-
+
+ intc: interrupt-controller@50 {
+ compatible = "csky,apb-intc";
+ #interrupt-cells = <1>;
+ reg = <0x0050 0x400>;
+ interrupt-controller;
+ };
+
+ intc: interrupt-controller@50 {
+ compatible = "csky,dual-apb-intc";
+ #interrupt-cells = <1>;
+ reg = <0x0050 0x400>;
+ interrupt-controller;
+ };
+
+ intc: interrupt-controller@50 {
+ compatible = "csky,gx6605s-intc";
+ #interrupt-cells = <1>;
+ reg = <0x0050 0x400>;
+ interrupt-controller;
+ };
--
2.7.4
[PATCH V6 19/33] dt-bindings: Add vendor prefix for csky
Add csky vendor definition. Signed-off-by: Guo Ren --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 2c3fc51..a728ee3 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -84,6 +84,7 @@ cosmicCosmic Circuits crane Crane Connectivity Solutions creative Creative Technology Ltd crystalfontz Crystalfontz America, Inc. +csky Hangzhou C-SKY Microsystems Co., Ltd cubietech Cubietech, Ltd. cypressCypress Semiconductor Corporation cznic CZ.NIC, z.s.p.o. -- 2.7.4
[PATCH V6 25/33] dt-bindings: timer: C-SKY Multi-processor timer
- Dt-bingdings doc for C-SKY SMP system setting.
Signed-off-by: Guo Ren
---
.../devicetree/bindings/timer/csky,mptimer.txt | 46 ++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/csky,mptimer.txt
diff --git a/Documentation/devicetree/bindings/timer/csky,mptimer.txt
b/Documentation/devicetree/bindings/timer/csky,mptimer.txt
new file mode 100644
index 000..1e7e31d
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/csky,mptimer.txt
@@ -0,0 +1,46 @@
+
+C-SKY Multi-processors Timer
+
+
+C-SKY multi-processors timer is designed for C-SKY SMP system and the
+regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
+
+ - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
+ - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
+ - PTIM_CCVR "cr<3, 14>" Current counter value reg.
+ - PTIM_LVR "cr<6, 14>" Window value reg to triger next event.
+
+==
+timer node bindings definition
+==
+
+ Description: Describes SMP timer
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,mptimer"
+ - clocks
+ Usage: required
+ Value type:
+ Definition: must be input clk node
+ - interrupts
+ Usage: required
+ Value type:
+ Definition: must be timer irq num defined by soc
+ - interrupt-parent:
+ Usage: required
+ Value type:
+ Definition: must be interrupt controller node
+
+Examples:
+-
+
+ timer: timer {
+ compatible = "csky,mptimer";
+ clocks = <&dummy_apb_clk>;
+ interrupts = <16>;
+ interrupt-parent = <&intc>;
+ };
--
2.7.4
[PATCH V6 31/33] csky: fix compile error in linux/bug.h with SMP enabled
In linux-4.19 we couldn't include linux/bug.h here when SMP enabled.
It'll cause compile error for bad include.
In file included from ./arch/csky/include/asm/bitops.h:70:0,
from ./include/linux/bitops.h:19,
from ./include/linux/kernel.h:11,
from ./include/asm-generic/bug.h:18,
from ./arch/csky/include/asm/bug.h:19,
from ./include/linux/bug.h:5,
from ./arch/csky/include/asm/cmpxchg.h:6,
from ./arch/csky/include/asm/atomic.h:8,
from ./include/linux/atomic.h:7,
from ./include/linux/rcupdate.h:38,
from ./include/linux/init_task.h:5,
from init/init_task.c:2:
The asm/bitops.h will lose asm/atomic.h for cycle include.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/cmpxchg.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/csky/include/asm/cmpxchg.h b/arch/csky/include/asm/cmpxchg.h
index 9b63dd7..ad53006 100644
--- a/arch/csky/include/asm/cmpxchg.h
+++ b/arch/csky/include/asm/cmpxchg.h
@@ -2,9 +2,10 @@
#define __ASM_CSKY_CMPXCHG_H
#ifdef CONFIG_CPU_HAS_LDSTEX
-#include
#include
+extern void __bad_xchg(volatile void *ptr, int size);
+
#define __xchg(new, ptr, size) \
({ \
__typeof__(ptr) __ptr = (ptr); \
@@ -25,7 +26,7 @@
smp_mb(); \
break; \
default:\
- BUILD_BUG();\
+ __bad_xchg(ptr, size), __ret = 0; \
} \
__ret; \
})
@@ -56,7 +57,7 @@
smp_mb(); \
break; \
default:\
- BUILD_BUG();\
+ __bad_xchg(ptr, size), __ret = 0; \
} \
__ret; \
})
--
2.7.4
[PATCH V6 30/33] clocksource: add gx6605s SOC system timer
Changelog:
- Add License and Copyright
- Use timer-of framework
- Change name with upstream feedback
- Use clksource_mmio framework
Signed-off-by: Guo Ren
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource/Makefile| 1 +
drivers/clocksource/timer-gx6605s.c | 150
3 files changed, 159 insertions(+)
create mode 100644 drivers/clocksource/timer-gx6605s.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a28043f..0f38acc 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -628,4 +628,12 @@ config CSKY_MPTIMER
Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
system.
+config GX6605S_TIMER
+ bool "Gx6605s SOC system timer driver"
+ depends on CSKY
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ This option enables support for gx6605s SOC's timer.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 848c676..7a1b0f4 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -80,3 +80,4 @@ obj-$(CONFIG_X86_NUMACHIP)+= numachip.o
obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
obj-$(CONFIG_CSKY_MPTIMER) += csky_mptimer.o
+obj-$(CONFIG_GX6605S_TIMER)+= timer-gx6605s.o
diff --git a/drivers/clocksource/timer-gx6605s.c
b/drivers/clocksource/timer-gx6605s.c
new file mode 100644
index 000..10194c9
--- /dev/null
+++ b/drivers/clocksource/timer-gx6605s.c
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define CLKSRC_OFFSET 0x40
+
+#define TIMER_STATUS 0x00
+#define TIMER_VALUE0x04
+#define TIMER_CONTRL 0x10
+#define TIMER_CONFIG 0x20
+#define TIMER_DIV 0x24
+#define TIMER_INI 0x28
+
+#define GX6605S_STATUS_CLR BIT(0)
+#define GX6605S_CONTRL_RST BIT(0)
+#define GX6605S_CONTRL_START BIT(1)
+#define GX6605S_CONFIG_EN BIT(0)
+#define GX6605S_CONFIG_IRQ_EN BIT(1)
+
+static irqreturn_t gx6605s_timer_interrupt(int irq, void *dev)
+{
+ struct clock_event_device *ce = (struct clock_event_device *) dev;
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS);
+
+ ce->event_handler(ce);
+
+ return IRQ_HANDLED;
+}
+
+static int gx6605s_timer_set_oneshot(struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ /* reset and stop counter */
+ writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL);
+
+ /* enable with irq and start */
+ writel_relaxed(GX6605S_CONFIG_EN | GX6605S_CONFIG_IRQ_EN, base +
TIMER_CONFIG);
+
+ return 0;
+}
+
+static int gx6605s_timer_set_next_event(unsigned long delta, struct
clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ /* use reset to pause timer */
+ writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL);
+
+ /* config next timeout value */
+ writel_relaxed(ULONG_MAX - delta, base + TIMER_INI);
+ writel_relaxed(GX6605S_CONTRL_START, base + TIMER_CONTRL);
+
+ return 0;
+}
+
+static int gx6605s_timer_shutdown(struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ writel_relaxed(0, base + TIMER_CONTRL);
+ writel_relaxed(0, base + TIMER_CONFIG);
+
+ return 0;
+}
+
+static struct timer_of to = {
+ .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
+ .clkevt = {
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_DYNIRQ |
+ CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = gx6605s_timer_shutdown,
+ .set_state_oneshot = gx6605s_timer_set_oneshot,
+ .set_next_event = gx6605s_timer_set_next_event,
+ .cpumask= cpu_possible_mask,
+ },
+ .of_irq = {
+ .handler= gx6605s_timer_interrupt,
+ .flags = IRQF_TIMER | IRQF_IRQPOLL,
+ },
+};
+
+static u64 notrace gx6605s_sched_clock_read(void)
+{
+ void __iomem *base;
+
+ base = timer_of_base(&to) + CLKSRC_OFFSET;
+
+ return (u64) readl_relaxed(base + TIMER_VALUE);
+}
+
+static void gx6605s_clkevt_init(void __iomem *base)
+{
+ writel_relaxed(0, base + TIMER_DIV);
+ writel_relaxed(0, base + TIMER_CONFIG);
+
+ clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 2,
ULONG_MAX);
+}
+
+static int gx6605s_clksrc_init(void __iomem *base)
+{
+ writel_relaxed(0, base + TIMER_DIV);
+
[PATCH V6 29/33] dt-bindings: timer: gx6605s SOC timer
- Dt-bindings doc for gx6605s SOC's system timer.
Signed-off-by: Guo Ren
Reviewed-by: Rob Herring
---
.../bindings/timer/csky,gx6605s-timer.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
new file mode 100644
index 000..6b04344
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
@@ -0,0 +1,42 @@
+=
+gx6605s SOC Timer
+=
+
+The timer is used in gx6605s soc as system timer and the driver
+contain clk event and clk source.
+
+==
+timer node bindings definition
+==
+
+ Description: Describes gx6605s SOC timer
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,gx6605s-timer"
+ - reg
+ Usage: required
+ Value type:
+ Definition: in soc from cpu view
+ - clocks
+ Usage: required
+ Value type: phandle + clock specifier cells
+ Definition: must be input clk node
+ - interrupt
+ Usage: required
+ Value type:
+ Definition: must be timer irq num defined by soc
+
+Examples:
+-
+
+ timer0: timer@20a000 {
+ compatible = "csky,gx6605s-timer";
+ reg = <0x0020a000 0x400>;
+ clocks = <&dummy_apb_clk>;
+ interrupts = <10>;
+ interrupt-parent = <&intc>;
+ };
--
2.7.4
[PATCH V6 32/33] csky: fix flush_cache_range and tlb_start_vma
In flush_cache_range(vma, ...) cache_wbinv_range() couldn't deal with
vma->mm's asid for cache_flush_line. So we use cache_wbinv_all() first
and we'll improve with cache_flush(vma, start, end) in future.
For tlb_start_vma, we make it the same as other arch.
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/cacheflush.h | 6 +-
arch/csky/abiv1/inc/abi/tlb.h| 2 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h
b/arch/csky/abiv1/inc/abi/cacheflush.h
index f0de49c..4ae81b0 100644
--- a/arch/csky/abiv1/inc/abi/cacheflush.h
+++ b/arch/csky/abiv1/inc/abi/cacheflush.h
@@ -15,7 +15,11 @@ extern void flush_dcache_page(struct page *);
#define flush_cache_page(vma,page,pfn) cache_wbinv_all()
#define flush_cache_dup_mm(mm) cache_wbinv_all()
-#define flush_cache_range(mm,start,end)cache_wbinv_range(start, end)
+/*
+ * if (current_mm != vma->mm) cache_wbinv_range(start, end) will be broken.
+ * Use cache_wbinv_all() here and need to be improved in future.
+ */
+#define flush_cache_range(vma,start,end) cache_wbinv_all()
#define flush_cache_vmap(start, end) cache_wbinv_range(start, end)
#define flush_cache_vunmap(start, end) cache_wbinv_range(start, end)
diff --git a/arch/csky/abiv1/inc/abi/tlb.h b/arch/csky/abiv1/inc/abi/tlb.h
index 6d461f3..3b9d6d9 100644
--- a/arch/csky/abiv1/inc/abi/tlb.h
+++ b/arch/csky/abiv1/inc/abi/tlb.h
@@ -7,6 +7,6 @@
#define tlb_start_vma(tlb, vma) \
do { \
if (!tlb->fullmm) \
- cache_wbinv_all(); \
+ flush_cache_range(vma, vma->vm_start, vma->vm_end); \
} while (0)
#endif /* __ABI_CSKY_TLB_H */
--
2.7.4
Re: [PATCH V5 18/30] dt-bindings: csky CPU Bindings
On Thu, Sep 27, 2018 at 11:43:17AM -0500, Rob Herring wrote: > On Tue, Sep 25, 2018 at 07:39:21AM +0800, Guo Ren wrote: > > This patch adds the documentation to describe that how to add cpu nodes in > > dts for SMP. > > > > Signed-off-by: Guo Ren > > --- > > Documentation/devicetree/bindings/csky/cpus.txt | 70 > > + > > 1 file changed, 70 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/csky/cpus.txt > > > > diff --git a/Documentation/devicetree/bindings/csky/cpus.txt > > b/Documentation/devicetree/bindings/csky/cpus.txt > > new file mode 100644 > > index 000..ee3901d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/csky/cpus.txt > > @@ -0,0 +1,70 @@ > > +== > > +C-SKY CPU Bindings > > +== > > + > > +The device tree allows to describe the layout of CPUs in a system through > > +the "cpus" node, which in turn contains a number of subnodes (ie "cpu") > > +defining properties for every cpu. > > + > > +Only SMP system need to care about the cpus node and single processor > > +needn't define cpus node at all. > > We've generally found this is not true. Even for single core, you can > have power domains, clocks for DVFS, etc. Ok, I'll remove it. > > > + > > += > > +cpus and cpu node bindings definition > > += > > + > > +- cpus node > > + > > +Description: Container of cpu nodes > > + > > +The node name must be "cpus". > > + > > +A cpus node must define the following properties: > > + > > +- #address-cells > > +Usage: required > > +Value type: > > +Definition: must be set to 1 > > +- #size-cells > > +Usage: required > > +Value type: > > +Definition: must be set to 0 > > + > > +- cpu node > > + > > +Description: Describes one of SMP cores > > + > > +PROPERTIES > > + > > You need a compatible property for cpu nodes. Our cpu is defined in defconfig, not in dts. I could put a comatible property in here, but it's no use in code. > > > +- device_type > > +Usage: required > > +Value type: > > +Definition: must be "cpu" > > +- reg > > +Usage: required > > +Value type: > > +Definition: CPU index > > +- status: > > You don't need to document status here. ok, remove the status description. Best Regards Guo Ren
Re: [PATCH V5 23/30] dt-bindings: interrupt-controller: C-SKY SMP intc
On Thu, Sep 27, 2018 at 11:50:44AM -0500, Rob Herring wrote: > On Tue, Sep 25, 2018 at 07:39:26AM +0800, Guo Ren wrote: > > - Dt-bindings doc about C-SKY Multi-processors interrupt controller. > > > > Signed-off-by: Guo Ren > > --- > > .../bindings/interrupt-controller/csky,mpintc.txt | 40 > > ++ > > 1 file changed, 40 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt > > > > diff --git > > a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt > > b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt > > new file mode 100644 > > index 000..9cdad74 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt > > @@ -0,0 +1,40 @@ > > +=== > > +C-SKY Multi-processors Interrupt Controller > > +=== > > + > > +C-SKY Multi-processors Interrupt Controller is designed for > > ck807/ck810/ck860 > > +SMP soc, and it also could be used in non-SMP system. > > + > > +Interrupt number definition: > > + > > + 0-15 : software irq, and we use 15 as our IPI_IRQ. > > + 16-31 : private irq, and we use 16 as the co-processor timer. > > + 31-1024: common irq for soc ip. > > + > > += > > +intc node bindings definition > > += > > + > > + Description: Describes SMP interrupt controller > > + > > + PROPERTIES > > + > > + - compatible > > + Usage: required > > + Value type: > > + Definition: must be "csky,mpintc" > > Only 1 version? Currently, one version. Only one csky,mpintc. > > This is fine for a fallback, but you should have an SoC specific > compatible too in case there are any SoC specific errata/quirks. No SoC specific in fact currently. If necessary we could add it in future. > > > + - interrupt-cells > > Should be: #interrupt-cells Yes, I'll fix it.
Re: [PATCH V5 18/30] dt-bindings: csky CPU Bindings
On Fri, Sep 28, 2018 at 06:32:34AM -0500, Rob Herring wrote: > On Thu, Sep 27, 2018 at 8:03 PM Guo Ren wrote: > > > > On Thu, Sep 27, 2018 at 11:43:17AM -0500, Rob Herring wrote: > > > On Tue, Sep 25, 2018 at 07:39:21AM +0800, Guo Ren wrote: > > > > This patch adds the documentation to describe that how to add cpu nodes > > > > in > > > > dts for SMP. > > > > > > > > Signed-off-by: Guo Ren > > > > --- > > > > Documentation/devicetree/bindings/csky/cpus.txt | 70 > > > > + > > > > 1 file changed, 70 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/csky/cpus.txt > > > > > > > > diff --git a/Documentation/devicetree/bindings/csky/cpus.txt > > > > b/Documentation/devicetree/bindings/csky/cpus.txt > > > > new file mode 100644 > > > > index 000..ee3901d > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/csky/cpus.txt > > > > @@ -0,0 +1,70 @@ > > > > +== > > > > +C-SKY CPU Bindings > > > > +== > > > > + > > > > +The device tree allows to describe the layout of CPUs in a system > > > > through > > > > +the "cpus" node, which in turn contains a number of subnodes (ie "cpu") > > > > +defining properties for every cpu. > > > > + > > > > +Only SMP system need to care about the cpus node and single processor > > > > +needn't define cpus node at all. > > > > > > We've generally found this is not true. Even for single core, you can > > > have power domains, clocks for DVFS, etc. > > Ok, I'll remove it. > > > > > > > > > + > > > > += > > > > +cpus and cpu node bindings definition > > > > += > > > > + > > > > +- cpus node > > > > + > > > > +Description: Container of cpu nodes > > > > + > > > > +The node name must be "cpus". > > > > + > > > > +A cpus node must define the following properties: > > > > + > > > > +- #address-cells > > > > +Usage: required > > > > +Value type: > > > > +Definition: must be set to 1 > > > > +- #size-cells > > > > +Usage: required > > > > +Value type: > > > > +Definition: must be set to 0 > > > > + > > > > +- cpu node > > > > + > > > > +Description: Describes one of SMP cores > > > > + > > > > +PROPERTIES > > > > + > > > > > > You need a compatible property for cpu nodes. > > Our cpu is defined in defconfig, not in dts. I could put a comatible > > property in here, but it's no use in code. > > It doesn't matter as that could change. Most arches do run-time > selection of cpus within a range of compatible cores. > > And read the DT spec (devicetree.org) which says compatible is > required for cpu nodes. Ok, follow the rules. Here is my design.. - compatible: Usage: required Value type: Definition: csky,: "csky,610" "csky,807" "csky,810" "csky,860" Best Regards Guo Ren
Re: [PATCH V6 07/33] csky: MMU and page table management
On Thu, Sep 27, 2018 at 08:47:33AM -0700, Christoph Hellwig wrote:
> > +static void *csky_dma_alloc_atomic(
> > + struct device *dev,
> > + size_t size,
> > + dma_addr_t *dma_handle
> > + )
>
> Can you please use normal kernel coding style? Closing brace on the
> same line, either two tab indents for the arguments or align them to the
> first argument:
>
> static void *csky_dma_alloc_atomic(struct device *dev, size_t size,
> dma_addr_t *dma_handle)
>
> or:
>
> static void *csky_dma_alloc_atomic(struct device *dev, size_t size,
> dma_addr_t *dma_handle)
Ok.
>
> > + if (DMA_ATTR_NON_CONSISTENT & attrs)
> > + BUG();
>
> Please don't bug on unknown attributs, they can be safely ignored.
Ok.
>
> > +void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
> > + size_t size, enum dma_data_direction dir)
> > +{
> > + struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
> > + unsigned long offset = paddr & ~PAGE_MASK;
> > + unsigned long vaddr;
> > +
> > + if (PageHighMem(page))
> > + vaddr = (unsigned long) kmap_atomic(page);
>
> This isn't going to work as the size might be larger than PAGE_SIZE.
Yes, you are right. I must fix it up. Thank you
Best Regards
Guo Ren
Re: [PATCH V6 10/33] csky: IRQ handling
On Thu, Sep 27, 2018 at 08:49:18AM -0700, Christoph Hellwig wrote: > > --- /dev/null > > +++ b/arch/csky/include/asm/irq.h > > @@ -0,0 +1,9 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. > > + > > +#ifndef __ASM_CSKY_IRQ_H > > +#define __ASM_CSKY_IRQ_H > > + > > +#include > > + > > +#endif /* __ASM_CSKY_IRQ_H */ > > Just wire this up using generic-y in the Kbuild file instead of > creating a wrapper. (Same for any other header which is a trivial > asm-generic wrapper). Ok.
Re: [PATCH V6 08/33] csky: Process management and Signal
On Thu, Sep 27, 2018 at 09:50:43PM +0200, Eric W. Biederman wrote:
> Guo Ren writes:
>
> > --- /dev/null
> > +++ b/arch/csky/abiv2/fpu.c
> > +void fpu_fpe(struct pt_regs * regs)
> > +{
> > + int sig;
> > + unsigned int fesr;
> > + siginfo_t info;
> > +
> > + fesr = mfcr("cr<2, 2>");
> > +
> > + if(fesr & FPE_ILLE){
> > + info.si_code = ILL_ILLOPC;
> > + sig = SIGILL;
> > + }
> > + else if(fesr & FPE_IDC){
> > + info.si_code = ILL_ILLOPN;
> > + sig = SIGILL;
> > + }
> > + else if(fesr & FPE_FEC){
> > + sig = SIGFPE;
> > + if(fesr & FPE_IOC){
> > + info.si_code = FPE_FLTINV;
> > + }
> > + else if(fesr & FPE_DZC){
> > + info.si_code = FPE_FLTDIV;
> > + }
> > + else if(fesr & FPE_UFC){
> > + info.si_code = FPE_FLTUND;
> > + }
> > + else if(fesr & FPE_OFC){
> > + info.si_code = FPE_FLTOVF;
> > + }
> > + else if(fesr & FPE_IXC){
> > + info.si_code = FPE_FLTRES;
> > + }
> > + else {
> > + info.si_code = NSIGFPE;
> > + }
> > + }
> > + else {
> > + info.si_code = NSIGFPE;
> > + sig = SIGFPE;
> > + }
> > + info.si_signo = SIGFPE;
> > + info.si_errno = 0;
> > + info.si_addr = (void *)regs->pc;
> > + force_sig_info(sig, &info, current);
> > +}
>
>
> This use of sending a signal is buggy. It results in undefined values
> being copied to userspace.
>
> Userspace should never be sent NSIGXXX as a si_code. You can use
> FPE_FLTUNK for this default case.
Ok, thx for the tips. I'll fix it up in next patch-set.
> In new code please use force_sig_fault instead of force_sig_info in new
> code. That saves you the trouble of messing with struct siginfo.
Ok, got it. Thx
Best Regards
Guo Ren
Re: [PATCH V6 20/33] csky/dma: fix up dma_mapping error
On Fri, Sep 28, 2018 at 09:21:16AM -0700, Christoph Hellwig wrote: > On Fri, Sep 28, 2018 at 08:51:17AM +0800, Guo Ren wrote: > > The arch_sync_dma_for_cpu()/arch_sync_dma_for_device() implementation is > > broken for some combinations that end up in a BUG() instead of performing > > the necessary flushes. > > This should be folded into the original patch adding this code. Ok, I'll rebase it.
Re: [PATCH V6 13/33] csky: Library functions
On Fri, Sep 28, 2018 at 09:20:30AM -0700, Christoph Hellwig wrote:
> > +unsigned long long notrace __bswapdi2(unsigned long long u)
> > +{
> > + return (((u) & 0xff00ull) >> 56) |
> > + (((u) & 0x00ffull) >> 40) |
> > + (((u) & 0xff00ull) >> 24) |
> > + (((u) & 0x00ffull) >> 8) |
> > + (((u) & 0xff00ull) << 8) |
> > + (((u) & 0x00ffull) << 24) |
> > + (((u) & 0xff00ull) << 40) |
> > + (((u) & 0x00ffull) << 56);
> > +}
>
> How is this any better than using the generic byteswap helpers?
OK.
#include
unsigned long long notrace __bswapdi2(unsigned long long u)
{
return ___constant_swab64(u);
>
> > +unsigned int notrace __bswapsi2(unsigned int u)
> > +{
> > + return (((u) & 0xff00) >> 24) |
> > + (((u) & 0x00ff) >> 8) |
> > + (((u) & 0xff00) << 8) |
> > + (((u) & 0x00ff) << 24);
> > +}
>
> Same here.
OK.
#include
unsigned int notrace __bswapsi2(unsigned int u)
{
return ___constant_swab32(u);
}
Thx
Guo Ren
Re: [PATCH V6 10/33] csky: IRQ handling
On Thu, Sep 27, 2018 at 08:49:18AM -0700, Christoph Hellwig wrote: > > --- /dev/null > > +++ b/arch/csky/include/asm/irq.h > > @@ -0,0 +1,9 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. > > + > > +#ifndef __ASM_CSKY_IRQ_H > > +#define __ASM_CSKY_IRQ_H > > + > > +#include > > + > > +#endif /* __ASM_CSKY_IRQ_H */ > > Just wire this up using generic-y in the Kbuild file instead of > creating a wrapper. (Same for any other header which is a trivial > asm-generic wrapper). Ok.
Re: [PATCH V6 08/33] csky: Process management and Signal
On Thu, Sep 27, 2018 at 09:50:43PM +0200, Eric W. Biederman wrote:
> Guo Ren writes:
>
> > --- /dev/null
> > +++ b/arch/csky/abiv2/fpu.c
> > +void fpu_fpe(struct pt_regs * regs)
> > +{
> > + int sig;
> > + unsigned int fesr;
> > + siginfo_t info;
> > +
> > + fesr = mfcr("cr<2, 2>");
> > +
> > + if(fesr & FPE_ILLE){
> > + info.si_code = ILL_ILLOPC;
> > + sig = SIGILL;
> > + }
> > + else if(fesr & FPE_IDC){
> > + info.si_code = ILL_ILLOPN;
> > + sig = SIGILL;
> > + }
> > + else if(fesr & FPE_FEC){
> > + sig = SIGFPE;
> > + if(fesr & FPE_IOC){
> > + info.si_code = FPE_FLTINV;
> > + }
> > + else if(fesr & FPE_DZC){
> > + info.si_code = FPE_FLTDIV;
> > + }
> > + else if(fesr & FPE_UFC){
> > + info.si_code = FPE_FLTUND;
> > + }
> > + else if(fesr & FPE_OFC){
> > + info.si_code = FPE_FLTOVF;
> > + }
> > + else if(fesr & FPE_IXC){
> > + info.si_code = FPE_FLTRES;
> > + }
> > + else {
> > + info.si_code = NSIGFPE;
> > + }
> > + }
> > + else {
> > + info.si_code = NSIGFPE;
> > + sig = SIGFPE;
> > + }
> > + info.si_signo = SIGFPE;
> > + info.si_errno = 0;
> > + info.si_addr = (void *)regs->pc;
> > + force_sig_info(sig, &info, current);
> > +}
>
>
> This use of sending a signal is buggy. It results in undefined values
> being copied to userspace.
>
> Userspace should never be sent NSIGXXX as a si_code. You can use
> FPE_FLTUNK for this default case.
>
> In new code please use force_sig_fault instead of force_sig_info in new
> code. That saves you the trouble of messing with struct siginfo.
Ok, I'll check and USE FPE_FLTUNK and force_sig_fault instead.
Best Regards
Guo Ren
Re: [PATCH V6 07/33] csky: MMU and page table management
On Thu, Sep 27, 2018 at 08:47:33AM -0700, Christoph Hellwig wrote:
> > +static void *csky_dma_alloc_atomic(
> > + struct device *dev,
> > + size_t size,
> > + dma_addr_t *dma_handle
> > + )
>
> Can you please use normal kernel coding style? Closing brace on the
> same line, either two tab indents for the arguments or align them to the
> first argument:
>
> static void *csky_dma_alloc_atomic(struct device *dev, size_t size,
> dma_addr_t *dma_handle)
>
> or:
>
> static void *csky_dma_alloc_atomic(struct device *dev, size_t size,
> dma_addr_t *dma_handle)
OK, I like 2th.
> > + if (DMA_ATTR_NON_CONSISTENT & attrs)
> > + BUG();
>
> Please don't bug on unknown attributs, they can be safely ignored.
No BUG(), return NULL.
>
> > +void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
> > + size_t size, enum dma_data_direction dir)
> > +{
> > + struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
> > + unsigned long offset = paddr & ~PAGE_MASK;
> > + unsigned long vaddr;
> > +
> > + if (PageHighMem(page))
> > + vaddr = (unsigned long) kmap_atomic(page);
>
> This isn't going to work as the size might be larger than PAGE_SIZE.
Ops ... BIG BUG, must be fixed immediately, thank you.
Best Regards
Guo Ren
Re: [PATCH V6 05/33] csky: System Call
On Fri, Sep 28, 2018 at 09:16:09AM -0700, Christoph Hellwig wrote:
> > +
> > +static inline void
> > +syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
> > + unsigned int i, unsigned int n, const unsigned long *args)
> > +{
> > + BUG_ON(i + n > 6);
> > +if (i == 0) {
>
> Please fix your indentation - again checkpatch.pl will be helpful (even
> if it sometimes is a littler overzealous).
Ok, I'll use checkpatch.pl.
Re: [PATCH V6 04/33] csky: Exception handling and mm-fault
On Fri, Sep 28, 2018 at 09:15:03AM -0700, Christoph Hellwig wrote:
> > +#ifndef CONFIG_CPU_HAS_TLBI
> > + /*
> > +* We fault-in kernel-space virtual memory on-demand. The
> > +* 'reference' page table is init_mm.pgd.
> > +*
> > +* NOTE! We MUST NOT take any locks for this case. We may
> > +* be in an interrupt or a critical region, and should
> > +* only copy the information from the master page table,
> > +* nothing more.
> > +*/
> > + if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END))
> > + {
>
> This doesn't fir the kernel style. Please run checkpatch.pl over
> your code and fix at least all warnings that don't seem clearly bogus.
if (unlikely(address >= VMALLOC_START) &&
unlikely(address <= VMALLOC_END)) {
Ok, use checkpatch.pl.
Best Regards
Guo Ren
Re: [PATCH V6 03/33] csky: Kernel booting
On Fri, Sep 28, 2018 at 09:13:05AM -0700, Christoph Hellwig wrote:
> > +phys_addr_t __init_memblock memblock_end_of_REG0(void)
> > +{
> > + return (memblock.memory.regions[0].base +
> > memblock.memory.regions[0].size);
> > +}
>
> No need for the braces.
Ok.
> > + if (memblock.memory.cnt > 1) {
> > + zone_size[ZONE_NORMAL] = PFN_DOWN(memblock_start_of_REG1())
- min_low_pfn;
> > + zhole_size[ZONE_NORMAL] = PFN_DOWN(memblock_start_of_REG1())
- max_low_pfn;
>
> Please brake lines after 80 characters.
Ok.
>
> > + pr_info("C-SKY: https://github.com/c-sky/csky-linux\n";);
>
> I don't think this belongs into the kernel log.
Ok, remove it.
Best Regards
Guo Ren
Re: [PATCH V6 01/33] csky: Build infrastructure
On Fri, Sep 28, 2018 at 09:11:10AM -0700, Christoph Hellwig wrote: > > --- /dev/null > > +++ b/arch/csky/kernel/Makefile > > @@ -0,0 +1,8 @@ > > +extra-y := head.o vmlinux.lds > > + > > +obj-y += entry.o atomic.o signal.o traps.o irq.o time.o vdso.o \ > > +power.o syscall.o platform.o syscall_table.o setup.o \ > > +process.o cpu-probe.o ptrace.o dumpstack.o > > + > > +obj-$(CONFIG_MODULES) += module.o > > You can't just wire up the build infrastructure before th code. > > Please add the objects to the Makefiles when they are actually added. I don't got it? Patchset should be seperated by makefile dir?
[PATCH 1/2] csky: bugfix tlb_get_pgd error.
It's wrong to mask/unmask highest bit in addr to translate the vaddr
to paddr. We should use PAGE_OFFSET and PHYS_OFFSET.
Wrong implement:
return ((get_pgd()|(1<<31)) - PHYS_OFFSET) & ~1;
When PHYS_OFFSET=0xc000 and get_pgd() return 0xe000, it'll
return 0x6000. It's wrong and should be 0xa000.
Now correct it to:
return ((get_pgd() - PHYS_OFFSET) & ~1) + PAGE_OFFSET;
Signed-off-by: Guo Ren
---
arch/csky/include/asm/mmu_context.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/csky/include/asm/mmu_context.h
b/arch/csky/include/asm/mmu_context.h
index c410aa4..b2905c0 100644
--- a/arch/csky/include/asm/mmu_context.h
+++ b/arch/csky/include/asm/mmu_context.h
@@ -16,7 +16,7 @@
static inline void tlbmiss_handler_setup_pgd(unsigned long pgd, bool kernel)
{
- pgd &= ~(1<<31);
+ pgd -= PAGE_OFFSET;
pgd += PHYS_OFFSET;
pgd |= 1;
setup_pgd(pgd, kernel);
@@ -29,7 +29,7 @@ static inline void tlbmiss_handler_setup_pgd(unsigned long
pgd, bool kernel)
static inline unsigned long tlb_get_pgd(void)
{
- return ((get_pgd()|(1<<31)) - PHYS_OFFSET) & ~1;
+ return ((get_pgd() - PHYS_OFFSET) & ~1) + PAGE_OFFSET;
}
#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
--
2.7.4
[GIT PULL] C-SKY update for 4.20-rc6
Hi Linus, Please pull. Best Regards Guo Ren --> The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a: Linux 4.20-rc1 (2018-11-04 15:37:52 -0800) are available in the git repository at: g...@github.com:c-sky/csky-linux.git tags/csky-4.20-rc6 for you to fetch changes up to 63e19c8216bb03a1b4d10f6637d1324ae7a2b612: csky: bugfix tlb_get_pgd error. (2018-12-03 10:49:11 +0800) C-SKY fixes/update for 4.20-rc6 - Bugfix tlb_get_pgd error. - Update MAINTAINERS file for C-SKY drivers. ---- Guo Ren (2): MAINTAINERS: add maintainer for C-SKY drivers csky: bugfix tlb_get_pgd error. MAINTAINERS | 7 ++- arch/csky/include/asm/mmu_context.h | 4 ++-- 2 files changed, 8 insertions(+), 3 deletions(-)
[PATCH V2 07/19] csky: MMU and page table management
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/ckmmu.h| 80 +
arch/csky/abiv1/inc/abi/page.h | 26 +++
arch/csky/abiv1/inc/abi/pgtable-bits.h | 36
arch/csky/abiv1/mmap.c | 65 +++
arch/csky/abiv2/inc/abi/ckmmu.h| 88 ++
arch/csky/abiv2/inc/abi/page.h | 14 ++
arch/csky/abiv2/inc/abi/pgtable-bits.h | 36
arch/csky/include/asm/addrspace.h | 10 ++
arch/csky/include/asm/fixmap.h | 65 +++
arch/csky/include/asm/highmem.h| 50 ++
arch/csky/include/asm/mmu.h| 11 ++
arch/csky/include/asm/page.h | 104
arch/csky/include/asm/pgalloc.h| 108
arch/csky/include/asm/pgtable.h| 301 +
arch/csky/include/asm/segment.h| 18 ++
arch/csky/include/asm/shmparam.h | 10 ++
arch/csky/mm/dma-mapping.c | 216 +++
arch/csky/mm/highmem.c | 210 +++
arch/csky/mm/init.c| 122 +
arch/csky/mm/ioremap.c | 49 ++
20 files changed, 1619 insertions(+)
create mode 100644 arch/csky/abiv1/inc/abi/ckmmu.h
create mode 100644 arch/csky/abiv1/inc/abi/page.h
create mode 100644 arch/csky/abiv1/inc/abi/pgtable-bits.h
create mode 100644 arch/csky/abiv1/mmap.c
create mode 100644 arch/csky/abiv2/inc/abi/ckmmu.h
create mode 100644 arch/csky/abiv2/inc/abi/page.h
create mode 100644 arch/csky/abiv2/inc/abi/pgtable-bits.h
create mode 100644 arch/csky/include/asm/addrspace.h
create mode 100644 arch/csky/include/asm/fixmap.h
create mode 100644 arch/csky/include/asm/highmem.h
create mode 100644 arch/csky/include/asm/mmu.h
create mode 100644 arch/csky/include/asm/page.h
create mode 100644 arch/csky/include/asm/pgalloc.h
create mode 100644 arch/csky/include/asm/pgtable.h
create mode 100644 arch/csky/include/asm/segment.h
create mode 100644 arch/csky/include/asm/shmparam.h
create mode 100644 arch/csky/mm/dma-mapping.c
create mode 100644 arch/csky/mm/highmem.c
create mode 100644 arch/csky/mm/init.c
create mode 100644 arch/csky/mm/ioremap.c
diff --git a/arch/csky/abiv1/inc/abi/ckmmu.h b/arch/csky/abiv1/inc/abi/ckmmu.h
new file mode 100644
index 000..e8e7d43
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/ckmmu.h
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_CKMMUV1_H
+#define __ASM_CSKY_CKMMUV1_H
+#include
+
+static inline void select_mmu_cp(void)
+{
+asm volatile("cpseti cp15\n");
+}
+
+static inline int read_mmu_index(void)
+{
+ return cprcr("cpcr0");
+}
+
+static inline void write_mmu_index(int value)
+{
+ cpwcr("cpcr0", value);
+}
+
+static inline int read_mmu_entrylo0(void)
+{
+ return cprcr("cpcr2") << 6;
+}
+
+static inline int read_mmu_entrylo1(void)
+{
+ return cprcr("cpcr3") << 6;
+}
+
+static inline void write_mmu_pagemask(int value)
+{
+ cpwcr("cpcr6", value);
+}
+
+static inline int read_mmu_entryhi(void)
+{
+ return cprcr("cpcr4");
+}
+
+static inline void write_mmu_entryhi(int value)
+{
+ cpwcr("cpcr4", value);
+}
+
+/*
+ * TLB operations.
+ */
+static inline void tlb_probe(void)
+{
+ cpwcr("cpcr8", 0x8000);
+}
+
+static inline void tlb_read(void)
+{
+ cpwcr("cpcr8", 0x4000);
+}
+
+static inline void tlb_invalid_all(void)
+{
+ cpwcr("cpcr8", 0x0400);
+}
+
+static inline void tlb_invalid_indexed(void)
+{
+ cpwcr("cpcr8", 0x0200);
+}
+
+static inline void setup_pgd(unsigned long pgd)
+{
+ cpwcr("cpcr29", pgd);
+}
+
+static inline unsigned long get_pgd(void)
+{
+ return cprcr("cpcr29");
+}
+#endif /* __ASM_CSKY_CKMMUV1_H */
+
diff --git a/arch/csky/abiv1/inc/abi/page.h b/arch/csky/abiv1/inc/abi/page.h
new file mode 100644
index 000..b0d2122
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/page.h
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+extern unsigned long shm_align_mask;
+extern void flush_dcache_page(struct page *);
+
+static inline unsigned long pages_do_alias(unsigned long addr1,
+ unsigned long addr2)
+{
+ return (addr1 ^ addr2) & shm_align_mask;
+}
+
+static inline void clear_user_page(void *addr, unsigned long vaddr,
+ struct page *page)
+{
+ clear_page(addr);
+ if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK))
+ flush_dcache_page(page);
+}
+
+static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
+ struct page *page)
+{
+ copy_page(to, from);
+ if (pages_do_alias((unsigned
[PATCH V2 11/19] csky: Atomic operations
Signed-off-by: Guo Ren
---
arch/csky/include/asm/cmpxchg.h| 68 +
arch/csky/include/asm/spinlock.h | 174 +
arch/csky/include/asm/spinlock_types.h | 20
arch/csky/kernel/atomic.S | 87 +
4 files changed, 349 insertions(+)
create mode 100644 arch/csky/include/asm/cmpxchg.h
create mode 100644 arch/csky/include/asm/spinlock.h
create mode 100644 arch/csky/include/asm/spinlock_types.h
create mode 100644 arch/csky/kernel/atomic.S
diff --git a/arch/csky/include/asm/cmpxchg.h b/arch/csky/include/asm/cmpxchg.h
new file mode 100644
index 000..1c30a28
--- /dev/null
+++ b/arch/csky/include/asm/cmpxchg.h
@@ -0,0 +1,68 @@
+#ifndef __ASM_CSKY_CMPXCHG_H
+#define __ASM_CSKY_CMPXCHG_H
+
+#ifdef CONFIG_CPU_HAS_LDSTEX
+#include
+#include
+
+#define __xchg(new, ptr, size) \
+({ \
+ __typeof__(ptr) __ptr = (ptr); \
+ __typeof__(new) __new = (new); \
+ __typeof__(*(ptr)) __ret; \
+ unsigned long tmp; \
+ switch (size) { \
+ case 4: \
+ asm volatile ( \
+ "1: ldex.w %0, (%3) \n"\
+ " mov %1, %2 \n"\
+ " stex.w %1, (%3) \n"\
+ " bez %1, 1b \n"\
+ : "=&r" (__ret), "=&r" (tmp)\
+ : "r" (__new), "r"(__ptr) \
+ : "memory");\
+ smp_mb(); \
+ break; \
+ default:\
+ BUILD_BUG();\
+ } \
+ __ret; \
+})
+
+#define xchg(ptr, x) (__xchg((x), (ptr), sizeof(*(ptr
+
+#define __cmpxchg(ptr, old, new, size) \
+({ \
+ __typeof__(ptr) __ptr = (ptr); \
+ __typeof__(new) __new = (new); \
+ __typeof__(new) __tmp; \
+ __typeof__(old) __old = (old); \
+ __typeof__(*(ptr)) __ret; \
+ switch (size) { \
+ case 4: \
+ asm volatile ( \
+ "1: ldex.w %0, (%3) \n"\
+ " cmpne %0, %4 \n"\
+ " bt 2f \n"\
+ " mov %1, %2 \n"\
+ " stex.w %1, (%3) \n"\
+ " bez %1, 1b \n"\
+ "2: \n"\
+ : "=&r" (__ret), "=&r" (__tmp) \
+ : "r" (__new), "r"(__ptr), "r"(__old) \
+ : "memory");\
+ smp_mb(); \
+ break; \
+ default:\
+ BUILD_BUG();\
+ } \
+ __ret; \
+})
+
+#define cmpxchg(ptr, o, n) \
+ (__cmpxchg((ptr), (o), (n), sizeof(*(ptr
+#else
+#include
+#endif
+
+#endif /* __ASM_CSKY_CMPXCHG_H */
diff --git a/arch/csky/include/asm/spinlock.h b/arch/csky/include/asm/spinlock.h
new file mode 100644
index 000..ca10d0e
--- /dev/null
+++ b/arch/csky/include/asm/spinlock.h
@@ -0,0 +1,174 @@
+#ifndef __ASM_CSKY_SPINLOCK_H
+#define __ASM_CSKY_SPINLOCK_H
+
+#include
+#include
+
+#define arch_spin_is_locked(x) (READ_ONCE((x)->lock) != 0)
+
+/** spin lock/unlock/trylock **/
+static inline void arch_spin_lock(arch_spinlock_t *lock)
+{
+ unsigned int *p = &lock->lock;
+ unsigne
[PATCH V2 16/19] csky: SMP support
Signed-off-by: Guo Ren
---
arch/csky/include/asm/smp.h | 26 +
arch/csky/kernel/smp.c | 256
2 files changed, 282 insertions(+)
create mode 100644 arch/csky/include/asm/smp.h
create mode 100644 arch/csky/kernel/smp.c
diff --git a/arch/csky/include/asm/smp.h b/arch/csky/include/asm/smp.h
new file mode 100644
index 000..9a53abf
--- /dev/null
+++ b/arch/csky/include/asm/smp.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_CSKY_SMP_H
+#define __ASM_CSKY_SMP_H
+
+#include
+#include
+#include
+
+#ifdef CONFIG_SMP
+
+void __init setup_smp(void);
+
+void __init setup_smp_ipi(void);
+
+void __init enable_smp_ipi(void);
+
+void arch_send_call_function_ipi_mask(struct cpumask *mask);
+
+void arch_send_call_function_single_ipi(int cpu);
+
+void __init set_send_ipi(void (*func)(const unsigned long *, unsigned long));
+
+#define raw_smp_processor_id() (current_thread_info()->cpu)
+
+#endif /* CONFIG_SMP */
+
+#endif /* __ASM_CSKY_SMP_H */
diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
new file mode 100644
index 000..42308cd
--- /dev/null
+++ b/arch/csky/kernel/smp.c
@@ -0,0 +1,256 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define IPI_IRQ15
+
+static struct {
+ unsigned long bits cacheline_aligned;
+} ipi_data[NR_CPUS] __cacheline_aligned;
+
+enum ipi_message_type {
+ IPI_EMPTY,
+ IPI_RESCHEDULE,
+ IPI_CALL_FUNC,
+ IPI_MAX
+};
+
+static irqreturn_t handle_ipi(int irq, void *dev)
+{
+ unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
+
+ while (true) {
+ unsigned long ops;
+
+ /* Order bit clearing and data access. */
+ mb();
+
+ ops = xchg(pending_ipis, 0);
+ if (ops == 0)
+ return IRQ_HANDLED;
+
+ if (ops & (1 << IPI_RESCHEDULE))
+ scheduler_ipi();
+
+ if (ops & (1 << IPI_CALL_FUNC))
+ generic_smp_call_function_interrupt();
+
+ BUG_ON((ops >> IPI_MAX) != 0);
+
+ /* Order data access and bit testing. */
+ mb();
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void (*send_arch_ipi)(const unsigned long *mask, unsigned long irq) =
NULL;
+
+void __init set_send_ipi(void (*func)(const unsigned long *, unsigned long))
+{
+ if (send_arch_ipi)
+ return;
+
+ send_arch_ipi = func;
+}
+
+static void
+send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type
operation)
+{
+ int i;
+
+ mb();
+ for_each_cpu(i, to_whom)
+ set_bit(operation, &ipi_data[i].bits);
+
+ mb();
+ send_arch_ipi(cpumask_bits(to_whom), IPI_IRQ);
+}
+
+void arch_send_call_function_ipi_mask(struct cpumask *mask)
+{
+ send_ipi_message(mask, IPI_CALL_FUNC);
+}
+
+void arch_send_call_function_single_ipi(int cpu)
+{
+ send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
+}
+
+static void ipi_stop(void *unused)
+{
+ while (1);
+}
+
+void smp_send_stop(void)
+{
+ on_each_cpu(ipi_stop, NULL, 1);
+}
+
+void smp_send_reschedule(int cpu)
+{
+ send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
+}
+
+void *__cpu_up_stack_pointer[NR_CPUS];
+void *__cpu_up_task_pointer[NR_CPUS];
+
+void __init smp_prepare_boot_cpu(void)
+{
+}
+
+void __init smp_prepare_cpus(unsigned int max_cpus)
+{
+}
+
+static int ipi_dummy_dev;
+
+void __init enable_smp_ipi(void)
+{
+ enable_percpu_irq(IPI_IRQ, 0);
+}
+
+void __init setup_smp_ipi(void)
+{
+ int rc;
+
+ irq_create_mapping(NULL, IPI_IRQ);
+
+ rc = request_percpu_irq(IPI_IRQ, handle_ipi, "IPI Interrupt",
&ipi_dummy_dev);
+ if (rc)
+ panic("%s IRQ request failed\n", __func__);
+
+ enable_smp_ipi();
+}
+
+static int csky_of_cpu(struct device_node *node)
+{
+ const char *status;
+ int cpu;
+
+ if (of_property_read_u32(node, "reg", &cpu))
+ goto error;
+
+ if (cpu >= NR_CPUS)
+ goto error;
+
+ if (of_property_read_string(node, "status", &status))
+ status = "enable";
+
+ if (strcmp(status, "disable") == 0)
+ goto error;
+
+ return cpu;
+error:
+ return -ENODEV;
+}
+
+void __init setup_smp(void)
+{
+ struct device_node *node = NULL;
+ int cpu;
+
+ while ((node = of_find_node_by_type(node, "cpu"))) {
+ cpu = csky_of_cpu(node);
+ if (cpu >= 0) {
+ set_cpu_possible(cpu, true);
+ set_cpu_present(cpu, true);
+ }
+ }
+}
+
+exter
[PATCH V2 05/19] csky: System Call
Signed-off-by: Guo Ren
---
arch/csky/include/asm/syscall.h | 69 +
arch/csky/include/asm/syscalls.h| 14
arch/csky/include/uapi/asm/unistd.h | 63 +
arch/csky/kernel/syscall.c | 63 +
arch/csky/kernel/syscall_table.c| 12 +++
5 files changed, 221 insertions(+)
create mode 100644 arch/csky/include/asm/syscall.h
create mode 100644 arch/csky/include/asm/syscalls.h
create mode 100644 arch/csky/include/uapi/asm/unistd.h
create mode 100644 arch/csky/kernel/syscall.c
create mode 100644 arch/csky/kernel/syscall_table.c
diff --git a/arch/csky/include/asm/syscall.h b/arch/csky/include/asm/syscall.h
new file mode 100644
index 000..8966739
--- /dev/null
+++ b/arch/csky/include/asm/syscall.h
@@ -0,0 +1,69 @@
+#ifndef __ASM_SYSCALL_H
+#define __ASM_SYSCALL_H
+
+#include
+#include
+#include
+
+static inline int
+syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
+{
+ return regs_syscallid(regs);
+}
+
+static inline void
+syscall_rollback(struct task_struct *task, struct pt_regs *regs)
+{
+ regs->a0 = regs->orig_a0;
+}
+
+static inline long
+syscall_get_error(struct task_struct *task, struct pt_regs *regs)
+{
+ unsigned long error = regs->a0;
+
+ return IS_ERR_VALUE(error) ? error : 0;
+}
+
+static inline long
+syscall_get_return_value(struct task_struct *task, struct pt_regs *regs)
+{
+ return regs->a0;
+}
+
+static inline void
+syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
+int error, long val)
+{
+ regs->a0 = (long) error ?: val;
+}
+
+static inline void
+syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
+ unsigned int i, unsigned int n, unsigned long *args)
+{
+ BUG_ON(i + n > 6);
+ if (i == 0) {
+ args[0] = regs->orig_a0;
+ args++;
+ i++;
+ n--;
+ }
+ memcpy(args, ®s->a1 + i * sizeof(regs->a1), n * sizeof(args[0]));
+}
+
+static inline void
+syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
+ unsigned int i, unsigned int n, const unsigned long *args)
+{
+ BUG_ON(i + n > 6);
+if (i == 0) {
+ regs->orig_a0 = args[0];
+ args++;
+ i++;
+ n--;
+}
+ memcpy(®s->a1 + i * sizeof(regs->a1), args, n * sizeof(regs->a0));
+}
+
+#endif /* __ASM_SYSCALL_H */
diff --git a/arch/csky/include/asm/syscalls.h b/arch/csky/include/asm/syscalls.h
new file mode 100644
index 000..c478830
--- /dev/null
+++ b/arch/csky/include/asm/syscalls.h
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_SYSCALLS_H
+#define __ASM_CSKY_SYSCALLS_H
+
+#include
+
+long sys_cacheflush(void __user *, unsigned long, int);
+
+long sys_set_thread_area(unsigned long addr);
+
+long sys_csky_fadvise64_64(int fd, int advice, loff_t offset, loff_t len);
+
+#endif /* __ASM_CSKY_SYSCALLS_H */
diff --git a/arch/csky/include/uapi/asm/unistd.h
b/arch/csky/include/uapi/asm/unistd.h
new file mode 100644
index 000..0ea9b5a
--- /dev/null
+++ b/arch/csky/include/uapi/asm/unistd.h
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_RENAMEAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_CLONE
+#define __ARCH_WANT_SYS_FORK
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_IPC
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_VFORK
+#define __ARCH_WANT_SYS_WAITPID
+
+#include
+
+/*
+ * other define
+ */
+#define __NR_set_thread_area (__NR_arch_specific_syscall + 0)
+__SYSCALL(__NR_set_thread_area, sys_set_thread_area)
+#define __NR_ipc (__NR_arch_specific_syscall + 1)
+__SYSCALL(__NR_ipc, sys_ipc)
+#define __NR_socketcall(__NR_arch_specific_syscall + 2)
+__SYSCALL(__NR_socketcall, sys_socketcall)
+#define __NR_ugetrlimit(__NR_arch_specific_syscall + 3)
+__SYSCALL(__NR_ugetrlimit, sys_getrlimit)
+#define __NR_cacheflush(__NR_arch_specific_syscall + 4)
+__SYSCALL(__NR_cacheflush, sys_cacheflush)
+#define __NR_sysfs (__NR_arch_specific_syscall + 5)
+__SYSCALL(__NR_sysfs, sys_sysfs)
+
+__SYSCALL(__NR_fadvise64_64, sys_csky_fadvise64_64)
+
+#define __NR
[PATCH V2 03/19] csky: Kernel booting
Signed-off-by: Guo Ren
---
arch/csky/kernel/head.S| 81 ++
arch/csky/kernel/setup.c | 148 +
arch/csky/kernel/vmlinux.lds.S | 65 ++
3 files changed, 294 insertions(+)
create mode 100644 arch/csky/kernel/head.S
create mode 100644 arch/csky/kernel/setup.c
create mode 100644 arch/csky/kernel/vmlinux.lds.S
diff --git a/arch/csky/kernel/head.S b/arch/csky/kernel/head.S
new file mode 100644
index 000..3f0be9a
--- /dev/null
+++ b/arch/csky/kernel/head.S
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+#include
+
+__HEAD
+ENTRY(_start)
+ /* set super user mode */
+ lrw a3, DEFAULT_PSR_VALUE
+ mtcra3, psr
+ psrset ee
+
+ /* set stack point */
+ lrw a3, init_thread_union + THREAD_SIZE
+ mov sp, a3
+
+ jmpicsky_start
+END(_start)
+
+#ifdef CONFIG_SMP
+.align 10
+ENTRY(_start_smp_secondary)
+ /* Invalid I/Dcache BTB BHT */
+ movia3, 7
+ lslia3, 16
+ addia3, (1<<4) | 3
+ mtcra3, cr17
+
+ tlbi.all
+
+ /* setup PAGEMASK */
+ movia3, 0
+ mtcra3, cr<6, 15>
+
+ /* setup MEL0/MEL1 */
+ grs a0, _start_smp_pc
+_start_smp_pc:
+ bmaski a1, 13
+ andna0, a1
+ movia1, 0x0006
+ movia2, 0x1006
+ or a1, a0
+ or a2, a0
+ mtcra1, cr<2, 15>
+ mtcra2, cr<3, 15>
+
+ /* setup MEH */
+ mtcra0, cr<4, 15>
+
+ /* write TLB */
+ bgeni a3, 28
+ mtcra3, cr<8, 15>
+
+ /* setup msa0 & msa1 */
+ lrw a3, PHYS_OFFSET | 0x8e
+ mtcra3, cr<30, 15>
+ lrw a3, PHYS_OFFSET | 0x26
+ mtcra3, cr<31, 15>
+
+ /* enable MMU */
+ movia3, 1
+ mtcra3, cr18
+
+ jmpi_goto_mmu_on
+_goto_mmu_on:
+ movia3, 0xaa
+
+ lrw a3, DEFAULT_PSR_VALUE
+ mtcra3, psr
+ psrset ee
+
+ /* set stack point */
+ lrw a3, secondary_stack
+ ld.wa3, (a3, 0)
+ mov sp, a3
+
+ jmpicsky_start_secondary
+END(_start_smp_secondary)
+#endif
diff --git a/arch/csky/kernel/setup.c b/arch/csky/kernel/setup.c
new file mode 100644
index 000..b7e14c8
--- /dev/null
+++ b/arch/csky/kernel/setup.c
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+phys_addr_t __init_memblock memblock_end_of_REG0(void)
+{
+ return (memblock.memory.regions[0].base +
memblock.memory.regions[0].size);
+}
+
+phys_addr_t __init_memblock memblock_start_of_REG1(void)
+{
+ return memblock.memory.regions[1].base;
+}
+
+size_t __init_memblock memblock_size_of_REG1(void)
+{
+ return memblock.memory.regions[1].size;
+}
+
+static void __init csky_memblock_init(void)
+{
+ unsigned long zone_size[MAX_NR_ZONES];
+ unsigned long zhole_size[MAX_NR_ZONES];
+ signed long size;
+
+ memblock_reserve(__pa(_stext), _end - _stext);
+#ifdef CONFIG_BLK_DEV_INITRD
+ memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
+#endif
+
+ early_init_fdt_reserve_self();
+ early_init_fdt_scan_reserved_mem();
+
+ memblock_dump_all();
+
+ memset(zone_size, 0, sizeof(zone_size));
+ memset(zhole_size, 0, sizeof(zhole_size));
+
+ min_low_pfn = PFN_UP(memblock_start_of_DRAM());
+ max_low_pfn = PFN_UP(memblock_end_of_REG0());
+ max_pfn = PFN_DOWN(memblock_end_of_DRAM());
+
+ size = max_pfn - min_low_pfn;
+
+ if (memblock.memory.cnt > 1) {
+ zone_size[ZONE_NORMAL] = PFN_DOWN(memblock_start_of_REG1()) -
min_low_pfn;
+ zhole_size[ZONE_NORMAL] = PFN_DOWN(memblock_start_of_REG1()) -
max_low_pfn;
+ } else {
+ if (size <= PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET))
+ zone_size[ZONE_NORMAL] = max_pfn - min_low_pfn;
+ else {
+ zone_size[ZONE_NORMAL] = PFN_DOWN(LOWMEM_LIMIT -
PHYS_OFFSET_OFFSET);
+ max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
+ }
+ }
+
+#ifdef CONFIG_HIGHMEM
+ size = 0;
+ if(memblock.memory.cnt > 1) {
+ size = PFN_DOWN(memblock_size_of_REG1());
+ highstart_pfn = PFN_DOWN(memblock_start_of_REG1());
+ } else {
+ size = max_pfn - min_low_pfn - PFN_DOWN(LOWMEM_LIMIT -
PHYS_OFFSET_OFFSET);
+ highstart_pfn = min_low_pfn + PFN_DOWN(LOWMEM_LIMIT -
PHYS_OFFSET_OFFSET);
+ }
+
+ if (size > 0)
+ zone_siz
[PATCH V2 15/19] csky: Debug and Ptrace GDB
Signed-off-by: Guo Ren
---
arch/csky/include/uapi/asm/ptrace.h | 105 +
arch/csky/kernel/dumpstack.c| 65
arch/csky/kernel/ptrace.c | 288
3 files changed, 458 insertions(+)
create mode 100644 arch/csky/include/uapi/asm/ptrace.h
create mode 100644 arch/csky/kernel/dumpstack.c
create mode 100644 arch/csky/kernel/ptrace.c
diff --git a/arch/csky/include/uapi/asm/ptrace.h
b/arch/csky/include/uapi/asm/ptrace.h
new file mode 100644
index 000..f5228dd
--- /dev/null
+++ b/arch/csky/include/uapi/asm/ptrace.h
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef _CSKY_PTRACE_H
+#define _CSKY_PTRACE_H
+
+#ifndef __ASSEMBLY__
+
+struct pt_regs {
+ unsigned long tls;
+ unsigned long lr;
+ unsigned long pc;
+ unsigned long sr;
+ unsigned long usp;
+
+ /*
+* a0, a1, a2, a3:
+* abiv1: r2, r3, r4, r5
+* abiv2: r0, r1, r2, r3
+*/
+ unsigned long orig_a0;
+ unsigned long a0;
+ unsigned long a1;
+ unsigned long a2;
+ unsigned long a3;
+
+ /*
+* ABIV2: r4 ~ r13
+* ABIV1: r6 ~ r14, r1
+*/
+ unsigned long regs[10];
+
+#if defined(__CSKYABIV2__)
+ /* r16 ~ r30 */
+ unsigned long exregs[15];
+
+ unsigned long rhi;
+ unsigned long rlo;
+ unsigned long pad; /* reserved */
+#endif
+};
+
+struct user_fp {
+ unsigned long vr[64];
+ unsigned long fcr;
+ unsigned long fesr;
+ unsigned long fid;
+ unsigned long reserved;
+};
+
+/*
+ * Switch stack for switch_to after push pt_regs.
+ *
+ * ABI_CSKYV2: r4 ~ r11, r15 ~ r17, r26 ~ r30;
+ * ABI_CSKYV1: r8 ~ r14, r15;
+ */
+struct switch_stack {
+#if defined(__CSKYABIV2__)
+ unsigned long r4;
+unsigned long r5;
+unsigned long r6;
+unsigned long r7;
+ unsigned long r8;
+unsigned long r9;
+unsigned long r10;
+unsigned long r11;
+#else
+ unsigned long r8;
+unsigned long r9;
+unsigned long r10;
+unsigned long r11;
+unsigned long r12;
+unsigned long r13;
+unsigned long r14;
+#endif
+unsigned long r15;
+#if defined(__CSKYABIV2__)
+unsigned long r16;
+unsigned long r17;
+unsigned long r26;
+unsigned long r27;
+unsigned long r28;
+unsigned long r29;
+unsigned long r30;
+#endif
+};
+
+#ifdef __KERNEL__
+
+#define PS_S0x8000 /* Supervisor Mode */
+
+#define arch_has_single_step() (1)
+#define current_pt_regs() \
+ (struct pt_regs *)((char *)current_thread_info() + THREAD_SIZE) - 1
+
+#define user_stack_pointer(regs) ((regs)->usp)
+
+#define user_mode(regs) (!((regs)->sr & PS_S))
+#define instruction_pointer(regs) ((regs)->pc)
+#define profile_pc(regs) instruction_pointer(regs)
+
+void show_regs(struct pt_regs *);
+
+#endif /* __KERNEL__ */
+#endif /* __ASSEMBLY__ */
+#endif /* _CSKY_PTRACE_H */
diff --git a/arch/csky/kernel/dumpstack.c b/arch/csky/kernel/dumpstack.c
new file mode 100644
index 000..d4be08a
--- /dev/null
+++ b/arch/csky/kernel/dumpstack.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+
+int kstack_depth_to_print = 48;
+
+void show_trace(unsigned long *stack)
+{
+ unsigned long *endstack;
+ unsigned long addr;
+ int i;
+
+ pr_info("Call Trace:");
+ addr = (unsigned long)stack + THREAD_SIZE - 1;
+ endstack = (unsigned long *)(addr & -THREAD_SIZE);
+ i = 0;
+ while (stack + 1 <= endstack) {
+ addr = *stack++;
+ /*
+* If the address is either in the text segment of the
+* kernel, or in the region which contains vmalloc'ed
+* memory, it *may* be the address of a calling
+* routine; if so, print it so that someone tracing
+* down the cause of the crash will be able to figure
+* out the call path that was taken.
+*/
+ if (__kernel_text_address(addr)) {
+#ifndef CONFIG_KALLSYMS
+ if (i % 5 == 0)
+ pr_cont("\n ");
+#endif
+ pr_cont(" [<%08lx>] %pS\n", addr, (void *)addr);
+ i++;
+ }
+ }
+ pr_cont("\n");
+}
+
+void show_stack(struct task_struct *task, unsigned long *stack)
+{
+ unsigned long *p;
+ unsigned long *endstack;
+ int i;
+
+ if (!stack) {
+ if (task)
+ stack = (unsigned long *)task->thread.esp0;
+
[PATCH V2 12/19] csky: ELF and module probe
Signed-off-by: Guo Ren --- arch/csky/include/asm/elf.h | 149 arch/csky/kernel/module.c | 82 2 files changed, 231 insertions(+) create mode 100644 arch/csky/include/asm/elf.h create mode 100644 arch/csky/kernel/module.c diff --git a/arch/csky/include/asm/elf.h b/arch/csky/include/asm/elf.h new file mode 100644 index 000..9a7967c --- /dev/null +++ b/arch/csky/include/asm/elf.h @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. +#ifndef __ASMCSKY_ELF_H +#define __ASMCSKY_ELF_H + +/* + * ELF register definitions.. + */ + +#include +#include + +#define ELF_ARCH 39 + +/* CSKY Relocations */ +#define R_CSKY_NONE 0 +#define R_CSKY_32 1 +#define R_CSKY_PCIMM8BY4 2 +#define R_CSKY_PCIMM11BY2 3 +#define R_CSKY_PCIMM4BY2 4 +#define R_CSKY_PC32 5 +#define R_CSKY_PCRELJSR_IMM11BY2 6 +#define R_CSKY_GNU_VTINHERIT 7 +#define R_CSKY_GNU_VTENTRY8 +#define R_CSKY_RELATIVE 9 +#define R_CSKY_COPY 10 +#define R_CSKY_GLOB_DAT 11 +#define R_CSKY_JUMP_SLOT 12 +#define R_CSKY_ADDR_HI16 24 +#define R_CSKY_ADDR_LO16 25 +#define R_CSKY_PCRELJSR_IMM26BY2 40 + +typedef unsigned long elf_greg_t; + +typedef struct user_fp elf_fpregset_t; + +#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t)) + +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) + +/* + * These are used to set parameters in the core dumps. + */ +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 +#define ELF_CLASS ELFCLASS32 +#define ELF_PLAT_INIT(_r, load_addr) _r->a0 = 0 + +#ifdef __cskyBE__ +#define ELF_DATA ELFDATA2MSB +#else +#define ELF_DATA ELFDATA2LSB +#endif + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#define ELF_ET_DYN_BASE0x0UL + +/* The member sort in array pr_reg[x] is pc, r1, r0, psr, r2, r3,r4, + r5, r6.. Because GDB difine */ +#if defined(__CSKYABIV2__) + #define ELF_CORE_COPY_REGS(pr_reg, regs) \ +pr_reg[0] = regs->pc; \ +pr_reg[1] = regs->a1; \ +pr_reg[2] = regs->a0; \ +pr_reg[3] = regs->sr; \ +pr_reg[4] = regs->a2; \ +pr_reg[5] = regs->a3; \ +pr_reg[6] = regs->regs[0]; \ +pr_reg[7] = regs->regs[1]; \ +pr_reg[8] = regs->regs[2]; \ +pr_reg[9] = regs->regs[3]; \ +pr_reg[10] = regs->regs[4]; \ +pr_reg[11] = regs->regs[5]; \ +pr_reg[12] = regs->regs[6]; \ +pr_reg[13] = regs->regs[7]; \ +pr_reg[14] = regs->regs[8]; \ +pr_reg[15] = regs->regs[9]; \ +pr_reg[16] = regs->usp;\ +pr_reg[17] = regs->lr; \ +pr_reg[18] = regs->exregs[0]; \ +pr_reg[19] = regs->exregs[1]; \ +pr_reg[20] = regs->exregs[2]; \ +pr_reg[21] = regs->exregs[3]; \ +pr_reg[22] = regs->exregs[4]; \ +pr_reg[23] = regs->exregs[5]; \ +pr_reg[24] = regs->exregs[6]; \ +pr_reg[25] = regs->exregs[7]; \ +pr_reg[26] = regs->exregs[8]; \ +pr_reg[27] = regs->exregs[9]; \ +pr_reg[28] = regs->exregs[10]; \ +pr_reg[29] = regs->exregs[11]; \ +pr_reg[30] = regs->exregs[12]; \ +pr_reg[31] = regs->exregs[13]; \ +pr_reg[32] = regs->exregs[14]; \ +pr_reg[33] = regs->tls; +#else + #define ELF_CORE_COPY_REGS(pr_reg, regs) \ +pr_reg[0] = regs->pc; \ +pr_reg[1] = regs->regs[9]; \ +pr_reg[2] = regs->usp; \ +pr_reg[3] = regs->sr; \ +pr_reg[4] = regs->a0; \ +pr_reg[5] = regs->a1; \ +pr_reg[6] = regs->a2; \ +pr_reg[7] = regs->a3; \ +pr_reg[8] = regs->regs[0]; \ +pr_reg[9] = r
[PATCH V2 17/19] csky: Misc headers
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/reg_ops.h | 47 ++
arch/csky/abiv1/inc/abi/regdef.h | 15 ++
arch/csky/abiv2/inc/abi/reg_ops.h | 38 +
arch/csky/abiv2/inc/abi/regdef.h | 15 ++
arch/csky/include/asm/bitops.h | 277 +
arch/csky/include/asm/checksum.h | 77 +
arch/csky/include/asm/reg_ops.h| 16 ++
arch/csky/include/uapi/asm/byteorder.h | 14 ++
8 files changed, 499 insertions(+)
create mode 100644 arch/csky/abiv1/inc/abi/reg_ops.h
create mode 100644 arch/csky/abiv1/inc/abi/regdef.h
create mode 100644 arch/csky/abiv2/inc/abi/reg_ops.h
create mode 100644 arch/csky/abiv2/inc/abi/regdef.h
create mode 100644 arch/csky/include/asm/bitops.h
create mode 100644 arch/csky/include/asm/checksum.h
create mode 100644 arch/csky/include/asm/reg_ops.h
create mode 100644 arch/csky/include/uapi/asm/byteorder.h
diff --git a/arch/csky/abiv1/inc/abi/reg_ops.h
b/arch/csky/abiv1/inc/abi/reg_ops.h
new file mode 100644
index 000..7c31ac3
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/reg_ops.h
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ABI_REG_OPS_H
+#define __ABI_REG_OPS_H
+#include
+
+#define cprcr(reg) \
+({ \
+ unsigned int tmp; \
+ asm volatile("cprcr %0, "reg"\n":"=b"(tmp));\
+ tmp;\
+})
+
+#define cpwcr(reg, val)\
+({ \
+ asm volatile("cpwcr %0, "reg"\n"::"b"(val));\
+})
+
+static inline unsigned int mfcr_hint(void)
+{
+ return mfcr("cr30");
+}
+
+static inline unsigned int mfcr_msa0(void)
+{
+ return cprcr("cpcr30");
+}
+
+static inline void mtcr_msa0(unsigned int value)
+{
+ cpwcr("cpcr30", value);
+}
+
+static inline unsigned int mfcr_msa1(void)
+{
+ return cprcr("cpcr31");
+}
+
+static inline void mtcr_msa1(unsigned int value)
+{
+ cpwcr("cpcr31", value);
+}
+
+static inline unsigned int mfcr_ccr2(void){return 0;}
+
+#endif /* __ABI_REG_OPS_H */
+
diff --git a/arch/csky/abiv1/inc/abi/regdef.h b/arch/csky/abiv1/inc/abi/regdef.h
new file mode 100644
index 000..0c3596d
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/regdef.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_REGDEF_H
+#define __ASM_CSKY_REGDEF_H
+
+#define syscallid r1
+#define r11_sigr11
+
+#define regs_syscallid(regs) regs->regs[9]
+
+#define DEFAULT_PSR_VALUE 0x8f00
+
+#define SYSTRACE_SAVENUM 2
+
+#endif /* __ASM_CSKY_REGDEF_H */
diff --git a/arch/csky/abiv2/inc/abi/reg_ops.h
b/arch/csky/abiv2/inc/abi/reg_ops.h
new file mode 100644
index 000..a8b2a52
--- /dev/null
+++ b/arch/csky/abiv2/inc/abi/reg_ops.h
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ABI_REG_OPS_H
+#define __ABI_REG_OPS_H
+#include
+
+static inline unsigned int mfcr_hint(void)
+{
+ return mfcr("cr31");
+}
+
+static inline unsigned int mfcr_ccr2(void)
+{
+ return mfcr("cr23");
+}
+
+static inline unsigned int mfcr_msa0(void)
+{
+ return mfcr("cr<30, 15>");
+}
+
+static inline void mtcr_msa0(unsigned int value)
+{
+ mtcr("cr<30, 15>", value);
+}
+
+static inline unsigned int mfcr_msa1(void)
+{
+ return mfcr("cr<31, 15>");
+}
+
+static inline void mtcr_msa1(unsigned int value)
+{
+ mtcr("cr<31, 15>", value);
+}
+
+#endif /* __ABI_REG_OPS_H */
+
diff --git a/arch/csky/abiv2/inc/abi/regdef.h b/arch/csky/abiv2/inc/abi/regdef.h
new file mode 100644
index 000..2c36d60
--- /dev/null
+++ b/arch/csky/abiv2/inc/abi/regdef.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_REGDEF_H
+#define __ASM_CSKY_REGDEF_H
+
+#define syscallid r7
+#define r11_sigr11
+
+#define regs_syscallid(regs) regs->regs[3]
+
+#define DEFAULT_PSR_VALUE 0x8f000200
+
+#define SYSTRACE_SAVENUM 5
+
+#endif /* __ASM_CSKY_REGDEF_H */
diff --git a/arch/csky/include/asm/bitops.h b/arch/csky/include/asm/bitops.h
new file mode 100644
index 000..b2460c5
--- /dev/null
+++ b/arch/csky/include/asm/bitops.h
@@ -0,0 +1,277 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_BITOPS_H
+#define __ASM_CSKY_BITOPS_H
+
+#include
+
+/*
+ * asm-generic/bitops/ffs.h
+ */
+static inline int
[PATCH V2 13/19] csky: Library functions
Signed-off-by: Guo Ren
---
arch/csky/abiv1/bswapdi.c | 18 +++
arch/csky/abiv1/bswapsi.c | 15 ++
arch/csky/abiv1/memcpy.S | 344 +
arch/csky/abiv2/memcpy.c | 43 ++
arch/csky/include/asm/string.h | 19 +++
arch/csky/kernel/asm-offsets.c | 85 ++
arch/csky/kernel/cskyksyms.c | 31
arch/csky/kernel/platform.c| 18 +++
arch/csky/kernel/power.c | 31
arch/csky/lib/delay.c | 40 +
arch/csky/lib/memset.c | 38 +
11 files changed, 682 insertions(+)
create mode 100644 arch/csky/abiv1/bswapdi.c
create mode 100644 arch/csky/abiv1/bswapsi.c
create mode 100644 arch/csky/abiv1/memcpy.S
create mode 100644 arch/csky/abiv2/memcpy.c
create mode 100644 arch/csky/include/asm/string.h
create mode 100644 arch/csky/kernel/asm-offsets.c
create mode 100644 arch/csky/kernel/cskyksyms.c
create mode 100644 arch/csky/kernel/platform.c
create mode 100644 arch/csky/kernel/power.c
create mode 100644 arch/csky/lib/delay.c
create mode 100644 arch/csky/lib/memset.c
diff --git a/arch/csky/abiv1/bswapdi.c b/arch/csky/abiv1/bswapdi.c
new file mode 100644
index 000..7346252
--- /dev/null
+++ b/arch/csky/abiv1/bswapdi.c
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+
+unsigned long long notrace __bswapdi2(unsigned long long u)
+{
+ return (((u) & 0xff00ull) >> 56) |
+ (((u) & 0x00ffull) >> 40) |
+ (((u) & 0xff00ull) >> 24) |
+ (((u) & 0x00ffull) >> 8) |
+ (((u) & 0xff00ull) << 8) |
+ (((u) & 0x00ffull) << 24) |
+ (((u) & 0xff00ull) << 40) |
+ (((u) & 0x00ffull) << 56);
+}
+
+EXPORT_SYMBOL(__bswapdi2);
diff --git a/arch/csky/abiv1/bswapsi.c b/arch/csky/abiv1/bswapsi.c
new file mode 100644
index 000..21958ca
--- /dev/null
+++ b/arch/csky/abiv1/bswapsi.c
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+
+unsigned int notrace __bswapsi2(unsigned int u)
+{
+ return (((u) & 0xff00) >> 24) |
+ (((u) & 0x00ff) >> 8) |
+ (((u) & 0xff00) << 8) |
+ (((u) & 0x00ff) << 24);
+}
+
+EXPORT_SYMBOL(__bswapsi2);
+
diff --git a/arch/csky/abiv1/memcpy.S b/arch/csky/abiv1/memcpy.S
new file mode 100644
index 000..f86ad75
--- /dev/null
+++ b/arch/csky/abiv1/memcpy.S
@@ -0,0 +1,344 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+
+.macro GET_FRONT_BITS rx y
+#ifdef __cskyLE__
+ lsri\rx, \y
+#else
+ lsli\rx, \y
+#endif
+.endm
+
+.macro GET_AFTER_BITS rx y
+#ifdef __cskyLE__
+ lsli\rx, \y
+#else
+ lsri\rx, \y
+#endif
+.endm
+
+/* void *memcpy(void *dest, const void *src, size_t n); */
+ENTRY(memcpy)
+ mov r7, r2
+ cmplti r4, 4 /* If len less than 4
bytes */
+ bt .L_copy_by_byte
+ mov r6, r2
+ andir6, 3
+ cmpnei r6, 0
+ jbt .L_dest_not_aligned /* If dest is not 4
bytes aligned */
+ mov r6, r3
+ andir6, 3
+ cmpnei r6, 0
+ jbt .L_dest_aligned_but_src_not_aligned /* If dest is aligned,
but src is not aligned */
+.L0:
+ cmplti r4, 16
+ jbt .L_aligned_and_len_less_16bytes /* If len less than 16
bytes */
+ subisp, 8
+ stw r8, (sp, 0)
+.L_aligned_and_len_larger_16bytes: /* src and dst are all
aligned, and len > 16 bytes */
+ ldw r1, (r3, 0)
+ ldw r5, (r3, 4)
+ ldw r8, (r3, 8)
+ stw r1, (r7, 0)
+ ldw r1, (r3, 12)
+ stw r5, (r7, 4)
+ stw r8, (r7, 8)
+ stw r1, (r7, 12)
+ subir4, 16
+ addir3, 16
+ addir7, 16
+ cmplti r4, 16
+ jbf .L_aligned_and_len_larger_16bytes
+ ldw r8, (sp, 0)
+ addisp, 8
+ cmpnei r4, 0/* If len == 0, return, else goto
.L_aligned_and_len_less_16bytes */
+ jbf .L_return
+
+.L_aligned_and_len_less_16bytes:
+ cmplti r4, 4
+ bt .L_copy_by_byte
+.L1:
+ ldw r1, (r3, 0)
+ stw r1, (r7, 0)
+ subir4, 4
+ addir3, 4
+ addir7, 4
+ cmplti r4, 4
+ jbf .L1
+ br .L_copy_by_byte
+
+.L_return:
+ rts
+
+.L_copy_by_byte: /* len less than 4 bytes */
+ cmpnei r4, 0
+ jbf .L_return
+.L4:
+ ldb r1, (r3, 0)
+ stb
[PATCH V2 10/19] csky: IRQ handling
Signed-off-by: Guo Ren
---
arch/csky/include/asm/irq.h | 10
arch/csky/include/asm/irqflags.h | 49
arch/csky/kernel/irq.c | 31 +
3 files changed, 90 insertions(+)
create mode 100644 arch/csky/include/asm/irq.h
create mode 100644 arch/csky/include/asm/irqflags.h
create mode 100644 arch/csky/kernel/irq.c
diff --git a/arch/csky/include/asm/irq.h b/arch/csky/include/asm/irq.h
new file mode 100644
index 000..9390cb0
--- /dev/null
+++ b/arch/csky/include/asm/irq.h
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_IRQ_H
+#define __ASM_CSKY_IRQ_H
+
+#include
+
+extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
+
+#endif /* __ASM_CSKY_IRQ_H */
diff --git a/arch/csky/include/asm/irqflags.h b/arch/csky/include/asm/irqflags.h
new file mode 100644
index 000..5216ec0
--- /dev/null
+++ b/arch/csky/include/asm/irqflags.h
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_IRQFLAGS_H
+#define __ASM_CSKY_IRQFLAGS_H
+#include
+
+static inline unsigned long arch_local_irq_save(void)
+{
+ unsigned long flags;
+
+ flags = mfcr("psr");
+ asm volatile("psrclr ie\n");
+ return flags;
+}
+#define arch_local_irq_save arch_local_irq_save
+
+static inline void arch_local_irq_enable(void)
+{
+ asm volatile("psrset ee, ie\n");
+}
+#define arch_local_irq_enable arch_local_irq_enable
+
+static inline void arch_local_irq_disable(void)
+{
+ asm volatile("psrclr ie\n");
+}
+#define arch_local_irq_disable arch_local_irq_disable
+
+static inline unsigned long arch_local_save_flags(void)
+{
+ return mfcr("psr");
+}
+#define arch_local_save_flags arch_local_save_flags
+
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+ mtcr("psr", flags);
+}
+#define arch_local_irq_restore arch_local_irq_restore
+
+static inline int arch_irqs_disabled_flags(unsigned long flags)
+{
+ return !(flags & (1<<6));
+}
+#define arch_irqs_disabled_flags arch_irqs_disabled_flags
+
+#include
+
+#endif /* __ASM_CSKY_IRQFLAGS_H */
diff --git a/arch/csky/kernel/irq.c b/arch/csky/kernel/irq.c
new file mode 100644
index 000..ef2600d
--- /dev/null
+++ b/arch/csky/kernel/irq.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+#include
+#include
+#include
+
+static void (*handle_arch_irq)(struct pt_regs *regs) = NULL;
+
+void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
+{
+ if (handle_arch_irq)
+ return;
+
+ handle_arch_irq = handle_irq;
+}
+
+void __init init_IRQ(void)
+{
+ irqchip_init();
+#ifdef CONFIG_SMP
+ setup_smp_ipi();
+#endif
+}
+
+asmlinkage void __irq_entry csky_do_IRQ(struct pt_regs *regs)
+{
+ handle_arch_irq(regs);
+}
--
2.7.4
[PATCH V2 18/19] clocksource: add C-SKY clocksource drivers
Signed-off-by: Guo Ren
---
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-csky-v1.c | 169 +++
drivers/clocksource/timer-nationalchip.c | 165 ++
3 files changed, 335 insertions(+)
create mode 100644 drivers/clocksource/timer-csky-v1.c
create mode 100644 drivers/clocksource/timer-nationalchip.c
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index d6dec44..bbc567b 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -76,3 +76,4 @@ obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o
obj-$(CONFIG_H8300_TPU)+= h8300_tpu.o
obj-$(CONFIG_CLKSRC_ST_LPC)+= clksrc_st_lpc.o
obj-$(CONFIG_X86_NUMACHIP) += numachip.o
+obj-$(CONFIG_CSKY) += timer-csky-v1.o timer-nationalchip.o
diff --git a/drivers/clocksource/timer-csky-v1.c
b/drivers/clocksource/timer-csky-v1.c
new file mode 100644
index 000..f3a822a
--- /dev/null
+++ b/drivers/clocksource/timer-csky-v1.c
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou NationalChip Science & Technology Co.,Ltd.
+#include
+#include
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define PTIM_CTLR "cr<0, 14>"
+#define PTIM_TSR "cr<1, 14>"
+#define PTIM_CCVR_HI "cr<2, 14>"
+#define PTIM_CCVR_LO "cr<3, 14>"
+#define PTIM_LVR "cr<6, 14>"
+
+#define BITS_CSKY_TIMER56
+
+DECLARE_PER_CPU(struct timer_of, csky_to);
+
+static int csky_timer_irq;
+static int csky_timer_rate;
+
+static inline u64 get_ccvr(void)
+{
+ u32 lo, hi, t;
+
+ do {
+ hi = mfcr(PTIM_CCVR_HI);
+ lo = mfcr(PTIM_CCVR_LO);
+ t = mfcr(PTIM_CCVR_HI);
+ } while(t != hi);
+
+ return ((u64)hi << 32) | lo;
+}
+
+static irqreturn_t timer_interrupt(int irq, void *dev)
+{
+ struct timer_of *to = this_cpu_ptr(&csky_to);
+
+ mtcr(PTIM_TSR, 0);
+
+ to->clkevt.event_handler(&to->clkevt);
+
+ return IRQ_HANDLED;
+}
+
+static int csky_timer_set_next_event(unsigned long delta, struct
clock_event_device *ce)
+{
+ mtcr(PTIM_LVR, delta);
+
+ return 0;
+}
+
+static int csky_timer_shutdown(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static int csky_timer_oneshot(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 1);
+
+ return 0;
+}
+
+static int csky_timer_oneshot_stopped(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+DEFINE_PER_CPU(struct timer_of, csky_to) = {
+ .flags = TIMER_OF_CLOCK | TIMER_OF_IRQ,
+
+ .clkevt = {
+ .name = "C-SKY SMP Timer V1",
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERCPU | CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = csky_timer_shutdown,
+ .set_state_oneshot = csky_timer_oneshot,
+ .set_state_oneshot_stopped = csky_timer_oneshot_stopped,
+ .set_next_event = csky_timer_set_next_event,
+ },
+
+ .of_irq = {
+ .handler = timer_interrupt,
+ .flags = IRQF_TIMER,
+ .percpu = 1,
+ },
+};
+
+/*** clock event for percpu ***/
+static int csky_timer_starting_cpu(unsigned int cpu)
+{
+ struct timer_of *to = this_cpu_ptr(&csky_to);
+
+ to->clkevt.cpumask = cpumask_of(smp_processor_id());
+
+ clockevents_config_and_register(&to->clkevt, csky_timer_rate, 0,
ULONG_MAX);
+
+ enable_percpu_irq(csky_timer_irq, 0);
+
+ return 0;
+}
+
+static int csky_timer_dying_cpu(unsigned int cpu)
+{
+ disable_percpu_irq(csky_timer_irq);
+
+ return 0;
+}
+
+/*** clock source ***/
+static u64 sched_clock_read(void)
+{
+ return get_ccvr();
+}
+
+static u64 clksrc_read(struct clocksource *c)
+{
+ return get_ccvr();
+}
+
+struct clocksource csky_clocksource = {
+ .name = "csky_timer_v1_clksrc",
+ .rating = 400,
+ .mask = CLOCKSOURCE_MASK(BITS_CSKY_TIMER),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+ .read = clksrc_read,
+};
+
+static void csky_clksrc_init(void)
+{
+ clocksource_register_hz(&csky_clocksource, csky_timer_rate);
+
+ sched_clock_register(sched_clock_read, BITS_CSKY_TIMER,
csky_timer_rate);
+}
+
+static int __init csky_timer_v1_init(struct device_node *np)
+{
+ int ret;
+ struct timer_of *to = this_cpu_ptr(&csky_to);
+
+ ret = timer_of_init(np, to);
+ if (ret)
+ return ret;
+
+ csky_timer_irq = to->of_irq.irq;
+ csky_timer_rate = timer_of_rate(to);
+
+ ret = cpuhp_setup_
[PATCH V2 02/19] csky: defconfig
Signed-off-by: Guo Ren --- arch/csky/configs/gx66xx_defconfig | 549 + arch/csky/configs/qemu_ck807_defconfig | 541 2 files changed, 1090 insertions(+) create mode 100644 arch/csky/configs/gx66xx_defconfig create mode 100644 arch/csky/configs/qemu_ck807_defconfig diff --git a/arch/csky/configs/gx66xx_defconfig b/arch/csky/configs/gx66xx_defconfig new file mode 100644 index 000..7f2a987 --- /dev/null +++ b/arch/csky/configs/gx66xx_defconfig @@ -0,0 +1,549 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_DEFAULT_HOSTNAME="github.com/c-sky" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_FHANDLE is not set +CONFIG_USELIB=y +CONFIG_AUDIT=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_RELAY=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_AIO is not set +CONFIG_USERFAULTFD=y +CONFIG_EMBEDDED=y +# CONFIG_PERF_EVENTS is not set +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_ACORN_PARTITION=y +CONFIG_ACORN_PARTITION_ICS=y +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_AIX_PARTITION=y +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ATARI_PARTITION=y +CONFIG_MAC_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_SGI_PARTITION=y +CONFIG_ULTRIX_PARTITION=y +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_SYSV68_PARTITION=y +CONFIG_CMDLINE_PARTITION=y +CONFIG_DEFAULT_DEADLINE=y +CONFIG_FB_NATIONALCHIP=y +CONFIG_RAM_BASE=0x1000 +# CONFIG_SUSPEND is not set +# CONFIG_COMPACTION is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_IPV6 is not set +CONFIG_CFG80211=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=y +CONFIG_MAC80211_DEBUGFS=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_VIRTIO_BLK=y +CONFIG_AD525X_DPOT=m +CONFIG_AD525X_DPOT_I2C=m +CONFIG_DUMMY_IRQ=m +CONFIG_ICS932S401=m +CONFIG_ENCLOSURE_SERVICES=m +CONFIG_APDS9802ALS=m +CONFIG_ISL29003=m +CONFIG_ISL29020=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_BH1770=m +CONFIG_SENSORS_APDS990X=m +CONFIG_HMC6352=m +CONFIG_DS1682=m +CONFIG_USB_SWITCH_FSA9480=m +CONFIG_SRAM=y +CONFIG_C2PORT=m +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_SENSORS_LIS3_I2C=m +CONFIG_ALTERA_STAPL=m +CONFIG_ECHO=m +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SPI_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=m +CONFIG_SCSI_SRP_ATTRS=m +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_NETDEVICES=y +CONFIG_USB_RTL8150=y +CONFIG_USB_RTL8152=y +CONFIG_USB_USBNET=y +# CONFIG_WLAN_VENDOR_ADMTEK is not set +# CONFIG_WLAN_VENDOR_ATH is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +# CONFIG_WLAN_VENDOR_BROADCOM is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +# CONFIG_WLAN_VENDOR_INTERSIL is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +CONFIG_MT7601U=m +# CONFIG_WLAN_VENDOR_RALINK is not set +CONFIG_RTL8187=y +CONFIG_RTL8XXXU=y +CONFIG_RTL8XXXU_UNTESTED=y +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +CONFIG_INPUT_SPARSEKMAP=m +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_ADP5588=m +CONFIG_KEYBOARD_ADP5589=m +CONFIG_KEYBOARD_QT1070=m +CONFIG_KEYBOARD_QT2160=m +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_GPIO_POLLED=m +CONFIG_KEYBOARD_TCA6416=m +CONFIG_KEYBOARD_TCA8418=m +CONFIG_KEYBOARD_LM8323=m +CONFIG_KEYBOARD_LM8333=m +CONFIG_KEYBOARD_MAX7359=m +CONFIG_KEYBOARD_MCS=m +CONFIG_KEYBOARD_MPR121=m +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_OPENCORES=m +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_SENTELIC=y +CONFIG_MOUSE_PS2_TOUCHKIT=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_CYAPA=m +CONFIG_MOUSE_VSXXXAA=m +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_
[PATCH V2 06/19] csky: Cache and TLB routines
Signed-off-by: Guo Ren
---
arch/csky/abiv1/cacheflush.c | 51 +
arch/csky/abiv1/inc/abi/cacheflush.h | 42 +++
arch/csky/abiv1/inc/abi/tlb.h | 11 ++
arch/csky/abiv2/cacheflush.c | 55 +
arch/csky/abiv2/inc/abi/cacheflush.h | 38 ++
arch/csky/abiv2/inc/abi/tlb.h | 12 ++
arch/csky/include/asm/barrier.h | 19 +++
arch/csky/include/asm/cache.h | 29 +
arch/csky/include/asm/cacheflush.h| 9 ++
arch/csky/include/asm/dma-mapping.h | 13 +++
arch/csky/include/asm/io.h| 23
arch/csky/include/asm/tlb.h | 19 +++
arch/csky/include/asm/tlbflush.h | 22
arch/csky/include/uapi/asm/cachectl.h | 13 +++
arch/csky/mm/cachev1.c| 132 +
arch/csky/mm/cachev2.c| 97
arch/csky/mm/syscache.c | 29 +
arch/csky/mm/tlb.c| 210 ++
18 files changed, 824 insertions(+)
create mode 100644 arch/csky/abiv1/cacheflush.c
create mode 100644 arch/csky/abiv1/inc/abi/cacheflush.h
create mode 100644 arch/csky/abiv1/inc/abi/tlb.h
create mode 100644 arch/csky/abiv2/cacheflush.c
create mode 100644 arch/csky/abiv2/inc/abi/cacheflush.h
create mode 100644 arch/csky/abiv2/inc/abi/tlb.h
create mode 100644 arch/csky/include/asm/barrier.h
create mode 100644 arch/csky/include/asm/cache.h
create mode 100644 arch/csky/include/asm/cacheflush.h
create mode 100644 arch/csky/include/asm/dma-mapping.h
create mode 100644 arch/csky/include/asm/io.h
create mode 100644 arch/csky/include/asm/tlb.h
create mode 100644 arch/csky/include/asm/tlbflush.h
create mode 100644 arch/csky/include/uapi/asm/cachectl.h
create mode 100644 arch/csky/mm/cachev1.c
create mode 100644 arch/csky/mm/cachev2.c
create mode 100644 arch/csky/mm/syscache.c
create mode 100644 arch/csky/mm/tlb.c
diff --git a/arch/csky/abiv1/cacheflush.c b/arch/csky/abiv1/cacheflush.c
new file mode 100644
index 000..cb176f4
--- /dev/null
+++ b/arch/csky/abiv1/cacheflush.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+void flush_dcache_page(struct page *page)
+{
+ struct address_space *mapping = page_mapping(page);
+ unsigned long addr;
+
+ if (mapping && !mapping_mapped(mapping)) {
+ set_bit(PG_arch_1, &(page)->flags);
+ return;
+ }
+
+ /*
+* We could delay the flush for the !page_mapping case too. But that
+* case is for exec env/arg pages and those are %99 certainly going to
+* get faulted into the tlb (and thus flushed) anyways.
+*/
+ addr = (unsigned long) page_address(page);
+ dcache_wbinv_range(addr, addr + PAGE_SIZE);
+}
+
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t
*pte)
+{
+ unsigned long addr;
+ struct page *page;
+ unsigned long pfn;
+
+ pfn = pte_pfn(*pte);
+ if (unlikely(!pfn_valid(pfn)))
+ return;
+
+ page = pfn_to_page(pfn);
+ addr = (unsigned long) page_address(page);
+
+ if (vma->vm_flags & VM_EXEC ||
+ pages_do_alias(addr, address & PAGE_MASK))
+ cache_wbinv_all();
+
+ clear_bit(PG_arch_1, &(page)->flags);
+}
+
diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h
b/arch/csky/abiv1/inc/abi/cacheflush.h
new file mode 100644
index 000..3f99f25
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/cacheflush.h
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ABI_CSKY_CACHEFLUSH_H
+#define __ABI_CSKY_CACHEFLUSH_H
+
+#include
+#include
+#include
+
+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
+extern void flush_dcache_page(struct page *);
+
+#define flush_cache_mm(mm) cache_wbinv_all()
+#define flush_cache_page(vma,page,pfn) cache_wbinv_all()
+#define flush_cache_dup_mm(mm) cache_wbinv_all()
+
+#define flush_cache_range(mm,start,end)cache_wbinv_range(start, end)
+#define flush_cache_vmap(start, end) cache_wbinv_range(start, end)
+#define flush_cache_vunmap(start, end) cache_wbinv_range(start, end)
+
+#define flush_icache_page(vma, page) cache_wbinv_all()
+#define flush_icache_range(start, end) cache_wbinv_range(start, end)
+#define flush_icache_user_range(vma,pg,adr,len)cache_wbinv_range(adr,
adr + len)
+
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+do{ \
+ cache_wbinv_all(); \
+ memcpy(dst, src, len); \
+ icache_inv_all(); \
+}while(0)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+do{ \
+ cache_wbinv_all(); \
+ memcpy(dst, src, len); \
+}while(0)
+
+#define flush_dcache_mmap_lock(mapping)
[PATCH V2 19/19] irqchip: add C-SKY irqchip drivers
Signed-off-by: Guo Ren
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-csky-v1.c | 126
drivers/irqchip/irq-csky-v2.c | 191 +
drivers/irqchip/irq-nationalchip.c | 131 +
4 files changed, 449 insertions(+)
create mode 100644 drivers/irqchip/irq-csky-v1.c
create mode 100644 drivers/irqchip/irq-csky-v2.c
create mode 100644 drivers/irqchip/irq-nationalchip.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index d27e3e3..51e7316 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -85,3 +85,4 @@ obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
obj-$(CONFIG_ARCH_SYNQUACER) += irq-sni-exiu.o
obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o
obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
+obj-$(CONFIG_CSKY) += irq-csky-v1.o irq-csky-v2.o
irq-nationalchip.o
diff --git a/drivers/irqchip/irq-csky-v1.c b/drivers/irqchip/irq-csky-v1.c
new file mode 100644
index 000..64ea564
--- /dev/null
+++ b/drivers/irqchip/irq-csky-v1.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#ifdef CONFIG_CSKY_VECIRQ_LEGENCY
+#include
+#endif
+
+static void __iomem *reg_base;
+
+#define INTC_ICR 0x00
+#define INTC_ISR 0x00
+#define INTC_NEN31_00 0x10
+#define INTC_NEN63_32 0x28
+#define INTC_IFR31_00 0x08
+#define INTC_IFR63_32 0x20
+#define INTC_SOURCE0x40
+
+#define INTC_IRQS 64
+
+#define INTC_ICR_AVE BIT(31)
+
+#define VEC_IRQ_BASE 32
+
+static struct irq_domain *root_domain;
+
+static void __init ck_set_gc(void __iomem *reg_base, u32 irq_base,
+u32 mask_reg)
+{
+ struct irq_chip_generic *gc;
+
+ gc = irq_get_domain_generic_chip(root_domain, irq_base);
+ gc->reg_base = reg_base;
+ gc->chip_types[0].regs.mask = mask_reg;
+ gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
+ gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
+}
+
+static struct irq_domain *root_domain;
+static void ck_irq_handler(struct pt_regs *regs)
+{
+#ifdef CONFIG_CSKY_VECIRQ_LEGENCY
+ irq_hw_number_t irq = ((mfcr("psr") >> 16) & 0xff) - VEC_IRQ_BASE;
+#else
+ irq_hw_number_t irq = readl_relaxed(reg_base + INTC_ISR) & 0x3f;
+#endif
+ handle_domain_irq(root_domain, irq, regs);
+}
+
+#define expand_byte_to_word(i) (i|(i<<8)|(i<<16)|(i<<24))
+static inline void setup_irq_channel(void __iomem *reg_base)
+{
+ int i;
+
+ /*
+* There are 64 irq nums and irq-channels and one byte per channel.
+* Setup every channel with the same hwirq num.
+*/
+ for (i = 0; i < INTC_IRQS; i += 4) {
+ writel_relaxed(expand_byte_to_word(i) + 0x00010203,
+ reg_base + INTC_SOURCE + i);
+ }
+}
+
+static int __init
+csky_intc_v1_init(struct device_node *node, struct device_node *parent)
+{
+ u32 clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+ int ret;
+
+ if (parent) {
+ pr_err("C-SKY Intc not a root irq controller\n");
+ return -EINVAL;
+ }
+
+ reg_base = of_iomap(node, 0);
+ if (!reg_base) {
+ pr_err("C-SKY Intc unable to map: %p.\n", node);
+ return -EINVAL;
+ }
+
+ writel_relaxed(0, reg_base + INTC_NEN31_00);
+ writel_relaxed(0, reg_base + INTC_NEN63_32);
+
+#ifndef CONFIG_CSKY_VECIRQ_LEGENCY
+ writel_relaxed(INTC_ICR_AVE, reg_base + INTC_ICR);
+#else
+ writel_relaxed(0, reg_base + INTC_ICR);
+#endif
+
+ setup_irq_channel(reg_base);
+
+ root_domain = irq_domain_add_linear(node, INTC_IRQS,
&irq_generic_chip_ops, NULL);
+ if (!root_domain) {
+ pr_err("C-SKY Intc irq_domain_add failed.\n");
+ return -ENOMEM;
+ }
+
+ ret = irq_alloc_domain_generic_chips(root_domain, 32, 1,
+"csky_intc_v1", handle_level_irq,
+clr, 0, 0);
+ if (ret) {
+ pr_err("C-SKY Intc irq_alloc_gc failed.\n");
+ return -ENOMEM;
+ }
+
+ ck_set_gc(reg_base, 0, INTC_NEN31_00);
+ ck_set_gc(reg_base, 32, INTC_NEN63_32);
+
+ set_handle_irq(ck_irq_handler);
+
+ return 0;
+}
+IRQCHIP_DECLARE(csky_intc_v1, "csky,intc-v1", csky_intc_v1_init);
+
diff --git a/drivers/irqchip/irq-csky-v2.c b/drivers/irqchip/irq-csky-v2.c
new file mode 100644
index 000..b588364
--- /dev/null
+++ b/drivers/irqchip/irq-csky-v2.c
@@ -0,0 +1,191 @@
+// SPDX-License-I
[PATCH V2 04/19] csky: Exception handling
Signed-off-by: Guo Ren
---
arch/csky/abiv1/alignment.c | 332
arch/csky/abiv1/inc/abi/entry.h | 152 +++
arch/csky/abiv2/inc/abi/entry.h | 149 +++
arch/csky/include/asm/traps.h | 39
arch/csky/include/asm/unistd.h | 4 +
arch/csky/kernel/cpu-probe.c| 83
arch/csky/kernel/entry.S| 407
arch/csky/kernel/traps.c| 167 +
arch/csky/mm/fault.c| 223 ++
9 files changed, 1556 insertions(+)
create mode 100644 arch/csky/abiv1/alignment.c
create mode 100644 arch/csky/abiv1/inc/abi/entry.h
create mode 100644 arch/csky/abiv2/inc/abi/entry.h
create mode 100644 arch/csky/include/asm/traps.h
create mode 100644 arch/csky/include/asm/unistd.h
create mode 100644 arch/csky/kernel/cpu-probe.c
create mode 100644 arch/csky/kernel/entry.S
create mode 100644 arch/csky/kernel/traps.c
create mode 100644 arch/csky/mm/fault.c
diff --git a/arch/csky/abiv1/alignment.c b/arch/csky/abiv1/alignment.c
new file mode 100644
index 000..5acc86f
--- /dev/null
+++ b/arch/csky/abiv1/alignment.c
@@ -0,0 +1,332 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+
+static int align_enable = 1;
+static int align_count = 0;
+
+static inline uint32_t get_ptreg(struct pt_regs *regs, uint32_t rx)
+{
+ return *((int *)&(regs->a0) - 2 + rx);
+}
+
+static inline void put_ptreg(struct pt_regs *regs, uint32_t rx, uint32_t val)
+{
+ *((int *)&(regs->a0) - 2 + rx) = val;
+}
+
+/*
+ * Get byte-value from addr and set it to *valp.
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static int ldb_asm(uint32_t addr, uint32_t *valp)
+{
+ uint32_t val;
+ int err;
+
+ if (!access_ok(VERIFY_READ, (void *)addr, 1))
+ return 1;
+
+ asm volatile (
+ "movi %0, 0 \n"
+ "1: \n"
+ "ldb%1, (%2)\n"
+ "br 3f \n"
+ "2: \n"
+ "movi %0, 1 \n"
+ "br 3f \n"
+ ".section __ex_table,\"a\" \n"
+ ".align 2 \n"
+ ".long 1b, 2b \n"
+ ".previous \n"
+ "3: \n"
+ : "=&r"(err), "=r"(val)
+ : "r" (addr)
+ );
+
+ *valp = val;
+
+ return err;
+}
+
+/*
+ * Put byte-value to addr.
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static volatile int stb_asm(uint32_t addr, uint32_t val)
+{
+ int err;
+
+ if (!access_ok(VERIFY_WRITE, (void *)addr, 1))
+ return 1;
+
+ asm volatile (
+ "movi %0, 0 \n"
+ "1: \n"
+ "stb%1, (%2)\n"
+ "br 3f \n"
+ "2: \n"
+ "movi %0, 1 \n"
+ "br 3f \n"
+ ".section __ex_table,\"a\" \n"
+ ".align 2 \n"
+ ".long 1b, 2b \n"
+ ".previous \n"
+ "3: \n"
+ : "=&r"(err)
+ : "r"(val), "r" (addr)
+ );
+
+ return err;
+}
+
+/*
+ * Get half-word from [rx + imm]
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static int ldh_c(struct pt_regs *regs, uint32_t rz, uint32_t addr)
+{
+ uint32_t byte0, byte1;
+
+ if (ldb_asm(addr, &byte0))
+ return 1;
+ addr += 1;
+ if (ldb_asm(addr, &byte1))
+ return 1;
+
+ byte0 |= byte1 << 8;
+ put_ptreg(regs, rz, byte0);
+
+ return 0;
+}
+
+/*
+ * Store half-word to [rx + imm]
+ *
+ * Success: return 0
+ * Failure: return 1
+ */
+static int sth_c(struct pt_regs *regs, uint32_t rz, uint32_t addr)
+{
+ uint32_t byte0, byte1;
+
+ byte0 = byte1 = get_ptreg(regs, rz);
+
+ byte0 &= 0xff;
+
+ if (stb_asm(addr, byte0))
+ return 1;
+
+ addr += 1;
+ byte1 = (byte1 >> 8) & 0xff;
+ if (stb_asm(addr, byte1))
+ return 1;
+
+ return 0;
+}
+
+/*
+ * Get word from
[PATCH V2 14/19] csky: User access
Signed-off-by: Guo Ren
---
arch/csky/include/asm/uaccess.h | 397
arch/csky/lib/usercopy.c| 271 +++
2 files changed, 668 insertions(+)
create mode 100644 arch/csky/include/asm/uaccess.h
create mode 100644 arch/csky/lib/usercopy.c
diff --git a/arch/csky/include/asm/uaccess.h b/arch/csky/include/asm/uaccess.h
new file mode 100644
index 000..81063c3
--- /dev/null
+++ b/arch/csky/include/asm/uaccess.h
@@ -0,0 +1,397 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_UACCESS_H
+#define __ASM_CSKY_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define VERIFY_READ0
+#define VERIFY_WRITE 1
+
+static inline int access_ok(int type, const void * addr, unsigned long size)
+{
+return (((unsigned long)addr < current_thread_info()->addr_limit.seg) &&
+ ((unsigned long)(addr + size) <
current_thread_info()->addr_limit.seg));
+}
+
+static inline int verify_area(int type, const void * addr, unsigned long size)
+{
+return access_ok(type, addr, size) ? 0 : -EFAULT;
+}
+
+#define __addr_ok(addr) (access_ok(VERIFY_READ, addr,0))
+
+extern int __put_user_bad(void);
+
+/*
+ * Tell gcc we read from memory instead of writing: this is because
+ * we do not write to any memory gcc knows about, so there are no
+ * aliasing issues.
+ */
+
+/*
+ * These are the main single-value transfer routines. They automatically
+ * use the right size if we just have the right pointer type.
+ *
+ * This gets kind of ugly. We want to return _two_ values in "get_user()"
+ * and yet we don't want to do any pointers, because that is too much
+ * of a performance impact. Thus we have a few rather ugly macros here,
+ * and hide all the ugliness from the user.
+ *
+ * The "__xxx" versions of the user access functions are versions that
+ * do not verify the address space, that must have been done previously
+ * with a separate "access_ok()" call (this is used when we do multiple
+ * accesses to the same area of user memory).
+ *
+ * As we use the same address space for kernel and user data on
+ * Ckcore, we can just do these as direct assignments. (Of course, the
+ * exception handling means that it's no longer "just"...)
+ */
+
+#define put_user(x,ptr) \
+ __put_user_check((x), (ptr), sizeof(*(ptr)))
+
+#define __put_user(x,ptr) \
+ __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+#define __ptr(x) ((unsigned long *)(x))
+
+#define get_user(x,ptr) \
+ __get_user_check((x), (ptr), sizeof(*(ptr)))
+
+#define __get_user(x,ptr) \
+ __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+#define __put_user_nocheck(x, ptr, size)\
+({ \
+ long __pu_err=0;\
+ typeof(*(ptr)) *__pu_addr = (ptr); \
+ typeof(*(ptr)) __pu_val = (typeof(*(ptr)))(x); \
+ if(__pu_addr){ \
+ __put_user_size(__pu_val, (__pu_addr), (size), __pu_err); \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_check(x,ptr,size)\
+({ \
+ long __pu_err = -EFAULT;\
+ typeof(*(ptr)) *__pu_addr = (ptr); \
+ typeof(*(ptr)) __pu_val = (typeof(*(ptr)))(x); \
+ if (access_ok(VERIFY_WRITE, __pu_addr, size) && __pu_addr) \
+ __put_user_size(__pu_val, __pu_addr, (size), __pu_err); \
+ __pu_err; \
+})
+
+#define __put_user_size(x,ptr,size,retval) \
+do {\
+ retval = 0; \
+ switch (size) { \
+ case 1: __put_user_asm_b(x, ptr, retval); break;\
+ case 2: __put_user_asm_h(x, ptr, retval); break;\
+ case 4: __put_user_asm_w(x, ptr, retval); break;\
+ case 8: __put_user_asm_64(x, ptr, retval); break; \
+ default: __put_user_bad(); \
+ } \
+} while (0)
+
+/*
+ * We don't tell gcc that we are accessing memory, but this is OK
+ * because we do not write to any memory gcc knows
[PATCH V2 00/19] C-SKY(csky) Linux Kernel Port
csky: revert back Kconfig select. 590c7e6 csky: bugfix compile error with CONFIG_AUDIT 1989292 csky: revert some back with cleanup unistd.h f1454fe csky: cleanup unistd.h 5d2985f csky: cleanup Kconfig and Makefile. 423d97e csky: cancel subdirectories cae2af4 csky: use asm-generic/fcntl.h Guo Ren (19): csky: Build infrastructure csky: defconfig csky: Kernel booting csky: Exception handling csky: System Call csky: Cache and TLB routines csky: MMU and page table management csky: Process management and Signal csky: VDSO and rt_sigreturn csky: IRQ handling csky: Atomic operations csky: ELF and module probe csky: Library functions csky: User access csky: Debug and Ptrace GDB csky: SMP support csky: Misc headers clocksource: add C-SKY clocksource drivers irqchip: add C-SKY irqchip drivers arch/csky/Kconfig| 211 arch/csky/Kconfig.debug | 29 ++ arch/csky/Makefile | 92 ++ arch/csky/abiv1/Makefile | 8 + arch/csky/abiv1/alignment.c | 332 +++ arch/csky/abiv1/bswapdi.c| 18 + arch/csky/abiv1/bswapsi.c| 15 + arch/csky/abiv1/cacheflush.c | 51 +++ arch/csky/abiv1/inc/abi/cacheflush.h | 42 +++ arch/csky/abiv1/inc/abi/ckmmu.h | 80 + arch/csky/abiv1/inc/abi/entry.h | 152 + arch/csky/abiv1/inc/abi/page.h | 26 ++ arch/csky/abiv1/inc/abi/pgtable-bits.h | 36 ++ arch/csky/abiv1/inc/abi/reg_ops.h| 47 +++ arch/csky/abiv1/inc/abi/regdef.h | 15 + arch/csky/abiv1/inc/abi/tlb.h| 11 + arch/csky/abiv1/inc/abi/vdso.h | 17 + arch/csky/abiv1/memcpy.S | 344 +++ arch/csky/abiv1/mmap.c | 65 arch/csky/abiv2/Makefile | 4 + arch/csky/abiv2/cacheflush.c | 55 arch/csky/abiv2/fpu.c| 242 ++ arch/csky/abiv2/inc/abi/cacheflush.h | 38 +++ arch/csky/abiv2/inc/abi/ckmmu.h | 88 + arch/csky/abiv2/inc/abi/entry.h | 149 + arch/csky/abiv2/inc/abi/fpu.h| 219 arch/csky/abiv2/inc/abi/page.h | 14 + arch/csky/abiv2/inc/abi/pgtable-bits.h | 36 ++ arch/csky/abiv2/inc/abi/reg_ops.h| 38 +++ arch/csky/abiv2/inc/abi/regdef.h | 15 + arch/csky/abiv2/inc/abi/tlb.h| 12 + arch/csky/abiv2/inc/abi/vdso.h | 18 + arch/csky/abiv2/memcpy.c | 43 +++ arch/csky/boot/Makefile | 25 ++ arch/csky/boot/dts/Makefile | 14 + arch/csky/boot/dts/include/dt-bindings | 1 + arch/csky/configs/gx66xx_defconfig | 549 +++ arch/csky/configs/qemu_ck807_defconfig | 541 ++ arch/csky/include/asm/Kbuild | 72 arch/csky/include/asm/addrspace.h| 10 + arch/csky/include/asm/barrier.h | 19 ++ arch/csky/include/asm/bitops.h | 277 arch/csky/include/asm/cache.h| 29 ++ arch/csky/include/asm/cacheflush.h | 9 + arch/csky/include/asm/checksum.h | 77 + arch/csky/include/asm/cmpxchg.h | 68 arch/csky/include/asm/dma-mapping.h | 13 + arch/csky/include/asm/elf.h | 149 + arch/csky/include/asm/fixmap.h | 65 arch/csky/include/asm/highmem.h | 50 +++ arch/csky/include/asm/io.h | 23 ++ arch/csky/include/asm/irq.h | 10 + arch/csky/include/asm/irqflags.h | 49 +++ arch/csky/include/asm/mmu.h | 11 + arch/csky/include/asm/mmu_context.h | 158 + arch/csky/include/asm/page.h | 104 ++ arch/csky/include/asm/pgalloc.h | 108 ++ arch/csky/include/asm/pgtable.h | 301 + arch/csky/include/asm/processor.h| 123 +++ arch/csky/include/asm/reg_ops.h | 16 + arch/csky/include/asm/segment.h | 18 + arch/csky/include/asm/shmparam.h | 10 + arch/csky/include/asm/smp.h | 26 ++ arch/csky/include/asm/spinlock.h | 174 ++ arch/csky/include/asm/spinlock_types.h | 20 ++ arch/csky/include/asm/string.h | 19 ++ arch/csky/include/asm/syscall.h | 69 arch/csky/include/asm/syscalls.h | 14 + arch/csky/include/asm/thread_info.h | 73 arch/csky/include/asm/tlb.h | 19 ++ arch/csky/include/asm/tlbflush.h | 22 ++ arch/csky/include/asm/traps.h| 39 +++ arch/csky/include/asm/uaccess.h | 397 ++ arch/csky/include/asm/unistd.h | 4 + arch/csky/include/asm/vdso.h | 12 + arch/csky/include/uapi/asm/Kbuild| 33 ++ arch/csky/include/uapi/asm/byteorder.h | 14 + arch/csky
[PATCH V2 09/19] csky: VDSO and rt_sigreturn
Signed-off-by: Guo Ren
---
arch/csky/abiv1/inc/abi/vdso.h | 17
arch/csky/abiv2/inc/abi/vdso.h | 18 +
arch/csky/include/asm/vdso.h | 12 ++
arch/csky/kernel/vdso.c| 89 ++
4 files changed, 136 insertions(+)
create mode 100644 arch/csky/abiv1/inc/abi/vdso.h
create mode 100644 arch/csky/abiv2/inc/abi/vdso.h
create mode 100644 arch/csky/include/asm/vdso.h
create mode 100644 arch/csky/kernel/vdso.c
diff --git a/arch/csky/abiv1/inc/abi/vdso.h b/arch/csky/abiv1/inc/abi/vdso.h
new file mode 100644
index 000..a99f0e4
--- /dev/null
+++ b/arch/csky/abiv1/inc/abi/vdso.h
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+
+static inline int setup_vdso_page(unsigned short *ptr)
+{
+ int err = 0;
+
+ /* movi r1, 127 */
+ err |= __put_user(0x67f1, ptr + 0);
+ /* addi r1, (139 - 127) */
+ err |= __put_user(0x20b1, ptr + 1);
+ /* trap 0 */
+ err |= __put_user(0x0008, ptr + 2);
+
+ return err;
+}
diff --git a/arch/csky/abiv2/inc/abi/vdso.h b/arch/csky/abiv2/inc/abi/vdso.h
new file mode 100644
index 000..aa2d489
--- /dev/null
+++ b/arch/csky/abiv2/inc/abi/vdso.h
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+
+static inline int setup_vdso_page(unsigned short *ptr)
+{
+ int err = 0;
+
+ /* movi r7, 173 */
+ err |= __put_user(0xea07, ptr);
+ err |= __put_user(0x008b, ptr+1);
+
+ /* trap 0 */
+ err |= __put_user(0xc000, ptr+2);
+ err |= __put_user(0x2020, ptr+3);
+
+ return err;
+}
diff --git a/arch/csky/include/asm/vdso.h b/arch/csky/include/asm/vdso.h
new file mode 100644
index 000..b275440
--- /dev/null
+++ b/arch/csky/include/asm/vdso.h
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#ifndef __ASM_CSKY_VDSO_H
+#define __ASM_CSKY_VDSO_H
+
+#include
+
+struct csky_vdso {
+ unsigned short rt_signal_retcode[4];
+};
+
+#endif /* __ASM_CSKY_VDSO_H */
diff --git a/arch/csky/kernel/vdso.c b/arch/csky/kernel/vdso.c
new file mode 100644
index 000..dd59aae
--- /dev/null
+++ b/arch/csky/kernel/vdso.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+static struct page *vdso_page;
+
+static int __init init_vdso(void)
+{
+ struct csky_vdso *vdso;
+ int err = 0;
+
+ vdso_page = alloc_page(GFP_KERNEL);
+ if (!vdso_page)
+ panic("Cannot allocate vdso");
+
+ vdso = vmap(&vdso_page, 1, 0, PAGE_KERNEL);
+ if (!vdso)
+ panic("Cannot map vdso");
+
+ clear_page(vdso);
+
+ /*
+* __NR_rt_sigreturn must be 173
+* Because gcc/config/csky/linux-unwind.h use hard code to parse
rt_sigframe.
+*/
+ err = setup_vdso_page(vdso->rt_signal_retcode);
+ if (err) panic("Cannot set signal return code, err: %x.", err);
+
+ dcache_wb_range((unsigned long)vdso, (unsigned long)vdso + 16);
+
+ vunmap(vdso);
+
+ return 0;
+}
+subsys_initcall(init_vdso);
+
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
+ int ret;
+ unsigned long addr;
+ struct mm_struct *mm = current->mm;
+
+ down_write(&mm->mmap_sem);
+
+ addr = get_unmapped_area(NULL, STACK_TOP, PAGE_SIZE, 0, 0);
+ if (IS_ERR_VALUE(addr)) {
+ ret = addr;
+ goto up_fail;
+ }
+
+ ret = install_special_mapping(
+ mm,
+ addr,
+ PAGE_SIZE,
+ VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC,
+ &vdso_page);
+ if (ret)
+ goto up_fail;
+
+ mm->context.vdso = (void *)addr;
+
+up_fail:
+ up_write(&mm->mmap_sem);
+ return ret;
+}
+
+const char *arch_vma_name(struct vm_area_struct *vma)
+{
+ if (vma->vm_mm == NULL)
+ return NULL;
+
+ if (vma->vm_start == (long)vma->vm_mm->context.vdso)
+ return "[vdso]";
+ else
+ return NULL;
+}
+
--
2.7.4
[PATCH V2 01/19] csky: Build infrastructure
Signed-off-by: Guo Ren --- arch/csky/Kconfig | 211 + arch/csky/Kconfig.debug| 29 + arch/csky/Makefile | 92 ++ arch/csky/abiv1/Makefile | 8 ++ arch/csky/abiv2/Makefile | 4 + arch/csky/boot/Makefile| 25 arch/csky/boot/dts/Makefile| 14 +++ arch/csky/boot/dts/include/dt-bindings | 1 + arch/csky/include/asm/Kbuild | 72 +++ arch/csky/include/uapi/asm/Kbuild | 33 ++ arch/csky/kernel/Makefile | 8 ++ arch/csky/lib/Makefile | 1 + arch/csky/mm/Makefile | 13 ++ 13 files changed, 511 insertions(+) create mode 100644 arch/csky/Kconfig create mode 100644 arch/csky/Kconfig.debug create mode 100644 arch/csky/Makefile create mode 100644 arch/csky/abiv1/Makefile create mode 100644 arch/csky/abiv2/Makefile create mode 100644 arch/csky/boot/Makefile create mode 100644 arch/csky/boot/dts/Makefile create mode 12 arch/csky/boot/dts/include/dt-bindings create mode 100644 arch/csky/include/asm/Kbuild create mode 100644 arch/csky/include/uapi/asm/Kbuild create mode 100644 arch/csky/kernel/Makefile create mode 100644 arch/csky/lib/Makefile create mode 100644 arch/csky/mm/Makefile diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig new file mode 100644 index 000..cfeb312 --- /dev/null +++ b/arch/csky/Kconfig @@ -0,0 +1,211 @@ +config CSKY + bool + default y + select ARCH_USE_BUILTIN_BSWAP + select COMMON_CLK + select CLKSRC_MMIO + select CLKSRC_OF + select IRQ_DOMAIN + select HANDLE_DOMAIN_IRQ + select DW_APB_TIMER_OF + select GENERIC_ATOMIC64 + select GENERIC_CLOCKEVENTS + select GENERIC_CPU_DEVICES + select GENERIC_IRQ_CHIP + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_SCHED_CLOCK + select GENERIC_SMP_IDLE_THREAD + select HAVE_ARCH_TRACEHOOK + select HAVE_GENERIC_DMA_COHERENT + select HAVE_KERNEL_GZIP + select HAVE_KERNEL_LZO + select HAVE_KERNEL_LZMA + select HAVE_PERF_EVENTS + select HAVE_C_RECORDMCOUNT + select HAVE_KPROBES + select HAVE_KRETPROBES + select HAVE_DMA_API_DEBUG + select HAVE_MEMBLOCK + select MAY_HAVE_SPARSE_IRQ + select MODULES_USE_ELF_RELA if MODULES + select NO_BOOTMEM + select OF + select OF_EARLY_FLATTREE + select OF_RESERVED_MEM + select PERF_USE_VMALLOC + select RTC_LIB + select TIMER_OF + select USB_ARCH_HAS_EHCI + select USB_ARCH_HAS_OHCI + +config CPU_HAS_CACHEV2 + bool + +config CPU_HAS_HILO + bool + +config CPU_HAS_TLBI + bool + +config CPU_HAS_LDSTEX + bool + help + For SMP cpu need "ldex&stex" instrcutions to keep atomic. + +config CPU_NEED_TLBSYNC + bool + +config CPU_NEED_SOFTALIGN + bool + +config CPU_NO_USER_BKPT + bool + help + For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because + abiv2 is 16/32bit instruction set and "trap 1" is 32bit. + So we need a 16bit instruction as user space bkpt, and it will cause a illegal + instruction exception. + In kernel we parse the *regs->pc to determine wether send SIGTRAP or not. + +config GENERIC_CALIBRATE_DELAY + bool + default y + +config HZ + int + default 100 + +config GENERIC_CSUM + bool + default y + +config GENERIC_HWEIGHT + bool + default y + +config MMU + bool + default y + +config RWSEM_GENERIC_SPINLOCK + bool + default y + +config TIME_LOW_RES + bool + default y + +config TRACE_IRQFLAGS_SUPPORT + bool + default y + +source "init/Kconfig" + +source "kernel/Kconfig.freezer" + +menu "Processor type and features" + +comment "Processor type" + +choice + prompt "CPU MODEL" + default CPU_CK610 + +config CPU_CK610 + bool "CSKY CPU ck610" + select CPU_NEED_TLBSYNC + select CPU_NEED_SOFTALIGN + select CPU_NO_USER_BKPT + +config CPU_CK810 + bool "CSKY CPU ck810" + select CPU_HAS_HILO + select CPU_NEED_TLBSYNC + +config CPU_CK807 + bool "CSKY CPU ck807" + select CPU_HAS_HILO + +config CPU_CK860 + bool "CSKY CPU ck860" + select CPU_HAS_TLBI + select CPU_HAS_CACHEV2 + select CPU_HAS_LDSTEX +endchoice + +config CPU_TLB_SIZE + int + default "128" if(CPU_CK610 || CPU_CK807 || CPU_CK810) + default "1024" if(CPU_CK860) + +config CPU_ASID_BITS + int + default "8" if(CPU_CK610 || CPU_CK807 || CPU_CK810) + default &quo
[PATCH V2 08/19] csky: Process management and Signal
Signed-off-by: Guo Ren
---
arch/csky/abiv2/fpu.c | 242 ++
arch/csky/abiv2/inc/abi/fpu.h | 219
arch/csky/include/asm/mmu_context.h | 158 ++
arch/csky/include/asm/processor.h | 123 +++
arch/csky/include/asm/thread_info.h | 73 +++
arch/csky/include/uapi/asm/sigcontext.h | 13 ++
arch/csky/kernel/process.c | 134
arch/csky/kernel/signal.c | 350
arch/csky/kernel/time.c | 12 ++
9 files changed, 1324 insertions(+)
create mode 100644 arch/csky/abiv2/fpu.c
create mode 100644 arch/csky/abiv2/inc/abi/fpu.h
create mode 100644 arch/csky/include/asm/mmu_context.h
create mode 100644 arch/csky/include/asm/processor.h
create mode 100644 arch/csky/include/asm/thread_info.h
create mode 100644 arch/csky/include/uapi/asm/sigcontext.h
create mode 100644 arch/csky/kernel/process.c
create mode 100644 arch/csky/kernel/signal.c
create mode 100644 arch/csky/kernel/time.c
diff --git a/arch/csky/abiv2/fpu.c b/arch/csky/abiv2/fpu.c
new file mode 100644
index 000..330a908
--- /dev/null
+++ b/arch/csky/abiv2/fpu.c
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+#include
+#include
+#include
+
+#define MTCR_MASK 0xFC00FFE0
+#define MFCR_MASK 0xFC00FFE0
+#define MTCR_DIST 0xC0006420
+#define MFCR_DIST 0xC0006020
+
+void __init init_fpu(void)
+{
+ mtcr("cr<1, 2>", 0);
+}
+
+/*
+ * fpu_libc_helper() is to help libc to excute:
+ * - mfcr %a, cr<1, 2>
+ * - mfcr %a, cr<2, 2>
+ * - mtcr %a, cr<1, 2>
+ * - mtcr %a, cr<2, 2>
+ */
+int fpu_libc_helper(struct pt_regs * regs)
+{
+ int fault;
+ unsigned long instrptr, regx = 0;
+ unsigned long index = 0, tmp = 0;
+ unsigned long tinstr = 0;
+ u16 instr_hi, instr_low;
+
+ instrptr = instruction_pointer(regs);
+ if (instrptr & 1) return 0;
+
+ fault = __get_user(instr_low, (u16 *)instrptr);
+ if (fault) return 0;
+
+ fault = __get_user(instr_hi, (u16 *)(instrptr + 2));
+ if (fault) return 0;
+
+ tinstr = instr_hi | ((unsigned long)instr_low << 16);
+
+ if (((tinstr >> 21) & 0x1F) != 2) return 0;
+
+ if ((tinstr & MTCR_MASK) == MTCR_DIST)
+ {
+ index = (tinstr >> 16) & 0x1F;
+ if(index > 13) return 0;
+
+ tmp = tinstr & 0x1F;
+ if (tmp > 2) return 0;
+
+ regx = *(®s->a0 + index);
+
+ if(tmp == 1)
+ mtcr("cr<1, 2>", regx);
+ else if (tmp == 2)
+ mtcr("cr<2, 2>", regx);
+ else
+ return 0;
+
+ regs->pc +=4;
+ return 1;
+ }
+
+ if ((tinstr & MFCR_MASK) == MFCR_DIST) {
+ index = tinstr & 0x1F;
+ if(index > 13) return 0;
+
+ tmp = ((tinstr >> 16) & 0x1F);
+ if (tmp > 2) return 0;
+
+ if (tmp == 1)
+ regx = mfcr("cr<1, 2>");
+ else if (tmp == 2)
+ regx = mfcr("cr<2, 2>");
+ else
+ return 0;
+
+ *(®s->a0 + index) = regx;
+
+ regs->pc +=4;
+ return 1;
+ }
+
+ return 0;
+}
+
+void fpu_fpe(struct pt_regs * regs)
+{
+ int sig;
+ unsigned int fesr;
+ siginfo_t info;
+ asm volatile("mfcr %0, cr<2, 2>":"=r"(fesr));
+
+ if(fesr & FPE_ILLE){
+ info.si_code = ILL_ILLOPC;
+ sig = SIGILL;
+ }
+ else if(fesr & FPE_IDC){
+ info.si_code = ILL_ILLOPN;
+ sig = SIGILL;
+ }
+ else if(fesr & FPE_FEC){
+ sig = SIGFPE;
+ if(fesr & FPE_IOC){
+ info.si_code = FPE_FLTINV;
+ }
+ else if(fesr & FPE_DZC){
+ info.si_code = FPE_FLTDIV;
+ }
+ else if(fesr & FPE_UFC){
+ info.si_code = FPE_FLTUND;
+ }
+ else if(fesr & FPE_OFC){
+ info.si_code = FPE_FLTOVF;
+ }
+ else if(fesr & FPE_IXC){
+ info.si_code = FPE_FLTRES;
+ }
+ else {
+ info.si_code = NSIGFPE;
+ }
+ }
+ else {
+ info.si_code = NSIGFPE;
+ sig = SIGFPE;
+ }
+ info.si_signo = SIGFPE;
+ info.si_errno = 0;
+ info.si_addr = (void *)regs
Re: [PATCH V2 01/19] csky: Build infrastructure
Hi Randy, On Sun, Jul 01, 2018 at 02:01:52PM -0700, Randy Dunlap wrote: > Hi, > Just a few comments... > Thx for your review. I'll fixup all of you mentioned and self-check again. Guo Ren
Re: [PATCH V2 07/19] csky: MMU and page table management
On Mon, Jul 02, 2018 at 06:29:15AM -0700, Christoph Hellwig wrote: > This commit is missing an explanation. The patch is for abiv1 & abiv2 CPU series' MMU support. - abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. - abiv2 CPUs are all PIPT cache and they could support highmem. We seperate abiv1 and abiv2 into two direcotries for coding convention. > For the dma-mapping code please use the generic kernel/dma/noncoherent.c > code instead of duplicating it. Thx for the tips and I think you mean the lib/dma-noncoherent.c in the lastest kernel source and not in linux-4.16.2. I'll rebase on the newest RC version of linux in next version patch and reuse the code in lib/dma-noncoherent.c. Current csky_dma_alloc implementation is not good, it use 512MB uncached area to mirror the Normal cachable-512MB area. In next version patch, we will increase the max-Normal memory zone to (1GB + 768MB). In csky_dma_alloc we will seperate the atomic_dma and non-atomic_dma and reserve the area in fixmap area. Here is my memory layout plan in next version patch: Fixmap : 0xffc02000 – 0xf000 (4 MB - 12KB) kmap_atomic, dma_atomic ... Pkmap: 0xff80 – 0xffc0 (4 MB)PTR_PER_PTE = 1024 Vmalloc : 0xf020 – 0xff00 (238 MB) max: 238MB + 256MB + 1GB Lowmem : 0x8000 – 0xf0000000 (1G + 768 MB) Guo Ren
Re: [PATCH V2 19/19] irqchip: add C-SKY irqchip drivers
On Mon, Jul 02, 2018 at 09:27:13PM -0600, Rob Herring wrote: > Commit message needed. Ok > Do you mean "legacy"? Yes, it's from arch/csky/Kconfig.debug, and I'll correct it in next version patch. > It would be better to make this run-time so you can support multiple > platforms in one build. You should be able to determine this from DT. The CSKY_VECIRQ_LEGACY means when cpu receive the IRQ, it will directly enter into the exception vector entry indexed by IRQ number. Just some old SOC need the feature. We reserve it just as we've mentioned in arch/csky/Kconfig.debug: config CSKY_VECIRQ_LEGENCY bool "Use legency IRQ vector for interrupt, it's for SOC bugfix." help It's a deprecated method for arch/csky. Don't use it, unless your SOC has bug. As we need this config to setup the vector tables in arch/csky/kernel/traps.c, "determine this from DT" isn't suitable for us. > > +IRQCHIP_DECLARE(csky_intc_v1, "csky,intc-v1", csky_intc_v1_init); > > DT bindings must be documented. And the vendor prefix must also be > registered in vendor-prefixes.txt. Ok, thx for the tips. I'll follow the rules. > > +IRQCHIP_DECLARE(csky_intc_v2, "csky,intc-v2", csky_intc_v2_init); > > And this one. Use of v1, v2, etc. is generally discouraged unless > there is some strict versioning behind it. Most bindings use > implementation specific compatible strings (which typically means the > SoC name/number as part of it). > > +IRQCHIP_DECLARE(nationalchip_intc_v1_ave, "nationalchip,intc-v1,ave", > > intc_init); > > Here too. And your timers as well. "csky,intc-v1/v2" are used in many SOCs, just like "arm,gic-v2/v3". So may I change them like these?: csky,intc-v1 >>> csky,ck807-intc csky,ck810-intc csky,ck860-intc csky,intc-v2 >>> csky,ck860-mpintc nationalchip,intc-v1,ave >>> nationalchip,ck610-gx6605s-intc > You'll also need to do cpu bindings as well especially for SMP. Ok, thx for tips.
Re: [PATCH V2 02/19] csky: defconfig
On Mon, Jul 02, 2018 at 09:16:27PM -0600, Rob Herring wrote: > > Are these configs mutually exclusive? We try to have one kernel build > serve many platforms. So you'd probably want to divide things between > the 2 ABIs. Yes, they are mutually exclusive, and may I prepare defconfigs like these: abiv1_defconfig abiv2_defconfig (ck807 ck810 ck860 are also mutually exclusive in -mcpu=ck807/ck810/ck860, you need "make menuconfig" to select correct CPU, so they couldn't be determined from DT. just like ARMv5, ARMv7-A and ARMv7-M) > It looks like you still have lots of options enabled that I wouldn't > expect you to need. Start with something more minimal for what you > need to boot and support upstream. Ok, I'll clean them up in next version patch. > For a full config, you can use allmodconfig at least to build test. Thx for the tip. Guo Ren
Re: [PATCH V2 01/19] csky: Build infrastructure
On Mon, Jul 02, 2018 at 09:33:51PM -0600, Rob Herring wrote: > > +config CSKY_BUILTIN_DTB > > + bool "Use kernel builtin dtb" > > + > > +config CSKY_BUILTIN_DTB_NAME > > + string "kernel builtin dtb name" > > + depends on CSKY_BUILTIN_DTB > > +endmenu > > These options generally exist for backwards compatibility with legacy > bootloaders that don't support DT which shouldn't apply here given > this is a new arch. If we need this for other reasons, it should not > be an architecture specific option. We want the BUILTIN_DTB for some boards and they don't need change dtb at all. And I just follow other archs BUILTIN_DTB in their Kconfig. eg: xtensa, h8300, mips, nds32, sh, openrisc, arc ... I just keep this in Kconfig.debug and it's not a recommended method. Guo Ren
Re: [PATCH V2 16/19] csky: SMP support
On Fri, Jul 06, 2018 at 05:21:00PM +0100, Mark Rutland wrote:
> Please don't open-code this. Use of_device_is_available(), which checks
> the status property itself. e.g.
>
> void __init setup_smp(void)
> {
> struct device_node *node = NULL;
>
> while ((node = of_find_node_by_type(node, "cpu"))) {
> if (!of_device_is_available(node))
> continue;
>
> ...
> }
> }
Ok, approve.
> Please use the reg property, you need it to describe which particular
> CPUs are available.
>
> You probably also want a mapping from Linux logical CPU id to your
> physical CPU id, and a sanity check on this. See arm64 for an example.
Yes, you are right. Reg property could determine which bit of CPU in
cr<0, 29> could be booted.
Thx for the tips.
Guo Ren
Re: [PATCH V2 11/19] csky: Atomic operations
On Fri, Jul 06, 2018 at 01:56:14PM +0200, Peter Zijlstra wrote:
> That's how LL/SC works. What I was asking is if they have any effect on
> memory ordering. Some architectures have LL/SC imply memory ordering,
> most do not.
>
> Going by your spinlock implementation they don't imply any memory
> ordering.
ldex/stex don't imply any memory ordering.
>
> > > The mandated semantics for xchg() / cmpxchg() is an effective smp_mb()
> > > before _and_ after.
> >
> > switch (size) { \
> > case 4: \
> > smp_mb(); \
> > asm volatile ( \
> > "1: ldex.w %0, (%3) \n"\
> > " mov %1, %2 \n"\
> > " stex.w %1, (%3) \n"\
> > " bez %1, 1b \n"\
> > : "=&r" (__ret), "=&r" (tmp)\
> > : "r" (__new), "r"(__ptr) \
> > : "memory");\
> > smp_mb(); \
> > break; \
> > Hmm?
> > But I couldn't undertand what's wrong without the 1th smp_mb()?
> > 1th smp_mb will make all ld/st finish before ldex.w. Is it necessary?
>
> Yes.
>
> CPU0CPU1
>
> r1 = READ_ONCE(x); WRITE_ONCE(y, 1);
> r2 = xchg(&y, 2); smp_store_release(&x, 1);
>
> must not allow: r1==1 && r2==0
CPU1 smp_store_release could be finished before WRITE_ONCE, so r1=1 &&
r2=0?
> > > The above implementation suggests LDEX implies a SYNC.IS, is this
> > > correct?
> > No, ldex doesn't imply a sync.is.
>
> Right, as per the spinlock emails, then your proposed primitives are
> incorrect.
Yes, approve.
Guo Ren
Re: [PATCH V2 11/19] csky: Atomic operations
On Fri, Jul 06, 2018 at 02:17:16PM +0200, Peter Zijlstra wrote: > > > > CPU0CPU1 > > > > r1 = READ_ONCE(x); WRITE_ONCE(y, 1); > > r2 = xchg(&y, 2); smp_store_release(&x, 1); > > > > must not allow: r1==1 && r2==0 > > Also, since you said "SYNC.IS" is a pipeline flush, those > instruction-sync primitives normally do not imply a store-buffer flush, > does yours? If not it is not a valid smp_mb() implementation. Sync.is will flush pipeline and store-buffer. "sync" means completion memory barrier. "i" means flush cpu pipeline. "s" means sharable to other cpus. > > Notably: > > CPU0CPU1 > > WRITE_ONCE(x, 1); WRITE_ONCE(y, 1); > smp_mb(); smp_mb(); > r0 = READ_ONCE(y); r1 = READ_ONCE(x); > > must not allow: r0==0 && r1==0 > > Which would be possible with a regular instruction-sync barrier, but > must absolutely not be true with a full memory barrier. > > (and you can replace the smp_mb(); r = READ_ONCE(); with r = xchg() to > again see why you need that first smp_mb()). CPU0CPU1 WRITE_ONCE(x, 1) WRITE_ONCE(y, 1) r0 = xchg(&y, 2)r1 = xchg(&x, 2) must not allow: r0==0 && r1==0 So we must add a smp_mb between WRITE_ONCE() and xchg(), right? Guo Ren
Re: [PATCH V2 06/19] csky: Cache and TLB routines
On Thu, Jul 05, 2018 at 07:40:25PM +0200, Peter Zijlstra wrote:
> > +#ifdef CONFIG_SMP
> > +#define mb() asm volatile ("sync.is":::"memory")
> > +#else
> > +#define mb() asm volatile ("sync":::"memory")
> > +#endif
>
> This is very suspect, please elaborate.
>
> What I would've expected is:
>
> #define mb() asm volatile ("sync" ::: "memory")
>
> #ifdef CONFIG_SMP
> #define __smp_mb() asm volatile ("sync.is" ::: "memory")
> #endif
>
> Is that in fact what you meant?
>
> Do you have a reference to your architecture manual and memory model
> description somewhere?
I'll fixup it in next version patch.
Re: [PATCH V2 11/19] csky: Atomic operations
On Sat, Jul 07, 2018 at 09:54:37PM +0200, Andrea Parri wrote: > Hi Guo, > > On Sat, Jul 07, 2018 at 03:42:10PM +0800, Guo Ren wrote: > > On Fri, Jul 06, 2018 at 01:56:14PM +0200, Peter Zijlstra wrote: > > > CPU0CPU1 > > > > > > r1 = READ_ONCE(x); WRITE_ONCE(y, 1); > > > r2 = xchg(&y, 2); smp_store_release(&x, 1); > > > > > > must not allow: r1==1 && r2==0 > > CPU1 smp_store_release could be finished before WRITE_ONCE, so r1=1 && > > r2=0? > > The emphasis is on the "must": your implementation __must__ prevent this > from happening (say, by inserting memory barriers in smp_store_release()); > if your implementation allows the state (r1==1 && r2==0), then the imple- > mentation is incorrect. Ok, Got it. > I'd suggest you have a look at the Linux-kernel memory consistency model > documentation and the associated tools, starting with: > > Documentation/memory-barriers.txt > tools/memory-model/ Thx for the tips. > (and please do not hesitate to ask questions about them, if something is > unclear). I'll. Thx again. Guo Ren
