Re: [PATCH v9 11/12] mm/vmalloc: Hugepage vmalloc mappings

[Ding Tianhong]

> +again:
> + size = PAGE_ALIGN(size);
> + area = __get_vm_area_node(size, align, VM_ALLOC | VM_UNINITIALIZED |
>   vm_flags, start, end, node, gfp_mask, caller);
>   if (!area)
>   goto fail;
>  
> - addr = __vmalloc_area_node(area, gfp_mask, prot, node);
> + addr = __vmalloc_area_node(area, gfp_mask, prot, shift, node);
>   if (!addr)
> - return NULL;
> + goto fail;
>  
>   /*
>* In this function, newly allocated vm_struct has VM_UNINITIALIZED
> @@ -2788,8 +2878,19 @@ void *__vmalloc_node_range(unsigned long size, 
> unsigned long align,
>   return addr;
>  
>  fail:
> - warn_alloc(gfp_mask, NULL,
> + if (shift > PAGE_SHIFT) {
> + free_vm_area(area);
> + shift = PAGE_SHIFT;
> + align = real_align;
> + size = real_size;
> + goto again;
> + }
> +
Hi, Nicholas:

I met a problem like this:

[   67.103584] [ cut here ]
[   67.103884] kernel BUG at vmalloc.c:2892!
[   67.104387] Internal error: Oops - BUG: 0 [#1] SMP
[   67.104942] Process insmod (pid: 1161, stack limit = 0x(ptrval))
[   67.105356] CPU: 2 PID: 1161 Comm: insmod Tainted: G   O  
4.19.95+ #9
[   67.105702] Hardware name: linux,dummy-virt (DT)
[   67.106006] pstate: a005 (NzCv daif -PAN -UAO)
[   67.106285] pc : free_vm_area+0x78/0x80
[   67.106549] lr : free_vm_area+0x58/0x80

it looks like when __vmalloc_area_node failed, the area is already released, 
and the free_vm_area
will release the vm area again, so trigger the problem.

3405 ret = remove_vm_area(area->addr);
3406 BUG_ON(ret != area);
3407 kfree(area);


Ding
> + if (!area) {
> + /* Warn for area allocation, page allocations already warn */
> + warn_alloc(gfp_mask, NULL,
> "vmalloc: allocation failure: %lu bytes", real_size);
> + }
>   return NULL;
>  }
>  
> 

RE: [PATCH v2 3/3] iommu/vt-d: Fix ineffective devTLB invalidation for subdevices

[Liu, Yi L]

Hi Baolu,

Well received, all comments accepted. thanks.

Regards,
Yi Liu

> From: Lu Baolu 
> Sent: Wednesday, December 23, 2020 6:10 PM
> 
> Hi Yi,
> 
> On 2020/12/23 14:27, Liu Yi L wrote:
> > iommu_flush_dev_iotlb() is called to invalidate caches on device. It only
> > loops the devices which are full-attached to the domain. For sub-devices,
> > this is ineffective. This results in invalid caching entries left on the
> > device. Fix it by adding loop for subdevices as well. Also, the domain->
> > has_iotlb_device needs to be updated when attaching to subdevices.
> >
> > Fixes: 67b8e02b5e761 ("iommu/vt-d: Aux-domain specific domain
> attach/detach")
> > Signed-off-by: Liu Yi L 
> > ---
> >   drivers/iommu/intel/iommu.c | 63 +++-
> -
> >   1 file changed, 47 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> > index acfe0a5b955e..e97c5ac1d7fc 100644
> > --- a/drivers/iommu/intel/iommu.c
> > +++ b/drivers/iommu/intel/iommu.c
> > @@ -726,6 +726,8 @@ static int domain_update_device_node(struct
> dmar_domain *domain)
> > return nid;
> >   }
> >
> > +static void domain_update_iotlb(struct dmar_domain *domain);
> > +
> >   /* Some capabilities may be different across iommus */
> >   static void domain_update_iommu_cap(struct dmar_domain *domain)
> >   {
> > @@ -739,6 +741,8 @@ static void domain_update_iommu_cap(struct
> dmar_domain *domain)
> >  */
> > if (domain->nid == NUMA_NO_NODE)
> > domain->nid = domain_update_device_node(domain);
> > +
> > +   domain_update_iotlb(domain);
> >   }
> >
> >   struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
> u8 bus,
> > @@ -1459,6 +1463,18 @@ iommu_support_dev_iotlb (struct dmar_domain
> *domain, struct intel_iommu *iommu,
> > return NULL;
> >   }
> >
> > +static bool dev_iotlb_enabled(struct device_domain_info *info)
> > +{
> > +   struct pci_dev *pdev;
> > +
> > +   if (!info->dev || !dev_is_pci(info->dev))
> > +   return false;
> > +
> > +   pdev = to_pci_dev(info->dev);
> > +
> > +   return !!pdev->ats_enabled;
> > +}
> 
> I know this is just separated from below function. But isn't "(info &&
> info->ats_enabled)" is enough?
> 
> > +
> >   static void domain_update_iotlb(struct dmar_domain *domain)
> >   {
> > struct device_domain_info *info;
> > @@ -1466,17 +1482,20 @@ static void domain_update_iotlb(struct
> dmar_domain *domain)
> >
> > assert_spin_locked(&device_domain_lock);
> >
> > -   list_for_each_entry(info, &domain->devices, link) {
> > -   struct pci_dev *pdev;
> > -
> > -   if (!info->dev || !dev_is_pci(info->dev))
> > -   continue;
> > -
> > -   pdev = to_pci_dev(info->dev);
> > -   if (pdev->ats_enabled) {
> > +   list_for_each_entry(info, &domain->devices, link)
> > +   if (dev_iotlb_enabled(info)) {
> > has_iotlb_device = true;
> > break;
> > }
> > +
> > +   if (!has_iotlb_device) {
> > +   struct subdev_domain_info *sinfo;
> > +
> > +   list_for_each_entry(sinfo, &domain->subdevices, link_domain)
> > +   if (dev_iotlb_enabled(get_domain_info(sinfo->pdev)))
> {
> 
> Please make the code easier for reading by:
> 
>   info = get_domain_info(sinfo->pdev);
>   if (dev_iotlb_enabled(info))
>   
> 
> Best regards,
> baolu
> 
> > +   has_iotlb_device = true;
> > +   break;
> > +   }
> > }
> >
> > domain->has_iotlb_device = has_iotlb_device;
> > @@ -1557,25 +1576,37 @@ static void iommu_disable_dev_iotlb(struct
> device_domain_info *info)
> >   #endif
> >   }
> >
> > +static void __iommu_flush_dev_iotlb(struct device_domain_info *info,
> > +   u64 addr, unsigned int mask)
> > +{
> > +   u16 sid, qdep;
> > +
> > +   if (!info || !info->ats_enabled)
> > +   return;
> > +
> > +   sid = info->bus << 8 | info->devfn;
> > +   qdep = info->ats_qdep;
> > +   qi_flush_dev_iotlb(info->iommu, sid, info->pfsid,
> > +  qdep, addr, mask);
> > +}
> > +
> >   static void iommu_flush_dev_iotlb(struct dmar_domain *domain,
> >   u64 addr, unsigned mask)
> >   {
> > -   u16 sid, qdep;
> > unsigned long flags;
> > struct device_domain_info *info;
> > +   struct subdev_domain_info *sinfo;
> >
> > if (!domain->has_iotlb_device)
> > return;
> >
> > spin_lock_irqsave(&device_domain_lock, flags);
> > -   list_for_each_entry(info, &domain->devices, link) {
> > -   if (!info->ats_enabled)
> > -   continue;
> > +   list_for_each_entry(info, &domain->devices, link)
> > +   __iommu_flush_dev_iotlb(info, addr, mask);
> >
> > -   sid = info->bus << 8 | info->devfn;
> > -   qdep = info->ats_qdep;
> > -   

[PATCH] scsi: fnic: Fix memleak in vnic_dev_init_devcmd2

[Dinghao Liu]

When ioread32() returns 0x, we should execute
cleanup functions like other error handling paths before
returning.

Signed-off-by: Dinghao Liu 
---
 drivers/scsi/fnic/vnic_dev.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/fnic/vnic_dev.c b/drivers/scsi/fnic/vnic_dev.c
index a2beee6e09f0..5988c300cc82 100644
--- a/drivers/scsi/fnic/vnic_dev.c
+++ b/drivers/scsi/fnic/vnic_dev.c
@@ -444,7 +444,8 @@ static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
if (fetch_index == 0x) { /* check for hardware gone  */
pr_err("error in devcmd2 init");
-   return -ENODEV;
+   err = -ENODEV;
+   goto err_free_wq;
}
 
/*
@@ -460,7 +461,7 @@ static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
if (err)
-   goto err_free_wq;
+   goto err_disable_wq;
 
vdev->devcmd2->result =
(struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
@@ -481,8 +482,9 @@ static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
 
 err_free_desc_ring:
vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
-err_free_wq:
+err_disable_wq:
vnic_wq_disable(&vdev->devcmd2->wq);
+err_free_wq:
vnic_wq_free(&vdev->devcmd2->wq);
 err_free_devcmd2:
kfree(vdev->devcmd2);
-- 
2.17.1

RE: [PATCH 1/1] [Add support Mediatek mt7921U]

[陳揚文]

Hi Marcel,

Thanks for your suggestions, I will remove the duplicate definitions and 
functions.

Firstly, we will add the support of enabling MT7921U in btusb.c
Secondary, we will discuss the driver architecture with you.
Finally, we update the common part and hif part for MT7921.

I have a couple questions for driver architecture.
1. Global dev.
2. Unify common part.
3. HIF part (usb/sdio/pcie/uart)

> Hi Mark,
> 
> > This patch adds the support of enabling MT7921U, it's USB-based
> > Bluetooth function.
> >
> > There are some component in the Mediatek driver.
> > 1. Btmtk_main: it's common code for Mediatek devices,
> >   such as firmware download, chip initialization,
> >   state machine handling and etc.
> > 2. Btmtkusb: it's for usb interface,
> >   such as usb endpoint enumeration, urb handling and etc.
> >
> > Firstly, we update the common part and usb part for MT7921U.
> > Secondly, we will add the support MT7921S, it's SDIO-based device.
> > Finally, we will add the procedure to support uart/pcie interfaces.
> 
> create a btmtk.[ch] module like the other vendors did if it makes sense.
> Otherwise just skip that part for now and get btmtkusb.c driver working. You
> can later unify between all 3 transports.
> 
> I would do the latter since it would first make sense to really see where the
> common parts are. And I have to be frank, this driver needs massive cleanup. I
> am not going to accept this tons of copy-and-paste left and right.
> 
> Please provide the content of /sys/kernel/debug/usb/devices in the commit
> message.
> 
> > +/* To support dynamic mount of interface can be probed */
> > +static int btmtk_intf_num = BT_MCU_MINIMUM_INTERFACE_NUM;
> > +/* To allow g_bdev being sized from btmtk_intf_num setting */
> > +static struct btmtk_dev **g_bdev;
> 
> NO. Period. No global dev instances.

[Global dev.]
The global dev is for our state machine that design for error recovery, such as 
chip reset, memory dump and etc.
We must to make sure state machine transition that is the same flow for each 
interfaces (usb/sdio/pcie/uart).
[Mediatek driver]
-> Create a dev before interface probe.
[Linux kernel Bluetooth driver]
-> Create a dev in interface probe (btusb_probe).

May we create a global dev before interface probe?

> > +
> > +/**
> > + * Kernel Module init/exit Functions
> > + */
> > +static int __init main_driver_init(void)
> > +{
> > +   int ret = 0;
> > +   int i;
> > +
> > +   /* Mediatek Driver Version */
> > +   BTMTK_INFO("%s: MTK BT Driver Version : %s", __func__, VERSION);
> > +
> > +   ret = main_init();
> > +   if (ret < 0)
> > +   return ret;
> > +
> > +   for (i = 0; i < btmtk_intf_num; i++)
> > +   btmtk_set_chip_state(g_bdev[i], BTMTK_STATE_DISCONNECT);
> > +
> > +   ret = btmtk_cif_register();
> > +   if (ret < 0) {
> > +   BTMTK_ERR("*** USB registration failed(%d)! ***", ret);
> > +   main_exit();
> > +   return ret;
> > +   }
> > +
> > +   BTMTK_INFO("%s: Done", __func__);
> > +   return ret;
> > +}
> 
> NO. Period. Use module_usb_driver() and if you need anything more, you are
> doing something wrong.

We would like to unify state machine, dev allocate, hif_hook and hif_register.
[Unify Common Part]: btmtk_main
State machine: Mediatek chip error recovery
Dev allocate: Bluetooth dev.
Mediatek chip-related behavior: Firmware download.
HCI device-related: hci register, open, close and send_frame.

[HIF Part] : btmtkusb/btmtksdio/btmtkuart
hif_hook (cif interface): read/write register, open/close, chip reset and etc.
hif_register (cif register): hif registration-related, such as 
usb_register/sdio_register_driver.

May we use the driver architecture?

With best regards,
Mark

[PATCH] media: atomisp: Remove redundant NULL check

[Xu Wang]

Fix warnings reported by coccicheck:
./drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c:159:4-10: 
WARNING: NULL check before some freeing functions is not needed.

Signed-off-by: Xu Wang 
---
 .../media/atomisp/pci/runtime/isp_param/src/isp_param.c| 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git 
a/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c 
b/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c
index e861777385a0..823ec54b6281 100644
--- a/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c
+++ b/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c
@@ -155,8 +155,7 @@ ia_css_isp_param_destroy_isp_parameters(
 
for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) {
for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) {
-   if (mem_params->params[pclass][mem].address)
-   kvfree(mem_params->params[pclass][mem].address);
+   kvfree(mem_params->params[pclass][mem].address);
if (css_params->params[pclass][mem].address)

hmm_free(css_params->params[pclass][mem].address);
mem_params->params[pclass][mem].address = NULL;
-- 
2.17.1

[PATCH] media: atomisp: Remove redundant NULL check

[Xu Wang]

./drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c:390:2-8:
 WARNING: NULL check before some freeing functions is not needed.

Signed-off-by: Xu Wang 
---
 .../atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c   | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git 
a/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c
 
b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c
index 3e72dabe7ef6..13caa55fd51a 100644
--- 
a/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c
+++ 
b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c
@@ -386,8 +386,7 @@ ia_css_isp_dvs_statistics_map_allocate(
 
return me;
 err:
-   if (me)
-   kvfree(me);
+   kvfree(me);
return NULL;
 }
 
-- 
2.17.1

[PATCH 1/2] drivers/gpu/drm/ast: Fix infinite loop if read fails

[Defang Bo]

[Why] Similar to commit <298360af3> ast_init_dram_reg() configures a window in 
order to access BMC memory.
A BMC register can be configured to disallow this, and if so, causes
an infinite loop in the ast driver which renders the system unusable.

[How]
Fix this by erroring out if an error is detected.

Signed-off-by: Defang Bo 
---
 drivers/gpu/drm/ast/ast_post.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
index 8902c2f..ef19c70 100644
--- a/drivers/gpu/drm/ast/ast_post.c
+++ b/drivers/gpu/drm/ast/ast_post.c
@@ -287,7 +287,9 @@ static void ast_init_dram_reg(struct drm_device *dev)
ast_write32(ast, 0x10100, 0xa8);
 
do {
-   ;
+   if (pci_channel_offline(dev->pdev))
+   return -EIO;
+   
} while (ast_read32(ast, 0x10100) != 0xa8);
} else {/* AST2100/1100 */
if (ast->chip == AST2100 || ast->chip == 2200)
@@ -299,12 +301,14 @@ static void ast_init_dram_reg(struct drm_device *dev)
ast_write32(ast, 0xf000, 0x1);
ast_write32(ast, 0x12000, 0x1688A8A8);
do {
-   ;
+   if (pci_channel_offline(dev->pdev))
+return -EIO;
} while (ast_read32(ast, 0x12000) != 0x01);
 
ast_write32(ast, 0x1, 0xfc600309);
do {
-   ;
+   if (pci_channel_offline(dev->pdev))
+return -EIO;
} while (ast_read32(ast, 0x1) != 0x01);
}
 
-- 
2.7.4

ASoC: soc-pcm: disconnect BEs if the FE is not ready

[朱灿灿]

FE is connected to two BEs, BE1 is active, BE2 is deactive.
When closing BE1, FE/BE1 is in HW_FREE state, then BE2 is
startup by mixer runtime update.

For FE is in HW_FREE state, dpcm_run_update_startup() will skip
BE2's startup because FE's state is HW_FREE, BE2 stays in FE's
be_clients list.

During FE's closed, the dpcm_fe_dai_close() will close all related
BEs, BE2 will be closed. This will lead to BE2's dpcm[stream].users
mismatch.

We need disconnet all pending BEs in the corner case.

Signed-off-by: zhucancan 
---
 sound/soc/soc-pcm.c | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index dcab9527ba3d..04ad53f0ae4f 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -2451,8 +2451,11 @@ static int dpcm_run_update_startup(struct 
snd_soc_pcm_runtime *fe, int stream)
 
/* Only start the BE if the FE is ready */
if (fe->dpcm[stream].state == SND_SOC_DPCM_STATE_HW_FREE ||
-   fe->dpcm[stream].state == SND_SOC_DPCM_STATE_CLOSE)
-   return -EINVAL;
+   fe->dpcm[stream].state == SND_SOC_DPCM_STATE_CLOSE) {
+   dev_err(fe->dev, "ASoC: FE %s is not ready %d\n",
+   fe->dai_link->name, fe->dpcm[stream].state);
+   goto disconnect;
+   }
 
/* startup must always be called for new BEs */
ret = dpcm_be_dai_startup(fe, stream);
@@ -2513,12 +2516,18 @@ static int dpcm_run_update_startup(struct 
snd_soc_pcm_runtime *fe, int stream)
 close:
dpcm_be_dai_shutdown(fe, stream);
 disconnect:
-   /* disconnect any closed BEs */
+   /* disconnect any pending BEs */
spin_lock_irqsave(&fe->card->dpcm_lock, flags);
for_each_dpcm_be(fe, stream, dpcm) {
struct snd_soc_pcm_runtime *be = dpcm->be;
-   if (be->dpcm[stream].state == SND_SOC_DPCM_STATE_CLOSE)
-   dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE;
+
+   /* is this op for this BE ? */
+   if (!snd_soc_dpcm_be_can_update(fe, be, stream))
+   continue;
+
+   if (be->dpcm[stream].state == SND_SOC_DPCM_STATE_CLOSE ||
+   be->dpcm[stream].state == SND_SOC_DPCM_STATE_NEW)
+   dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE;
}
spin_unlock_irqrestore(&fe->card->dpcm_lock, flags);
 
-- 
2.21.0

[PATCH] f2fs: fix to keep isolation of atomic write

[Chao Yu]

ThreadA ThreadB
- f2fs_ioc_start_atomic_write
- write
- f2fs_ioc_commit_atomic_write
 - f2fs_commit_inmem_pages
 - f2fs_drop_inmem_pages
 - f2fs_drop_inmem_pages
  - __revoke_inmem_pages
- f2fs_vm_page_mkwrite
 - set_page_dirty
  - tag ATOMIC_WRITTEN_PAGE and add page
to inmem_pages list
  - clear_inode_flag(FI_ATOMIC_FILE)
- f2fs_vm_page_mkwrite
  - set_page_dirty
   - f2fs_update_dirty_page
- f2fs_trace_pid
 - tag inmem page private to pid
- truncate
 - f2fs_invalidate_page
 - set page->mapping to NULL
  then it will cause panic once we
  access page->mapping

The root cause is we missed to keep isolation of atomic write in the case
of commit_atomic_write vs mkwrite, let commit_atomic_write helds i_mmap_sem
lock to avoid this issue.

Signed-off-by: Chao Yu 
---
 fs/f2fs/file.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 22a0101538c0..1ff5fc10e1fa 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -2094,10 +2094,12 @@ static int f2fs_ioc_commit_atomic_write(struct file 
*filp)
goto err_out;
}
 
+   down_write(&F2FS_I(inode)->i_mmap_sem);
+
if (f2fs_is_atomic_file(inode)) {
ret = f2fs_commit_inmem_pages(inode);
if (ret)
-   goto err_out;
+   goto up_write;
 
ret = f2fs_do_sync_file(filp, 0, LLONG_MAX, 0, true);
if (!ret)
@@ -2105,6 +2107,8 @@ static int f2fs_ioc_commit_atomic_write(struct file *filp)
} else {
ret = f2fs_do_sync_file(filp, 0, LLONG_MAX, 1, false);
}
+up_write:
+   up_write(&F2FS_I(inode)->i_mmap_sem);
 err_out:
if (is_inode_flag_set(inode, FI_ATOMIC_REVOKE_REQUEST)) {
clear_inode_flag(inode, FI_ATOMIC_REVOKE_REQUEST);
-- 
2.29.2

[PATCH] f2fs: enhance to update i_mode and acl atomically in f2fs_setattr()

[Chao Yu]

Previously, in f2fs_setattr(), we don't update S_ISUID|S_ISGID|S_ISVTX
bits with S_IRWXUGO bits and acl entries atomically, so in error path,
chmod() may partially success, this patch enhances to make chmod() flow
being atomical.

Signed-off-by: Chao Yu 
---
 fs/f2fs/acl.c   | 23 ++-
 fs/f2fs/file.c  |  7 ---
 fs/f2fs/xattr.c | 15 +--
 3 files changed, 35 insertions(+), 10 deletions(-)

diff --git a/fs/f2fs/acl.c b/fs/f2fs/acl.c
index 1e5e9b1136ee..732ec10e7890 100644
--- a/fs/f2fs/acl.c
+++ b/fs/f2fs/acl.c
@@ -200,6 +200,27 @@ struct posix_acl *f2fs_get_acl(struct inode *inode, int 
type)
return __f2fs_get_acl(inode, type, NULL);
 }
 
+static int f2fs_acl_update_mode(struct inode *inode, umode_t *mode_p,
+ struct posix_acl **acl)
+{
+   umode_t mode = inode->i_mode;
+   int error;
+
+   if (is_inode_flag_set(inode, FI_ACL_MODE))
+   mode = F2FS_I(inode)->i_acl_mode;
+
+   error = posix_acl_equiv_mode(*acl, &mode);
+   if (error < 0)
+   return error;
+   if (error == 0)
+   *acl = NULL;
+   if (!in_group_p(inode->i_gid) &&
+   !capable_wrt_inode_uidgid(inode, CAP_FSETID))
+   mode &= ~S_ISGID;
+   *mode_p = mode;
+   return 0;
+}
+
 static int __f2fs_set_acl(struct inode *inode, int type,
struct posix_acl *acl, struct page *ipage)
 {
@@ -213,7 +234,7 @@ static int __f2fs_set_acl(struct inode *inode, int type,
case ACL_TYPE_ACCESS:
name_index = F2FS_XATTR_INDEX_POSIX_ACL_ACCESS;
if (acl && !ipage) {
-   error = posix_acl_update_mode(inode, &mode, &acl);
+   error = f2fs_acl_update_mode(inode, &mode, &acl);
if (error)
return error;
set_acl_inode(inode, mode);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 596778f662fd..22a0101538c0 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -851,7 +851,6 @@ static void __setattr_copy(struct inode *inode, const 
struct iattr *attr)
if (!in_group_p(inode->i_gid) &&
!capable_wrt_inode_uidgid(inode, CAP_FSETID))
mode &= ~S_ISGID;
-   inode->i_mode = (inode->i_mode & S_IRWXUGO) | (mode & 
~S_IRWXUGO);
set_acl_inode(inode, mode);
}
 }
@@ -951,8 +950,10 @@ int f2fs_setattr(struct dentry *dentry, struct iattr *attr)
 
if (attr->ia_valid & ATTR_MODE) {
err = posix_acl_chmod(inode, f2fs_get_inode_mode(inode));
-   if (err || is_inode_flag_set(inode, FI_ACL_MODE)) {
-   inode->i_mode = F2FS_I(inode)->i_acl_mode;
+
+   if (is_inode_flag_set(inode, FI_ACL_MODE)) {
+   if (!err)
+   inode->i_mode = F2FS_I(inode)->i_acl_mode;
clear_inode_flag(inode, FI_ACL_MODE);
}
}
diff --git a/fs/f2fs/xattr.c b/fs/f2fs/xattr.c
index 65afcc3cc68a..2086bef6c154 100644
--- a/fs/f2fs/xattr.c
+++ b/fs/f2fs/xattr.c
@@ -673,7 +673,7 @@ static int __f2fs_setxattr(struct inode *inode, int index,
}
 
if (value && f2fs_xattr_value_same(here, value, size))
-   goto exit;
+   goto same;
} else if ((flags & XATTR_REPLACE)) {
error = -ENODATA;
goto exit;
@@ -738,17 +738,20 @@ static int __f2fs_setxattr(struct inode *inode, int index,
if (error)
goto exit;
 
-   if (is_inode_flag_set(inode, FI_ACL_MODE)) {
-   inode->i_mode = F2FS_I(inode)->i_acl_mode;
-   inode->i_ctime = current_time(inode);
-   clear_inode_flag(inode, FI_ACL_MODE);
-   }
if (index == F2FS_XATTR_INDEX_ENCRYPTION &&
!strcmp(name, F2FS_XATTR_NAME_ENCRYPTION_CONTEXT))
f2fs_set_encrypted_inode(inode);
f2fs_mark_inode_dirty_sync(inode, true);
if (!error && S_ISDIR(inode->i_mode))
set_sbi_flag(F2FS_I_SB(inode), SBI_NEED_CP);
+
+same:
+   if (is_inode_flag_set(inode, FI_ACL_MODE)) {
+   inode->i_mode = F2FS_I(inode)->i_acl_mode;
+   inode->i_ctime = current_time(inode);
+   clear_inode_flag(inode, FI_ACL_MODE);
+   }
+
 exit:
kfree(base_addr);
return error;
-- 
2.29.2

[PATCH] scsi: qla2xxx: Remove redundant NULL check

[Xu Wang]

Fix warnings reported by coccicheck:
./drivers/scsi/qla2xxx/qla_os.c:4636:2-7: WARNING: NULL check before some 
freeing functions is not needed.
./drivers/scsi/qla2xxx/qla_os.c:4651:3-8: WARNING: NULL check before some 
freeing functions is not needed.

Signed-off-by: Xu Wang 
---
 drivers/scsi/qla2xxx/qla_os.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index f80abe28f35a..bc7bff3539b4 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -4632,8 +4632,7 @@ qla2x00_free_fw_dump(struct qla_hw_data *ha)
dma_free_coherent(&ha->pdev->dev,
EFT_SIZE, ha->eft, ha->eft_dma);
 
-   if (ha->fw_dump)
-   vfree(ha->fw_dump);
+   vfree(ha->fw_dump);
 
ha->fce = NULL;
ha->fce_dma = 0;
@@ -4647,8 +4646,7 @@ qla2x00_free_fw_dump(struct qla_hw_data *ha)
ha->fw_dump_len = 0;
 
for (j = 0; j < 2; j++, fwdt++) {
-   if (fwdt->template)
-   vfree(fwdt->template);
+   vfree(fwdt->template);
fwdt->template = NULL;
fwdt->length = 0;
}
-- 
2.17.1

Re: [PATCH V2 8/9] arm64: dts: renesas: Introduce r8a774e1-beacon-rzg2h-kit

[Sergei Shtylyov]

On 24.12.2020 20:05, Adam Ford wrote:


eacon EmebeddedWorks is introducing a new kit based on the


   Beacon?


RZ/G2H SoC from Renesas.

The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.

The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display.  It uses the same baseboard
and SOM files as the RZ/G2M and RZ/G2N kits.

Signed-off-by: Adam Ford 

[...]

MBR, Sergei

Re: [PATCH V2 5/9] arm64: dts: renesas: beacon: Cleanup USB References

[Sergei Shtylyov]

On 24.12.2020 20:04, Adam Ford wrote:


The programmable versaclock is used for the usb_extal reference clock for
the EHCI driver instead of a fixed-clock.  Because the versaclock needs to
be enabled, the clock reference needs to be added to the clocks list.

For the USB3 Phy, the perferred clock reference is usb3s_clk, so


   PHY. Preferred.


remove the usb_extal reference.

Signed-off-by: Adam Ford 

[...]

diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi 
b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
index ade2f58ad99b..a6f7193e4d97 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi

[...]

@@ -315,16 +306,12 @@ &sdhi3 {
vmmc-supply = <®_3p3v>;
vqmmc-supply = <®_1p8v>;
bus-width = <8>;
-   mmc-hs200-1_8v;
+   mmc-hs400-1_8v;


   Unrelated?


non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
  };

[...]

MBR, Sergei

Re: [PATCH V2 2/9] arm64: dts: renesas: beacon kit: Fix Audio Clock sources

[Sergei Shtylyov]

On 24.12.2020 20:04, Adam Ford wrote:


The SoC was expecting two clock sources with different frequencies.
One to support 44.1KHz and one to support 48KHz.  With the newly added
ability to configure the programmably clock, configure both clocks.


   Programmable.


Assign the rcar-sound clocks to reference the versaclock instead of
the fixed clock.

Signed-off-by: Adam Ford 

[...]

MBR, Sergei

[v3] PCI: Add pci reset quirk for Huawei Intelligent NIC virtual function

[Chiqijun]

When multiple VFs do FLR at the same time, the firmware is
processed serially, resulting in some VF FLRs being delayed more
than 100ms, when the virtual machine restarts and the device
driver is loaded, the firmware is doing the corresponding VF
FLR, causing the driver to fail to load.

To solve this problem, add host and firmware status synchronization
during FLR.

Signed-off-by: Chiqijun 
---
v3:
 - The MSE bit in the VF configuration space is hardwired to zero,
   remove the setting of PCI_COMMAND_MEMORY bit. Add comment for
   set PCI_COMMAND register.

v2:
 - Update comments
 - Use the HINIC_VF_FLR_CAP_BIT_SHIFT and HINIC_VF_FLR_PROC_BIT_SHIFT
   macro instead of the magic number
---
 drivers/pci/quirks.c | 77 
 1 file changed, 77 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f70692ac79c5..9c310012ef19 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3912,6 +3912,81 @@ static int delay_250ms_after_flr(struct pci_dev *dev, 
int probe)
return 0;
 }
 
+#define PCI_DEVICE_ID_HINIC_VF  0x375E
+#define HINIC_VF_FLR_TYPE   0x1000
+#define HINIC_VF_FLR_CAP_BIT_SHIFT  6
+#define HINIC_VF_OP 0xE80
+#define HINIC_VF_FLR_PROC_BIT_SHIFT 10
+#define HINIC_OPERATION_TIMEOUT 15000
+
+/* Device-specific reset method for Huawei Intelligent NIC virtual functions */
+static int reset_hinic_vf_dev(struct pci_dev *pdev, int probe)
+{
+   unsigned long timeout;
+   void __iomem *bar;
+   u16 command;
+   u32 val;
+
+   if (probe)
+   return 0;
+
+   bar = pci_iomap(pdev, 0, 0);
+   if (!bar)
+   return -ENOTTY;
+
+   /*
+* FLR cap bit bit30, FLR processing bit: bit18, to avoid big-endian
+* conversion the big-endian bit6, bit10 is directly operated here.
+*
+* Get and check firmware capabilities.
+*/
+   val = readl(bar + HINIC_VF_FLR_TYPE);
+   if (!(val & (1UL << HINIC_VF_FLR_CAP_BIT_SHIFT))) {
+   pci_iounmap(pdev, bar);
+   return -ENOTTY;
+   }
+
+   /*
+* Set the processing bit for the start of FLR, which will be cleared
+* by the firmware after FLR is completed.
+*/
+   val = readl(bar + HINIC_VF_OP);
+   val = val | (1UL << HINIC_VF_FLR_PROC_BIT_SHIFT);
+   writel(val, bar + HINIC_VF_OP);
+
+   /* Perform the actual device function reset */
+   pcie_flr(pdev);
+
+   /*
+* The device must learn BDF after FLR in order to respond to BAR's
+* read request, therefore, we issue a configure write request to let
+* the device capture BDF.
+*/
+   pci_read_config_word(pdev, PCI_COMMAND, &command);
+   pci_write_config_word(pdev, PCI_COMMAND, command);
+
+   /* Waiting for device reset complete */
+   timeout = jiffies + msecs_to_jiffies(HINIC_OPERATION_TIMEOUT);
+   do {
+   val = readl(bar + HINIC_VF_OP);
+   if (!(val & (1UL << HINIC_VF_FLR_PROC_BIT_SHIFT)))
+   goto reset_complete;
+   msleep(20);
+   } while (time_before(jiffies, timeout));
+
+   val = readl(bar + HINIC_VF_OP);
+   if (!(val & (1UL << HINIC_VF_FLR_PROC_BIT_SHIFT)))
+   goto reset_complete;
+
+   pci_warn(pdev, "Reset dev timeout, flr ack reg: %x\n",
+be32_to_cpu(val));
+
+reset_complete:
+   pci_iounmap(pdev, bar);
+
+   return 0;
+}
+
 static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
 reset_intel_82599_sfp_virtfn },
@@ -3923,6 +3998,8 @@ static const struct pci_dev_reset_methods 
pci_dev_reset_methods[] = {
{ PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr },
{ PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
reset_chelsio_generic_dev },
+   { PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF,
+   reset_hinic_vf_dev },
{ 0 }
 };
 
-- 
2.17.1

RE: [PATCH v7 10/12] mfd: bd9571mwv: Use devm_regmap_add_irq_chip()

[Yoshihiro Shimoda]

Hello Sergei,

> From: Sergei Shtylyov, Sent: Thursday, December 24, 2020 5:50 PM
> On 24.12.2020 10:04, Yoshihiro Shimoda wrote:
> 
> > Use dev_regmap_add_irq_chip() to simplify the code.
> 
> devm_?

Thank you for the pointed it out.
I'll fix it.

Best regards,
Yoshihiro Shimoda

[RFC PATCH v2 0/2] mm: fix races due to deferred TLB flushes

[Nadav Amit]

From: Nadav Amit 

This patch-set went from v1 to RFCv2, as there is still an ongoing
discussion regarding the way of solving the recently found races due to
deferred TLB flushes. These patches are only sent for reference for now,
and can be applied later if no better solution is taken.

In a nutshell, write-protecting PTEs with deferred TLB flushes was mostly
performed while holding mmap_lock for write. This prevented concurrent
page-fault handler invocations from mistakenly assuming that a page is
write-protected when in fact, due to the deferred TLB flush, other CPU
could still write to the page. Such a write can cause a memory
corruption if it takes place after the page was copied (in
cow_user_page()), and before the PTE was flushed (by wp_page_copy()).

However, the userfaultfd and soft-dirty mechanisms did not take
mmap_lock for write, but only for read, which made such races possible.
Since commit 09854ba94c6a ("mm: do_wp_page() simplification") these
races became more likely to take place as non-COW'd pages are more
likely to be COW'd instead of being reused. Both of the races that
these patches are intended to resolve were produced on v5.10.

To avoid the performance overhead some alternative solutions that do not
require to acquire mmap_lock for write were proposed, specifically for
userfaultfd. So far no better solution that can be backported was
proposed for the soft-dirty case.

v1->RFCv2:
- Better (i.e., correct) description of the userfaultfd buggy case [Yu]
- Patch for the soft-dirty case

Cc: Andrea Arcangeli 
Cc: Yu Zhao 
Cc: Andy Lutomirski 
Cc: Peter Xu 
Cc: Pavel Emelyanov 
Cc: Mike Kravetz 
Cc: Mike Rapoport 
Cc: Minchan Kim 
Cc: Will Deacon 
Cc: Peter Zijlstra 

Nadav Amit (2):
  mm/userfaultfd: fix memory corruption due to writeprotect
  fs/task_mmu: acquire mmap_lock for write on soft-dirty cleanup

 fs/proc/task_mmu.c | 27 +--
 mm/mprotect.c  |  3 ++-
 mm/userfaultfd.c   | 15 +--
 3 files changed, 28 insertions(+), 17 deletions(-)

-- 
2.25.1

[RFC PATCH v2 2/2] fs/task_mmu: acquire mmap_lock for write on soft-dirty cleanup

[Nadav Amit]

From: Nadav Amit 

Clearing soft-dirty through /proc/[pid]/clear_refs can cause memory
corruption as it clears the dirty-bit without acquiring the mmap_lock
for write and defers TLB flushes.

As a result of this behavior, it is possible that one of the CPUs would
have the stale PTE cached in its TLB and keep updating the page while
another thread triggers a page-fault, and the page-fault handler would
copy the old page into a new one.

Since the copying is performed without holding the page-table lock, it
is possible that after the copying, and before the PTE is actually
flushed, the CPU that cached the stale PTE in the TLB would keep
changing the page. These changes would be lost and memory corruption
would occur.

As Yu Zhao pointed, this race became more apparent since commit
09854ba94c6a ("mm: do_wp_page() simplification") which made
wp_page_copy() more likely to take place, specifically if
page_count(page) > 1.

The following test produces the failure quite well on 5.10 and my
machine. Note that the test is tailored for recent kernels behavior in
which wp_page_copy() is called when page_count(page) != 1, but the fact
the test does not fail on older kernels does not mean they are not
affected.

  #define _GNU_SOURCE
  #include 
  #include 
  #include 
  #include 
  #include 
  #include 
  #include 
  #include 
  #include 
  #include 
  #include 

  #define PAGE_SIZE (4096)
  #define TLB_SIZE  (2000)
  #define N_PAGES   (30)
  #define ITERATIONS(2000)
  #define N_THREADS (2)

  static int stop;
  static char *m;

  static int writer(void *argp)
  {
unsigned long t_idx = (unsigned long)argp;
int i, cnt = 0;

while (!atomic_load(&stop)) {
cnt++;
atomic_fetch_add((atomic_int *)m, 1);

/*
 * First thread only accesses the page to have it cached in the
 * TLB.
 */
if (t_idx == 0)
continue;

/*
 * Other threads access enough entries to cause eviction from
 * the TLB and trigger #PF upon the next access (before the TLB
 * flush of clear_ref actually takes place).
 */
for (i = 1; i < TLB_SIZE; i++) {
if (atomic_load((atomic_int *)(m + PAGE_SIZE * i))) {
fprintf(stderr, "unexpected error\n");
exit(1);
}
}
}
return cnt;
  }

  /*
   * Runs mlock/munlock in the background to raise the page-count of the
   * page and force copying instead of reusing the page. Raising the
   * page-count is possible in better ways, e.g., registering io_uring
   * buffers.
   */
  static int do_mlock(void *argp)
  {
while (!atomic_load(&stop)) {
if (mlock(m, PAGE_SIZE) || munlock(m, PAGE_SIZE)) {
perror("mlock/munlock");
exit(1);
}
}
return 0;
  }

  int main(void)
  {
int r, cnt, fd, total = 0;
long i;
thrd_t thr[N_THREADS];
thrd_t mlock_thr;

fd = open("/proc/self/clear_refs", O_WRONLY, 0666);
if (fd < 0) {
perror("open");
exit(1);
}

/*
 * Have large memory for clear_ref, so there would be some time between
 * the unmap and the actual deferred flush.
 */
m = mmap(NULL, PAGE_SIZE * N_PAGES, PROT_READ|PROT_WRITE,
MAP_PRIVATE|MAP_ANONYMOUS|MAP_POPULATE, -1, 0);
if (m == MAP_FAILED) {
perror("mmap");
exit(1);
}

for (i = 0; i < N_THREADS; i++) {
r = thrd_create(&thr[i], writer, (void *)i);
assert(r == thrd_success);
}

r = thrd_create(&mlock_thr, do_mlock, (void *)i);
assert(r == thrd_success);

for (i = 0; i < ITERATIONS; i++) {
r = pwrite(fd, "4", 1, 0);
if (r < 0) {
perror("pwrite");
exit(1);
}
}

atomic_store(&stop, 1);

r = thrd_join(mlock_thr, NULL);
assert(r == thrd_success);

for (i = 0; i < N_THREADS; i++) {
r = thrd_join(thr[i], &cnt);
assert(r == thrd_success);
total += cnt;
}

r = atomic_load((atomic_int *)(m));
if (r != total) {
fprintf(stderr, "failed: expected=%d actual=%d\n", total, r);
exit(-1);
}

fprintf(stderr, "ok\n");
return 0;
  }

Fix it by taking mmap_lock for write when clearing soft-dirty.

Note that the test keeps failing without the pending fix of the missing
TLB flushes in clear_refs_write() [1].

[1] https://lore.kernel.org/patchwork/patch/1351776/

Cc: Andrea 

[RFC PATCH v2 1/2] mm/userfaultfd: fix memory corruption due to writeprotect

[Nadav Amit]

From: Nadav Amit 

Userfaultfd self-test fails occasionally, indicating a memory
corruption.

Analyzing this problem indicates that there is a real bug since
mmap_lock is only taken for read in mwriteprotect_range() and defers
flushes, and since there is insufficient consideration of concurrent
deferred TLB flushes in wp_page_copy(). Although the PTE is flushed from
the TLBs in wp_page_copy(), this flush takes place after the copy has
already been performed, and therefore changes of the page are possible
between the time of the copy and the time in which the PTE is flushed.

To make matters worse, memory-unprotection using userfaultfd also poses
a problem. Although memory unprotection is logically a promotion of PTE
permissions, and therefore should not require a TLB flush, the current
userrfaultfd code might actually cause a demotion of the architectural
PTE permission: when userfaultfd_writeprotect() unprotects memory
region, it unintentionally *clears* the RW-bit if it was already set.
Note that this unprotecting a PTE that is not write-protected is a valid
use-case: the userfaultfd monitor might ask to unprotect a region that
holds both write-protected and write-unprotected PTEs.

The scenario that happens in selftests/vm/userfaultfd is as follows:

cpu0cpu1cpu2

[ Writable PTE
  cached in TLB ]
userfaultfd_writeprotect()
[ write-*unprotect* ]
mwriteprotect_range()
mmap_read_lock()
change_protection()

change_protection_range()
...
change_pte_range()
[ *clear* “write”-bit ]
[ defer TLB flushes ]
[ page-fault ]
...
wp_page_copy()
 cow_user_page()
  [ copy page ]
[ write to old
  page ]
...
 set_pte_at_notify()

A similar scenario can happen:

cpu0cpu1cpu2cpu3

[ Writable PTE
  cached in TLB ]
userfaultfd_writeprotect()
[ write-protect ]
[ deferred TLB flush ]
userfaultfd_writeprotect()
[ write-unprotect ]
[ deferred TLB flush]
[ page-fault ]
wp_page_copy()
 cow_user_page()
 [ copy page ]
 ...[ write to page ]
set_pte_at_notify()

As Yu Zhao pointed, these races became more apparent since commit
09854ba94c6a ("mm: do_wp_page() simplification") which made
wp_page_copy() more likely to take place, specifically if
page_count(page) > 1.

Note that one might consider additional potentially dangerous scenarios,
which are not directly related to the deferred TLB flushes.  A memory
corruption might in theory occur if after the page is copied by
cow_user_page() and before the PTE is set, the PTE is write-unprotected
(by a concurrent page-fault handler) and then protected again (by
subsequent calls to userfaultfd_writeprotect() to protect and unprotect
the page). In practice, it seems that such scenarios cannot happen.

To resolve the aforementioned races, acquire mmap_lock for write when
write-protecting userfaultfd region using ioctl's. Keep acquiring
mmap_lock for read when unprotecting memory, but do not change the
write-bit set when performing userfaultfd write-unprotection.

This solution can introduce performance regression to userfaultfd
write-protection.

Cc: Andrea Arcangeli 
Cc: Yu Zhao 
Cc: Andy Lutomirski 
Cc: Peter Xu 
Cc: Pavel Emelyanov 
Cc: Mike Kravetz 
Cc: Mike Rapoport 
Cc: Minchan Kim 
Cc: Will Deacon 
Cc: Peter Zijlstra 
Fixes: 292924b26024 ("userfaultfd: wp: apply _PAGE_UFFD_WP bit")
Signed-off-by: Nadav Amit 
---
 mm/mprotect.c|  3 ++-
 mm/userfaultfd.c | 15 +--
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/mm/mprotect.c b/mm/mprotect.c
index ab709023e9aa..c08c4055b051 100644
--- a/mm/mprotect.c
+++ b/mm/mprotect.c
@@ -75,7 +75,8 @@ static unsigned long change_pte_range(struct vm_area_struct 
*vma, pmd_t *pmd,
oldpte = *pte;
if (pte_present(oldpte)) {
pte_t ptent;
-   bool preserve_write = prot_numa && pte_write(oldpte);
+   bool preserve_write = (prot_numa || uffd_wp_resolve) &&
+ pte_write(oldpte);
 
/*
 

Re: [PATCH 0/3] add support for metadata encryption to F2FS

[Chao Yu]

On 2020/12/24 18:13, Satya Tangirala wrote:

On Tue, Dec 22, 2020 at 07:47:45PM +0800, Chao Yu wrote:

On 2020/12/18 19:53, Satya Tangirala wrote:

On Fri, Dec 18, 2020 at 05:02:23PM +0800, Chao Yu wrote:

But, what's the plan about supporting software encryption for metadata? Current
f2fs write flow will handle all operations which may encounter failure before
allocating block address for node, if we do allocation first, and then use pba
as IV to encrypt node block, it will be a little complicated to revert 
allocation
if we fail to encrypt node block.


Software encryption for metadata is supported through the blk-crypto


blk-crypto will encrypt all data in filesystem, if FBE is enabled, data may
be encrypted twice?

blk-crypto will only encrypt bios as directed to do so by the encryption
context set on the bio. That encryption context is constructed by the
submitter of the bio - in our case, the submitter is the filesystem.
So the filesystem decides which bio gets encrypted with
which key/algorithm/etc (and in the current implementation, each bio
only supports a single bi_crypt_context, so *only one* layer of
encryption is possible with blk-crypto anyway). So no, data won't be
encrypted twice, because F2FS/fscrypt ensure that it does not (and the
filesystem knows exactly which blocks need metadata encryption, and
which blocks need FBE).


Oh, sorry, I misunderstand blk-crypto as dm-crypt...

So once hardware encryption is absent, blk-crypto will use blk-crypto-fallback
to encrypt bio data with software crypto, I see.



And why not supporting hardware encryption for metadata in blk-crypto? then
both f2fs and ext4 can use inline-encryption based blk-crypto?


I may be misunderstanding what you're asking, but I think you're asking
why not make blk-crypto do metadata encryption (without explicit
involvement from filesystems)? Or more generally, why not do metadata
encryption below the filesystem layer?


Yes.



As mentioned above, the filesystem is what knows which blocks need to be
metadata encrypted and which blocks need to be FBE encrypted (or even
just read without any encryption at all) - the block layer doesn't have
this information, and so can't effectively decide which blocks to use
the metadata encryption key on. Fwiw, Android does take a somewhat
similar approach to what you're suggesting here (I explain more in
detail in the cover letter for v2 of this patch series at
https://lore.kernel.org/linux-fscrypt/20201217150435.1505269-1-sat...@google.com/


Ah, thanks for all your detailed explanation, now, I can see the
context.


). In Android, we have a new DM target (called dm-default-key) that adds
an encryption context to any bio that doesn't already have an encryption
context - so the assumption in general is that if the filesystem wants to
use an FBE key, it would have already set the encryption context on the
bio, so if a bio reaches dm-default-key without an encryption context,
it must mean that it needs metadata encryption. However, that assumption
doesn't always hold because F2FS sometimes needs to read the ciphertext
of FBE files without having the file's FBE key available - in those
situations, F2FS will send a bio without any encryption context, but
will also tell dm-default-key to *not* add the metadata encryption
context. That's a layering violation, which is why I'm not using that
approach here.

Does that answer your question? Or am I misunderstanding what you're
asking?


Yup, thank you!

Thanks,


Thanks,


framework - so encryption will happen in the block layer, not the
filesystem layer. So there's nothing extra/special we need to do if
there's an encryption failure - an encryption failure is no different
from a read/write failure in a lower layer from f2fs' perspective.
.


.

[PATCH v8 01/12] mfd: bd9571mwv: Use devm_mfd_add_devices()

[Yoshihiro Shimoda]

To remove mfd devices when unload this driver, should use
devm_mfd_add_devices() instead.

Fixes: d3ea21272094 ("mfd: Add ROHM BD9571MWV-M MFD PMIC driver")
Signed-off-by: Yoshihiro Shimoda 
Acked-for-MFD-by: Lee Jones 
Reviewed-by: Geert Uytterhoeven 
Reviewed-by: Matti Vaittinen 
---
 drivers/mfd/bd9571mwv.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c
index fab3cdc..19d57a4 100644
--- a/drivers/mfd/bd9571mwv.c
+++ b/drivers/mfd/bd9571mwv.c
@@ -185,9 +185,9 @@ static int bd9571mwv_probe(struct i2c_client *client,
return ret;
}
 
-   ret = mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO, bd9571mwv_cells,
- ARRAY_SIZE(bd9571mwv_cells), NULL, 0,
- regmap_irq_get_domain(bd->irq_data));
+   ret = devm_mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO,
+  bd9571mwv_cells, ARRAY_SIZE(bd9571mwv_cells),
+  NULL, 0, 
regmap_irq_get_domain(bd->irq_data));
if (ret) {
regmap_del_irq_chip(bd->irq, bd->irq_data);
return ret;
-- 
2.7.4

[PATCH v8 00/12] treewide: bd9571mwv: Add support for BD9574MWF

[Yoshihiro Shimoda]

Add BD9574MWF support into bd9571mwv gpio, mfd and regulator drivers.
Latest Ebisu-4D boards has this chip instead of BD9571MWV so that
we need this patch series to detect this chip at runtime.

Note that the patch [1/12] is a bug-fix patch for mfd driver.

Changes from v6:
 - Fix typo in the patch 10.
 - Add "Acked-for-MFD-by" in patch 2 and 11.
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=406091

Changes from v6:
 - Remove "struct bd957x_ddata" because this is not used after probed.
 - Add "Acked-for-MFD-by" in patch 12.
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=405725

Changes from v5:
 - Fix typo in the patch 5 and 8.
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=405263

Changes from v4:
 - Add Reviwed-by in patch 1, 10, 11 and 12.
 - Keep bd9571mwv_id_table[] as-is because unused in patch 12.
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=404657

Changes from v3:
 - Add "Acked-for-MFD-by" in patch 1, 3, 9 and 10.
 - Use "Co-developed-by" instead in patch 11.
 - In patch 11:
 -- Remove abusing kernel-doc formatting in patch.
 -- Rename bd957x_data with bd957x_ddata in patch.
 -- Remove product name printk.
 -- Rename bd9571mwv_identify() with bd957x_identify().
 -- Remove argument "part_name" from bd957x_identify().
 -- Modify dev_err() string.
 -- Rename BD9571MWV_PRODUCT_CODE_VAL with BD9571MWV_PRODUCT_CODE_BD9571MWV.
 -- Fix errno from -ENOENT to -ENODEV.
 - In patch 12:
 -- Rename "MFD driver" to "core driver".
 -- Remove unnecessary comments.
 -- Rename BD9574MWF_PRODUCT_CODE_VAL with BD9571MWV_PRODUCT_CODE_BD9574MWF.
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=402719

Changes from v2:
 - Use devm_mfd_add_devices() to remove the mfd device in unload.
 - Update commit descriptions in patch 4 and 8.
 - Use regmap_get_device() to simplify in patch 4.
 - Remove "struct bd9571mwv" and bd9571mwv_remove().
 - Add Reviewed-by in patch 3 to 9.
 - Use devm_regmap_add_irq_chip() to simplify in patch 10.
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=400477

Changes from v1:
 - Document BD9574MWF on the dt-binding.
 - Add ROHM_CHIP_TYPE_BD957[14] into rohm-generic.h.
 - To simplify gpio and regulator drivers, using regmap instead of
   using struct bd9571mwv.
 - Remove BD9574MWF definitions to make gpio and regulator driver
   simple to support for BD9574MWF.
 - Add BD9574MWF support for gpio and regulator drivers.
 - Add missing regmap ranges for BD9574MWF.
 - Rename "part_number" with "part_name".
 https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=398059

Khiem Nguyen (2):
  mfd: bd9571mwv: Make the driver more generic
  mfd: bd9571mwv: Add support for BD9574MWF

Yoshihiro Shimoda (10):
  mfd: bd9571mwv: Use devm_mfd_add_devices()
  dt-bindings: mfd: bd9571mwv: Document BD9574MWF
  mfd: rohm-generic: Add BD9571 and BD9574
  regulator: bd9571mwv: rid of using struct bd9571mwv
  regulator: bd9571mwv: Add BD9574MWF support
  gpio: bd9571mwv: Use the SPDX license identifier
  gpio: bd9571mwv: rid of using struct bd9571mwv
  gpio: bd9571mwv: Add BD9574MWF support
  mfd: bd9571mwv: Use the SPDX license identifier
  mfd: bd9571mwv: Use devm_regmap_add_irq_chip()

 .../devicetree/bindings/mfd/bd9571mwv.txt  |   4 +-
 drivers/gpio/gpio-bd9571mwv.c  |  35 ++--
 drivers/mfd/bd9571mwv.c| 178 ++---
 drivers/regulator/bd9571mwv-regulator.c|  59 ---
 include/linux/mfd/bd9571mwv.h  |  45 ++
 include/linux/mfd/rohm-generic.h   |   2 +
 6 files changed, 186 insertions(+), 137 deletions(-)

-- 
2.7.4

[PATCH v8 04/12] regulator: bd9571mwv: rid of using struct bd9571mwv

[Yoshihiro Shimoda]

To simplify this driver, use dev_get_regmap() and
rid of using struct bd9571mwv.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
---
 drivers/regulator/bd9571mwv-regulator.c | 49 +
 1 file changed, 26 insertions(+), 23 deletions(-)

diff --git a/drivers/regulator/bd9571mwv-regulator.c 
b/drivers/regulator/bd9571mwv-regulator.c
index e690c2c..42b6a70 100644
--- a/drivers/regulator/bd9571mwv-regulator.c
+++ b/drivers/regulator/bd9571mwv-regulator.c
@@ -17,7 +17,7 @@
 #include 
 
 struct bd9571mwv_reg {
-   struct bd9571mwv *bd;
+   struct regmap *regmap;
 
/* DDR Backup Power */
u8 bkup_mode_cnt_keepon;/* from "rohm,ddr-backup-power" */
@@ -137,26 +137,30 @@ static const struct regulator_desc regulators[] = {
 };
 
 #ifdef CONFIG_PM_SLEEP
-static int bd9571mwv_bkup_mode_read(struct bd9571mwv *bd, unsigned int *mode)
+static int bd9571mwv_bkup_mode_read(struct bd9571mwv_reg *bdreg,
+   unsigned int *mode)
 {
int ret;
 
-   ret = regmap_read(bd->regmap, BD9571MWV_BKUP_MODE_CNT, mode);
+   ret = regmap_read(bdreg->regmap, BD9571MWV_BKUP_MODE_CNT, mode);
if (ret) {
-   dev_err(bd->dev, "failed to read backup mode (%d)\n", ret);
+   dev_err(regmap_get_device(bdreg->regmap),
+   "failed to read backup mode (%d)\n", ret);
return ret;
}
 
return 0;
 }
 
-static int bd9571mwv_bkup_mode_write(struct bd9571mwv *bd, unsigned int mode)
+static int bd9571mwv_bkup_mode_write(struct bd9571mwv_reg *bdreg,
+unsigned int mode)
 {
int ret;
 
-   ret = regmap_write(bd->regmap, BD9571MWV_BKUP_MODE_CNT, mode);
+   ret = regmap_write(bdreg->regmap, BD9571MWV_BKUP_MODE_CNT, mode);
if (ret) {
-   dev_err(bd->dev, "failed to configure backup mode 0x%x (%d)\n",
+   dev_err(regmap_get_device(bdreg->regmap),
+   "failed to configure backup mode 0x%x (%d)\n",
mode, ret);
return ret;
}
@@ -194,7 +198,7 @@ static ssize_t backup_mode_store(struct device *dev,
 * Configure DDR Backup Mode, to change the role of the accessory power
 * switch from a power switch to a wake-up switch, or vice versa
 */
-   ret = bd9571mwv_bkup_mode_read(bdreg->bd, &mode);
+   ret = bd9571mwv_bkup_mode_read(bdreg, &mode);
if (ret)
return ret;
 
@@ -202,7 +206,7 @@ static ssize_t backup_mode_store(struct device *dev,
if (bdreg->bkup_mode_enabled)
mode |= bdreg->bkup_mode_cnt_keepon;
 
-   ret = bd9571mwv_bkup_mode_write(bdreg->bd, mode);
+   ret = bd9571mwv_bkup_mode_write(bdreg, mode);
if (ret)
return ret;
 
@@ -221,7 +225,7 @@ static int bd9571mwv_suspend(struct device *dev)
return 0;
 
/* Save DDR Backup Mode */
-   ret = bd9571mwv_bkup_mode_read(bdreg->bd, &mode);
+   ret = bd9571mwv_bkup_mode_read(bdreg, &mode);
if (ret)
return ret;
 
@@ -235,7 +239,7 @@ static int bd9571mwv_suspend(struct device *dev)
mode |= bdreg->bkup_mode_cnt_keepon;
 
if (mode != bdreg->bkup_mode_cnt_saved)
-   return bd9571mwv_bkup_mode_write(bdreg->bd, mode);
+   return bd9571mwv_bkup_mode_write(bdreg, mode);
 
return 0;
 }
@@ -248,7 +252,7 @@ static int bd9571mwv_resume(struct device *dev)
return 0;
 
/* Restore DDR Backup Mode */
-   return bd9571mwv_bkup_mode_write(bdreg->bd, bdreg->bkup_mode_cnt_saved);
+   return bd9571mwv_bkup_mode_write(bdreg, bdreg->bkup_mode_cnt_saved);
 }
 
 static const struct dev_pm_ops bd9571mwv_pm  = {
@@ -268,7 +272,6 @@ static int bd9571mwv_regulator_remove(struct 
platform_device *pdev)
 
 static int bd9571mwv_regulator_probe(struct platform_device *pdev)
 {
-   struct bd9571mwv *bd = dev_get_drvdata(pdev->dev.parent);
struct regulator_config config = { };
struct bd9571mwv_reg *bdreg;
struct regulator_dev *rdev;
@@ -279,40 +282,40 @@ static int bd9571mwv_regulator_probe(struct 
platform_device *pdev)
if (!bdreg)
return -ENOMEM;
 
-   bdreg->bd = bd;
+   bdreg->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 
platform_set_drvdata(pdev, bdreg);
 
config.dev = &pdev->dev;
-   config.dev->of_node = bd->dev->of_node;
-   config.driver_data = bd;
-   config.regmap = bd->regmap;
+   config.dev->of_node = pdev->dev.parent->of_node;
+   config.driver_data = bdreg;
+   config.regmap = bdreg->regmap;
 
for (i = 0; i < ARRAY_SIZE(regulators); i++) {
rdev = devm_regulator_register(&pdev->dev, ®ulators[i],
   &config);
if (IS_ERR(rdev)) {
-   dev_err(bd->dev, "fa

[PATCH v8 06/12] gpio: bd9571mwv: Use the SPDX license identifier

[Yoshihiro Shimoda]

Use the SPDX license identifier instead of a local description.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Geert Uytterhoeven 
---
 drivers/gpio/gpio-bd9571mwv.c | 10 +-
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpio/gpio-bd9571mwv.c b/drivers/gpio/gpio-bd9571mwv.c
index c0abc9c..abb622c 100644
--- a/drivers/gpio/gpio-bd9571mwv.c
+++ b/drivers/gpio/gpio-bd9571mwv.c
@@ -1,17 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * ROHM BD9571MWV-M GPIO driver
  *
  * Copyright (C) 2017 Marek Vasut 
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether expressed or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License version 2 for more details.
- *
  * Based on the TPS65086 driver
  *
  * NOTE: Interrupts are not supported yet.
-- 
2.7.4

[PATCH v8 12/12] mfd: bd9571mwv: Add support for BD9574MWF

[Yoshihiro Shimoda]

From: Khiem Nguyen 

The new PMIC BD9574MWF inherits features from BD9571MWV.
Add the support of new PMIC to existing bd9571mwv driver.

Signed-off-by: Khiem Nguyen 
Co-developed-by: Yoshihiro Shimoda 
Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
Acked-for-MFD-by: Lee Jones 
---
 drivers/mfd/bd9571mwv.c   | 76 ++-
 include/linux/mfd/bd9571mwv.h | 17 --
 2 files changed, 89 insertions(+), 4 deletions(-)

diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c
index 2c1fcbb..e15b1ac 100644
--- a/drivers/mfd/bd9571mwv.c
+++ b/drivers/mfd/bd9571mwv.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * ROHM BD9571MWV-M MFD driver
+ * ROHM BD9571MWV-M and BD9574MVF-M core driver
  *
  * Copyright (C) 2017 Marek Vasut 
  * Copyright (C) 2020 Renesas Electronics Corporation
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -103,6 +104,72 @@ static struct regmap_irq_chip bd9571mwv_irq_chip = {
.num_irqs   = ARRAY_SIZE(bd9571mwv_irqs),
 };
 
+static const struct mfd_cell bd9574mwf_cells[] = {
+   { .name = "bd9574mwf-regulator", },
+   { .name = "bd9574mwf-gpio", },
+};
+
+static const struct regmap_range bd9574mwf_readable_yes_ranges[] = {
+   regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
+   regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
+   regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_SETVMAX),
+   regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_MONIVDAC),
+   regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
+   regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK),
+   regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
+};
+
+static const struct regmap_access_table bd9574mwf_readable_table = {
+   .yes_ranges = bd9574mwf_readable_yes_ranges,
+   .n_yes_ranges   = ARRAY_SIZE(bd9574mwf_readable_yes_ranges),
+};
+
+static const struct regmap_range bd9574mwf_writable_yes_ranges[] = {
+   regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
+   regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
+   regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
+   regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK),
+   regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
+};
+
+static const struct regmap_access_table bd9574mwf_writable_table = {
+   .yes_ranges = bd9574mwf_writable_yes_ranges,
+   .n_yes_ranges   = ARRAY_SIZE(bd9574mwf_writable_yes_ranges),
+};
+
+static const struct regmap_range bd9574mwf_volatile_yes_ranges[] = {
+   regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC),
+   regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
+   regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT),
+   regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ),
+};
+
+static const struct regmap_access_table bd9574mwf_volatile_table = {
+   .yes_ranges = bd9574mwf_volatile_yes_ranges,
+   .n_yes_ranges   = ARRAY_SIZE(bd9574mwf_volatile_yes_ranges),
+};
+
+static const struct regmap_config bd9574mwf_regmap_config = {
+   .reg_bits   = 8,
+   .val_bits   = 8,
+   .cache_type = REGCACHE_RBTREE,
+   .rd_table   = &bd9574mwf_readable_table,
+   .wr_table   = &bd9574mwf_writable_table,
+   .volatile_table = &bd9574mwf_volatile_table,
+   .max_register   = 0xff,
+};
+
+static struct regmap_irq_chip bd9574mwf_irq_chip = {
+   .name   = "bd9574mwf",
+   .status_base= BD9571MWV_INT_INTREQ,
+   .mask_base  = BD9571MWV_INT_INTMASK,
+   .ack_base   = BD9571MWV_INT_INTREQ,
+   .init_ack_masked = true,
+   .num_regs   = 1,
+   .irqs   = bd9571mwv_irqs,
+   .num_irqs   = ARRAY_SIZE(bd9571mwv_irqs),
+};
+
 static int bd957x_identify(struct device *dev, struct regmap *regmap)
 {
unsigned int value;
@@ -162,6 +229,12 @@ static int bd9571mwv_probe(struct i2c_client *client,
cells = bd9571mwv_cells;
num_cells = ARRAY_SIZE(bd9571mwv_cells);
break;
+   case BD9571MWV_PRODUCT_CODE_BD9574MWF:
+   regmap_config = &bd9574mwf_regmap_config;
+   irq_chip = &bd9574mwf_irq_chip;
+   cells = bd9574mwf_cells;
+   num_cells = ARRAY_SIZE(bd9574mwf_cells);
+   break;
default:
dev_err(dev, "Unsupported device 0x%x\n", ret);
return -ENODEV;
@@ -190,6 +263,7 @@ static int bd9571mwv_probe(struct i2c_client *client,
 
 static const struct of_device_id bd9571mwv_of_match_table[] = {
{ .compatible = "rohm,bd9571mwv", },
+   { .compatible = "rohm,bd9574mwf", },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table);
diff --git a/include/linux/mfd/bd9

[PATCH v8 11/12] mfd: bd9571mwv: Make the driver more generic

[Yoshihiro Shimoda]

From: Khiem Nguyen 

Since the driver supports BD9571MWV PMIC only, this patch makes
the functions and data structure become more generic so that
it can support other PMIC variants as well. Also remove printing
part name which Lee Jones suggested.

Signed-off-by: Khiem Nguyen 
Co-developed-by: Yoshihiro Shimoda 
Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
Acked-for-MFD-by: Lee Jones 
---
 drivers/mfd/bd9571mwv.c   | 77 +++
 include/linux/mfd/bd9571mwv.h | 18 ++
 2 files changed, 43 insertions(+), 52 deletions(-)

diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c
index 49e968e..2c1fcbb 100644
--- a/drivers/mfd/bd9571mwv.c
+++ b/drivers/mfd/bd9571mwv.c
@@ -3,6 +3,7 @@
  * ROHM BD9571MWV-M MFD driver
  *
  * Copyright (C) 2017 Marek Vasut 
+ * Copyright (C) 2020 Renesas Electronics Corporation
  *
  * Based on the TPS65086 driver
  */
@@ -102,13 +103,12 @@ static struct regmap_irq_chip bd9571mwv_irq_chip = {
.num_irqs   = ARRAY_SIZE(bd9571mwv_irqs),
 };
 
-static int bd9571mwv_identify(struct bd9571mwv *bd)
+static int bd957x_identify(struct device *dev, struct regmap *regmap)
 {
-   struct device *dev = bd->dev;
unsigned int value;
int ret;
 
-   ret = regmap_read(bd->regmap, BD9571MWV_VENDOR_CODE, &value);
+   ret = regmap_read(regmap, BD9571MWV_VENDOR_CODE, &value);
if (ret) {
dev_err(dev, "Failed to read vendor code register (ret=%i)\n",
ret);
@@ -121,66 +121,71 @@ static int bd9571mwv_identify(struct bd9571mwv *bd)
return -EINVAL;
}
 
-   ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_CODE, &value);
+   ret = regmap_read(regmap, BD9571MWV_PRODUCT_CODE, &value);
if (ret) {
dev_err(dev, "Failed to read product code register (ret=%i)\n",
ret);
return ret;
}
-
-   if (value != BD9571MWV_PRODUCT_CODE_VAL) {
-   dev_err(dev, "Invalid product code ID %02x (expected %02x)\n",
-   value, BD9571MWV_PRODUCT_CODE_VAL);
-   return -EINVAL;
-   }
-
-   ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_REVISION, &value);
+   ret = regmap_read(regmap, BD9571MWV_PRODUCT_REVISION, &value);
if (ret) {
dev_err(dev, "Failed to read revision register (ret=%i)\n",
ret);
return ret;
}
 
-   dev_info(dev, "Device: BD9571MWV rev. %d\n", value & 0xff);
-
return 0;
 }
 
 static int bd9571mwv_probe(struct i2c_client *client,
- const struct i2c_device_id *ids)
+  const struct i2c_device_id *ids)
 {
-   struct bd9571mwv *bd;
-   int ret;
-
-   bd = devm_kzalloc(&client->dev, sizeof(*bd), GFP_KERNEL);
-   if (!bd)
-   return -ENOMEM;
+   const struct regmap_config *regmap_config;
+   const struct regmap_irq_chip *irq_chip;
+   const struct mfd_cell *cells;
+   struct device *dev = &client->dev;
+   struct regmap *regmap;
+   struct regmap_irq_chip_data *irq_data;
+   int ret, num_cells, irq = client->irq;
+
+   /* Read the PMIC product code */
+   ret = i2c_smbus_read_byte_data(client, BD9571MWV_PRODUCT_CODE);
+   if (ret < 0) {
+   dev_err(dev, "Failed to read product code\n");
+   return ret;
+   }
 
-   i2c_set_clientdata(client, bd);
-   bd->dev = &client->dev;
-   bd->irq = client->irq;
+   switch (ret) {
+   case BD9571MWV_PRODUCT_CODE_BD9571MWV:
+   regmap_config = &bd9571mwv_regmap_config;
+   irq_chip = &bd9571mwv_irq_chip;
+   cells = bd9571mwv_cells;
+   num_cells = ARRAY_SIZE(bd9571mwv_cells);
+   break;
+   default:
+   dev_err(dev, "Unsupported device 0x%x\n", ret);
+   return -ENODEV;
+   }
 
-   bd->regmap = devm_regmap_init_i2c(client, &bd9571mwv_regmap_config);
-   if (IS_ERR(bd->regmap)) {
-   dev_err(bd->dev, "Failed to initialize register map\n");
-   return PTR_ERR(bd->regmap);
+   regmap = devm_regmap_init_i2c(client, regmap_config);
+   if (IS_ERR(regmap)) {
+   dev_err(dev, "Failed to initialize register map\n");
+   return PTR_ERR(regmap);
}
 
-   ret = bd9571mwv_identify(bd);
+   ret = bd957x_identify(dev, regmap);
if (ret)
return ret;
 
-   ret = devm_regmap_add_irq_chip(bd->dev, bd->regmap, bd->irq,
-  IRQF_ONESHOT, 0, &bd9571mwv_irq_chip,
-  &bd->irq_data);
+   ret = devm_regmap_add_irq_chip(dev, regmap, irq, IRQF_ONESHOT, 0,
+  irq_chip, &irq_data);
if (ret) {
-   dev_err(bd->dev, "Failed to register IRQ ch

[PATCH v8 09/12] mfd: bd9571mwv: Use the SPDX license identifier

[Yoshihiro Shimoda]

Use the SPDX license identifier instead of a local description.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Geert Uytterhoeven 
Acked-for-MFD-by: Lee Jones 
---
 drivers/mfd/bd9571mwv.c   | 10 +-
 include/linux/mfd/bd9571mwv.h | 10 +-
 2 files changed, 2 insertions(+), 18 deletions(-)

diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c
index 19d57a4..e68c3fa 100644
--- a/drivers/mfd/bd9571mwv.c
+++ b/drivers/mfd/bd9571mwv.c
@@ -1,17 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * ROHM BD9571MWV-M MFD driver
  *
  * Copyright (C) 2017 Marek Vasut 
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether expressed or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License version 2 for more details.
- *
  * Based on the TPS65086 driver
  */
 
diff --git a/include/linux/mfd/bd9571mwv.h b/include/linux/mfd/bd9571mwv.h
index eb05569..bcc7092 100644
--- a/include/linux/mfd/bd9571mwv.h
+++ b/include/linux/mfd/bd9571mwv.h
@@ -1,17 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * ROHM BD9571MWV-M driver
  *
  * Copyright (C) 2017 Marek Vasut 
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether expressed or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License version 2 for more details.
- *
  * Based on the TPS65086 driver
  */
 
-- 
2.7.4

[PATCH v8 02/12] dt-bindings: mfd: bd9571mwv: Document BD9574MWF

[Yoshihiro Shimoda]

Document other similar specification chip BD9574MWF.

Signed-off-by: Yoshihiro Shimoda 
Acked-for-MFD-by: Lee Jones 
---
 Documentation/devicetree/bindings/mfd/bd9571mwv.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt 
b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
index 8c46786..1d6413e 100644
--- a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
+++ b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
@@ -1,7 +1,7 @@
-* ROHM BD9571MWV Power Management Integrated Circuit (PMIC) bindings
+* ROHM BD9571MWV/BD9574MWF Power Management Integrated Circuit (PMIC) bindings
 
 Required properties:
- - compatible  : Should be "rohm,bd9571mwv".
+ - compatible  : Should be "rohm,bd9571mwv" or "rohm,bd9574mwf".
  - reg : I2C slave address.
  - interrupts  : The interrupt line the device is connected to.
  - interrupt-controller: Marks the device node as an interrupt 
controller.
-- 
2.7.4

[PATCH v8 07/12] gpio: bd9571mwv: rid of using struct bd9571mwv

[Yoshihiro Shimoda]

To simplify this driver, use dev_get_regmap() and
rid of using struct bd9571mwv.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
---
 drivers/gpio/gpio-bd9571mwv.c | 19 +--
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/gpio/gpio-bd9571mwv.c b/drivers/gpio/gpio-bd9571mwv.c
index abb622c..0e5395f 100644
--- a/drivers/gpio/gpio-bd9571mwv.c
+++ b/drivers/gpio/gpio-bd9571mwv.c
@@ -16,8 +16,8 @@
 #include 
 
 struct bd9571mwv_gpio {
+   struct regmap *regmap;
struct gpio_chip chip;
-   struct bd9571mwv *bd;
 };
 
 static int bd9571mwv_gpio_get_direction(struct gpio_chip *chip,
@@ -26,7 +26,7 @@ static int bd9571mwv_gpio_get_direction(struct gpio_chip 
*chip,
struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
int ret, val;
 
-   ret = regmap_read(gpio->bd->regmap, BD9571MWV_GPIO_DIR, &val);
+   ret = regmap_read(gpio->regmap, BD9571MWV_GPIO_DIR, &val);
if (ret < 0)
return ret;
if (val & BIT(offset))
@@ -40,8 +40,7 @@ static int bd9571mwv_gpio_direction_input(struct gpio_chip 
*chip,
 {
struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
 
-   regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_DIR,
-  BIT(offset), 0);
+   regmap_update_bits(gpio->regmap, BD9571MWV_GPIO_DIR, BIT(offset), 0);
 
return 0;
 }
@@ -52,9 +51,9 @@ static int bd9571mwv_gpio_direction_output(struct gpio_chip 
*chip,
struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
 
/* Set the initial value */
-   regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_OUT,
+   regmap_update_bits(gpio->regmap, BD9571MWV_GPIO_OUT,
   BIT(offset), value ? BIT(offset) : 0);
-   regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_DIR,
+   regmap_update_bits(gpio->regmap, BD9571MWV_GPIO_DIR,
   BIT(offset), BIT(offset));
 
return 0;
@@ -65,7 +64,7 @@ static int bd9571mwv_gpio_get(struct gpio_chip *chip, 
unsigned int offset)
struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
int ret, val;
 
-   ret = regmap_read(gpio->bd->regmap, BD9571MWV_GPIO_IN, &val);
+   ret = regmap_read(gpio->regmap, BD9571MWV_GPIO_IN, &val);
if (ret < 0)
return ret;
 
@@ -77,7 +76,7 @@ static void bd9571mwv_gpio_set(struct gpio_chip *chip, 
unsigned int offset,
 {
struct bd9571mwv_gpio *gpio = gpiochip_get_data(chip);
 
-   regmap_update_bits(gpio->bd->regmap, BD9571MWV_GPIO_OUT,
+   regmap_update_bits(gpio->regmap, BD9571MWV_GPIO_OUT,
   BIT(offset), value ? BIT(offset) : 0);
 }
 
@@ -105,9 +104,9 @@ static int bd9571mwv_gpio_probe(struct platform_device 
*pdev)
 
platform_set_drvdata(pdev, gpio);
 
-   gpio->bd = dev_get_drvdata(pdev->dev.parent);
+   gpio->regmap = dev_get_regmap(pdev->dev.parent, NULL);
gpio->chip = template_chip;
-   gpio->chip.parent = gpio->bd->dev;
+   gpio->chip.parent = pdev->dev.parent;
 
ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
if (ret < 0) {
-- 
2.7.4

[PATCH v8 08/12] gpio: bd9571mwv: Add BD9574MWF support

[Yoshihiro Shimoda]

Add support for BD9574MWF which is similar chip with BD9571MWV.
Note that BD9574MWF has additional features "RECOV_GPOUT",
"FREQSEL" and "RTC_IN", but supports GPIO function only.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
---
 drivers/gpio/gpio-bd9571mwv.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-bd9571mwv.c b/drivers/gpio/gpio-bd9571mwv.c
index 0e5395f..df6102b 100644
--- a/drivers/gpio/gpio-bd9571mwv.c
+++ b/drivers/gpio/gpio-bd9571mwv.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * ROHM BD9571MWV-M GPIO driver
+ * ROHM BD9571MWV-M and BD9574MWF-M GPIO driver
  *
  * Copyright (C) 2017 Marek Vasut 
  *
@@ -10,6 +10,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
@@ -118,7 +119,8 @@ static int bd9571mwv_gpio_probe(struct platform_device 
*pdev)
 }
 
 static const struct platform_device_id bd9571mwv_gpio_id_table[] = {
-   { "bd9571mwv-gpio", },
+   { "bd9571mwv-gpio", ROHM_CHIP_TYPE_BD9571 },
+   { "bd9574mwf-gpio", ROHM_CHIP_TYPE_BD9574 },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(platform, bd9571mwv_gpio_id_table);
-- 
2.7.4

[PATCH v8 03/12] mfd: rohm-generic: Add BD9571 and BD9574

[Yoshihiro Shimoda]

Add chip IDs for BD9571MWV and BD9574MWF.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
Acked-for-MFD-by: Lee Jones 
---
 include/linux/mfd/rohm-generic.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h
index 4283b5b..affacf8 100644
--- a/include/linux/mfd/rohm-generic.h
+++ b/include/linux/mfd/rohm-generic.h
@@ -12,6 +12,8 @@ enum rohm_chip_type {
ROHM_CHIP_TYPE_BD71847,
ROHM_CHIP_TYPE_BD70528,
ROHM_CHIP_TYPE_BD71828,
+   ROHM_CHIP_TYPE_BD9571,
+   ROHM_CHIP_TYPE_BD9574,
ROHM_CHIP_TYPE_AMOUNT
 };
 
-- 
2.7.4

[PATCH v8 10/12] mfd: bd9571mwv: Use devm_regmap_add_irq_chip()

[Yoshihiro Shimoda]

Use devm_regmap_add_irq_chip() to simplify the code.

Signed-off-by: Yoshihiro Shimoda 
Acked-for-MFD-by: Lee Jones 
Reviewed-by: Matti Vaittinen 
Reviewed-by: Geert Uytterhoeven 
---
 drivers/mfd/bd9571mwv.c | 27 ++-
 1 file changed, 6 insertions(+), 21 deletions(-)

diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c
index e68c3fa..49e968e 100644
--- a/drivers/mfd/bd9571mwv.c
+++ b/drivers/mfd/bd9571mwv.c
@@ -170,31 +170,17 @@ static int bd9571mwv_probe(struct i2c_client *client,
if (ret)
return ret;
 
-   ret = regmap_add_irq_chip(bd->regmap, bd->irq, IRQF_ONESHOT, 0,
- &bd9571mwv_irq_chip, &bd->irq_data);
+   ret = devm_regmap_add_irq_chip(bd->dev, bd->regmap, bd->irq,
+  IRQF_ONESHOT, 0, &bd9571mwv_irq_chip,
+  &bd->irq_data);
if (ret) {
dev_err(bd->dev, "Failed to register IRQ chip\n");
return ret;
}
 
-   ret = devm_mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO,
-  bd9571mwv_cells, ARRAY_SIZE(bd9571mwv_cells),
-  NULL, 0, 
regmap_irq_get_domain(bd->irq_data));
-   if (ret) {
-   regmap_del_irq_chip(bd->irq, bd->irq_data);
-   return ret;
-   }
-
-   return 0;
-}
-
-static int bd9571mwv_remove(struct i2c_client *client)
-{
-   struct bd9571mwv *bd = i2c_get_clientdata(client);
-
-   regmap_del_irq_chip(bd->irq, bd->irq_data);
-
-   return 0;
+   return devm_mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO,
+   bd9571mwv_cells, 
ARRAY_SIZE(bd9571mwv_cells),
+   NULL, 0, 
regmap_irq_get_domain(bd->irq_data));
 }
 
 static const struct of_device_id bd9571mwv_of_match_table[] = {
@@ -215,7 +201,6 @@ static struct i2c_driver bd9571mwv_driver = {
.of_match_table = bd9571mwv_of_match_table,
},
.probe  = bd9571mwv_probe,
-   .remove = bd9571mwv_remove,
.id_table   = bd9571mwv_id_table,
 };
 module_i2c_driver(bd9571mwv_driver);
-- 
2.7.4

[PATCH v8 05/12] regulator: bd9571mwv: Add BD9574MWF support

[Yoshihiro Shimoda]

Add support for BD9574MWF which is similar chip with BD9571MWV.
Note that we don't support voltage rails VD{09,18,25,33} by this
driver on BD9574. The VD09 voltage could be read from PMIC but that
is not supported by this commit.

Signed-off-by: Yoshihiro Shimoda 
Reviewed-by: Matti Vaittinen 
---
 drivers/regulator/bd9571mwv-regulator.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/regulator/bd9571mwv-regulator.c 
b/drivers/regulator/bd9571mwv-regulator.c
index 42b6a70..7b0cd08 100644
--- a/drivers/regulator/bd9571mwv-regulator.c
+++ b/drivers/regulator/bd9571mwv-regulator.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * ROHM BD9571MWV-M regulator driver
+ * ROHM BD9571MWV-M and BD9574MWF-M regulator driver
  *
  * Copyright (C) 2017 Marek Vasut 
  *
@@ -9,6 +9,7 @@
  * NOTE: VD09 is missing
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -277,6 +278,7 @@ static int bd9571mwv_regulator_probe(struct platform_device 
*pdev)
struct regulator_dev *rdev;
unsigned int val;
int i;
+   enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data;
 
bdreg = devm_kzalloc(&pdev->dev, sizeof(*bdreg), GFP_KERNEL);
if (!bdreg)
@@ -292,6 +294,9 @@ static int bd9571mwv_regulator_probe(struct platform_device 
*pdev)
config.regmap = bdreg->regmap;
 
for (i = 0; i < ARRAY_SIZE(regulators); i++) {
+   /* BD9574MWF supports DVFS only */
+   if (chip == ROHM_CHIP_TYPE_BD9574 && regulators[i].id != DVFS)
+   continue;
rdev = devm_regulator_register(&pdev->dev, ®ulators[i],
   &config);
if (IS_ERR(rdev)) {
@@ -339,7 +344,8 @@ static int bd9571mwv_regulator_probe(struct platform_device 
*pdev)
 }
 
 static const struct platform_device_id bd9571mwv_regulator_id_table[] = {
-   { "bd9571mwv-regulator", },
+   { "bd9571mwv-regulator", ROHM_CHIP_TYPE_BD9571 },
+   { "bd9574mwf-regulator", ROHM_CHIP_TYPE_BD9574 },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(platform, bd9571mwv_regulator_id_table);
-- 
2.7.4

[PATCH] staging: board: description for CONFIG_STAGING_BOARD

[Song Chen]

A paragraph to describe what CONFIG_STAGING_BOARD is for,
to help developers have better understanding.

Signed-off-by: Song Chen 
---
 drivers/staging/board/Kconfig | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/board/Kconfig b/drivers/staging/board/Kconfig
index d0c6e42..64c7797 100644
--- a/drivers/staging/board/Kconfig
+++ b/drivers/staging/board/Kconfig
@@ -3,7 +3,10 @@ config STAGING_BOARD
bool "Staging Board Support"
depends on OF_ADDRESS && OF_IRQ && CLKDEV_LOOKUP
help
- Select to enable per-board staging support code.
-
- If in doubt, say N here.
+ Staging board base is to support continuous upstream
+ in-tree development and integration of platform devices.
 
+ Helps developers integrate devices as platform devices for
+ device drivers that only provide platform device bindings.
+ This in turn allows for incremental development of both
+ hardware feature support and DT binding work in parallel.
-- 
2.7.4

[RFC PATCH 0/4] pre sort pages on lruvec in pagevec

[Alex Shi]

This idea was tried on per memcg lru lock patchset v18, and had a good
result, about 5%~20+% performance gain on lru lock busy benchmarks,
like case-lru-file-readtwice.

But on the latest kernel, I can not reproduce the result on my box.
Also I can not reproduce Tim's performance gain too on my box.

So I don't know if it's workable in some scenario, just sent out if
someone has interesting...

Alex Shi (4):
  mm/swap.c: pre-sort pages in pagevec for pagevec_lru_move_fn
  mm/swap.c: bail out early for no memcg and no numa
  mm/swap.c: extend the usage to pagevec_lru_add
  mm/swap.c: no sort if all page's lruvec are same

Cc: Konstantin Khlebnikov 
Cc: Hugh Dickins 
Cc: Yu Zhao 
Cc: Michal Hocko 
Cc: Matthew Wilcox (Oracle) 
Cc: Andrew Morton 
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org

 mm/swap.c | 118 +-
 1 file changed, 91 insertions(+), 27 deletions(-)

-- 
2.29.GIT

[RFC PATCH 2/4] mm/swap.c: bail out early for no memcg and no numa

[Alex Shi]

If a system has memcg disabled and no numa node, like a embedded system,
there is no needs to do the pagevec sort, since only just one lruvec in
system. In this situation, we could skip the pagevec sorting.

Signed-off-by: Alex Shi 
Cc: Konstantin Khlebnikov 
Cc: Hugh Dickins 
Cc: Yu Zhao 
Cc: Michal Hocko 
Cc: Matthew Wilcox (Oracle) 
Cc: Andrew Morton 
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
---
 mm/swap.c | 19 ++-
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/mm/swap.c b/mm/swap.c
index 994641331bf7..bb5300b7e321 100644
--- a/mm/swap.c
+++ b/mm/swap.c
@@ -235,6 +235,7 @@ void sort_isopv(struct pagevec *pvec, struct pagevec *isopv,
 
pagevec_init(&busypv);
 
+
for (i = 0, j = 0; i < pagevec_count(pvec); i++) {
struct page *page = pvec->pages[i];
 
@@ -253,7 +254,8 @@ void sort_isopv(struct pagevec *pvec, struct pagevec *isopv,
if (pagevec_count(&busypv))
release_pages(busypv.pages, busypv.nr);
 
-   shell_sort(isopv, lvaddr);
+   if (!mem_cgroup_disabled() || num_online_nodes() > 1)
+   shell_sort(isopv, lvaddr);
 }
 
 static void pagevec_lru_move_fn(struct pagevec *pvec,
@@ -263,13 +265,12 @@ static void pagevec_lru_move_fn(struct pagevec *pvec,
struct lruvec *lruvec = NULL;
unsigned long flags = 0;
unsigned long lvaddr[PAGEVEC_SIZE];
-   struct pagevec isopv;
-
-   pagevec_init(&isopv);
+   struct pagevec sortedpv;
 
-   sort_isopv(pvec, &isopv, lvaddr);
+   pagevec_init(&sortedpv);
+   sort_isopv(pvec, &sortedpv, lvaddr);
 
-   n = pagevec_count(&isopv);
+   n = pagevec_count(&sortedpv);
if (!n)
return;
 
@@ -284,12 +285,12 @@ static void pagevec_lru_move_fn(struct pagevec *pvec,
spin_lock_irqsave(&lruvec->lru_lock, flags);
}
 
-   (*move_fn)(isopv.pages[i], lruvec);
+   (*move_fn)(sortedpv.pages[i], lruvec);
 
-   SetPageLRU(isopv.pages[i]);
+   SetPageLRU(sortedpv.pages[i]);
}
spin_unlock_irqrestore(&lruvec->lru_lock, flags);
-   release_pages(isopv.pages, isopv.nr);
+   release_pages(sortedpv.pages, sortedpv.nr);
 }
 
 static void pagevec_move_tail_fn(struct page *page, struct lruvec *lruvec)
-- 
2.29.GIT

[RFC PATCH 1/4] mm/swap.c: pre-sort pages in pagevec for pagevec_lru_move_fn

[Alex Shi]

Pages in pagevec may have different lruvec, so we have to do relock in
function pagevec_lru_move_fn(), but a relock may cause current cpu wait
for long time on the same lock for spinlock fairness reason.

Before per memcg lru_lock, we have to bear the relock since the spinlock
is the only way to serialize page's memcg/lruvec. Now TestClearPageLRU
could be used to isolate pages exculsively, and stable the page's
lruvec/memcg. So it gives us a chance to sort the page's lruvec before
moving action in pagevec_lru_move_fn. Then we don't suffer from the
spinlock's fairness wait.

Signed-off-by: Alex Shi 
Cc: Konstantin Khlebnikov 
Cc: Hugh Dickins 
Cc: Yu Zhao 
Cc: Michal Hocko 
Cc: Matthew Wilcox (Oracle) 
Cc: Andrew Morton 
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
---
 mm/swap.c | 92 +++
 1 file changed, 79 insertions(+), 13 deletions(-)

diff --git a/mm/swap.c b/mm/swap.c
index c5363bdebe67..994641331bf7 100644
--- a/mm/swap.c
+++ b/mm/swap.c
@@ -201,29 +201,95 @@ int get_kernel_page(unsigned long start, int write, 
struct page **pages)
 }
 EXPORT_SYMBOL_GPL(get_kernel_page);
 
+/* Pratt's gaps for shell sort, https://en.wikipedia.org/wiki/Shellsort */
+static int gaps[] = { 6, 4, 3, 2, 1, 0};
+
+/* Shell sort pagevec[] on page's lruvec.*/
+static void shell_sort(struct pagevec *pvec, unsigned long *lvaddr)
+{
+   int g, i, j, n = pagevec_count(pvec);
+
+   for (g=0; gaps[g] > 0 && gaps[g] <= n/2; g++) {
+   int gap = gaps[g];
+
+   for (i = gap; i < n; i++) {
+   unsigned long tmp = lvaddr[i];
+   struct page *page = pvec->pages[i];
+
+   for (j = i - gap; j >= 0 && lvaddr[j] > tmp; j -= gap) {
+   lvaddr[j + gap] = lvaddr[j];
+   pvec->pages[j + gap] = pvec->pages[j];
+   }
+   lvaddr[j + gap] = tmp;
+   pvec->pages[j + gap] = page;
+   }
+   }
+}
+
+/* Get lru bit cleared page and their lruvec address, release the others */
+void sort_isopv(struct pagevec *pvec, struct pagevec *isopv,
+   unsigned long *lvaddr)
+{
+   int i, j;
+   struct pagevec busypv;
+
+   pagevec_init(&busypv);
+
+   for (i = 0, j = 0; i < pagevec_count(pvec); i++) {
+   struct page *page = pvec->pages[i];
+
+   pvec->pages[i] = NULL;
+
+   /* block memcg migration during page moving between lru */
+   if (!TestClearPageLRU(page)) {
+   pagevec_add(&busypv, page);
+   continue;
+   }
+   lvaddr[j++] = (unsigned long)
+   mem_cgroup_page_lruvec(page, page_pgdat(page));
+   pagevec_add(isopv, page);
+   }
+   pagevec_reinit(pvec);
+   if (pagevec_count(&busypv))
+   release_pages(busypv.pages, busypv.nr);
+
+   shell_sort(isopv, lvaddr);
+}
+
 static void pagevec_lru_move_fn(struct pagevec *pvec,
void (*move_fn)(struct page *page, struct lruvec *lruvec))
 {
-   int i;
+   int i, n;
struct lruvec *lruvec = NULL;
unsigned long flags = 0;
+   unsigned long lvaddr[PAGEVEC_SIZE];
+   struct pagevec isopv;
 
-   for (i = 0; i < pagevec_count(pvec); i++) {
-   struct page *page = pvec->pages[i];
+   pagevec_init(&isopv);
 
-   /* block memcg migration during page moving between lru */
-   if (!TestClearPageLRU(page))
-   continue;
+   sort_isopv(pvec, &isopv, lvaddr);
 
-   lruvec = relock_page_lruvec_irqsave(page, lruvec, &flags);
-   (*move_fn)(page, lruvec);
+   n = pagevec_count(&isopv);
+   if (!n)
+   return;
 
-   SetPageLRU(page);
+   lruvec = (struct lruvec *)lvaddr[0];
+   spin_lock_irqsave(&lruvec->lru_lock, flags);
+
+   for (i = 0; i < n; i++) {
+   /* lock new lruvec if lruvec changes, we have sorted them */
+   if (lruvec != (struct lruvec *)lvaddr[i]) {
+   spin_unlock_irqrestore(&lruvec->lru_lock, flags);
+   lruvec = (struct lruvec *)lvaddr[i];
+   spin_lock_irqsave(&lruvec->lru_lock, flags);
+   }
+
+   (*move_fn)(isopv.pages[i], lruvec);
+
+   SetPageLRU(isopv.pages[i]);
}
-   if (lruvec)
-   unlock_page_lruvec_irqrestore(lruvec, flags);
-   release_pages(pvec->pages, pvec->nr);
-   pagevec_reinit(pvec);
+   spin_unlock_irqrestore(&lruvec->lru_lock, flags);
+   release_pages(isopv.pages, isopv.nr);
 }
 
 static void pagevec_move_tail_fn(struct page *page, struct lruvec *lruvec)
-- 
2.29.GIT

[RFC PATCH 3/4] mm/swap.c: extend the usage to pagevec_lru_add

[Alex Shi]

The only different for __pagevec_lru_add and other page moving between
lru lists is page to add lru list has no need to do TestClearPageLRU and
set the lru bit back. So we could combound them with a clear lru bit
switch in sort function parameter.

Than all lru list operation functions could be united.

Signed-off-by: Alex Shi 
Cc: Konstantin Khlebnikov 
Cc: Hugh Dickins 
Cc: Yu Zhao 
Cc: Michal Hocko 
Cc: Matthew Wilcox (Oracle) 
Cc: Andrew Morton 
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
---
 mm/swap.c | 31 ---
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/mm/swap.c b/mm/swap.c
index bb5300b7e321..9a2269e5099b 100644
--- a/mm/swap.c
+++ b/mm/swap.c
@@ -12,6 +12,7 @@
  * Started 18.12.91
  * Swap aging added 23.2.95, Stephen Tweedie.
  * Buffermem limits added 12.3.98, Rik van Riel.
+ * Pre-sort pagevec added 12.1.20, Alex Shi.
  */
 
 #include 
@@ -227,8 +228,8 @@ static void shell_sort(struct pagevec *pvec, unsigned long 
*lvaddr)
 }
 
 /* Get lru bit cleared page and their lruvec address, release the others */
-void sort_isopv(struct pagevec *pvec, struct pagevec *isopv,
-   unsigned long *lvaddr)
+static void sort_isopv(struct pagevec *pvec, struct pagevec *isopv,
+   unsigned long *lvaddr, bool clearlru)
 {
int i, j;
struct pagevec busypv;
@@ -242,7 +243,7 @@ void sort_isopv(struct pagevec *pvec, struct pagevec *isopv,
pvec->pages[i] = NULL;
 
/* block memcg migration during page moving between lru */
-   if (!TestClearPageLRU(page)) {
+   if (clearlru && !TestClearPageLRU(page)) {
pagevec_add(&busypv, page);
continue;
}
@@ -266,9 +267,13 @@ static void pagevec_lru_move_fn(struct pagevec *pvec,
unsigned long flags = 0;
unsigned long lvaddr[PAGEVEC_SIZE];
struct pagevec sortedpv;
+   bool clearlru;
+
+   /* don't clear lru bit for new page adding to lru */
+   clearlru = pvec != this_cpu_ptr(&lru_pvecs.lru_add);
 
pagevec_init(&sortedpv);
-   sort_isopv(pvec, &sortedpv, lvaddr);
+   sort_isopv(pvec, &sortedpv, lvaddr, clearlru);
 
n = pagevec_count(&sortedpv);
if (!n)
@@ -287,7 +292,8 @@ static void pagevec_lru_move_fn(struct pagevec *pvec,
 
(*move_fn)(sortedpv.pages[i], lruvec);
 
-   SetPageLRU(sortedpv.pages[i]);
+   if (clearlru)
+   SetPageLRU(sortedpv.pages[i]);
}
spin_unlock_irqrestore(&lruvec->lru_lock, flags);
release_pages(sortedpv.pages, sortedpv.nr);
@@ -,20 +1117,7 @@ static void __pagevec_lru_add_fn(struct page *page, 
struct lruvec *lruvec)
  */
 void __pagevec_lru_add(struct pagevec *pvec)
 {
-   int i;
-   struct lruvec *lruvec = NULL;
-   unsigned long flags = 0;
-
-   for (i = 0; i < pagevec_count(pvec); i++) {
-   struct page *page = pvec->pages[i];
-
-   lruvec = relock_page_lruvec_irqsave(page, lruvec, &flags);
-   __pagevec_lru_add_fn(page, lruvec);
-   }
-   if (lruvec)
-   unlock_page_lruvec_irqrestore(lruvec, flags);
-   release_pages(pvec->pages, pvec->nr);
-   pagevec_reinit(pvec);
+   pagevec_lru_move_fn(pvec, __pagevec_lru_add_fn);
 }
 
 /**
-- 
2.29.GIT

[v6,2/4] PCI: Export pci_pio_to_address() for module use

[Jianjun Wang]

This interface will be used by PCI host drivers for PIO translation,
export it to support compiling those drivers as kernel modules.

Signed-off-by: Jianjun Wang 
---
 drivers/pci/pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6d4d5a2f923d..3de714db2557 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4016,6 +4016,7 @@ phys_addr_t pci_pio_to_address(unsigned long pio)
 
return address;
 }
+EXPORT_SYMBOL(pci_pio_to_address);
 
 unsigned long __weak pci_address_to_pio(phys_addr_t address)
 {
-- 
2.25.1

[v6,0/4] PCI: mediatek: Add new generation controller support

[Jianjun Wang]

These series patches add pcie-mediatek-gen3.c and dt-bindings file to
support new generation PCIe controller.

Changes in v6:
1. Export pci_pio_to_address() to support compiling as kernel module;
2. Replace usleep_range(100 * 1000, 120 * 1000) with msleep(100);
3. Replace dev_notice with dev_err;
4. Fix MSI get hwirq flow;
5. Fix warning for possible recursive locking in mtk_pcie_set_affinity.

Changes in v5:
1. Remove unused macros
2. Modify the config read/write callbacks, set the config byte field
   in TLP header and use pci_generic_config_read32/write32
   to access the config space
3. Fix the settings of translation window, both MEM and IO regions
   works properly
4. Fix typos

Changes in v4:
1. Fix PCIe power up/down flow
2. Use "mac" and "phy" for reset names
3. Add clock names
4. Fix the variables type

Changes in v3:
1. Remove standard property in binding document
2. Return error number when get_optional* API throws an error
3. Use the bulk clk APIs

Changes in v2:
1. Fix the typo of dt-bindings patch
2. Remove the unnecessary properties in binding document
3. dispos the irq mappings of msi top domain when irq teardown

Jianjun Wang (4):
  dt-bindings: PCI: mediatek: Add YAML schema
  PCI: Export pci_pio_to_address() for module use
  PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
  MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer

 .../bindings/pci/mediatek-pcie-gen3.yaml  |  135 ++
 MAINTAINERS   |1 +
 drivers/pci/controller/Kconfig|   13 +
 drivers/pci/controller/Makefile   |1 +
 drivers/pci/controller/pcie-mediatek-gen3.c   | 1084 +
 drivers/pci/pci.c |1 +
 6 files changed, 1235 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
 create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c

-- 
2.25.1

[v6,1/4] dt-bindings: PCI: mediatek: Add YAML schema

[Jianjun Wang]

Add YAML schemas documentation for Gen3 PCIe controller on
MediaTek SoCs.

Signed-off-by: Jianjun Wang 
Acked-by: Ryder Lee 
Reviewed-by: Rob Herring 
---
 .../bindings/pci/mediatek-pcie-gen3.yaml  | 135 ++
 1 file changed, 135 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml

diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml 
b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
new file mode 100644
index ..e2aecbb56e57
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -0,0 +1,135 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Gen3 PCIe controller on MediaTek SoCs
+
+maintainers:
+  - Jianjun Wang 
+
+allOf:
+  - $ref: /schemas/pci/pci-bus.yaml#
+
+properties:
+  compatible:
+const: mediatek,mt8192-pcie
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  ranges:
+minItems: 1
+maxItems: 8
+
+  resets:
+minItems: 1
+maxItems: 2
+
+  reset-names:
+anyOf:
+  - const: mac
+  - const: phy
+
+  clocks:
+maxItems: 5
+
+  clock-names:
+items:
+  - const: tl_26m
+  - const: tl_96m
+  - const: tl_32k
+  - const: peri_26m
+  - const: top_133m
+
+  assigned-clocks:
+maxItems: 1
+
+  assigned-clock-parents:
+maxItems: 1
+
+  phys:
+maxItems: 1
+
+  '#interrupt-cells':
+const: 1
+
+  interrupt-controller:
+description: Interrupt controller node for handling legacy PCI interrupts.
+type: object
+properties:
+  '#address-cells':
+const: 0
+  '#interrupt-cells':
+const: 1
+  interrupt-controller: true
+
+required:
+  - '#address-cells'
+  - '#interrupt-cells'
+  - interrupt-controller
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - ranges
+  - clocks
+  - '#interrupt-cells'
+  - interrupt-controller
+
+unevaluatedProperties: false
+
+examples:
+  - |
+#include 
+#include 
+
+bus {
+#address-cells = <2>;
+#size-cells = <2>;
+
+pcie: pcie@1123 {
+compatible = "mediatek,mt8192-pcie";
+device_type = "pci";
+#address-cells = <3>;
+#size-cells = <2>;
+reg = <0x00 0x1123 0x00 0x4000>;
+reg-names = "pcie-mac";
+interrupts = ;
+bus-range = <0x00 0xff>;
+ranges = <0x8200 0x00 0x1200 0x00
+  0x1200 0x00 0x100>;
+clocks = <&infracfg 40>,
+ <&infracfg 43>,
+ <&infracfg 97>,
+ <&infracfg 99>,
+ <&infracfg 111>;
+clock-names = "tl_26m", "tl_96m", "tl_32k", "peri_26m", "top_133m";
+assigned-clocks = <&topckgen 50>;
+assigned-clock-parents = <&topckgen 91>;
+
+phys = <&pciephy>;
+phy-names = "pcie-phy";
+resets = <&infracfg_rst 0>;
+reset-names = "phy";
+
+#interrupt-cells = <1>;
+interrupt-map-mask = <0 0 0 0x7>;
+interrupt-map = <0 0 0 1 &pcie_intc 0>,
+<0 0 0 2 &pcie_intc 1>,
+<0 0 0 3 &pcie_intc 2>,
+<0 0 0 4 &pcie_intc 3>;
+pcie_intc: interrupt-controller {
+  #address-cells = <0>;
+  #interrupt-cells = <1>;
+  interrupt-controller;
+};
+};
+};
-- 
2.25.1

[v6,3/4] PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192

[Jianjun Wang]

MediaTek's PCIe host controller has three generation HWs, the new
generation HW is an individual bridge, it supports Gen3 speed and
up to 256 MSI interrupt numbers for multi-function devices.

Add support for new Gen3 controller which can be found on MT8192.

Signed-off-by: Jianjun Wang 
Acked-by: Ryder Lee 
---
 drivers/pci/controller/Kconfig  |   13 +
 drivers/pci/controller/Makefile |1 +
 drivers/pci/controller/pcie-mediatek-gen3.c | 1084 +++
 3 files changed, 1098 insertions(+)
 create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c

diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
index 64e2f5e379aa..b242b17025b3 100644
--- a/drivers/pci/controller/Kconfig
+++ b/drivers/pci/controller/Kconfig
@@ -242,6 +242,19 @@ config PCIE_MEDIATEK
  Say Y here if you want to enable PCIe controller support on
  MediaTek SoCs.
 
+config PCIE_MEDIATEK_GEN3
+   tristate "MediaTek Gen3 PCIe controller"
+   depends on ARCH_MEDIATEK || COMPILE_TEST
+   depends on PCI_MSI_IRQ_DOMAIN
+   help
+ Adds support for PCIe Gen3 MAC controller for MediaTek SoCs.
+ This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed,
+ and support up to 256 MSI interrupt numbers for
+ multi-function devices.
+
+ Say Y here if you want to enable Gen3 PCIe controller support on
+ MediaTek SoCs.
+
 config PCIE_TANGO_SMP8759
bool "Tango SMP8759 PCIe controller (DANGEROUS)"
depends on ARCH_TANGO && PCI_MSI && OF
diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile
index 04c6edc285c5..df5d77d72a9d 100644
--- a/drivers/pci/controller/Makefile
+++ b/drivers/pci/controller/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o
 obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o
 obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o
 obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o
+obj-$(CONFIG_PCIE_MEDIATEK_GEN3) += pcie-mediatek-gen3.o
 obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o
 obj-$(CONFIG_VMD) += vmd.o
 obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o
diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c 
b/drivers/pci/controller/pcie-mediatek-gen3.c
new file mode 100644
index ..00cdb598a9f5
--- /dev/null
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -0,0 +1,1084 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MediaTek PCIe host controller driver.
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Jianjun Wang 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "../pci.h"
+
+#define PCIE_SETTING_REG   0x80
+#define PCIE_PCI_IDS_1 0x9c
+#define PCI_CLASS(class)   (class << 8)
+#define PCIE_RC_MODE   BIT(0)
+
+#define PCIE_CFGNUM_REG0x140
+#define PCIE_CFG_DEVFN(devfn)  ((devfn) & GENMASK(7, 0))
+#define PCIE_CFG_BUS(bus)  (((bus) << 8) & GENMASK(15, 8))
+#define PCIE_CFG_BYTE_EN(bytes)(((bytes) << 16) & GENMASK(19, 
16))
+#define PCIE_CFG_FORCE_BYTE_EN BIT(20)
+#define PCIE_CFG_OFFSET_ADDR   0x1000
+#define PCIE_CFG_HEADER(bus, devfn) \
+   (PCIE_CFG_BUS(bus) | PCIE_CFG_DEVFN(devfn))
+
+#define PCIE_RST_CTRL_REG  0x148
+#define PCIE_MAC_RSTB  BIT(0)
+#define PCIE_PHY_RSTB  BIT(1)
+#define PCIE_BRG_RSTB  BIT(2)
+#define PCIE_PE_RSTB   BIT(3)
+
+#define PCIE_LTSSM_STATUS_REG  0x150
+#define PCIE_LTSSM_STATE_MASK  GENMASK(28, 24)
+#define PCIE_LTSSM_STATE(val)  ((val & PCIE_LTSSM_STATE_MASK) >> 24)
+#define PCIE_LTSSM_STATE_L2_IDLE   0x14
+
+#define PCIE_LINK_STATUS_REG   0x154
+#define PCIE_PORT_LINKUP   BIT(8)
+
+#define PCIE_MSI_SET_NUM   8
+#define PCIE_MSI_IRQS_PER_SET  32
+#define PCIE_MSI_IRQS_NUM \
+   (PCIE_MSI_IRQS_PER_SET * (PCIE_MSI_SET_NUM))
+
+#define PCIE_INT_ENABLE_REG0x180
+#define PCIE_MSI_MASK  GENMASK(PCIE_MSI_SET_NUM + 8 - 1, 8)
+#define PCIE_MSI_SHIFT 8
+#define PCIE_INTX_SHIFT24
+#define PCIE_INTX_MASK GENMASK(27, 24)
+
+#define PCIE_INT_STATUS_REG0x184
+#define PCIE_MSI_SET_ENABLE_REG0x190
+
+#define PCIE_ICMD_PM_REG   0x198
+#define PCIE_TURN_OFF_LINK BIT(4)
+
+#define PCIE_MSI_ADDR_BASE_REG 0xc00
+#define PCIE_MSI_SET_OFFSET0x10
+#define PCIE_MSI_STATUS_OFFSET 0x04
+#define PCIE_MSI_ENABLE_OFFSET 0x08
+
+#define PCIE_TRANS_TABLE_BASE_REG  0x800
+#define PCIE_ATR_SRC_ADDR_MSB_OFFSET   0x4
+#define PCIE_ATR_TRSL_ADDR_LSB_OFFSET  0x8
+#define PCIE_AT

[v6,4/4] MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer

[Jianjun Wang]

Update entry for MediaTek PCIe controller, add Jianjun Wang
as MediaTek PCI co-maintainer.

Signed-off-by: Jianjun Wang 
Acked-by: Ryder Lee 
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index e73636b75f29..1a033812c7f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13622,6 +13622,7 @@ F:  drivers/pci/controller/dwc/pcie-histb.c
 
 PCIE DRIVER FOR MEDIATEK
 M: Ryder Lee 
+M: Jianjun Wang 
 L: linux-...@vger.kernel.org
 L: linux-media...@lists.infradead.org
 S: Supported
-- 
2.25.1

Fair Pay: DS X

[Ywe Cærlyn]

I tried indicating the Adamic guad as DS, which seems correct, and it 
works quite nice for me. It is from a simpler typeography, and later 
ofcourse it grew more complex.


The project is now DS X, and the philosophical background drives this, 
and should be Islam, perfected in all languages, which is work ahead for 
related people of La Guad.


And all information will be in the system, since the adamic society, and 
even before, and should be represented well. DS being a root factor in 
information systems, and the pointer is from the "Dispilio Tablet", and 
fits perfectly for this, and the coming fair pay background, with 
possible east/west political unity in this.


Low size computers fits, and it will be a low-jitter system, with 
economy opimized and positive cultural distinctions respected.


Serenity,
Ywe Cærlyn
https://www.youtube.com/channel/UCR3gmLVjHS5A702wo4bol_Q

[PATCH v4 1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support

[Qing Zhang]

The SPI controller has the following characteristics:

- Full-duplex synchronous serial data transmission
- Support up to 4 variable length byte transmission
- Main mode support
- Mode failure generates an error flag and issues an interrupt request
- Double buffer receiver
- Serial clock with programmable polarity and phase
- SPI can be controlled in wait mode
- Support boot from SPI

Use mtd_debug tool to earse/write/read /dev/mtd0 on development.

eg:

[root@linux mtd-utils-1.0.0]# mtd_debug erase /dev/mtd0 0x2 0x4
Erased 262144 bytes from address 0x0002 in flash
[root@linux mtd-utils-1.0.0]# mtd_debug write /dev/mtd0 0x2 13 1.img
Copied 13 bytes from 1.img to address 0x0002 in flash
[root@linux mtd-utils-1.0.0]# mtd_debug read /dev/mtd0 0x2 13 2.img
Copied 13 bytes from address 0x0002 in flash to 2.img
[root@linux mtd-utils-1.0.0]# cmp -l 1.img 2.img

Signed-off-by: Qing Zhang 
---

v2:
- keep Kconfig and Makefile sorted
- make the entire comment a C++ one so things look more intentional
- Fix unclear indentation
- make conditional statements to improve legibility
- Don't use static inline
- the core handle message queue
- Add a new binding document
- Fix probe part mixed pdev and PCI

v3:
- expose set_cs to the core and let it handle things
- replace transfer_one_message to transfer_one
- replace spi_alloc_master to devm_spi_alloc_master
- split out into prepare/unprepare_message
- releases pci regions before unregister master

v4:
- names used in the manual
- rename ls7a_spi_do_transfer to ls7a_spi_setup_transfer
- change read the spcr and sper outside of this function
- mode configuration moved to prepare instead
- remove redundancy code about unprepare/prepare_message
- used 0x4 instead of 0x1,WFEMPTY instead of RFEMPTY

---
 drivers/spi/Kconfig|   7 ++
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-ls7a.c | 283 +
 3 files changed, 291 insertions(+)
 create mode 100644 drivers/spi/spi-ls7a.c

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index aadaea0..af7c0d4 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -413,6 +413,13 @@ config SPI_LP8841_RTC
  Say N here unless you plan to run the kernel on an ICP DAS
  LP-8x4x industrial computer.
 
+config SPI_LS7A
+   tristate "Loongson LS7A SPI Controller Support"
+   depends on CPU_LOONGSON64 || COMPILE_TEST
+   help
+ This drivers supports the Loongson LS7A SPI controller in master
+ SPI mode.
+
 config SPI_MPC52xx
tristate "Freescale MPC52xx SPI (non-PSC) controller support"
depends on PPC_MPC52xx
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 6fea582..d015cf2 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_SPI_LANTIQ_SSC)  += spi-lantiq-ssc.o
 obj-$(CONFIG_SPI_JCORE)+= spi-jcore.o
 obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o
 obj-$(CONFIG_SPI_LP8841_RTC)   += spi-lp8841-rtc.o
+obj-$(CONFIG_SPI_LS7A) += spi-ls7a.o
 obj-$(CONFIG_SPI_MESON_SPICC)  += spi-meson-spicc.o
 obj-$(CONFIG_SPI_MESON_SPIFC)  += spi-meson-spifc.o
 obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
diff --git a/drivers/spi/spi-ls7a.c b/drivers/spi/spi-ls7a.c
new file mode 100644
index 000..d2be370
--- /dev/null
+++ b/drivers/spi/spi-ls7a.c
@@ -0,0 +1,283 @@
+// SPDX-License-Identifier: GPL-2.0-only
+//
+// Loongson LS7A SPI Controller driver
+//
+// Copyright (C) 2020 Loongson Technology Corporation Limited.
+//
+
+#include 
+#include 
+#include 
+
+/* define spi register */
+#defineSPCR0x00
+#defineSPSR0x01
+#defineFIFO0x02
+#defineSPER0x03
+#defineSFC_PARAM   0x04
+#defineSFC_SOFTCS  0x05
+#defineSFC_TIMING  0x06
+
+struct ls7a_spi {
+   struct spi_master *master;
+   void __iomem *base;
+   unsigned int hz;
+   unsigned int mode;
+};
+
+static void ls7a_spi_write_reg(struct ls7a_spi *spi,
+  unsigned char reg,
+  unsigned char data)
+{
+   writeb(data, spi->base + reg);
+}
+
+static char ls7a_spi_read_reg(struct ls7a_spi *spi, unsigned char reg)
+{
+   return readb(spi->base + reg);
+}
+
+static int ls7a_spi_prepare_message(struct spi_master *master,
+   struct spi_message *msg)
+{
+   struct ls7a_spi *ls7a_spi;
+   struct spi_device *spi = msg->spi;
+   unsigned char val;
+
+   ls7a_spi = spi_master_get_devdata(master);
+
+   if (ls7a_spi->mode != spi->mode) {
+   val = ls7a_spi_read_reg(ls7a_spi, SPCR);
+   val &= ~0xc;
+   if (spi->mode & SPI_CPOL)
+   val |= 8;
+   if (spi->mode & SPI_CPHA)
+   val |= 4;
+   ls7a_spi_wr

[PATCH v4 4/4] MIPS: Loongson: Enable Loongson LS7A SPI in loongson3_defconfig

[Qing Zhang]

This is now supported, enable for Loongson systems.

Signed-off-by: Qing Zhang 
---

v2:
 - Modify CONFIG_SPI_LOONGSON to CONFIG_SPI_LS7A

v3:
 - No changes

v4:
 - No changes

---
 arch/mips/configs/loongson3_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/configs/loongson3_defconfig 
b/arch/mips/configs/loongson3_defconfig
index 38a817e..28784cb 100644
--- a/arch/mips/configs/loongson3_defconfig
+++ b/arch/mips/configs/loongson3_defconfig
@@ -271,6 +271,9 @@ CONFIG_HW_RANDOM=y
 CONFIG_RAW_DRIVER=m
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_PIIX4=y
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_LS7A=y
 CONFIG_GPIO_LOONGSON=y
 CONFIG_SENSORS_LM75=m
 CONFIG_SENSORS_LM93=m
-- 
2.1.0

[PATCH v4 3/4] MIPS: Loongson64: DTS: Add SPI support to LS7A

[Qing Zhang]

add spi support.

Signed-off-by: Qing Zhang 
---

v2:
- Add spi about pci device DT

v3:
- Remove spiflash node

v4:
- Remove useless compatible

---
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi 
b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index f99a7a1..f4919c3 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -405,6 +405,16 @@
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &pic 39 
IRQ_TYPE_LEVEL_HIGH>;
};
+
+   spi@16,0 {
+   compatible = "pci0014,7a0b.0",
+   "pci0014,7a0b",
+   "pciclass088000",
+   "pciclass0880";
+
+   reg = <0xb000 0x0 0x0 0x0 0x0>;
+   num-chipselects = <0>;
+   };
};
 
isa {
-- 
2.1.0

[PATCH v4 2/4] spi: ls7a: Add YAML schemas

[Qing Zhang]

Switch the DT binding to a YAML schema to enable the DT validation.

Signed-off-by: Qing Zhang 
---

v4: fix warnings/errors about running 'make dt_binding_check'

---
 .../devicetree/bindings/spi/loongson,spi-ls7a.yaml | 46 ++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml

diff --git a/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml 
b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
new file mode 100644
index 000..8cc9bc5
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/loongson,spi-ls7a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson LS7A PCH SPI Controller
+
+maintainers:
+  - Qing Zhang 
+
+description: |
+  This controller can be found in Loongson-3 systems with LS7A PCH.
+
+properties:
+  compatible:
+const: loongson,ls7a-spi
+
+  reg:
+maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - num-chipselects
+
+additionalProperties: false
+
+examples:
+  - |
+pci {
+#address-cells = <3>;
+#size-cells = <2>;
+
+spi@16,0 {
+compatible = "pci0014,7a0b.0",
+"pci0014,7a0b",
+"pciclass088000",
+"pciclass0800";
+
+reg = <0xb000 0x0 0x0 0x0 0x0>;
+num-chipselects = <0>;
+};
+};
+
+...
-- 
2.1.0

arch/powerpc/mm/book3s64/pgtable.c:174:15: error: no previous prototype for function 'create_section_mapping'

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   71c5f03154ac1cb27423b984743ccc2f5d11d14d
commit: a927bd6ba952d13c52b8b385030943032f659a3e mm: fix phys_to_target_node() 
and memory_add_physaddr_to_nid() exports
date:   5 weeks ago
config: powerpc64-randconfig-r001-20201224 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc64 cross compiling tool for clang build
# apt-get install binutils-powerpc64-linux-gnu
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a927bd6ba952d13c52b8b385030943032f659a3e
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout a927bd6ba952d13c52b8b385030943032f659a3e
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross 
ARCH=powerpc64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> arch/powerpc/mm/book3s64/pgtable.c:174:15: error: no previous prototype for 
>> function 'create_section_mapping' [-Werror,-Wmissing-prototypes]
   int __meminit create_section_mapping(unsigned long start, unsigned long end,
 ^
   arch/powerpc/mm/book3s64/pgtable.c:174:1: note: declare 'static' if the 
function is not intended to be used outside of this translation unit
   int __meminit create_section_mapping(unsigned long start, unsigned long end,
   ^
   static 
   arch/powerpc/mm/book3s64/pgtable.c:461:5: error: no previous prototype for 
function 'pmd_move_must_withdraw' [-Werror,-Wmissing-prototypes]
   int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
   ^
   arch/powerpc/mm/book3s64/pgtable.c:461:1: note: declare 'static' if the 
function is not intended to be used outside of this translation unit
   int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
   ^
   static 
   2 errors generated.


vim +/create_section_mapping +174 arch/powerpc/mm/book3s64/pgtable.c

32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
172  
32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
173  #ifdef CONFIG_MEMORY_HOTPLUG
4e00c5affdd4b04 arch/powerpc/mm/book3s64/pgtable.c Logan Gunthorpe 2020-04-10 
@174  int __meminit create_section_mapping(unsigned long start, unsigned long 
end,
4e00c5affdd4b04 arch/powerpc/mm/book3s64/pgtable.c Logan Gunthorpe 2020-04-10  
175   int nid, pgprot_t prot)
32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
176  {
32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
177  if (radix_enabled())
4e00c5affdd4b04 arch/powerpc/mm/book3s64/pgtable.c Logan Gunthorpe 2020-04-10  
178  return radix__create_section_mapping(start, end, nid, prot);
32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
179  
4e00c5affdd4b04 arch/powerpc/mm/book3s64/pgtable.c Logan Gunthorpe 2020-04-10  
180  return hash__create_section_mapping(start, end, nid, prot);
32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
181  }
32b53c012e0bfe2 arch/powerpc/mm/pgtable-book3s64.c Reza Arbab  2017-01-03  
182  

:: The code at line 174 was first introduced by commit
:: 4e00c5affdd4b04e6392001716333971932f3d0c powerpc/mm: thread pgprot_t 
through create_section_mapping()

:: TO: Logan Gunthorpe 
:: CC: Linus Torvalds 

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

Re: [PATCH v1 11/19] x86/sev-es: Convert to insn_decode()

[kernel test robot]

Hi Borislav,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.10 next-20201223]
[cannot apply to tip/perf/core tip/x86/core luto/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Borislav-Petkov/x86-insn-Add-an-insn_decode-API/20201224-014846
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
614cb5894306cfa2c7d9b6168182876ff5948735
config: x86_64-randconfig-a016-20201223 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/9cc93591504c88c42ab10903fc69062fc1461ed0
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Borislav-Petkov/x86-insn-Add-an-insn_decode-API/20201224-014846
git checkout 9cc93591504c88c42ab10903fc69062fc1461ed0
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> arch/x86/kernel/sev-es.c:258:7: warning: variable 'ret' is used 
>> uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
   if (!insn_decode_regs(&ctxt->insn, ctxt->regs, buffer, res))
   ^~~
   arch/x86/kernel/sev-es.c:272:6: note: uninitialized use occurs here
   if (ret < 0)
   ^~~
   arch/x86/kernel/sev-es.c:258:3: note: remove the 'if' if its condition is 
always true
   if (!insn_decode_regs(&ctxt->insn, ctxt->regs, buffer, res))
   ^~~~
   arch/x86/kernel/sev-es.c:247:14: note: initialize the variable 'ret' to 
silence this warning
   int res, ret;
   ^
= 0
   1 warning generated.


vim +258 arch/x86/kernel/sev-es.c

f980f9c31a923e9 Joerg Roedel2020-09-07  243  
f980f9c31a923e9 Joerg Roedel2020-09-07  244  static enum es_result 
vc_decode_insn(struct es_em_ctxt *ctxt)
f980f9c31a923e9 Joerg Roedel2020-09-07  245  {
f980f9c31a923e9 Joerg Roedel2020-09-07  246 char 
buffer[MAX_INSN_SIZE];
9cc93591504c88c Borislav Petkov 2020-12-23  247 int res, ret;
f980f9c31a923e9 Joerg Roedel2020-09-07  248  
5e3427a7bc432ed Joerg Roedel2020-09-07  249 if 
(user_mode(ctxt->regs)) {
5e3427a7bc432ed Joerg Roedel2020-09-07  250 res = 
insn_fetch_from_user(ctxt->regs, buffer);
5e3427a7bc432ed Joerg Roedel2020-09-07  251 if (!res) {
5e3427a7bc432ed Joerg Roedel2020-09-07  252 
ctxt->fi.vector = X86_TRAP_PF;
5e3427a7bc432ed Joerg Roedel2020-09-07  253 
ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
5e3427a7bc432ed Joerg Roedel2020-09-07  254 
ctxt->fi.cr2= ctxt->regs->ip;
5e3427a7bc432ed Joerg Roedel2020-09-07  255 return 
ES_EXCEPTION;
5e3427a7bc432ed Joerg Roedel2020-09-07  256 }
5e3427a7bc432ed Joerg Roedel2020-09-07  257  
63d702bf108e3ad Borislav Petkov 2020-12-23 @258 if 
(!insn_decode_regs(&ctxt->insn, ctxt->regs, buffer, res))
5e3427a7bc432ed Joerg Roedel2020-09-07  259 return 
ES_DECODE_FAILED;
5e3427a7bc432ed Joerg Roedel2020-09-07  260 } else {
f980f9c31a923e9 Joerg Roedel2020-09-07  261 res = 
vc_fetch_insn_kernel(ctxt, buffer);
5e3427a7bc432ed Joerg Roedel2020-09-07  262 if (res) {
f980f9c31a923e9 Joerg Roedel2020-09-07  263 
ctxt->fi.vector = X86_TRAP_PF;
5e3427a7bc432ed Joerg Roedel2020-09-07  264 
ctxt->fi.error_code = X86_PF_INSTR;
f980f9c31a923e9 Joerg Roedel2020-09-07  265 
ctxt->fi.cr2= ctxt->regs->ip;
f980f9c31a923e9 Joerg Roedel2020-09-07  266 return 
ES_EXCEPTION;
f980f9c31a923e9 Joerg Roedel2020-09-07  267 }
f980f9c31a923e9 Joerg Roedel2020-09-07  268  
9cc93591504c88c Borislav Petkov 2020-12-23  269 ret = 
insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE - res, INSN_MODE_64);
5e3427a

[rcu:dev.2020.12.23a 133/149] kernel/time/clocksource.c:220:6: warning: no previous prototype for function 'clocksource_verify_one_cpu'

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git 
dev.2020.12.23a
head:   7cc07f4867eb9618d4f7c35ddfbd746131b52f51
commit: 6a70298420b2bd6d3e3dc86d81b993f618df8569 [133/149] clocksource: Check 
per-CPU clock synchronization when marked unstable
config: x86_64-randconfig-r013-20201223 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git/commit/?id=6a70298420b2bd6d3e3dc86d81b993f618df8569
git remote add rcu 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
git fetch --no-tags rcu dev.2020.12.23a
git checkout 6a70298420b2bd6d3e3dc86d81b993f618df8569
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> kernel/time/clocksource.c:220:6: warning: no previous prototype for function 
>> 'clocksource_verify_one_cpu' [-Wmissing-prototypes]
   void clocksource_verify_one_cpu(void *csin)
^
   kernel/time/clocksource.c:220:1: note: declare 'static' if the function is 
not intended to be used outside of this translation unit
   void clocksource_verify_one_cpu(void *csin)
   ^
   static 
   1 warning generated.


vim +/clocksource_verify_one_cpu +220 kernel/time/clocksource.c

   219  
 > 220  void clocksource_verify_one_cpu(void *csin)
   221  {
   222  struct clocksource *cs = (struct clocksource *)csin;
   223  
   224  __this_cpu_write(csnow_mid, cs->read(cs));
   225  }
   226  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH v1 0/2] Add MIPI rx DPI support

[Xin Ji]

Hi all, this patch series implement MIPI rx DPI feature. Please help to review.

This is the v1 version, any mistakes, please let me know,
I'll fix it in the next series.

Change history:
v1: initial MIPI rx DPI feature support

Xin Ji (2):
  dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting
  drm/bridge: anx7625: add MIPI DPI input feature support

 .../bindings/display/bridge/analogix,anx7625.yaml  |  19 ++
 drivers/gpu/drm/bridge/analogix/anx7625.c  | 352 +++--
 drivers/gpu/drm/bridge/analogix/anx7625.h  |  24 +-
 3 files changed, 375 insertions(+), 20 deletions(-)

-- 
2.7.4

[PATCH v1 2/2] drm/bridge: anx7625: add MIPI DPI input feature support

[Xin Ji]

Add MIPI rx DPI input support

Signed-off-by: Xin Ji 
---
 drivers/gpu/drm/bridge/analogix/anx7625.c | 352 --
 drivers/gpu/drm/bridge/analogix/anx7625.h |  24 +-
 2 files changed, 356 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c 
b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 65cc059..0bb2adc 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -164,6 +164,20 @@ static int anx7625_write_and_or(struct anx7625_data *ctx,
 offset, (val & and_mask) | (or_mask));
 }
 
+static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
+{
+   int i, ret;
+
+   ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
+   AUDIO_CONTROL_REGISTER, 0x80);
+   for (i = 0; i < 13; i++)
+   ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
+VIDEO_BIT_MATRIX_12 + i,
+0x18 + i);
+
+   return ret;
+}
+
 static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
 {
return anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, AP_AUX_CTRL_STATUS);
@@ -189,10 +203,64 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
   AP_AUX_CTRL_STATUS);
if (val < 0 || (val & 0x0F)) {
DRM_DEV_ERROR(dev, "aux status %02x\n", val);
-   val = -EIO;
+   return -EIO;
+   }
+
+   return 0;
+}
+
+static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
+u8 addrh, u8 addrm, u8 addrl,
+u8 len, u8 *buf)
+{
+   struct device *dev = &ctx->client->dev;
+   int ret;
+   u8 cmd;
+
+   if (len > MAX_DPCD_BUFFER_SIZE) {
+   DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
+   return -E2BIG;
+   }
+
+   cmd = ((len - 1) << 4) | 0x09;
+
+   /* Set command and length */
+   ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+   AP_AUX_COMMAND, cmd);
+
+   /* Set aux access address */
+   ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+AP_AUX_ADDR_7_0, addrl);
+   ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+AP_AUX_ADDR_15_8, addrm);
+   ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
+AP_AUX_ADDR_19_16, addrh);
+
+   /* Enable aux access */
+   ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
+   AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
+
+   if (ret < 0) {
+   DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
+   return -EIO;
+   }
+
+   usleep_range(2000, 2100);
+
+   ret = wait_aux_op_finish(ctx);
+   if (ret) {
+   DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
+   return ret;
+   }
+
+   ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
+AP_AUX_BUFF_START, len, buf);
+   if (ret < 0) {
+   DRM_DEV_ERROR(dev, "read dpcd register failed\n");
+   return -EIO;
}
 
-   return val;
+   return 0;
 }
 
 static int anx7625_video_mute_control(struct anx7625_data *ctx,
@@ -595,6 +663,101 @@ static int anx7625_dsi_config(struct anx7625_data *ctx)
return ret;
 }
 
+static int anx7625_api_dpi_config(struct anx7625_data *ctx)
+{
+   struct device *dev = &ctx->client->dev;
+   u16 freq = ctx->dt.pixelclock.min / 1000;
+   int ret;
+
+   /* configure pixel clock */
+   ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+   PIXEL_CLOCK_L, freq & 0xFF);
+   ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
+PIXEL_CLOCK_H, (freq >> 8));
+
+   /* set DPI mode */
+   /* set to DPI PLL module sel */
+   ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+MIPI_DIGITAL_PLL_9, 0x20);
+   /* power down MIPI */
+   ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+MIPI_LANE_CTRL_10, 0x08);
+   /* enable DPI mode */
+   ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
+MIPI_DIGITAL_PLL_18, 0x1C);
+   /* set first edge */
+   ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
+VIDEO_CONTROL_0, 0x06);
+   if (ret < 0)
+   DRM_DEV_ERROR(dev, "IO error : dpi phy set failed.\n");
+
+   return ret;
+}
+
+static int anx7625_dpi_config(struct anx7625_data *ctx)
+{
+   struct device *dev = &ctx->client->dev;
+   int ret;
+
+   DRM_DEV_DEBUG_DRIVER(dev, "config dpi\n");
+
+   /* DSC disable */
+   ret = anx7625_wr

[PATCH v1 1/2] dt-bindings: drm/bridge: anx7625: add DPI flag and swing setting

[Xin Ji]

Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
swing setting for adjusting DP tx PHY swing

Signed-off-by: Xin Ji 
---
 .../bindings/display/bridge/analogix,anx7625.yaml | 19 +++
 1 file changed, 19 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml 
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index 60585a4..34a7faf 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -34,6 +34,14 @@ properties:
 description: used for reset chip control, RESET_N pin B7.
 maxItems: 1
 
+  anx,swing-setting:
+$ref: /schemas/types.yaml#/definitions/uint32-array
+description: an array of swing register setting for DP tx PHY
+
+  anx,mipi-dpi-in:
+$ref: /schemas/types.yaml#/definitions/uint32
+description: indicate the MIPI rx signal type is DPI or DSI
+
   ports:
 type: object
 
@@ -72,6 +80,17 @@ examples:
 reg = <0x58>;
 enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
 reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
+anx,swing-setting = <0x00 0x14>, <0x01 0x54>,
+<0x02 0x64>, <0x03 0x74>, <0x04 0x29>,
+<0x05 0x7b>, <0x06 0x77>, <0x07 0x5b>,
+<0x08 0x7f>, <0x0c 0x20>, <0x0d 0x60>,
+<0x10 0x60>, <0x12 0x40>, <0x13 0x60>,
+<0x14 0x14>, <0x15 0x54>, <0x16 0x64>,
+<0x17 0x74>, <0x18 0x29>, <0x19 0x7b>,
+<0x1a 0x77>, <0x1b 0x5b>, <0x1c 0x7f>,
+<0x20 0x20>, <0x21 0x60>, <0x24 0x60>,
+<0x26 0x40>, <0x27 0x60>;
+anx,mipi-dpi-in = <0>;
 
 ports {
 #address-cells = <1>;
-- 
2.7.4

[PATCH 2/2] drivers/gpu/drm/ast: Fix infinite loop if read fails

[Defang Bo]

[Why] Similar to commit <298360af3> ast_init_dram_reg() configures a window in 
order to access BMC memory.
A BMC register can be configured to disallow this, and if so, causes
an infinite loop in the ast driver which renders the system unusable.
[How]
Fix this by erroring out if an error is detected.

Signed-off-by: Defang Bo 
---
 drivers/gpu/drm/ast/ast_post.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
index ef19c70..86e4d23 100644
--- a/drivers/gpu/drm/ast/ast_post.c
+++ b/drivers/gpu/drm/ast/ast_post.c
@@ -302,13 +302,13 @@ static void ast_init_dram_reg(struct drm_device *dev)
ast_write32(ast, 0x12000, 0x1688A8A8);
do {
if (pci_channel_offline(dev->pdev))
-return -EIO;
+   return -EIO;
} while (ast_read32(ast, 0x12000) != 0x01);
 
ast_write32(ast, 0x1, 0xfc600309);
do {
if (pci_channel_offline(dev->pdev))
-return -EIO;
+   return -EIO;
} while (ast_read32(ast, 0x1) != 0x01);
}
 
-- 
2.7.4

[PATCH] genirq: Fix export of irq_to_desc() for powerpc KVM

[Michael Ellerman]

Commit 64a1b95bb9fe ("genirq: Restrict export of irq_to_desc()")
removed the export of irq_to_desc() unless powerpc KVM is being built,
because there is still a use of irq_to_desc() in modular code there.

However it used:

  #ifdef CONFIG_KVM_BOOK3S_64_HV

Which doesn't work when that symbol is =m, leading to a build failure:

  ERROR: modpost: "irq_to_desc" [arch/powerpc/kvm/kvm-hv.ko] undefined!

Fix it by checking for the definedness of the correct symbol which is
CONFIG_KVM_BOOK3S_64_HV_MODULE.

Fixes: 64a1b95bb9fe ("genirq: Restrict export of irq_to_desc()")
Signed-off-by: Michael Ellerman 
---
 kernel/irq/irqdesc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 3d0bc38a0bcf..cc1a09406c6e 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -352,7 +352,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
 {
return radix_tree_lookup(&irq_desc_tree, irq);
 }
-#ifdef CONFIG_KVM_BOOK3S_64_HV
+#ifdef CONFIG_KVM_BOOK3S_64_HV_MODULE
 EXPORT_SYMBOL_GPL(irq_to_desc);
 #endif
 
-- 
2.25.1

Re: [PATCH v4 4/7] power: supply: max8997_charger: Set CHARGER current limit

[Timon Baetz]

On Thu, 24 Dec 2020 15:00:38 +0100, Krzysztof Kozlowski wrote:
> On Thu, Dec 24, 2020 at 02:37:06PM +0100, Krzysztof Kozlowski wrote:
> > On Thu, Dec 24, 2020 at 01:13:02PM +, Timon Baetz wrote:  
> > > On Thu, 24 Dec 2020 10:55:59 +0100, Krzysztof Kozlowski wrote:  
> > > > > @@ -170,6 +237,28 @@ static int max8997_battery_probe(struct 
> > > > > platform_device *pdev)
> > > > >   return PTR_ERR(charger->battery);
> > > > >   }
> > > > >
> > > > > + charger->reg = devm_regulator_get(&pdev->dev, "charger");  
> > > >
> > > > Since you do not use get_optional, you will always get a dummy
> > > > regulator. In case of error, you should either print it or entirely fail
> > > > the probe. Silently continuing makes it difficult to spot errors.
> > > >
> > > > Since the driver could operate in case of extcon/regulator error, just
> > > > dev_err() so failure will be spotted with dmesg.  
> > >
> > > I will switch to devm_regulator_get_optional() and print an error on
> > > failure, thanks.
> > >  
> > > > It will complain on older DTBs because you are introducing incompatible
> > > > change, but that's expected. Just correct all other in-tree DTS.  
> > >
> > > The other 2 in-tree DTS don't have CHARGER regulators. Not sure
> > > how to correct those. Should I add muic and charger nodes without a
> > > charger-supply? It will still complain in that case.  
> >
> > +Cc Marek,
> >
> > This is why leaving the code as is - devm_regulator_get(), not optional
> > - makes sense. Core would provide dummy regulator, so you only have to
> > provide MUIC node.
> >
> > If you change the code to devm_regulator_get_optional(), you need to add
> > everything: the charger regulator, the charger node and MUIC node.
> >
> > For Trats, the configuration should be similar as i9100, although I
> > don't know the exact values of chargign voltage.
> >
> > For Origen, there is no battery, so the power supply should not bind.
> > Maybe this could be achieved with "status disabled" for charger node? It
> > depends whether MFD will respect such field... If it disables the
> > charger, you're done.  
> 
> I just looked at the MFD code and tested it - it nicely skips disabled
> devices. Therefore, for Origen I propose to add disabled nodes for
> charger and MUIC because these pins are not connected. No need to add
> regulators in such case.

With a dummy regulator regulator_set_current_limit() fails with -EINVAL.
Isn't it better to just skip charging control (and dev_info()) when there 
is no extcon or regulator? The charger driver would still probe
without those 2 properties and work as before.

Adding disabled nodes for Origen would probably still makes sense.

I also noticed that adding nodes for those MFD cells prints "DMA mask
not set" which seems to be related to https://lkml.org/lkml/2020/4/23/873.
Any suggestions on how to handle that?

Thanks,
Timon

Re: [PATCH 1/2] mm: Allow architectures to request 'old' entries when prefaulting

[Kirill A. Shutemov]

On Wed, Dec 23, 2020 at 08:04:54PM -0800, Hugh Dickins wrote:
> It's not ready yet.

Thanks for the feedback. It's very helpful.

The patch below should address the problems you've found.

The new helper next_page() returns a stablized page, so filemap_map_pmd()
can clearly decide if we should set up a page table or a huge page.

The leak is fixed too.

Could you give it a try?


>From 0a6a3a1c920d04f55bcb202b585c85a4494b2ae0 Mon Sep 17 00:00:00 2001
From: "Kirill A. Shutemov" 
Date: Sat, 19 Dec 2020 15:19:23 +0300
Subject: [PATCH] mm: Cleanup faultaround and finish_fault() codepaths

alloc_set_pte() has two users with different requirements: in the
faultaround code, it called from an atomic context and PTE page table
has to be preallocated. finish_fault() can sleep and allocate page table
as needed.

PTL locking rules are also strange, hard to follow and overkill for
finish_fault().

Let's untangle the mess. alloc_set_pte() has gone now. All locking is
explicit.

The price is some code duplication to handle huge pages in faultaround
path, but it should be fine, having overall improvement in readability.

Signed-off-by: Kirill A. Shutemov 
---
 include/linux/mm.h  |   8 +-
 include/linux/pgtable.h |  11 +++
 mm/filemap.c| 147 ++--
 mm/memory.c | 162 
 4 files changed, 171 insertions(+), 157 deletions(-)

diff --git a/include/linux/mm.h b/include/linux/mm.h
index db6ae4d3fb4e..2825153ad0d6 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -534,8 +534,8 @@ struct vm_fault {
 * is not NULL, otherwise pmd.
 */
pgtable_t prealloc_pte; /* Pre-allocated pte page table.
-* vm_ops->map_pages() calls
-* alloc_set_pte() from atomic context.
+* vm_ops->map_pages() sets up a page
+* table from from atomic context.
 * do_fault_around() pre-allocates
 * page table to avoid allocation from
 * atomic context.
@@ -972,7 +972,9 @@ static inline pte_t maybe_mkwrite(pte_t pte, struct 
vm_area_struct *vma)
return pte;
 }
 
-vm_fault_t alloc_set_pte(struct vm_fault *vmf, struct page *page);
+vm_fault_t do_set_pmd(struct vm_fault *vmf, struct page *page);
+void do_set_pte(struct vm_fault *vmf, struct page *page);
+
 vm_fault_t finish_fault(struct vm_fault *vmf);
 vm_fault_t finish_mkwrite_fault(struct vm_fault *vmf);
 #endif
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index e237004d498d..869c1921ceda 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -1259,6 +1259,17 @@ static inline int pmd_trans_unstable(pmd_t *pmd)
 #endif
 }
 
+/*
+ * the ordering of these checks is important for pmds with _page_devmap set.
+ * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
+ * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
+ * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
+ */
+static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
+{
+   return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
+}
+
 #ifndef CONFIG_NUMA_BALANCING
 /*
  * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
diff --git a/mm/filemap.c b/mm/filemap.c
index 0b2067b3c328..069b15778b4a 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "internal.h"
 
 #define CREATE_TRACE_POINTS
@@ -2831,50 +2832,117 @@ vm_fault_t filemap_fault(struct vm_fault *vmf)
 }
 EXPORT_SYMBOL(filemap_fault);
 
+static bool filemap_map_pmd(struct vm_fault *vmf, struct page *page)
+{
+   struct mm_struct *mm = vmf->vma->vm_mm;
+
+   /* Huge page is mapped? No need to proceed. */
+   if (pmd_trans_huge(*vmf->pmd))
+   return true;
+
+   if (pmd_none(*vmf->pmd) &&
+   PageTransHuge(page) &&
+   do_set_pmd(vmf, page)) {
+   unlock_page(page);
+   return true;
+   }
+
+   if (pmd_none(*vmf->pmd)) {
+   vmf->ptl = pmd_lock(mm, vmf->pmd);
+   if (likely(pmd_none(*vmf->pmd))) {
+   mm_inc_nr_ptes(mm);
+   pmd_populate(mm, vmf->pmd, vmf->prealloc_pte);
+   vmf->prealloc_pte = NULL;
+   }
+   spin_unlock(vmf->ptl);
+   }
+
+   /* See comment in handle_pte_fault() */
+   if (pmd_devmap_trans_unstable(vmf->pmd)) {
+   unlock_page(page);
+   put_page(page);
+   return true;
+   }
+
+   return false;
+}
+
+static struct page *next_page(struct page *page, struct vm_fault *vmf,
+ 

Re: [RFC PATCH] usb: dwc2: Try usb_get_phy_by_phandle instead of usb_get_phy

[Artur Petrosyan]

Hi Jules,

On 12/16/2020 20:59, Jules Maselbas wrote:
> On probe the dwc2 driver tries two path to get an usb phy, first calling
> devm_phy_get() and secondly with devm_usb_get_phy().
> 
> However the current implementation of devm_phy_get() never return a valid
> phy for usb-nop-xceiv. And the current implementation of devm_usb_get_phy
> only check for phy that's has already been registered.
> 
> During boot, I see the dwc2 driver being probed before the usb-nop-xceiv
> probe, this means that during the dwc2 probe the function devm_usb_get_phy
> never finds the a phy (because it hasn't been registered yet) but never
> cause the dwc2 probe to defer.
> 
> I tried to follow what is done by dwc3_core_get_phy(): if the current
> device has an of_node then try to get the usb_phy by phandle instead of
> using devm_usb_get_phy(). This way when the probe order is not good the
> devm_usb_get_phy_by_phandle() function will return -EPROBE_DEFER.
> 
> Signed-off-by: Jules Maselbas 
> --- 8< ---
> 
> A snippet of the device-tree source I am using:
>  &usb0 {
>  phys = <&usb_phy0>;
>  phy-names = "usb2-phy";
>  };
>  &usb_phy0 {
>  #phy-cells = <0>;
>  compatible = "usb-nop-xceiv";
>  reset-gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
>  };
> ---
>   drivers/usb/dwc2/platform.c | 7 ++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index db9fd4bd1a38..b58ce996add7 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -251,7 +251,12 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg 
> *hsotg)
>   }
>   
>   if (!hsotg->phy) {
> - hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
> + if (hsotg->dev->of_node)
> + i = of_property_match_string(hsotg->dev->of_node, 
> "phy-names", "usb2-phy");

According the device tree you have provided the value of "i" will always 
be "0".

> + if (hsotg->dev->of_node && i >= 0)
> + hsotg->uphy = devm_usb_get_phy_by_phandle(hsotg->dev, 
> "phys", i);

Why do you use the value of "i" while in "<&usb_phy0>" you have only one 
phy. If you had several phy-names and the value of "i" gets more than 0, 
then based on your usb_phy0 "devm_usb_get_phy_by_phandle" function will 
return error. So, maybe it would be more correct (based on your device 
tree), to use below command
hsotg->uphy = devm_usb_get_phy_by_phandle(hsotg->dev, "phys", 0);

> + else
> + hsotg->uphy = devm_usb_get_phy(hsotg->dev, 
> USB_PHY_TYPE_USB2);
>   if (IS_ERR(hsotg->uphy)) {
>   ret = PTR_ERR(hsotg->uphy);
>   switch (ret) {
> 

Regards,
Artur

[PATCH 1/1] ARM: LPAE: use phys_addr_t instead of unsigned long in outercache hooks

[Zhen Lei]

The outercache of some Hisilicon SOCs support physical addresses wider
than 32-bits. The unsigned long datatype is not sufficient for mapping
physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE:
use phys_addr_t instead of unsigned long in outercache functions") has
already modified the outercache functions. But the parameters of the
outercache hooks are not changed. This patch use phys_addr_t instead of
unsigned long in outercache hooks: inv_range, clean_range, flush_range.

To ensure the outercache that does not support LPAE works properly, do
cast phys_addr_t to unsigned long by adding a middle-tier function.
For example:
-static void l2c220_inv_range(unsigned long start, unsigned long end)
+static void __l2c220_inv_range(unsigned long start, unsigned long end)
 {
...
 }
+static void l2c220_inv_range(phys_addr_t start, phys_addr_t end)
+{
+  __l2c220_inv_range(start, end);
+}

Note that the outercache functions have been doing this cast before this
patch. So now, the cast is just moved to the middle-tier function.

No functional change.

Signed-off-by: Zhen Lei 
---
 arch/arm/include/asm/outercache.h |  6 +--
 arch/arm/mm/cache-feroceon-l2.c   | 21 --
 arch/arm/mm/cache-l2x0.c  | 83 ---
 arch/arm/mm/cache-tauros2.c   | 21 --
 arch/arm/mm/cache-uniphier.c  |  6 +--
 arch/arm/mm/cache-xsc3l2.c| 21 --
 6 files changed, 129 insertions(+), 29 deletions(-)

diff --git a/arch/arm/include/asm/outercache.h 
b/arch/arm/include/asm/outercache.h
index 3364637755e86aa..4cee1ea0c15449a 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -14,9 +14,9 @@
 struct l2x0_regs;
 
 struct outer_cache_fns {
-   void (*inv_range)(unsigned long, unsigned long);
-   void (*clean_range)(unsigned long, unsigned long);
-   void (*flush_range)(unsigned long, unsigned long);
+   void (*inv_range)(phys_addr_t, phys_addr_t);
+   void (*clean_range)(phys_addr_t, phys_addr_t);
+   void (*flush_range)(phys_addr_t, phys_addr_t);
void (*flush_all)(void);
void (*disable)(void);
 #ifdef CONFIG_OUTER_CACHE_SYNC
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 5c1b7a7b9af6300..ab1d8051bf832c9 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -168,7 +168,7 @@ static unsigned long calc_range_end(unsigned long start, 
unsigned long end)
return range_end;
 }
 
-static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
+static void __feroceon_l2_inv_range(unsigned long start, unsigned long end)
 {
/*
 * Clean and invalidate partial first cache line.
@@ -198,7 +198,12 @@ static void feroceon_l2_inv_range(unsigned long start, 
unsigned long end)
dsb();
 }
 
-static void feroceon_l2_clean_range(unsigned long start, unsigned long end)
+static void feroceon_l2_inv_range(phys_addr_t start, phys_addr_t end)
+{
+   __feroceon_l2_inv_range(start, end);
+}
+
+static void __feroceon_l2_clean_range(unsigned long start, unsigned long end)
 {
/*
 * If L2 is forced to WT, the L2 will always be clean and we
@@ -217,7 +222,12 @@ static void feroceon_l2_clean_range(unsigned long start, 
unsigned long end)
dsb();
 }
 
-static void feroceon_l2_flush_range(unsigned long start, unsigned long end)
+static void feroceon_l2_clean_range(phys_addr_t start, phys_addr_t end)
+{
+   __feroceon_l2_clean_range(start, end);
+}
+
+static void __feroceon_l2_flush_range(unsigned long start, unsigned long end)
 {
start &= ~(CACHE_LINE_SIZE - 1);
end = (end + CACHE_LINE_SIZE - 1) & ~(CACHE_LINE_SIZE - 1);
@@ -232,6 +242,11 @@ static void feroceon_l2_flush_range(unsigned long start, 
unsigned long end)
dsb();
 }
 
+static void feroceon_l2_flush_range(phys_addr_t start, phys_addr_t end)
+{
+   __feroceon_l2_flush_range(start, end);
+}
+
 
 /*
  * Routines to disable and re-enable the D-cache and I-cache at run
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 43d91bfd2360086..644d857dcbd6bf0 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -184,7 +184,7 @@ static void __l2c210_op_pa_range(void __iomem *reg, 
unsigned long start,
}
 }
 
-static void l2c210_inv_range(unsigned long start, unsigned long end)
+static void __l2c210_inv_range(unsigned long start, unsigned long end)
 {
void __iomem *base = l2x0_base;
 
@@ -203,7 +203,12 @@ static void l2c210_inv_range(unsigned long start, unsigned 
long end)
__l2c210_cache_sync(base);
 }
 
-static void l2c210_clean_range(unsigned long start, unsigned long end)
+static void l2c210_inv_range(phys_addr_t start, phys_addr_t end)
+{
+   __l2c210_inv_range(start, end);
+}
+
+static void __l2c210_clean_range(unsigned long start, unsigned long end)
 {
void __iomem *base = l2x0_base;
 
@@ -212,7 +217,12 @@ static voi

Re: [PATCH v5 0/4] powercap/dtpm: Add the DTPM framework

[Daniel Lezcano]

On 24/12/2020 19:46, Pavel Machek wrote:
> Hi!
> 
>> The density of components greatly increased the last decade bringing a
>> numerous number of heating sources which are monitored by more than 20
>> sensors on recent SoC. The skin temperature, which is the case
>> temperature of the device, must stay below approximately 45°C in order
>> to comply with the legal requirements.
> 
> What kind of device is that?

Any complex embedded devices like a phone, a laptop or a tablet with
components like NPU, CPU, GPU, GPS, DSPs, Camera, ...

> Does that mean that running fsck is now "illegal" because temperature
> will not be managed during that time?

The heating effect of the different devices will be conducted through a
common dissipation device.

The 'skin' temperature or 'case' temperature has a dedicated sensor in
the path of this dissipation device. So the temperature will increase
slower at this sensor level because of a higher thermal capacity.

The 'skin' temperature will be the result of the different components
running at the same time (eg. GPS + CPU + GPU + DSPs).

In the case of fsck, the system is in degraded mode, thus the
application using these components are not supposed to run and the
'skin' temperature should stay below.

If you are interested, here you can find some background to explain the
'skin' temperature [1] and the spreading of the heat [2].

Hope that helps

  -- Daniel

[1] https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4188373/

[2]
https://nanoheat.stanford.edu/sites/default/files/publications/Electronics%20Cooling%20Article.pdf


-- 
 Linaro.org │ Open source software for ARM SoCs

Follow Linaro:   Facebook |
 Twitter |
 Blog

Re: [PATCH v4 2/4] spi: ls7a: Add YAML schemas

[Sergei Shtylyov]

On 12/25/20 1:35 PM, Qing Zhang wrote:

> Switch the DT binding to a YAML schema to enable the DT validation.
> 
> Signed-off-by: Qing Zhang 
> ---
> 
> v4: fix warnings/errors about running 'make dt_binding_check'
> 
> ---
>  .../devicetree/bindings/spi/loongson,spi-ls7a.yaml | 46 
> ++
>  1 file changed, 46 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml 
> b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> new file mode 100644
> index 000..8cc9bc5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/loongson,spi-ls7a.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Loongson LS7A PCH SPI Controller
> +
> +maintainers:
> +  - Qing Zhang 
> +
> +description: |
> +  This controller can be found in Loongson-3 systems with LS7A PCH.
> +
> +properties:
> +  compatible:
> +const: loongson,ls7a-spi
> +
> +  reg:
> +maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - num-chipselects
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +pci {
> +#address-cells = <3>;
> +#size-cells = <2>;
> +
> +spi@16,0 {
> +compatible = "pci0014,7a0b.0",
> +"pci0014,7a0b",
> +"pciclass088000",
> +"pciclass0800";
> +
> +reg = <0xb000 0x0 0x0 0x0 0x0>;
> +num-chipselects = <0>;

The above lines after { need extra indentation level.

> +};
> +};
> +
> +...

MBR, Sergei

[PATCH] regmap: debugfs: fix a memory leak when calling regmap_attach_dev

[Xiaolei Wang]

This should be caused by
commit <9b947a13e7f6> ("")

After initializing the regmap through
syscon_regmap_lookup_by_compatible, then regmap_attach_dev to the
device, because the debugfs_name has been allocated, there is no need to
redistribute it again

unreferenced object 0xd8399b80 (size 64):
  comm "swapper/0", pid 1, jiffies 4294937641 (age 278.590s)
  hex dump (first 32 bytes):
64 75 6d 6d 79 2d 69 6f 6d 75 78 63 2d 67 70 72
dummy-iomuxc-gpr
40 32 30 65 34 30 30 30 00 7f 52 5b d8 7e 42 69
@20e4000..R[.~Bi
  backtrace:
[] kasprintf+0x2c/0x54
[<6ad3bbc2>] regmap_debugfs_init+0xdc/0x2fc
[] __regmap_init+0xc38/0xd88
[<1f7e0609>] of_syscon_register+0x168/0x294
[<735e8766>] device_node_get_regmap+0x6c/0x98
[] imx6ul_init_machine+0x20/0x88
[<0456565b>] customize_machine+0x1c/0x30
[] do_one_initcall+0x80/0x3ac
[<7e584867>] kernel_init_freeable+0x170/0x1f0
[<80074741>] kernel_init+0x8/0x120
[<285d6f28>] ret_from_fork+0x14/0x20
[<>] 0x0

Signed-off-by: Xiaolei Wang 
---
 drivers/base/regmap/regmap-debugfs.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/base/regmap/regmap-debugfs.c 
b/drivers/base/regmap/regmap-debugfs.c
index 8dfac7f3ed7a..271142981f98 100644
--- a/drivers/base/regmap/regmap-debugfs.c
+++ b/drivers/base/regmap/regmap-debugfs.c
@@ -582,8 +582,10 @@ void regmap_debugfs_init(struct regmap *map)
devname = dev_name(map->dev);
 
if (name) {
-   map->debugfs_name = kasprintf(GFP_KERNEL, "%s-%s",
+   if (!map->debugfs_name) {
+   map->debugfs_name = kasprintf(GFP_KERNEL, "%s-%s",
  devname, name);
+   }
name = map->debugfs_name;
} else {
name = devname;
-- 
2.25.1

Re: [PATCH v8 1/4] dt-bindings: display: Document the Xylon LogiCVC display controller

[Paul Kocialkowski]

Hi,

On Thu 24 Dec 20, 10:01, Rob Herring wrote:
> On Wed, 23 Dec 2020 22:29:44 +0100, Paul Kocialkowski wrote:
> > The Xylon LogiCVC is a display controller implemented as programmable
> > logic in Xilinx FPGAs.
> > 
> > Signed-off-by: Paul Kocialkowski 
> > Acked-by: Rob Herring 
> > ---
> >  .../display/xylon,logicvc-display.yaml| 313 ++
> >  1 file changed, 313 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml
> > 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/xylon,logicvc-display.example.dt.yaml:
>  logicvc@43c0: 'display@0' does not match any of the regexes: 
> '^gpio@[0-9a-f]+$', 'pinctrl-[0-9]+'
>   From schema: 
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml
> 
> See https://patchwork.ozlabs.org/patch/1420307

Just so you know, this specific issue is fixed in patch 2/4.

Cheers,

Paul

-- 
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com


signature.asc
Description: PGP signature

Re: [PATCH v1 11/19] x86/sev-es: Convert to insn_decode()

[Borislav Petkov]

On Fri, Dec 25, 2020 at 06:50:33PM +0800, kernel test robot wrote:
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 
> 
> All warnings (new ones prefixed by >>):
> 
> >> arch/x86/kernel/sev-es.c:258:7: warning: variable 'ret' is used 
> >> uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
>if (!insn_decode_regs(&ctxt->insn, ctxt->regs, buffer, 
> res))
>^~~

Yeah, good catch, thanks for reporting.

Frankly, the readability and "extensiblity" of that function can be
improved by splitting the two cases (diff ontop):

---
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index 564cc9fc693d..ea47037f1624 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -241,40 +241,53 @@ static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
return copy_from_kernel_nofault(buffer, (unsigned char 
*)ctxt->regs->ip, MAX_INSN_SIZE);
 }
 
-static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
+static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt)
 {
char buffer[MAX_INSN_SIZE];
-   int res, ret;
-
-   if (user_mode(ctxt->regs)) {
-   res = insn_fetch_from_user(ctxt->regs, buffer);
-   if (!res) {
-   ctxt->fi.vector = X86_TRAP_PF;
-   ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
-   ctxt->fi.cr2= ctxt->regs->ip;
-   return ES_EXCEPTION;
-   }
+   int res;
 
-   if (!insn_decode_regs(&ctxt->insn, ctxt->regs, buffer, res))
-   return ES_DECODE_FAILED;
-   } else {
-   res = vc_fetch_insn_kernel(ctxt, buffer);
-   if (res) {
-   ctxt->fi.vector = X86_TRAP_PF;
-   ctxt->fi.error_code = X86_PF_INSTR;
-   ctxt->fi.cr2= ctxt->regs->ip;
-   return ES_EXCEPTION;
-   }
+   res = insn_fetch_from_user(ctxt->regs, buffer);
+   if (!res) {
+   ctxt->fi.vector = X86_TRAP_PF;
+   ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
+   ctxt->fi.cr2= ctxt->regs->ip;
+   return ES_EXCEPTION;
+   }
+
+   if (!insn_decode_regs(&ctxt->insn, ctxt->regs, buffer, res))
+   return ES_DECODE_FAILED;
+   else
+   return ES_OK;
+}
+
+static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt)
+{
+   char buffer[MAX_INSN_SIZE];
+   int res;
 
-   ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE - res, 
INSN_MODE_64);
+   res = vc_fetch_insn_kernel(ctxt, buffer);
+   if (res) {
+   ctxt->fi.vector = X86_TRAP_PF;
+   ctxt->fi.error_code = X86_PF_INSTR;
+   ctxt->fi.cr2= ctxt->regs->ip;
+   return ES_EXCEPTION;
}
 
-   if (ret < 0)
+   res = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE - res, 
INSN_MODE_64);
+   if (res < 0)
return ES_DECODE_FAILED;
else
return ES_OK;
 }
 
+static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
+{
+   if (user_mode(ctxt->regs))
+   return __vc_decode_user_insn(ctxt);
+   else
+   return __vc_decode_kern_insn(ctxt);
+}
+
 static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,
   char *dst, char *buf, size_t size)
 {

-- 
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

drivers/scsi/fnic/vnic_dev.c:332:32: sparse: sparse: incorrect type in argument 1 (different address spaces)

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   71c5f03154ac1cb27423b984743ccc2f5d11d14d
commit: 8f28ca6bd8211214faf717677bbffe375c2a6072 iomap: constify ioreadX() 
iomem argument (as in generic implementation)
date:   4 months ago
config: i386-randconfig-s001-20201220 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-184-g1b896707-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8f28ca6bd8211214faf717677bbffe375c2a6072
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 8f28ca6bd8211214faf717677bbffe375c2a6072
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"sparse warnings: (new ones prefixed by >>)"
>> drivers/scsi/fnic/vnic_dev.c:332:32: sparse: sparse: incorrect type in 
>> argument 1 (different address spaces) @@ expected void const [noderef] 
>> __iomem * @@ got unsigned int * @@
   drivers/scsi/fnic/vnic_dev.c:332:32: sparse: expected void const 
[noderef] __iomem *
   drivers/scsi/fnic/vnic_dev.c:332:32: sparse: got unsigned int *
   drivers/scsi/fnic/vnic_dev.c:333:37: sparse: sparse: incorrect type in 
argument 1 (different address spaces) @@ expected void const [noderef] 
__iomem * @@ got unsigned int * @@
   drivers/scsi/fnic/vnic_dev.c:333:37: sparse: expected void const 
[noderef] __iomem *
   drivers/scsi/fnic/vnic_dev.c:333:37: sparse: got unsigned int *
   drivers/scsi/fnic/vnic_dev.c:373:36: sparse: sparse: incorrect type in 
argument 2 (different address spaces) @@ expected void [noderef] __iomem * 
@@ got unsigned int * @@
   drivers/scsi/fnic/vnic_dev.c:373:36: sparse: expected void [noderef] 
__iomem *
   drivers/scsi/fnic/vnic_dev.c:373:36: sparse: got unsigned int *
   drivers/scsi/fnic/vnic_dev.c:469:32: sparse: sparse: incorrect type in 
assignment (different address spaces) @@ expected struct vnic_wq_ctrl 
*wq_ctrl @@ got struct vnic_wq_ctrl [noderef] __iomem *ctrl @@
   drivers/scsi/fnic/vnic_dev.c:469:32: sparse: expected struct 
vnic_wq_ctrl *wq_ctrl
   drivers/scsi/fnic/vnic_dev.c:469:32: sparse: got struct vnic_wq_ctrl 
[noderef] __iomem *ctrl
   drivers/scsi/fnic/vnic_dev.c:943:11: sparse: sparse: incorrect type in 
assignment (different address spaces) @@ expected void *p @@ got void 
[noderef] __iomem * @@
   drivers/scsi/fnic/vnic_dev.c:943:11: sparse: expected void *p
   drivers/scsi/fnic/vnic_dev.c:943:11: sparse: got void [noderef] __iomem *

vim +332 drivers/scsi/fnic/vnic_dev.c

5df6d737dd4b0fe Abhijeet Joglekar 2009-04-17  318  
363f4d937501ba4 Jason Yan 2020-04-15  319  static int 
vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  320   int wait)
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  321  {
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  322   struct 
devcmd2_controller *dc2c = vdev->devcmd2;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  323   struct devcmd2_result 
*result;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  324   u8 color;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  325   unsigned int i;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  326   int delay;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  327   int err;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  328   u32 fetch_index;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  329   u32 posted;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  330   u32 new_posted;
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  331  
0a2fdd2215e1fa3 Satish Kharat 2019-01-18 @332   posted = 
ioread32(&dc2c->wq_ctrl->posted_index);
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  333   fetch_index = 
ioread32(&dc2c->wq_ctrl->fetch_index);
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  334  
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  335   if (posted == 
0x || fetch_index == 0x) {
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  336   /* Hardware 
surprise removal: return error */
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  337   pr_err("%s: 
devcmd2 invalid posted or fetch index on cmd %d\n",
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  338   
pci_name(vdev->pdev), _CMD_N(cmd));
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  339   pr_err("%s: 
fetch index: %u, posted index: %u\n",
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  340   
pci_name(vdev->pdev), fetch_index, posted);
0a2fdd2215e1fa3 Satish Kharat 2019-01-18  341  
0a2fdd2215e1fa3 Satish Kha

drivers/mmc/host/s3cmci.c:1684:21: sparse: sparse: incorrect type in argument 1 (different address spaces)

[kernel test robot]

Hi Krzysztof,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   71c5f03154ac1cb27423b984743ccc2f5d11d14d
commit: 1b0e4a2141c7bf6a122f1e04cbc1690b835707cf mmc: s3cmci: enable compile 
testing
date:   6 weeks ago
config: openrisc-randconfig-s031-20201223 (attached as .config)
compiler: or1k-linux-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-184-g1b896707-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1b0e4a2141c7bf6a122f1e04cbc1690b835707cf
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 1b0e4a2141c7bf6a122f1e04cbc1690b835707cf
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"sparse warnings: (new ones prefixed by >>)"
>> drivers/mmc/host/s3cmci.c:1684:21: sparse: sparse: incorrect type in 
>> argument 1 (different address spaces) @@ expected void *addr @@ got 
>> void [noderef] __iomem *base @@
   drivers/mmc/host/s3cmci.c:1684:21: sparse: expected void *addr
   drivers/mmc/host/s3cmci.c:1684:21: sparse: got void [noderef] __iomem 
*base
   drivers/mmc/host/s3cmci.c:1726:21: sparse: sparse: incorrect type in 
argument 1 (different address spaces) @@ expected void *addr @@ got 
void [noderef] __iomem *base @@
   drivers/mmc/host/s3cmci.c:1726:21: sparse: expected void *addr
   drivers/mmc/host/s3cmci.c:1726:21: sparse: got void [noderef] __iomem 
*base

vim +1684 drivers/mmc/host/s3cmci.c

e584e07502131fb Sergio Prado   2017-03-31  1507  
e584e07502131fb Sergio Prado   2017-03-31  1508  static int 
s3cmci_probe(struct platform_device *pdev)
e584e07502131fb Sergio Prado   2017-03-31  1509  {
e584e07502131fb Sergio Prado   2017-03-31  1510 struct s3cmci_host 
*host;
e584e07502131fb Sergio Prado   2017-03-31  1511 struct mmc_host *mmc;
e584e07502131fb Sergio Prado   2017-03-31  1512 int ret;
e584e07502131fb Sergio Prado   2017-03-31  1513  
e584e07502131fb Sergio Prado   2017-03-31  1514 mmc = 
mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
e584e07502131fb Sergio Prado   2017-03-31  1515 if (!mmc) {
e584e07502131fb Sergio Prado   2017-03-31  1516 ret = -ENOMEM;
e584e07502131fb Sergio Prado   2017-03-31  1517 goto probe_out;
916a30775fc843e Ben Dooks  2009-10-01  1518 }
916a30775fc843e Ben Dooks  2009-10-01  1519  
be518018c6b9224 Thomas Kleffel 2008-06-30  1520 host = mmc_priv(mmc);
be518018c6b9224 Thomas Kleffel 2008-06-30  1521 host->mmc   = mmc;
be518018c6b9224 Thomas Kleffel 2008-06-30  1522 host->pdev  = pdev;
e584e07502131fb Sergio Prado   2017-03-31  1523  
e584e07502131fb Sergio Prado   2017-03-31  1524 if (pdev->dev.of_node)
e584e07502131fb Sergio Prado   2017-03-31  1525 ret = 
s3cmci_probe_dt(host);
e584e07502131fb Sergio Prado   2017-03-31  1526 else
e584e07502131fb Sergio Prado   2017-03-31  1527 ret = 
s3cmci_probe_pdata(host);
e584e07502131fb Sergio Prado   2017-03-31  1528  
e584e07502131fb Sergio Prado   2017-03-31  1529 if (ret)
e584e07502131fb Sergio Prado   2017-03-31  1530 goto 
probe_free_host;
be518018c6b9224 Thomas Kleffel 2008-06-30  1531  
edb5a98e43682d6 Ben Dooks  2008-06-30  1532 host->pdata = 
pdev->dev.platform_data;
edb5a98e43682d6 Ben Dooks  2008-06-30  1533  
be518018c6b9224 Thomas Kleffel 2008-06-30  1534 
spin_lock_init(&host->complete_lock);
be518018c6b9224 Thomas Kleffel 2008-06-30  1535 
tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
be518018c6b9224 Thomas Kleffel 2008-06-30  1536  
e584e07502131fb Sergio Prado   2017-03-31  1537 if (host->is2440) {
be518018c6b9224 Thomas Kleffel 2008-06-30  1538 host->sdiimsk   
= S3C2440_SDIIMSK;
be518018c6b9224 Thomas Kleffel 2008-06-30  1539 host->sdidata   
= S3C2440_SDIDATA;
be518018c6b9224 Thomas Kleffel 2008-06-30  1540 host->clk_div   
= 1;
be518018c6b9224 Thomas Kleffel 2008-06-30  1541 } else {
be518018c6b9224 Thomas Kleffel 2008-06-30  1542 host->sdiimsk   
= S3C2410_SDIIMSK;
be518018c6b9224 Thomas Kleffel 2008-06-30  1543 host->sdidata   
= S3C2410_SDIDATA;
be518018c6b9224 Thomas Kleffel 2008-06-30  1544 host->clk_div   
= 2;
be518018c6b

[PATCH] x86/tools: Use POSIX-compliant syntax for empty regex groups

[John Millikin]

The syntax for POSIX regexes technically doesn't allow empty branches in
conditional match groups. GNU libc accepts them as equivalent to `()',
but other libc implementations (e.g. macOS libc) reject them with a
parse error.

Changing to compliant syntax, `(|_sym)' to `(()|_sym)', lets the `relocs'
tool run successfully when using a non-GNU platform as a build host for
cross-compiling the kernel.

Signed-off-by: John Millikin 
---

Helper binary to verify behavior for the current platform:

    #include 
    #include 
    int main(int argc, char **argv) {
    regex_t compiled;
    int err = regcomp(&compiled, argv[1], REG_EXTENDED|REG_NOSUB);
    if (err != 0) {
    char errbuf[128];
    regerror(err, &compiled, errbuf, sizeof(errbuf));
        printf("regcomp(\"%s\"): %s\n", argv[1], errbuf);
   return 1;
    }
    printf("regcomp(\"%s\"): OK\n", argv[1]);
    return 0;
    }

Output from GNU libc 2.28 and a fussier non-GNU libc:

    debian:~$ ./regcomp '^a(|b)$'
    regcomp("^a(|b)$"): OK
    debian:~$ ./regcomp '^a(()|b)$'
    regcomp("^a(()|b)$"): OK

    darwin:~$ ./regcomp '^a(|b)$'
    regcomp("^a(|b)$"): empty (sub)expression
    darwin:~$ ./regcomp '^a(()|b)$'
    regcomp("^a(()|b)$"): OK

 arch/x86/tools/relocs.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/tools/relocs.c b/arch/x86/tools/relocs.c
index ce7188cbdae5..e6f28616a625 100644
--- a/arch/x86/tools/relocs.c
+++ b/arch/x86/tools/relocs.c
@@ -57,12 +57,12 @@ static const char * const sym_regex_kernel[S_NSYMTYPES] = {
 [S_REL] =
 "^(__init_(begin|end)|"
 "__x86_cpu_dev_(start|end)|"
-    "(__parainstructions|__alt_instructions)(|_end)|"
-    "(__iommu_table|__apicdrivers|__smp_locks)(|_end)|"
+    "(__parainstructions|__alt_instructions)(()|_end)|"
+    "(__iommu_table|__apicdrivers|__smp_locks)(()|_end)|"
 "__(start|end)_pci_.*|"
 "__(start|end)_builtin_fw|"
-    "__(start|stop)___ksymtab(|_gpl|_unused|_unused_gpl|_gpl_future)|"
-    "__(start|stop)___kcrctab(|_gpl|_unused|_unused_gpl|_gpl_future)|"
+    "__(start|stop)___ksymtab(()|_gpl|_unused|_unused_gpl|_gpl_future)|"
+    "__(start|stop)___kcrctab(()|_gpl|_unused|_unused_gpl|_gpl_future)|"
 "__(start|stop)___param|"
 "__(start|stop)___modver|"
 "__(start|stop)___bug_table|"
-- 
2.29.2

BUG: sleeping function called from invalid context in do_user_addr_fault (2)

[syzbot]

Hello,

syzbot found the following issue on:

HEAD commit:d467d80d bpf: Remove unused including 
git tree:   bpf
console output: https://syzkaller.appspot.com/x/log.txt?x=159392cb50
kernel config:  https://syzkaller.appspot.com/x/.config?x=2764fc28a92339f9
dashboard link: https://syzkaller.appspot.com/bug?extid=6ce719ff413f52e0a0f2
compiler:   gcc (GCC) 10.1.0-syz 20200507
syz repro:  https://syzkaller.appspot.com/x/repro.syz?x=1723433350

The issue was bisected to:

commit 64b59025c15b244c0954cf52b24fbabfcf5ed8f6
Author: David Ahern 
Date:   Fri May 29 22:07:14 2020 +

xdp: Add xdp_txq_info to xdp_buff

bisection log:  https://syzkaller.appspot.com/x/bisect.txt?x=129bcb3750
final oops: https://syzkaller.appspot.com/x/report.txt?x=119bcb3750
console output: https://syzkaller.appspot.com/x/log.txt?x=169bcb3750

IMPORTANT: if you fix the issue, please add the following tag to the commit:
Reported-by: syzbot+6ce719ff413f52e0a...@syzkaller.appspotmail.com
Fixes: 64b59025c15b ("xdp: Add xdp_txq_info to xdp_buff")

BUG: sleeping function called from invalid context at arch/x86/mm/fault.c:1351
in_atomic(): 0, irqs_disabled(): 0, non_block: 0, pid: 8781, name: 
syz-executor.0
2 locks held by syz-executor.0/8781:
 #0: 8b33a020 (rcu_read_lock){}-{1:2}, at: bpf_test_run+0x116/0xcc0 
net/bpf/test_run.c:28
 #1: 888013428158 (&mm->mmap_lock#2){}-{3:3}, at: mmap_read_trylock 
include/linux/mmap_lock.h:136 [inline]
 #1: 888013428158 (&mm->mmap_lock#2){}-{3:3}, at: 
do_user_addr_fault+0x25f/0xc50 arch/x86/mm/fault.c:1334
Preemption disabled at:
[] migrate_disable+0x5e/0x160 kernel/sched/core.c:1753
CPU: 0 PID: 8781 Comm: syz-executor.0 Not tainted 5.10.0-syzkaller #0
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 
01/01/2011
Call Trace:
 __dump_stack lib/dump_stack.c:79 [inline]
 dump_stack+0x107/0x163 lib/dump_stack.c:120
 ___might_sleep.cold+0x1f1/0x237 kernel/sched/core.c:7911
 do_user_addr_fault+0x29c/0xc50 arch/x86/mm/fault.c:1351
 handle_page_fault arch/x86/mm/fault.c:1450 [inline]
 exc_page_fault+0x9e/0x180 arch/x86/mm/fault.c:1506
 asm_exc_page_fault+0x1e/0x30 arch/x86/include/asm/idtentry.h:580
RIP: 0010:bpf_prog_e48ebe87b99394c4+0x11/0xa48
Code: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc 
cc 0f 1f 44 00 00 66 90 55 48 89 e5 31 c0 48 8b 47 28 <48> 8b 40 00 8b 80 00 01 
00 00 c9 c3 cc cc cc cc cc cc cc cc cc cc
RSP: 0018:c9000165fb30 EFLAGS: 00010246
RAX:  RBX: dc00 RCX: 87314b68
RDX: 88802bfeb580 RSI: c9e8e038 RDI: c9000165fcb0
RBP: c9000165fb30 R08: 0001 R09: 0001
R10:  R11:  R12: 
R13: dc00 R14: 0001 R15: c9e8e000
 bpf_prog_run_xdp include/linux/filter.h:743 [inline]
 bpf_test_run+0x21c/0xcc0 net/bpf/test_run.c:48
 bpf_prog_test_run_xdp+0x2ca/0x510 net/bpf/test_run.c:648
 bpf_prog_test_run kernel/bpf/syscall.c:3120 [inline]
 __do_sys_bpf+0x2174/0x5130 kernel/bpf/syscall.c:4412
 do_syscall_64+0x2d/0x70 arch/x86/entry/common.c:46
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x45e149
Code: 0d b4 fb ff c3 66 2e 0f 1f 84 00 00 00 00 00 66 90 48 89 f8 48 89 f7 48 
89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 0f 83 
db b3 fb ff c3 66 2e 0f 1f 84 00 00 00 00
RSP: 002b:7f7d79602c68 EFLAGS: 0246 ORIG_RAX: 0141
RAX: ffda RBX: 0003 RCX: 0045e149
RDX: 0028 RSI: 20c0 RDI: 000a
RBP: 0119bfc0 R08:  R09: 
R10:  R11: 0246 R12: 0119bf8c
R13: 7ffdea4f396f R14: 7f7d796039c0 R15: 0119bf8c
BUG: kernel NULL pointer dereference, address: 
#PF: supervisor read access in kernel mode
#PF: error_code(0x) - not-present page
PGD 1eb8b067 P4D 1eb8b067 PUD 1cd90067 PMD 0 
Oops:  [#1] PREEMPT SMP KASAN
CPU: 0 PID: 8781 Comm: syz-executor.0 Tainted: GW 
5.10.0-syzkaller #0
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 
01/01/2011
RIP: 0010:bpf_prog_e48ebe87b99394c4+0x11/0xa48
Code: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc 
cc 0f 1f 44 00 00 66 90 55 48 89 e5 31 c0 48 8b 47 28 <48> 8b 40 00 8b 80 00 01 
00 00 c9 c3 cc cc cc cc cc cc cc cc cc cc
RSP: 0018:c9000165fb30 EFLAGS: 00010246
RAX:  RBX: dc00 RCX: 87314b68
RDX: 88802bfeb580 RSI: c9e8e038 RDI: c9000165fcb0
RBP: c9000165fb30 R08: 0001 R09: 0001
R10:  R11:  R12: 
R13: dc00 R14: 0001 R15: c9e8e000
FS:  7f7d79603700() GS:8880b9e0() knlGS:
CS:  0010 DS:  ES:  CR0: 80050033
CR

[PATCH v16 00/10] NTFS read-write driver GPL implementation by Paragon Software

[Konstantin Komarov]

This patch adds NTFS Read-Write driver to fs/ntfs3.

Having decades of expertise in commercial file systems development and huge
test coverage, we at Paragon Software GmbH want to make our contribution to
the Open Source Community by providing implementation of NTFS Read-Write
driver for the Linux Kernel.

This is fully functional NTFS Read-Write driver. Current version works with
NTFS(including v3.1) and normal/compressed/sparse files and supports journal 
replaying.

We plan to support this version after the codebase once merged, and add new
features and fix bugs. For example, full journaling support over JBD will be
added in later updates.

v2:
 - patch splitted to chunks (file-wise)
 - build issues fixed
 - sparse and checkpatch.pl errors fixed
 - NULL pointer dereference on mkfs.ntfs-formatted volume mount fixed
 - cosmetics + code cleanup

v3:
 - added acl, noatime, no_acs_rules, prealloc mount options
 - added fiemap support
 - fixed encodings support
 - removed typedefs
 - adapted Kernel-way logging mechanisms
 - fixed typos and corner-case issues

v4:
 - atomic_open() refactored
 - code style updated
 - bugfixes

v5:
- nls/nls_alt mount options added
- Unicode conversion fixes
- Improved very fragmented files operations
- logging cosmetics

v6:
- Security Descriptors processing changed
  added system.ntfs_security xattr to set
  SD
- atomic_open() optimized
- cosmetics

v7:
- Security Descriptors validity checks added (by Mark Harmstone)
- atomic_open() fixed for the compressed file creation with directio
  case
- remount support
- temporarily removed readahead usage
- cosmetics

v8:
- Compressed files operations fixed

v9:
- Further cosmetics applied as suggested
by Joe Perches

v10:
- operations with compressed/sparse files on very fragmented volumes improved
- reduced memory consumption for above cases

v11:
- further compressed files optimizations: reads/writes are now skipping 
bufferization
- journal wipe to the initial state optimized (bufferization is also skipped)
- optimized run storage (re-packing cluster metainformation)
- fixes based on Matthew Wilcox feedback to the v10
- compressed/sparse/normal could be set for empty files with 
'system.ntfs_attrib' xattr

v12:
- nls_alt mount option removed after discussion with Pali Rohar
- fixed ni_repack()
- fixed resident files transition to non-resident when size increasing

v13:
- nested_lock fix (lockdep)
- out-of-bounds read fix (KASAN warning)
- resident->nonresident transition fixed for compressed files
- load_nls() missed fix applied
- some sparse utility warnings fixes

v14:
- support for additional compression types (we've adapted WIMLIB's
  implementation, authored by Eric Biggers, into ntfs3)

v15:
- kernel test robot warnings fixed
- lzx/xpress compression license headers updated

v16:
- lzx/xpress compression types are adapted to the initial ntfs-3g plugin code
- mutexes introduced for the each compression type instead of a global spinlock
- FALLOC_FL_PUNCH_HOLE and FALLOC_FL_COLLAPSE_RANGE implemented
- decompression for system

Konstantin Komarov (10):
  fs/ntfs3: Add headers and misc files
  fs/ntfs3: Add initialization of super block
  fs/ntfs3: Add bitmap
  fs/ntfs3: Add file operations and implementation
  fs/ntfs3: Add attrib operations
  fs/ntfs3: Add compression
  fs/ntfs3: Add NTFS journal
  fs/ntfs3: Add Kconfig, Makefile and doc
  fs/ntfs3: Add NTFS3 in fs/Kconfig and fs/Makefile
  fs/ntfs3: Add MAINTAINERS

 Documentation/filesystems/ntfs3.rst |  107 +
 MAINTAINERS |7 +
 fs/Kconfig  |1 +
 fs/Makefile |1 +
 fs/ntfs3/Kconfig|   41 +
 fs/ntfs3/Makefile   |   31 +
 fs/ntfs3/attrib.c   | 2080 +++
 fs/ntfs3/attrlist.c |  463 +++
 fs/ntfs3/bitfunc.c  |  135 +
 fs/ntfs3/bitmap.c   | 1504 
 fs/ntfs3/debug.h|   61 +
 fs/ntfs3/dir.c  |  575 +++
 fs/ntfs3/file.c | 1140 ++
 fs/ntfs3/frecord.c  | 3088 
 fs/ntfs3/fslog.c| 5220 +++
 fs/ntfs3/fsntfs.c   | 2527 +
 fs/ntfs3/index.c| 2665 ++
 fs/ntfs3/inode.c| 2061 +++
 fs/ntfs3/lib/decompress_common.c|  332 ++
 fs/ntfs3/lib/decompress_common.h|  352 ++
 fs/ntfs3/lib/lib.h  |   26 +
 fs/ntfs3/lib/lzx_decompress.c   |  683 
 fs/ntfs3/lib/xpress_decompress.c|  155 +
 fs/ntfs3/lznt.c |  452 +++
 fs/ntfs3/namei.c|  590 +++
 fs/ntfs3/ntfs.h | 1237 +++
 fs/ntfs3/ntfs_fs.h  | 1050 ++
 fs/ntfs3/record.c   |  614 
 fs/ntfs3/run.c  | 1254 +++
 fs/ntfs3/super.c| 1477 
 fs/ntfs3/upcase.c

[PATCH v16 09/10] fs/ntfs3: Add NTFS3 in fs/Kconfig and fs/Makefile

[Konstantin Komarov]

This adds NTFS3 in fs/Kconfig and fs/Makefile

Signed-off-by: Konstantin Komarov 
---
 fs/Kconfig  | 1 +
 fs/Makefile | 1 +
 2 files changed, 2 insertions(+)

diff --git a/fs/Kconfig b/fs/Kconfig
index aa4c12282301..eae96d55ab67 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -145,6 +145,7 @@ menu "DOS/FAT/EXFAT/NT Filesystems"
 source "fs/fat/Kconfig"
 source "fs/exfat/Kconfig"
 source "fs/ntfs/Kconfig"
+source "fs/ntfs3/Kconfig"
 
 endmenu
 endif # BLOCK
diff --git a/fs/Makefile b/fs/Makefile
index 999d1a23f036..4f5242cdaee2 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_SYSV_FS)   += sysv/
 obj-$(CONFIG_CIFS) += cifs/
 obj-$(CONFIG_HPFS_FS)  += hpfs/
 obj-$(CONFIG_NTFS_FS)  += ntfs/
+obj-$(CONFIG_NTFS3_FS) += ntfs3/
 obj-$(CONFIG_UFS_FS)   += ufs/
 obj-$(CONFIG_EFS_FS)   += efs/
 obj-$(CONFIG_JFFS2_FS) += jffs2/
-- 
2.25.4

[PATCH v16 05/10] fs/ntfs3: Add attrib operations

[Konstantin Komarov]

This adds attrib operations

Signed-off-by: Konstantin Komarov 
---
 fs/ntfs3/attrib.c   | 2080 +++
 fs/ntfs3/attrlist.c |  463 ++
 fs/ntfs3/xattr.c| 1072 ++
 3 files changed, 3615 insertions(+)
 create mode 100644 fs/ntfs3/attrib.c
 create mode 100644 fs/ntfs3/attrlist.c
 create mode 100644 fs/ntfs3/xattr.c

diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c
new file mode 100644
index ..3f4c847c4962
--- /dev/null
+++ b/fs/ntfs3/attrib.c
@@ -0,0 +1,2080 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *
+ * Copyright (C) 2019-2020 Paragon Software GmbH, All rights reserved.
+ *
+ * TODO: merge attr_set_size/attr_data_get_block/attr_allocate_frame?
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "debug.h"
+#include "ntfs.h"
+#include "ntfs_fs.h"
+
+/*
+ * You can set external NTFS_MIN_LOG2_OF_CLUMP/NTFS_MAX_LOG2_OF_CLUMP to manage
+ * preallocate algorithm
+ */
+#ifndef NTFS_MIN_LOG2_OF_CLUMP
+#define NTFS_MIN_LOG2_OF_CLUMP 16
+#endif
+
+#ifndef NTFS_MAX_LOG2_OF_CLUMP
+#define NTFS_MAX_LOG2_OF_CLUMP 26
+#endif
+
+// 16M
+#define NTFS_CLUMP_MIN (1 << (NTFS_MIN_LOG2_OF_CLUMP + 8))
+// 16G
+#define NTFS_CLUMP_MAX (1ull << (NTFS_MAX_LOG2_OF_CLUMP + 8))
+
+/*
+ * get_pre_allocated
+ *
+ */
+static inline u64 get_pre_allocated(u64 size)
+{
+   u32 clump;
+   u8 align_shift;
+   u64 ret;
+
+   if (size <= NTFS_CLUMP_MIN) {
+   clump = 1 << NTFS_MIN_LOG2_OF_CLUMP;
+   align_shift = NTFS_MIN_LOG2_OF_CLUMP;
+   } else if (size >= NTFS_CLUMP_MAX) {
+   clump = 1 << NTFS_MAX_LOG2_OF_CLUMP;
+   align_shift = NTFS_MAX_LOG2_OF_CLUMP;
+   } else {
+   align_shift = NTFS_MIN_LOG2_OF_CLUMP - 1 +
+ __ffs(size >> (8 + NTFS_MIN_LOG2_OF_CLUMP));
+   clump = 1u << align_shift;
+   }
+
+   ret = (((size + clump - 1) >> align_shift)) << align_shift;
+
+   return ret;
+}
+
+/*
+ * attr_must_be_resident
+ *
+ * returns true if attribute must be resident
+ */
+static inline bool attr_must_be_resident(struct ntfs_sb_info *sbi,
+enum ATTR_TYPE type)
+{
+   const struct ATTR_DEF_ENTRY *de;
+
+   switch (type) {
+   case ATTR_STD:
+   case ATTR_NAME:
+   case ATTR_ID:
+   case ATTR_LABEL:
+   case ATTR_VOL_INFO:
+   case ATTR_ROOT:
+   case ATTR_EA_INFO:
+   return true;
+   default:
+   de = ntfs_query_def(sbi, type);
+   if (de && (de->flags & NTFS_ATTR_MUST_BE_RESIDENT))
+   return true;
+   return false;
+   }
+}
+
+/*
+ * attr_load_runs
+ *
+ * load all runs stored in 'attr'
+ */
+int attr_load_runs(struct ATTRIB *attr, struct ntfs_inode *ni,
+  struct runs_tree *run, const CLST *vcn)
+{
+   int err;
+   CLST svcn = le64_to_cpu(attr->nres.svcn);
+   CLST evcn = le64_to_cpu(attr->nres.evcn);
+   u32 asize;
+   u16 run_off;
+
+   if (svcn >= evcn + 1 || run_is_mapped_full(run, svcn, evcn))
+   return 0;
+
+   if (vcn && (evcn < *vcn || *vcn < svcn))
+   return -EINVAL;
+
+   asize = le32_to_cpu(attr->size);
+   run_off = le16_to_cpu(attr->nres.run_off);
+   err = run_unpack_ex(run, ni->mi.sbi, ni->mi.rno, svcn, evcn,
+   vcn ? *vcn : svcn, Add2Ptr(attr, run_off),
+   asize - run_off);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+
+/*
+ * int run_deallocate_ex
+ *
+ * Deallocate clusters
+ */
+static int run_deallocate_ex(struct ntfs_sb_info *sbi, struct runs_tree *run,
+CLST vcn, CLST len, CLST *done, bool trim)
+{
+   int err = 0;
+   CLST vcn0 = vcn, lcn, clen, dn = 0;
+   size_t idx;
+
+   if (!len)
+   goto out;
+
+   if (!run_lookup_entry(run, vcn, &lcn, &clen, &idx)) {
+failed:
+   run_truncate(run, vcn0);
+   err = -EINVAL;
+   goto out;
+   }
+
+   for (;;) {
+   if (clen > len)
+   clen = len;
+
+   if (!clen) {
+   err = -EINVAL;
+   goto out;
+   }
+
+   if (lcn != SPARSE_LCN) {
+   mark_as_free_ex(sbi, lcn, clen, trim);
+   dn += clen;
+   }
+
+   len -= clen;
+   if (!len)
+   break;
+
+   if (!run_get_entry(run, ++idx, &vcn, &lcn, &clen)) {
+   // save memory - don't load entire run
+   goto failed;
+   }
+   }
+
+out:
+   if (done)
+   *done += dn;
+
+   return err;
+}
+
+/*
+ * attr_allocate_clusters
+ *
+ * find free space, mark it as used and store in 'run'
+ */
+int 

[PATCH v16 01/10] fs/ntfs3: Add headers and misc files

[Konstantin Komarov]

This adds headers and misc files

Signed-off-by: Konstantin Komarov 
---
 fs/ntfs3/debug.h   |   61 +++
 fs/ntfs3/ntfs.h| 1237 
 fs/ntfs3/ntfs_fs.h | 1050 +
 fs/ntfs3/upcase.c  |   77 +++
 4 files changed, 2425 insertions(+)
 create mode 100644 fs/ntfs3/debug.h
 create mode 100644 fs/ntfs3/ntfs.h
 create mode 100644 fs/ntfs3/ntfs_fs.h
 create mode 100644 fs/ntfs3/upcase.c

diff --git a/fs/ntfs3/debug.h b/fs/ntfs3/debug.h
new file mode 100644
index ..9e57ef878b05
--- /dev/null
+++ b/fs/ntfs3/debug.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *
+ * Copyright (C) 2019-2020 Paragon Software GmbH, All rights reserved.
+ *
+ * useful functions for debuging
+ */
+
+// clang-format off
+#ifndef Add2Ptr
+#define Add2Ptr(P, I)  ((void *)((u8 *)(P) + (I)))
+#define PtrOffset(B, O)((size_t)((size_t)(O) - (size_t)(B)))
+#endif
+
+#define QuadAlign(n)   (((n) + 7u) & (~7u))
+#define IsQuadAligned(n)   (!((size_t)(n)&7u))
+#define Quad2Align(n)  (((n) + 15u) & (~15u))
+#define IsQuad2Aligned(n)  (!((size_t)(n)&15u))
+#define Quad4Align(n)  (((n) + 31u) & (~31u))
+#define IsSizeTAligned(n)  (!((size_t)(n) & (sizeof(size_t) - 1)))
+#define DwordAlign(n)  (((n) + 3u) & (~3u))
+#define IsDwordAligned(n)  (!((size_t)(n)&3u))
+#define WordAlign(n)   (((n) + 1u) & (~1u))
+#define IsWordAligned(n)   (!((size_t)(n)&1u))
+
+#ifdef CONFIG_PRINTK
+__printf(2, 3)
+void ntfs_printk(const struct super_block *sb, const char *fmt, ...);
+__printf(2, 3)
+void ntfs_inode_printk(struct inode *inode, const char *fmt, ...);
+#else
+static inline __printf(2, 3)
+void ntfs_printk(const struct super_block *sb, const char *fmt, ...)
+{
+}
+
+static inline __printf(2, 3)
+void ntfs_inode_printk(struct inode *inode, const char *fmt, ...)
+{
+}
+#endif
+
+/*
+ * Logging macros ( thanks Joe Perches  for implementation )
+ */
+
+#define ntfs_err(sb, fmt, ...)  ntfs_printk(sb, KERN_ERR fmt, ##__VA_ARGS__)
+#define ntfs_warn(sb, fmt, ...) ntfs_printk(sb, KERN_WARNING fmt, 
##__VA_ARGS__)
+#define ntfs_info(sb, fmt, ...) ntfs_printk(sb, KERN_INFO fmt, ##__VA_ARGS__)
+#define ntfs_notice(sb, fmt, ...)  
\
+   ntfs_printk(sb, KERN_NOTICE fmt, ##__VA_ARGS__)
+
+#define ntfs_inode_err(inode, fmt, ...)
\
+   ntfs_inode_printk(inode, KERN_ERR fmt, ##__VA_ARGS__)
+#define ntfs_inode_warn(inode, fmt, ...)   
\
+   ntfs_inode_printk(inode, KERN_WARNING fmt, ##__VA_ARGS__)
+
+#define ntfs_alloc(s, z)   kmalloc(s, (z) ? (GFP_NOFS | __GFP_ZERO) : 
GFP_NOFS)
+#define ntfs_free(p)   kfree(p)
+#define ntfs_memdup(src, len)  kmemdup(src, len, GFP_NOFS)
+// clang-format on
diff --git a/fs/ntfs3/ntfs.h b/fs/ntfs3/ntfs.h
new file mode 100644
index ..9b1a9be80529
--- /dev/null
+++ b/fs/ntfs3/ntfs.h
@@ -0,0 +1,1237 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *
+ * Copyright (C) 2019-2020 Paragon Software GmbH, All rights reserved.
+ *
+ * on-disk ntfs structs
+ */
+
+// clang-format off
+
+/* TODO:
+ * - Check 4K mft record and 512 bytes cluster
+ */
+
+/*
+ * Activate this define to use binary search in indexes
+ */
+#define NTFS3_INDEX_BINARY_SEARCH
+
+/*
+ * Check each run for marked clusters
+ */
+#define NTFS3_CHECK_FREE_CLST
+
+#define NTFS_NAME_LEN 255
+
+/*
+ * ntfs.sys used 500 maximum links
+ * on-disk struct allows up to 0x
+ */
+#define NTFS_LINK_MAX 0x400
+//#define NTFS_LINK_MAX 0x
+
+/*
+ * Activate to use 64 bit clusters instead of 32 bits in ntfs.sys
+ * Logical and virtual cluster number
+ * If needed, may be redefined to use 64 bit value
+ */
+//#define NTFS3_64BIT_CLUSTER
+
+#define NTFS_LZNT_MAX_CLUSTER  4096
+#define NTFS_LZNT_CUNIT4
+#define NTFS_LZNT_CLUSTERS (1uhigh) << 32);
+#else
+   return le32_to_cpu(ref->low);
+#endif
+}
+
+struct NTFS_BOOT {
+   u8 jump_code[3];// 0x00: Jump to boot code
+   u8 system_id[8];// 0x03: System ID, equals "NTFS"
+
+   // NOTE: this member is not aligned(!)
+   // bytes_per_sector[0] must be 0
+   // bytes_per_sector[1] must be multiplied by 256
+   u8 bytes_per_sector[2]; // 0x0B: Bytes per sector
+
+   u8 sectors_per_clusters;// 0x0D: Sectors per cluster
+   u8 unused1[7];
+   u8 media_type;  // 0x15: Media type (0xF8 - harddisk)
+   u8 unused2[2];
+   __le16 sct_per_track;   // 0x18: number of sectors per track
+   __le16 heads;   // 0x1A: number of heads per cylinder
+   __le32 hidden_sectors;  // 0x1C: number of 'hidden' sectors
+   u8 unused3[4];
+   u8 bios_drive_num;  // 0x24: BIOS drive number =0x80
+   u8 unused4;
+   u8 signature_ex;// 0x26: Extended BOOT signature =0x80
+

[PATCH v16 06/10] fs/ntfs3: Add compression

[Konstantin Komarov]

This patch adds different types of NTFS-applicable compressions:
- lznt
- lzx
- xpress
Latter two (lzx, xpress) implement Windows Compact OS feature and
were taken from ntfs-3g system comression plugin authored by Eric Biggers
(https://github.com/ebiggers/ntfs-3g-system-compression)
which were ported to ntfs3 and adapted to Linux Kernel environment.

Signed-off-by: Konstantin Komarov 
---
 fs/ntfs3/lib/decompress_common.c | 332 +++
 fs/ntfs3/lib/decompress_common.h | 352 
 fs/ntfs3/lib/lib.h   |  26 ++
 fs/ntfs3/lib/lzx_decompress.c| 683 +++
 fs/ntfs3/lib/xpress_decompress.c | 155 +++
 fs/ntfs3/lznt.c  | 452 
 6 files changed, 2000 insertions(+)
 create mode 100644 fs/ntfs3/lib/decompress_common.c
 create mode 100644 fs/ntfs3/lib/decompress_common.h
 create mode 100644 fs/ntfs3/lib/lib.h
 create mode 100644 fs/ntfs3/lib/lzx_decompress.c
 create mode 100644 fs/ntfs3/lib/xpress_decompress.c
 create mode 100644 fs/ntfs3/lznt.c

diff --git a/fs/ntfs3/lib/decompress_common.c b/fs/ntfs3/lib/decompress_common.c
new file mode 100644
index ..83c9e93aea77
--- /dev/null
+++ b/fs/ntfs3/lib/decompress_common.c
@@ -0,0 +1,332 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * decompress_common.c - Code shared by the XPRESS and LZX decompressors
+ *
+ * Copyright (C) 2015 Eric Biggers
+ *
+ * This program is free software: you can redistribute it and/or modify it 
under
+ * the terms of the GNU General Public License as published by the Free 
Software
+ * Foundation, either version 2 of the License, or (at your option) any later
+ * version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
FITNESS
+ * FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include "decompress_common.h"
+
+/*
+ * make_huffman_decode_table() -
+ *
+ * Build a decoding table for a canonical prefix code, or "Huffman code".
+ *
+ * This is an internal function, not part of the library API!
+ *
+ * This takes as input the length of the codeword for each symbol in the
+ * alphabet and produces as output a table that can be used for fast
+ * decoding of prefix-encoded symbols using read_huffsym().
+ *
+ * Strictly speaking, a canonical prefix code might not be a Huffman
+ * code.  But this algorithm will work either way; and in fact, since
+ * Huffman codes are defined in terms of symbol frequencies, there is no
+ * way for the decompressor to know whether the code is a true Huffman
+ * code or not until all symbols have been decoded.
+ *
+ * Because the prefix code is assumed to be "canonical", it can be
+ * reconstructed directly from the codeword lengths.  A prefix code is
+ * canonical if and only if a longer codeword never lexicographically
+ * precedes a shorter codeword, and the lexicographic ordering of
+ * codewords of the same length is the same as the lexicographic ordering
+ * of the corresponding symbols.  Consequently, we can sort the symbols
+ * primarily by codeword length and secondarily by symbol value, then
+ * reconstruct the prefix code by generating codewords lexicographically
+ * in that order.
+ *
+ * This function does not, however, generate the prefix code explicitly.
+ * Instead, it directly builds a table for decoding symbols using the
+ * code.  The basic idea is this: given the next 'max_codeword_len' bits
+ * in the input, we can look up the decoded symbol by indexing a table
+ * containing 2**max_codeword_len entries.  A codeword with length
+ * 'max_codeword_len' will have exactly one entry in this table, whereas
+ * a codeword shorter than 'max_codeword_len' will have multiple entries
+ * in this table.  Precisely, a codeword of length n will be represented
+ * by 2**(max_codeword_len - n) entries in this table.  The 0-based index
+ * of each such entry will contain the corresponding codeword as a prefix
+ * when zero-padded on the left to 'max_codeword_len' binary digits.
+ *
+ * That's the basic idea, but we implement two optimizations regarding
+ * the format of the decode table itself:
+ *
+ * - For many compression formats, the maximum codeword length is too
+ *   long for it to be efficient to build the full decoding table
+ *   whenever a new prefix code is used.  Instead, we can build the table
+ *   using only 2**table_bits entries, where 'table_bits' is some number
+ *   less than or equal to 'max_codeword_len'.  Then, only codewords of
+ *   length 'table_bits' and shorter can be directly looked up.  For
+ *   longer codewords, the direct lookup instead produces the root of a
+ *   binary tree.  Using this tree, the decoder can do traditional
+ *   bit-by-bit decoding of the remainder

[PATCH v16 07/10] fs/ntfs3: Add NTFS journal

[Konstantin Komarov]

This adds NTFS journal

Signed-off-by: Konstantin Komarov 
---
 fs/ntfs3/fslog.c | 5220 ++
 1 file changed, 5220 insertions(+)
 create mode 100644 fs/ntfs3/fslog.c

diff --git a/fs/ntfs3/fslog.c b/fs/ntfs3/fslog.c
new file mode 100644
index ..14162b03d261
--- /dev/null
+++ b/fs/ntfs3/fslog.c
@@ -0,0 +1,5220 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *
+ * Copyright (C) 2019-2020 Paragon Software GmbH, All rights reserved.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "debug.h"
+#include "ntfs.h"
+#include "ntfs_fs.h"
+
+/*
+ * LOG FILE structs
+ */
+
+// clang-format off
+
+#define MaxLogFileSize 0x1ull
+#define DefaultLogPageSize 4096
+#define MinLogRecordPages  0x30
+
+struct RESTART_HDR {
+   struct NTFS_RECORD_HEADER rhdr; // 'RSTR'
+   __le32 sys_page_size; // 0x10: Page size of the system which 
initialized the log
+   __le32 page_size; // 0x14: Log page size used for this log file
+   __le16 ra_off;// 0x18:
+   __le16 minor_ver; // 0x1A:
+   __le16 major_ver; // 0x1C:
+   __le16 fixups[1];
+};
+
+#define LFS_NO_CLIENT 0x
+#define LFS_NO_CLIENT_LE cpu_to_le16(0x)
+
+struct CLIENT_REC {
+   __le64 oldest_lsn;
+   __le64 restart_lsn; // 0x08:
+   __le16 prev_client; // 0x10:
+   __le16 next_client; // 0x12:
+   __le16 seq_num; // 0x14:
+   u8 align[6];// 0x16
+   __le32 name_bytes;  // 0x1C: in bytes
+   __le16 name[32];// 0x20: name of client
+};
+
+static_assert(sizeof(struct CLIENT_REC) == 0x60);
+
+/* Two copies of these will exist at the beginning of the log file */
+struct RESTART_AREA {
+   __le64 current_lsn;// 0x00: Current logical end of log file
+   __le16 log_clients;// 0x08: Maximum number of clients
+   __le16 client_idx[2];  // 0x0A: free/use index into the client record 
arrays
+   __le16 flags;  // 0x0E: See RESTART_SINGLE_PAGE_IO
+   __le32 seq_num_bits;   // 0x10: the number of bits in sequence number.
+   __le16 ra_len; // 0x14:
+   __le16 client_off; // 0x16:
+   __le64 l_size; // 0x18: Usable log file size.
+   __le32 last_lsn_data_len; // 0x20:
+   __le16 rec_hdr_len;// 0x24: log page data offset
+   __le16 data_off;   // 0x26: log page data length
+   __le32 open_log_count; // 0x28:
+   __le32 align[5];   // 0x2C:
+   struct CLIENT_REC clients[1]; // 0x40:
+};
+
+struct LOG_REC_HDR {
+   __le16 redo_op;  // 0x00:  NTFS_LOG_OPERATION
+   __le16 undo_op;  // 0x02:  NTFS_LOG_OPERATION
+   __le16 redo_off; // 0x04:  Offset to Redo record
+   __le16 redo_len; // 0x06:  Redo length
+   __le16 undo_off; // 0x08:  Offset to Undo record
+   __le16 undo_len; // 0x0A:  Undo length
+   __le16 target_attr;  // 0x0C:
+   __le16 lcns_follow;  // 0x0E:
+   __le16 record_off;   // 0x10:
+   __le16 attr_off; // 0x12:
+   __le16 cluster_off;  // 0x14:
+   __le16 reserved; // 0x16:
+   __le64 target_vcn;   // 0x18:
+   __le64 page_lcns[1]; // 0x20:
+};
+
+static_assert(sizeof(struct LOG_REC_HDR) == 0x28);
+
+#define RESTART_ENTRY_ALLOCATED0x
+#define RESTART_ENTRY_ALLOCATED_LE cpu_to_le32(0x)
+
+struct RESTART_TABLE {
+   __le16 size;   // 0x00:  In bytes
+   __le16 used;   // 0x02: entries
+   __le16 total;  // 0x04: entries
+   __le16 res[3]; // 0x06:
+   __le32 free_goal;  // 0x0C:
+   __le32 first_free; // 0x10
+   __le32 last_free;  // 0x14
+
+};
+
+static_assert(sizeof(struct RESTART_TABLE) == 0x18);
+
+struct ATTR_NAME_ENTRY {
+   __le16 off; // offset in the Open attribute Table
+   __le16 name_bytes;
+   __le16 name[1];
+};
+
+struct OPEN_ATTR_ENRTY {
+   __le32 next;// 0x00: RESTART_ENTRY_ALLOCATED if allocated
+   __le32 bytes_per_index; // 0x04:
+   enum ATTR_TYPE type;// 0x08:
+   u8 is_dirty_pages;  // 0x0C:
+   u8 is_attr_name;// 0x0B: Faked field to manage 'ptr'
+   u8 name_len;// 0x0C: Faked field to manage 'ptr'
+   u8 res;
+   struct MFT_REF ref; // 0x10: File Reference of file containing attribute
+   __le64 open_record_lsn; // 0x18:
+   void *ptr;  // 0x20:
+};
+
+/* 32 bit version of 'struct OPEN_ATTR_ENRTY' */
+struct OPEN_ATTR_ENRTY_32 {
+   __le32 next;// 0x00: RESTART_ENTRY_ALLOCATED if allocated
+   __le32 ptr; // 0x04:
+   struct MFT_REF ref; // 0x08:
+   __le64 open_record_lsn; // 0x10:
+   u8 is_dirty_pages;  // 0x18:
+   u8 is_attr_name;// 0x19
+   u8 res1[2];
+   enum ATTR_TYPE type;// 0x1C:
+   u8 name_len;// 0x20:  in wchar
+   u8 res2[3];
+   __le32 AttributeName;   // 0x24:
+ 

[PATCH v16 08/10] fs/ntfs3: Add Kconfig, Makefile and doc

[Konstantin Komarov]

This adds Kconfig, Makefile and doc

Signed-off-by: Konstantin Komarov 
---
 Documentation/filesystems/ntfs3.rst | 107 
 fs/ntfs3/Kconfig|  41 +++
 fs/ntfs3/Makefile   |  31 
 3 files changed, 179 insertions(+)
 create mode 100644 Documentation/filesystems/ntfs3.rst
 create mode 100644 fs/ntfs3/Kconfig
 create mode 100644 fs/ntfs3/Makefile

diff --git a/Documentation/filesystems/ntfs3.rst 
b/Documentation/filesystems/ntfs3.rst
new file mode 100644
index ..fb29067360cc
--- /dev/null
+++ b/Documentation/filesystems/ntfs3.rst
@@ -0,0 +1,107 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+=
+NTFS3
+=
+
+
+Summary and Features
+
+
+NTFS3 is fully functional NTFS Read-Write driver. The driver works with
+NTFS versions up to 3.1, normal/compressed/sparse files
+and journal replaying. File system type to use on mount is 'ntfs3'.
+
+- This driver implements NTFS read/write support for normal, sparse and
+  compressed files.
+- Supports native journal replaying;
+- Supports extended attributes
+   Predefined extended attributes:
+   - 'system.ntfs_security' gets/sets security
+   descriptor (SECURITY_DESCRIPTOR_RELATIVE)
+   - 'system.ntfs_attrib' gets/sets ntfs file/dir attributes.
+   Note: applied to empty files, this allows to switch type between
+   sparse(0x200), compressed(0x800) and normal;
+- Supports NFS export of mounted NTFS volumes.
+
+Mount Options
+=
+
+The list below describes mount options supported by NTFS3 driver in addition to
+generic ones.
+
+===
+
+nls=name   This option informs the driver how to interpret path
+   strings and translate them to Unicode and back. If
+   this option is not set, the default codepage will be
+   used (CONFIG_NLS_DEFAULT).
+   Examples:
+   'nls=utf8'
+
+uid=
+gid=
+umask= Controls the default permissions for files/directories 
created
+   after the NTFS volume is mounted.
+
+fmask=
+dmask= Instead of specifying umask which applies both to
+   files and directories, fmask applies only to files and
+   dmask only to directories.
+
+nohidden   Files with the Windows-specific HIDDEN 
(FILE_ATTRIBUTE_HIDDEN)
+   attribute will not be shown under Linux.
+
+sys_immutable  Files with the Windows-specific SYSTEM
+   (FILE_ATTRIBUTE_SYSTEM) attribute will be marked as 
system
+   immutable files.
+
+discardEnable support of the TRIM command for improved 
performance
+   on delete operations, which is recommended for use with 
the
+   solid-state drives (SSD).
+
+force  Forces the driver to mount partitions even if 'dirty' 
flag
+   (volume dirty) is set. Not recommended for use.
+
+sparse Create new files as "sparse".
+
+showmeta   Use this parameter to show all meta-files (System 
Files) on
+   a mounted NTFS partition.
+   By default, all meta-files are hidden.
+
+prealloc   Preallocate space for files excessively when file size 
is
+   increasing on writes. Decreases fragmentation in case of
+   parallel write operations to different files.
+
+no_acs_rules   "No access rules" mount option sets access rights for
+   files/folders to 777 and owner/group to root. This mount
+   option absorbs all other permissions:
+   - permissions change for files/folders will be reported
+   as successful, but they will remain 777;
+   - owner/group change will be reported as successful, but
+   they will stay as root
+
+aclSupport POSIX ACLs (Access Control Lists). Effective if
+   supported by Kernel. Not to be confused with NTFS ACLs.
+   The option specified as acl enables support for POSIX 
ACLs.
+
+noatimeAll files and directories will not update their 
last access
+   time attribute if a partition is mounted with this 
parameter.
+   This option can speed up file system operation.
+
+===
+
+ToDo list
+=
+
+- Full journaling support (currently journal replaying is supported) over JBD.
+
+
+References
+==
+https://www.paragon-software.com/home/ntfs-linux-professional/
+

[PATCH v16 03/10] fs/ntfs3: Add bitmap

[Konstantin Komarov]

This adds bitmap

Signed-off-by: Konstantin Komarov 
---
 fs/ntfs3/bitfunc.c |  135 
 fs/ntfs3/bitmap.c  | 1504 
 2 files changed, 1639 insertions(+)
 create mode 100644 fs/ntfs3/bitfunc.c
 create mode 100644 fs/ntfs3/bitmap.c

diff --git a/fs/ntfs3/bitfunc.c b/fs/ntfs3/bitfunc.c
new file mode 100644
index ..2d43d718d645
--- /dev/null
+++ b/fs/ntfs3/bitfunc.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *
+ * Copyright (C) 2019-2020 Paragon Software GmbH, All rights reserved.
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include "debug.h"
+#include "ntfs.h"
+#include "ntfs_fs.h"
+
+#define BITS_IN_SIZE_T (sizeof(size_t) * 8)
+
+/*
+ * fill_mask[i] - first i bits are '1' , i = 0,1,2,3,4,5,6,7,8
+ * fill_mask[i] = 0xFF >> (8-i)
+ */
+static const u8 fill_mask[] = { 0x00, 0x01, 0x03, 0x07, 0x0F,
+   0x1F, 0x3F, 0x7F, 0xFF };
+
+/*
+ * zero_mask[i] - first i bits are '0' , i = 0,1,2,3,4,5,6,7,8
+ * zero_mask[i] = 0xFF << i
+ */
+static const u8 zero_mask[] = { 0xFF, 0xFE, 0xFC, 0xF8, 0xF0,
+   0xE0, 0xC0, 0x80, 0x00 };
+
+/*
+ * are_bits_clear
+ *
+ * Returns true if all bits [bit, bit+nbits) are zeros "0"
+ */
+bool are_bits_clear(const ulong *lmap, size_t bit, size_t nbits)
+{
+   size_t pos = bit & 7;
+   const u8 *map = (u8 *)lmap + (bit >> 3);
+
+   if (pos) {
+   if (8 - pos >= nbits)
+   return !nbits || !(*map & fill_mask[pos + nbits] &
+  zero_mask[pos]);
+
+   if (*map++ & zero_mask[pos])
+   return false;
+   nbits -= 8 - pos;
+   }
+
+   pos = ((size_t)map) & (sizeof(size_t) - 1);
+   if (pos) {
+   pos = sizeof(size_t) - pos;
+   if (nbits >= pos * 8) {
+   for (nbits -= pos * 8; pos; pos--, map++) {
+   if (*map)
+   return false;
+   }
+   }
+   }
+
+   for (pos = nbits / BITS_IN_SIZE_T; pos; pos--, map += sizeof(size_t)) {
+   if (*((size_t *)map))
+   return false;
+   }
+
+   for (pos = (nbits % BITS_IN_SIZE_T) >> 3; pos; pos--, map++) {
+   if (*map)
+   return false;
+   }
+
+   pos = nbits & 7;
+   if (pos && (*map & fill_mask[pos]))
+   return false;
+
+   // All bits are zero
+   return true;
+}
+
+/*
+ * are_bits_set
+ *
+ * Returns true if all bits [bit, bit+nbits) are ones "1"
+ */
+bool are_bits_set(const ulong *lmap, size_t bit, size_t nbits)
+{
+   u8 mask;
+   size_t pos = bit & 7;
+   const u8 *map = (u8 *)lmap + (bit >> 3);
+
+   if (pos) {
+   if (8 - pos >= nbits) {
+   mask = fill_mask[pos + nbits] & zero_mask[pos];
+   return !nbits || (*map & mask) == mask;
+   }
+
+   mask = zero_mask[pos];
+   if ((*map++ & mask) != mask)
+   return false;
+   nbits -= 8 - pos;
+   }
+
+   pos = ((size_t)map) & (sizeof(size_t) - 1);
+   if (pos) {
+   pos = sizeof(size_t) - pos;
+   if (nbits >= pos * 8) {
+   for (nbits -= pos * 8; pos; pos--, map++) {
+   if (*map != 0xFF)
+   return false;
+   }
+   }
+   }
+
+   for (pos = nbits / BITS_IN_SIZE_T; pos; pos--, map += sizeof(size_t)) {
+   if (*((size_t *)map) != MINUS_ONE_T)
+   return false;
+   }
+
+   for (pos = (nbits % BITS_IN_SIZE_T) >> 3; pos; pos--, map++) {
+   if (*map != 0xFF)
+   return false;
+   }
+
+   pos = nbits & 7;
+   if (pos) {
+   u8 mask = fill_mask[pos];
+
+   if ((*map & mask) != mask)
+   return false;
+   }
+
+   // All bits are ones
+   return true;
+}
diff --git a/fs/ntfs3/bitmap.c b/fs/ntfs3/bitmap.c
new file mode 100644
index ..db7c4567c59a
--- /dev/null
+++ b/fs/ntfs3/bitmap.c
@@ -0,0 +1,1504 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *
+ * Copyright (C) 2019-2020 Paragon Software GmbH, All rights reserved.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "debug.h"
+#include "ntfs.h"
+#include "ntfs_fs.h"
+
+struct rb_node_key {
+   struct rb_node node;
+   size_t key;
+};
+
+/*
+ * Tree is sorted by start (key)
+ */
+struct e_node {
+   struct rb_node_key start; /* Tree sorted by start */
+   struct rb_node_key count; /* Tree sorted by len*/
+};
+
+static int wnd_rescan(struct wnd_bitmap *wnd);
+static struct buffer_head *wnd_map(struct wnd_bitmap *wnd, size_t iw);
+static bool wnd_is_free_hlp(struct wnd

[PATCH v16 10/10] fs/ntfs3: Add MAINTAINERS

[Konstantin Komarov]

This adds MAINTAINERS

Signed-off-by: Konstantin Komarov 
---
 MAINTAINERS | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 32944ecc5733..5260e1939798 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12674,6 +12674,13 @@ T: git 
git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs.git
 F: Documentation/filesystems/ntfs.rst
 F: fs/ntfs/
 
+NTFS3 FILESYSTEM
+M: Konstantin Komarov 
+S: Supported
+W: http://www.paragon-software.com/
+F: Documentation/filesystems/ntfs3.rst
+F: fs/ntfs3/
+
 NUBUS SUBSYSTEM
 M: Finn Thain 
 L: linux-m...@lists.linux-m68k.org
-- 
2.25.4

[PATCH] ring-buffer: Remove cpu_buffer argument from the rb_inc_page()

[Qiujun Huang]

The cpu_buffer argument is not used inside the rb_inc_page() after
commit 3adc54fa82a6 ("ring-buffer: make the buffer a true circular link
list").
And cpu_buffer argument is not used inside the two functions too,
rb_is_head_page/rb_set_list_to_head.

Signed-off-by: Qiujun Huang 
---
 kernel/trace/ring_buffer.c | 35 ---
 1 file changed, 16 insertions(+), 19 deletions(-)

diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index ec08f948dd80..8fccee76a5f3 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -1112,8 +1112,7 @@ static struct list_head *rb_list_head(struct list_head 
*list)
  * its flags will be non zero.
  */
 static inline int
-rb_is_head_page(struct ring_buffer_per_cpu *cpu_buffer,
-   struct buffer_page *page, struct list_head *list)
+rb_is_head_page(struct buffer_page *page, struct list_head *list)
 {
unsigned long val;
 
@@ -1142,8 +1141,7 @@ static bool rb_is_reader_page(struct buffer_page *page)
 /*
  * rb_set_list_to_head - set a list_head to be pointing to head.
  */
-static void rb_set_list_to_head(struct ring_buffer_per_cpu *cpu_buffer,
-   struct list_head *list)
+static void rb_set_list_to_head(struct list_head *list)
 {
unsigned long *ptr;
 
@@ -1166,7 +1164,7 @@ static void rb_head_page_activate(struct 
ring_buffer_per_cpu *cpu_buffer)
/*
 * Set the previous list pointer to have the HEAD flag.
 */
-   rb_set_list_to_head(cpu_buffer, head->list.prev);
+   rb_set_list_to_head(head->list.prev);
 }
 
 static void rb_list_head_clear(struct list_head *list)
@@ -1241,8 +1239,7 @@ static int rb_head_page_set_normal(struct 
ring_buffer_per_cpu *cpu_buffer,
old_flag, RB_PAGE_NORMAL);
 }
 
-static inline void rb_inc_page(struct ring_buffer_per_cpu *cpu_buffer,
-  struct buffer_page **bpage)
+static inline void rb_inc_page(struct buffer_page **bpage)
 {
struct list_head *p = rb_list_head((*bpage)->list.next);
 
@@ -1274,11 +1271,11 @@ rb_set_head_page(struct ring_buffer_per_cpu *cpu_buffer)
 */
for (i = 0; i < 3; i++) {
do {
-   if (rb_is_head_page(cpu_buffer, page, page->list.prev)) 
{
+   if (rb_is_head_page(page, page->list.prev)) {
cpu_buffer->head_page = page;
return page;
}
-   rb_inc_page(cpu_buffer, &page);
+   rb_inc_page(&page);
} while (page != head);
}
 
@@ -1824,7 +1821,7 @@ rb_remove_pages(struct ring_buffer_per_cpu *cpu_buffer, 
unsigned long nr_pages)
cond_resched();
 
to_remove_page = tmp_iter_page;
-   rb_inc_page(cpu_buffer, &tmp_iter_page);
+   rb_inc_page(&tmp_iter_page);
 
/* update the counters */
page_entries = rb_page_entries(to_remove_page);
@@ -2271,7 +2268,7 @@ static void rb_inc_iter(struct ring_buffer_iter *iter)
if (iter->head_page == cpu_buffer->reader_page)
iter->head_page = rb_set_head_page(cpu_buffer);
else
-   rb_inc_page(cpu_buffer, &iter->head_page);
+   rb_inc_page(&iter->head_page);
 
iter->page_stamp = iter->read_stamp = iter->head_page->page->time_stamp;
iter->head = 0;
@@ -2374,7 +2371,7 @@ rb_handle_head_page(struct ring_buffer_per_cpu 
*cpu_buffer,
 * want the outer most commit to reset it.
 */
new_head = next_page;
-   rb_inc_page(cpu_buffer, &new_head);
+   rb_inc_page(&new_head);
 
ret = rb_head_page_set_head(cpu_buffer, new_head, next_page,
RB_PAGE_NORMAL);
@@ -2526,7 +2523,7 @@ rb_move_tail(struct ring_buffer_per_cpu *cpu_buffer,
 
next_page = tail_page;
 
-   rb_inc_page(cpu_buffer, &next_page);
+   rb_inc_page(&next_page);
 
/*
 * If for some reason, we had an interrupt storm that made
@@ -2552,7 +2549,7 @@ rb_move_tail(struct ring_buffer_per_cpu *cpu_buffer,
 * the buffer, unless the commit page is still on the
 * reader page.
 */
-   if (rb_is_head_page(cpu_buffer, next_page, &tail_page->list)) {
+   if (rb_is_head_page(next_page, &tail_page->list)) {
 
/*
 * If the commit is not on the reader page, then
@@ -2879,7 +2876,7 @@ rb_set_commit_to_write(struct ring_buffer_per_cpu 
*cpu_buffer)
return;
local_set(&cpu_buffer->commit_page->page->commit,
  rb_page_write(cpu_buffer->commit_page));
-   rb_inc_page(cpu_buffer, &cpu_buffer->commit_page);
+   rb_inc_page(&cpu_buffer->commit_page);
/* add barrier to keep gcc from optimizing too much */
barrier();
  

[PATCH v3 3/3] drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs

[Gabriel Somlo]

Upstream LiteX now defaults to using 32-bit CSR subregisters
(see https://github.com/enjoy-digital/litex/commit/a2b71fde).

This patch expands on commit 22447a99c97e ("drivers/soc/litex: add
LiteX SoC Controller driver"), adding support for handling both 8-
and 32-bit LiteX CSR (MMIO) subregisters, as determined by the
LITEX_SUBREG_SIZE Kconfig option.

NOTE that while LITEX_SUBREG_SIZE could theoretically be a device
tree property, defining it as a compile-time constant allows for
much better optimization of the resulting code. This is further
supported by the low expected usefulness of deploying the same
kernel across LiteX SoCs built with different CSR-Bus data widths.

The constant LITEX_SUBREG_SIZE is renamed to the more descriptive
LITEX_SUBREG_ALIGN (LiteX CSR subregisters are located at 32-bit
aligned MMIO addresses).

Finally, the litex_[read|write][8|16|32|64]() accessors are
redefined in terms of litex_[get|set]_reg(), which, after compiler
optimization, will result in code as efficient as hardcoded shifts,
but with the added benefit of automatically matching the appropriate
LITEX_SUBREG_SIZE.

NOTE that litex_[get|set]_reg() nominally operate 64-bit data, but
that too will be optimized away by the compiler in situations where
narrower data is used.

Signed-off-by: Gabriel Somlo 
---
 drivers/soc/litex/Kconfig  |  12 +++
 drivers/soc/litex/litex_soc_ctrl.c |   3 +-
 include/linux/litex.h  | 139 -
 3 files changed, 70 insertions(+), 84 deletions(-)

diff --git a/drivers/soc/litex/Kconfig b/drivers/soc/litex/Kconfig
index 7c6b009b6f6c..973f8d2fe1a7 100644
--- a/drivers/soc/litex/Kconfig
+++ b/drivers/soc/litex/Kconfig
@@ -16,4 +16,16 @@ config LITEX_SOC_CONTROLLER
  All drivers that use functions from litex.h must depend on
  LITEX.
 
+config LITEX_SUBREG_SIZE
+   int "Size of a LiteX CSR subregister, in bytes"
+   depends on LITEX
+   range 1 4
+   default 4
+   help
+   LiteX MMIO registers (referred to as Configuration and Status
+   registers, or CSRs) are spread across adjacent 8- or 32-bit
+   subregisters, located at 32-bit aligned MMIO addresses. Use
+   this to select the appropriate size (1 or 4 bytes) matching
+   your particular LiteX build.
+
 endmenu
diff --git a/drivers/soc/litex/litex_soc_ctrl.c 
b/drivers/soc/litex/litex_soc_ctrl.c
index 65977526d68e..da17ba56b795 100644
--- a/drivers/soc/litex/litex_soc_ctrl.c
+++ b/drivers/soc/litex/litex_soc_ctrl.c
@@ -58,7 +58,8 @@ static int litex_check_csr_access(void __iomem *reg_addr)
/* restore original value of the SCRATCH register */
litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_REG_VALUE);
 
-   pr_info("LiteX SoC Controller driver initialized");
+   pr_info("LiteX SoC Controller driver initialized: subreg:%d, align:%d",
+   LITEX_SUBREG_SIZE, LITEX_SUBREG_ALIGN);
 
return 0;
 }
diff --git a/include/linux/litex.h b/include/linux/litex.h
index 918bab45243c..53fb03a2f257 100644
--- a/include/linux/litex.h
+++ b/include/linux/litex.h
@@ -10,20 +10,19 @@
 #define _LINUX_LITEX_H
 
 #include 
-#include 
-#include 
 
-/*
- * The parameters below are true for LiteX SoCs configured for 8-bit CSR Bus,
- * 32-bit aligned.
- *
- * Supporting other configurations will require extending the logic in this
- * header and in the LiteX SoC controller driver.
- */
-#define LITEX_REG_SIZE   0x4
-#define LITEX_SUBREG_SIZE  0x1
+/* LiteX SoCs support 8- or 32-bit CSR Bus data width (i.e., subreg. size) */
+#if defined(CONFIG_LITEX_SUBREG_SIZE) && \
+   (CONFIG_LITEX_SUBREG_SIZE == 1 || CONFIG_LITEX_SUBREG_SIZE == 4)
+#define LITEX_SUBREG_SIZE  CONFIG_LITEX_SUBREG_SIZE
+#else
+#error LiteX subregister size (LITEX_SUBREG_SIZE) must be 4 or 1!
+#endif
 #define LITEX_SUBREG_SIZE_BIT   (LITEX_SUBREG_SIZE * 8)
 
+/* LiteX subregisters of any width are always aligned on a 4-byte boundary */
+#define LITEX_SUBREG_ALIGN   0x4
+
 static inline void _write_litex_subregister(u32 val, void __iomem *addr)
 {
writel((u32 __force)cpu_to_le32(val), addr);
@@ -34,25 +33,31 @@ static inline u32 _read_litex_subregister(void __iomem 
*addr)
return le32_to_cpu((__le32 __force)readl(addr));
 }
 
-#define WRITE_LITEX_SUBREGISTER(val, base_offset, subreg_id) \
-   _write_litex_subregister(val, (base_offset) + \
-   LITEX_REG_SIZE * (subreg_id))
-
-#define READ_LITEX_SUBREGISTER(base_offset, subreg_id) \
-   _read_litex_subregister((base_offset) + \
-   LITEX_REG_SIZE * (subreg_id))
-
 /*
  * LiteX SoC Generator, depending on the configuration, can split a single
  * logical CSR (Control&Status Register) into a series of consecutive physical
  * registers.
  *
- * For example, in the configuration with 8-bit CSR Bus, 32-bit aligned (the
- * default one for 32-bit CPUs) a 32-bit logical CSR will be generated as four
- * 32-b

[PATCH] powerpc/mm: avoid null pointer dereference in flush_tlb_mm

[Defang Bo]

Similar to commit<0dc294f7>, there should be a check for 'mm' to prevent Null 
pointer dereference in case of 'mm' argument was legitimately passed.

Signed-off-by: Defang Bo 
---
 arch/powerpc/mm/nohash/tlb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/mm/nohash/tlb.c b/arch/powerpc/mm/nohash/tlb.c
index 5872f69..09796c9 100644
--- a/arch/powerpc/mm/nohash/tlb.c
+++ b/arch/powerpc/mm/nohash/tlb.c
@@ -268,6 +268,9 @@ void flush_tlb_mm(struct mm_struct *mm)
 {
unsigned int pid;
 
+   if (unlikely(!mm))
+   return;
+
preempt_disable();
pid = mm->context.id;
if (unlikely(pid == MMU_NO_CONTEXT))
-- 
2.7.4

[PATCH v3 2/3] drivers/soc/litex: separate MMIO from subregister offset calculation

[Gabriel Somlo]

Separate MMIO (read/write) access into _[read|write]_litex_subregister()
static inline functions, leaving existing "READ|WRITE" macros to handle
calculation of the subregister offset only.

NOTE: this is a non-functional change.

Signed-off-by: Gabriel Somlo 
---
 include/linux/litex.h | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/include/linux/litex.h b/include/linux/litex.h
index 67c1a18a7425..918bab45243c 100644
--- a/include/linux/litex.h
+++ b/include/linux/litex.h
@@ -24,11 +24,23 @@
 #define LITEX_SUBREG_SIZE  0x1
 #define LITEX_SUBREG_SIZE_BIT   (LITEX_SUBREG_SIZE * 8)
 
+static inline void _write_litex_subregister(u32 val, void __iomem *addr)
+{
+   writel((u32 __force)cpu_to_le32(val), addr);
+}
+
+static inline u32 _read_litex_subregister(void __iomem *addr)
+{
+   return le32_to_cpu((__le32 __force)readl(addr));
+}
+
 #define WRITE_LITEX_SUBREGISTER(val, base_offset, subreg_id) \
-   writel((u32 __force)cpu_to_le32(val), base_offset + (LITEX_REG_SIZE * 
subreg_id))
+   _write_litex_subregister(val, (base_offset) + \
+   LITEX_REG_SIZE * (subreg_id))
 
 #define READ_LITEX_SUBREGISTER(base_offset, subreg_id) \
-   le32_to_cpu((__le32 __force)readl(base_offset + (LITEX_REG_SIZE * 
subreg_id)))
+   _read_litex_subregister((base_offset) + \
+   LITEX_REG_SIZE * (subreg_id))
 
 /*
  * LiteX SoC Generator, depending on the configuration, can split a single
-- 
2.26.2

[PATCH v3 1/3] drivers/soc/litex: move generic accessors to litex.h

[Gabriel Somlo]

Move generic LiteX CSR (MMIO) register accessors to litex.h and
declare them as "static inline", in preparation for supporting
32-bit CSR subregisters and 64-bit CPUs.

NOTE: this is a non-functional change.

Signed-off-by: Gabriel Somlo 
---
 drivers/soc/litex/litex_soc_ctrl.c | 73 -
 include/linux/litex.h  | 74 --
 2 files changed, 69 insertions(+), 78 deletions(-)

diff --git a/drivers/soc/litex/litex_soc_ctrl.c 
b/drivers/soc/litex/litex_soc_ctrl.c
index 1217cafdfd4d..65977526d68e 100644
--- a/drivers/soc/litex/litex_soc_ctrl.c
+++ b/drivers/soc/litex/litex_soc_ctrl.c
@@ -16,79 +16,6 @@
 #include 
 #include 
 
-/*
- * LiteX SoC Generator, depending on the configuration, can split a single
- * logical CSR (Control&Status Register) into a series of consecutive physical
- * registers.
- *
- * For example, in the configuration with 8-bit CSR Bus, 32-bit aligned (the
- * default one for 32-bit CPUs) a 32-bit logical CSR will be generated as four
- * 32-bit physical registers, each one containing one byte of meaningful data.
- *
- * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus
- *
- * The purpose of `litex_set_reg`/`litex_get_reg` is to implement the logic
- * of writing to/reading from the LiteX CSR in a single place that can be
- * then reused by all LiteX drivers.
- */
-
-/**
- * litex_set_reg() - Writes the value to the LiteX CSR (Control&Status 
Register)
- * @reg: Address of the CSR
- * @reg_size: The width of the CSR expressed in the number of bytes
- * @val: Value to be written to the CSR
- *
- * In the currently supported LiteX configuration (8-bit CSR Bus, 32-bit 
aligned),
- * a 32-bit LiteX CSR is generated as 4 consecutive 32-bit physical registers,
- * each one containing one byte of meaningful data.
- *
- * This function splits a single possibly multi-byte write into a series of
- * single-byte writes with a proper offset.
- */
-void litex_set_reg(void __iomem *reg, unsigned long reg_size,
-   unsigned long val)
-{
-   unsigned long shifted_data, shift, i;
-
-   for (i = 0; i < reg_size; ++i) {
-   shift = ((reg_size - i - 1) * LITEX_SUBREG_SIZE_BIT);
-   shifted_data = val >> shift;
-
-   WRITE_LITEX_SUBREGISTER(shifted_data, reg, i);
-   }
-}
-EXPORT_SYMBOL_GPL(litex_set_reg);
-
-/**
- * litex_get_reg() - Reads the value of the LiteX CSR (Control&Status Register)
- * @reg: Address of the CSR
- * @reg_size: The width of the CSR expressed in the number of bytes
- *
- * Return: Value read from the CSR
- *
- * In the currently supported LiteX configuration (8-bit CSR Bus, 32-bit 
aligned),
- * a 32-bit LiteX CSR is generated as 4 consecutive 32-bit physical registers,
- * each one containing one byte of meaningful data.
- *
- * This function generates a series of single-byte reads with a proper offset
- * and joins their results into a single multi-byte value.
- */
-unsigned long litex_get_reg(void __iomem *reg, unsigned long reg_size)
-{
-   unsigned long shifted_data, shift, i;
-   unsigned long result = 0;
-
-   for (i = 0; i < reg_size; ++i) {
-   shifted_data = READ_LITEX_SUBREGISTER(reg, i);
-
-   shift = ((reg_size - i - 1) * LITEX_SUBREG_SIZE_BIT);
-   result |= (shifted_data << shift);
-   }
-
-   return result;
-}
-EXPORT_SYMBOL_GPL(litex_get_reg);
-
 #define SCRATCH_REG_OFF 0x04
 #define SCRATCH_REG_VALUE   0x12345678
 #define SCRATCH_TEST_VALUE  0xdeadbeef
diff --git a/include/linux/litex.h b/include/linux/litex.h
index 40f5be503593..67c1a18a7425 100644
--- a/include/linux/litex.h
+++ b/include/linux/litex.h
@@ -3,9 +3,6 @@
  * Common LiteX header providing
  * helper functions for accessing CSRs.
  *
- * Implementation of the functions is provided by
- * the LiteX SoC Controller driver.
- *
  * Copyright (C) 2019-2020 Antmicro 
  */
 
@@ -33,9 +30,76 @@
 #define READ_LITEX_SUBREGISTER(base_offset, subreg_id) \
le32_to_cpu((__le32 __force)readl(base_offset + (LITEX_REG_SIZE * 
subreg_id)))
 
-void litex_set_reg(void __iomem *reg, unsigned long reg_sz, unsigned long val);
+/*
+ * LiteX SoC Generator, depending on the configuration, can split a single
+ * logical CSR (Control&Status Register) into a series of consecutive physical
+ * registers.
+ *
+ * For example, in the configuration with 8-bit CSR Bus, 32-bit aligned (the
+ * default one for 32-bit CPUs) a 32-bit logical CSR will be generated as four
+ * 32-bit physical registers, each one containing one byte of meaningful data.
+ *
+ * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus
+ *
+ * The purpose of `litex_set_reg`/`litex_get_reg` is to implement the logic
+ * of writing to/reading from the LiteX CSR in a single place that can be
+ * then reused by all LiteX drivers.
+ */
+
+/**
+ * litex_set_reg() - Writes the value to the LiteX CSR (Control&Status 
Register)
+ * @reg: Add

[PATCH v3 0/3] drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs

[Gabriel Somlo]

This series expands on commit 22447a99c97e ("drivers/soc/litex: add LiteX
SoC Controller driver"), adding support for handling both 8- and 32-bit
LiteX CSR (MMIO) subregisters, on both 32- and 64-bit CPUs.

Notes v3:
- split into smaller, more self-explanatory patches
- more detailed commit blurb for "main payload" (3/3) patch
- eliminate compiler warning on 32-bit architectures

Notes v2:
- fix typo (s/u32/u64/) in litex_read64().

Notes v1:
- LITEX_SUBREG_SIZE now provided by Kconfig.
- it's not LITEX_REG_SIZE, but rather LITEX_SUBREG_ALIGN!
- move litex_[get|set]_reg() to include/linux/litex.h and mark
  them as "static inline";
- redo litex_[read|write][8|16|32|64]() using litex_[get|set]_reg()
  (compiler should produce code as efficient as hardcoded shifts,
   but also automatically matching LITEX_SUBREG_SIZE).

Gabriel Somlo (3):
  drivers/soc/litex: move generic accessors to litex.h
  drivers/soc/litex: separate MMIO from subregister offset calculation
  drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs

 drivers/soc/litex/Kconfig  |  12 +++
 drivers/soc/litex/litex_soc_ctrl.c |  76 +--
 include/linux/litex.h  | 149 +++--
 3 files changed, 113 insertions(+), 124 deletions(-)

-- 
2.26.2

undefined reference to `cmd_db_read_addr'

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   71c5f03154ac1cb27423b984743ccc2f5d11d14d
commit: 778279f4f5e4e89ff31803ba48135256563825c2 soc: qcom: cmd-db: allow 
loading as a module
date:   9 weeks ago
config: microblaze-randconfig-r026-20201224 (attached as .config)
compiler: microblaze-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=778279f4f5e4e89ff31803ba48135256563825c2
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 778279f4f5e4e89ff31803ba48135256563825c2
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=microblaze 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   microblaze-linux-ld: drivers/regulator/qcom-rpmh-regulator.o: in function 
`rpmh_regulator_probe':
>> (.text+0x354): undefined reference to `cmd_db_read_addr'

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[PATCH] trace: Remove get/put_cpu() from function_trace_init

[Qiujun Huang]

Since commit b6f11df26fdc ("trace: Call tracing_reset_online_cpus before
tracer->init()"), get/put_cpu() are not needed anymore.
We can use smp_processor_id() instead.

Signed-off-by: Qiujun Huang 
---
 kernel/trace/trace_functions.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/kernel/trace/trace_functions.c b/kernel/trace/trace_functions.c
index c5095dd28e20..e36fbb935017 100644
--- a/kernel/trace/trace_functions.c
+++ b/kernel/trace/trace_functions.c
@@ -106,8 +106,7 @@ static int function_trace_init(struct trace_array *tr)
 
ftrace_init_array_ops(tr, func);
 
-   tr->array_buffer.cpu = get_cpu();
-   put_cpu();
+   tr->array_buffer.cpu = smp_processor_id();
 
tracing_start_cmdline_record();
tracing_start_function_trace(tr);
-- 
2.17.1

Re: [PATCH v1 1/1] driver: watchdog: Remove mtk_wdt_stop() in probe() to prevent the system freeze and it doesn't reboot by watchdog problem

[Guenter Roeck]

On 12/24/20 11:30 PM, Freddy Hsin wrote:
> From: "freddy.hsin" 
> 
> Before user space daemon start to access the watchdog device,
> there is a time interval that watchdog is disabled in the
> original flow. If the system freezing at this interval, it
> cannot be rebooted by watchdog hardware automatically.
> 
> In order to solve this problem, the watchdog hardware should be
> kept working, and start hrtimer in framework to ping it by
> setting max_hw_heartbeat_ms and HW_RUNNING used in
> watchdog_need_worker to determine whether the worker should be
> started or not
> 
> Change-Id: I6a041b0922888a90011d7538ee804d80bc8d15ea
> Signed-off-by: freddy.hsin 
> ---
>  drivers/watchdog/mtk_wdt.c |   22 ++
>  1 file changed, 18 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index d6a6393..62f08cd 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -195,6 +195,19 @@ static int mtk_wdt_set_timeout(struct watchdog_device 
> *wdt_dev,
>   return 0;
>  }
>  
> +static void mtk_wdt_init(struct watchdog_device *wdt_dev)
> +{
> + struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
> + void __iomem *wdt_base;
> +
> + wdt_base = mtk_wdt->wdt_base;
> +
> + if (readl(wdt_base + WDT_MODE) & WDT_MODE_EN) {
> + set_bit(WDOG_HW_RUNNING, &wdt_dev->status);
> + mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
> + }
> +}
> +
>  static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
>  {
>   struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
> @@ -266,16 +279,17 @@ static int mtk_wdt_probe(struct platform_device *pdev)
>   mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
>   mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;

No longer needed if max_hw_heartbeat_ms is set.

>   mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
> + mtk_wdt->wdt_dev.max_hw_heartbeat_ms = (WDT_MAX_TIMEOUT - 1) * 1000;

This needs explanation. Why WDT_MAX_TIMEOUT - 1 ?

>   mtk_wdt->wdt_dev.parent = dev;
>  
> + watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
> +
> + mtk_wdt_init(&mtk_wdt->wdt_dev);
> +

Setting the chip (with the maximum timeout) ...

>   watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, dev);

just before initializing/setting the real timeout doesn't really make sense.

>   watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
>   watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
>  
> - watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
> -
> - mtk_wdt_stop(&mtk_wdt->wdt_dev);
> -
>   watchdog_stop_on_reboot(&mtk_wdt->wdt_dev);
>   err = devm_watchdog_register_device(dev, &mtk_wdt->wdt_dev);
>   if (unlikely(err))
> 

RE: [PATCH v14 06/10] fs/ntfs3: Add compression

[Konstantin Komarov]

From: Konstantin Komarov
> Sent: Friday, December 11, 2020 7:28 PM
> To: 'Eric Biggers' 
> Cc: linux-fsde...@vger.kernel.org; v...@zeniv.linux.org.uk; 
> linux-kernel@vger.kernel.org; p...@kernel.org; dste...@suse.cz;
> aap...@suse.com; wi...@infradead.org; rdun...@infradead.org; 
> j...@perches.com; m...@harmstone.com; nbori...@suse.com;
> linux-ntfs-...@lists.sourceforge.net; an...@tuxera.com; 
> dan.carpen...@oracle.com; h...@lst.de
> Subject: RE: [PATCH v14 06/10] fs/ntfs3: Add compression
> 
> From: Eric Biggers 
> Sent: Friday, December 4, 2020 9:39 PM
> > To: Konstantin Komarov 
> > Cc: linux-fsde...@vger.kernel.org; v...@zeniv.linux.org.uk; 
> > linux-kernel@vger.kernel.org; p...@kernel.org; dste...@suse.cz;
> > aap...@suse.com; wi...@infradead.org; rdun...@infradead.org; 
> > j...@perches.com; m...@harmstone.com; nbori...@suse.com;
> > linux-ntfs-...@lists.sourceforge.net; an...@tuxera.com; 
> > dan.carpen...@oracle.com; h...@lst.de
> > Subject: Re: [PATCH v14 06/10] fs/ntfs3: Add compression
> >
> > On Fri, Dec 04, 2020 at 06:45:56PM +0300, Konstantin Komarov wrote:
> > > This adds compression
> > >
> > > Signed-off-by: Konstantin Komarov 
> > > 
> > > ---
> > >  fs/ntfs3/lib/common_defs.h   | 196 +++
> > >  fs/ntfs3/lib/decompress_common.c | 314 +
> > >  fs/ntfs3/lib/decompress_common.h | 558 +++
> > >  fs/ntfs3/lib/lzx_common.c| 204 +++
> > >  fs/ntfs3/lib/lzx_common.h|  31 ++
> > >  fs/ntfs3/lib/lzx_constants.h | 113 +++
> > >  fs/ntfs3/lib/lzx_decompress.c| 553 ++
> > >  fs/ntfs3/lib/xpress_constants.h  |  23 ++
> > >  fs/ntfs3/lib/xpress_decompress.c | 165 +
> > >  fs/ntfs3/lznt.c  | 452 +
> > >  10 files changed, 2609 insertions(+)
> > >  create mode 100644 fs/ntfs3/lib/common_defs.h
> > >  create mode 100644 fs/ntfs3/lib/decompress_common.c
> > >  create mode 100644 fs/ntfs3/lib/decompress_common.h
> > >  create mode 100644 fs/ntfs3/lib/lzx_common.c
> > >  create mode 100644 fs/ntfs3/lib/lzx_common.h
> > >  create mode 100644 fs/ntfs3/lib/lzx_constants.h
> > >  create mode 100644 fs/ntfs3/lib/lzx_decompress.c
> > >  create mode 100644 fs/ntfs3/lib/xpress_constants.h
> > >  create mode 100644 fs/ntfs3/lib/xpress_decompress.c
> > >  create mode 100644 fs/ntfs3/lznt.c
> >
> > This really could use a much better commit message.  Including mentioning 
> > where
> > the LZX and XPRESS decompression code came from
> > (https://github.com/ebiggers/ntfs-3g-system-compression).
> >
> 
> Hi Eric! Fixed in V15!
> 
> > Also note you've marked the files as "SPDX-License-Identifier: GPL-2.0",
> > but they really are "SPDX-License-Identifier: GPL-2.0-or-later".
> >
> 
> Thanks, fixed as well.
> 
> > Also I still think you should consider using the simpler version from
> > ntfs-3g-system-compression commit 3ddd227ee8e3, which I had originally 
> > intended
> > to be included in NTFS-3G itself.  That version was fewer lines of code and
> > fewer files, as it was simplified for decompression-only.  The latest 
> > version
> > (the one you're using) is shared with a project that also implements 
> > compression
> > (so that I can more easily maintain both projects), so it's more complex 
> > than
> > needed for decompression-only support.  But in the kernel context it may 
> > make
> > sense to go with a simpler version.  There are a few performance 
> > optimizations
> > you'd miss by going with the older version, but they weren't too 
> > significant,
> > and probably you don't need to squeeze out every bit of performance possible
> > when reading XPRESS and LZX-compressed files in this context?
> >
> > - Eric
> 
> We used the newest code initially. Looking at the commit you've pointed out, 
> but it will
> take some time as needs to pass full set of tests with new code. On the 
> differences you've
> mentioned between the first and latest code in ntfs-3g system compression: 
> we've removed
> the optimizations (needed to go into kernel), also the reparse points stuff 
> is being parsed by
> ntfs3 driver itself. Given this, doesn't seems there are many differences 
> remain.
> Also, we'll follow your recommendations, if you highly recommend to stick to 
> the commit
> you've mentioned (but at this moment it seems "newer=better" formula still 
> valid).
> 
> Thanks!

Hi Eric! The code in V16 is now based on the initial ntfs-3g plugin code, just 
as you suggested.

Best regards.

Re: [PATCH v1 1/1] driver: watchdog: Remove mtk_wdt_stop() in probe() to prevent the system freeze and it doesn't reboot by watchdog problem

[Guenter Roeck]

On 12/24/20 11:30 PM, Freddy Hsin wrote:
> From: "freddy.hsin" 
> 
> Before user space daemon start to access the watchdog device,
> there is a time interval that watchdog is disabled in the
> original flow. If the system freezing at this interval, it
> cannot be rebooted by watchdog hardware automatically.
> 
> In order to solve this problem, the watchdog hardware should be
> kept working, and start hrtimer in framework to ping it by
> setting max_hw_heartbeat_ms and HW_RUNNING used in
> watchdog_need_worker to determine whether the worker should be
> started or not
> 
> Change-Id: I6a041b0922888a90011d7538ee804d80bc8d15ea
> Signed-off-by: freddy.hsin 

Also: $subject should refer to mtk_wdt.

watchdog: mtk_wdt: Do not stop watchdog in probe function

or similar.

Thanks,
Guenter

> ---
>  drivers/watchdog/mtk_wdt.c |   22 ++
>  1 file changed, 18 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index d6a6393..62f08cd 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -195,6 +195,19 @@ static int mtk_wdt_set_timeout(struct watchdog_device 
> *wdt_dev,
>   return 0;
>  }
>  
> +static void mtk_wdt_init(struct watchdog_device *wdt_dev)
> +{
> + struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
> + void __iomem *wdt_base;
> +
> + wdt_base = mtk_wdt->wdt_base;
> +
> + if (readl(wdt_base + WDT_MODE) & WDT_MODE_EN) {
> + set_bit(WDOG_HW_RUNNING, &wdt_dev->status);
> + mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
> + }
> +}
> +
>  static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
>  {
>   struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
> @@ -266,16 +279,17 @@ static int mtk_wdt_probe(struct platform_device *pdev)
>   mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
>   mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
>   mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
> + mtk_wdt->wdt_dev.max_hw_heartbeat_ms = (WDT_MAX_TIMEOUT - 1) * 1000;
>   mtk_wdt->wdt_dev.parent = dev;
>  
> + watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
> +
> + mtk_wdt_init(&mtk_wdt->wdt_dev);
> +
>   watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, dev);
>   watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
>   watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
>  
> - watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
> -
> - mtk_wdt_stop(&mtk_wdt->wdt_dev);
> -
>   watchdog_stop_on_reboot(&mtk_wdt->wdt_dev);
>   err = devm_watchdog_register_device(dev, &mtk_wdt->wdt_dev);
>   if (unlikely(err))
> 

RE: [PATCH v14 04/10] fs/ntfs3: Add file operations and implementation

[Konstantin Komarov]

Sent: Friday, December 11, 2020 7:31 PM
> To: 'Eric Biggers' 
> Cc: linux-fsde...@vger.kernel.org; v...@zeniv.linux.org.uk; 
> linux-kernel@vger.kernel.org; p...@kernel.org; dste...@suse.cz;
> aap...@suse.com; wi...@infradead.org; rdun...@infradead.org; 
> j...@perches.com; m...@harmstone.com; nbori...@suse.com;
> linux-ntfs-...@lists.sourceforge.net; an...@tuxera.com; 
> dan.carpen...@oracle.com; h...@lst.de
> Subject: RE: [PATCH v14 04/10] fs/ntfs3: Add file operations and 
> implementation
> 
> From: Eric Biggers 
> Sent: Friday, December 4, 2020 9:42 PM
> > To: Konstantin Komarov 
> > Cc: linux-fsde...@vger.kernel.org; v...@zeniv.linux.org.uk; 
> > linux-kernel@vger.kernel.org; p...@kernel.org; dste...@suse.cz;
> > aap...@suse.com; wi...@infradead.org; rdun...@infradead.org; 
> > j...@perches.com; m...@harmstone.com; nbori...@suse.com;
> > linux-ntfs-...@lists.sourceforge.net; an...@tuxera.com; 
> > dan.carpen...@oracle.com; h...@lst.de
> > Subject: Re: [PATCH v14 04/10] fs/ntfs3: Add file operations and 
> > implementation
> >
> > On Fri, Dec 04, 2020 at 06:45:54PM +0300, Konstantin Komarov wrote:
> > > +/* external compression lzx/xpress */
> > > +static int decompress_lzx_xpress(struct ntfs_sb_info *sbi, const char 
> > > *cmpr,
> > > +  size_t cmpr_size, void *unc, size_t unc_size,
> > > +  u32 frame_size)
> > > +{
> > > + int err;
> > > + void *ctx;
> > > +
> > > + if (cmpr_size == unc_size) {
> > > + /* frame not compressed */
> > > + memcpy(unc, cmpr, unc_size);
> > > + return 0;
> > > + }
> > > +
> > > + err = 0;
> > > + ctx = NULL;
> > > + spin_lock(&sbi->compress.lock);
> > > + if (frame_size == 0x8000) {
> > > + /* LZX: frame compressed */
> > > + if (!sbi->compress.lzx) {
> > > + /* Lazy initialize lzx decompress context */
> > > + spin_unlock(&sbi->compress.lock);
> > > + ctx = lzx_allocate_decompressor(0x8000);
> > > + if (!ctx)
> > > + return -ENOMEM;
> > > + if (IS_ERR(ctx)) {
> > > + /* should never failed */
> > > + err = PTR_ERR(ctx);
> > > + goto out;
> > > + }
> > > +
> > > + spin_lock(&sbi->compress.lock);
> > > + if (!sbi->compress.lzx) {
> > > + sbi->compress.lzx = ctx;
> > > + ctx = NULL;
> > > + }
> > > + }
> > > +
> > > + if (lzx_decompress(sbi->compress.lzx, cmpr, cmpr_size, unc,
> > > +unc_size)) {
> > > + err = -EINVAL;
> > > + }
> > > + } else {
> > > + /* XPRESS: frame compressed */
> > > + if (!sbi->compress.xpress) {
> > > + /* Lazy initialize xpress decompress context */
> > > + spin_unlock(&sbi->compress.lock);
> > > + ctx = xpress_allocate_decompressor();
> > > + if (!ctx)
> > > + return -ENOMEM;
> > > +
> > > + spin_lock(&sbi->compress.lock);
> > > + if (!sbi->compress.xpress) {
> > > + sbi->compress.xpress = ctx;
> > > + ctx = NULL;
> > > + }
> > > + }
> > > +
> > > + if (xpress_decompress(sbi->compress.xpress, cmpr, cmpr_size,
> > > +   unc, unc_size)) {
> > > + err = -EINVAL;
> > > + }
> > > + }
> > > + spin_unlock(&sbi->compress.lock);
> > > +out:
> > > + ntfs_free(ctx);
> > > + return err;
> > > +}
> >
> > Decompression is a somewhat heavyweight operation.  Not the type of thing 
> > that
> > should be done while holding a spin lock.
> >
> > - Eric
> 
> Hi Eric! We plan to swap spinlock to mutex in the next version.
> 
> Best regards!

Hi Eric! Changed the global spinlock to the mutexes for each type of 
compression.
This should resolve the problem. Please check out the V16.

Thanks!

Re: driver: watchdog: Remove mtk_wdt_stop() in probe() to prevent the system freeze and it doesn't reboot by watchdog problem

[Guenter Roeck]

On 12/24/20 11:30 PM, Freddy Hsin wrote:
> Before user space daemon start to access the watchdog device,
> there is a time interval that watchdog is disabled in the
> original flow. If the system freezing at this interval, it
> cannot be rebooted by watchdog hardware automatically.
> 
> In order to solve this problem, the watchdog hardware should be
> kept working, and start hrtimer in framework to ping it by
> setting max_hw_heartbeat_ms and HW_RUNNING used in
> watchdog_need_worker to determine whether the worker should be
> started or not
> 
This intro email is unnecessary.

Guenter

riscv+KASAN does not boot

[Dmitry Vyukov]

Hello,

I am considering setting up a syzbot instance for riscv arch (using
qemu emulation) and testing kernel config/image/etc. I can boot
defconfig+kvmconfig riscv kernel, but so far I can't get a booting
CONFIG_KASAN+CONFIG+KCOV kernel.

But first of all I would like to ask if the riscv port is stable
enough at this point and if there is interest in continuous fuzzing
and receiving bugs? If there is no interest, then the rest is not
worth spending time on.
Second, what git tree/branch should be used for testing (to find bugs
sooner and get fixes faster)?
Currently it seems that riscv/fixes is the most up-to-date branch with
most fixes, is it the right one?

Re non-booting kernel problem. If I do:
defconfig+kvm_guest.config+ scripts/config -e KASAN -e KASAN_INLINE
I only see OpenSBI banner and then nothing happens (qemu consumes 100% CPU).
I've tried on v5.10, current upstream head (71c5f03154ac) and
riscv/fixes (20620d72c31e). The result is the same.

I see this recent patch from Nylon:
https://lore.kernel.org/linux-riscv/1606727599-8598-1-git-send-email-nyl...@andestech.com/
which suggests that KASAN is working for Nylon.

I am using qemu 5.1.0 as:

qemu-system-riscv64 \
-machine virt -bios default -smp 1 -m 2G \
-device virtio-blk-device,drive=hd0 \
-drive file=buildroot-riscv64.ext4,if=none,format=raw,id=hd0 \
-kernel arch/riscv/boot/Image \
-nographic \
-device virtio-rng-device,rng=rng0 -object
rng-random,filename=/dev/urandom,id=rng0 \
-netdev user,id=net0,host=10.0.2.10,hostfwd=tcp::10022-:22 -device
virtio-net-device,netdev=net0 \
-append "root=/dev/vda earlyprintk=serial console=ttyS0 oops=panic
panic_on_warn=1 panic=86400"


I've also tried this config (slightly larger than defconfig, but does
NOT include KASAN nor KCOV):
https://gist.githubusercontent.com/dvyukov/b2b62beccf80493781ab03b41430e616/raw/62e673cff08a8a41656d2871b8a37f74b00f509f/gistfile1.txt
and this is the ultimate large config that I would like to use:
https://gist.githubusercontent.com/dvyukov/2b4e621d5252dbc5a2f28802b8d71d95/raw/3ef2b8d8eda60d3acfc4bf7916ffb9e77671ed76/gistfile1.txt

Both of them hang after the OpenSBI banner in the same way.

Is it a known issue? Am I doing something wrong?

TIA

Re: [PATCH] nfp: remove h from printk format specifier

[Tom Rix]

On 12/24/20 2:39 PM, Joe Perches wrote:
> On Thu, 2020-12-24 at 14:14 -0800, Tom Rix wrote:
>> On 12/24/20 12:21 PM, Simon Horman wrote:
>>> On Wed, Dec 23, 2020 at 12:20:53PM -0800, t...@redhat.com wrote:
 From: Tom Rix 

 This change fixes the checkpatch warning described in this commit
 commit cbacb5ab0aa0 ("docs: printk-formats: Stop encouraging use of 
 unnecessary %h[xudi] and %hh[xudi]")

 Standard integer promotion is already done and %hx and %hhx is useless
 so do not encourage the use of %hh[xudi] or %h[xudi].

 Signed-off-by: Tom Rix 
>>> Hi Tom,
>>>
>>> This patch looks appropriate for net-next, which is currently closed.
>>>
>>> The changes look fine, but I'm curious to know if its intentionally that
>>> the following was left alone in 
>>> ethernet/netronome/nfp/nfp_net_ethtool.c:nfp_net_get_nspinfo()
>>>
>>> snprintf(version, ETHTOOL_FWVERS_LEN, "%hu.%hu"
>> I am limiting changes to logging functions, what is roughly in checkpatch.
>>
>> I can add this snprintf in if you want.
> I'm a bit confused here Tom.
>
> I thought your clang-tidy script was looking for anything marked with
> __printf() that is using %h[idux] or %hh[idux].
Yes, it uses the format attribute to find the logging functions.
>
> Wouldn't snprintf qualify for this already?
>
> include/linux/kernel.h-extern __printf(3, 4)
> include/linux/kernel.h:int snprintf(char *buf, size_t size, const char *fmt, 
> ...);

Yes, this is found.

But since snprintf is not really a logging function, I ignore these.

If someone asks for them not to be ignored in a specific change, I will do that.

>
> Kernel code doesn't use a signed char or short with %hx or %hu very often
> but in case you didn't already know, any signed char/short emitted with
> anything like %hx or %hu needs to be left alone as sign extension occurs so:

Yes, this would also effect checkpatch.

Tom

>
>   signed char foo = -1;
>   printk("%hx", foo);
>
> emits  but
>
>   printk("%x", foo);
>
> emits 
>
> An example:
>
> $ gcc -x c -
> #include 
> #include 
>
> int main(int argc, char **argv)
> {
>   signed short i = -1;
>   printf("hx: %hx\n", i);
>   printf("x:  %x\n", i);
>   printf("hu: %hu\n", i);
>   printf("u:  %u\n", i);
>   return 0;
> }
>
> $ ./a.out
> hx: 
> x:  
> hu: 65535
> u:  4294967295
>
> $
>
>

undefined reference to `__ubsan_handle_alignment_assumption'

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   71c5f03154ac1cb27423b984743ccc2f5d11d14d
commit: 31de313dfdcf6971b0a1c30f86eabaa1eede74b3 PHY: Ingenic: Add USB PHY 
driver using generic PHY framework.
date:   3 weeks ago
config: s390-randconfig-r031-20201224 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
cee1e7d14f4628d6174b33640d502bff3b54ae45)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install s390 cross compiling tool for clang build
# apt-get install binutils-s390x-linux-gnu
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=31de313dfdcf6971b0a1c30f86eabaa1eede74b3
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 31de313dfdcf6971b0a1c30f86eabaa1eede74b3
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=s390 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   s390x-linux-gnu-ld: init/main.o: in function `do_initcalls':
   main.c:(.init.text+0x1a34): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: init/initramfs.o: in function `unpack_to_rootfs':
   initramfs.c:(.init.text+0x3c4): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: initramfs.c:(.init.text+0x3e0): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: initramfs.c:(.init.text+0x3fc): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: init/initramfs.o: in function `dir_add':
   initramfs.c:(.init.text+0x1748): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: init/initramfs.o:initramfs.c:(.init.text+0x1b62): more 
undefined references to `__ubsan_handle_alignment_assumption' follow
   s390x-linux-gnu-ld: drivers/phy/ingenic/phy-ingenic-usb.o: in function 
`ingenic_usb_phy_probe':
   phy-ingenic-usb.c:(.text+0x88): undefined reference to 
`devm_platform_ioremap_resource'
   s390x-linux-gnu-ld: drivers/gpio/gpiolib.o: in function 
`gpiochip_add_data_with_key':
>> (.text+0x34f2): undefined reference to `__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: drivers/gpio/gpiolib.o: in function `kzalloc':
   gpiolib.c:(.text+0x5106): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: drivers/gpio/gpiolib.o: in function `kmalloc_array':
   gpiolib.c:(.text+0xc458): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: drivers/gpio/gpiolib-cdev.o: in function `gpio_ioctl':
   gpiolib-cdev.c:(.text+0x2a30): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: gpiolib-cdev.c:(.text+0x2b50): undefined reference to 
`__ubsan_handle_alignment_assumption'
   s390x-linux-gnu-ld: 
drivers/gpio/gpiolib-cdev.o:gpiolib-cdev.c:(.text+0x30da): more undefined 
references to `__ubsan_handle_alignment_assumption' follow

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

Re: [rcu:dev.2020.12.23a 133/149] kernel/time/clocksource.c:220:6: warning: no previous prototype for function 'clocksource_verify_one_cpu'

[Paul E. McKenney]

On Fri, Dec 25, 2020 at 06:55:07PM +0800, kernel test robot wrote:
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git 
> dev.2020.12.23a
> head:   7cc07f4867eb9618d4f7c35ddfbd746131b52f51
> commit: 6a70298420b2bd6d3e3dc86d81b993f618df8569 [133/149] clocksource: Check 
> per-CPU clock synchronization when marked unstable
> config: x86_64-randconfig-r013-20201223 (attached as .config)
> compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
> cee1e7d14f4628d6174b33640d502bff3b54ae45)
> reproduce (this is a W=1 build):
> wget 
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install x86_64 cross compiling tool for clang build
> # apt-get install binutils-x86-64-linux-gnu
> # 
> https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git/commit/?id=6a70298420b2bd6d3e3dc86d81b993f618df8569
> git remote add rcu 
> https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
> git fetch --no-tags rcu dev.2020.12.23a
> git checkout 6a70298420b2bd6d3e3dc86d81b993f618df8569
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross 
> ARCH=x86_64 
> 
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 

Good catch!  I will fold the fix into the original with attribution,
thank you!

Thanx,Paul

> All warnings (new ones prefixed by >>):
> 
> >> kernel/time/clocksource.c:220:6: warning: no previous prototype for 
> >> function 'clocksource_verify_one_cpu' [-Wmissing-prototypes]
>void clocksource_verify_one_cpu(void *csin)
> ^
>kernel/time/clocksource.c:220:1: note: declare 'static' if the function is 
> not intended to be used outside of this translation unit
>void clocksource_verify_one_cpu(void *csin)
>^
>static 
>1 warning generated.
> 
> 
> vim +/clocksource_verify_one_cpu +220 kernel/time/clocksource.c
> 
>219
>  > 220void clocksource_verify_one_cpu(void *csin)
>221{
>222struct clocksource *cs = (struct clocksource *)csin;
>223
>224__this_cpu_write(csnow_mid, cs->read(cs));
>225}
>226
> 
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org

Re: [PATCH 2/2] drivers/gpu/drm/ast: Fix infinite loop if read fails

[Randy Dunlap]

On 12/25/20 12:13 AM, Defang Bo wrote:
> [Why] Similar to commit <298360af3> ast_init_dram_reg() configures a window 
> in order to access BMC memory.
> A BMC register can be configured to disallow this, and if so, causes
> an infinite loop in the ast driver which renders the system unusable.
> [How]
> Fix this by erroring out if an error is detected.

Hm, it appears that all this patch does is change spaces to tabs...


> Signed-off-by: Defang Bo 
> ---
>  drivers/gpu/drm/ast/ast_post.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
> index ef19c70..86e4d23 100644
> --- a/drivers/gpu/drm/ast/ast_post.c
> +++ b/drivers/gpu/drm/ast/ast_post.c
> @@ -302,13 +302,13 @@ static void ast_init_dram_reg(struct drm_device *dev)
>   ast_write32(ast, 0x12000, 0x1688A8A8);
>   do {
>   if (pci_channel_offline(dev->pdev))
> -return -EIO;
> + return -EIO;
>   } while (ast_read32(ast, 0x12000) != 0x01);
>  
>   ast_write32(ast, 0x1, 0xfc600309);
>   do {
>   if (pci_channel_offline(dev->pdev))
> -return -EIO;
> + return -EIO;
>   } while (ast_read32(ast, 0x1) != 0x01);
>   }
>  
> 


-- 
~Randy

Re: [reiser4 SFRN 5.1.3] kernel [5.10.x] read not supported for file /test-exec \(pid: 10094 comm: debootstrap\)

[Metztli Information Technology]

On Wed, Dec 23, 2020 at 3:40 PM Edward Shishkin  
wrote:
>
> On 12/23/2020 05:01 PM, Metztli Information Technology wrote:
> > Niltze [Ð—Ð´Ñ€Ð°Ð²Ñ Ñ‚Ð²ÑƒÐ¹Ñ‚Ðµ : Hello], Ed-
> >
> > I built Linux kernel 5.10.1-1 within the 'Debian way' -- as usual -- to 
> > generate a kernel component for my Debian-Installer (d-i).
> > The patch I applied is reiser4-for-5.10-rc3.patch.gz from v5-unstable.
> >
> > Once I built the proper reiser4progs-2.0.4.tar.gz and generated one set of 
> > components for d-i I built the d-i image.
> >
> > Fact is, the installer throws an error in *both* bare metal and VirtualBox 
> > 6.1.16:
> > ...
> > Dec 22 20:19:56 main-menu[330]: INFO: Menu item 'bootstrap-base' selected
> > Dec 22 20:19:56 debootstrap: /usr/sbin/debootstrap --components=main 
> > --debian-installer --resolve-deps --keyring=/usr/share/keyrings/archive.gpg 
> > buster /target http://deb.debian.org/debian/
> > Dec 22 20:19:56 debootstrap: /usr/sbin/debootstrap: line 1596: 
> > /target/test-exec: Invalid argument
> > Dec 22 20:19:56 kernel: [ 1018.632648] kernel read not supported for file 
> > /test-exec (pid: 10077 comm: debootstrap)
> > Dec 22 20:19:56 debootstrap: E: NOEXEC
> > Dec 22 20:19:56 debootstrap: EF: Cannot install into target '/target' 
> > mounted with noexec or nodev
> > Dec 22 20:20:12 base-installer: error: exiting on error 
> > base-installer/debootstrap-failed
> > Dec 22 20:20:14 main-menu[330]: WARNING **: Configuring 'bootstrap-base' 
> > failed with error code 1
> > Dec 22 20:20:14 main-menu[330]: WARNING **: Menu item 'bootstrap-base' 
> > failed.
> > Dec 22 20:20:15 main-menu[330]: INFO: Falling back to the package 
> > description for brltty-udeb
> >
>
> [...]
>
> >
> > Apparently, d-i [Debian-installer] complains about being unable to set the 
> > test file executable and causes the error when 1 is returned.
> > Notwithstanding, I manually verified that I am able to touch a file and set 
> > it +x executable.
> >
> > Furthermore, tricking the function return value to 0 I am able to make d-i 
> > continue with the latest SFRN5 installation (see [*trick*] below); yet, 
> > subsequently halts again with
> > an apparently related error --can not proceed any further.
> >
> > Digging deeper with dmesg, we can see that apparently it is the kernel 
> > which cannot 'read' properly. Please find a partial dmesg log with relevant 
> > output
> > from an attempt on my physical development machine.
> > ...
> > [  508.614488] Loading Reiser4 (Software Framework Release: 5.1.3). See 
> > reiser4.wiki.kernel.org for a description of Reiser4.
> > [  508.661951] SGI XFS with ACLs, security attributes, realtime, quota, no 
> > debug enabled
> > [  509.326270] device-mapper: uevent: version 1.0.3
> > [  509.326505] device-mapper: ioctl: 4.43.0-ioctl (2020-10-01) 
> > initialised: dm-de...@redhat.com
> > [  509.902828]  sda: sda1 sda2 sda3 sda4 sda5 sda6
> > [  509.915300]  sdb: sdb1 sdb2 sdb3
> > [  511.973360]  sdb: sdb1 sdb2 sdb3
> > [  627.525371] Adding 9765884k swap on /dev/sda3.  Priority:-2 extents:1 
> > across:9765884k FS
> > [  636.240812] reiser4[mount(9430)]: reiser4_register_subvol 
> > (fs/reiser4/init_volume.c:222)[edward-1932]:
> > [  636.240812] NOTICE: brick /dev/sda6 has been registered
> > [  636.243003] reiser4 (sda6): found disk format 5.1.3.
> > [  643.759971] reiser4 (/dev/sda6): using Hybrid Transaction Model.
> > [  643.759980] reiser4: brick /dev/sda6 activated
> > [  643.788537] EXT4-fs (sda1): mounting ext2 file system using the ext4 
> > subsystem
> > [  643.813474] EXT4-fs (sda1): mounted filesystem without journal. Opts: 
> > (null)
> > [  643.813488] ext2 filesystem being mounted at /target/boot supports 
> > timestamps until 2038 (0x7fff)
> > [  648.168730] kernel read not supported for file /test-exec (pid: 9876 
> > comm: debootstrap) [*trick*]
> > [  898.761385] reiser4: brick /dev/sda6 deactivated
> > [  991.001332] reiser4 (sda6): found disk format 5.1.3.
> > [  999.093471] reiser4 (/dev/sda6): using Hybrid Transaction Model.
> > [  999.093480] reiser4: brick /dev/sda6 activated
> > [ 1009.340117] EXT4-fs (sda1): mounting ext2 file system using the ext4 
> > subsystem
> > [ 1009.362722] EXT4-fs (sda1): mounted filesystem without journal. Opts: 
> > (null)
> > [ 1009.362737] ext2 filesystem being mounted at /target/boot supports 
> > timestamps until 2038 (0x7fff)
> > [ 6373.748413] kernel read not supported for file /test-exec (pid: 10094 
> > comm: debootstrap)
> > [ 6413.169920] kernel read not supported for file /usr/bin/true (pid: 15960 
> > comm: chroot)
>
>
> Hello.
>
> This is because of VFS changes in Linux-5.10.X.
> Specifically, because of the following patch:
> https://lkml.org/lkml/2020/8/17/174
> In the upstream git repository it is commit 4d03e3cc59828c82ee89ea6e2

Earlier I spun up a Google Compute Engine (GCE) AMD Epyc instance from a 
snapshot with kernel 5.9.15-1
< https://metztli.it/buster/gce-

[PATCH] ALSA: hda: Resume codec for system suspend if LED is controlled by codec

[Kai-Heng Feng]

Laptop with codec controlled LEDs takes a very long time to suspend
after commit 215a22ed31a1 ("ALSA: hda: Refactor codec PM to use
direct-complete optimization"):
[   90.065964] PM: suspend entry (s2idle)
[   90.067337] Filesystems sync: 0.001 seconds
[   90.185758] Freezing user space processes ... (elapsed 0.002 seconds) done.
[   90.188713] OOM killer disabled.
[   90.188714] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) 
done.
[   90.190024] printk: Suspending console(s) (use no_console_suspend to debug)
[   90.904912] intel_pch_thermal :00:12.0: CPU-PCH is cool [49C], continue 
to suspend
[  321.262505] snd_hda_codec_realtek ehdaudio0D0: Unable to sync register 
0x2b8000. -5
[  328.426919] snd_hda_codec_realtek ehdaudio0D0: Unable to sync register 
0x2b8000. -5
[  329.490933] ACPI: EC: interrupt blocked

That commit keeps codec suspended during the system suspend. This
doesn't play well with codec controlled mute and micmute LEDs, because
LED core will use codec registers to turn off those LEDs.

Currently, all users of create_mute_led_cdev() use codec to control
LED, so unconditionally runtime resume those codecs before system
suspend to solve the problem.

Fixes: 215a22ed31a1 ("ALSA: hda: Refactor codec PM to use direct-complete 
optimization")
Signed-off-by: Kai-Heng Feng 
---
 include/sound/hda_codec.h   | 1 +
 sound/pci/hda/hda_codec.c   | 7 +++
 sound/pci/hda/hda_generic.c | 1 +
 3 files changed, 9 insertions(+)

diff --git a/include/sound/hda_codec.h b/include/sound/hda_codec.h
index 2e8d51937acd..b01d76abe008 100644
--- a/include/sound/hda_codec.h
+++ b/include/sound/hda_codec.h
@@ -255,6 +255,7 @@ struct hda_codec {
unsigned int relaxed_resume:1;  /* don't resume forcibly for jack */
unsigned int forced_resume:1; /* forced resume for jack */
unsigned int mst_no_extra_pcms:1; /* no backup PCMs for DP-MST */
+   unsigned int resume_for_sleep:1;  /* runtime resume for system sleep */
 
 #ifdef CONFIG_PM
unsigned long power_on_acct;
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index 687216e74526..b890d9b4339e 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -2983,6 +2983,13 @@ static int hda_codec_runtime_resume(struct device *dev)
 #ifdef CONFIG_PM_SLEEP
 static int hda_codec_pm_prepare(struct device *dev)
 {
+   struct hda_codec *codec = dev_to_hda_codec(dev);
+
+   if (codec->resume_for_sleep) {
+   pm_runtime_resume(dev);
+   return 0;
+   }
+
return pm_runtime_suspended(dev);
 }
 
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
index 8060cc86dfea..6d259d5bb5bb 100644
--- a/sound/pci/hda/hda_generic.c
+++ b/sound/pci/hda/hda_generic.c
@@ -3913,6 +3913,7 @@ static int create_mute_led_cdev(struct hda_codec *codec,
cdev->brightness_set_blocking = callback;
cdev->brightness = ledtrig_audio_get(micmute ? LED_AUDIO_MICMUTE : 
LED_AUDIO_MUTE);
cdev->flags = LED_CORE_SUSPENDRESUME;
+   codec->resume_for_sleep = 1;
 
return devm_led_classdev_register(&codec->core.dev, cdev);
 }
-- 
2.29.2

Re: riscv+KASAN does not boot

[Andreas Schwab]

On Dez 25 2020, Dmitry Vyukov wrote:

> qemu-system-riscv64 \
> -machine virt -bios default -smp 1 -m 2G \
> -device virtio-blk-device,drive=hd0 \
> -drive file=buildroot-riscv64.ext4,if=none,format=raw,id=hd0 \
> -kernel arch/riscv/boot/Image \
> -nographic \
> -device virtio-rng-device,rng=rng0 -object
> rng-random,filename=/dev/urandom,id=rng0 \
> -netdev user,id=net0,host=10.0.2.10,hostfwd=tcp::10022-:22 -device
> virtio-net-device,netdev=net0 \
> -append "root=/dev/vda earlyprintk=serial console=ttyS0 oops=panic
> panic_on_warn=1 panic=86400"

Do you get more output with earlycon=sbi?

Andreas.

-- 
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
"And now for something completely different."

Re: [PATCH] nfp: remove h from printk format specifier

[Joe Perches]

On Fri, 2020-12-25 at 06:56 -0800, Tom Rix wrote:
> On 12/24/20 2:39 PM, Joe Perches wrote:
[]
> > Kernel code doesn't use a signed char or short with %hx or %hu very often
> > but in case you didn't already know, any signed char/short emitted with
> > anything like %hx or %hu needs to be left alone as sign extension occurs so:
> 
> Yes, this would also effect checkpatch.

Of course but checkpatch is stupid and doesn't know types
so it just assumes that the type argument is not signed.

In general, that's a reasonable but imperfect assumption.

coccinelle could probably do this properly as it's a much
better parser.  clang-tidy should be able to as well.