[PATCH v5 10/21] perf arm_spe: Fixup top byte for data virtual address

2020-10-29 Thread Leo Yan
To establish a valid address from the address packet payload and finally
the address value can be used for parsing data symbol in DSO, current
code uses 0xff to replace the tag in the top byte of data virtual
address.

So far the code only fixups top byte for the memory layouts with 4KB
pages, it misses to support memory layouts with 64KB pages.

This patch adds the conditions for checking bits [55:52] are 0xf, if
detects the pattern it will fill 0xff into the top byte of the address,
also adds comment to explain the fixing up.

Signed-off-by: Leo Yan 
---
 .../util/arm-spe-decoder/arm-spe-decoder.c| 20 ---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 776b3e6628bb..cac2ef79c025 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -24,7 +24,7 @@
 
 static u64 arm_spe_calc_ip(int index, u64 payload)
 {
-   u64 ns, el;
+   u64 ns, el, val;
 
/* Instruction virtual address or Branch target address */
if (index == SPE_ADDR_PKT_HDR_INDEX_INS ||
@@ -45,8 +45,22 @@ static u64 arm_spe_calc_ip(int index, u64 payload)
/* Clean tags */
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
 
-   /* Fill highest byte if bits [48..55] is 0xff */
-   if (SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload) == 0xffULL)
+   /*
+* Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.1 Address packet"
+* defines the data virtual address payload format, the top byte
+* (bits [63:56]) is assigned as top-byte tag; so we only can
+* retrieve address value from bits [55:0].
+*
+* According to Documentation/arm64/memory.rst, if detects the
+* specific pattern in bits [55:52] of payload which falls in
+* the kernel space, should fixup the top byte and this allows
+* perf tool to parse DSO symbol for data address correctly.
+*
+* For this reason, if detects the bits [55:52] is 0xf, will
+* fill 0xff into the top byte.
+*/
+   val = SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload);
+   if ((val & 0xf0ULL) == 0xf0ULL)
payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT;
 
/* Data access physical address */
-- 
2.17.1



[PATCH v5 07/21] perf arm-spe: Refactor packet header parsing

2020-10-29 Thread Leo Yan
The packet header parsing uses the hard coded values and it uses nested
if-else statements.

To improve the readability, this patch refactors the macros for packet
header format so it removes the hard coded values.  Furthermore, based
on the new mask macros it reduces the nested if-else statements and
changes to use the flat conditions checking, this is directive and can
easily map to the descriptions in ARMv8-a architecture reference manual
(ARM DDI 0487E.a), chapter 'D10.1.5 Statistical Profiling Extension
protocol packet headers'.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 92 +--
 .../arm-spe-decoder/arm-spe-pkt-decoder.h | 20 
 2 files changed, 61 insertions(+), 51 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 9147b88ae00c..34cc46385cf7 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -16,28 +16,6 @@
 #define NS_FLAGBIT(63)
 #define EL_FLAG(BIT(62) | BIT(61))
 
-#define SPE_HEADER0_PAD0x0
-#define SPE_HEADER0_END0x1
-#define SPE_HEADER0_ADDRESS0x30 /* address packet (short) */
-#define SPE_HEADER0_ADDRESS_MASK   0x38
-#define SPE_HEADER0_COUNTER0x18 /* counter packet (short) */
-#define SPE_HEADER0_COUNTER_MASK   0x38
-#define SPE_HEADER0_TIMESTAMP  0x71
-#define SPE_HEADER0_TIMESTAMP  0x71
-#define SPE_HEADER0_EVENTS 0x2
-#define SPE_HEADER0_EVENTS_MASK0xf
-#define SPE_HEADER0_SOURCE 0x3
-#define SPE_HEADER0_SOURCE_MASK0xf
-#define SPE_HEADER0_CONTEXT0x24
-#define SPE_HEADER0_CONTEXT_MASK   0x3c
-#define SPE_HEADER0_OP_TYPE0x8
-#define SPE_HEADER0_OP_TYPE_MASK   0x3c
-#define SPE_HEADER1_ALIGNMENT  0x0
-#define SPE_HEADER1_ADDRESS0xb0 /* address packet (extended) */
-#define SPE_HEADER1_ADDRESS_MASK   0xf8
-#define SPE_HEADER1_COUNTER0x98 /* counter packet (extended) */
-#define SPE_HEADER1_COUNTER_MASK   0xf8
-
 #if __BYTE_ORDER == __BIG_ENDIAN
 #define le16_to_cpu bswap_16
 #define le32_to_cpu bswap_32
@@ -200,46 +178,58 @@ static int arm_spe_get_addr(const unsigned char *buf, 
size_t len,
 static int arm_spe_do_get_packet(const unsigned char *buf, size_t len,
 struct arm_spe_pkt *packet)
 {
-   unsigned int byte;
+   unsigned int hdr;
+   unsigned char ext_hdr = 0;
 
memset(packet, 0, sizeof(struct arm_spe_pkt));
 
if (!len)
return ARM_SPE_NEED_MORE_BYTES;
 
-   byte = buf[0];
-   if (byte == SPE_HEADER0_PAD)
+   hdr = buf[0];
+
+   if (hdr == SPE_HEADER0_PAD)
return arm_spe_get_pad(packet);
-   else if (byte == SPE_HEADER0_END) /* no timestamp at end of record */
+
+   if (hdr == SPE_HEADER0_END) /* no timestamp at end of record */
return arm_spe_get_end(packet);
-   else if (byte & 0xc0 /* 0y11xx */) {
-   if (byte & 0x80) {
-   if ((byte & SPE_HEADER0_ADDRESS_MASK) == 
SPE_HEADER0_ADDRESS)
-   return arm_spe_get_addr(buf, len, 0, packet);
-   if ((byte & SPE_HEADER0_COUNTER_MASK) == 
SPE_HEADER0_COUNTER)
-   return arm_spe_get_counter(buf, len, 0, packet);
-   } else
-   if (byte == SPE_HEADER0_TIMESTAMP)
-   return arm_spe_get_timestamp(buf, len, packet);
-   else if ((byte & SPE_HEADER0_EVENTS_MASK) == 
SPE_HEADER0_EVENTS)
-   return arm_spe_get_events(buf, len, packet);
-   else if ((byte & SPE_HEADER0_SOURCE_MASK) == 
SPE_HEADER0_SOURCE)
-   return arm_spe_get_data_source(buf, len, 
packet);
-   else if ((byte & SPE_HEADER0_CONTEXT_MASK) == 
SPE_HEADER0_CONTEXT)
-   return arm_spe_get_context(buf, len, packet);
-   else if ((byte & SPE_HEADER0_OP_TYPE_MASK) == 
SPE_HEADER0_OP_TYPE)
-   return arm_spe_get_op_type(buf, len, packet);
-   } else if ((byte & 0xe0) == 0x20 /* 0y001x */) {
-   /* 16-bit header */
-   byte = buf[1];
-   if (byte == SPE_HEADER1_ALIGNMENT)
+
+   if (hdr == SPE_HEADER0_TIMESTAMP)
+   return arm_spe_get_timestamp(buf, len, packet);
+
+   if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_EVENTS)
+   return arm_spe_get_events(buf, len, packet);
+
+   if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_SOURCE)
+   return arm_spe_get_data_source(buf, len, packet);
+
+   if ((hdr & SPE_HEA

[PATCH v5 08/21] perf arm-spe: Add new function arm_spe_pkt_desc_addr()

2020-10-29 Thread Leo Yan
This patch moves out the address parsing code from arm_spe_pkt_desc()
and uses the new introduced function arm_spe_pkt_desc_addr() to process
address packet.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 50 ---
 1 file changed, 31 insertions(+), 19 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 34cc46385cf7..9db26e30d028 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -270,10 +270,39 @@ static int arm_spe_pkt_snprintf(int *err, char **buf_p, 
size_t *blen,
return ret;
 }
 
+static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
+char *buf, size_t buf_len)
+{
+   int ns, el, idx = packet->index;
+   u64 payload = packet->payload;
+   int err = 0;
+
+   switch (idx) {
+   case 0:
+   case 1:
+   ns = !!(packet->payload & NS_FLAG);
+   el = (packet->payload & EL_FLAG) >> 61;
+   payload &= ~(0xffULL << 56);
+   return arm_spe_pkt_snprintf(&err, &buf, &buf_len,
+   "%s 0x%llx el%d ns=%d",
+   (idx == 1) ? "TGT" : "PC", payload, el, ns);
+   case 2:
+   return arm_spe_pkt_snprintf(&err, &buf, &buf_len,
+   "VA 0x%llx", payload);
+   case 3:
+   ns = !!(packet->payload & NS_FLAG);
+   payload &= ~(0xffULL << 56);
+   return arm_spe_pkt_snprintf(&err, &buf, &buf_len,
+   "PA 0x%llx ns=%d", payload, ns);
+   default:
+   return 0;
+   }
+}
+
 int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
 size_t buf_len)
 {
-   int ns, el, idx = packet->index;
+   int idx = packet->index;
unsigned long long payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
size_t blen = buf_len;
@@ -352,24 +381,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, 
char *buf,
case ARM_SPE_TIMESTAMP:
return arm_spe_pkt_snprintf(&err, &buf, &blen, "%s %lld", name, 
payload);
case ARM_SPE_ADDRESS:
-   switch (idx) {
-   case 0:
-   case 1: ns = !!(packet->payload & NS_FLAG);
-   el = (packet->payload & EL_FLAG) >> 61;
-   payload &= ~(0xffULL << 56);
-   return arm_spe_pkt_snprintf(&err, &buf, &blen,
-   "%s 0x%llx el%d ns=%d",
-   (idx == 1) ? "TGT" : "PC", payload, el, 
ns);
-   case 2:
-   return arm_spe_pkt_snprintf(&err, &buf, &blen,
-   "VA 0x%llx", payload);
-   case 3: ns = !!(packet->payload & NS_FLAG);
-   payload &= ~(0xffULL << 56);
-   return arm_spe_pkt_snprintf(&err, &buf, &blen,
-   "PA 0x%llx ns=%d", payload, 
ns);
-   default:
-   return 0;
-   }
+   return arm_spe_pkt_desc_addr(packet, buf, buf_len);
case ARM_SPE_CONTEXT:
return arm_spe_pkt_snprintf(&err, &buf, &blen, "%s 0x%lx el%d",
name, (unsigned long)payload, idx + 
1);
-- 
2.17.1



[PATCH v5 09/21] perf arm-spe: Refactor address packet handling

2020-10-29 Thread Leo Yan
This patch is to refactor address packet handling, it defines macros for
address packet's header and payload, these macros are used by decoder
and the dump flow.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../util/arm-spe-decoder/arm-spe-decoder.c| 29 ---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 +++---
 .../arm-spe-decoder/arm-spe-pkt-decoder.h | 35 ---
 3 files changed, 48 insertions(+), 42 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index cc18a1e8c212..776b3e6628bb 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -24,36 +24,35 @@
 
 static u64 arm_spe_calc_ip(int index, u64 payload)
 {
-   u8 *addr = (u8 *)&payload;
-   int ns, el;
+   u64 ns, el;
 
/* Instruction virtual address or Branch target address */
if (index == SPE_ADDR_PKT_HDR_INDEX_INS ||
index == SPE_ADDR_PKT_HDR_INDEX_BRANCH) {
-   ns = addr[7] & SPE_ADDR_PKT_NS;
-   el = (addr[7] & SPE_ADDR_PKT_EL_MASK) >> SPE_ADDR_PKT_EL_OFFSET;
+   ns = SPE_ADDR_PKT_GET_NS(payload);
+   el = SPE_ADDR_PKT_GET_EL(payload);
+
+   /* Clean highest byte */
+   payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
 
/* Fill highest byte for EL1 or EL2 (VHE) mode */
if (ns && (el == SPE_ADDR_PKT_EL1 || el == SPE_ADDR_PKT_EL2))
-   addr[7] = 0xff;
-   /* Clean highest byte for other cases */
-   else
-   addr[7] = 0x0;
+   payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT;
 
/* Data access virtual address */
} else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT) {
 
+   /* Clean tags */
+   payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
+
/* Fill highest byte if bits [48..55] is 0xff */
-   if (addr[6] == 0xff)
-   addr[7] = 0xff;
-   /* Otherwise, cleanup tags */
-   else
-   addr[7] = 0x0;
+   if (SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload) == 0xffULL)
+   payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT;
 
/* Data access physical address */
} else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS) {
-   /* Cleanup byte 7 */
-   addr[7] = 0x0;
+   /* Clean highest byte */
+   payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
} else {
pr_err("unsupported address packet index: 0x%x\n", index);
}
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 9db26e30d028..0d4b86fb8fc0 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -13,9 +13,6 @@
 
 #include "arm-spe-pkt-decoder.h"
 
-#define NS_FLAGBIT(63)
-#define EL_FLAG(BIT(62) | BIT(61))
-
 #if __BYTE_ORDER == __BIG_ENDIAN
 #define le16_to_cpu bswap_16
 #define le32_to_cpu bswap_32
@@ -167,10 +164,11 @@ static int arm_spe_get_addr(const unsigned char *buf, 
size_t len,
const unsigned char ext_hdr, struct arm_spe_pkt 
*packet)
 {
packet->type = ARM_SPE_ADDRESS;
+
if (ext_hdr)
-   packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7);
+   packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]);
else
-   packet->index = buf[0] & 0x7;
+   packet->index = SPE_HDR_SHORT_INDEX(buf[0]);
 
return arm_spe_get_payload(buf, len, ext_hdr, packet);
 }
@@ -278,20 +276,20 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt 
*packet,
int err = 0;
 
switch (idx) {
-   case 0:
-   case 1:
-   ns = !!(packet->payload & NS_FLAG);
-   el = (packet->payload & EL_FLAG) >> 61;
-   payload &= ~(0xffULL << 56);
+   case SPE_ADDR_PKT_HDR_INDEX_INS:
+   case SPE_ADDR_PKT_HDR_INDEX_BRANCH:
+   ns = !!SPE_ADDR_PKT_GET_NS(payload);
+   el = SPE_ADDR_PKT_GET_EL(payload);
+   payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
return arm_spe_pkt_snprintf(&err, &buf, &buf_len,
"%s 0x%llx el%d ns=%d",
(idx == 1) ? "TGT" : "PC", payload, el, ns);
-   case 2:
+   case SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT:
return arm_spe_pkt_snprintf(&err, &buf, &buf_len,
"VA 0x%llx", payload);
-   case 3:
-   ns = !!(packet->payload & NS_FLAG);
-   payload &= ~(0xffULL << 56);
+   case SPE_ADD

[PATCH v5 11/21] perf arm-spe: Refactor context packet handling

2020-10-29 Thread Leo Yan
Minor refactoring to use macro for index mask.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +-
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 0d4b86fb8fc0..93799bf3d1ac 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -136,7 +136,7 @@ static int arm_spe_get_context(const unsigned char *buf, 
size_t len,
   struct arm_spe_pkt *packet)
 {
packet->type = ARM_SPE_CONTEXT;
-   packet->index = buf[0] & 0x3;
+   packet->index = SPE_CTX_PKT_HDR_INDEX(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
 }
 
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index f97d6840be3a..9bc876bffd35 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -79,6 +79,9 @@ struct arm_spe_pkt {
 #define SPE_ADDR_PKT_EL2   2
 #define SPE_ADDR_PKT_EL3   3
 
+/* Context packet header */
+#define SPE_CTX_PKT_HDR_INDEX(h)   ((h) & GENMASK_ULL(1, 0))
+
 const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
 
 int arm_spe_get_packet(const unsigned char *buf, size_t len,
-- 
2.17.1



[PATCH v5 13/21] perf arm-spe: Refactor counter packet handling

2020-10-29 Thread Leo Yan
This patch defines macros for counter packet header, and uses macros to
replace hard code values in functions arm_spe_get_counter() and
arm_spe_pkt_desc().

In the function arm_spe_get_counter(), adds a new line for more
readable.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 11 ++-
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h |  5 +
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 4e2f7bbd9d35..bc4b5a5a528b 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -152,10 +152,11 @@ static int arm_spe_get_counter(const unsigned char *buf, 
size_t len,
   const unsigned char ext_hdr, struct arm_spe_pkt 
*packet)
 {
packet->type = ARM_SPE_COUNTER;
+
if (ext_hdr)
-   packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7);
+   packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]);
else
-   packet->index = buf[0] & 0x7;
+   packet->index = SPE_HDR_SHORT_INDEX(buf[0]);
 
return arm_spe_get_payload(buf, len, ext_hdr, packet);
 }
@@ -309,13 +310,13 @@ static int arm_spe_pkt_desc_counter(const struct 
arm_spe_pkt *packet,
 (unsigned short)payload);
 
switch (packet->index) {
-   case 0:
+   case SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT:
arm_spe_pkt_snprintf(&err, &buf, &blen, "TOT");
break;
-   case 1:
+   case SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT:
arm_spe_pkt_snprintf(&err, &buf, &blen, "ISSUE");
break;
-   case 2:
+   case SPE_CNT_PKT_HDR_INDEX_TRANS_LAT:
arm_spe_pkt_snprintf(&err, &buf, &blen, "XLAT");
break;
default:
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 9bc876bffd35..7d8e34e35f05 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -82,6 +82,11 @@ struct arm_spe_pkt {
 /* Context packet header */
 #define SPE_CTX_PKT_HDR_INDEX(h)   ((h) & GENMASK_ULL(1, 0))
 
+/* Counter packet header */
+#define SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT0x0
+#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT0x1
+#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT0x2
+
 const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
 
 int arm_spe_get_packet(const unsigned char *buf, size_t len,
-- 
2.17.1



[PATCH v5 17/21] perf arm-spe: Add new function arm_spe_pkt_desc_op_type()

2020-10-29 Thread Leo Yan
The operation type packet is complex and contains subclass; the parsing
flow causes deep indentation; for more readable, this patch introduces
a new function arm_spe_pkt_desc_op_type() which is used for operation
type parsing.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 78 +++
 1 file changed, 44 insertions(+), 34 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index b42ba64274c1..e51b103d9973 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -304,6 +304,49 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt 
*packet,
return err ?: (int)(buf_len - blen);
 }
 
+static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
+   char *buf, size_t buf_len)
+{
+   u64 payload = packet->payload;
+   size_t blen = buf_len;
+   int err = 0;
+
+   switch (packet->index) {
+   case 0:
+   return arm_spe_pkt_snprintf(&err, &buf, &blen,
+   payload & 0x1 ? "COND-SELECT" : "INSN-OTHER");
+   case 1:
+   arm_spe_pkt_snprintf(&err, &buf, &blen,
+payload & 0x1 ? "ST" : "LD");
+
+   if (payload & 0x2) {
+   if (payload & 0x4)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " AT");
+   if (payload & 0x8)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
EXCL");
+   if (payload & 0x10)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " AR");
+   } else if (payload & 0x4) {
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " SIMD-FP");
+   }
+
+   return err ?: (int)(buf_len - blen);
+
+   case 2:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "B");
+
+   if (payload & 0x1)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " COND");
+   if (payload & 0x2)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " IND");
+
+   return err ?: (int)(buf_len - blen);
+
+   default:
+   return 0;
+   }
+}
+
 static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
 char *buf, size_t buf_len)
 {
@@ -378,40 +421,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, 
char *buf,
case ARM_SPE_EVENTS:
return arm_spe_pkt_desc_event(packet, buf, buf_len);
case ARM_SPE_OP_TYPE:
-   switch (idx) {
-   case 0:
-   return arm_spe_pkt_snprintf(&err, &buf, &blen,
-   payload & 0x1 ? "COND-SELECT" : 
"INSN-OTHER");
-   case 1:
-   arm_spe_pkt_snprintf(&err, &buf, &blen,
-payload & 0x1 ? "ST" : "LD");
-
-   if (payload & 0x2) {
-   if (payload & 0x4)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, 
" AT");
-   if (payload & 0x8)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, 
" EXCL");
-   if (payload & 0x10)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, 
" AR");
-   } else if (payload & 0x4) {
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
SIMD-FP");
-   }
-
-   return err ?: (int)(buf_len - blen);
-
-   case 2:
-   arm_spe_pkt_snprintf(&err, &buf, &blen, "B");
-
-   if (payload & 0x1)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
COND");
-   if (payload & 0x2)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " IND");
-
-   return err ?: (int)(buf_len - blen);
-
-   default:
-   return 0;
-   }
+   return arm_spe_pkt_desc_op_type(packet, buf, buf_len);
case ARM_SPE_DATA_SOURCE:
case ARM_SPE_TIMESTAMP:
return arm_spe_pkt_snprintf(&err, &buf, &blen, "%s %lld", name, 
payload);
-- 
2.17.1



[PATCH v5 20/21] perf arm_spe: Decode memory tagging properties

2020-10-29 Thread Leo Yan
From: Andre Przywara 

When SPE records a physical address, it can additionally tag the event
with information from the Memory Tagging architecture extension.

Decode the two additional fields in the SPE event payload.

[leoy: Refined patch to use predefined macros]

Signed-off-by: Andre Przywara 
Signed-off-by: Leo Yan 
---
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 +-
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 2 ++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 70593a4e0aa5..97a47ac3aa28 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -367,6 +367,7 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt 
*packet,
 char *buf, size_t buf_len)
 {
int ns, el, idx = packet->index;
+   int ch, pat;
u64 payload = packet->payload;
int err = 0;
 
@@ -384,9 +385,12 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt 
*packet,
"VA 0x%llx", payload);
case SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS:
ns = !!SPE_ADDR_PKT_GET_NS(payload);
+   ch = !!SPE_ADDR_PKT_GET_CH(payload);
+   pat = SPE_ADDR_PKT_GET_PAT(payload);
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
return arm_spe_pkt_snprintf(&err, &buf, &buf_len,
-   "PA 0x%llx ns=%d", payload, ns);
+   "PA 0x%llx ns=%d ch=%d, pat=%x",
+   payload, ns, ch, pat);
default:
return 0;
}
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 7032fc141ad4..1ad14885c2a1 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -73,6 +73,8 @@ struct arm_spe_pkt {
 
 #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63)
 #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 
61)
+#define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62)
+#define SPE_ADDR_PKT_GET_PAT(v)(((v) & GENMASK_ULL(59, 
56)) >> 56)
 
 #define SPE_ADDR_PKT_EL0   0
 #define SPE_ADDR_PKT_EL1   1
-- 
2.17.1



[PATCH v5 14/21] perf arm-spe: Add new function arm_spe_pkt_desc_event()

2020-10-29 Thread Leo Yan
This patch moves out the event packet parsing from arm_spe_pkt_desc()
to the new function arm_spe_pkt_desc_event().

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 66 +++
 1 file changed, 38 insertions(+), 28 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index bc4b5a5a528b..6e4896327e56 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -269,6 +269,43 @@ static int arm_spe_pkt_snprintf(int *err, char **buf_p, 
size_t *blen,
return ret;
 }
 
+static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet,
+ char *buf, size_t buf_len)
+{
+   u64 payload = packet->payload;
+   size_t blen = buf_len;
+   int err = 0;
+
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "EV");
+
+   if (payload & 0x1)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " EXCEPTION-GEN");
+   if (payload & 0x2)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " RETIRED");
+   if (payload & 0x4)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-ACCESS");
+   if (payload & 0x8)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-REFILL");
+   if (payload & 0x10)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " TLB-ACCESS");
+   if (payload & 0x20)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " TLB-REFILL");
+   if (payload & 0x40)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " NOT-TAKEN");
+   if (payload & 0x80)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " MISPRED");
+   if (packet->index > 1) {
+   if (payload & 0x100)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-ACCESS");
+   if (payload & 0x200)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-REFILL");
+   if (payload & 0x400)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
REMOTE-ACCESS");
+   }
+
+   return err ?: (int)(buf_len - blen);
+}
+
 static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
 char *buf, size_t buf_len)
 {
@@ -341,34 +378,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, 
char *buf,
case ARM_SPE_END:
return arm_spe_pkt_snprintf(&err, &buf, &blen, "%s", name);
case ARM_SPE_EVENTS:
-   arm_spe_pkt_snprintf(&err, &buf, &blen, "EV");
-
-   if (payload & 0x1)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
EXCEPTION-GEN");
-   if (payload & 0x2)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " RETIRED");
-   if (payload & 0x4)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-ACCESS");
-   if (payload & 0x8)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-REFILL");
-   if (payload & 0x10)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " TLB-ACCESS");
-   if (payload & 0x20)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " TLB-REFILL");
-   if (payload & 0x40)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " NOT-TAKEN");
-   if (payload & 0x80)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " MISPRED");
-   if (idx > 1) {
-   if (payload & 0x100)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
LLC-ACCESS");
-   if (payload & 0x200)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
LLC-REFILL");
-   if (payload & 0x400)
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
REMOTE-ACCESS");
-   }
-   return err ?: (int)(buf_len - blen);
-
+   return arm_spe_pkt_desc_event(packet, buf, buf_len);
case ARM_SPE_OP_TYPE:
switch (idx) {
case 0:
-- 
2.17.1



[PATCH v5 12/21] perf arm-spe: Add new function arm_spe_pkt_desc_counter()

2020-10-29 Thread Leo Yan
This patch moves out the counter packet parsing code from
arm_spe_pkt_desc() to the new function arm_spe_pkt_desc_counter().

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 48 +++
 1 file changed, 29 insertions(+), 19 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 93799bf3d1ac..4e2f7bbd9d35 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -297,6 +297,34 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt 
*packet,
}
 }
 
+static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet,
+   char *buf, size_t buf_len)
+{
+   u64 payload = packet->payload;
+   const char *name = arm_spe_pkt_name(packet->type);
+   size_t blen = buf_len;
+   int err = 0;
+
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "%s %d ", name,
+(unsigned short)payload);
+
+   switch (packet->index) {
+   case 0:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "TOT");
+   break;
+   case 1:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "ISSUE");
+   break;
+   case 2:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "XLAT");
+   break;
+   default:
+   break;
+   }
+
+   return err ?: (int)(buf_len - blen);
+}
+
 int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
 size_t buf_len)
 {
@@ -384,25 +412,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, 
char *buf,
return arm_spe_pkt_snprintf(&err, &buf, &blen, "%s 0x%lx el%d",
name, (unsigned long)payload, idx + 
1);
case ARM_SPE_COUNTER:
-   arm_spe_pkt_snprintf(&err, &buf, &blen, "%s %d ", name,
-(unsigned short)payload);
-
-   switch (idx) {
-   case 0:
-   arm_spe_pkt_snprintf(&err, &buf, &blen, "TOT");
-   break;
-   case 1:
-   arm_spe_pkt_snprintf(&err, &buf, &blen, "ISSUE");
-   break;
-   case 2:
-   arm_spe_pkt_snprintf(&err, &buf, &blen, "XLAT");
-   break;
-   default:
-   break;
-   }
-
-   return err ?: (int)(buf_len - blen);
-
+   return arm_spe_pkt_desc_counter(packet, buf, buf_len);
default:
break;
}
-- 
2.17.1



[PATCH v5 19/21] perf arm-spe: Add more sub classes for operation packet

2020-10-29 Thread Leo Yan
For the operation type packet payload with load/store class, it misses
to support these sub classes:

  - A load/store targeting the general-purpose registers;
  - A load/store targeting unspecified registers;
  - The ARMv8.4 nested virtualisation extension can redirect system
register accesses to a memory page controlled by the hypervisor.
The SPE profiling feature in newer implementations can tag those
memory accesses accordingly.

Add the bit pattern describing load/store sub classes, so that the perf
tool can decode it properly.

Inspired by Andre Przywara, refined the commit log and code for more
clear description.

Co-developed-by: Andre Przywara 
Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 575635c54e48..70593a4e0aa5 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -326,9 +326,23 @@ static int arm_spe_pkt_desc_op_type(const struct 
arm_spe_pkt *packet,
arm_spe_pkt_snprintf(&err, &buf, &blen, " 
EXCL");
if (payload & SPE_OP_PKT_AR)
arm_spe_pkt_snprintf(&err, &buf, &blen, " AR");
-   } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
-   SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
+   }
+
+   switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) {
+   case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP:
arm_spe_pkt_snprintf(&err, &buf, &blen, " SIMD-FP");
+   break;
+   case SPE_OP_PKT_LDST_SUBCLASS_GP_REG:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " GP-REG");
+   break;
+   case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " UNSPEC-REG");
+   break;
+   case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " NV-SYSREG");
+   break;
+   default:
+   break;
}
 
return err ?: (int)(buf_len - blen);
-- 
2.17.1



linux-next: Tree for Oct 29

2020-10-29 Thread Stephen Rothwell
Hi all,

Changes since 20201028:

The samsung-krzk-fixes tree gained a conflict against the arm-soc-fixes tree.

The drm-misc tree gained a conflict against the drm-misc-fixes tree.

The phy-next tree gained a conflict against the regulator-fixes tree.

The staging tree gained a conflict against the kselftest-fixes tree.

The akpm-current tree gained a build failure for which I applied a patch.

Non-merge commits (relative to Linus' tree): 1851
 2238 files changed, 320422 insertions(+), 47697 deletions(-)



I have created today's linux-next tree at
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
(patches at http://www.kernel.org/pub/linux/kernel/next/ ).  If you
are tracking the linux-next tree using git, you should not use "git pull"
to do so as that will try to merge the new linux-next release with the
old one.  You should use "git fetch" and checkout or reset to the new
master.

You can see which trees have been included by looking in the Next/Trees
file in the source.  There are also quilt-import.log and merge.log
files in the Next directory.  Between each merge, the tree was built
with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a
multi_v7_defconfig for arm and a native build of tools/perf. After
the final fixups (if any), I do an x86_64 modules_install followed by
builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit),
ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc
and sparc64 defconfig and htmldocs. And finally, a simple boot test
of the powerpc pseries_le_defconfig kernel in qemu (with and without
kvm enabled).

Below is a summary of the state of the merge.

I am currently merging 327 trees (counting Linus' and 85 trees of bug
fix patches pending for the current merge release).

Stats about the size of the tree over time can be seen at
http://neuling.org/linux-next-size.html .

Status of my local build tests will be at
http://kisskb.ellerman.id.au/linux-next .  If maintainers want to give
advice about cross compilers/configs that work, we are always open to add
more builds.

Thanks to Randy Dunlap for doing many randconfig builds.  And to Paul
Gortmaker for triage and bug fixes.

-- 
Cheers,
Stephen Rothwell

$ git checkout master
$ git reset --hard stable
Merging origin/master (23859ae44402 Merge tag 'trace-v5.10-rc1' of 
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace)
Merging fixes/fixes (9123e3a74ec7 Linux 5.9-rc1)
Merging kbuild-current/fixes (7654e9a8389a kbuild: remove unused OBJSIZE)
Merging arc-current/for-curr (3650b228f83a Linux 5.10-rc1)
Merging arm-current/fixes (9fa2e7af3d53 ARM: 9019/1: kprobes: Avoid 
fortify_panic() when copying optprobe template)
Merging arm64-fixes/for-next/fixes (ef5dd6a0c828 arm64: mte: Document that user 
PSTATE.TCO is ignored by kernel uaccess)
Merging arm-soc-fixes/arm/fixes (01eea23687ed Merge tag 
'stm32-dt-for-v5.10-fixes-1' of 
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/fixes)
Merging drivers-memory-fixes/fixes (3650b228f83a Linux 5.10-rc1)
Merging m68k-current/for-linus (50c5feeea0af ide/macide: Convert Mac IDE driver 
to platform driver)
Merging powerpc-fixes/fixes (4ff753feab02 powerpc/pseries: Avoid using 
addr_to_pfn in real mode)
Merging s390-fixes/fixes (8e90b4b1305a s390: correct __bootdata / 
__bootdata_preserved macros)
Merging sparc/master (0a95a6d1a4cd sparc: use for_each_child_of_node() macro)
Merging fscrypt-current/for-stable (2b4eae95c736 fscrypt: don't evict dirty 
inodes after removing key)
Merging net/master (d6535dca2885 net: protect tcf_block_unbind with block lock)
Merging bpf/master (c66dca98a24c samples/bpf: Set rlimit for memlock to 
infinity in all samples)
Merging ipsec/master (a779d91314ca net: xfrm: fix a race condition during 
allocing spi)
Merging netfilter/master (c77761c8a594 netfilter: nf_fwd_netdev: clear 
timestamp in forwarding path)
Merging ipvs/master (c77761c8a594 netfilter: nf_fwd_netdev: clear timestamp in 
forwarding path)
Merging wireless-drivers/master (3650b228f83a Linux 5.10-rc1)
Merging mac80211/master (435ccfa894e3 tcp: Prevent low rmem stalls with 
SO_RCVLOWAT.)
Merging rdma-fixes/for-rc (a2267f8a52ee RDMA/qedr: Fix memory leak in iWARP CM)
Merging sound-current/for-linus (9fc149c3bce7 ALSA: hda: Reinstate 
runtime_allow() for all hda controllers)
Merging sound-asoc-fixes/for-linus (cd3f7cc0ca6e Merge remote-tracking branch 
'asoc/for-5.10' into asoc-linus)
Merging regmap-fixes/for-linus (780f88b04704 Merge remote-tracking branch 
'regmap/for-5.10' into regmap-linus)
Merging regulator-fixes/for-linus (c432bf3e3d82 Merge remote-tracking branch 
'regulator/for-5.10' into regulator-linus)
Merging spi-fixes/for-linus (7c6e0c9419d1 Merge remote-tracking branch 
'spi/for-5.10' into spi-linus)
Merging pci-current/for-linus (3650b228f83a Linux 5.10-rc1)
Merging driver-core.current/driver-core-linus (3650b228f83a Linux 5.10-rc

Re: [PATCH] ext4: Use generic casefolding support

2020-10-29 Thread Theodore Y. Ts'o
On Wed, Oct 28, 2020 at 05:08:20AM +, Daniel Rosenberg wrote:
> This switches ext4 over to the generic support provided in libfs.
> 
> Since casefolded dentries behave the same in ext4 and f2fs, we decrease
> the maintenance burden by unifying them, and any optimizations will
> immediately apply to both.
> 
> Signed-off-by: Daniel Rosenberg 
> Reviewed-by: Eric Biggers 

Applied, thanks.

- Ted


GIT PULL] ext4 fixes for 5.10-rc2

2020-10-29 Thread Theodore Y. Ts'o
The following changes since commit 96485e4462604744d66bf4301557d996d80b85eb:

  Merge tag 'ext4_for_linus' of 
git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4 (2020-10-22 10:31:08 
-0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4.git 
tags/ext4_for_linus_fixes

for you to fetch changes up to 6694875ef8045cdb1e6712ee9b68fe08763507d8:

  ext4: indicate that fast_commit is available via /sys/fs/ext4/feature/... 
(2020-10-28 13:43:22 -0400)


Bug fixes for the new ext4 fast commit feature, plus a fix for the
data=journal bug fix.  Also use the generic casefolding support which
has now landed in fs/libfs.c for 5.10.


Andrea Righi (1):
  ext4: properly check for dirty state in ext4_inode_datasync_dirty()

Daniel Rosenberg (1):
  ext4: use generic casefolding support

Harshad Shirwadkar (4):
  ext4: fix double locking in ext4_fc_commit_dentry_updates()
  ext4: make num of fast commit blocks configurable
  ext4: use s_mount_flags instead of s_mount_state for fast commit state
  ext4: use IS_ERR() for error checking of path

Jan Kara (1):
  ext4: fix mmap write protection for data=journal mode

Mauro Carvalho Chehab (1):
  jbd2: fix a kernel-doc markup

Theodore Ts'o (1):
  ext4: indicate that fast_commit is available via /sys/fs/ext4/feature/...

yangerkun (1):
  ext4: do not use extent after put_bh

 fs/ext4/dir.c | 64 
++--
 fs/ext4/ext4.h| 20 
 fs/ext4/extents.c | 30 +++---
 fs/ext4/fast_commit.c | 37 -
 fs/ext4/hash.c|  2 +-
 fs/ext4/inode.c   | 15 +--
 fs/ext4/namei.c   | 20 
 fs/ext4/super.c   | 16 
 fs/ext4/sysfs.c   |  2 ++
 include/linux/jbd2.h  |  7 +--
 10 files changed, 78 insertions(+), 135 deletions(-)


Re: [PATCH] [v2] x86: apic: avoid -Wshadow warning in header

2020-10-29 Thread Paolo Bonzini
On 28/10/20 22:20, Arnd Bergmann wrote:
> Avoid this by renaming the global 'apic' variable to the more descriptive
> 'x86_system_apic'. It was originally called 'genapic', but both that
> and the current 'apic' seem to be a little overly generic for a global
> variable.

The 'apic' affects only the current CPU, so one of 'x86_local_apic',
'x86_lapic' or 'x86_apic' is probably preferrable.

I don't have huge objections to renaming 'apic' variables and arguments
in KVM to 'lapic'.  I do agree with Sean however that it's going to
break again very soon.

Paolo



[PATCH v5 16/21] perf arm-spe: Remove size condition checking for events

2020-10-29 Thread Leo Yan
In the Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.6 Events packet", it
describes the event bit is valid with specific payload requirement.  For
example, the Last Level cache access event, the bit is defined as:

  E[8], byte 1 bit [0], when SZ == 0b01 , when SZ == 0b10 ,
 or when SZ == 0b11

It requires the payload size is at least 2 bytes, when byte 1 (start
counting from 0) is valid, E[8] (bit 0 in byte 1) can be used for LLC
access event type.  For safety, the code checks the condition for
payload size firstly, if meet the requirement for payload size, then
continue to parse event type.

If review function arm_spe_get_payload(), it has used cast, so any bytes
beyond the valid size have been set to zeros.

For this reason, we don't need to check payload size anymore afterwards
when parse events, thus this patch removes payload size conditions.

Suggested-by: Andre Przywara 
Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 tools/perf/util/arm-spe-decoder/arm-spe-decoder.c  |  9 +++--
 .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 14 ++
 2 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index cac2ef79c025..90d575cee1b9 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -192,16 +192,13 @@ static int arm_spe_read_record(struct arm_spe_decoder 
*decoder)
if (payload & BIT(EV_TLB_ACCESS))
decoder->record.type |= ARM_SPE_TLB_ACCESS;
 
-   if ((idx == 2 || idx == 4 || idx == 8) &&
-   (payload & BIT(EV_LLC_MISS)))
+   if (payload & BIT(EV_LLC_MISS))
decoder->record.type |= ARM_SPE_LLC_MISS;
 
-   if ((idx == 2 || idx == 4 || idx == 8) &&
-   (payload & BIT(EV_LLC_ACCESS)))
+   if (payload & BIT(EV_LLC_ACCESS))
decoder->record.type |= ARM_SPE_LLC_ACCESS;
 
-   if ((idx == 2 || idx == 4 || idx == 8) &&
-   (payload & BIT(EV_REMOTE_ACCESS)))
+   if (payload & BIT(EV_REMOTE_ACCESS))
decoder->record.type |= ARM_SPE_REMOTE_ACCESS;
 
if (payload & BIT(EV_MISPRED))
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index e8c334f19316..b42ba64274c1 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -294,14 +294,12 @@ static int arm_spe_pkt_desc_event(const struct 
arm_spe_pkt *packet,
arm_spe_pkt_snprintf(&err, &buf, &blen, " NOT-TAKEN");
if (payload & BIT(EV_MISPRED))
arm_spe_pkt_snprintf(&err, &buf, &blen, " MISPRED");
-   if (packet->index > 1) {
-   if (payload & BIT(EV_LLC_ACCESS))
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-ACCESS");
-   if (payload & BIT(EV_LLC_MISS))
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-REFILL");
-   if (payload & BIT(EV_REMOTE_ACCESS))
-   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
REMOTE-ACCESS");
-   }
+   if (payload & BIT(EV_LLC_ACCESS))
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-ACCESS");
+   if (payload & BIT(EV_LLC_MISS))
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-REFILL");
+   if (payload & BIT(EV_REMOTE_ACCESS))
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " REMOTE-ACCESS");
 
return err ?: (int)(buf_len - blen);
 }
-- 
2.17.1



[PATCH v5 18/21] perf arm-spe: Refactor operation packet handling

2020-10-29 Thread Leo Yan
Defines macros for operation packet header and formats (support sub
classes for 'other', 'branch', 'load and store', etc).  Uses these
macros for operation packet decoding and dumping.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 ++-
 .../arm-spe-decoder/arm-spe-pkt-decoder.h | 23 
 2 files changed, 37 insertions(+), 12 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index e51b103d9973..575635c54e48 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -144,7 +144,7 @@ static int arm_spe_get_op_type(const unsigned char *buf, 
size_t len,
   struct arm_spe_pkt *packet)
 {
packet->type = ARM_SPE_OP_TYPE;
-   packet->index = buf[0] & 0x3;
+   packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
 }
 
@@ -312,32 +312,34 @@ static int arm_spe_pkt_desc_op_type(const struct 
arm_spe_pkt *packet,
int err = 0;
 
switch (packet->index) {
-   case 0:
+   case SPE_OP_PKT_HDR_CLASS_OTHER:
return arm_spe_pkt_snprintf(&err, &buf, &blen,
-   payload & 0x1 ? "COND-SELECT" : "INSN-OTHER");
-   case 1:
+   payload & SPE_OP_PKT_COND ? "COND-SELECT" : 
"INSN-OTHER");
+   case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
arm_spe_pkt_snprintf(&err, &buf, &blen,
 payload & 0x1 ? "ST" : "LD");
 
-   if (payload & 0x2) {
-   if (payload & 0x4)
+   if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) {
+   if (payload & SPE_OP_PKT_AT)
arm_spe_pkt_snprintf(&err, &buf, &blen, " AT");
-   if (payload & 0x8)
+   if (payload & SPE_OP_PKT_EXCL)
arm_spe_pkt_snprintf(&err, &buf, &blen, " 
EXCL");
-   if (payload & 0x10)
+   if (payload & SPE_OP_PKT_AR)
arm_spe_pkt_snprintf(&err, &buf, &blen, " AR");
-   } else if (payload & 0x4) {
+   } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
+   SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
arm_spe_pkt_snprintf(&err, &buf, &blen, " SIMD-FP");
}
 
return err ?: (int)(buf_len - blen);
 
-   case 2:
+   case SPE_OP_PKT_HDR_CLASS_BR_ERET:
arm_spe_pkt_snprintf(&err, &buf, &blen, "B");
 
-   if (payload & 0x1)
+   if (payload & SPE_OP_PKT_COND)
arm_spe_pkt_snprintf(&err, &buf, &blen, " COND");
-   if (payload & 0x2)
+
+   if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload))
arm_spe_pkt_snprintf(&err, &buf, &blen, " IND");
 
return err ?: (int)(buf_len - blen);
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 42ed4e61ede2..7032fc141ad4 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -105,6 +105,29 @@ enum arm_spe_events {
EV_EMPTY_PREDICATE  = 18,
 };
 
+/* Operation packet header */
+#define SPE_OP_PKT_HDR_CLASS(h)((h) & GENMASK_ULL(1, 
0))
+#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0
+#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC  0x1
+#define SPE_OP_PKT_HDR_CLASS_BR_ERET   0x2
+
+#define SPE_OP_PKT_CONDBIT(0)
+
+#define SPE_OP_PKT_LDST_SUBCLASS_GET(v)((v) & GENMASK_ULL(7, 
1))
+#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG0x0
+#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP   0x4
+#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG0x10
+#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG 0x30
+
+#define SPE_OP_PKT_IS_LDST_ATOMIC(v)   (((v) & (GENMASK_ULL(7, 5) | 
BIT(1))) == 0x2)
+
+#define SPE_OP_PKT_AR  BIT(4)
+#define SPE_OP_PKT_EXCLBIT(3)
+#define SPE_OP_PKT_AT  BIT(2)
+#define SPE_OP_PKT_ST  BIT(0)
+
+#define SPE_OP_PKT_IS_INDIRECT_BRANCH(v)   (((v) & GENMASK_ULL(7, 1)) == 
0x2)
+
 const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
 
 int arm_spe_get_packet(const unsigned char *buf, size_t len,
-- 
2.17.1



Re: [PATCH 20/33] docs: ABI: testing: make the files compatible with ReST output

2020-10-29 Thread Mauro Carvalho Chehab
Hi Richard,

Em Wed, 28 Oct 2020 10:44:27 -0700
Richard Cochran  escreveu:

> On Wed, Oct 28, 2020 at 03:23:18PM +0100, Mauro Carvalho Chehab wrote:
> 
> > diff --git a/Documentation/ABI/testing/sysfs-uevent 
> > b/Documentation/ABI/testing/sysfs-uevent
> > index aa39f8d7bcdf..d0893dad3f38 100644
> > --- a/Documentation/ABI/testing/sysfs-uevent
> > +++ b/Documentation/ABI/testing/sysfs-uevent
> > @@ -19,7 +19,8 @@ Description:
> >  a transaction identifier so it's possible to use the same 
> > UUID
> >  value for one or more synthetic uevents in which case we
> >  logically group these uevents together for any userspace
> > -listeners. The UUID value appears in uevent as
> > +listeners. The UUID value appears in uevent as:  
> 
> I know almost nothing about Sphinx, but why have one colon here ^^^ and ...

Good point. After re-reading the text, this ":" doesn't belong here.

> 
> > +
> >  "SYNTH_UUID=----" 
> > environment
> >  variable.
> >  
> > @@ -30,18 +31,19 @@ Description:
> >  It's possible to define zero or more pairs - each pair is 
> > then
> >  delimited by a space character ' '. Each pair appears in
> >  synthetic uevent as "SYNTH_ARG_KEY=VALUE". That means the 
> > KEY
> > -name gains "SYNTH_ARG_" prefix to avoid possible collisions
> > +name gains `SYNTH_ARG_` prefix to avoid possible collisions
> >  with existing variables.
> >  
> > -Example of valid sequence written to the uevent file:
> > +Example of valid sequence written to the uevent file::  
> 
> ... two here?

The main issue that this patch wants to solve is here:

This generates synthetic uevent including these variables::

ACTION=add
SYNTH_ARG_A=1
SYNTH_ARG_B=abc
SYNTH_UUID=fe4d7c9d-b8c6-4a70-9ef1-3d8a58d18eed

On Sphinx, consecutive lines with the same indent belongs to the same
paragraph. So, without "::", the above will be displayed on a single line,
which is undesired.

using "::" tells Sphinx to display as-is. It will also place it into a a 
box (colored for html output) and using a monospaced font.

The change at the "uevent file:" line was done just for coherency
purposes.

Yet, after re-reading the text, there are other things that are not
coherent. So, I guess the enclosed patch will work better for sys-uevent.

Thanks,
Mauro

docs: ABI: sysfs-uevent: make it compatible with ReST output

- Replace " by ``, in order to use monospaced fonts;
- mark literal blocks as such.

Signed-off-by: Mauro Carvalho Chehab 

diff --git a/Documentation/ABI/testing/sysfs-uevent 
b/Documentation/ABI/testing/sysfs-uevent
index aa39f8d7bcdf..0b6227706b35 100644
--- a/Documentation/ABI/testing/sysfs-uevent
+++ b/Documentation/ABI/testing/sysfs-uevent
@@ -6,42 +6,46 @@ Description:
 Enable passing additional variables for synthetic uevents that
 are generated by writing /sys/.../uevent file.
 
-Recognized extended format is ACTION [UUID [KEY=VALUE ...].
+Recognized extended format is::
 
-The ACTION is compulsory - it is the name of the uevent action
-("add", "change", "remove"). There is no change compared to
-previous functionality here. The rest of the extended format
-is optional.
+   ACTION [UUID [KEY=VALUE ...]
+
+The ACTION is compulsory - it is the name of the uevent
+action (``add``, ``change``, ``remove``). There is no change
+compared to previous functionality here. The rest of the
+extended format is optional.
 
 You need to pass UUID first before any KEY=VALUE pairs.
-The UUID must be in "----"
+The UUID must be in ``----``
 format where 'x' is a hex digit. The UUID is considered to be
 a transaction identifier so it's possible to use the same UUID
 value for one or more synthetic uevents in which case we
 logically group these uevents together for any userspace
 listeners. The UUID value appears in uevent as
-"SYNTH_UUID=----" environment
+``SYNTH_UUID=----`` environment
 variable.
 
 If UUID is not passed in, the generated synthetic uevent gains
-"SYNTH_UUID=0" environment variable automatically.
+``SYNTH_UUID=0`` environment variable automatically.
 
 The KEY=VALUE pairs can contain alphanumeric char

[PATCH v5 21/21] perf arm-spe: Add support for ARMv8.3-SPE

2020-10-29 Thread Leo Yan
From: Wei Li 

This patch is to support Armv8.3 extension for SPE, it adds alignment
field in the Events packet and it supports the Scalable Vector Extension
(SVE) for Operation packet and Events packet with two additions:

  - The vector length for SVE operations in the Operation Type packet;
  - The incomplete predicate and empty predicate fields in the Events
packet.

Signed-off-by: Wei Li 
Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 39 ++-
 .../arm-spe-decoder/arm-spe-pkt-decoder.h | 16 
 2 files changed, 53 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 97a47ac3aa28..6c1d872caa81 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -300,6 +300,12 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt 
*packet,
arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-REFILL");
if (payload & BIT(EV_REMOTE_ACCESS))
arm_spe_pkt_snprintf(&err, &buf, &blen, " REMOTE-ACCESS");
+   if (payload & BIT(EV_ALIGNMENT))
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " ALIGNMENT");
+   if (payload & BIT(EV_PARTIAL_PREDICATE))
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " SVE-PARTIAL-PRED");
+   if (payload & BIT(EV_EMPTY_PREDICATE))
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " SVE-EMPTY-PRED");
 
return err ?: (int)(buf_len - blen);
 }
@@ -313,8 +319,26 @@ static int arm_spe_pkt_desc_op_type(const struct 
arm_spe_pkt *packet,
 
switch (packet->index) {
case SPE_OP_PKT_HDR_CLASS_OTHER:
-   return arm_spe_pkt_snprintf(&err, &buf, &blen,
-   payload & SPE_OP_PKT_COND ? "COND-SELECT" : 
"INSN-OTHER");
+   if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) {
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "SVE-OTHER");
+
+   /* SVE effective vector length */
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " EVLEN %d",
+SPE_OP_PKG_SVE_EVL(payload));
+
+   if (payload & SPE_OP_PKT_SVE_FP)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " FP");
+   if (payload & SPE_OP_PKT_SVE_PRED)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
PRED");
+   } else {
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "OTHER");
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " %s",
+payload & SPE_OP_PKT_COND ?
+"COND-SELECT" : "INSN-OTHER");
+   }
+
+   return err ?: (int)(buf_len - blen);
+
case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
arm_spe_pkt_snprintf(&err, &buf, &blen,
 payload & 0x1 ? "ST" : "LD");
@@ -345,6 +369,17 @@ static int arm_spe_pkt_desc_op_type(const struct 
arm_spe_pkt *packet,
break;
}
 
+   if (SPE_OP_PKT_IS_LDST_SVE(payload)) {
+   /* SVE effective vector length */
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " EVLEN %d",
+SPE_OP_PKG_SVE_EVL(payload));
+
+   if (payload & SPE_OP_PKT_SVE_PRED)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
PRED");
+   if (payload & SPE_OP_PKT_SVE_SG)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " SG");
+   }
+
return err ?: (int)(buf_len - blen);
 
case SPE_OP_PKT_HDR_CLASS_BR_ERET:
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 1ad14885c2a1..9b970e7bf1e2 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -113,6 +113,8 @@ enum arm_spe_events {
 #define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC  0x1
 #define SPE_OP_PKT_HDR_CLASS_BR_ERET   0x2
 
+#define SPE_OP_PKT_IS_OTHER_SVE_OP(v)  (((v) & (BIT(7) | BIT(3) | 
BIT(0))) == 0x8)
+
 #define SPE_OP_PKT_CONDBIT(0)
 
 #define SPE_OP_PKT_LDST_SUBCLASS_GET(v)((v) & GENMASK_ULL(7, 
1))
@@ -128,6 +130,20 @@ enum arm_spe_events {
 #define SPE_OP_PKT_AT  BIT(2)
 #define SPE_OP_PKT_ST  BIT(0)
 
+#define SPE_OP_PKT_IS_LDST_SVE(v)  (((v) & (BIT(3) | BIT(1))) == 
0x8)
+
+#define SPE_OP_PKT_SVE_SG  BIT(7)
+/*
+ * SVE effective vector length (EVL) is stored in byte 0 bits [6:4];
+ * the length i

[PATCH v5 15/21] perf arm-spe: Refactor event type handling

2020-10-29 Thread Leo Yan
Move the enums of event types to arm-spe-pkt-decoder.h, thus function
arm_spe_pkt_desc() can them for bitmasks.

Suggested-by: Andre Przywara 
Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../util/arm-spe-decoder/arm-spe-decoder.h| 17 --
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 22 +--
 .../arm-spe-decoder/arm-spe-pkt-decoder.h | 18 +++
 3 files changed, 29 insertions(+), 28 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
index a5111a8d4360..24727b8ca7ff 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
@@ -13,23 +13,6 @@
 
 #include "arm-spe-pkt-decoder.h"
 
-enum arm_spe_events {
-   EV_EXCEPTION_GEN= 0,
-   EV_RETIRED  = 1,
-   EV_L1D_ACCESS   = 2,
-   EV_L1D_REFILL   = 3,
-   EV_TLB_ACCESS   = 4,
-   EV_TLB_WALK = 5,
-   EV_NOT_TAKEN= 6,
-   EV_MISPRED  = 7,
-   EV_LLC_ACCESS   = 8,
-   EV_LLC_MISS = 9,
-   EV_REMOTE_ACCESS= 10,
-   EV_ALIGNMENT= 11,
-   EV_PARTIAL_PREDICATE= 17,
-   EV_EMPTY_PREDICATE  = 18,
-};
-
 enum arm_spe_sample_type {
ARM_SPE_L1D_ACCESS  = 1 << 0,
ARM_SPE_L1D_MISS= 1 << 1,
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 6e4896327e56..e8c334f19316 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -278,28 +278,28 @@ static int arm_spe_pkt_desc_event(const struct 
arm_spe_pkt *packet,
 
arm_spe_pkt_snprintf(&err, &buf, &blen, "EV");
 
-   if (payload & 0x1)
+   if (payload & BIT(EV_EXCEPTION_GEN))
arm_spe_pkt_snprintf(&err, &buf, &blen, " EXCEPTION-GEN");
-   if (payload & 0x2)
+   if (payload & BIT(EV_RETIRED))
arm_spe_pkt_snprintf(&err, &buf, &blen, " RETIRED");
-   if (payload & 0x4)
+   if (payload & BIT(EV_L1D_ACCESS))
arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-ACCESS");
-   if (payload & 0x8)
+   if (payload & BIT(EV_L1D_REFILL))
arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-REFILL");
-   if (payload & 0x10)
+   if (payload & BIT(EV_TLB_ACCESS))
arm_spe_pkt_snprintf(&err, &buf, &blen, " TLB-ACCESS");
-   if (payload & 0x20)
+   if (payload & BIT(EV_TLB_WALK))
arm_spe_pkt_snprintf(&err, &buf, &blen, " TLB-REFILL");
-   if (payload & 0x40)
+   if (payload & BIT(EV_NOT_TAKEN))
arm_spe_pkt_snprintf(&err, &buf, &blen, " NOT-TAKEN");
-   if (payload & 0x80)
+   if (payload & BIT(EV_MISPRED))
arm_spe_pkt_snprintf(&err, &buf, &blen, " MISPRED");
if (packet->index > 1) {
-   if (payload & 0x100)
+   if (payload & BIT(EV_LLC_ACCESS))
arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-ACCESS");
-   if (payload & 0x200)
+   if (payload & BIT(EV_LLC_MISS))
arm_spe_pkt_snprintf(&err, &buf, &blen, " LLC-REFILL");
-   if (payload & 0x400)
+   if (payload & BIT(EV_REMOTE_ACCESS))
arm_spe_pkt_snprintf(&err, &buf, &blen, " 
REMOTE-ACCESS");
}
 
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 7d8e34e35f05..42ed4e61ede2 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -87,6 +87,24 @@ struct arm_spe_pkt {
 #define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT0x1
 #define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT0x2
 
+/* Event packet payload */
+enum arm_spe_events {
+   EV_EXCEPTION_GEN= 0,
+   EV_RETIRED  = 1,
+   EV_L1D_ACCESS   = 2,
+   EV_L1D_REFILL   = 3,
+   EV_TLB_ACCESS   = 4,
+   EV_TLB_WALK = 5,
+   EV_NOT_TAKEN= 6,
+   EV_MISPRED  = 7,
+   EV_LLC_ACCESS   = 8,
+   EV_LLC_MISS = 9,
+   EV_REMOTE_ACCESS= 10,
+   EV_ALIGNMENT= 11,
+   EV_PARTIAL_PREDICATE= 17,
+   EV_EMPTY_PREDICATE  = 18,
+};
+
 const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
 
 int arm_spe_get_packet(const unsigned char *buf, size_t len,
-- 
2.17.1



Re: [PATCH] char: misc: increase DYNAMIC_MINORS value

2020-10-29 Thread Greg KH
On Thu, Oct 29, 2020 at 03:28:55PM +0900, Sangmoon Kim wrote:
> DYNAMIC_MINORS value has been set to 64.
> Due to this reason, we are facing a module loading fail problem of
> device driver like below.
> 
>  [   45.712771] pdic_misc_init - return error : -16
> 
> We need to increase this value for registering more misc devices.

That's a lot of misc devices, nice to see it used more now :)

I'll go queue this up, thanks!

greg k-h


Re: [PATCH 0/3] KVM: x86/mmu: Add macro for hugepage GFN mask

2020-10-29 Thread Paolo Bonzini
On 28/10/20 16:29, Sean Christopherson wrote:
> The naming and usage also aligns with the kernel, which defines PAGE, PMD and
> PUD masks, and has near identical usage patterns.
> 
>   #define PAGE_SIZE   (_AC(1,UL) << PAGE_SHIFT)
>   #define PAGE_MASK   (~(PAGE_SIZE-1))
> 
>   #define PMD_PAGE_SIZE   (_AC(1, UL) << PMD_SHIFT)
>   #define PMD_PAGE_MASK   (~(PMD_PAGE_SIZE-1))
> 
>   #define PUD_PAGE_SIZE   (_AC(1, UL) << PUD_SHIFT)
>   #define PUD_PAGE_MASK   (~(PUD_PAGE_SIZE-1))

Well, PAGE_MASK is also one of my pet peeves for Linux.  At least I am
consistent. :)

>> and of course if you're debugging it you have to
>> look closer and check if it's really "x & -y" or "x & ~y", but at least
>> in normal cursory code reading that's how it works for me.
> 
> IMO, "x & -y" has a higher barrier to entry, especially when the kernel's page
> masks uses "x & ~(y - 1))".  But, my opinion is definitely colored by my
> inability to read two's-complement on the fly.

Fair enough.  What about having instead

#define KVM_HPAGE_GFN_BASE(gfn, level)  \
   (x & ~(KVM_PAGES_PER_HPAGE(gfn) - 1))
#define KVM_HPAGE_GFN_INDEX(gfn, level)  \
   (x & (KVM_PAGES_PER_HPAGE(gfn) - 1))

?

Paolo



[PATCH v12 00/10] TCPM support for FRS and AutoDischarge Disconnect

2020-10-29 Thread Badhri Jagan Sridharan
Hi all,

Addressed two comments in the series
1. From Rob Herring: Maxim parts are generally named 'maxim,max[0-9]+'
   https://lkml.org/lkml/2020/10/26/503
   Changed all occurences of maxim,33359 to maxim,max33359.

2. Added a new patch to address warnings reported by Kernel test robot.
   https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg2354139.html
   usb: typec: tcpci_maxim: Fix smatch warnings

Heikki, now that Rob has reviewed the dts patches, the following patches
are ready to be reviewed as well:
usb: typec: tcpci_maxim: Fix the compatible string
usb: typec: tcpm: Refactor logic for new-source-frs-typec-current

Greatly appreciate all of your support reviewing the code.

Thanks,
Badhri.

Badhri Jagan Sridharan (10):
  dt-bindings: usb: Maxim type-c controller device tree binding document
  usb: typec: tcpci_maxim: Fix the compatible string
  usb: typec: tcpm: Refactor logic for new-source-frs-typec-current
  usb: typec: tcpm: frs sourcing vbus callback
  usb: typec: tcpci: frs sourcing vbus callback
  usb: typec: tcpci_maxim: Fix vbus stuck on upon diconnecting sink
  usb: typec: tcpm: Implement enabling Auto Discharge disconnect support
  usb: typec: tcpci: Implement Auto discharge disconnect callbacks
  usb: typec: tcpci_maxim: Enable auto discharge disconnect
  usb: typec: tcpci_maxim: Fix smatch warnings

 .../bindings/usb/maxim,max33359.yaml  | 75 
 drivers/usb/typec/tcpm/tcpci.c| 72 ++-
 drivers/usb/typec/tcpm/tcpci.h| 18 +++-
 drivers/usb/typec/tcpm/tcpci_maxim.c  | 35 
 drivers/usb/typec/tcpm/tcpm.c | 87 ---
 include/linux/usb/tcpm.h  | 19 
 6 files changed, 274 insertions(+), 32 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/maxim,max33359.yaml


base-commit: aee9ddb1d3718d3ba05b50c51622d7792ae749c9
-- 
2.29.1.341.ge80a0c044ae-goog



Re: [PATCH] Add devices for HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE

2020-10-29 Thread Greg KH
On Wed, Oct 28, 2020 at 04:51:13PM -0700, FirstName LastName wrote:
> Kernel 5.4 introduces HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE, devices
> need to be set explicitly with this flag.
> 
> Signed-off-by: Chris Ye 

Your email client needs to be fixed, as your "name" up there is very odd :)



[PATCH 1/1] x86/speculation: Allow IBPB to be conditionally enabled on CPUs with always-on STIBP

2020-10-29 Thread Anand K Mistry
On AMD CPUs which have the feature X86_FEATURE_AMD_STIBP_ALWAYS_ON,
STIBP is set to on and 'spectre_v2_user_stibp ==
SPECTRE_V2_USER_STRICT_PREFERRED'. At the same time, IBPB can be set to
conditional. However, this leads to the case where it's impossible to
turn on IBPB for a process because in the PR_SPEC_DISABLE case in
ib_prctl_set, the (spectre_v2_user_stibp ==
SPECTRE_V2_USER_STRICT_PREFERRED) condition leads to a return before the
task flag is set. Similarly, ib_prctl_get will return PR_SPEC_DISABLE
even though IBPB is set to conditional.

More generally, the following cases are possible:
1. STIBP = conditional && IBPB = on for spectre_v2_user=seccomp,ibpb
2. STIBP = on && IBPB = conditional for AMD CPUs with
   X86_FEATURE_AMD_STIBP_ALWAYS_ON

The first case functions correctly today, but only because
spectre_v2_user_ibpb isn't updated to reflect the IBPB mode.

At a high level, this change does one thing. If either STIBP is IBPB is
set to conditional, allow the prctl to change the task flag. Also,
reflect that capability when querying the state. This isn't perfect
since it doesn't take into account if only STIBP or IBPB is
unconditionally on. But it allows the conditional feature to work as
expected, without affecting the unconditional one.

Signed-off-by: Anand K Mistry 

---

 arch/x86/kernel/cpu/bugs.c | 41 +-
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d3f0db463f96..fb64e02eed6f 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -1254,6 +1254,11 @@ static int ssb_prctl_set(struct task_struct *task, 
unsigned long ctrl)
return 0;
 }
 
+static bool is_spec_ib_user(enum spectre_v2_user_mitigation mode)
+{
+   return mode == SPECTRE_V2_USER_PRCTL || mode == SPECTRE_V2_USER_SECCOMP;
+}
+
 static int ib_prctl_set(struct task_struct *task, unsigned long ctrl)
 {
switch (ctrl) {
@@ -1262,13 +1267,16 @@ static int ib_prctl_set(struct task_struct *task, 
unsigned long ctrl)
spectre_v2_user_stibp == SPECTRE_V2_USER_NONE)
return 0;
/*
-* Indirect branch speculation is always disabled in strict
-* mode. It can neither be enabled if it was force-disabled
-* by a  previous prctl call.
+* With strict mode for both IBPB and STIBP, the instruction
+* code paths avoid checking this task flag and instead,
+* unconditionally run the instruction. However, STIBP and IBPB
+* are independent and either can be set to conditionally
+* enabled regardless of the mode of the other. If either is set
+* to conditional, allow the task flag to be updated, unless it
+* was force-disabled by a previous prctl call.
 */
-   if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED ||
+   if ((!is_spec_ib_user(spectre_v2_user_ibpb) &&
+!is_spec_ib_user(spectre_v2_user_stibp)) ||
task_spec_ib_force_disable(task))
return -EPERM;
task_clear_spec_ib_disable(task);
@@ -1283,9 +1291,8 @@ static int ib_prctl_set(struct task_struct *task, 
unsigned long ctrl)
if (spectre_v2_user_ibpb == SPECTRE_V2_USER_NONE &&
spectre_v2_user_stibp == SPECTRE_V2_USER_NONE)
return -EPERM;
-   if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED)
+   if (!is_spec_ib_user(spectre_v2_user_ibpb) &&
+   !is_spec_ib_user(spectre_v2_user_stibp))
return 0;
task_set_spec_ib_disable(task);
if (ctrl == PR_SPEC_FORCE_DISABLE)
@@ -1351,20 +1358,18 @@ static int ib_prctl_get(struct task_struct *task)
if (spectre_v2_user_ibpb == SPECTRE_V2_USER_NONE &&
spectre_v2_user_stibp == SPECTRE_V2_USER_NONE)
return PR_SPEC_ENABLE;
-   else if (spectre_v2_user_ibpb == SPECTRE_V2_USER_STRICT ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED)
-   return PR_SPEC_DISABLE;
-   else if (spectre_v2_user_ibpb == SPECTRE_V2_USER_PRCTL ||
-   spectre_v2_user_ibpb == SPECTRE_V2_USER_SECCOMP ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_PRCTL ||
-   spectre_v2_user_stibp == SPECTRE_V2_USER_SECCOMP) {
+   else if (is_spec_ib_user(spectre_v2_user_ibpb) ||
+is_spec_ib_user(spe

RE: [PATCH v2] ath10k: Fix the parsing error in service available event

2020-10-29 Thread Rakesh Pillai



> -Original Message-
> From: Doug Anderson 
> Sent: Thursday, October 29, 2020 12:15 AM
> To: Rakesh Pillai 
> Cc: ath10k ; linux-wireless  wirel...@vger.kernel.org>; LKML ; Abhishek
> Kumar ; Brian Norris 
> Subject: Re: [PATCH v2] ath10k: Fix the parsing error in service available
> event
> 
> Hi,
> 
> On Wed, Oct 28, 2020 at 10:01 AM Rakesh Pillai 
> wrote:
> >
> > The wmi service available event has been
> > extended to contain extra 128 bit for new services
> > to be indicated by firmware.
> >
> > Currently the presence of any optional TLVs in
> > the wmi service available event leads to a parsing
> > error with the below error message:
> > ath10k_snoc 1880.wifi: failed to parse svc_avail tlv: -71
> >
> > The wmi service available event parsing should
> > not return error for the newly added optional TLV.
> > Fix this parsing for service available event message.
> >
> > Tested-on: WCN3990 hw1.0 SNOC
> >
> > Fixes: cea19a6ce8bf ("ath10k: add WMI_SERVICE_AVAILABLE_EVENT
> support")
> > Signed-off-by: Rakesh Pillai 
> > ---
> > Changes from v1:
> > - Access service_map_ext only if this TLV was sent in service
> >   available event.
> > ---
> >  drivers/net/wireless/ath/ath10k/wmi-tlv.c | 4 +++-
> >  drivers/net/wireless/ath/ath10k/wmi.c | 5 +++--
> >  drivers/net/wireless/ath/ath10k/wmi.h | 1 +
> >  3 files changed, 7 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/wireless/ath/ath10k/wmi-tlv.c
> b/drivers/net/wireless/ath/ath10k/wmi-tlv.c
> > index 932266d..7b58341 100644
> > --- a/drivers/net/wireless/ath/ath10k/wmi-tlv.c
> > +++ b/drivers/net/wireless/ath/ath10k/wmi-tlv.c
> > @@ -1401,13 +1401,15 @@ static int
> ath10k_wmi_tlv_svc_avail_parse(struct ath10k *ar, u16 tag, u16 len,
> >
> > switch (tag) {
> > case WMI_TLV_TAG_STRUCT_SERVICE_AVAILABLE_EVENT:
> > +   arg->service_map_ext_valid = true;
> > arg->service_map_ext_len = *(__le32 *)ptr;
> > arg->service_map_ext = ptr + sizeof(__le32);
> > return 0;
> > default:
> > break;
> > }
> > -   return -EPROTO;
> > +
> > +   return 0;
> 
> I notice your v2 now returns 0 for _all_ unknown tags.  v1 just had a
> special case for "WMI_TLV_TAG_FIRST_ARRAY_ENUM".  I don't have
> enough
> experience with this driver to know which is better, but this change
> wasn't mentioned in the changes from v1.  I guess you had a change of
> heart and decided this way was better?

Earlier patchset which added a case for " WMI_TLV_TAG_FIRST_ARRAY_ENUM", still 
returned error if there is any other TLV except for the two cases handled.
This leaves the possibility of an error when a new TLV gets added to this 
service_available message.

Since we are using the "valid" flag to indicate the validity of a particular 
tag, we need not return failure in any case. This makes it scalable (and 
maintains backward compatibility), in case extra TLVs are added to this message 
in future.

> 
> 
> >  }
> >
> >  static int ath10k_wmi_tlv_op_pull_svc_avail(struct ath10k *ar,
> > diff --git a/drivers/net/wireless/ath/ath10k/wmi.c
> b/drivers/net/wireless/ath/ath10k/wmi.c
> > index 1fa7107..2e4b561 100644
> > --- a/drivers/net/wireless/ath/ath10k/wmi.c
> > +++ b/drivers/net/wireless/ath/ath10k/wmi.c
> > @@ -5751,8 +5751,9 @@ void ath10k_wmi_event_service_available(struct
> ath10k *ar, struct sk_buff *skb)
> > ret);
> > }
> >
> > -   ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar-
> >wmi.svc_map,
> > -  __le32_to_cpu(arg.service_map_ext_len));
> > +   if (arg.service_map_ext_valid)
> > +   ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar-
> >wmi.svc_map,
> > +  
> > __le32_to_cpu(arg.service_map_ext_len));
> 
> Your new patch still requires the caller to init the
> "service_map_ext_valid" to false before calling, but I guess there's
> not a whole lot more we can do because we might be parsing more than
> one tag.  It does seem nice that at least we now have a validity bit
> instead of just relying on a non-zero length to be valid.
> 
> It might be nice to have a comment saying that it's up to us to init
> "arg.service_map_ext_valid" to false before calling
> ath10k_wmi_pull_svc_avail(), but I won't insist.  Maybe that's obvious
> to everyone but me...

I will wait for a couple of days, if there are any other comments, to post a v3 
addressing all of them together.
This approach of having a argument initialized to parse TLVs is used for many 
other wmi events as well.

> 
> 
> -Doug



Re: For review: seccomp_user_notif(2) manual page

2020-10-29 Thread Jann Horn
On Thu, Oct 29, 2020 at 3:13 AM Tycho Andersen  wrote:
> > > Consider the following scenario (with supervisor "S" and target "T"; S
> > > wants to wait for events on two file descriptors seccomp_fd and
> > > other_fd):
> > >
> > > S: starts poll() to wait for events on seccomp_fd and other_fd
> > > T: performs a syscall that's filtered with RET_USER_NOTIF
> > > S: poll() returns and signals readiness of seccomp_fd
> > > T: receives signal SIGUSR1
> > > T: syscall aborts, enters signal handler
> > > T: signal handler blocks on unfiltered syscall (e.g. write())
> > > S: starts SECCOMP_IOCTL_NOTIF_RECV
> > > S: blocks because no syscalls are pending
> > >
> > > Depending on what other_fd is, this could in a worst case even lead to
> > > a deadlock (if e.g. the signal handler wants to write to stdout, but
> > > the stdout fd is hooked up to other_fd in the supervisor, but the
> > > supervisor can't consume the data written because it's stuck in
> > > seccomp handling).
> > >
> > > So we have to ensure that when existing code (like that crun code you
> > > linked to) triggers this case, SECCOMP_IOCTL_NOTIF_RECV returns
> > > immediately instead of blocking.
> >
> > Or I guess we could also just set O_NONBLOCK on the fd by default?
> > Since the one existing user is eventloop-based...
>
> I feel like it's ok to return an error from the RECV ioctl() if
> there's never going to be any more events on the fd; was there
> something fundamentally wrong with your patch here:
> https://lore.kernel.org/bpf/cag48ez2xn+_kzneztj-evtstzkbf9cvgpqaak7tprnaqbda...@mail.gmail.com/
> ?

No, I have a new version of that about 80% done and hope to send it
out soonish. (There's some stuff around tests that I still need to
cobble together).


Re: [f2fs-dev] [PATCH v5 2/2] f2fs: add F2FS_IOC_SET_COMPRESS_OPTION ioctl

2020-10-29 Thread Chao Yu

On 2020/10/29 12:15, Daeho Jeong wrote:

From: Daeho Jeong 

Added a new F2FS_IOC_SET_COMPRESS_OPTION ioctl to change file
compression option of a file.

struct f2fs_comp_option {
 u8 algorithm; => compression algorithm
   => 0:lzo, 1:lz4, 2:zstd, 3:lzorle
 u8 log_cluster_size;  => log scale cluster size
   => 2 ~ 8
};

struct f2fs_comp_option option;

option.algorithm = 1;
option.log_cluster_size = 7;

ioctl(fd, F2FS_IOC_SET_COMPRESS_OPTION, &option);

Signed-off-by: Daeho Jeong 
---

v5: allowed to set algorithm which is not currently enabled by kernel
v4: changed commit message.
v3: changed the error number more specific.
 folded in fix for build breakage reported by kernel test robot
  and Dan Carpenter .
v2: added ioctl description.
---
  fs/f2fs/compress.c |  5 +
  fs/f2fs/f2fs.h |  7 ++
  fs/f2fs/file.c | 54 ++
  3 files changed, 66 insertions(+)

diff --git a/fs/f2fs/compress.c b/fs/f2fs/compress.c
index 7895186cc765..816d7adc914c 100644
--- a/fs/f2fs/compress.c
+++ b/fs/f2fs/compress.c
@@ -514,6 +514,11 @@ bool f2fs_is_compress_backend_ready(struct inode *inode)
return f2fs_cops[F2FS_I(inode)->i_compress_algorithm];
  }
  
+bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)

+{
+   return algorithm < COMPRESS_MAX && f2fs_cops[algorithm] != NULL;
+}
+
  static mempool_t *compress_page_pool;
  static int num_compress_pages = 512;
  module_param(num_compress_pages, uint, 0444);
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index a33c90cf979b..cc38afde6c04 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -435,6 +435,8 @@ static inline bool __has_cursum_space(struct f2fs_journal 
*journal,
struct f2fs_sectrim_range)
  #define F2FS_IOC_GET_COMPRESS_OPTION  _IOR(F2FS_IOCTL_MAGIC, 21,  \
struct f2fs_comp_option)
+#define F2FS_IOC_SET_COMPRESS_OPTION   _IOW(F2FS_IOCTL_MAGIC, 22,  \
+   struct f2fs_comp_option)
  
  /*

   * should be same as XFS_IOC_GOINGDOWN.
@@ -3915,6 +3917,7 @@ bool f2fs_compress_write_end(struct inode *inode, void 
*fsdata,
  int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool lock);
  void f2fs_compress_write_end_io(struct bio *bio, struct page *page);
  bool f2fs_is_compress_backend_ready(struct inode *inode);
+bool f2fs_is_compress_algorithm_ready(unsigned char algorithm);
  int f2fs_init_compress_mempool(void);
  void f2fs_destroy_compress_mempool(void);
  void f2fs_decompress_pages(struct bio *bio, struct page *page, bool verity);
@@ -3945,6 +3948,10 @@ static inline bool f2fs_is_compress_backend_ready(struct 
inode *inode)
/* not support compression */
return false;
  }
+static inline bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)
+{
+   return false;
+}
  static inline struct page *f2fs_compress_control_page(struct page *page)
  {
WARN_ON_ONCE(1);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 8922ab191a9d..a0f31d8ebcfd 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3963,6 +3963,57 @@ static int f2fs_ioc_get_compress_option(struct file 
*filp, unsigned long arg)
return 0;
  }
  
+static int f2fs_ioc_set_compress_option(struct file *filp, unsigned long arg)

+{
+   struct inode *inode = file_inode(filp);
+   struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+   struct f2fs_comp_option option;
+   int ret = 0;
+
+   if (!f2fs_sb_has_compression(sbi))
+   return -EOPNOTSUPP;
+
+   if (!(filp->f_mode & FMODE_WRITE))
+   return -EBADF;
+
+   if (copy_from_user(&option, (struct f2fs_comp_option __user *)arg,
+   sizeof(option)))
+   return -EFAULT;
+
+   if (!f2fs_compressed_file(inode) ||
+   option.log_cluster_size < MIN_COMPRESS_LOG_SIZE ||
+   option.log_cluster_size > MAX_COMPRESS_LOG_SIZE ||
+   option.algorithm >= COMPRESS_MAX)
+   return -EINVAL;
+
+   file_start_write(filp);
+   inode_lock(inode);
+
+   if (f2fs_is_mmap_file(inode) || get_dirty_pages(inode)) {
+   ret = -EBUSY;
+   goto out;
+   }
+
+   if (inode->i_size != 0) {
+   ret = -EFBIG;
+   goto out;
+   }


Hmm...

Shouldn't it be:

if (algorithm >= COMPRESS_MAX) {
ret = -ENOPKG;
goto out;
}

if (!f2fs_cops[algorithm])
f2fs_warn(...);


+
+   F2FS_I(inode)->i_compress_algorithm = option.algorithm;
+   F2FS_I(inode)->i_log_cluster_size = option.log_cluster_size;
+   F2FS_I(inode)->i_cluster_size = 1 << option.log_cluster_size;
+   f2fs_mark_inode_dirty_sync(inode, true);
+
+   if (!f2fs_is_compress_algorithm_ready(option.algorithm))
+   f2fs_warn(sbi

Re: [PATCH v5 3/3] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell

2020-10-29 Thread kernel test robot
Hi Pavana,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on robh/for-next]
[also build test WARNING on net-next/master net/master linus/master 
sparc-next/master v5.10-rc1 next-20201028]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Pavana-Sharma/Add-support-for-mv88e6393x-family-of-Marvell/20201028-094528
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: x86_64-randconfig-a002-20201028 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
772aaa602383cf82795572ebcd86b0e660f3579f)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/f94f949ebd95e4501f9af58a2e358e5c32761c67
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Pavana-Sharma/Add-support-for-mv88e6393x-family-of-Marvell/20201028-094528
git checkout f94f949ebd95e4501f9af58a2e358e5c32761c67
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/net/dsa/mv88e6xxx/port.c:29:5: warning: no previous prototype for 
>> function 'mv88e6xxx_port_wait_bit' [-Wmissing-prototypes]
   int mv88e6xxx_port_wait_bit(struct mv88e6xxx_chip *chip, int port, int reg,
   ^
   drivers/net/dsa/mv88e6xxx/port.c:29:1: note: declare 'static' if the 
function is not intended to be used outside of this translation unit
   int mv88e6xxx_port_wait_bit(struct mv88e6xxx_chip *chip, int port, int reg,
   ^
   static 
   1 warning generated.

vim +/mv88e6xxx_port_wait_bit +29 drivers/net/dsa/mv88e6xxx/port.c

28  
  > 29  int mv88e6xxx_port_wait_bit(struct mv88e6xxx_chip *chip, int port, int 
reg,
30  int bit, int val)
31  {
32  int addr = chip->info->port_base_addr + port;
33  
34  return mv88e6xxx_wait_bit(chip, addr, reg, bit, val);
35  }
36  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip


[PATCH] drm/hisilicon: Adding a const declaration to an invariant construct

2020-10-29 Thread Tian Tao
Some constructs cannot be changed after being assigned a value,
so add const declarations to invariant constructs.

Signed-off-by: Tian Tao 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c  | 2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index a1eabad..ef18b47 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -139,7 +139,7 @@ static const u32 channel_formats1[] = {
DRM_FORMAT_ABGR
 };
 
-static struct drm_plane_funcs hibmc_plane_funcs = {
+static const struct drm_plane_funcs hibmc_plane_funcs = {
.update_plane   = drm_atomic_helper_update_plane,
.disable_plane  = drm_atomic_helper_disable_plane,
.destroy = drm_plane_cleanup,
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 0c1b40d..fee6fe8 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -369,7 +369,7 @@ static void hibmc_pci_remove(struct pci_dev *pdev)
drm_dev_put(dev);
 }
 
-static struct pci_device_id hibmc_pci_table[] = {
+static const struct pci_device_id hibmc_pci_table[] = {
{ PCI_VDEVICE(HUAWEI, 0x1711) },
{0,}
 };
-- 
2.7.4



Re: [PATCH] pipe: fix potential inode leak in create_pipe_files()

2020-10-29 Thread Al Viro
On Wed, Oct 28, 2020 at 11:03:52AM +0800, Zhiqiang Liu wrote:
> 
> In create_pipe_files(), if alloc_file_clone() fails, we will call
> put_pipe_info to release pipe, and call fput() to release f.
> However, we donot call iput() to free inode.

Huh?  Have you actually tried to trigger that failure exit?

> Signed-off-by: Zhiqiang Liu 
> Signed-off-by: Feilong Lin 
> ---
>  fs/pipe.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/fs/pipe.c b/fs/pipe.c
> index 0ac197658a2d..8856607fde65 100644
> --- a/fs/pipe.c
> +++ b/fs/pipe.c
> @@ -924,6 +924,7 @@ int create_pipe_files(struct file **res, int flags)
>   if (IS_ERR(res[0])) {
>   put_pipe_info(inode, inode->i_pipe);
>   fput(f);
> + iput(inode);
>   return PTR_ERR(res[0]);

No.  That inode is created with refcount 1.  If alloc_file_pseudo()
succeeds, the reference we'd been holding has been transferred into
dentry allocated by alloc_file_pseudo() (and attached to f).
>From that point on we do *NOT* own a reference to inode and no
subsequent failure exits have any business releasing it.

In particular, alloc_file_clone() DOES NOT create extra references
to inode, whether it succeeds or fails.  Dropping the reference
to f will take care of everything.

If you tried to trigger that failure exit with your patch applied,
you would've seen double iput(), as soon as you return from sys_pipe()
to userland and task_work is processed (which is where the real
destructor of struct file will happen).

NAK.


[PATCH v5 3/6] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC

2020-10-29 Thread Ramuthevar,Vadivel MuruganX
From: Ramuthevar Vadivel Murugan 

Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
 drivers/spi/spi-cadence-quadspi.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/spi/spi-cadence-quadspi.c 
b/drivers/spi/spi-cadence-quadspi.c
index 6d6f7c440ece..c4440797db43 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -38,6 +38,7 @@
 
 /* Capabilities */
 #define CQSPI_SUPPORTS_OCTAL   BIT(0)
+#define CQSPI_SUPPORTS_MULTI_CHIPSELECT BIT(1)
 
 struct cqspi_st;
 
@@ -75,6 +76,7 @@ struct cqspi_st {
boolis_decoded_cs;
u32 fifo_depth;
u32 fifo_width;
+   u32 num_chipselect;
boolrclk_en;
u32 trigger_address;
u32 wr_delay;
@@ -1049,6 +1051,7 @@ static int cqspi_of_get_flash_pdata(struct 
platform_device *pdev,
 
 static int cqspi_of_get_pdata(struct cqspi_st *cqspi)
 {
+   const struct cqspi_driver_platdata *ddata;
struct device *dev = &cqspi->pdev->dev;
struct device_node *np = dev->of_node;
 
@@ -1070,6 +1073,15 @@ static int cqspi_of_get_pdata(struct cqspi_st *cqspi)
return -ENXIO;
}
 
+   ddata  = of_device_get_match_data(dev);
+   if (ddata->hwcaps_mask & CQSPI_SUPPORTS_MULTI_CHIPSELECT) {
+   if (of_property_read_u32(np, "num-chipselect",
+&cqspi->num_chipselect)) {
+   dev_err(dev, "couldn't determine number of cs\n");
+   return -ENXIO;
+   }
+   }
+
cqspi->rclk_en = of_property_read_bool(np, "cdns,rclk-en");
 
return 0;
@@ -1307,6 +1319,9 @@ static int cqspi_probe(struct platform_device *pdev)
cqspi->current_cs = -1;
cqspi->sclk = 0;
 
+   if (ddata->hwcaps_mask & CQSPI_SUPPORTS_MULTI_CHIPSELECT)
+   master->num_chipselect = cqspi->num_chipselect;
+
ret = cqspi_setup_flash(cqspi);
if (ret) {
dev_err(dev, "failed to setup flash parameters %d\n", ret);
@@ -1396,6 +1411,7 @@ static const struct cqspi_driver_platdata am654_ospi = {
 };
 
 static const struct cqspi_driver_platdata intel_lgm_qspi = {
+   .hwcaps_mask = CQSPI_SUPPORTS_MULTI_CHIPSELECT,
.quirks = CQSPI_DISABLE_DAC_MODE,
 };
 
-- 
2.11.0



[PATCH v12 03/10] usb: typec: tcpm: Refactor logic for new-source-frs-typec-current

2020-10-29 Thread Badhri Jagan Sridharan
New source's current capability is now defined as string based
device tree property through new-source-frs-typec-current.
Refactor tcpm code to parse new-source-frs-typec-current and
infer local port's new source current capability during frs.

Signed-off-by: Badhri Jagan Sridharan 
---
v9 is the first version of this patch in this series to rebase
TCPM code to read new source frs current from
new-source-frs-typec-current.

Changes since v10:
- Moving back to u32 for new-source-frs-typec-current.

Changes since v11:
- None
---
 drivers/usb/typec/tcpm/tcpm.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c
index 55535c4f66bf..561480b67bce 100644
--- a/drivers/usb/typec/tcpm/tcpm.c
+++ b/drivers/usb/typec/tcpm/tcpm.c
@@ -363,8 +363,8 @@ struct tcpm_port {
/* port belongs to a self powered device */
bool self_powered;
 
-   /* FRS */
-   enum frs_typec_current frs_current;
+   /* Sink FRS */
+   enum frs_typec_current new_source_frs_current;
 
/* Sink caps have been queried */
bool sink_cap_done;
@@ -1713,7 +1713,7 @@ static void tcpm_pd_data_request(struct tcpm_port *port,
unsigned int cnt = pd_header_cnt_le(msg->header);
unsigned int rev = pd_header_rev_le(msg->header);
unsigned int i;
-   enum frs_typec_current frs_current;
+   enum frs_typec_current partner_frs_current;
bool frs_enable;
int ret;
 
@@ -1786,12 +1786,13 @@ static void tcpm_pd_data_request(struct tcpm_port *port,
for (i = 0; i < cnt; i++)
port->sink_caps[i] = le32_to_cpu(msg->payload[i]);
 
-   frs_current = (port->sink_caps[0] & PDO_FIXED_FRS_CURR_MASK) >>
+   partner_frs_current = (port->sink_caps[0] & 
PDO_FIXED_FRS_CURR_MASK) >>
PDO_FIXED_FRS_CURR_SHIFT;
-   frs_enable = frs_current && (frs_current <= port->frs_current);
+   frs_enable = partner_frs_current && (partner_frs_current <=
+
port->new_source_frs_current);
tcpm_log(port,
 "Port partner FRS capable partner_frs_current:%u 
port_frs_current:%u enable:%c",
-frs_current, port->frs_current, frs_enable ? 'y' : 
'n');
+partner_frs_current, port->new_source_frs_current, 
frs_enable ? 'y' : 'n');
if (frs_enable) {
ret  = port->tcpc->enable_frs(port->tcpc, true);
tcpm_log(port, "Enable FRS %s, ret:%d\n", ret ? "fail" 
: "success", ret);
@@ -4808,9 +4809,10 @@ static int tcpm_fw_get_caps(struct tcpm_port *port,
 
/* FRS can only be supported byb DRP ports */
if (port->port_type == TYPEC_PORT_DRP) {
-   ret = fwnode_property_read_u32(fwnode, "frs-typec-current", 
&frs_current);
+   ret = fwnode_property_read_u32(fwnode, 
"new-source-frs-typec-current",
+  &frs_current);
if (ret >= 0 && frs_current <= FRS_5V_3A)
-   port->frs_current = frs_current;
+   port->new_source_frs_current = frs_current;
}
 
return 0;
-- 
2.29.1.341.ge80a0c044ae-goog



[PATCH] ARM: dts: aspeed-g6: Fix HVI3C function-group in pinctrl dtsi

2020-10-29 Thread Dylan Hung
The HVI3C shall be a group of I3C function, not an independent function.
Correct the function name from "HVI3C" to "I3C".

Signed-off-by: Dylan Hung 
---
 arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi 
b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
index 7028e21bdd98..910eacc8ad3b 100644
--- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
@@ -208,12 +208,12 @@
};
 
pinctrl_hvi3c3_default: hvi3c3_default {
-   function = "HVI3C3";
+   function = "I3C3";
groups = "HVI3C3";
};
 
pinctrl_hvi3c4_default: hvi3c4_default {
-   function = "HVI3C4";
+   function = "I3C4";
groups = "HVI3C4";
};
 
-- 
2.17.1



Re: [f2fs-dev] [PATCH v5 1/2] f2fs: add F2FS_IOC_GET_COMPRESS_OPTION ioctl

2020-10-29 Thread Chao Yu

On 2020/10/29 12:15, Daeho Jeong wrote:

From: Daeho Jeong 

Added a new F2FS_IOC_GET_COMPRESS_OPTION ioctl to get file compression
option of a file.

struct f2fs_comp_option {
 u8 algorithm; => compression algorithm
   => 0:lzo, 1:lz4, 2:zstd, 3:lzorle
 u8 log_cluster_size;  => log scale cluster size
   => 2 ~ 8
};

struct f2fs_comp_option option;

ioctl(fd, F2FS_IOC_GET_COMPRESS_OPTION, &option);

Signed-off-by: Daeho Jeong 
---

v4: changed commit message.
v3: changed the error number more specific.
v2: added ioctl description.
---
  fs/f2fs/f2fs.h |  7 +++
  fs/f2fs/file.c | 30 ++
  2 files changed, 37 insertions(+)

diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 53fe2853579c..a33c90cf979b 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -433,6 +433,8 @@ static inline bool __has_cursum_space(struct f2fs_journal 
*journal,
_IOR(F2FS_IOCTL_MAGIC, 19, __u64)
  #define F2FS_IOC_SEC_TRIM_FILE_IOW(F2FS_IOCTL_MAGIC, 20,  
\
struct f2fs_sectrim_range)
+#define F2FS_IOC_GET_COMPRESS_OPTION   _IOR(F2FS_IOCTL_MAGIC, 21,  \
+   struct f2fs_comp_option)
  
  /*

   * should be same as XFS_IOC_GOINGDOWN.
@@ -481,6 +483,11 @@ struct f2fs_sectrim_range {
u64 flags;
  };
  
+struct f2fs_comp_option {

+   u8 algorithm;
+   u8 log_cluster_size;
+};
+
  /* for inline stuff */
  #define DEF_INLINE_RESERVED_SIZE  1
  static inline int get_extra_isize(struct inode *inode);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index ef5a844de53f..8922ab191a9d 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3936,6 +3936,33 @@ static int f2fs_sec_trim_file(struct file *filp, 
unsigned long arg)
return ret;
  }
  
+static int f2fs_ioc_get_compress_option(struct file *filp, unsigned long arg)

+{
+   struct inode *inode = file_inode(filp);
+   struct f2fs_comp_option option;
+
+   if (!f2fs_sb_has_compression(F2FS_I_SB(inode)))
+   return -EOPNOTSUPP;
+
+   inode_lock(inode);


It's minor,

inode_lock_shared()?


+
+   if (!f2fs_compressed_file(inode)) {
+   inode_unlock(inode);


inode_unlock_shared()?


+   return -ENODATA;
+   }
+
+   option.algorithm = F2FS_I(inode)->i_compress_algorithm;
+   option.log_cluster_size = F2FS_I(inode)->i_log_cluster_size;
+
+   inode_unlock(inode);


ditto.


+
+   if (copy_to_user((struct f2fs_comp_option __user *)arg, &option,
+   sizeof(option)))
+   return -EFAULT;
+
+   return 0;
+}
+
  long f2fs_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  {
if (unlikely(f2fs_cp_error(F2FS_I_SB(file_inode(filp)
@@ -4024,6 +4051,8 @@ long f2fs_ioctl(struct file *filp, unsigned int cmd, 
unsigned long arg)
return f2fs_reserve_compress_blocks(filp, arg);
case F2FS_IOC_SEC_TRIM_FILE:
return f2fs_sec_trim_file(filp, arg);
+   case F2FS_IOC_GET_COMPRESS_OPTION:
+   return f2fs_ioc_get_compress_option(filp, arg);
default:
return -ENOTTY;
}
@@ -4194,6 +4223,7 @@ long f2fs_compat_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
case F2FS_IOC_RELEASE_COMPRESS_BLOCKS:
case F2FS_IOC_RESERVE_COMPRESS_BLOCKS:
case F2FS_IOC_SEC_TRIM_FILE:
+   case F2FS_IOC_GET_COMPRESS_OPTION:
break;
default:
return -ENOIOCTLCMD;



Re: net/can/isotp.c:1240:13: sparse: sparse: incorrect type in initializer (different address spaces)

2020-10-29 Thread Marc Kleine-Budde
Hello,

looks like sh is missing the some __user annotations so that sparse spwes these
warnings. Adding sh maintainers to Cc.

regards,
Marc

On 10/29/20 12:01 AM, kernel test robot wrote:
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
> master
> head:   23859ae44402f4d935b9ee548135dd1e65e2cbf4
> commit: e057dd3fc20ffb3d7f150af46542a51b59b90127 can: add ISO 15765-2:2016 
> transport protocol
> date:   3 weeks ago
> config: sh-randconfig-s031-20201028 (attached as .config)
> compiler: sh4-linux-gcc (GCC) 9.3.0
> reproduce:
> wget 
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # apt-get install sparse
> # sparse version: v0.6.3-56-gc09e8239-dirty
> # 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e057dd3fc20ffb3d7f150af46542a51b59b90127
> git remote add linus 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> git fetch --no-tags linus master
> git checkout e057dd3fc20ffb3d7f150af46542a51b59b90127
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
> CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=sh 
> 
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 
> 
> 
> "sparse warnings: (new ones prefixed by >>)"
>>> net/can/isotp.c:1240:13: sparse: sparse: incorrect type in initializer 
>>> (different address spaces) @@ expected int const *__gu_addr @@ got 
>>> int [noderef] __user *optlen @@
>>> net/can/isotp.c:1240:13: sparse: expected int const *__gu_addr
>>> net/can/isotp.c:1240:13: sparse: got int [noderef] __user *optlen
>>> net/can/isotp.c:1240:13: sparse: sparse: incorrect type in argument 1 
>>> (different address spaces) @@ expected void const volatile [noderef] 
>>> __user *ptr @@ got int const *__gu_addr @@
>>> net/can/isotp.c:1240:13: sparse: expected void const volatile [noderef] 
>>> __user *ptr
>>> net/can/isotp.c:1240:13: sparse: got int const *__gu_addr
> 
> vim +1240 net/can/isotp.c
> 
>   1229
>   1230static int isotp_getsockopt(struct socket *sock, int level, int 
> optname,
>   1231char __user *optval, int __user 
> *optlen)
>   1232{
>   1233struct sock *sk = sock->sk;
>   1234struct isotp_sock *so = isotp_sk(sk);
>   1235int len;
>   1236void *val;
>   1237
>   1238if (level != SOL_CAN_ISOTP)
>   1239return -EINVAL;
>> 1240 if (get_user(len, optlen))
>   1241return -EFAULT;
>   1242if (len < 0)
>   1243return -EINVAL;
>   1244
>   1245switch (optname) {
>   1246case CAN_ISOTP_OPTS:
>   1247len = min_t(int, len, sizeof(struct 
> can_isotp_options));
>   1248val = &so->opt;
>   1249break;
>   1250
>   1251case CAN_ISOTP_RECV_FC:
>   1252len = min_t(int, len, sizeof(struct 
> can_isotp_fc_options));
>   1253val = &so->rxfc;
>   1254break;
>   1255
>   1256case CAN_ISOTP_TX_STMIN:
>   1257len = min_t(int, len, sizeof(u32));
>   1258val = &so->force_tx_stmin;
>   1259break;
>   1260
>   1261case CAN_ISOTP_RX_STMIN:
>   1262len = min_t(int, len, sizeof(u32));
>   1263val = &so->force_rx_stmin;
>   1264break;
>   1265
>   1266case CAN_ISOTP_LL_OPTS:
>   1267len = min_t(int, len, sizeof(struct 
> can_isotp_ll_options));
>   1268val = &so->ll;
>   1269break;
>   1270
>   1271default:
>   1272return -ENOPROTOOPT;
>   1273}
>   1274
>   1275if (put_user(len, optlen))
>   1276return -EFAULT;
>   1277if (copy_to_user(optval, val, len))
>   1278return -EFAULT;
>   1279return 0;
>   1280}
>   1281
> 
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
> 


-- 
Pengutronix e.K. | Marc Kleine-Budde   |
Embedded Linux   | https://www.pengutronix.de  |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917- |



signature.asc
Description: 

[PATCH v5 2/6] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC

2020-10-29 Thread Ramuthevar,Vadivel MuruganX
From: Ramuthevar Vadivel Murugan 

On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).

This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfer.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
 drivers/spi/spi-cadence-quadspi.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/spi/spi-cadence-quadspi.c 
b/drivers/spi/spi-cadence-quadspi.c
index d7b10c46fa70..6d6f7c440ece 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1107,6 +1107,13 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
 
cqspi_controller_enable(cqspi, 1);
+
+   /* Disable direct access controller */
+   if (!cqspi->use_direct_mode) {
+   reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
+   reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
+   writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
+   }
 }
 
 static int cqspi_request_mmap_dma(struct cqspi_st *cqspi)
@@ -1388,6 +1395,10 @@ static const struct cqspi_driver_platdata am654_ospi = {
.quirks = CQSPI_NEEDS_WR_DELAY,
 };
 
+static const struct cqspi_driver_platdata intel_lgm_qspi = {
+   .quirks = CQSPI_DISABLE_DAC_MODE,
+};
+
 static const struct of_device_id cqspi_dt_ids[] = {
{
.compatible = "cdns,qspi-nor",
@@ -1403,6 +1414,7 @@ static const struct of_device_id cqspi_dt_ids[] = {
},
{
.compatible = "intel,lgm-qspi",
+   .data = &intel_lgm_qspi,
},
{ /* end of table */ }
 };
-- 
2.11.0



[PATCH v5 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC

2020-10-29 Thread Ramuthevar,Vadivel MuruganX
From: Ramuthevar Vadivel Murugan 

Add compatible for Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml 
b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
index daf891ade577..637d82cd1cef 100644
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -21,6 +21,7 @@ properties:
  - const: ti,am654-ospi
  - const: ti,k2g-qspi
  - const: ti,am654-ospi
+ - const: intel,lgm-qspi
 
   reg:
 items:
-- 
2.11.0



Re: [PATCH v6 2/4] net: phy: Add 5GBASER interface mode

2020-10-29 Thread Marek Behun
On Thu, 29 Oct 2020 15:42:00 +1000
Pavana Sharma  wrote:

> Add new mode supported by MV88E6393 family.
> 

This commit message isn't ideal. It infers that the Amethyst is first
such device to implement this mode, which is not true. The 5gbase-r mode
is supported by various other hardware, for example Marvell's 88X3310
PHY. Just say:
  Add 5gbase-r PHY interface mode.

>   PHY_INTERFACE_MODE_2500BASEX,
>   PHY_INTERFACE_MODE_RXAUI,
>   PHY_INTERFACE_MODE_XAUI,
> + PHY_INTERFACE_MODE_5GBASER,
>   /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
>   PHY_INTERFACE_MODE_10GBASER,
>   PHY_INTERFACE_MODE_USXGMII,

The position is IMO out of order. RXAUI and XAUI are both 10G modes, so
5gbase-r should be between 2500base-x and rxaui.

> @@ -187,6 +188,8 @@ static inline const char *phy_modes(phy_interface_t 
> interface)
>   return "rxaui";
>   case PHY_INTERFACE_MODE_XAUI:
>   return "xaui";
> + case PHY_INTERFACE_MODE_5GBASER:
> + return "5gbase-r";
>   case PHY_INTERFACE_MODE_10GBASER:
>   return "10gbase-r";
>   case PHY_INTERFACE_MODE_USXGMII:

Here as well.


[PATCH v5 00/21] perf arm-spe: Refactor decoding & dumping flow

2020-10-29 Thread Leo Yan
This is patch set v5 for refactoring Arm SPE trace decoding and dumping.
It follows Dave's suggestions to implement a cumulative error for
function arm_spe_pkt_snprintf(); and fixed the patch 10 "perf arm_spe:
Fixup top byte for data virtual address" for detecting kernel address
with bits [55:52].

This patch set is cleanly applied on the top of perf/core branch
with commit 7cf726a59435 ("Merge tag 'linux-kselftest-kunit-5.10-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest"),
And I retested this patch set on Hisilicon D06 platform with commands
"perf script" and "perf script -D".

Changes from v4:
- Implemented a cumulative error for arm_spe_pkt_snprintf() and changed
  to condense code for printing strings (Dave);
- Changed to check payload bits [55:52] for parse kernel address
  (Andre).

Changes from v3:
- Refined arm_spe_payload_len() and removed macro SPE_HEADER_SZ()
  (Andre);
- Refined packet header index macros (Andre);
- Added patch "perf arm_spe: Fixup top byte for data virtual address" to
  fixup the data virtual address for 64KB pages and refined comments for
  the fixup (Andre);
- Added Andre's review tag (using "b4 am" command);
- Changed the macros to SPE_PKT_IS_XXX() format to check operation types
  (Andre);

Changes from v2:
- Tried best to address Andre's comments and refined patches;
- Added new patches 08, 11, 13, 16 for introducing new functions for
  packets parsing (Andre);
- Removed size condition checking for event packet (Andre);
- Used PKT_XXX_GET() form to replace PKT_XXX_MASK()/PKT_XXX_SHIFT()
  (Andre).

Changes from v1:
- Heavily rewrote the patch 05 for refactoring printing strings; this
  is fundamental change, so adjusted the sequence for patches and moved
  the printing string patch ahead from patch 10 (v1) to patch 05;
- Changed to use GENMASK_ULL() for bits mask;
- Added Andre's patch 13 for dumping memory tagging;
- Refined patch 12 for adding sub classes for Operation packet, merged
  some commit log from Andre's patch, which allows commit log and code
  to be more clear; Added "Co-developed-by: Andre Przywara" tag to
  reflect this.


Andre Przywara (1):
  perf arm_spe: Decode memory tagging properties

Leo Yan (19):
  perf arm-spe: Include bitops.h for BIT() macro
  perf arm-spe: Fix a typo in comment
  perf arm-spe: Refactor payload size calculation
  perf arm-spe: Refactor arm_spe_get_events()
  perf arm-spe: Fix packet length handling
  perf arm-spe: Refactor printing string to buffer
  perf arm-spe: Refactor packet header parsing
  perf arm-spe: Add new function arm_spe_pkt_desc_addr()
  perf arm-spe: Refactor address packet handling
  perf arm_spe: Fixup top byte for data virtual address
  perf arm-spe: Refactor context packet handling
  perf arm-spe: Add new function arm_spe_pkt_desc_counter()
  perf arm-spe: Refactor counter packet handling
  perf arm-spe: Add new function arm_spe_pkt_desc_event()
  perf arm-spe: Refactor event type handling
  perf arm-spe: Remove size condition checking for events
  perf arm-spe: Add new function arm_spe_pkt_desc_op_type()
  perf arm-spe: Refactor operation packet handling
  perf arm-spe: Add more sub classes for operation packet

Wei Li (1):
  perf arm-spe: Add support for ARMv8.3-SPE

 .../util/arm-spe-decoder/arm-spe-decoder.c|  59 +-
 .../util/arm-spe-decoder/arm-spe-decoder.h|  17 -
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 564 ++
 .../arm-spe-decoder/arm-spe-pkt-decoder.h | 122 +++-
 4 files changed, 441 insertions(+), 321 deletions(-)

-- 
2.17.1



Re: [PATCH] cpufreq: schedutil: set sg_policy->next_freq to the final cpufreq

2020-10-29 Thread Viresh Kumar
Your mail client is screwing the "In-reply-to" field of the message
and that prevents it to appear properly in the thread in mailboxes of
other people, please fix that.

On 29-10-20, 09:43, zhuguangqing83 wrote:
> > diff --git a/kernel/sched/cpufreq_schedutil.c 
> > b/kernel/sched/cpufreq_schedutil.c
> > index 0c5c61a095f6..bf7800e853d3 100644
> > --- a/kernel/sched/cpufreq_schedutil.c
> > +++ b/kernel/sched/cpufreq_schedutil.c
> > @@ -105,7 +105,6 @@ static bool sugov_update_next_freq(struct sugov_policy 
> > *sg_policy, u64 time,
> > if (sg_policy->next_freq == next_freq)
> > return false;
> > 
> > -   sg_policy->next_freq = next_freq;
> > sg_policy->last_freq_update_time = time;
> > 
> > return true;
> 
> It's a little strange that sg_policy->next_freq and 
> sg_policy->last_freq_update_time are not updated at the same time.
> 
> > @@ -115,7 +114,7 @@ static void sugov_fast_switch(struct sugov_policy 
> > *sg_policy, u64 time,
> >   unsigned int next_freq)
> >  {
> > if (sugov_update_next_freq(sg_policy, time, next_freq))
> > -   cpufreq_driver_fast_switch(sg_policy->policy, next_freq);
> > +   sg_policy->next_freq = 
> > cpufreq_driver_fast_switch(sg_policy->policy, next_freq);
> >  }
> > 
> 
> Great, it also takes into account the issue that 0 is returned by the
> driver's ->fast_switch() callback to indicate an error condition.

Yes but even my change wasn't good enough, more on it later.

> For policy->min/max may be not the real CPU frequency in OPPs, so

No, that can't happen. If userspace tries to set a value too large or
too small, we clamp that too to policy->max/min and so the below
problem shall never occur.

> next_freq got from get_next_freq() which is after clamping between
> policy->min and policy->max may be not the real CPU frequency in OPPs.
> In that case, if we use a real CPU frequency in OPPs returned from
> cpufreq_driver_fast_switch() to compare with next_freq,
> "if (sg_policy->next_freq == next_freq)" will never be satisfied, so we
> change the CPU frequency every time schedutil callback gets called from
> the scheduler. I see the current code in get_next_freq() as following,
> the issue mentioned above should not happen. Maybe it's just one of my
> unnecessary worries.

Coming back to my patch (and yours too), it only fixes the fast-switch
case and not the slow path which can also end up clamping the
frequency. And to be honest, even the drivers can have their own
clamping code in place, no one is stopping them too.

And we also need to do something about the cached_raw_freq as well, as
it will not be in sync with next_freq anymore.

Here is another attempt from me tackling this problem. The idea is to
check if the previous freq update went as expected or not. And if not,
we can't rely on next_freq or cached_raw_freq anymore. For this to
work properly, we need to make sure policy->cur isn't getting updated
at the same time when get_next_freq() is running. For that I have
given a different meaning to work_in_progress flag, which now creates
a lockless (kind of) critical section where we won't play with
next_freq while the cpufreq core is updating the frequency.

diff --git a/kernel/sched/cpufreq_schedutil.c b/kernel/sched/cpufreq_schedutil.c
index 0c5c61a095f6..8991cc31b011 100644
--- a/kernel/sched/cpufreq_schedutil.c
+++ b/kernel/sched/cpufreq_schedutil.c
@@ -121,13 +121,8 @@ static void sugov_fast_switch(struct sugov_policy 
*sg_policy, u64 time,
 static void sugov_deferred_update(struct sugov_policy *sg_policy, u64 time,
  unsigned int next_freq)
 {
-   if (!sugov_update_next_freq(sg_policy, time, next_freq))
-   return;
-
-   if (!sg_policy->work_in_progress) {
-   sg_policy->work_in_progress = true;
+   if (sugov_update_next_freq(sg_policy, time, next_freq))
irq_work_queue(&sg_policy->irq_work);
-   }
 }
 
 /**
@@ -159,6 +154,15 @@ static unsigned int get_next_freq(struct sugov_policy 
*sg_policy,
unsigned int freq = arch_scale_freq_invariant() ?
policy->cpuinfo.max_freq : policy->cur;
 
+   /*
+* The previous frequency update didn't go as we expected it to be. Lets
+* start again to make sure we don't miss any updates.
+*/
+   if (unlikely(policy->cur != sg_policy->next_freq)) {
+   sg_policy->next_freq = 0;
+   sg_policy->cached_raw_freq = 0;
+   }
+
freq = map_util_freq(util, freq, max);
 
if (freq == sg_policy->cached_raw_freq && !sg_policy->need_freq_update)
@@ -337,8 +341,14 @@ static void sugov_update_single(struct update_util_data 
*hook, u64 time,
 
ignore_dl_rate_limit(sg_cpu, sg_policy);
 
+   if (!sg_policy->policy->fast_switch_enabled) {
+   raw_spin_lock(&sg_policy->update_lock);
+   if (sg_policy->work_in_progress)
+

Re: [PATCH v2 0/5] Fix the gate2 and make it more flexible

2020-10-29 Thread Sascha Hauer
On Wed, Oct 28, 2020 at 02:58:57PM +0200, Abel Vesa wrote:
> First version here: https://lkml.org/lkml/2020/10/26/988
> 
> Changes since v1:
>  * split the work in multiple iterative patches
> 
> Abel Vesa (5):
>   clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case
>   clk: imx: gate2: Keep the register writing in on place
>   clk: imx: gate2: Check if clock is enabled against cgr_val
>   clk: imx: gate2: Add cgr_mask for more flexible number of control bits
>   clk: imx: gate2: Add locking in is_enabled op

For the series:

Reviewed-by: Sascha Hauer 

Sascha

-- 
Pengutronix e.K.   | |
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Re: [PATCH] powerpc/eeh_cache: Fix a possible debugfs deadlock

2020-10-29 Thread Oliver O'Halloran
On Thu, Oct 29, 2020 at 2:27 AM Qian Cai  wrote:
>
> Lockdep complains that a possible deadlock below in
> eeh_addr_cache_show() because it is acquiring a lock with IRQ enabled,
> but eeh_addr_cache_insert_dev() needs to acquire the same lock with IRQ
> disabled. Let's just make eeh_addr_cache_show() acquire the lock with
> IRQ disabled as well.
>
> CPU0CPU1
> 
>lock(&pci_io_addr_cache_root.piar_lock);
> local_irq_disable();
> lock(&tp->lock);
> lock(&pci_io_addr_cache_root.piar_lock);
>
>  lock(&tp->lock);
>
>   *** DEADLOCK ***
>
>   lock_acquire+0x140/0x5f0
>   _raw_spin_lock_irqsave+0x64/0xb0
>   eeh_addr_cache_insert_dev+0x48/0x390
>   eeh_probe_device+0xb8/0x1a0
>   pnv_pcibios_bus_add_device+0x3c/0x80
>   pcibios_bus_add_device+0x118/0x290
>   pci_bus_add_device+0x28/0xe0
>   pci_bus_add_devices+0x54/0xb0
>   pcibios_init+0xc4/0x124
>   do_one_initcall+0xac/0x528
>   kernel_init_freeable+0x35c/0x3fc
>   kernel_init+0x24/0x148
>   ret_from_kernel_thread+0x5c/0x80
>
>   lock_acquire+0x140/0x5f0
>   _raw_spin_lock+0x4c/0x70
>   eeh_addr_cache_show+0x38/0x110
>   seq_read+0x1a0/0x660
>   vfs_read+0xc8/0x1f0
>   ksys_read+0x74/0x130
>   system_call_exception+0xf8/0x1d0
>   system_call_common+0xe8/0x218
>
> Fixes: 5ca85ae6318d ("powerpc/eeh_cache: Add a way to dump the EEH address 
> cache")
> Signed-off-by: Qian Cai 

Good catch,

Reviewed-by: Oliver O'Halloran 


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Re: [PATCH v2 net] net: sch_generic: aviod concurrent reset and enqueue op for lockless qdisc

2020-10-29 Thread Vishwanath Pai

On 10/28/20 10:37 PM, Yunsheng Lin wrote:
> On 2020/10/29 4:04, Vishwanath Pai wrote:
>> On 10/28/20 1:47 PM, Cong Wang wrote:
>>> On Wed, Oct 28, 2020 at 8:37 AM Pai, Vishwanath  
wrote:

 Hi,

 We noticed some problems when testing the latest 5.4 LTS kernel 
and traced it
 back to this commit using git bisect. When running our tests the 
machine stops
 responding to all traffic and the only way to recover is a reboot. 
I do not see

 a stack trace on the console.
>>>
>>> Do you mean the machine is still running fine just the network is down?
>>>
>>> If so, can you dump your tc config with stats when the problem is 
happening?

>>> (You can use `tc -s -d qd show ...`.)
>>>

 This can be reproduced using the packetdrill test below, it should 
be run a
 few times or in a loop. You should hit this issue within a few 
tries but

 sometimes might take up to 15-20 tries.
>>> ...
 I can reproduce the issue easily on v5.4.68, and after reverting 
this commit it

 does not happen anymore.
>>>
>>> This is odd. The patch in this thread touches netdev reset path, if 
packetdrill
>>> is the only thing you use to trigger the bug (that is netdev is 
always active),

>>> I can not connect them.
>>>
>>> Thanks.
>>
>> Hi Cong,
>>
>>> Do you mean the machine is still running fine just the network is down?
>>
>> I was able to access the machine via serial console, it looks like it is
>> up and running, just that networking is down.
>>
>>> If so, can you dump your tc config with stats when the problem is 
happening?

>>> (You can use `tc -s -d qd show ...`.)
>>
>> If I try running tc when the machine is in this state the command never
>> returns. It doesn't print anything but doesn't exit either.
>>
>>> This is odd. The patch in this thread touches netdev reset path, if 
packetdrill
>>> is the only thing you use to trigger the bug (that is netdev is 
always active),

>>> I can not connect them.
>>
>> I think packetdrill creates a tun0 interface when it starts the
>> test and tears it down at the end, so it might be hitting this code path
>> during teardown.
>
> Hi, Is there any preparation setup before running the above 
packetdrill test
> case, I run the above test case in 5.9-rc4 with this patch applied 
without any

> preparation setup, did not reproduce it.
>
> By the way, I am newbie to packetdrill:), it would be good to provide the
> detail setup to reproduce it,thanks.
>
>>
>> P.S: My mail server is having connectivity issues with vger.kernel.org
>> so messages aren't getting delivered to netdev. It'll hopefully get
>> resolved soon.
>>
>> Thanks,
>> Vishwanath
>>
>>
>> .
>>

I can't reproduce it on v5.9-rc4 either, it is probably an issue only on
5.4 then (and maybe older LTS versions). Can you give it a try on
5.4.68?

For running packetdrill, download the latest version from their github
repo, then run it in a loop without any special arguments. This is what
I do to reproduce it:

while true; do ./packetdrill ; done

I don't think any other setup is necessary.

-Vishwanath



[PATCH v12 02/10] usb: typec: tcpci_maxim: Fix the compatible string

2020-10-29 Thread Badhri Jagan Sridharan
Changing compatible string to include the part number.

Signed-off-by: Badhri Jagan Sridharan 
---
V11 is the first version of the patch.
Introduced to add chip number to the compatible property to address
Rob Herring's comment on dt-binding patch.

Change since v11:
Changed compatible property from maxim,33359 to maxim,max33359
to address Rob Herring's comment
---
 drivers/usb/typec/tcpm/tcpci_maxim.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/typec/tcpm/tcpci_maxim.c 
b/drivers/usb/typec/tcpm/tcpci_maxim.c
index 723d7dd38f75..a5014c3b51d5 100644
--- a/drivers/usb/typec/tcpm/tcpci_maxim.c
+++ b/drivers/usb/typec/tcpm/tcpci_maxim.c
@@ -481,7 +481,7 @@ MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
 
 #ifdef CONFIG_OF
 static const struct of_device_id max_tcpci_of_match[] = {
-   { .compatible = "maxim,tcpc", },
+   { .compatible = "maxim,max33359", },
{},
 };
 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
-- 
2.29.1.341.ge80a0c044ae-goog



mips-linux-ld: arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0xdc): undefined reference to `ftrace_likely_update'

2020-10-29 Thread kernel test robot
tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   23859ae44402f4d935b9ee548135dd1e65e2cbf4
commit: ff487d41036035376e47972c7c522490b839ab37 MIPS: Truncate link address 
into 32bit for 32bit kernel
date:   6 months ago
config: mips-randconfig-c004-20201029 (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ff487d41036035376e47972c7c522490b839ab37
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout ff487d41036035376e47972c7c522490b839ab37
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   mips-linux-ld: arch/mips/boot/compressed/decompress.o: in function 
`LZ4_decompress_safe_withSmallPrefix':
   
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0x70):
 undefined reference to `ftrace_likely_update'
>> mips-linux-ld: 
>> arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0xdc):
>>  undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0x150):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0x204):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0x23c):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.o:arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_withSmallPrefix+0x260):
 more undefined references to `ftrace_likely_update' follow
   mips-linux-ld: arch/mips/boot/compressed/decompress.o: in function 
`LZ4_decompress_fast_extDict':
   
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_fast_extDict+0x2f4):
 undefined reference to `memmove'
>> mips-linux-ld: 
>> arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_fast_extDict+0x384):
>>  undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_fast_extDict+0x40c):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: arch/mips/boot/compressed/decompress.o: in function 
`LZ4_decompress_safe':
   arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe+0x64): 
undefined reference to `ftrace_likely_update'
>> mips-linux-ld: 
>> arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe+0xd0): 
>> undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe+0x144): 
undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.o:arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe+0x200):
 more undefined references to `ftrace_likely_update' follow
   mips-linux-ld: arch/mips/boot/compressed/decompress.o: in function 
`LZ4_decompress_safe_forceExtDict':
   
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x2f4):
 undefined reference to `memmove'
>> mips-linux-ld: 
>> arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x320):
>>  undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x3c0):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x440):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x574):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x5a8):
 undefined reference to `ftrace_likely_update'
   mips-linux-ld: 
arch/mips/boot/compressed/decompress.o:arch/mips/boot/compressed/decompress.c:(.text.LZ4_decompress_safe_forceExtDict+0x5e4):
 more undefined references to `ftrace_likely_update' follow
   mips-linux-ld: arch/mips/boot/compressed/decompress.o: in function 
`LZ4_decompress_safe_continue':
   
arch/mips/boot/compressed/decomp

Re: [PATCH v2 3/4] dm: add support for passing through inline crypto support

2020-10-29 Thread Satya Tangirala
On Tue, Oct 27, 2020 at 05:17:31PM -0700, Eric Biggers wrote:
> On Tue, Oct 27, 2020 at 11:58:47PM +, Satya Tangirala wrote:
> > > > +/**
> > > > + * blk_ksm_update_capabilities() - Update the restrictions of a KSM to 
> > > > those of
> > > > + *another KSM
> > > > + * @target_ksm: The KSM whose restrictions to update.
> > > > + * @reference_ksm: The KSM to whose restrictions this function will 
> > > > update
> > > > + *@target_ksm's restrictions to,
> > > > + */
> > > > +void blk_ksm_update_capabilities(struct blk_keyslot_manager 
> > > > *target_ksm,
> > > > +struct blk_keyslot_manager 
> > > > *reference_ksm)
> > > > +{
> > > > +   memcpy(target_ksm->crypto_modes_supported,
> > > > +  reference_ksm->crypto_modes_supported,
> > > > +  sizeof(target_ksm->crypto_modes_supported));
> > > > +
> > > > +   target_ksm->max_dun_bytes_supported =
> > > > +   reference_ksm->max_dun_bytes_supported;
> > > > +}
> > > > +EXPORT_SYMBOL_GPL(blk_ksm_update_capabilities);
> > > 
> > > Wouldn't it be easier to replace the original blk_keyslot_manager, rather 
> > > than
> > > modify it?  Then blk_ksm_update_capabilities() wouldn't be needed.
> > > 
> > I didn't want to replace the original blk_keyslot_manager because it's
> > possible that e.g. fscrypt is checking for crypto capabilities support
> > via blk_ksm_crypto_cfg_supported() when DM wants to replace the
> > blk_keyslot_manager. DM would have to free the memory used by the
> > blk_keyslot_manager, but blk_ksm_crypto_cfg_supported() might still
> > be trying to access that memory. I did it this way to avoid having to
> > add refcounts or something else to the blk_keyslot_manager...(And I
> > didn't bother adding any synchronization code since the capabilities
> > only ever expand, and never contract).
> 
> Are you sure that's possible?  That would imply that there is no 
> synchronization
> between limits/capabilities in the request_queue being changed and the
> request_queue being used.  That's already buggy.  Maybe it's the sort of thing
> that is gotten away with in practice, in which case avoiding a free() would
> indeed be a good idea, but it's worth explicitly clarifying whether all this
> code is indeed racy by design...
> 
I tried checking if the two code regions are reachable at the same time
(by adding some hacky code in the middle of
blk_ksm_crypto_cfg_supported() to loop indefinitely until a certain flag
is set at the end of dm_update_keyslot_manager(), which is right after
where we'd free the old ksm when the table is swapped), and it turns out
the two regions really *can* run at the same time. Otoh, I'd imagine
dm_stop_queue() might synchronize the limits in the request_queue(), but
that's only called on request based DM devices...tl;dr I don't know if
changing limits in the request_queue is racy, but checking for crypto
capabilities is.

In case you're interested, here's the hack I used to test that

diff --git a/block/keyslot-manager.c b/block/keyslot-manager.c
index e16e4a074765..918bdd58e6b2 100644
--- a/block/keyslot-manager.c
+++ b/block/keyslot-manager.c
@@ -34,6 +34,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct blk_ksm_keyslot {
atomic_t slot_refs;
@@ -284,6 +285,7 @@ void blk_ksm_put_slot(struct blk_ksm_keyslot *slot)
}
 }
 
+volatile int my_inline_var = 0;
 /**
  * blk_ksm_crypto_cfg_supported() - Find out if a crypto configuration is
  * supported by a ksm.
@@ -297,8 +299,18 @@ void blk_ksm_put_slot(struct blk_ksm_keyslot *slot)
 bool blk_ksm_crypto_cfg_supported(struct blk_keyslot_manager *ksm,
  const struct blk_crypto_config *cfg)
 {
+   int mtmp = 0;
+
if (!ksm)
return false;
+   if (my_inline_var == 0)
+   my_inline_var = 1;
+   while (my_inline_var != 3) {
+   if (mtmp % 10 == 0)
+   printk("In blk_ksm_crypto supported! %d", 
my_inline_var);
+   mtmp++;
+   msleep(500);
+   }
if (!(ksm->crypto_modes_supported[cfg->crypto_mode] &
  cfg->data_unit_size))
return false;
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index cb1191d6e945..c6733de1388c 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -2141,6 +2141,14 @@ static int loop_add(struct loop_device **l, int i)
if (!disk)
goto out_free_queue;
 
+#ifdef CONFIG_BLK_INLINE_ENCRYPTION
+   blk_ksm_init_passthrough(&lo->ksm);
+   lo->ksm.max_dun_bytes_supported = 16;
+   lo->ksm.crypto_modes_supported[BLK_ENCRYPTION_MODE_AES_256_XTS] = 
0x;
+   lo->ksm.crypto_modes_supported[BLK_ENCRYPTION_MODE_ADIANTUM] = 
0x;
+   blk_ksm_register(&lo->ksm, lo->lo_queue);
+#endif
+
/*
 * Disable partition scanning by default. The 

[PATCH v12 01/10] dt-bindings: usb: Maxim type-c controller device tree binding document

2020-10-29 Thread Badhri Jagan Sridharan
Add device tree binding document for Maxim 33359 Type-C chip driver

Signed-off-by: Badhri Jagan Sridharan 
Reviewed-by: Rob Herring 
---
Changes since v1:
- Changing patch version to v6 to fix version number confusion.

Changes since v6:
- Migrated to yaml format.

Changes since v7:
- Rebase on usb-next

Changes since v8:
- Fix errors from make dt_binding_check as suggested by
  Rob Herring.

Changes since v9:
- additionalProperties: false as suggested by Rob Herring.

Changes since v10:
- Added the chip number to the binding as suggested by Rob Herring.
- Renamed the filename as well.

Changes since v11:
Addressed comments from Rob Herring to rename from maxim,33359
to maxim,max33359
---
 .../bindings/usb/maxim,max33359.yaml  | 75 +++
 1 file changed, 75 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/maxim,max33359.yaml

diff --git a/Documentation/devicetree/bindings/usb/maxim,max33359.yaml 
b/Documentation/devicetree/bindings/usb/maxim,max33359.yaml
new file mode 100644
index ..93a19eda610b
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/maxim,max33359.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/maxim,max33359.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Maxim TCPCI Type-C PD controller DT bindings
+
+maintainers:
+  - Badhri Jagan Sridharan 
+
+description: Maxim TCPCI Type-C PD controller
+
+properties:
+  compatible:
+enum:
+  - maxim,max33359
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  connector:
+type: object
+$ref: ../connector/usb-connector.yaml#
+description:
+  Properties for usb c connector.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - connector
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+#include 
+i2c0 {
+#address-cells = <1>;
+#size-cells = <0>;
+
+maxtcpc@25 {
+compatible = "maxim,max33359";
+reg = <0x25>;
+interrupt-parent = <&gpa8>;
+interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+
+connector {
+compatible = "usb-c-connector";
+label = "USB-C";
+data-role = "dual";
+power-role = "dual";
+try-power-role = "sink";
+self-powered;
+op-sink-microwatt = <260>;
+new-source-frs-typec-current = ;
+source-pdos = ;
+sink-pdos = ;
+};
+};
+};
+...
-- 
2.29.1.341.ge80a0c044ae-goog



[PATCH V2 0/4] Enhancements to Tegra194 PCIe driver

2020-10-29 Thread Vidya Sagar
This series of patches do some enhancements and some bug fixes to the
Tegra194 PCIe platform driver like
- Fixing Vendor-ID corruption
- Mapping DBI space correctly
- Updating DWC IP version
- Handling error conditions properly

V2;
* Addressed Rob's comments. Changed 'Strongly Ordered' to 'nGnRnE'

Vidya Sagar (4):
  PCI: tegra: Fix ASPM-L1SS advertisement disable code
  PCI: tegra: Map configuration space as nGnRnE
  PCI: tegra: Set DesignWare IP version
  PCI: tegra: Handle error conditions properly

 drivers/pci/controller/dwc/pcie-tegra194.c | 62 +++---
 1 file changed, 30 insertions(+), 32 deletions(-)

-- 
2.17.1



[PATCH V2 4/4] PCI: tegra: Handle error conditions properly

2020-10-29 Thread Vidya Sagar
Currently the driver checks for error value of different APIs during the
uninitialization sequence. It just returns from there if there is any error
observed for one of those calls. Comparatively it is better to continue the
uninitialization sequence irrespective of whether some of them are
returning error. That way, it is more closer to complete uninitialization.
It also adds checking return value for error for a cleaner exit path.

Signed-off-by: Vidya Sagar 
---
V2:
* None

 drivers/pci/controller/dwc/pcie-tegra194.c | 45 ++
 1 file changed, 20 insertions(+), 25 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c 
b/drivers/pci/controller/dwc/pcie-tegra194.c
index 253d91033bc3..8c08998b9ce1 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1422,43 +1422,32 @@ static int tegra_pcie_config_controller(struct 
tegra_pcie_dw *pcie,
return ret;
 }
 
-static int __deinit_controller(struct tegra_pcie_dw *pcie)
+static void tegra_pcie_unconfig_controller(struct tegra_pcie_dw *pcie)
 {
int ret;
 
ret = reset_control_assert(pcie->core_rst);
-   if (ret) {
-   dev_err(pcie->dev, "Failed to assert \"core\" reset: %d\n",
-   ret);
-   return ret;
-   }
+   if (ret)
+   dev_err(pcie->dev, "Failed to assert \"core\" reset: %d\n", 
ret);
 
tegra_pcie_disable_phy(pcie);
 
ret = reset_control_assert(pcie->core_apb_rst);
-   if (ret) {
+   if (ret)
dev_err(pcie->dev, "Failed to assert APB reset: %d\n", ret);
-   return ret;
-   }
 
clk_disable_unprepare(pcie->core_clk);
 
ret = regulator_disable(pcie->pex_ctl_supply);
-   if (ret) {
+   if (ret)
dev_err(pcie->dev, "Failed to disable regulator: %d\n", ret);
-   return ret;
-   }
 
tegra_pcie_disable_slot_regulators(pcie);
 
ret = tegra_pcie_bpmp_set_ctrl_state(pcie, false);
-   if (ret) {
+   if (ret)
dev_err(pcie->dev, "Failed to disable controller %d: %d\n",
pcie->cid, ret);
-   return ret;
-   }
-
-   return ret;
 }
 
 static int tegra_pcie_init_controller(struct tegra_pcie_dw *pcie)
@@ -1482,7 +1471,8 @@ static int tegra_pcie_init_controller(struct 
tegra_pcie_dw *pcie)
return 0;
 
 fail_host_init:
-   return __deinit_controller(pcie);
+   tegra_pcie_unconfig_controller(pcie);
+   return ret;
 }
 
 static int tegra_pcie_try_link_l2(struct tegra_pcie_dw *pcie)
@@ -1551,13 +1541,12 @@ static void tegra_pcie_dw_pme_turnoff(struct 
tegra_pcie_dw *pcie)
appl_writel(pcie, data, APPL_PINMUX);
 }
 
-static int tegra_pcie_deinit_controller(struct tegra_pcie_dw *pcie)
+static void tegra_pcie_deinit_controller(struct tegra_pcie_dw *pcie)
 {
tegra_pcie_downstream_dev_to_D0(pcie);
dw_pcie_host_deinit(&pcie->pci.pp);
tegra_pcie_dw_pme_turnoff(pcie);
-
-   return __deinit_controller(pcie);
+   tegra_pcie_unconfig_controller(pcie);
 }
 
 static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
@@ -1590,7 +1579,11 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw 
*pcie)
goto fail_pm_get_sync;
}
 
-   tegra_pcie_init_controller(pcie);
+   ret = tegra_pcie_init_controller(pcie);
+   if (ret < 0) {
+   dev_err(dev, "Failed to initialize controller: %d\n", ret);
+   goto fail_pm_get_sync;
+   }
 
pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
if (!pcie->link_state) {
@@ -2238,8 +2231,9 @@ static int tegra_pcie_dw_suspend_noirq(struct device *dev)
   PORT_LOGIC_MSI_CTRL_INT_0_EN);
tegra_pcie_downstream_dev_to_D0(pcie);
tegra_pcie_dw_pme_turnoff(pcie);
+   tegra_pcie_unconfig_controller(pcie);
 
-   return __deinit_controller(pcie);
+   return 0;
 }
 
 static int tegra_pcie_dw_resume_noirq(struct device *dev)
@@ -2267,7 +2261,8 @@ static int tegra_pcie_dw_resume_noirq(struct device *dev)
return 0;
 
 fail_host_init:
-   return __deinit_controller(pcie);
+   tegra_pcie_unconfig_controller(pcie);
+   return ret;
 }
 
 static int tegra_pcie_dw_resume_early(struct device *dev)
@@ -2305,7 +2300,7 @@ static void tegra_pcie_dw_shutdown(struct platform_device 
*pdev)
disable_irq(pcie->pci.pp.msi_irq);
 
tegra_pcie_dw_pme_turnoff(pcie);
-   __deinit_controller(pcie);
+   tegra_pcie_unconfig_controller(pcie);
 }
 
 static const struct tegra_pcie_dw_of_data tegra_pcie_dw_rc_of_data = {
-- 
2.17.1



[PATCH v5 2/2] f2fs: add F2FS_IOC_SET_COMPRESS_OPTION ioctl

2020-10-29 Thread Daeho Jeong
From: Daeho Jeong 

Added a new F2FS_IOC_SET_COMPRESS_OPTION ioctl to change file
compression option of a file.

struct f2fs_comp_option {
u8 algorithm; => compression algorithm
  => 0:lzo, 1:lz4, 2:zstd, 3:lzorle
u8 log_cluster_size;  => log scale cluster size
  => 2 ~ 8
};

struct f2fs_comp_option option;

option.algorithm = 1;
option.log_cluster_size = 7;

ioctl(fd, F2FS_IOC_SET_COMPRESS_OPTION, &option);

Signed-off-by: Daeho Jeong 
---

v5: allowed to set algorithm which is not currently enabled by kernel
v4: changed commit message.
v3: changed the error number more specific.
folded in fix for build breakage reported by kernel test robot
 and Dan Carpenter .
v2: added ioctl description.
---
 fs/f2fs/compress.c |  5 +
 fs/f2fs/f2fs.h |  7 ++
 fs/f2fs/file.c | 54 ++
 3 files changed, 66 insertions(+)

diff --git a/fs/f2fs/compress.c b/fs/f2fs/compress.c
index 7895186cc765..816d7adc914c 100644
--- a/fs/f2fs/compress.c
+++ b/fs/f2fs/compress.c
@@ -514,6 +514,11 @@ bool f2fs_is_compress_backend_ready(struct inode *inode)
return f2fs_cops[F2FS_I(inode)->i_compress_algorithm];
 }
 
+bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)
+{
+   return algorithm < COMPRESS_MAX && f2fs_cops[algorithm] != NULL;
+}
+
 static mempool_t *compress_page_pool;
 static int num_compress_pages = 512;
 module_param(num_compress_pages, uint, 0444);
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index a33c90cf979b..cc38afde6c04 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -435,6 +435,8 @@ static inline bool __has_cursum_space(struct f2fs_journal 
*journal,
struct f2fs_sectrim_range)
 #define F2FS_IOC_GET_COMPRESS_OPTION   _IOR(F2FS_IOCTL_MAGIC, 21,  \
struct f2fs_comp_option)
+#define F2FS_IOC_SET_COMPRESS_OPTION   _IOW(F2FS_IOCTL_MAGIC, 22,  \
+   struct f2fs_comp_option)
 
 /*
  * should be same as XFS_IOC_GOINGDOWN.
@@ -3915,6 +3917,7 @@ bool f2fs_compress_write_end(struct inode *inode, void 
*fsdata,
 int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool lock);
 void f2fs_compress_write_end_io(struct bio *bio, struct page *page);
 bool f2fs_is_compress_backend_ready(struct inode *inode);
+bool f2fs_is_compress_algorithm_ready(unsigned char algorithm);
 int f2fs_init_compress_mempool(void);
 void f2fs_destroy_compress_mempool(void);
 void f2fs_decompress_pages(struct bio *bio, struct page *page, bool verity);
@@ -3945,6 +3948,10 @@ static inline bool f2fs_is_compress_backend_ready(struct 
inode *inode)
/* not support compression */
return false;
 }
+static inline bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)
+{
+   return false;
+}
 static inline struct page *f2fs_compress_control_page(struct page *page)
 {
WARN_ON_ONCE(1);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 8922ab191a9d..a0f31d8ebcfd 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3963,6 +3963,57 @@ static int f2fs_ioc_get_compress_option(struct file 
*filp, unsigned long arg)
return 0;
 }
 
+static int f2fs_ioc_set_compress_option(struct file *filp, unsigned long arg)
+{
+   struct inode *inode = file_inode(filp);
+   struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+   struct f2fs_comp_option option;
+   int ret = 0;
+
+   if (!f2fs_sb_has_compression(sbi))
+   return -EOPNOTSUPP;
+
+   if (!(filp->f_mode & FMODE_WRITE))
+   return -EBADF;
+
+   if (copy_from_user(&option, (struct f2fs_comp_option __user *)arg,
+   sizeof(option)))
+   return -EFAULT;
+
+   if (!f2fs_compressed_file(inode) ||
+   option.log_cluster_size < MIN_COMPRESS_LOG_SIZE ||
+   option.log_cluster_size > MAX_COMPRESS_LOG_SIZE ||
+   option.algorithm >= COMPRESS_MAX)
+   return -EINVAL;
+
+   file_start_write(filp);
+   inode_lock(inode);
+
+   if (f2fs_is_mmap_file(inode) || get_dirty_pages(inode)) {
+   ret = -EBUSY;
+   goto out;
+   }
+
+   if (inode->i_size != 0) {
+   ret = -EFBIG;
+   goto out;
+   }
+
+   F2FS_I(inode)->i_compress_algorithm = option.algorithm;
+   F2FS_I(inode)->i_log_cluster_size = option.log_cluster_size;
+   F2FS_I(inode)->i_cluster_size = 1 << option.log_cluster_size;
+   f2fs_mark_inode_dirty_sync(inode, true);
+
+   if (!f2fs_is_compress_algorithm_ready(option.algorithm))
+   f2fs_warn(sbi, "compression algorithm is successfully set, "
+   "but current kernel doesn't support this algorithm.");
+out:
+   inode_unlock(inode);
+   file_end_write(filp);
+
+   return ret;
+}
+
 long f2fs_io

[PATCH v5 04/21] perf arm-spe: Refactor arm_spe_get_events()

2020-10-29 Thread Leo Yan
In function arm_spe_get_events(), the event packet's 'index' is assigned
as payload length, but the flow is not directive: it firstly gets the
packet length from the return value of arm_spe_get_payload(), the value
includes header length (1) and payload length:

  int ret = arm_spe_get_payload(buf, len, packet);

and then reduces header length from packet length, so finally get the
payload length:

  packet->index = ret - 1;

To simplify the code, this patch directly assigns payload length to
event packet's index; and at the end it calls arm_spe_get_payload() to
return the payload value.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 06b3eec4494e..f1b4cb008837 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -136,8 +136,6 @@ static int arm_spe_get_timestamp(const unsigned char *buf, 
size_t len,
 static int arm_spe_get_events(const unsigned char *buf, size_t len,
  struct arm_spe_pkt *packet)
 {
-   int ret = arm_spe_get_payload(buf, len, packet);
-
packet->type = ARM_SPE_EVENTS;
 
/* we use index to identify Events with a less number of
@@ -145,9 +143,9 @@ static int arm_spe_get_events(const unsigned char *buf, 
size_t len,
 * LLC-REFILL, and REMOTE-ACCESS events are identified if
 * index > 1.
 */
-   packet->index = ret - 1;
+   packet->index = arm_spe_payload_len(buf[0]);
 
-   return ret;
+   return arm_spe_get_payload(buf, len, packet);
 }
 
 static int arm_spe_get_data_source(const unsigned char *buf, size_t len,
-- 
2.17.1



Re: [PATCH v6 3/4] net: dsa: mv88e6xxx: Add support for mv88e6393x family of Marvell

2020-10-29 Thread Marek Behun
On Thu, 29 Oct 2020 15:42:29 +1000
Pavana Sharma  wrote:

> The Marvell 88E6393X device is a single-chip integration of a 11-port
> Ethernet switch with eight integrated Gigabit Ethernet (GbE) transceivers
> and three 10-Gigabit interfaces.
> 
> This patch adds functionalities specific to mv88e6393x family (88E6393X,
> 88E6193X and 88E6191X)
> 
> Co-developed-by: Ashkan Boldaji 
> Signed-off-by: Ashkan Boldaji 
> Signed-off-by: Pavana Sharma 
> ---
> Changes in v2:
>   - Fix a warning (Reported-by: kernel test robot )
> Changes in v3:
>   - Fix 'unused function' warning
> Changes in v4, v5, v6:
>   - Incorporated feedback from maintainers.
> ---
>  drivers/net/dsa/mv88e6xxx/chip.c|  91 +++
>  drivers/net/dsa/mv88e6xxx/chip.h|   4 +
>  drivers/net/dsa/mv88e6xxx/global1.h |   2 +
>  drivers/net/dsa/mv88e6xxx/global2.h |   8 +
>  drivers/net/dsa/mv88e6xxx/port.c| 234 
>  drivers/net/dsa/mv88e6xxx/port.h|  43 -
>  drivers/net/dsa/mv88e6xxx/serdes.c  | 225 ++
>  drivers/net/dsa/mv88e6xxx/serdes.h  |  39 +
>  8 files changed, 644 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/dsa/mv88e6xxx/chip.c 
> b/drivers/net/dsa/mv88e6xxx/chip.c
> index f0dbc05e30a4..de96fd08e77a 100644
> --- a/drivers/net/dsa/mv88e6xxx/chip.c
> +++ b/drivers/net/dsa/mv88e6xxx/chip.c
> @@ -634,6 +634,24 @@ static void mv88e6390x_phylink_validate(struct 
> mv88e6xxx_chip *chip, int port,
>   mv88e6390_phylink_validate(chip, port, mask, state);
>  }
>  
> +static void mv88e6393x_phylink_validate(struct mv88e6xxx_chip *chip, int 
> port,
> + unsigned long *mask,
> + struct phylink_link_state *state)
> +{
> + if (port == 0 || port == 9 || port == 10) {
> + phylink_set(mask, 1baseT_Full);
> + phylink_set(mask, 1baseKR_Full);
> + phylink_set(mask, 5000baseT_Full);
> + phylink_set(mask, 2500baseX_Full);
> + phylink_set(mask, 2500baseT_Full);
> + }
> +
> + phylink_set(mask, 1000baseT_Full);
> + phylink_set(mask, 1000baseX_Full);
> +
> + mv88e6065_phylink_validate(chip, port, mask, state);
> +}
> +
>  static void mv88e6xxx_validate(struct dsa_switch *ds, int port,
>  unsigned long *supported,
>  struct phylink_link_state *state)
> @@ -4141,6 +4159,56 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
>   .phylink_validate = mv88e6390_phylink_validate,
>  };
>  
> +static const struct mv88e6xxx_ops mv88e6193x_ops = {
> + /* MV88E6XXX_FAMILY_6393 */
> + .setup_errata = mv88e6393x_setup_errata,
> + .irl_init_all = mv88e6390_g2_irl_init_all,
> + .get_eeprom = mv88e6xxx_g2_get_eeprom8,
> + .set_eeprom = mv88e6xxx_g2_set_eeprom8,
> + .set_switch_mac = mv88e6xxx_g2_set_switch_mac,
> + .phy_read = mv88e6xxx_g2_smi_phy_read,
> + .phy_write = mv88e6xxx_g2_smi_phy_write,
> + .port_set_link = mv88e6xxx_port_set_link,
> + .port_set_speed_duplex = mv88e6393x_port_set_speed_duplex,
> + .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
> + .port_tag_remap = mv88e6390_port_tag_remap,
> + .port_set_frame_mode = mv88e6351_port_set_frame_mode,
> + .port_set_egress_floods = mv88e6352_port_set_egress_floods,
> + .port_set_ether_type = mv88e6393x_port_set_ether_type,
> + .port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
> + .port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
> + .port_pause_limit = mv88e6390_port_pause_limit,
> + .port_set_cmode = mv88e6393x_port_set_cmode,
> + .port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
> + .port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
> + .port_get_cmode = mv88e6352_port_get_cmode,
> + .stats_snapshot = mv88e6390_g1_stats_snapshot,
> + .stats_set_histogram = mv88e6390_g1_stats_set_histogram,
> + .stats_get_sset_count = mv88e6320_stats_get_sset_count,
> + .stats_get_strings = mv88e6320_stats_get_strings,
> + .stats_get_stats = mv88e6390_stats_get_stats,
> + .set_cpu_port = mv88e6393x_port_set_cpu_dest,
> + .set_egress_port = mv88e6393x_set_egress_port,
> + .watchdog_ops = &mv88e6390_watchdog_ops,
> + .mgmt_rsvd2cpu = mv88e6393x_port_mgmt_rsvd2cpu,
> + .pot_clear = mv88e6xxx_g2_pot_clear,
> + .reset = mv88e6352_g1_reset,
> + .rmu_disable = mv88e6390_g1_rmu_disable,
> + .vtu_getnext = mv88e6390_g1_vtu_getnext,
> + .vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
> + .serdes_power = mv88e6393x_serdes_power,
> + .serdes_get_lane = mv88e6393x_serdes_get_lane,
> + /* Check status register pause & lpa register */

Is this a TODO comment? If so, it should be marked as such.

> + .serdes_pcs_get_state = mv88e6390_serdes_pcs_get_state,
> + .serdes_irq_mapping = mv88e6390_serdes_irq_mapping,
> + .serdes_ir

[PATCH v5 05/21] perf arm-spe: Fix packet length handling

2020-10-29 Thread Leo Yan
When processing address packet and counter packet, if the packet
contains extended header, it misses to account the extra one byte for
header length calculation, thus returns the wrong packet length.

To correct the packet length calculation, one possible fixing is simply
to plus extra 1 for extended header, but will spread some duplicate code
in the flows for processing address packet and counter packet.
Alternatively, we can refine the function arm_spe_get_payload() to not
only support short header and allow it to support extended header, and
rely on it for the packet length calculation.

So this patch refactors function arm_spe_get_payload() with a new
argument 'ext_hdr' for support extended header; the packet processing
flows can invoke this function to unify the packet length calculation.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 34 +++
 1 file changed, 12 insertions(+), 22 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index f1b4cb008837..04fd7fd7c15f 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -82,14 +82,15 @@ static unsigned int arm_spe_payload_len(unsigned char hdr)
 }
 
 static int arm_spe_get_payload(const unsigned char *buf, size_t len,
+  unsigned char ext_hdr,
   struct arm_spe_pkt *packet)
 {
-   size_t payload_len = arm_spe_payload_len(buf[0]);
+   size_t payload_len = arm_spe_payload_len(buf[ext_hdr]);
 
-   if (len < 1 + payload_len)
+   if (len < 1 + ext_hdr + payload_len)
return ARM_SPE_NEED_MORE_BYTES;
 
-   buf++;
+   buf += 1 + ext_hdr;
 
switch (payload_len) {
case 1: packet->payload = *(uint8_t *)buf; break;
@@ -99,7 +100,7 @@ static int arm_spe_get_payload(const unsigned char *buf, 
size_t len,
default: return ARM_SPE_BAD_PACKET;
}
 
-   return 1 + payload_len;
+   return 1 + ext_hdr + payload_len;
 }
 
 static int arm_spe_get_pad(struct arm_spe_pkt *packet)
@@ -130,7 +131,7 @@ static int arm_spe_get_timestamp(const unsigned char *buf, 
size_t len,
 struct arm_spe_pkt *packet)
 {
packet->type = ARM_SPE_TIMESTAMP;
-   return arm_spe_get_payload(buf, len, packet);
+   return arm_spe_get_payload(buf, len, 0, packet);
 }
 
 static int arm_spe_get_events(const unsigned char *buf, size_t len,
@@ -145,14 +146,14 @@ static int arm_spe_get_events(const unsigned char *buf, 
size_t len,
 */
packet->index = arm_spe_payload_len(buf[0]);
 
-   return arm_spe_get_payload(buf, len, packet);
+   return arm_spe_get_payload(buf, len, 0, packet);
 }
 
 static int arm_spe_get_data_source(const unsigned char *buf, size_t len,
   struct arm_spe_pkt *packet)
 {
packet->type = ARM_SPE_DATA_SOURCE;
-   return arm_spe_get_payload(buf, len, packet);
+   return arm_spe_get_payload(buf, len, 0, packet);
 }
 
 static int arm_spe_get_context(const unsigned char *buf, size_t len,
@@ -160,8 +161,7 @@ static int arm_spe_get_context(const unsigned char *buf, 
size_t len,
 {
packet->type = ARM_SPE_CONTEXT;
packet->index = buf[0] & 0x3;
-
-   return arm_spe_get_payload(buf, len, packet);
+   return arm_spe_get_payload(buf, len, 0, packet);
 }
 
 static int arm_spe_get_op_type(const unsigned char *buf, size_t len,
@@ -169,41 +169,31 @@ static int arm_spe_get_op_type(const unsigned char *buf, 
size_t len,
 {
packet->type = ARM_SPE_OP_TYPE;
packet->index = buf[0] & 0x3;
-   return arm_spe_get_payload(buf, len, packet);
+   return arm_spe_get_payload(buf, len, 0, packet);
 }
 
 static int arm_spe_get_counter(const unsigned char *buf, size_t len,
   const unsigned char ext_hdr, struct arm_spe_pkt 
*packet)
 {
-   if (len < 2)
-   return ARM_SPE_NEED_MORE_BYTES;
-
packet->type = ARM_SPE_COUNTER;
if (ext_hdr)
packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7);
else
packet->index = buf[0] & 0x7;
 
-   packet->payload = le16_to_cpu(*(uint16_t *)(buf + 1));
-
-   return 1 + ext_hdr + 2;
+   return arm_spe_get_payload(buf, len, ext_hdr, packet);
 }
 
 static int arm_spe_get_addr(const unsigned char *buf, size_t len,
const unsigned char ext_hdr, struct arm_spe_pkt 
*packet)
 {
-   if (len < 8)
-   return ARM_SPE_NEED_MORE_BYTES;
-
packet->type = ARM_SPE_ADDRESS;
if (ext_hdr)
packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7);
else
packet->index = buf[0] & 0x7;
 
-   memcpy_le64(&packet->payload, buf + 1, 8);
-
-   return 1 + ext_hdr + 8;
+   return ar

Re: [PATCH v1 2/3] iommu: Fix an issue in iommu_page_response() flags check

2020-10-29 Thread Yi Sun
On 20-10-28 10:13:56, Jean-Philippe Brucker wrote:
> Hi,
> 
> On Wed, Oct 28, 2020 at 09:36:57AM +0800, Yi Sun wrote:
> > From: Jacob Pan 
> > 
> > original code fails when LAST_PAGE is set in flags.
> 
> LAST_PAGE is not documented to be a valid flags for page_response.
> So isn't failing the right thing to do?
> 
> > 
> > Signed-off-by: Jacob Pan 
> > Signed-off-by: Liu Yi L 
> > Signed-off-by: Yi Sun 
> > ---
> >  drivers/iommu/iommu.c | 6 --
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> > index 8c470f4..053cec3 100644
> > --- a/drivers/iommu/iommu.c
> > +++ b/drivers/iommu/iommu.c
> > @@ -1200,9 +1200,11 @@ int iommu_page_response(struct device *dev,
> > return -EINVAL;
> >  
> > if (msg->version != IOMMU_PAGE_RESP_VERSION_1 ||
> > -   msg->flags & ~IOMMU_PAGE_RESP_PASID_VALID)
> > +   !(msg->flags & IOMMU_PAGE_RESP_PASID_VALID)) {
> 
> It should be OK not to have PASID_VALID set, we're just checking for
> undefined flags here.
> 
Thanks! You are right. Per published spec, we should not care LAST_PAGE
for page_response. I will remove this patch in next version.
 
> Thanks,
> Jean
> 
> > +   dev_warn_ratelimited(dev, "%s:Invalid ver %x: flags %x\n",
> > +   __func__, msg->version, msg->flags);
> > return -EINVAL;
> > -
> > +   }
> > /* Only send response if there is a fault report pending */
> > mutex_lock(¶m->fault_param->lock);
> > if (list_empty(¶m->fault_param->faults)) {
> > -- 
> > 2.7.4
> > 
> > ___
> > iommu mailing list
> > io...@lists.linux-foundation.org
> > https://lists.linuxfoundation.org/mailman/listinfo/iommu


[PATCH v5 03/21] perf arm-spe: Refactor payload size calculation

2020-10-29 Thread Leo Yan
This patch defines macro to extract "sz" field from header, and renames
the function payloadlen() to arm_spe_payload_len().

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 7c7b5eb09fba..06b3eec4494e 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -69,22 +69,22 @@ const char *arm_spe_pkt_name(enum arm_spe_pkt_type type)
return arm_spe_packet_name[type];
 }
 
-/* return ARM SPE payload size from its encoding,
- * which is in bits 5:4 of the byte.
- * 00 : byte
- * 01 : halfword (2)
- * 10 : word (4)
- * 11 : doubleword (8)
+/*
+ * Extracts the field "sz" from header bits and converts to bytes:
+ *   00 : byte (1)
+ *   01 : halfword (2)
+ *   10 : word (4)
+ *   11 : doubleword (8)
  */
-static int payloadlen(unsigned char byte)
+static unsigned int arm_spe_payload_len(unsigned char hdr)
 {
-   return 1 << ((byte & 0x30) >> 4);
+   return 1U << ((hdr & GENMASK_ULL(5, 4)) >> 4);
 }
 
 static int arm_spe_get_payload(const unsigned char *buf, size_t len,
   struct arm_spe_pkt *packet)
 {
-   size_t payload_len = payloadlen(buf[0]);
+   size_t payload_len = arm_spe_payload_len(buf[0]);
 
if (len < 1 + payload_len)
return ARM_SPE_NEED_MORE_BYTES;
-- 
2.17.1



[PATCH v12 10/10] usb: typec: tcpci_maxim: Fix uninitialized return variable

2020-10-29 Thread Badhri Jagan Sridharan
New smatch warnings:
drivers/usb/typec/tcpm/tcpci_maxim.c:324 max_tcpci_irq() error: uninitialized 
symbol 'irq_return'.
drivers/usb/typec/tcpm/tcpci_maxim.c:407 max_tcpci_probe() warn: passing zero 
to 'PTR_ERR'

The change fixes the above warnings by initializing irq_return
and replacing IS_ERR_OR_NULL with IS_ERR.

Reported-by: kernel test robot 
Reported-by: Dan Carpenter 
Signed-off-by: Badhri Jagan Sridharan 
---
v12 is the first version of the patch in this series.
---
 drivers/usb/typec/tcpm/tcpci_maxim.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/typec/tcpm/tcpci_maxim.c 
b/drivers/usb/typec/tcpm/tcpci_maxim.c
index 536df4a7901a..c1797239bf08 100644
--- a/drivers/usb/typec/tcpm/tcpci_maxim.c
+++ b/drivers/usb/typec/tcpm/tcpci_maxim.c
@@ -343,7 +343,7 @@ static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
 {
struct max_tcpci_chip *chip = dev_id;
u16 status;
-   irqreturn_t irq_return;
+   irqreturn_t irq_return = IRQ_HANDLED;
int ret;
 
if (!chip->port)
@@ -445,7 +445,7 @@ static int max_tcpci_probe(struct i2c_client *client, const 
struct i2c_device_id
 
max_tcpci_init_regs(chip);
chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
-   if (IS_ERR_OR_NULL(chip->tcpci)) {
+   if (IS_ERR(chip->tcpci)) {
dev_err(&client->dev, "TCPCI port registration failed");
ret = PTR_ERR(chip->tcpci);
return PTR_ERR(chip->tcpci);
-- 
2.29.1.341.ge80a0c044ae-goog



Re: [PATCH] opp: Reduce the size of critical section in _opp_table_kref_release()

2020-10-29 Thread Viresh Kumar
On 28-10-20, 16:32, Stephen Boyd wrote:
> Quoting Viresh Kumar (2020-10-27 00:57:06)
> > There is a lot of stuff here which can be done outside of the big
> > opp_table_lock, do that. This helps avoiding few circular dependency
> > lockdeps around debugfs and interconnects.
> > 
> > Reported-by: Rob Clark 
> > Reported-by: Dmitry Osipenko 
> > Signed-off-by: Viresh Kumar 
> > ---
> 
> Any Fixes tag?

The circular dependency lockdep appears with 5.11 stuff and so we
don't need to fix it in any of the earlier releases. And so I didn't
wanted to bother with the fixes tag, as the code had been like this
for ever.

> Reviewed-by: Stephen Boyd 

Thanks a lot. I was a bit worried about the crazy idea I had to solve
this :)

-- 
viresh


[PATCH v5 4/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi

2020-10-29 Thread Ramuthevar,Vadivel MuruganX
From: Ramuthevar Vadivel Murugan 

Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/

Signed-off-by: Ramuthevar Vadivel Murugan 

Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt 
(100%)

diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt 
b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
similarity index 100%
rename from Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
rename to Documentation/devicetree/bindings/spi/cadence-quadspi.txt
-- 
2.11.0



[PATCH v12 06/10] usb: typec: tcpci_maxim: Fix vbus stuck on upon diconnecting sink

2020-10-29 Thread Badhri Jagan Sridharan
Occasionally, POWER_STATUS.sourcing_vbus takes a while to clear after
writing to  MAX_BUCK_BOOST_OP register. This causes vbus to turn back
on while disconnecting the sink. Overcome this issue by writing into
MAX_BUCK_BOOST_OP during frs while sourcing vbu, instead of always
into the register whenever POWER_STATUS.sourcing_vbus is set.

Signed-off-by: Badhri Jagan Sridharan 
Reviewed-by: Heikki Krogerus 
---
v9 is the first version of this patch. Added to fix
occasional bug of vbus turning back on when disconnecting the FRS accessory
after disconnect. No changes since v9.

Changes since v10:
Added Reviewed-by: Heikki Krogerus

Changes since v11:
none
---
 drivers/usb/typec/tcpm/tcpci_maxim.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/usb/typec/tcpm/tcpci_maxim.c 
b/drivers/usb/typec/tcpm/tcpci_maxim.c
index a5014c3b51d5..dd6171604362 100644
--- a/drivers/usb/typec/tcpm/tcpci_maxim.c
+++ b/drivers/usb/typec/tcpm/tcpci_maxim.c
@@ -238,23 +238,22 @@ static void process_power_status(struct max_tcpci_chip 
*chip)
if (ret < 0)
return;
 
-   if (pwr_status == 0xff) {
+   if (pwr_status == 0xff)
max_tcpci_init_regs(chip);
-   } else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS) {
+   else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS)
tcpm_sourcing_vbus(chip->port);
-   /*
-* Alawys re-enable boost here.
-* In normal case, when say an headset is attached, TCPM would
-* have instructed to TCPC to enable boost, so the call is a
-* no-op.
-* But for Fast Role Swap case, Boost turns on autonomously 
without
-* AP intervention, but, needs AP to enable source mode 
explicitly
-* for AP to regain control.
-*/
-   max_tcpci_set_vbus(chip->tcpci, &chip->data, true, false);
-   } else {
+   else
tcpm_vbus_change(chip->port);
-   }
+}
+
+static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data 
*tdata)
+{
+   /*
+* For Fast Role Swap case, Boost turns on autonomously without
+* AP intervention, but, needs AP to enable source mode explicitly
+* for AP to regain control.
+*/
+   max_tcpci_set_vbus(tcpci, tdata, true, false);
 }
 
 static void process_tx(struct max_tcpci_chip *chip, u16 status)
@@ -441,6 +440,7 @@ static int max_tcpci_probe(struct i2c_client *client, const 
struct i2c_device_id
chip->data.start_drp_toggling = max_tcpci_start_toggling;
chip->data.TX_BUF_BYTE_x_hidden = true;
chip->data.init = tcpci_init;
+   chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus;
 
max_tcpci_init_regs(chip);
chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
-- 
2.29.1.341.ge80a0c044ae-goog



[PATCH v5 1/6] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC

2020-10-29 Thread Ramuthevar,Vadivel MuruganX
From: Ramuthevar Vadivel Murugan 

Add QSPI controller support for Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan 

---
 drivers/spi/Kconfig   | 2 +-
 drivers/spi/spi-cadence-quadspi.c | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d2c976e55b8b..926da61eee5a 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -203,7 +203,7 @@ config SPI_CADENCE
 
 config SPI_CADENCE_QUADSPI
tristate "Cadence Quad SPI controller"
-   depends on OF && (ARM || ARM64 || COMPILE_TEST)
+   depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)
help
  Enable support for the Cadence Quad SPI Flash controller.
 
diff --git a/drivers/spi/spi-cadence-quadspi.c 
b/drivers/spi/spi-cadence-quadspi.c
index 40938cf3806d..d7b10c46fa70 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1401,6 +1401,9 @@ static const struct of_device_id cqspi_dt_ids[] = {
.compatible = "ti,am654-ospi",
.data = &am654_ospi,
},
+   {
+   .compatible = "intel,lgm-qspi",
+   },
{ /* end of table */ }
 };
 
-- 
2.11.0



Re: [RFC PATCH] irqchip/sifive-plic: Fix getting wrong chip_data when interrupt is hierarchy

2020-10-29 Thread Anup Patel
On Thu, Oct 29, 2020 at 8:07 AM Greentime Hu  wrote:
>
> This oops is caused by a wrong chip_data and it is because plic_irq_unmask
> uses irq_get_chip_data(irq_data->irq) to get the chip_data. However it may
> get another irq_data with the same irq_data->irq if it is hierarchy.
>
> In this case, it will get irq_data of sifive_gpio_irqchip instead of
> plic_chip so that it will get a wrong chip_data and then the wrong lmask
> of it to cause this oops.
>
> To fix this issue, we can use irq_data_get_irq_chip_data(irq_data) to get
> the correct chip_data of plic_chip.
>
> (gdb) p d
> $11 = (struct irq_data *) 0xffe1f695f620
> (gdb) p *d
> $9 = {
>   mask = 0,
>   irq = 57,
>   hwirq = 6,
>   common = 0xffe1f695f600,
>   chip = 0xffe0018b5630 ,
>   domain = 0xffe1f692c400,
>   parent_data = 0xffe1f68482c0,
>   chip_data = 0xffe1f564a820
> }
>
> (gdb) p d
> $6 = (struct irq_data *) 0xffe1f68482c0
> (gdb) p *d
> $7 = {
>   mask = 0,
>   irq = 57,
>   hwirq = 29,
>   common = 0xffe1f695f600,
>   chip = 0xffe0018b5070 ,
>   domain = 0xffe1f6635e00,
>   parent_data = 0x0,
>   chip_data = 0xffe1f660f1a0
> }
>
> [3.030165] [ cut here ]
> [3.034614] WARNING: CPU: 1 PID: 1 at 
> drivers/irqchip/irq-sifive-plic.c:125 plic_irq_unmask+0xc4/0x114
> [3.043887] Modules linked in:
> [3.046932] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.9.0 #1
> [3.052748] epc: ffe000588e90 ra : ffe000588e88 sp : 
> ffe1f6753940
> [3.059869]  gp : ffe001978f48 tp : ffe1f6748000 t0 : 
> ffe001995cb0
> [3.067080]  t1 : ffe001995be8 t2 : 73616d61202c343a s0 : 
> ffe1f67539a0
> [3.074288]  s1 : ffe1f4968140 a0 : 00b2 a1 : 
> 
> [3.081497]  a2 : 00c2 a3 :  a4 : 
> 381c5a89432fe900
> [3.088707]  a5 : 0004 a6 :  a7 : 
> 01aa
> [3.095916]  s2 : ffe1f5901020 s3 : ffe00197a0a8 s4 : 
> ffe001978b0c
> [3.103125]  s5 : ffe00197a1f0 s6 : 0008 s7 : 
> ffe1f4983c9c
> [3.110335]  s8 : ffe1f4983c68 s9 : ffe1f4983c00 s10: 
> ffe0117c
> [3.117544]  s11:  t3 : 0007 t4 : 
> 
> [3.124753]  t5 : 663a6b73 t6 : ffe001988479
> [3.130052] status: 00020100 badaddr: ffe001978b0c cause: 
> 0003
> [3.137959] ---[ end trace dbc1129f842ecba3 ]---
>
> Fixes: f1ad1133b18f ("irqchip/sifive-plic: Add support for multiple PLICs")
> Signed-off-by: Greentime Hu 
> ---
>  drivers/irqchip/irq-sifive-plic.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/irqchip/irq-sifive-plic.c 
> b/drivers/irqchip/irq-sifive-plic.c
> index 4048657ece0a..6f432d2a5ceb 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -99,7 +99,7 @@ static inline void plic_irq_toggle(const struct cpumask 
> *mask,
>struct irq_data *d, int enable)
>  {
> int cpu;
> -   struct plic_priv *priv = irq_get_chip_data(d->irq);
> +   struct plic_priv *priv = irq_data_get_irq_chip_data(d);
>
> writel(enable, priv->regs + PRIORITY_BASE + d->hwirq * 
> PRIORITY_PER_ID);
> for_each_cpu(cpu, mask) {
> @@ -115,7 +115,7 @@ static void plic_irq_unmask(struct irq_data *d)
>  {
> struct cpumask amask;
> unsigned int cpu;
> -   struct plic_priv *priv = irq_get_chip_data(d->irq);
> +   struct plic_priv *priv = irq_data_get_irq_chip_data(d);
>
> cpumask_and(&amask, &priv->lmask, cpu_online_mask);
> cpu = cpumask_any_and(irq_data_get_affinity_mask(d),
> @@ -127,7 +127,7 @@ static void plic_irq_unmask(struct irq_data *d)
>
>  static void plic_irq_mask(struct irq_data *d)
>  {
> -   struct plic_priv *priv = irq_get_chip_data(d->irq);
> +   struct plic_priv *priv = irq_data_get_irq_chip_data(d);
>
> plic_irq_toggle(&priv->lmask, d, 0);
>  }
> @@ -138,7 +138,7 @@ static int plic_set_affinity(struct irq_data *d,
>  {
> unsigned int cpu;
> struct cpumask amask;
> -   struct plic_priv *priv = irq_get_chip_data(d->irq);
> +   struct plic_priv *priv = irq_data_get_irq_chip_data(d);
>
> cpumask_and(&amask, &priv->lmask, mask_val);
>
> --
> 2.28.0
>

The PATCH which added multi-PLIC support was not tested
with hierarchical GPIO irqchip. I guess that's why we never saw
this issue previously. Thanks for investigating and fixing this.

Looks good to me.

Reviewed-by: Anup Patel 

Regards,
Anup


Re: [RFC PATCH kernel 1/2] irq: Add reference counting to IRQ mappings

2020-10-29 Thread Alexey Kardashevskiy




On 28/10/2020 03:09, Marc Zyngier wrote:

Hi Alexey,

On 2020-10-27 09:06, Alexey Kardashevskiy wrote:

PCI devices share 4 legacy INTx interrupts from the same PCI host bridge.
Device drivers map/unmap hardware interrupts via irq_create_mapping()/
irq_dispose_mapping(). The problem with that these interrupts are
shared and when performing hot unplug, we need to unmap the interrupt
only when the last device is released.

This reuses already existing irq_desc::kobj for this purpose.
The refcounter is naturally 1 when the descriptor is allocated already;
this adds kobject_get() in places where already existing mapped virq
is returned.


That's quite interesting, as I was about to revive a patch series that
rework the irqdomain subsystem to directly cache irq_desc instead of
raw interrupt numbers. And for that, I needed some form of refcounting...



This reorganizes irq_dispose_mapping() to release the kobj and let
the release callback do the cleanup.

If some driver or platform does its own reference counting, this expects
those parties to call irq_find_mapping() and call irq_dispose_mapping()
for every irq_create_fwspec_mapping()/irq_create_mapping().

Signed-off-by: Alexey Kardashevskiy 
---
 kernel/irq/irqdesc.c   | 35 +++
 kernel/irq/irqdomain.c | 27 +--
 2 files changed, 36 insertions(+), 26 deletions(-)

diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 1a7723604399..dae096238500 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -419,20 +419,39 @@ static struct irq_desc *alloc_desc(int irq, int
node, unsigned int flags,
 return NULL;
 }

+static void delayed_free_desc(struct rcu_head *rhp);
 static void irq_kobj_release(struct kobject *kobj)
 {
 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
+    struct irq_domain *domain;
+    unsigned int virq = desc->irq_data.irq;

-    free_masks(desc);
-    free_percpu(desc->kstat_irqs);
-    kfree(desc);
+    domain = desc->irq_data.domain;
+    if (domain) {
+    if (irq_domain_is_hierarchy(domain)) {
+    irq_domain_free_irqs(virq, 1);


How does this work with hierarchical domains? Each domain should
contribute as a reference on the irq_desc. But if you got here,
it means the refcount has already dropped to 0.

So either there is nothing to free here, or you don't track the
references implied by the hierarchy. I suspect the latter.


This is correct, I did not look at hierarchy yet, looking now...




+    } else {
+    irq_domain_disassociate(domain, virq);
+    irq_free_desc(virq);
+    }
+    }
+
+    /*
+ * We free the descriptor, masks and stat fields via RCU. That
+ * allows demultiplex interrupts to do rcu based management of
+ * the child interrupts.
+ * This also allows us to use rcu in kstat_irqs_usr().
+ */
+    call_rcu(&desc->rcu, delayed_free_desc);
 }

 static void delayed_free_desc(struct rcu_head *rhp)
 {
 struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);

-    kobject_put(&desc->kobj);
+    free_masks(desc);
+    free_percpu(desc->kstat_irqs);
+    kfree(desc);
 }

 static void free_desc(unsigned int irq)
@@ -453,14 +472,6 @@ static void free_desc(unsigned int irq)
  */
 irq_sysfs_del(desc);
 delete_irq_desc(irq);
-
-    /*
- * We free the descriptor, masks and stat fields via RCU. That
- * allows demultiplex interrupts to do rcu based management of
- * the child interrupts.
- * This also allows us to use rcu in kstat_irqs_usr().
- */
-    call_rcu(&desc->rcu, delayed_free_desc);
 }

 static int alloc_descs(unsigned int start, unsigned int cnt, int node,
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index cf8b374b892d..02733ddc321f 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -638,6 +638,7 @@ unsigned int irq_create_mapping(struct irq_domain 
*domain,

 {
 struct device_node *of_node;
 int virq;
+    struct irq_desc *desc;

 pr_debug("irq_create_mapping(0x%p, 0x%lx)\n", domain, hwirq);

@@ -655,7 +656,9 @@ unsigned int irq_create_mapping(struct irq_domain 
*domain,

 /* Check if mapping already exists */
 virq = irq_find_mapping(domain, hwirq);
 if (virq) {
+    desc = irq_to_desc(virq);
 pr_debug("-> existing mapping on virq %d\n", virq);
+    kobject_get(&desc->kobj);


My worry with this is that there is probably a significant amount of
code out there that relies on multiple calls to irq_create_mapping()
with the same parameters not to have any side effects. They would
expect a subsequent irq_dispose_mapping() to drop the translation
altogether, and that's obviously not the case here.

Have you audited the various call sites to see what could break?



The vast majority calls one of irq..create_mapping in init/probe and 
then calls irq_dispose_mapping() right there if probing failed or when 
the driver is unloaded. I could not spot any referenc

[PATCH v5 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml

2020-10-29 Thread Ramuthevar,Vadivel MuruganX
From: Ramuthevar Vadivel Murugan 

Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/

Signed-off-by: Ramuthevar Vadivel Murugan 

---
 .../devicetree/bindings/spi/cadence-quadspi.txt|  67 -
 .../devicetree/bindings/spi/cadence-quadspi.yaml   | 150 +
 2 files changed, 150 insertions(+), 67 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.txt
 create mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml

diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt 
b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
deleted file mode 100644
index 945be7d5b236..
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-* Cadence Quad SPI controller
-
-Required properties:
-- compatible : should be one of the following:
-   Generic default - "cdns,qspi-nor".
-   For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
-   For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".
-- reg : Contains two entries, each of which is a tuple consisting of a
-   physical address and length. The first entry is the address and
-   length of the controller register set. The second entry is the
-   address and length of the QSPI Controller data area.
-- interrupts : Unit interrupt specifier for the controller interrupt.
-- clocks : phandle to the Quad SPI clock.
-- cdns,fifo-depth : Size of the data FIFO in words.
-- cdns,fifo-width : Bus width of the data FIFO in bytes.
-- cdns,trigger-address : 32-bit indirect AHB trigger address.
-
-Optional properties:
-- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
-- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
-  the read data rather than the QSPI clock. Make sure that QSPI return
-  clock is populated on the board before using this property.
-
-Optional subnodes:
-Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
-custom properties:
-- cdns,read-delay : Delay for read capture logic, in clock cycles
-- cdns,tshsl-ns : Delay in nanoseconds for the length that the master
-  mode chip select outputs are de-asserted between
- transactions.
-- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
-  de-activated and the activation of another.
-- cdns,tchsh-ns : Delay in nanoseconds between last bit of current
-  transaction and deasserting the device chip select
- (qspi_n_ss_out).
-- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
-  and first bit transfer.
-- resets   : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names  : Must include either "qspi" and/or "qspi-ocp".
-
-Example:
-
-   qspi: spi@ff705000 {
-   compatible = "cdns,qspi-nor";
-   #address-cells = <1>;
-   #size-cells = <0>;
-   reg = <0xff705000 0x1000>,
- <0xffa0 0x1000>;
-   interrupts = <0 151 4>;
-   clocks = <&qspi_clk>;
-   cdns,is-decoded-cs;
-   cdns,fifo-depth = <128>;
-   cdns,fifo-width = <4>;
-   cdns,trigger-address = <0x>;
-   resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
-   reset-names = "qspi", "qspi-ocp";
-
-   flash0: n25q00@0 {
-   ...
-   cdns,read-delay = <4>;
-   cdns,tshsl-ns = <50>;
-   cdns,tsd2d-ns = <50>;
-   cdns,tchsh-ns = <4>;
-   cdns,tslch-ns = <4>;
-   };
-   };
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml 
b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
new file mode 100644
index ..daf891ade577
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -0,0 +1,150 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/cadence-quadspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Quad SPI controller
+
+maintainers:
+  - Vadivel Murugan 
+
+allOf:
+  - $ref: "spi-controller.yaml#"
+
+properties:
+  compatible:
+oneOf:
+  - items:
+ - const: cdns,qspi-nor
+ - const: ti,k2g-qspi
+ - const: ti,am654-ospi
+ - const: ti,k2g-qspi
+ - const: ti,am654-ospi
+
+  reg:
+items:
+  - description: the controller register set
+  - description: the controller data area
+
+  interrupts:
+maxItems: 1
+
+  clocks:
+maxItems: 1
+
+  cdns,fifo-depth:
+description:
+  Size of the data FIFO in words.
+   

[PATCH v5 01/21] perf arm-spe: Include bitops.h for BIT() macro

2020-10-29 Thread Leo Yan
Include header linux/bitops.h, directly use its BIT() macro and remove
the self defined macros.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 5 +
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 3 +--
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 93e063f22be5..cc18a1e8c212 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -21,10 +22,6 @@
 
 #include "arm-spe-decoder.h"
 
-#ifndef BIT
-#define BIT(n) (1UL << (n))
-#endif
-
 static u64 arm_spe_calc_ip(int index, u64 payload)
 {
u8 *addr = (u8 *)&payload;
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index b94001b756c7..46ddb53a6457 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -8,11 +8,10 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "arm-spe-pkt-decoder.h"
 
-#define BIT(n) (1ULL << (n))
-
 #define NS_FLAGBIT(63)
 #define EL_FLAG(BIT(62) | BIT(61))
 
-- 
2.17.1



Re: [PATCH 0/3] warn and suppress irqflood

2020-10-29 Thread Pingfan Liu
On Wed, Oct 28, 2020 at 12:58:41PM +0100, Thomas Gleixner wrote:
> On Wed, Oct 28 2020 at 14:02, Pingfan Liu wrote:
> > On Tue, Oct 27, 2020 at 3:59 AM Thomas Gleixner  wrote:
> >> Also Liu's patch only works if:
> >>
> >>   1) CONFIG_IRQ_TIME_ACCOUNTING is enabled
> >
> > I wonder whether it can not be a default option or not by the following 
> > method:
> >   DEFINE_STATIC_KEY_FALSE(irqtime_account), and enable it according to
> > a boot param.
> 
> How so?
> 
>   config IRQ_TIME_ACCOUNTING
>   depends on HAVE_IRQ_TIME_ACCOUNTING && 
> !VIRT_CPU_ACCOUNTING_NATIVE
> 
Look closely at the two config value:
-1. HAVE_IRQ_TIME_ACCOUNTING, it is selected by most of the popular arches, and
can be further relaxed.
   It implies sched_clock() is fast enough for sampling. With current code, the
variable sched_clock_irqtime=0 can be used to turn off irqtime accounting on
some arches with slow sched_clock(). And it can be even better by using
DEFINE_STATIC_KEY_FALSE(sched_clock_irqtime)
   So the pre-requirement can be relaxed as "depends on 
!VIRT_CPU_ACCOUNTING_NATIVE"
In case that I can not express clearly, could you have a look at the demo patch?

   That patch _assumes_ that irqtime accounting costs much and is not turned on 
by
default. If turned on, it will cost an extra jmp than current implement.
And I think it is critical to my [1/3] whether this assumption is reasonable.

-2. For VIRT_CPU_ACCOUNTING_NATIVE, it can only be selected by powerpc and ia64

In fact, I have a seperate patch for powerpc with
CONFIG_VIRT_CPU_ACCOUNTING_NATIVE to utilize my [1/3].

---
diff --git a/init/Kconfig b/init/Kconfig
index c944691..16d168b 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -490,7 +490,7 @@ endchoice
 
 config IRQ_TIME_ACCOUNTING
bool "Fine granularity task level IRQ time accounting"
-   depends on HAVE_IRQ_TIME_ACCOUNTING && !VIRT_CPU_ACCOUNTING_NATIVE
+   depends on !VIRT_CPU_ACCOUNTING_NATIVE
help
  Select this option to enable fine granularity task irq time
  accounting. This is done by reading a timestamp on each
diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c
index 5a55d23..3ab7e1d 100644
--- a/kernel/sched/cputime.c
+++ b/kernel/sched/cputime.c
@@ -19,7 +19,7 @@
  */
 DEFINE_PER_CPU(struct irqtime, cpu_irqtime);
 
-static int sched_clock_irqtime;
+DEFINE_STATIC_KEY_FALSE(sched_clock_irqtime);
 
 void enable_sched_clock_irqtime(void)
 {
@@ -49,13 +49,14 @@ static void irqtime_account_delta(struct irqtime *irqtime, 
u64 delta,
  */
 void irqtime_account_irq(struct task_struct *curr)
 {
-   struct irqtime *irqtime = this_cpu_ptr(&cpu_irqtime);
+   struct irqtime *irqtime;
s64 delta;
int cpu;
 
-   if (!sched_clock_irqtime)
+   if (static_branch_unlikely(&sched_clock_irqtime))
return;
 
+   irqtime = this_cpu_ptr(&cpu_irqtime);
cpu = smp_processor_id();
delta = sched_clock_cpu(cpu) - irqtime->irq_start_time;
irqtime->irq_start_time += delta;
@@ -84,16 +85,7 @@ static u64 irqtime_tick_accounted(u64 maxtime)
return delta;
 }
 
-#else /* CONFIG_IRQ_TIME_ACCOUNTING */
-
-#define sched_clock_irqtime(0)
-
-static u64 irqtime_tick_accounted(u64 dummy)
-{
-   return 0;
-}
-
-#endif /* !CONFIG_IRQ_TIME_ACCOUNTING */
+#endif
 
 static inline void task_group_account_field(struct task_struct *p, int index,
u64 tmp)
@@ -475,7 +467,7 @@ void account_process_tick(struct task_struct *p, int 
user_tick)
if (vtime_accounting_enabled_this_cpu())
return;
 
-   if (sched_clock_irqtime) {
+   if (static_branch_unlikely(&sched_clock_irqtime))
irqtime_account_process_tick(p, user_tick, 1);
return;
}
@@ -504,7 +496,7 @@ void account_idle_ticks(unsigned long ticks)
 {
u64 cputime, steal;
 
-   if (sched_clock_irqtime) {
+   if (static_branch_unlikely(&sched_clock_irqtime))
irqtime_account_idle_ticks(ticks);
return;
}
-- 
2.7.5

[...]
> +
> +static int __init irqstorm_setup(char *arg)
> +{
> + int res = kstrtoul(arg, 0, &irqstorm_limit);
> +
> + if (!res) {
> + pr_info("Interrupt storm detector enabled. Limit=%lu / s\n",
> + irqstorm_limit);
> + }
> + return !!res;
> +}
> +__setup("irqstorm_limit", irqstorm_setup);

This configuration independent method looks appealing. And I am glad to have a 
try.

But irqstorm_limit may be a hard choice. Maybe by formula:
instruction-percpu-per-second / insn num of irq failed path ?  It is hard to
estimate "instruction-percpu-per-second".

Thanks,
Pingfan


[PATCH] power: supply: olpc_battery: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SIMPLE_DEV_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 arch/x86/platform/olpc/olpc-xo15-sci.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/platform/olpc/olpc-xo15-sci.c 
b/arch/x86/platform/olpc/olpc-xo15-sci.c
index 85f4638764d6..716eefd735a4 100644
--- a/arch/x86/platform/olpc/olpc-xo15-sci.c
+++ b/arch/x86/platform/olpc/olpc-xo15-sci.c
@@ -192,7 +192,6 @@ static int xo15_sci_remove(struct acpi_device *device)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int xo15_sci_resume(struct device *dev)
 {
/* Enable all EC events */
@@ -204,7 +203,6 @@ static int xo15_sci_resume(struct device *dev)
 
return 0;
 }
-#endif
 
 static SIMPLE_DEV_PM_OPS(xo15_sci_pm, NULL, xo15_sci_resume);
 
-- 
2.28.0



linux-next: build failure after merge of the akpm-current tree

2020-10-29 Thread Stephen Rothwell
Hi all,

After merging the akpm-current tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:

lib/math/div64.c: In function 'mul_u64_u64_div_u64':
lib/math/div64.c:202:6: error: implicit declaration of function 'ilog2' 
[-Werror=implicit-function-declaration]
  202 |  if (ilog2(a) + ilog2(b) > 62) {
  |  ^

Caused by commit

  4ec993a18ff6 ("kernel.h: Split out mathematical helpers")

I have applied the following patch for today:

From: Stephen Rothwell 
Date: Thu, 29 Oct 2020 15:03:58 +1100
Subject: [PATCH] kernel.h: Split out mathematical helpers fix

Signed-off-by: Stephen Rothwell 
---
 lib/math/div64.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/math/div64.c b/lib/math/div64.c
index dcc826c40ca1..064d68a5391a 100644
--- a/lib/math/div64.c
+++ b/lib/math/div64.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* Not needed on 64bit architectures */
 #if BITS_PER_LONG == 32
-- 
2.28.0

-- 
Cheers,
Stephen Rothwell


pgprkWI50y3Fr.pgp
Description: OpenPGP digital signature


Re: [PATCH 0/4] Add sustainable OPP concept

2020-10-29 Thread Viresh Kumar
On 28-10-20, 14:08, Lukasz Luba wrote:
> Hi all,
> 
> This patch set introduces a concept of sustainable OPP, which then can be used
> by kernel frameworks or governors for estimating system sustainable system
> state. This kind of estimation is done e.g. in thermal governor Intelligent
> Power Allocation (IPA), which calculates sustainable power of the whole system
> and then derives some coefficients for internal algorithm.
> 
> The patch set introduces a new DT bindings 'opp-sustainable', with parsing
> code. It also adds a function (in patch 3/4) which allows device drivers to 
> set
> directly the sustainable OPP. This is helpful when the device drivers populate
> the OPP table by themself (example in patch 4/4).
> 

Can we please have some more information about this ? What does the
sustainable OPP mean ? How will platform guys know or learn about this
? How we are going to use it finally ? What does it have to do with
temperature of the SoC or the thermal affects, etc.

-- 
viresh


Re: For review: seccomp_user_notif(2) manual page [v2]

2020-10-29 Thread Jann Horn
On Thu, Oct 29, 2020 at 3:04 AM Tycho Andersen  wrote:
> On Thu, Oct 29, 2020 at 02:42:58AM +0100, Jann Horn wrote:
> > On Mon, Oct 26, 2020 at 10:55 AM Michael Kerrisk (man-pages)
> >  wrote:
> > >static bool
> > >getTargetPathname(struct seccomp_notif *req, int notifyFd,
> > >  char *path, size_t len)
> > >{
> > >char procMemPath[PATH_MAX];
> > >
> > >snprintf(procMemPath, sizeof(procMemPath), "/proc/%d/mem", 
> > > req->pid);
> > >
> > >int procMemFd = open(procMemPath, O_RDONLY);
> > >if (procMemFd == -1)
> > >errExit("\tS: open");
> > >
> > >/* Check that the process whose info we are accessing is still 
> > > alive.
> > >   If the SECCOMP_IOCTL_NOTIF_ID_VALID operation (performed
> > >   in checkNotificationIdIsValid()) succeeds, we know that the
> > >   /proc/PID/mem file descriptor that we opened corresponds to 
> > > the
> > >   process for which we received a notification. If that 
> > > process
> > >   subsequently terminates, then read() on that file descriptor
> > >   will return 0 (EOF). */
> > >
> > >checkNotificationIdIsValid(notifyFd, req->id);
> > >
> > >/* Read bytes at the location containing the pathname argument
> > >   (i.e., the first argument) of the mkdir(2) call */
> > >
> > >ssize_t nread = pread(procMemFd, path, len, req->data.args[0]);
> > >if (nread == -1)
> > >errExit("pread");
> >
> > As discussed at
> > ,
> > we need to re-check checkNotificationIdIsValid() after reading remote
> > memory but before using the read value in any way. Otherwise, the
> > syscall could in the meantime get interrupted by a signal handler, the
> > signal handler could return, and then the function that performed the
> > syscall could free() allocations or return (thereby freeing buffers on
> > the stack).
> >
> > In essence, this pread() is (unavoidably) a potential use-after-free
> > read; and to make that not have any security impact, we need to check
> > whether UAF read occurred before using the read value. This should
> > probably be called out elsewhere in the manpage, too...
> >
> > Now, of course, **reading** is the easy case. The difficult case is if
> > we have to **write** to the remote process... because then we can't
> > play games like that. If we write data to a freed pointer, we're
> > screwed, that's it. (And for somewhat unrelated bonus fun, consider
> > that /proc/$pid/mem is originally intended for process debugging,
> > including installing breakpoints, and will therefore happily write
> > over "readonly" private mappings, such as typical mappings of
> > executable code.)
> >
> > So, h... I guess if anyone wants to actually write memory back to
> > the target process, we'd better come up with some dedicated API for
> > that, using an ioctl on the seccomp fd that magically freezes the
>
> By freeze here you mean a killable wait instead of an interruptible
> wait, right?

Nope, nonkillable.

Consider the case of vfork(), where a target process does something like this:

void spawn_executable(char **argv, char **envv) {
  pid_t child = vfork();
  if (child == 0) {
char path[1000];
sprintf(path, ...);
execve(path, argv, envv);
  }
}

and the seccomp notifier wants to look at the execve() path (as a
somewhat silly example). The child process is just borrowing the
parent's stack, and as soon as the child either gets far enough into
execve() or dies, the parent continues using that stack. So keeping
the child in killable sleep would not be enough to prevent reuse of
the child's stack.


But conceptually that's not really a big problem - we already have a
way to force the target task to stay inside the seccomp code no matter
if it gets SIGKILLed or whatever, and that is to take the notify_lock.
When the target task wakes up and wants to continue executing, it has
to first get through mutex_lock(&match->notify_lock) - and that will
always block until the lock is free. So we could e.g. do something
like:

 - Grab references to the source pages in the supervisor's address
space with get_user_pages_fast().
 - Take mmap_sem on the target.
 - Grab references to pages in the relevant range with pin_user_pages_remote().
 - Drop the mmap_sem.
 - Take the notify_lock.
 - Recheck whether the notification with the right ID is still there.
 - Copy data from the pinned source pages to the pinned target pages.
 - Drop the notify_lock.
 - Drop the page references.

and this way we would still guarantee that the target process would
only be blocked in noninterruptible sleep for a small amount of time
(and would not be indirectly blocked on sleeping operations through
the mutex). It'd be pretty straightforward, I think. But

Re: [External] Re: [PATCH v2 07/19] mm/hugetlb: Free the vmemmap pages associated with each hugetlb page

2020-10-29 Thread Muchun Song
On Thu, Oct 29, 2020 at 7:42 AM Mike Kravetz  wrote:
>
> On 10/26/20 7:51 AM, Muchun Song wrote:
> > When we allocate a hugetlb page from the buddy, we should free the
> > unused vmemmap pages associated with it. We can do that in the
> > prep_new_huge_page().
> >
> > Signed-off-by: Muchun Song 
> > ---
> >  arch/x86/include/asm/hugetlb.h  |   7 +
> >  arch/x86/include/asm/pgtable_64_types.h |   8 +
> >  include/linux/hugetlb.h |   7 +
> >  mm/hugetlb.c| 190 
> >  4 files changed, 212 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/hugetlb.h b/arch/x86/include/asm/hugetlb.h
> > index f5e882f999cd..7c3eb60c2198 100644
> > --- a/arch/x86/include/asm/hugetlb.h
> > +++ b/arch/x86/include/asm/hugetlb.h
> > @@ -4,10 +4,17 @@
> >
> >  #include 
> >  #include 
> > +#include 
> >
> >  #ifdef CONFIG_HUGETLB_PAGE_FREE_VMEMMAP
> >  #define VMEMMAP_HPAGE_SHIFT  PMD_SHIFT
> >  #define arch_vmemmap_support_huge_mapping()  boot_cpu_has(X86_FEATURE_PSE)
> > +
> > +#define vmemmap_pmd_huge vmemmap_pmd_huge
> > +static inline bool vmemmap_pmd_huge(pmd_t *pmd)
> > +{
> > + return pmd_large(*pmd);
> > +}
> >  #endif
> >
> >  #define hugepages_supported() boot_cpu_has(X86_FEATURE_PSE)
> > diff --git a/arch/x86/include/asm/pgtable_64_types.h 
> > b/arch/x86/include/asm/pgtable_64_types.h
> > index 52e5f5f2240d..bedbd2e7d06c 100644
> > --- a/arch/x86/include/asm/pgtable_64_types.h
> > +++ b/arch/x86/include/asm/pgtable_64_types.h
> > @@ -139,6 +139,14 @@ extern unsigned int ptrs_per_p4d;
> >  # define VMEMMAP_START   __VMEMMAP_BASE_L4
> >  #endif /* CONFIG_DYNAMIC_MEMORY_LAYOUT */
> >
> > +/*
> > + * VMEMMAP_SIZE - allows the whole linear region to be covered by
> > + *a struct page array.
> > + */
> > +#define VMEMMAP_SIZE (1UL << (__VIRTUAL_MASK_SHIFT - PAGE_SHIFT - \
> > +  1 + ilog2(sizeof(struct page
> > +#define VMEMMAP_END  (VMEMMAP_START + VMEMMAP_SIZE)
> > +
> >  #define VMALLOC_END  (VMALLOC_START + (VMALLOC_SIZE_TB << 40) - 1)
> >
> >  #define MODULES_VADDR(__START_KERNEL_map + 
> > KERNEL_IMAGE_SIZE)
> > diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
> > index ace304a6196c..919f47d77117 100644
> > --- a/include/linux/hugetlb.h
> > +++ b/include/linux/hugetlb.h
> > @@ -601,6 +601,13 @@ static inline bool 
> > arch_vmemmap_support_huge_mapping(void)
> >  }
> >  #endif
> >
> > +#ifndef vmemmap_pmd_huge
>
> Let's add
> #define vmemmap_pmd_huge vmemmap_pmd_huge
> just in case code gets moved around in header file.

OK, will do.

>
> > +static inline bool vmemmap_pmd_huge(pmd_t *pmd)
> > +{
> > + return pmd_huge(*pmd);
> > +}
> > +#endif
> > +
> >  #ifndef VMEMMAP_HPAGE_SHIFT
> >  #define VMEMMAP_HPAGE_SHIFT  PMD_SHIFT
> >  #endif
> > diff --git a/mm/hugetlb.c b/mm/hugetlb.c
> > index d6ae9b6876be..aa012d603e06 100644
> > --- a/mm/hugetlb.c
> > +++ b/mm/hugetlb.c
> > @@ -1293,10 +1293,20 @@ static inline void 
> > destroy_compound_gigantic_page(struct page *page,
> >  #endif
> >
> >  #ifdef CONFIG_HUGETLB_PAGE_FREE_VMEMMAP
> > +#include 
> > +
> >  #define RESERVE_VMEMMAP_NR   2U
> > +#define RESERVE_VMEMMAP_SIZE (RESERVE_VMEMMAP_NR << PAGE_SHIFT)
>
> Since RESERVE_VMEMMAP_SIZE is not used here, perhaps it should be added
> in the patch where it is first used.

Will do.

>
> >
> >  #define page_huge_pte(page)  ((page)->pmd_huge_pte)
> >
> > +#define vmemmap_hpage_addr_end(addr, end)\
> > +({   \
> > + unsigned long __boundary;   \
> > + __boundary = ((addr) + VMEMMAP_HPAGE_SIZE) & VMEMMAP_HPAGE_MASK;\
> > + (__boundary - 1 < (end) - 1) ? __boundary : (end);  \
> > +})
> > +
> >  static inline unsigned int nr_free_vmemmap(struct hstate *h)
> >  {
> >   return h->nr_free_vmemmap_pages;
> > @@ -1416,6 +1426,181 @@ static void __init hugetlb_vmemmap_init(struct 
> > hstate *h)
> >   pr_info("HugeTLB: can free %d vmemmap pages for %s\n",
> >   h->nr_free_vmemmap_pages, h->name);
> >  }
> > +
> > +static inline spinlock_t *vmemmap_pmd_lockptr(pmd_t *pmd)
> > +{
> > + static DEFINE_SPINLOCK(pgtable_lock);
> > +
> > + return &pgtable_lock;
> > +}
>
> This is just a global lock.  Correct?  And hugetlb specific?

Yes, it is a global lock. Originally, I wanted to use the pmd lock(e.g.
pmd_lockptr()). But we need to allocate memory for the spinlock and
initialize it when ALLOC_SPLIT_PTLOCKS. It may increase the
complexity.

And I think that here alloc/free hugetlb pages is not a frequent operation.
So I finally use a global lock. Maybe it is enough.

>
> It should be OK as the page table entries for huegtlb pages will not
> overlap with other entries.

Does "hugetlb specific" mean the pmd lock? or per hugetlb lock?
If it is

Re: [f2fs-dev] [PATCH v5 2/2] f2fs: add F2FS_IOC_SET_COMPRESS_OPTION ioctl

2020-10-29 Thread Daeho Jeong
f2fs_cops is a static variable. Do you wanna change this to global
variable (extern)?

2020년 10월 29일 (목) 오후 4:29, Chao Yu 님이 작성:
>
> On 2020/10/29 12:15, Daeho Jeong wrote:
> > From: Daeho Jeong 
> >
> > Added a new F2FS_IOC_SET_COMPRESS_OPTION ioctl to change file
> > compression option of a file.
> >
> > struct f2fs_comp_option {
> >  u8 algorithm; => compression algorithm
> >=> 0:lzo, 1:lz4, 2:zstd, 3:lzorle
> >  u8 log_cluster_size;  => log scale cluster size
> >=> 2 ~ 8
> > };
> >
> > struct f2fs_comp_option option;
> >
> > option.algorithm = 1;
> > option.log_cluster_size = 7;
> >
> > ioctl(fd, F2FS_IOC_SET_COMPRESS_OPTION, &option);
> >
> > Signed-off-by: Daeho Jeong 
> > ---
> >
> > v5: allowed to set algorithm which is not currently enabled by kernel
> > v4: changed commit message.
> > v3: changed the error number more specific.
> >  folded in fix for build breakage reported by kernel test robot
> >   and Dan Carpenter .
> > v2: added ioctl description.
> > ---
> >   fs/f2fs/compress.c |  5 +
> >   fs/f2fs/f2fs.h |  7 ++
> >   fs/f2fs/file.c | 54 ++
> >   3 files changed, 66 insertions(+)
> >
> > diff --git a/fs/f2fs/compress.c b/fs/f2fs/compress.c
> > index 7895186cc765..816d7adc914c 100644
> > --- a/fs/f2fs/compress.c
> > +++ b/fs/f2fs/compress.c
> > @@ -514,6 +514,11 @@ bool f2fs_is_compress_backend_ready(struct inode 
> > *inode)
> >   return f2fs_cops[F2FS_I(inode)->i_compress_algorithm];
> >   }
> >
> > +bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)
> > +{
> > + return algorithm < COMPRESS_MAX && f2fs_cops[algorithm] != NULL;
> > +}
> > +
> >   static mempool_t *compress_page_pool;
> >   static int num_compress_pages = 512;
> >   module_param(num_compress_pages, uint, 0444);
> > diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
> > index a33c90cf979b..cc38afde6c04 100644
> > --- a/fs/f2fs/f2fs.h
> > +++ b/fs/f2fs/f2fs.h
> > @@ -435,6 +435,8 @@ static inline bool __has_cursum_space(struct 
> > f2fs_journal *journal,
> >   struct f2fs_sectrim_range)
> >   #define F2FS_IOC_GET_COMPRESS_OPTION_IOR(F2FS_IOCTL_MAGIC, 21,
> >   \
> >   struct f2fs_comp_option)
> > +#define F2FS_IOC_SET_COMPRESS_OPTION _IOW(F2FS_IOCTL_MAGIC, 22,  \
> > + struct f2fs_comp_option)
> >
> >   /*
> >* should be same as XFS_IOC_GOINGDOWN.
> > @@ -3915,6 +3917,7 @@ bool f2fs_compress_write_end(struct inode *inode, 
> > void *fsdata,
> >   int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool 
> > lock);
> >   void f2fs_compress_write_end_io(struct bio *bio, struct page *page);
> >   bool f2fs_is_compress_backend_ready(struct inode *inode);
> > +bool f2fs_is_compress_algorithm_ready(unsigned char algorithm);
> >   int f2fs_init_compress_mempool(void);
> >   void f2fs_destroy_compress_mempool(void);
> >   void f2fs_decompress_pages(struct bio *bio, struct page *page, bool 
> > verity);
> > @@ -3945,6 +3948,10 @@ static inline bool 
> > f2fs_is_compress_backend_ready(struct inode *inode)
> >   /* not support compression */
> >   return false;
> >   }
> > +static inline bool f2fs_is_compress_algorithm_ready(unsigned char 
> > algorithm)
> > +{
> > + return false;
> > +}
> >   static inline struct page *f2fs_compress_control_page(struct page *page)
> >   {
> >   WARN_ON_ONCE(1);
> > diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
> > index 8922ab191a9d..a0f31d8ebcfd 100644
> > --- a/fs/f2fs/file.c
> > +++ b/fs/f2fs/file.c
> > @@ -3963,6 +3963,57 @@ static int f2fs_ioc_get_compress_option(struct file 
> > *filp, unsigned long arg)
> >   return 0;
> >   }
> >
> > +static int f2fs_ioc_set_compress_option(struct file *filp, unsigned long 
> > arg)
> > +{
> > + struct inode *inode = file_inode(filp);
> > + struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
> > + struct f2fs_comp_option option;
> > + int ret = 0;
> > +
> > + if (!f2fs_sb_has_compression(sbi))
> > + return -EOPNOTSUPP;
> > +
> > + if (!(filp->f_mode & FMODE_WRITE))
> > + return -EBADF;
> > +
> > + if (copy_from_user(&option, (struct f2fs_comp_option __user *)arg,
> > + sizeof(option)))
> > + return -EFAULT;
> > +
> > + if (!f2fs_compressed_file(inode) ||
> > + option.log_cluster_size < MIN_COMPRESS_LOG_SIZE ||
> > + option.log_cluster_size > MAX_COMPRESS_LOG_SIZE ||
> > + option.algorithm >= COMPRESS_MAX)
> > + return -EINVAL;
> > +
> > + file_start_write(filp);
> > + inode_lock(inode);
> > +
> > + if (f2fs_is_mmap_file(inode) || get_dirty_pages(inode)) {
> > + ret = -EBUSY;
> > + goto out;
> > + }
> > +
> > + if (inode->i_size

[PATCH 0/1] x86/speculation: Allow IBPB to be conditionally enabled on CPUs with always-on STIBP

2020-10-29 Thread Anand K Mistry
When attempting to do some performance testing of IBPB on and AMD
platform, I noticed the IBPB instruction was never being issued, even
though it was conditionally on and various seccomp protected processes
were force enabling it. Turns out, on those AMD CPUs, STIBP is set to
always-on and this was causing an early-out on the prctl() which turns
off IB speculation. Here is my attempt to fix it.

I'm hoping someone that understands this better than me can explain why
I'm wrong.


Anand K Mistry (1):
  x86/speculation: Allow IBPB to be conditionally enabled on CPUs with
always-on STIBP

 arch/x86/kernel/cpu/bugs.c | 41 +-
 1 file changed, 23 insertions(+), 18 deletions(-)

-- 
2.29.1.341.ge80a0c044ae-goog



[PATCH v5 02/21] perf arm-spe: Fix a typo in comment

2020-10-29 Thread Leo Yan
Fix a typo: s/iff/if.

Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 46ddb53a6457..7c7b5eb09fba 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -142,7 +142,7 @@ static int arm_spe_get_events(const unsigned char *buf, 
size_t len,
 
/* we use index to identify Events with a less number of
 * comparisons in arm_spe_pkt_desc(): E.g., the LLC-ACCESS,
-* LLC-REFILL, and REMOTE-ACCESS events are identified iff
+* LLC-REFILL, and REMOTE-ACCESS events are identified if
 * index > 1.
 */
packet->index = ret - 1;
-- 
2.17.1



[PATCH v12 05/10] usb: typec: tcpci: frs sourcing vbus callback

2020-10-29 Thread Badhri Jagan Sridharan
During FRS hardware autonomously starts to source vbus. Provide
callback to perform chip specific operations.

Signed-off-by: Badhri Jagan Sridharan 
Reviewed-by: Heikki Krogerus 
---
v9 is the first version of this patch in the series. Added to fix
occasional bug of vbus turning back on when disconnecting the FRS accessory
after disconnect. No changes since v9.

Changes since v10:
Added Reviewed-by: Heikki Krogerus

Changes since v11:
none
---
 drivers/usb/typec/tcpm/tcpci.c | 9 +
 drivers/usb/typec/tcpm/tcpci.h | 4 
 2 files changed, 13 insertions(+)

diff --git a/drivers/usb/typec/tcpm/tcpci.c b/drivers/usb/typec/tcpm/tcpci.c
index f9f0af64da5f..f91688e43991 100644
--- a/drivers/usb/typec/tcpm/tcpci.c
+++ b/drivers/usb/typec/tcpm/tcpci.c
@@ -284,6 +284,14 @@ static int tcpci_enable_frs(struct tcpc_dev *dev, bool 
enable)
return ret;
 }
 
+static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev)
+{
+   struct tcpci *tcpci = tcpc_to_tcpci(dev);
+
+   if (tcpci->data->frs_sourcing_vbus)
+   tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data);
+}
+
 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable)
 {
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
@@ -628,6 +636,7 @@ struct tcpci *tcpci_register_port(struct device *dev, 
struct tcpci_data *data)
tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
tcpci->tcpc.set_bist_data = tcpci_set_bist_data;
tcpci->tcpc.enable_frs = tcpci_enable_frs;
+   tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus;
 
err = tcpci_parse_config(tcpci);
if (err < 0)
diff --git a/drivers/usb/typec/tcpm/tcpci.h b/drivers/usb/typec/tcpm/tcpci.h
index 5ef07a56d67a..b418fe11b527 100644
--- a/drivers/usb/typec/tcpm/tcpci.h
+++ b/drivers/usb/typec/tcpm/tcpci.h
@@ -143,6 +143,9 @@
 /*
  * @TX_BUF_BYTE_x_hidden
  * optional; Set when TX_BUF_BYTE_x can only be accessed through 
I2C_WRITE_BYTE_COUNT.
+ * @frs_sourcing_vbus:
+ * Optional; Callback to perform chip specific operations when FRS
+ * is sourcing vbus.
  */
 struct tcpci;
 struct tcpci_data {
@@ -154,6 +157,7 @@ struct tcpci_data {
int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
  enum typec_cc_status cc);
int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool 
source, bool sink);
+   void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data);
 };
 
 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data);
-- 
2.29.1.341.ge80a0c044ae-goog



Re: [PATCH v6 0/4] Add support for mv88e6393x family of Marvell

2020-10-29 Thread Marek Behun
On Thu, 29 Oct 2020 15:40:25 +1000
Pavana Sharma  wrote:

> Updated patchset.
> 
> Split the patch to separate mv88e6393 changes from refactoring
> serdes_get_lane.
> Update Documentation before adding new mode.

Pavana, the patch adding support for Amethyst has to be the last in the
series. The patch refactoring the serdes_get_lane code must go before
the patch adding the support for the new family, because Amethyst
already needs this functionality.



Re: [PATCH v2 net] net: sch_generic: aviod concurrent reset and enqueue op for lockless qdisc

2020-10-29 Thread Yunsheng Lin
On 2020/9/18 3:26, Cong Wang wrote:
> On Fri, Sep 11, 2020 at 1:13 AM Yunsheng Lin  wrote:
>>
>> On 2020/9/11 4:07, Cong Wang wrote:
>>> On Tue, Sep 8, 2020 at 4:06 AM Yunsheng Lin  wrote:

 Currently there is concurrent reset and enqueue operation for the
 same lockless qdisc when there is no lock to synchronize the
 q->enqueue() in __dev_xmit_skb() with the qdisc reset operation in
 qdisc_deactivate() called by dev_deactivate_queue(), which may cause
 out-of-bounds access for priv->ring[] in hns3 driver if user has
 requested a smaller queue num when __dev_xmit_skb() still enqueue a
 skb with a larger queue_mapping after the corresponding qdisc is
 reset, and call hns3_nic_net_xmit() with that skb later.

 Reused the existing synchronize_net() in dev_deactivate_many() to
 make sure skb with larger queue_mapping enqueued to old qdisc(which
 is saved in dev_queue->qdisc_sleeping) will always be reset when
 dev_reset_queue() is called.

 Fixes: 6b3ba9146fe6 ("net: sched: allow qdiscs to handle locking")
 Signed-off-by: Yunsheng Lin 
 ---
 ChangeLog V2:
 Reuse existing synchronize_net().
 ---
  net/sched/sch_generic.c | 48 
 +---
  1 file changed, 33 insertions(+), 15 deletions(-)

 diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c
 index 265a61d..54c4172 100644
 --- a/net/sched/sch_generic.c
 +++ b/net/sched/sch_generic.c
 @@ -1131,24 +1131,10 @@ EXPORT_SYMBOL(dev_activate);

  static void qdisc_deactivate(struct Qdisc *qdisc)
  {
 -   bool nolock = qdisc->flags & TCQ_F_NOLOCK;
 -
 if (qdisc->flags & TCQ_F_BUILTIN)
 return;
 -   if (test_bit(__QDISC_STATE_DEACTIVATED, &qdisc->state))
 -   return;
 -
 -   if (nolock)
 -   spin_lock_bh(&qdisc->seqlock);
 -   spin_lock_bh(qdisc_lock(qdisc));

 set_bit(__QDISC_STATE_DEACTIVATED, &qdisc->state);
 -
 -   qdisc_reset(qdisc);
 -
 -   spin_unlock_bh(qdisc_lock(qdisc));
 -   if (nolock)
 -   spin_unlock_bh(&qdisc->seqlock);
  }

  static void dev_deactivate_queue(struct net_device *dev,
 @@ -1165,6 +1151,30 @@ static void dev_deactivate_queue(struct net_device 
 *dev,
 }
  }

 +static void dev_reset_queue(struct net_device *dev,
 +   struct netdev_queue *dev_queue,
 +   void *_unused)
 +{
 +   struct Qdisc *qdisc;
 +   bool nolock;
 +
 +   qdisc = dev_queue->qdisc_sleeping;
 +   if (!qdisc)
 +   return;
 +
 +   nolock = qdisc->flags & TCQ_F_NOLOCK;
 +
 +   if (nolock)
 +   spin_lock_bh(&qdisc->seqlock);
 +   spin_lock_bh(qdisc_lock(qdisc));
>>>
>>>
>>> I think you do not need this lock for lockless one.
>>
>> It seems so.
>> Maybe another patch to remove qdisc_lock(qdisc) for lockless
>> qdisc?
> 
> Yeah, but not sure if we still want this lockless qdisc any more,
> it brings more troubles than gains.
> 
>>
>>
>>>
 +
 +   qdisc_reset(qdisc);
 +
 +   spin_unlock_bh(qdisc_lock(qdisc));
 +   if (nolock)
 +   spin_unlock_bh(&qdisc->seqlock);
 +}
 +
  static bool some_qdisc_is_busy(struct net_device *dev)
  {
 unsigned int i;
 @@ -1213,12 +1223,20 @@ void dev_deactivate_many(struct list_head *head)
 dev_watchdog_down(dev);
 }

 -   /* Wait for outstanding qdisc-less dev_queue_xmit calls.
 +   /* Wait for outstanding qdisc-less dev_queue_xmit calls or
 +* outstanding qdisc enqueuing calls.
  * This is avoided if all devices are in dismantle phase :
  * Caller will call synchronize_net() for us
  */
 synchronize_net();

 +   list_for_each_entry(dev, head, close_list) {
 +   netdev_for_each_tx_queue(dev, dev_reset_queue, NULL);
 +
 +   if (dev_ingress_queue(dev))
 +   dev_reset_queue(dev, dev_ingress_queue(dev), NULL);
 +   }
 +
 /* Wait for outstanding qdisc_run calls. */
 list_for_each_entry(dev, head, close_list) {
 while (some_qdisc_is_busy(dev)) {
>>>
>>> Do you want to reset before waiting for TX action?
>>>
>>> I think it is safer to do it after, at least prior to commit 759ae57f1b
>>> we did after.
>>
>> The reference to the txq->qdisc is always protected by RCU, so the 
>> synchronize_net()
>> should be enought to ensure there is no skb enqueued to the old qdisc that 
>> is saved
>> in the dev_queue->qdisc_sleeping, because __dev_queue_xmit can only see the 
>> new qdisc
>> after synchronize_ne

Re: [PATCH RFC v2 4/4] Documentation: Change doc for split_lock_detect parameter

2020-10-29 Thread Randy Dunlap
On 10/28/20 1:28 PM, Fenghua Yu wrote:
> Since #DB for bus lock detect changes the split_lock_detect parameter,
> update the documentation for the changes.
> 
> Signed-off-by: Fenghua Yu 
> Reviewed-by: Tony Luck 
> ---
>  .../admin-guide/kernel-parameters.txt | 47 +++
>  1 file changed, 39 insertions(+), 8 deletions(-)
> 
> diff --git a/Documentation/admin-guide/kernel-parameters.txt 
> b/Documentation/admin-guide/kernel-parameters.txt
> index 526d65d8573a..51312484c2b6 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -5044,27 +5044,58 @@
>   spia_peddr=
>  
>   split_lock_detect=
> - [X86] Enable split lock detection
> + [X86] Enable split lock detection or bus lock detection
>  
>   When enabled (and if hardware support is present), 
> atomic
>   instructions that access data across cache line
> - boundaries will result in an alignment check exception.
> + boundaries will result in an alignment check exception
> + for split lock detection or an debug exception for
> + bus lock detection.
>  
>   off - not enabled
>  
> - warn- the kernel will emit rate limited warnings
> -   about applications triggering the #AC
> -   exception. This mode is the default on CPUs
> -   that supports split lock detection.
> + warn- Default mode.
>  
> - fatal   - the kernel will send SIGBUS to applications
> -   that trigger the #AC exception.
> +   If split lock detection is enabled in
> +   hardware, the kernel will emit rate limited
> +   warnings about applications triggering the #AC
> +   exception.
> +
> +   If bus lock detection is enabled in hardware,
> +   the kernel will emit rate limited warnings
> +   about applications triggering the #DB
> +   exception.
> +
> +   Default behavior is from bus lock detection
> +   if both features are enabled in hardware.
> +
> + fatal   - If split lock detection is enabled in
> +   hardware, the kernel will send SIGBUS to
> +   applications that trigger the #AC exception.
> +
> +   If bus lock detection is enabled in hardware,
> +   the kernel will send SIGBUS to application
> +   that trigger the #DB exception.
> +
> +   Default behavior is from split lock detection
> +   if both are enabled in hardware.
> +

Hi,
This appears to have quite a bit of duplicated lines

> + ratelimit:N
> +   Set rate limit to N bus locks per second
> +   for bus lock detection. 0 < N <= HZ/2 and
> +   N is approximate. Only applied to non root
> +   user.
> +
> +   N/A for split lock detection.
>  
>   If an #AC exception is hit in the kernel or in
>   firmware (i.e. not while executing in user mode)
>   the kernel will oops in either "warn" or "fatal"
>   mode.
>  
> + #DB exception for bus lock is triggered only when
> + CPL > 0.
> +
>   srbds=  [X86,INTEL]
>   Control the Special Register Buffer Data Sampling
>   (SRBDS) mitigation.
> 


-- 
~Randy



[PATCH v5 06/21] perf arm-spe: Refactor printing string to buffer

2020-10-29 Thread Leo Yan
When outputs strings to the decoding buffer with function snprintf(),
SPE decoder needs to detects if any error returns from snprintf() and if
so needs to directly bail out.  If snprintf() returns success, it needs
to update buffer pointer and reduce the buffer length so can continue to
output the next string into the consequent memory space.

This complex logics are spreading in the function arm_spe_pkt_desc() so
there has many duplicate codes for handling error detecting, increment
buffer pointer and decrement buffer size.

To avoid the duplicate code, this patch introduces a new helper function
arm_spe_pkt_snprintf() which is used to wrap up the complex logics, and
it's used by the caller arm_spe_pkt_desc(); if printing buffer is called
for multiple times in a flow, the error is a cumulative value and simply
returns its final value.

This patch also moves the variable 'blen' as the function's local
variable, this allows to remove the unnecessary braces and improve the
readability.

Suggested-by: Dave Martin 
Signed-off-by: Leo Yan 
Reviewed-by: Andre Przywara 
---
 .../arm-spe-decoder/arm-spe-pkt-decoder.c | 263 --
 1 file changed, 113 insertions(+), 150 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 04fd7fd7c15f..9147b88ae00c 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "arm-spe-pkt-decoder.h"
 
@@ -258,192 +259,154 @@ int arm_spe_get_packet(const unsigned char *buf, size_t 
len,
return ret;
 }
 
+static int arm_spe_pkt_snprintf(int *err, char **buf_p, size_t *blen,
+   const char *fmt, ...)
+{
+   va_list ap;
+   int ret;
+
+   va_start(ap, fmt);
+   ret = vsnprintf(*buf_p, *blen, fmt, ap);
+   va_end(ap);
+
+   if (ret < 0) {
+   if (err && !*err)
+   *err = ret;
+   } else {
+   *buf_p += ret;
+   *blen -= ret;
+   }
+
+   return ret;
+}
+
 int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
 size_t buf_len)
 {
-   int ret, ns, el, idx = packet->index;
+   int ns, el, idx = packet->index;
unsigned long long payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
+   size_t blen = buf_len;
+   int err = 0;
 
switch (packet->type) {
case ARM_SPE_BAD:
case ARM_SPE_PAD:
case ARM_SPE_END:
-   return snprintf(buf, buf_len, "%s", name);
-   case ARM_SPE_EVENTS: {
-   size_t blen = buf_len;
-
-   ret = 0;
-   ret = snprintf(buf, buf_len, "EV");
-   buf += ret;
-   blen -= ret;
-   if (payload & 0x1) {
-   ret = snprintf(buf, buf_len, " EXCEPTION-GEN");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x2) {
-   ret = snprintf(buf, buf_len, " RETIRED");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x4) {
-   ret = snprintf(buf, buf_len, " L1D-ACCESS");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x8) {
-   ret = snprintf(buf, buf_len, " L1D-REFILL");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x10) {
-   ret = snprintf(buf, buf_len, " TLB-ACCESS");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x20) {
-   ret = snprintf(buf, buf_len, " TLB-REFILL");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x40) {
-   ret = snprintf(buf, buf_len, " NOT-TAKEN");
-   buf += ret;
-   blen -= ret;
-   }
-   if (payload & 0x80) {
-   ret = snprintf(buf, buf_len, " MISPRED");
-   buf += ret;
-   blen -= ret;
-   }
+   return arm_spe_pkt_snprintf(&err, &buf, &blen, "%s", name);
+   case ARM_SPE_EVENTS:
+   arm_spe_pkt_snprintf(&err, &buf, &blen, "EV");
+
+   if (payload & 0x1)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " 
EXCEPTION-GEN");
+   if (payload & 0x2)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " RETIRED");
+   if (payload & 0x4)
+   arm_spe_pkt_snprintf(&err, &buf, &blen, " L1D-ACCES

[PATCH v12 04/10] usb: typec: tcpm: frs sourcing vbus callback

2020-10-29 Thread Badhri Jagan Sridharan
During FRS hardware autonomously starts to source vbus. Provide
callback to perform chip specific operations.

Signed-off-by: Badhri Jagan Sridharan 
Reviewed-by: Heikki Krogerus 
---
Introduced in v9.

Changes since v10:
Added Reviewed-by: Heikki Krogerus

Changes since v11:
none
---
 drivers/usb/typec/tcpm/tcpm.c | 9 +
 include/linux/usb/tcpm.h  | 4 
 2 files changed, 13 insertions(+)

diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c
index 561480b67bce..0123d2f14c96 100644
--- a/drivers/usb/typec/tcpm/tcpm.c
+++ b/drivers/usb/typec/tcpm/tcpm.c
@@ -4091,7 +4091,16 @@ static void _tcpm_pd_vbus_on(struct tcpm_port *port)
case SRC_TRY_DEBOUNCE:
/* Do nothing, waiting for sink detection */
break;
+   case FR_SWAP_SEND:
+   case FR_SWAP_SEND_TIMEOUT:
+   case FR_SWAP_SNK_SRC_TRANSITION_TO_OFF:
+   case FR_SWAP_SNK_SRC_SOURCE_VBUS_APPLIED:
+   if (port->tcpc->frs_sourcing_vbus)
+   port->tcpc->frs_sourcing_vbus(port->tcpc);
+   break;
case FR_SWAP_SNK_SRC_NEW_SINK_READY:
+   if (port->tcpc->frs_sourcing_vbus)
+   port->tcpc->frs_sourcing_vbus(port->tcpc);
tcpm_set_state(port, FR_SWAP_SNK_SRC_SOURCE_VBUS_APPLIED, 0);
break;
 
diff --git a/include/linux/usb/tcpm.h b/include/linux/usb/tcpm.h
index 09762d26fa0c..7303f518ba49 100644
--- a/include/linux/usb/tcpm.h
+++ b/include/linux/usb/tcpm.h
@@ -83,6 +83,9 @@ enum tcpm_transmit_type {
  * Optional; Called to enable/disable PD 3.0 fast role swap.
  * Enabling frs is accessory dependent as not all PD3.0
  * accessories support fast role swap.
+ * @frs_sourcing_vbus:
+ * Optional; Called to notify that vbus is now being sourced.
+ * Low level drivers can perform chip specific operations, if any.
  */
 struct tcpc_dev {
struct fwnode_handle *fwnode;
@@ -109,6 +112,7 @@ struct tcpc_dev {
   const struct pd_message *msg);
int (*set_bist_data)(struct tcpc_dev *dev, bool on);
int (*enable_frs)(struct tcpc_dev *dev, bool enable);
+   void (*frs_sourcing_vbus)(struct tcpc_dev *dev);
 };
 
 struct tcpm_port;
-- 
2.29.1.341.ge80a0c044ae-goog



Re: [External] Re: [PATCH 4/5] mm: memcg/slab: Fix root memcg vmstats

2020-10-29 Thread Muchun Song
On Thu, Oct 29, 2020 at 8:14 AM Roman Gushchin  wrote:
>
> On Wed, Oct 28, 2020 at 10:56:20AM +0800, Muchun Song wrote:
> > On Wed, Oct 28, 2020 at 2:48 AM Roman Gushchin  wrote:
> > >
> > > On Tue, Oct 27, 2020 at 04:02:55PM +0800, Muchun Song wrote:
> > > > If we reparent the slab objects to the root memcg, when we free
> > > > the slab object, we need to update the per-memcg vmstats to keep
> > > > it correct for the root memcg. Now this at least affects the vmstat
> > > > of NR_KERNEL_STACK_KB for !CONFIG_VMAP_STACK when the thread stack
> > > > size is smaller than the PAGE_SIZE.
> > > >
> > > > Fixes: ec9f02384f60 ("mm: workingset: fix vmstat counters for shadow 
> > > > nodes")
> > > > Signed-off-by: Muchun Song 
> > >
> > > Can you, please, drop this patch for now?
> > >
> > > I'm working on a bigger cleanup related to the handling of the root memory
> > > cgroup (I sent a link earlier in this thread), which already does a 
> > > similar change.
> > > There are several issues like this one, so it will be nice to fix them 
> > > all at once.
> >
> > I have read the patch of https://lkml.org/lkml/2020/10/14/869. You
> > mean this patch
> > fixes this issue? It chooses to uncharge the root memcg. But here we may 
> > need to
> > uncharge the root memcg to keep root vmstats correct. If we do not do
> > this, we can
> > see the wrong vmstats via root memory.stat(e.g. NR_KERNEL_STACK_KB).
>
> I pointed at a different patch in the same thread (it looks like you read the 
> first one):
> https://lkml.org/lkml/2020/10/21/612

Got it. Thanks. That is fine to me.

>
> It contained the following part:
>
> @@ -868,7 +860,7 @@ void __mod_lruvec_slab_state(void *p, enum node_stat_item 
> idx, int val)
> memcg = mem_cgroup_from_obj(p);
>
> /* Untracked pages have no memcg, no lruvec. Update only the node */
> -   if (!memcg || memcg == root_mem_cgroup) {
> +   if (!memcg) {
> __mod_node_page_state(pgdat, idx, val);
> } else {
> lruvec = mem_cgroup_lruvec(memcg, pgdat);
>
> So it's exactly what your patch does.
>
> Thanks!



-- 
Yours,
Muchun


Re: [PATCH v2 1/2] bpf: don't rely on GCC __attribute__((optimize)) to disable GCSE

2020-10-29 Thread Arvind Sankar
On Wed, Oct 28, 2020 at 04:20:01PM -0700, Alexei Starovoitov wrote:
> On Thu, Oct 29, 2020 at 12:10:52AM +0100, Ard Biesheuvel wrote:
> > On Wed, 28 Oct 2020 at 23:59, Alexei Starovoitov
> >  wrote:
> > >
> > > On Wed, Oct 28, 2020 at 11:15:04PM +0100, Ard Biesheuvel wrote:
> > > > On Wed, 28 Oct 2020 at 22:39, Alexei Starovoitov
> > > >  wrote:
> > > > >
> > > > > On Wed, Oct 28, 2020 at 06:15:05PM +0100, Ard Biesheuvel wrote:
> > > > > > Commit 3193c0836 ("bpf: Disable GCC -fgcse optimization for
> > > > > > ___bpf_prog_run()") introduced a __no_fgcse macro that expands to a
> > > > > > function scope __attribute__((optimize("-fno-gcse"))), to disable a
> > > > > > GCC specific optimization that was causing trouble on x86 builds, 
> > > > > > and
> > > > > > was not expected to have any positive effect in the first place.
> > > > > >
> > > > > > However, as the GCC manual documents, __attribute__((optimize))
> > > > > > is not for production use, and results in all other optimization
> > > > > > options to be forgotten for the function in question. This can
> > > > > > cause all kinds of trouble, but in one particular reported case,
> > > > > > it causes -fno-asynchronous-unwind-tables to be disregarded,
> > > > > > resulting in .eh_frame info to be emitted for the function.
> > > > > >
> > > > > > This reverts commit 3193c0836, and instead, it disables the -fgcse
> > > > > > optimization for the entire source file, but only when building for
> > > > > > X86 using GCC with CONFIG_BPF_JIT_ALWAYS_ON disabled. Note that the
> > > > > > original commit states that CONFIG_RETPOLINE=n triggers the issue,
> > > > > > whereas CONFIG_RETPOLINE=y performs better without the optimization,
> > > > > > so it is kept disabled in both cases.
> > > > > >
> > > > > > Fixes: 3193c0836 ("bpf: Disable GCC -fgcse optimization for 
> > > > > > ___bpf_prog_run()")
> > > > > > Link: 
> > > > > > https://lore.kernel.org/lkml/CAMuHMdUg0WJHEcq6to0-eODpXPOywLot6UD2=gfhpzoj_hc...@mail.gmail.com/
> > > > > > Signed-off-by: Ard Biesheuvel 
> > > > > > ---
> > > > > >  include/linux/compiler-gcc.h   | 2 --
> > > > > >  include/linux/compiler_types.h | 4 
> > > > > >  kernel/bpf/Makefile| 6 +-
> > > > > >  kernel/bpf/core.c  | 2 +-
> > > > > >  4 files changed, 6 insertions(+), 8 deletions(-)
> > > > > >
> > > > > > diff --git a/include/linux/compiler-gcc.h 
> > > > > > b/include/linux/compiler-gcc.h
> > > > > > index d1e3c6896b71..5deb37024574 100644
> > > > > > --- a/include/linux/compiler-gcc.h
> > > > > > +++ b/include/linux/compiler-gcc.h
> > > > > > @@ -175,5 +175,3 @@
> > > > > >  #else
> > > > > >  #define __diag_GCC_8(s)
> > > > > >  #endif
> > > > > > -
> > > > > > -#define __no_fgcse __attribute__((optimize("-fno-gcse")))
> > > > >
> > > > > See my reply in the other thread.
> > > > > I prefer
> > > > > -#define __no_fgcse __attribute__((optimize("-fno-gcse")))
> > > > > +#define __no_fgcse 
> > > > > __attribute__((optimize("-fno-gcse,-fno-omit-frame-pointer")))
> > > > >
> > > > > Potentially with -fno-asynchronous-unwind-tables.
> > > > >
> > > >
> > > > So how would that work? arm64 has the following:
> > > >
> > > > KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables
> > > >
> > > > ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
> > > > KBUILD_CFLAGS += -ffixed-x18
> > > > endif
> > > >
> > > > and it adds -fpatchable-function-entry=2 for compilers that support
> > > > it, but only when CONFIG_FTRACE is enabled.
> > >
> > > I think you're assuming that GCC drops all flags when it sees 
> > > __attribute__((optimize)).
> > > That's not the case.
> > >
> > 
> > So which flags does it drop, and which doesn't it drop? Is that
> > documented somewhere? Is that the same for all versions of GCC?
> > 
> > > > Also, as Nick pointed out, -fno-gcse does not work on Clang.
> > >
> > > yes and what's the point?
> > > #define __no_fgcse is GCC only. clang doesn't need this workaround.
> > >
> > 
> > Ah ok, that's at least something.
> > 
> > > > Every architecture will have a different set of requirements here. And
> > > > there is no way of knowing which -f options are disregarded when you
> > > > use the function attribute.
> > > >
> > > > So how on earth are you going to #define __no-fgcse correctly for
> > > > every configuration imaginable?
> > > >
> > > > > __attribute__((optimize("")) is not as broken as you're claiming to 
> > > > > be.
> > > > > It has quirky gcc internal logic, but it's still widely used
> > > > > in many software projects.
> > > >
> > > > So it's fine because it is only a little bit broken? I'm sorry, but
> > > > that makes no sense whatsoever.
> > > >
> > > > If you insist on sticking with this broken construct, can you please
> > > > make it GCC/x86-only at least?
> > >
> > > I'm totally fine with making
> > > #define __no_fgcse 
> > > __attribute__((optimize("-fno-gcse,-fno-omit-frame-pointer")))
> > > to be gcc+x86 only.
> > > I'd like to get rid of it, but objtool

[PATCH 10/25] ASoC: tegra: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/tegra/tegra30_i2s.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c
index db5a8587bfa4..df55b90c3cf4 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -551,7 +551,6 @@ static int tegra30_i2s_platform_remove(struct 
platform_device *pdev)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int tegra30_i2s_suspend(struct device *dev)
 {
struct tegra30_i2s *i2s = dev_get_drvdata(dev);
@@ -576,7 +575,6 @@ static int tegra30_i2s_resume(struct device *dev)
 
return ret;
 }
-#endif
 
 static const struct dev_pm_ops tegra30_i2s_pm_ops = {
SET_RUNTIME_PM_OPS(tegra30_i2s_runtime_suspend,
-- 
2.28.0



[PATCH 15/25] ASoC: stm32: sai: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/stm/stm32_sai.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/stm/stm32_sai.c b/sound/soc/stm/stm32_sai.c
index 058757c721f0..40c9e554a3d7 100644
--- a/sound/soc/stm/stm32_sai.c
+++ b/sound/soc/stm/stm32_sai.c
@@ -245,7 +245,6 @@ static int stm32_sai_probe(struct platform_device *pdev)
return devm_of_platform_populate(&pdev->dev);
 }
 
-#ifdef CONFIG_PM_SLEEP
 /*
  * When pins are shared by two sai sub instances, pins have to be defined
  * in sai parent node. In this case, pins state is not managed by alsa fw.
@@ -280,7 +279,6 @@ static int stm32_sai_resume(struct device *dev)
 
return pinctrl_pm_select_default_state(dev);
 }
-#endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops stm32_sai_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume)
-- 
2.28.0



[rcu:dev.2020.10.26b 81/97] include/linux/srcutree.h:127:13: error: '___srcu_struct_ptrs' undeclared here (not in a function)

2020-10-29 Thread kernel test robot
tree:   https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git 
dev.2020.10.26b
head:   387807f02923dd87ad097a4245ddbd9d8079687d
commit: c1370c128cf49147f1d4c670b7101134231b3dc5 [81/97] srcu: Avoid escaped 
section names
config: x86_64-rhel (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git/commit/?id=c1370c128cf49147f1d4c670b7101134231b3dc5
git remote add rcu 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
git fetch --no-tags rcu dev.2020.10.26b
git checkout c1370c128cf49147f1d4c670b7101134231b3dc5
# save the attached .config to linux build tree
make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   In file included from include/linux/compiler_types.h:65,
from :
>> include/linux/srcutree.h:127:13: error: '___srcu_struct_ptrs' undeclared 
>> here (not in a function)
 127 |   __section(___srcu_struct_ptrs) = &name
 | ^~~
   include/linux/compiler_attributes.h:257:68: note: in definition of macro 
'__section'
 257 | #define __section(section)  
__attribute__((__section__(section)))
 |
^~~
   include/linux/srcutree.h:135:34: note: in expansion of macro '__DEFINE_SRCU'
 135 | #define DEFINE_STATIC_SRCU(name) __DEFINE_SRCU(name, static)
 |  ^
   drivers/gpu/drm/drm_drv.c:68:1: note: in expansion of macro 
'DEFINE_STATIC_SRCU'
  68 | DEFINE_STATIC_SRCU(drm_unplug_srcu);
 | ^~
   In file included from include/linux/srcu.h:49,
from include/linux/notifier.h:16,
from arch/x86/include/asm/uprobes.h:13,
from include/linux/uprobes.h:49,
from include/linux/mm_types.h:14,
from include/linux/mmzone.h:21,
from include/linux/gfp.h:6,
from include/linux/xarray.h:14,
from include/linux/radix-tree.h:19,
from include/linux/fs.h:15,
from include/linux/debugfs.h:15,
from drivers/gpu/drm/drm_drv.c:29:
>> include/linux/srcutree.h:126:9: error: section attribute argument not a 
>> string constant
 126 |  struct srcu_struct * const __srcu_struct_##name   \
 | ^~~
   include/linux/srcutree.h:135:34: note: in expansion of macro '__DEFINE_SRCU'
 135 | #define DEFINE_STATIC_SRCU(name) __DEFINE_SRCU(name, static)
 |  ^
   drivers/gpu/drm/drm_drv.c:68:1: note: in expansion of macro 
'DEFINE_STATIC_SRCU'
  68 | DEFINE_STATIC_SRCU(drm_unplug_srcu);
 | ^~
--
   In file included from include/linux/compiler_types.h:65,
from :
>> include/linux/srcutree.h:127:13: error: '___srcu_struct_ptrs' undeclared 
>> here (not in a function)
 127 |   __section(___srcu_struct_ptrs) = &name
 | ^~~
   include/linux/compiler_attributes.h:257:68: note: in definition of macro 
'__section'
 257 | #define __section(section)  
__attribute__((__section__(section)))
 |
^~~
   include/linux/srcutree.h:135:34: note: in expansion of macro '__DEFINE_SRCU'
 135 | #define DEFINE_STATIC_SRCU(name) __DEFINE_SRCU(name, static)
 |  ^
   fs/dlm/lowcomms.c:139:1: note: in expansion of macro 'DEFINE_STATIC_SRCU'
 139 | DEFINE_STATIC_SRCU(connections_srcu);
 | ^~
   In file included from include/linux/srcu.h:49,
from include/linux/notifier.h:16,
from arch/x86/include/asm/uprobes.h:13,
from include/linux/uprobes.h:49,
from include/linux/mm_types.h:14,
from include/linux/mmzone.h:21,
from include/linux/gfp.h:6,
from include/linux/xarray.h:14,
from include/linux/radix-tree.h:19,
from include/linux/fs.h:15,
from include/linux/compat.h:17,
from include/linux/ethtool.h:17,
from include/linux/netdevice.h:37,
from include/net/sock.h:46,
from fs/dlm/lowcomms.c:46:
>> include/linux/srcutree.h:126:9: error: section attribute argument not a 
>> string constant
 126 |  struct srcu_struct * const __srcu_struct_##name   \
 | ^~~
   include/linux/srcutree.h:135:34: note: in expansion of macro '__D

[PATCH 11/25] ASoC: hdac: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/intel/skylake/skl.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c
index 8b993722f74e..da32d68080be 100644
--- a/sound/soc/intel/skylake/skl.c
+++ b/sound/soc/intel/skylake/skl.c
@@ -322,7 +322,6 @@ static int _skl_resume(struct hdac_bus *bus)
 }
 #endif
 
-#ifdef CONFIG_PM_SLEEP
 /*
  * power management
  */
@@ -400,7 +399,6 @@ static int skl_resume(struct device *dev)
 
return ret;
 }
-#endif /* CONFIG_PM_SLEEP */
 
 #ifdef CONFIG_PM
 static int skl_runtime_suspend(struct device *dev)
-- 
2.28.0



The Ultimate Takeover? (Fair Pay)

2020-10-29 Thread Ywe Cærlyn
The ultimate sales pitch seems to be the reconciliation of Arabic Script 
Quran, and Latin Script translation, with consideration to anti-synesthesia.


This should give fair pay basis, and optimal business for the whole 
world, east and west.


And the best thing ever for bitstreaming and indie OS development.

Best Greetings,
Ywe Cærlyn,
B9 Lead.
https://www.youtube.com/channel/UCR3gmLVjHS5A702wo4bol_Q


[rcu:dev.2020.10.26b] BUILD REGRESSION 387807f02923dd87ad097a4245ddbd9d8079687d

2020-10-29 Thread kernel test robot
tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git  
dev.2020.10.26b
branch HEAD: 387807f02923dd87ad097a4245ddbd9d8079687d  kcsan: Fix encoding 
masks and regain address bit

Error/Warning reports:

https://lore.kernel.org/lkml/202010291100.dorngfyr-...@intel.com

possible Error/Warning in current branch:

include/linux/srcutree.h:126:9: error: section attribute argument not a string 
constant
include/linux/srcutree.h:127:13: error: '___srcu_struct_ptrs' undeclared here 
(not in a function)

Error/Warning ids grouped by kconfigs:

gcc_recent_errors
|-- x86_64-rhel
|   |-- 
include-linux-srcutree.h:error:___srcu_struct_ptrs-undeclared-here-(not-in-a-function)
|   `-- 
include-linux-srcutree.h:error:section-attribute-argument-not-a-string-constant
`-- x86_64-rhel-7.6-kselftests
|-- 
include-linux-srcutree.h:error:___srcu_struct_ptrs-undeclared-here-(not-in-a-function)
`-- 
include-linux-srcutree.h:error:section-attribute-argument-not-a-string-constant

elapsed time: 725m

configs tested: 172
configs skipped: 2

gcc tested configs:
arm defconfig
arm64allyesconfig
arm64   defconfig
arm  allyesconfig
arm  allmodconfig
m68km5307c3_defconfig
c6x defconfig
s390 allyesconfig
arm  prima2_defconfig
ia64  tiger_defconfig
openrisc alldefconfig
powerpc mpc8272_ads_defconfig
mipsmaltaup_defconfig
sh   se7721_defconfig
arc  axs103_defconfig
powerpcsocrates_defconfig
powerpc64   defconfig
arm nhk8815_defconfig
arm  pxa3xx_defconfig
ia64defconfig
ia64generic_defconfig
mips  malta_defconfig
sh  lboxre2_defconfig
armmvebu_v5_defconfig
m68k amcore_defconfig
armmvebu_v7_defconfig
mips   lemote2f_defconfig
alphaalldefconfig
sh  r7780mp_defconfig
armlart_defconfig
mips  bmips_stb_defconfig
armmagician_defconfig
m68kmvme147_defconfig
powerpc mpc8313_rdb_defconfig
arm  zx_defconfig
c6x dsk6455_defconfig
pariscgeneric-32bit_defconfig
powerpcgamecube_defconfig
arm  integrator_defconfig
powerpc mpc5200_defconfig
powerpc  chrp32_defconfig
arc haps_hs_smp_defconfig
m68k   m5249evb_defconfig
arm   tegra_defconfig
powerpc mpc834x_mds_defconfig
arm davinci_all_defconfig
mips loongson1b_defconfig
mips allyesconfig
sh   se7343_defconfig
powerpc mpc836x_rdk_defconfig
powerpc  bamboo_defconfig
arm  pxa255-idp_defconfig
xtensa   alldefconfig
powerpc tqm8560_defconfig
arc nsimosci_hs_smp_defconfig
shedosk7760_defconfig
shecovec24-romimage_defconfig
riscvalldefconfig
powerpc asp8347_defconfig
powerpc mpc512x_defconfig
mips   capcella_defconfig
xtensa  nommu_kc705_defconfig
arm s5pv210_defconfig
arm  tango4_defconfig
arm  badge4_defconfig
powerpc tqm8540_defconfig
sh  sh7785lcr_32bit_defconfig
mipsmalta_qemu_32r6_defconfig
sh espt_defconfig
arm  ixp4xx_defconfig
umkunit_defconfig
m68k  multi_defconfig
nds32alldefconfig
um   x86_64_defconfig
arm  tct_hammer_defconfig
mips   bmips_be_defconfig
arm   viper_defconfig
powerpcsam440ep_defconfig
sh  urquell_defconfig
powerpc  walnut_defconfig
sh  sdk7780_defconfig
powerpc pseries_defconfig
sh  ul2_defconfig
armzeus_defconfig
sh  rsk7264_defconfig
pow

[PATCH 12/25] ASoC: stm32: sai: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/stm/stm32_sai_sub.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/stm/stm32_sai_sub.c b/sound/soc/stm/stm32_sai_sub.c
index 3aa1cf262402..38dd7e30af1b 100644
--- a/sound/soc/stm/stm32_sai_sub.c
+++ b/sound/soc/stm/stm32_sai_sub.c
@@ -1582,7 +1582,6 @@ static int stm32_sai_sub_remove(struct platform_device 
*pdev)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int stm32_sai_sub_suspend(struct device *dev)
 {
struct stm32_sai_sub_data *sai = dev_get_drvdata(dev);
@@ -1616,7 +1615,6 @@ static int stm32_sai_sub_resume(struct device *dev)
 
return ret;
 }
-#endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops stm32_sai_sub_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_sub_suspend, stm32_sai_sub_resume)
-- 
2.28.0



[PATCH 13/25] ASoC: stm32: spdifrx: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/stm/stm32_spdifrx.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/stm/stm32_spdifrx.c b/sound/soc/stm/stm32_spdifrx.c
index 1bfa3b2ba974..40262ff0c588 100644
--- a/sound/soc/stm/stm32_spdifrx.c
+++ b/sound/soc/stm/stm32_spdifrx.c
@@ -1056,7 +1056,6 @@ static int stm32_spdifrx_probe(struct platform_device 
*pdev)
 
 MODULE_DEVICE_TABLE(of, stm32_spdifrx_ids);
 
-#ifdef CONFIG_PM_SLEEP
 static int stm32_spdifrx_suspend(struct device *dev)
 {
struct stm32_spdifrx_data *spdifrx = dev_get_drvdata(dev);
@@ -1075,7 +1074,6 @@ static int stm32_spdifrx_resume(struct device *dev)
 
return regcache_sync(spdifrx->regmap);
 }
-#endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops stm32_spdifrx_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(stm32_spdifrx_suspend, stm32_spdifrx_resume)
-- 
2.28.0



[PATCH 17/25] ASoC: hdac_hdmi: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/codecs/hdac_hdmi.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/sound/soc/codecs/hdac_hdmi.c b/sound/soc/codecs/hdac_hdmi.c
index 2c1305bf0572..92111561a041 100644
--- a/sound/soc/codecs/hdac_hdmi.c
+++ b/sound/soc/codecs/hdac_hdmi.c
@@ -2026,7 +2026,6 @@ static void hdmi_codec_remove(struct snd_soc_component 
*component)
pm_runtime_disable(&hdev->dev);
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int hdmi_codec_resume(struct device *dev)
 {
struct hdac_device *hdev = dev_to_hdac_dev(dev);
@@ -2049,9 +2048,6 @@ static int hdmi_codec_resume(struct device *dev)
hdac_hdmi_present_sense_all_pins(hdev, hdmi, false);
return 0;
 }
-#else
-#define hdmi_codec_resume NULL
-#endif
 
 static const struct snd_soc_component_driver hdmi_hda_codec = {
.probe  = hdmi_codec_probe,
-- 
2.28.0



[PATCH 14/25] ASoC: stm32: i2s: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/stm/stm32_i2s.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/stm/stm32_i2s.c b/sound/soc/stm/stm32_i2s.c
index 7c4d63c33f15..138acfb26882 100644
--- a/sound/soc/stm/stm32_i2s.c
+++ b/sound/soc/stm/stm32_i2s.c
@@ -984,7 +984,6 @@ static int stm32_i2s_probe(struct platform_device *pdev)
 
 MODULE_DEVICE_TABLE(of, stm32_i2s_ids);
 
-#ifdef CONFIG_PM_SLEEP
 static int stm32_i2s_suspend(struct device *dev)
 {
struct stm32_i2s_data *i2s = dev_get_drvdata(dev);
@@ -1002,7 +1001,6 @@ static int stm32_i2s_resume(struct device *dev)
regcache_cache_only(i2s->regmap, false);
return regcache_sync(i2s->regmap);
 }
-#endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops stm32_i2s_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(stm32_i2s_suspend, stm32_i2s_resume)
-- 
2.28.0



[PATCH 16/25] ASoC: sirf: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/sirf/sirf-usp.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c
index 2af0c6f14ee6..ae2890827414 100644
--- a/sound/soc/sirf/sirf-usp.c
+++ b/sound/soc/sirf/sirf-usp.c
@@ -313,7 +313,6 @@ static int sirf_usp_pcm_runtime_resume(struct device *dev)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int sirf_usp_pcm_suspend(struct device *dev)
 {
struct sirf_usp *usp = dev_get_drvdata(dev);
@@ -340,7 +339,6 @@ static int sirf_usp_pcm_resume(struct device *dev)
}
return 0;
 }
-#endif
 
 static const struct snd_soc_component_driver sirf_usp_component = {
.name   = "sirf-usp",
-- 
2.28.0



[PATCH 18/25] ASoC: codecs: max98373: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/codecs/max98373-i2c.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/codecs/max98373-i2c.c b/sound/soc/codecs/max98373-i2c.c
index 92921e34f948..f847e7e76635 100644
--- a/sound/soc/codecs/max98373-i2c.c
+++ b/sound/soc/codecs/max98373-i2c.c
@@ -468,7 +468,6 @@ static struct snd_soc_dai_driver max98373_dai[] = {
}
 };
 
-#ifdef CONFIG_PM_SLEEP
 static int max98373_suspend(struct device *dev)
 {
struct max98373_priv *max98373 = dev_get_drvdata(dev);
@@ -487,7 +486,6 @@ static int max98373_resume(struct device *dev)
regcache_sync(max98373->regmap);
return 0;
 }
-#endif
 
 static const struct dev_pm_ops max98373_pm = {
SET_SYSTEM_SLEEP_PM_OPS(max98373_suspend, max98373_resume)
-- 
2.28.0



[PATCH 19/25] ASoC: sirf-audio: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/codecs/sirf-audio-codec.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/codecs/sirf-audio-codec.c 
b/sound/soc/codecs/sirf-audio-codec.c
index a061d78473ac..b6a101ec6e7c 100644
--- a/sound/soc/codecs/sirf-audio-codec.c
+++ b/sound/soc/codecs/sirf-audio-codec.c
@@ -522,7 +522,6 @@ static int sirf_audio_codec_driver_remove(struct 
platform_device *pdev)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int sirf_audio_codec_suspend(struct device *dev)
 {
struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev);
@@ -552,7 +551,6 @@ static int sirf_audio_codec_resume(struct device *dev)
 
return 0;
 }
-#endif
 
 static const struct dev_pm_ops sirf_audio_codec_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(sirf_audio_codec_suspend, 
sirf_audio_codec_resume)
-- 
2.28.0



[PATCH 23/25] ASoC: ts3a227e: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/codecs/ts3a227e.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/codecs/ts3a227e.c b/sound/soc/codecs/ts3a227e.c
index 3ed3b45fa7ba..95d17cf7695a 100644
--- a/sound/soc/codecs/ts3a227e.c
+++ b/sound/soc/codecs/ts3a227e.c
@@ -334,7 +334,6 @@ static int ts3a227e_i2c_probe(struct i2c_client *i2c,
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int ts3a227e_suspend(struct device *dev)
 {
struct ts3a227e *ts3a227e = dev_get_drvdata(dev);
@@ -354,7 +353,6 @@ static int ts3a227e_resume(struct device *dev)
 
return 0;
 }
-#endif
 
 static const struct dev_pm_ops ts3a227e_pm = {
SET_SYSTEM_SLEEP_PM_OPS(ts3a227e_suspend, ts3a227e_resume)
-- 
2.28.0



Re: [PATCH 2/2] usb: dwc3: gadget: Preserve UDC max speed setting

2020-10-29 Thread Thinh Nguyen
Thinh Nguyen wrote:
> Wesley Cheng wrote:
>> On 10/28/2020 5:43 PM, Thinh Nguyen wrote:
>>> Hi,
>>>
>>> Wesley Cheng wrote:
 The USB gadget/UDC driver can restrict the DWC3 controller speed using
 dwc3_gadget_set_speed().  Store this setting into a variable, in order for
 this setting to persist across controller resets due to runtime PM.
>>> Why do we need to do this? DCFG should persist unless we overwrite it.
>>> The current PM shouldn't update the current speed setting.
>>>
>>> BR,
>>> Thinh
>>>
>> Hi Thinh,
>>
>> During runtime PM suspend, the dwc3_suspend_common() will call
>> dwc3_core_exit().  On some platforms they register the DWC3 reset
>> control to the DWC3 core driver (otherwise could be handled in the DWC3
>> glue drivers), which will be asserted here:
>>
>> static void dwc3_core_exit(struct dwc3 *dwc)
>> {
>> ...
>>  reset_control_assert(dwc->reset);
>>
>> From the SNPS databook (Table 2-2 Resets for Registers) it mentions that
>> assertion of the reset signal will reset the DCFG register.
> I see. There's a hard reset on some platforms.
>
>> In addition to the above, with the change to allow runtime PM suspend
>> during UDC unbind, we need a way to avoid writing to the DCFG during the
>> UDC bind path. (if we entered suspend before re-binding the UDC)  If we
>> add an early exit based on the PM state (in
>> dwc3_gadget_set_udc_speed()), then we basically ignore the max speed
>> request from the UDC/gadget layer.
> Then shouldn't we restore the speed setting when dwc3_gadget_resume()
> instead of in dwc3_gadget_run_stop()?

Actually, ignore this comment. This is fine, and it may save some
register read/write operations. I was thinking of save/restore from
suspend and resume similar to hibernation.

Thanks,
Thinh

>
>> Since it looks like the DWC3 gadget driver doesn't like using
>> synchronous PM runtime resumes, by going this route, we can allow the
>> async runtime resume handler to do everything, such as writing the speed
>> config and re-enabling the controller.
>>
>> Thanks
>>
>> Regards,
>> Wesley Cheng
> Thanks,
> Thinh



[PATCH 22/25] ASoC: max98927: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/codecs/max98927.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/codecs/max98927.c b/sound/soc/codecs/max98927.c
index 8b206ee77709..48c6aa78a410 100644
--- a/sound/soc/codecs/max98927.c
+++ b/sound/soc/codecs/max98927.c
@@ -794,7 +794,6 @@ static int max98927_probe(struct snd_soc_component 
*component)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int max98927_suspend(struct device *dev)
 {
struct max98927_priv *max98927 = dev_get_drvdata(dev);
@@ -813,7 +812,6 @@ static int max98927_resume(struct device *dev)
regcache_sync(max98927->regmap);
return 0;
 }
-#endif
 
 static const struct dev_pm_ops max98927_pm = {
SET_SYSTEM_SLEEP_PM_OPS(max98927_suspend, max98927_resume)
-- 
2.28.0



[PATCH 24/25] ASoC: wm8994: remove unnecessary CONFIG_PM_SLEEP

2020-10-29 Thread Coiby Xu
SET_SYSTEM_SLEEP_PM_OPS has already took good care of CONFIG_PM_CONFIG.

Signed-off-by: Coiby Xu 
---
 sound/soc/codecs/wm8994.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index fc9ea198ac79..9294ad06f76d 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -4656,7 +4656,6 @@ static int wm8994_remove(struct platform_device *pdev)
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static int wm8994_suspend(struct device *dev)
 {
struct wm8994_priv *wm8994 = dev_get_drvdata(dev);
@@ -4681,7 +4680,6 @@ static int wm8994_resume(struct device *dev)
 
return 0;
 }
-#endif
 
 static const struct dev_pm_ops wm8994_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(wm8994_suspend, wm8994_resume)
-- 
2.28.0



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