Re: [PATCH v2] i2c: imx-lpi2c: Fix runtime PM imbalance on error in lpi2c_imx_master_enable()
> pm_runtime_get_sync() increments the runtime PM usage counter even > the call returns an error code. Thus a pairing decrement is needed > on the error handling path to keep the counter balanced. * How do you think about to replace the word “pairing” by “corresponding”? * Will it be helpful to add an imperative wording? https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?id=ffeb595d84811dde16a28b33d8a7cf26d51d51b3#n151 * Would you like to add the tag “Fixes” to the commit message? * Are you going to take such possibilities into account for any more patches? Regards, Markus
Re: [PATCH 1/2] docs: mm/gup: pin_user_pages.rst: add a "case 5"
On Sat, May 30, 2020 at 5:13 AM John Hubbard wrote: > > There are four cases listed in pin_user_pages.rst. These are > intended to help developers figure out whether to use > get_user_pages*(), or pin_user_pages*(). However, the four cases > do not cover all the situations. For example, drivers/vhost/vhost.c > has a "pin, write to page, set page dirty, unpin" case. > > Add a fifth case, to help explain that there is a general pattern > that requires pin_user_pages*() API calls. > > Cc: Vlastimil Babka > Cc: Jan Kara > Cc: Jérôme Glisse > Cc: Dave Chinner > Cc: Jonathan Corbet > Cc: linux-...@vger.kernel.org > Cc: linux-fsde...@vger.kernel.org > Signed-off-by: John Hubbard > --- > Documentation/core-api/pin_user_pages.rst | 20 > 1 file changed, 20 insertions(+) > > diff --git a/Documentation/core-api/pin_user_pages.rst > b/Documentation/core-api/pin_user_pages.rst > index 4675b04e8829..b9f2688a2c67 100644 > --- a/Documentation/core-api/pin_user_pages.rst > +++ b/Documentation/core-api/pin_user_pages.rst > @@ -171,6 +171,26 @@ If only struct page data (as opposed to the actual > memory contents that a page > is tracking) is affected, then normal GUP calls are sufficient, and neither > flag > needs to be set. > > +CASE 5: Pinning in order to write to the data within the page > +- > +Even though neither DMA nor Direct IO is involved, just a simple case of > "pin, > +access page's data, unpin" can cause a problem. Will it be, *"pin, access page's data, set page dirty, unpin" * ? Case 5 may be considered a > +superset of Case 1, plus Case 2, plus anything that invokes that pattern. In > +other words, if the code is neither Case 1 nor Case 2, it may still require > +FOLL_PIN, for patterns like this: > + > +Correct (uses FOLL_PIN calls): > +pin_user_pages() > +access the data within the pages > +set_page_dirty_lock() > +unpin_user_pages() > + > +INCORRECT (uses FOLL_GET calls): > +get_user_pages() > +access the data within the pages > +set_page_dirty_lock() > +put_page() > + > page_maybe_dma_pinned(): the whole point of pinning > === > > -- > 2.26.2 >
Re: [PATCH 1/2] mm/gup: introduce pin_user_pages_locked()
On Sun, May 31, 2020 at 12:34 PM Souptick Joarder wrote:
>
> On Thu, May 28, 2020 at 4:02 AM John Hubbard wrote:
> >
> > Introduce pin_user_pages_locked(), which is nearly identical to
> > get_user_pages_locked() except that it sets FOLL_PIN and rejects
> > FOLL_GET.
Forget to ask, is it fine to add this new pin_user_pages_locked() in
Documentation/core-api/pin_user_pages.rst ?
> >
> > Signed-off-by: John Hubbard
> > ---
> > include/linux/mm.h | 2 ++
> > mm/gup.c | 30 ++
> > 2 files changed, 32 insertions(+)
> >
> > diff --git a/include/linux/mm.h b/include/linux/mm.h
> > index 98be7289d7e9..d16951087c93 100644
> > --- a/include/linux/mm.h
> > +++ b/include/linux/mm.h
> > @@ -1700,6 +1700,8 @@ long pin_user_pages(unsigned long start, unsigned
> > long nr_pages,
> > struct vm_area_struct **vmas);
> > long get_user_pages_locked(unsigned long start, unsigned long nr_pages,
> > unsigned int gup_flags, struct page **pages, int
> > *locked);
> > +long pin_user_pages_locked(unsigned long start, unsigned long nr_pages,
> > + unsigned int gup_flags, struct page **pages, int
> > *locked);
> > long get_user_pages_unlocked(unsigned long start, unsigned long nr_pages,
> > struct page **pages, unsigned int gup_flags);
> > long pin_user_pages_unlocked(unsigned long start, unsigned long nr_pages,
> > diff --git a/mm/gup.c b/mm/gup.c
> > index 2f0a0b497c23..17418a949067 100644
> > --- a/mm/gup.c
> > +++ b/mm/gup.c
> > @@ -2992,3 +2992,33 @@ long pin_user_pages_unlocked(unsigned long start,
> > unsigned long nr_pages,
> > return get_user_pages_unlocked(start, nr_pages, pages, gup_flags);
> > }
> > EXPORT_SYMBOL(pin_user_pages_unlocked);
> > +
> > +/*
> > + * pin_user_pages_locked() is the FOLL_PIN variant of
> > get_user_pages_locked().
> > + * Behavior is the same, except that this one sets FOLL_PIN and rejects
> > + * FOLL_GET.
> > + */
> > +long pin_user_pages_locked(unsigned long start, unsigned long nr_pages,
> > + unsigned int gup_flags, struct page **pages,
> > + int *locked)
> > +{
> > + /*
> > +* FIXME: Current FOLL_LONGTERM behavior is incompatible with
> > +* FAULT_FLAG_ALLOW_RETRY because of the FS DAX check requirement on
> > +* vmas. As there are no users of this flag in this call we simply
> > +* disallow this option for now.
> > +*/
> > + if (WARN_ON_ONCE(gup_flags & FOLL_LONGTERM))
> > + return -EINVAL;
> > +
> > + /* FOLL_GET and FOLL_PIN are mutually exclusive. */
> > + if (WARN_ON_ONCE(gup_flags & FOLL_GET))
> > + return -EINVAL;
> > +
> > + gup_flags |= FOLL_PIN;
>
> Right now get_user_pages_locked() doesn't have similar check for FOLL_PIN
> and also not setting FOLL_GET internally irrespective of gup_flags
> passed by user.
> Do we need to add the same in get_user_pages_locked() ?
>
> > + return __get_user_pages_locked(current, current->mm, start,
> > nr_pages,
> > + pages, NULL, locked,
> > + gup_flags | FOLL_TOUCH);
> > +}
> > +EXPORT_SYMBOL(pin_user_pages_locked);
> > +
> > --
> > 2.26.2
> >
> >
RE: [PATCH v2 1/5] scsi: ufs-mediatek: Fix imprecise waiting time for ref-clk control
>
> Currently ref-clk control timeout is implemented by Jiffies. However
> jiffies is not accurate enough thus "false timeout" may happen.
>
> Use more accurate delay mechanism instead, for example, ktime.
>
> Signed-off-by: Stanley Chu
> Reviewed-by: Andy Teng
Reviewed-by: Avri Altman
> ---
> drivers/scsi/ufs/ufs-mediatek.c | 7 ---
> drivers/scsi/ufs/ufs-mediatek.h | 2 +-
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
> index d56ce8d97d4e..523ee5573921 100644
> --- a/drivers/scsi/ufs/ufs-mediatek.c
> +++ b/drivers/scsi/ufs/ufs-mediatek.c
> @@ -120,7 +120,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba,
> bool on)
> {
> struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> struct arm_smccc_res res;
> - unsigned long timeout;
> + ktime_t timeout, time_checked;
> u32 value;
>
> if (host->ref_clk_enabled == on)
> @@ -135,8 +135,9 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba,
> bool on)
> }
>
> /* Wait for ack */
> - timeout = jiffies + msecs_to_jiffies(REFCLK_REQ_TIMEOUT_MS);
> + timeout = ktime_add_us(ktime_get(), REFCLK_REQ_TIMEOUT_US);
> do {
> + time_checked = ktime_get();
> value = ufshcd_readl(hba, REG_UFS_REFCLK_CTRL);
>
> /* Wait until ack bit equals to req bit */
> @@ -144,7 +145,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba,
> bool on)
> goto out;
>
> usleep_range(100, 200);
> - } while (time_before(jiffies, timeout));
> + } while (ktime_before(time_checked, timeout));
Nit: you could get rid of time_checked if you would use
ktime_compare(ktime_get(), timeout) > 0
Thanks,
Avri
>
> dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value);
>
> diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h
> index 5bbd3e9cbae2..fc42dcbfd800 100644
> --- a/drivers/scsi/ufs/ufs-mediatek.h
> +++ b/drivers/scsi/ufs/ufs-mediatek.h
> @@ -28,7 +28,7 @@
> #define REFCLK_REQUEST BIT(0)
> #define REFCLK_ACK BIT(1)
>
> -#define REFCLK_REQ_TIMEOUT_MS 3
> +#define REFCLK_REQ_TIMEOUT_US 3000
>
> /*
> * Vendor specific pre-defined parameters
> --
> 2.18.0
[PATCH v8 0/7] I3C mastership handover support
Main changes between v7 and v8 are: - Document format changed from table to DOT diagram - Appropriate names for few functions - Moved mastership request process entirely to the driver - Reuse of i3c_master_add_i3c_dev_locked in core defslvs processing Main changes between v6 and v7 are: - Added separate functions for main and secondary master initialization - Secondary master initialization don't wait for DEFSLSVS. - Change to use I2C device information from DTS, and corresponding changes in controller driver and I3C core DEFSLVS processing to ignore I2C devices received in DEFSLVS - Reverted bus_init split - Fixed formatting issues in document Main changes between v5 and v6 are: - Moved populate_bus() hook to master subsystem code. - For secondary master initialization i3c_master_register spawan separate threads, as secondary master may have to wait for DEFSLVS and bus mastership. - Populate bus info is based on DEFSLVS data and take care of hot plugged / unplugged I3C devices. - Split bus_init into bus_init and master_set_info callbacks - Moved mastership aquire and handover to separate state machines. - Added DEFSLVS processing code. - Moved back all locks in side the subsystem code. - Secondary mastership support to Cadence I3C master controller driver - Sysfs key 'i3c_acquire_bus' to acauire bus. - NULL check for pool pointer in i3c_generic_ibi_free_pool. Main changes between v4 and v5 are: - Add populate_bus() hook - Split i3c_master_register into init and register pair - Split device information retrieval, let add partialy discovered devices - Make i3c_master_set_info private - Add separate function to register secondary master - Reworked secondary master register in CDNS driver - Export i3c_bus_set_mode Main changes between v3 and v4 are: - Reworked acquire bus ownership - Refactored the code Main changes between v2 and v3 are: - Added DEFSLVS devices are registered from master driver - Reworked I2C registering on secondary master side - Reworked Mastership event is enabled/disabled globally (for all devices) Main changes between initial version and v2 are: - Reworked devices registration on secondary master side - Reworked mastership event disabling/enabling - Reworked bus locking during mastership takeover process - Added DEFSLVS devices registration during initialization - Fixed style issues Parshuram Thombare (7): i3c: master: master initialization flow document i3c: master: use i3c_master_register only for main master i3c: master: add i3c_secondary_master_register i3c: master: add mastership handover support i3c: master: add defslvs processing i3c: master: sysfs key for acquire bus i3c: master: mastership handover, defslvs processing in cdns controller driver Documentation/driver-api/i3c/index.rst| 1 + .../i3c/master-initialization-flow.rst| 190 +++ drivers/i3c/master.c | 486 -- drivers/i3c/master/dw-i3c-master.c| 4 +- drivers/i3c/master/i3c-master-cdns.c | 329 +++- include/linux/i3c/master.h| 23 +- 6 files changed, 964 insertions(+), 69 deletions(-) create mode 100644 Documentation/driver-api/i3c/master-initialization-flow.rst -- 2.17.1
[PATCH v8 1/7] i3c: master: master initialization flow document
Document describing master initialization, mastership handover
and DEFSLVS handling processes.
Signed-off-by: Parshuram Thombare
---
Documentation/driver-api/i3c/index.rst| 1 +
.../i3c/master-initialization-flow.rst| 187 ++
2 files changed, 188 insertions(+)
create mode 100644 Documentation/driver-api/i3c/master-initialization-flow.rst
diff --git a/Documentation/driver-api/i3c/index.rst
b/Documentation/driver-api/i3c/index.rst
index 783d6dad054b..604f1c5e4a5b 100644
--- a/Documentation/driver-api/i3c/index.rst
+++ b/Documentation/driver-api/i3c/index.rst
@@ -9,3 +9,4 @@ I3C subsystem
protocol
device-driver-api
master-driver-api
+ master-initialization-flow
diff --git a/Documentation/driver-api/i3c/master-initialization-flow.rst
b/Documentation/driver-api/i3c/master-initialization-flow.rst
new file mode 100644
index ..b5849f4e229e
--- /dev/null
+++ b/Documentation/driver-api/i3c/master-initialization-flow.rst
@@ -0,0 +1,187 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+==
+I3C Master Initialization Flow
+==
+
+.. kernel-render:: DOT
+ :alt: I3C Master Initialization digraph
+ :caption: I3C Master Initialization Flow
+
+ digraph master_init {
+ ranksep=.25; size="35,35";
+ subgraph cluster_0 {
+ style=dashed
+ x0[shape=ellipse, label="I3C driver probe", style="filled"]
+ x1[shape=diamond, label="Secondary Master ?"]
+ a1[shape=box, label="Do I3C master controller specific
initialization"]
+ b1[shape=box, label="Do I3C master controller specific
initialization,\n
+ except enabling the DEFSLVS interrupt."]
+ a2[shape=box, label="Call i3c_primary_master_register"]
+ b2[shape=box, label="Call i3c_secondary_master_register"]
+ x0->x1;
+ x1->a1[label="No"];
+ x1->b1[label="Yes"];
+ a1->a2; b1->b2;
+ }
+
+ subgraph cluster_1 {
+ style=dashed
+ label="Current Master";
+ a3[shape=ellipse, label="i3c_primary_master_register",
style="filled"]
+ a4[shape=box, label="Initialize I3C master controller object."]
+ a5[shape=box, label="Create I2C objects for devices in DTS and add
to I2C list."]
+ a6[shape=box, label="Set appropriate bus mode based on I2C devices
information."]
+ a7[shape=box, label="Create a work queue."]
+ a8[shape=box, label="Call i3c_primary_master_bus_init"]
+ a19[shape=box, label="Add I3C object representing this master to
the system."]
+ a20[shape=box, label="Expose our I3C bus as an I2C adapter so that
I2C devices\n
+ are exposed through the I2C subsystem."]
+ a21[shape=box, label="Register all I3C devices."]
+ a22[shape=box, label="Broadcast ENEC MR, HJ message."]
+ a3->a4->a5->a6->a7->a8; a19->a20->a21->a22;
+ a8->a19[style="invisible"];
+ }
+
+ subgraph cluster_2 {
+ style=dashed
+ label="Current Master";
+ a9[shape=ellipse, label="i3c_primary_master_bus_init",
style="filled"]
+ a10[shape=box, label="Call bus_init to do controller specific bus
initialization\n
+ and enabling the controller."]
+ a11[shape=box, label="Create I3C object representing the master and
add it to\n
+ the I3C device list."]
+ a12[shape=box, label="Set current master to the object created to
represent I3C\n
+ master device."]
+ a13[shape=box, label="Reset all dynamic address that may have been
assigned before."]
+ a14[shape=box, label="Disable all slave events before starting
DAA."]
+ a15[shape=box, label="Pre-assign dynamic address and retrieve
device information."]
+ a16[shape=box, label="Do dynamic address assignment to all I3C
devices currenly\n
+ present on the bus."]
+ a17[shape=box, label="Create I3C objects representing devices found
during DAA."]
+ a18[shape=box, label="Send DEFSVLS message containing information
about all\n
+ known I3C and I2C devices."]
+ a9->a10->a11->a12->a13->a14->a15->a16->a17->a18;
+ }
+
+ subgraph cluster_3 {
+ style=dashed
+ label="Current Master";
+ h1[shape=ellipse, label="MR request interrupt", style="filled"]
+ h2[shape=box, label="Bottom half i3c_master_yield_bus"]
+ h1->h2;
+ }
+
+ subgraph cluster_4 {
+ style=dashed
+ label="Current Master";
+ i1[shape=ellipse, label="i3c_master_yield_bus", style="filled"]
+ i2[shape=box, label="Check if this device is still a master to
handle a case of\n
+ multiple MR requests from different devices at a same time."]
+ i3[shape=box, label="Broadcast DISEC MR, HJ message.\n
+ New master sh
Re: [PATCHSET v5 0/12] Add support for async buffered reads
On Sun, May 31, 2020 at 9:04 AM Sedat Dilek wrote:
>
> On Sun, May 31, 2020 at 3:57 AM Jens Axboe wrote:
> >
> > On 5/30/20 12:57 PM, Sedat Dilek wrote:
> > > Here are the numbers with your patchset:
> > >
> > > # cat systemd-analyze-time_5.7.0-rc7-4-amd64-clang_2nd-try.txt
> > > Startup finished in 7.229s (kernel) + 1min 18.304s (userspace) = 1min
> > > 25.534s
> > > graphical.target reached after 1min 18.286s in userspace
> >
> > Can you see if this makes a difference?
> >
> > diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
> > index c296463c15eb..ccb895f911b1 100644
> > --- a/include/linux/blk_types.h
> > +++ b/include/linux/blk_types.h
> > @@ -374,8 +374,7 @@ enum req_flag_bits {
> > #define REQ_INTEGRITY (1ULL << __REQ_INTEGRITY)
> > #define REQ_FUA(1ULL << __REQ_FUA)
> > #define REQ_PREFLUSH (1ULL << __REQ_PREFLUSH)
> > -#define REQ_RAHEAD \
> > - ((1ULL << __REQ_RAHEAD) | (1ULL << __REQ_NOWAIT))
> > +#define REQ_RAHEAD (1ULL << __REQ_RAHEAD)
> > #define REQ_BACKGROUND (1ULL << __REQ_BACKGROUND)
> > #define REQ_NOWAIT (1ULL << __REQ_NOWAIT)
> > #define REQ_CGROUP_PUNT(1ULL << __REQ_CGROUP_PUNT)
> >
>
> Looks good!
>
> With your patch I now get...
>
> # cat systemd-analyze-time_5.7.0-rc7-6-amd64-clang.txt
> Startup finished in 6.199s (kernel) + 45.143s (userspace) = 51.343s
> graphical.target reached after 45.123s in userspace
>
> # cat systemd-analyze-blame_5.7.0-rc7-6-amd64-clang.txt
> 25.029s udisks2.service
> 24.582s accounts-daemon.service
> 19.257s dev-sdc2.device
> 18.016s polkit.service
> 17.857s avahi-daemon.service
> 17.730s NetworkManager.service
> 17.433s rtkit-daemon.service
> 16.558s switcheroo-control.service
> 16.547s wpa_supplicant.service
> 16.538s systemd-logind.service
> 16.078s smartmontools.service
> 14.982s fwupd-refresh.service
> 14.580s NetworkManager-wait-online.service
> 13.630s zramswap.service
> 11.286s fwupd.service
> 8.153s rsyslog.service
> 6.858s gpm.service
> 6.835s e2scrub_reap.service
> 6.449s ModemManager.service
> 6.439s networking.service
> 5.881s packagekit.service
> 3.696s systemd-udevd.service
> 3.322s apparmor.service
> 3.277s exim4.service
> 2.910s alsa-restore.service
> 1.611s systemd-tmpfiles-setup.service
> 1.540s bluetooth.service
> 1.448s systemd-journal-flush.service
> 1.353s keyboard-setup.service
> 1.322s atd.service
> 1.239s systemd-modules-load.service
> 1.216s binfmt-support.service
> 1.060s modprobe@drm.service
> 994ms systemd-journald.service
> 983ms upower.service
> 937ms systemd-sysusers.service
> 914ms ifupdown-wait-online.service
> 904ms pppd-dns.service
> 710ms systemd-udev-trigger.service
> 666ms dev-hugepages.mount
> 650ms dev-mqueue.mount
> 649ms sys-kernel-debug.mount
> 647ms sys-kernel-tracing.mount
> 607ms console-setup.service
> 590ms systemd-tmpfiles-setup-dev.service
> 570ms systemd-timesyncd.service
> 508ms systemd-random-seed.service
> 461ms systemd-backlight@backlight:intel_backlight.service
> 433ms user@1000.service
> 422ms systemd-remount-fs.service
> 365ms systemd-sysctl.service
> 279ms kmod-static-nodes.service
> 246ms proc-sys-fs-binfmt_misc.mount
> 202ms systemd-rfkill.service
> 130ms systemd-user-sessions.service
> 104ms systemd-update-utmp.service
>25ms user-runtime-dir@1000.service
>14ms systemd-update-utmp-runlevel.service
> 6ms sys-fs-fuse-connections.mount
> 4ms ifupdown-pre.service
>
> # cat systemd-analyze-critical-chain_5.7.0-rc7-6-amd64-clang.txt
> The time when unit became active or started is printed after the "@"
> character.
> The time the unit took to start is printed after the "+" character.
>
> graphical.target @45.123s
> └─multi-user.target @45.122s
> └─exim4.service @41.842s +3.277s
> └─network-online.target @41.840s
> └─NetworkManager-wait-online.service @27.259s +14.580s
> └─NetworkManager.service @9.522s +17.730s
> └─dbus.service @9.514s
> └─basic.target @9.328s
> └─sockets.target @9.327s
> └─dbus.socket @9.327s
> └─sysinit.target @9.202s
>
> └─systemd-backlight@backlight:intel_backlight.service @21.927s +461ms
> └─system-systemd\x2dbacklight.slice @21.925s
> └─system.slice @2.529s
> └─-.slice @2.529s
>
> Will you send a separate patch on this?
>
> Feel free to add:
> Reported-by: Sedat Dilek
> Tested-by: Sedat Dilek
>
> My kernel-config and dmesg-output are attached.
>
> Thanks Jens!
>
2nd-try (reboot into system with activated WLAN before startup)...
# systemd-analyze --no-pager time
Startup finished in 6.044s (kernel) + 41.370s (userspace) = 47.414s
graphical.target reached after 40.431s in userspace
# systemd-analyze --no-pager blame | head -20
24.674s udisks2.service
24.348s accounts-daemon.service
19.504s dev-sdc2.dev
[PATCH v8 2/7] i3c: master: use i3c_master_register only for main master
Removed last argument 'secondary' and restructured
i3c_master_register to move code that can be common
to i3c_secondary_master_register to separate function
i3c_master_init.
Signed-off-by: Parshuram Thombare
---
drivers/i3c/master.c | 74 +---
drivers/i3c/master/dw-i3c-master.c | 4 +-
drivers/i3c/master/i3c-master-cdns.c | 4 +-
include/linux/i3c/master.h | 7 ++-
4 files changed, 51 insertions(+), 38 deletions(-)
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 5f4bd52121fe..574c3603db38 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -1613,7 +1613,7 @@ static void i3c_master_detach_free_devs(struct
i3c_master_controller *master)
}
/**
- * i3c_master_bus_init() - initialize an I3C bus
+ * i3c_primary_master_bus_init() - initialize an I3C bus
* @master: main master initializing the bus
*
* This function is following all initialisation steps described in the I3C
@@ -1642,7 +1642,7 @@ static void i3c_master_detach_free_devs(struct
i3c_master_controller *master)
*
* Return: a 0 in case of success, an negative error code otherwise.
*/
-static int i3c_master_bus_init(struct i3c_master_controller *master)
+static int i3c_primary_master_bus_init(struct i3c_master_controller *master)
{
enum i3c_addr_slot_status status;
struct i2c_dev_boardinfo *i2cboardinfo;
@@ -2391,31 +2391,10 @@ static int i3c_master_check_ops(const struct
i3c_master_controller_ops *ops)
return 0;
}
-/**
- * i3c_master_register() - register an I3C master
- * @master: master used to send frames on the bus
- * @parent: the parent device (the one that provides this I3C master
- * controller)
- * @ops: the master controller operations
- * @secondary: true if you are registering a secondary master. Will return
- *-ENOTSUPP if set to true since secondary masters are not yet
- *supported
- *
- * This function takes care of everything for you:
- *
- * - creates and initializes the I3C bus
- * - populates the bus with static I2C devs if @parent->of_node is not
- * NULL
- * - registers all I3C devices added by the controller during bus
- * initialization
- * - registers the I2C adapter and all I2C devices
- *
- * Return: 0 in case of success, a negative error code otherwise.
- */
-int i3c_master_register(struct i3c_master_controller *master,
- struct device *parent,
- const struct i3c_master_controller_ops *ops,
- bool secondary)
+static int i3c_master_init(struct i3c_master_controller *master,
+ struct device *parent,
+ const struct i3c_master_controller_ops *ops,
+ bool secondary)
{
struct i3c_bus *i3cbus = i3c_master_get_bus(master);
enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
@@ -2478,10 +2457,46 @@ int i3c_master_register(struct i3c_master_controller
*master,
goto err_put_dev;
}
- ret = i3c_master_bus_init(master);
+ ret = i3c_primary_master_bus_init(master);
if (ret)
goto err_put_dev;
+ return 0;
+
+err_put_dev:
+ put_device(&master->dev);
+
+ return ret;
+}
+
+/**
+ * i3c_primary_master_register() - register an I3C master
+ * @master: master used to send frames on the bus
+ * @parent: the parent device (the one that provides this I3C master
+ * controller)
+ * @ops: the master controller operations
+ *
+ * This function takes care of everything for you:
+ *
+ * - creates and initializes the I3C bus
+ * - populates the bus with static I2C devs if @parent->of_node is not
+ * NULL
+ * - registers all I3C devices added by the controller during bus
+ * initialization
+ * - registers the I2C adapter and all I2C devices
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int i3c_primary_master_register(struct i3c_master_controller *master,
+ struct device *parent,
+ const struct i3c_master_controller_ops *ops)
+{
+ int ret;
+
+ ret = i3c_master_init(master, parent, ops, false);
+ if (ret)
+ return ret;
+
ret = device_add(&master->dev);
if (ret)
goto err_cleanup_bus;
@@ -2511,12 +2526,11 @@ int i3c_master_register(struct i3c_master_controller
*master,
err_cleanup_bus:
i3c_master_bus_cleanup(master);
-err_put_dev:
put_device(&master->dev);
return ret;
}
-EXPORT_SYMBOL_GPL(i3c_master_register);
+EXPORT_SYMBOL_GPL(i3c_primary_master_register);
/**
* i3c_master_unregister() - unregister an I3C master
diff --git a/drivers/i3c/master/dw-i3c-master.c
b/drivers/i3c/master/dw-i3c-master.c
index 1d83c97431c7..47d47aa97569 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -1157,8 +1157,8 @@ static int dw_i3c_probe(struct pla
[PATCH v8 3/7] i3c: master: add i3c_secondary_master_register
add i3c_secondary_master_register which is used
to register secondary masters.
Signed-off-by: Parshuram Thombare
---
drivers/i3c/master.c | 154 -
include/linux/i3c/master.h | 3 +
2 files changed, 156 insertions(+), 1 deletion(-)
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 574c3603db38..62f39997a6db 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -1768,6 +1768,90 @@ static int i3c_primary_master_bus_init(struct
i3c_master_controller *master)
return ret;
}
+/**
+ * i3c_secondary_master_bus_init() - initialize an I3C bus for secondary
+ * master
+ * @master: secondary master initializing the bus
+ *
+ * This function does
+ *
+ * 1. Attach I2C devs to the master
+ *
+ * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
+ *the master controller. That's usually where the bus mode is selected
+ *(pure bus or mixed fast/slow bus)
+ *
+ * Once this is done, I2C devices should be usable.
+ *
+ * Return: a 0 in case of success, an negative error code otherwise.
+ */
+static int i3c_secondary_master_bus_init(struct i3c_master_controller *master)
+{
+ enum i3c_addr_slot_status status;
+ struct i2c_dev_boardinfo *i2cboardinfo;
+ struct i2c_dev_desc *i2cdev;
+ int ret;
+
+ /*
+* First attach all devices with static definitions provided by the
+* FW.
+*/
+ list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
+ status = i3c_bus_get_addr_slot_status(&master->bus,
+ i2cboardinfo->base.addr);
+ if (status != I3C_ADDR_SLOT_FREE) {
+ ret = -EBUSY;
+ goto err_detach_devs;
+ }
+
+ i3c_bus_set_addr_slot_status(&master->bus,
+i2cboardinfo->base.addr,
+I3C_ADDR_SLOT_I2C_DEV);
+
+ i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
+ if (IS_ERR(i2cdev)) {
+ ret = PTR_ERR(i2cdev);
+ goto err_detach_devs;
+ }
+
+ ret = i3c_master_attach_i2c_dev(master, i2cdev);
+ if (ret) {
+ i3c_master_free_i2c_dev(i2cdev);
+ goto err_detach_devs;
+ }
+ }
+
+ /*
+* Now execute the controller specific ->bus_init() routine, which
+* might configure its internal logic to match the bus limitations.
+*/
+ ret = master->ops->bus_init(master);
+ if (ret)
+ goto err_detach_devs;
+
+ /*
+* The master device should have been instantiated in ->bus_init(),
+* complain if this was not the case.
+*/
+ if (!master->this) {
+ dev_err(&master->dev,
+ "master_set_info() was not called in ->bus_init()\n");
+ ret = -EINVAL;
+ goto err_bus_cleanup;
+ }
+
+ return 0;
+
+err_bus_cleanup:
+ if (master->ops->bus_cleanup)
+ master->ops->bus_cleanup(master);
+
+err_detach_devs:
+ i3c_master_detach_free_devs(master);
+
+ return ret;
+}
+
static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
{
if (master->ops->bus_cleanup)
@@ -2457,7 +2541,10 @@ static int i3c_master_init(struct i3c_master_controller
*master,
goto err_put_dev;
}
- ret = i3c_primary_master_bus_init(master);
+ if (secondary)
+ ret = i3c_secondary_master_bus_init(master);
+ else
+ ret = i3c_primary_master_bus_init(master);
if (ret)
goto err_put_dev;
@@ -2532,6 +2619,71 @@ int i3c_primary_master_register(struct
i3c_master_controller *master,
}
EXPORT_SYMBOL_GPL(i3c_primary_master_register);
+/**
+ * i3c_secondary_master_register() - register an I3C secondary master
+ * @master: master used to send frames on the bus
+ * @parent: the parent device (the one that provides this I3C master
+ * controller)
+ * @ops: the master controller operations
+ *
+ * This function does minimal required initialization for secondary
+ * master, rest functionality like creating and registering I2C
+ * and I3C devices is done in defslvs processing.
+ *
+ * i3c_secondary_master_register() does following things -
+ * - creates and initializes the I3C bus
+ * - populates the bus with static I2C devs if @parent->of_node is not
+ * NULL
+ * initialization
+ * - allocate memory for defslvs_data.devs, which is used to receive
+ * defslvs list
+ * - create I3C device representing this master
+ * - registers the I2C adapter and all I2C devices
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int i3c_secondary_master_register(struct i3c_master_controller *master,
+
[PATCH v8 4/7] i3c: master: add mastership handover support
Added mastership acquire and yield functions.
Signed-off-by: Parshuram Thombare
---
drivers/i3c/master.c | 176 +++--
include/linux/i3c/master.h | 6 ++
2 files changed, 173 insertions(+), 9 deletions(-)
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index 62f39997a6db..f9ab21e8f6ee 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -43,6 +43,16 @@ static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
down_write(&bus->lock);
}
+/**
+ * i3c_bus_maintenance_downgrade_lock - Downgrade maintenance lock to
+ * normaluse lock.
+ * @bus: I3C bus to take the lock on
+ */
+static void i3c_bus_maintenance_downgrade_lock(struct i3c_bus *bus)
+{
+ downgrade_write(&bus->lock);
+}
+
/**
* i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
* operation
@@ -467,6 +477,59 @@ static const char * const i3c_bus_mode_strings[] = {
[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
};
+static int i3c_master_enable_mr_events(struct i3c_master_controller *master)
+{
+ int ret;
+
+ master->ops->enable_mr_events(master);
+ i3c_bus_maintenance_lock(&master->bus);
+ ret = i3c_master_enec_locked(master, I3C_BROADCAST_ADDR,
+I3C_CCC_EVENT_MR | I3C_CCC_EVENT_HJ);
+ i3c_bus_maintenance_unlock(&master->bus);
+
+ return ret;
+}
+
+/**
+ * i3c_master_acquire_bus() - acquire I3C bus mastership
+ * @m: I3C master object
+ *
+ * This function may sleep.
+ * It is expected to be called with normaluse_lock.
+ */
+static int i3c_master_acquire_bus(struct i3c_master_controller *m)
+{
+ int ret = 0;
+
+ /*
+* Request mastership needs maintenance(write) lock. So, to avoid
+* deadlock, release normaluse(read) lock, which is expected to be
+* held before calling this function.
+* normaluse(read) lock is expected to be held before calling
+* this function to avoid race with maintenance activities
+* like DEFSLVS processing etc
+*/
+ i3c_bus_normaluse_unlock(&m->bus);
+ i3c_bus_maintenance_lock(&m->bus);
+
+ if (m->this && m->this == m->bus.cur_master) {
+ i3c_master_disec_locked(m, I3C_BROADCAST_ADDR,
+ I3C_CCC_EVENT_MR |
+ I3C_CCC_EVENT_HJ);
+ goto mr_req_done;
+ }
+
+ ret = m->ops->request_mastership(m);
+ if (ret)
+ goto mr_req_done;
+
+ m->bus.cur_master = m->this;
+
+mr_req_done:
+ i3c_bus_maintenance_downgrade_lock(&m->bus);
+ return ret;
+}
+
static ssize_t mode_show(struct device *dev,
struct device_attribute *da,
char *buf)
@@ -685,6 +748,33 @@ static int i3c_master_send_ccc_cmd_locked(struct
i3c_master_controller *master,
return 0;
}
+static int i3c_master_get_accmst_locked(struct i3c_master_controller *master,
+ u8 addr)
+{
+ struct i3c_ccc_getaccmst *accmst;
+ struct i3c_ccc_cmd_dest dest;
+ struct i3c_ccc_cmd cmd;
+ int ret;
+
+ accmst = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*accmst));
+ if (!accmst)
+ return -ENOMEM;
+
+ i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETACCMST, &dest, 1);
+
+ ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
+ if (ret)
+ goto out;
+
+ if (dest.payload.len != sizeof(*accmst))
+ ret = -EIO;
+
+out:
+ i3c_ccc_cmd_dest_cleanup(&dest);
+
+ return ret;
+}
+
static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
u16 addr)
@@ -1558,10 +1648,6 @@ int i3c_master_set_info(struct i3c_master_controller
*master,
if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
return -EINVAL;
- if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
- master->secondary)
- return -EINVAL;
-
if (master->this)
return -EINVAL;
@@ -1570,7 +1656,9 @@ int i3c_master_set_info(struct i3c_master_controller
*master,
return PTR_ERR(i3cdev);
master->this = i3cdev;
- master->bus.cur_master = master->this;
+
+ if (!master->secondary)
+ master->bus.cur_master = master->this;
ret = i3c_master_attach_i3c_dev(master, i3cdev);
if (ret)
@@ -1612,6 +1700,74 @@ static void i3c_master_detach_free_devs(struct
i3c_master_controller *master)
}
}
+/**
+ * i3c_master_yield_bus() - yield I3C bus mastership
+ * @m: I3C master object
+ * @sec_mst_dyn_addr: address of device requesting mastership
+ *
+ * This function may sleep.
+ * It is expected to be called with normaluse_lock.
+ */
+void
+i3c_master_yield_bus(struct i3c_master_controller *m, u8 sec_mst_
[PATCH v8 5/7] i3c: master: add defslvs processing
Added defslvs processing code to the I3C master subsystem.
Signed-off-by: Parshuram Thombare
---
drivers/i3c/master.c | 68 --
include/linux/i3c/master.h | 7
2 files changed, 73 insertions(+), 2 deletions(-)
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index f9ab21e8f6ee..de3cb39df9ff 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -2127,7 +2127,7 @@ int i3c_master_add_i3c_dev_locked(struct
i3c_master_controller *master,
else
expected_dyn_addr = newdev->info.dyn_addr;
- if (newdev->info.dyn_addr != expected_dyn_addr) {
+ if (!master->secondary && newdev->info.dyn_addr != expected_dyn_addr) {
/*
* Try to apply the expected dynamic address. If it fails, keep
* the address assigned by the master.
@@ -2804,12 +2804,20 @@ int i3c_secondary_master_register(struct
i3c_master_controller *master,
struct device *parent,
const struct i3c_master_controller_ops *ops)
{
- int ret;
+ int ret, sz;
ret = i3c_master_init(master, parent, ops, true);
if (ret)
return ret;
+ sz = sizeof(struct i3c_ccc_dev_desc) * I3C_BUS_MAX_DEVS;
+ master->defslvs_data.devs = devm_kzalloc(&master->dev, sz,
+GFP_KERNEL);
+ if (!master->defslvs_data.devs) {
+ ret = -ENOMEM;
+ goto err_cleanup_bus;
+ }
+
ret = device_add(&master->dev);
if (ret)
goto err_cleanup_bus;
@@ -2842,6 +2850,62 @@ int i3c_secondary_master_register(struct
i3c_master_controller *master,
}
EXPORT_SYMBOL_GPL(i3c_secondary_master_register);
+static int
+i3c_master_populate_bus(struct i3c_master_controller *master, u8 dyn_addr)
+{
+ struct i3c_dev_desc *olddev;
+ struct i3c_ccc_dev_desc *desc;
+ int ret, slot;
+
+ i3c_bus_for_each_i3cdev(&master->bus, olddev)
+ i3c_master_put_i3c_addrs(olddev);
+
+ master->this->info.dyn_addr = dyn_addr;
+ i3c_master_get_i3c_addrs(master->this);
+
+ desc = master->defslvs_data.devs;
+ for (slot = 1; slot < master->defslvs_data.ndevs; slot++) {
+ ret = i3c_master_add_i3c_dev_locked(master,
+ desc[slot].dyn_addr);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * i3c_master_process_defslvs() - process I3C device list received in
+ * DEFSLVS for device plug/unplug and address change.
+ * @m: I3C master object
+ * @dyn_addr: Current dynamic address of this device
+ *
+ * This function may sleep, so should not be called in the atomic context.
+ */
+int i3c_master_process_defslvs(struct i3c_master_controller *m, u8 dyn_addr)
+{
+ int ret;
+
+ i3c_bus_normaluse_lock(&m->bus);
+ ret = i3c_master_acquire_bus(m);
+ i3c_bus_normaluse_unlock(&m->bus);
+ if (ret)
+ return ret;
+
+ i3c_bus_maintenance_lock(&m->bus);
+ ret = i3c_master_populate_bus(m, dyn_addr);
+ i3c_bus_maintenance_unlock(&m->bus);
+ if (!ret) {
+ i3c_bus_normaluse_lock(&m->bus);
+ i3c_master_register_new_i3c_devs(m);
+ i3c_bus_normaluse_unlock(&m->bus);
+ }
+ i3c_master_enable_mr_events(m);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(i3c_master_process_defslvs);
+
/**
* i3c_master_unregister() - unregister an I3C master
* @master: master used to send frames on the bus
diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h
index 693b920bfd54..48803736ba17 100644
--- a/include/linux/i3c/master.h
+++ b/include/linux/i3c/master.h
@@ -471,6 +471,8 @@ struct i3c_master_controller_ops {
* in a thread context. Typical examples are Hot Join processing which
* requires taking the bus lock in maintenance, which in turn, can only
* be done from a sleep-able context
+ * @defslvs_data: list used to pass i3c device list received in DEFSLVS
message,
+ * from DEFSLVS controller driver to I3C core
*
* A &struct i3c_master_controller has to be registered to the I3C subsystem
* through i3c_master_register(). None of &struct i3c_master_controller fields
@@ -490,6 +492,10 @@ struct i3c_master_controller {
} boardinfo;
struct i3c_bus bus;
struct workqueue_struct *wq;
+ struct {
+ u32 ndevs;
+ struct i3c_ccc_dev_desc *devs;
+ } defslvs_data;
};
/**
@@ -516,6 +522,7 @@ struct i3c_master_controller {
void i3c_master_yield_bus(struct i3c_master_controller *m,
u8 sec_mst_dyn_addr);
+int i3c_master_process_defslvs(struct i3c_master_controller *m, u8 dyn_addr);
int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
const struc
[PATCH v8 6/7] i3c: master: sysfs key for acquire bus
Added support to acquire I3C bus through sysfs interface.
Signed-off-by: Parshuram Thombare
---
drivers/i3c/master.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c
index de3cb39df9ff..17c0c9a6099d 100644
--- a/drivers/i3c/master.c
+++ b/drivers/i3c/master.c
@@ -596,6 +596,23 @@ static ssize_t i2c_scl_frequency_show(struct device *dev,
}
static DEVICE_ATTR_RO(i2c_scl_frequency);
+static ssize_t i3c_acquire_bus_store(struct device *dev,
+struct device_attribute *attr,
+const char *buf, size_t count)
+{
+ struct i3c_master_controller *master = dev_to_i3cmaster(dev);
+ int ret;
+
+ i3c_bus_normaluse_lock(&master->bus);
+ ret = i3c_master_acquire_bus(master);
+ i3c_bus_normaluse_unlock(&master->bus);
+ if (!ret)
+ i3c_master_enable_mr_events(master);
+
+ return ret ?: count;
+}
+static DEVICE_ATTR_WO(i3c_acquire_bus);
+
static struct attribute *i3c_masterdev_attrs[] = {
&dev_attr_mode.attr,
&dev_attr_current_master.attr,
@@ -606,6 +623,7 @@ static struct attribute *i3c_masterdev_attrs[] = {
&dev_attr_pid.attr,
&dev_attr_dynamic_address.attr,
&dev_attr_hdrcap.attr,
+ &dev_attr_i3c_acquire_bus.attr,
NULL,
};
ATTRIBUTE_GROUPS(i3c_masterdev);
--
2.17.1
[PATCH] staging: gasket: Convert get_user_pages*() --> pin_user_pages*()
In 2019, we introduced pin_user_pages*() and now we are converting
get_user_pages*() to the new API as appropriate. [1] & [2] could
be referred for more information.
[1] Documentation/core-api/pin_user_pages.rst
[2] "Explicit pinning of user-space pages":
https://lwn.net/Articles/807108/
Signed-off-by: Souptick Joarder
Cc: John Hubbard
Cc: Dan Carpenter
---
Hi,
I'm compile tested this, but unable to run-time test, so any testing
help is much appriciated.
drivers/staging/gasket/gasket_page_table.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index f6d7157..d712ad4 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -449,7 +449,7 @@ static bool gasket_release_page(struct page *page)
if (!PageReserved(page))
SetPageDirty(page);
- put_page(page);
+ unpin_user_page(page);
return true;
}
@@ -486,12 +486,12 @@ static int gasket_perform_mapping(struct
gasket_page_table *pg_tbl,
ptes[i].dma_addr = pg_tbl->coherent_pages[0].paddr +
off + i * PAGE_SIZE;
} else {
- ret = get_user_pages_fast(page_addr - offset, 1,
+ ret = pin_user_pages_fast(page_addr - offset, 1,
FOLL_WRITE, &page);
if (ret <= 0) {
dev_err(pg_tbl->device,
- "get user pages failed for addr=0x%lx,
offset=0x%lx [ret=%d]\n",
+ "pin user pages failed for addr=0x%lx,
offset=0x%lx [ret=%d]\n",
page_addr, offset, ret);
return ret ? ret : -ENOMEM;
}
--
1.9.1
[PATCH v8 7/7] i3c: master: mastership handover, defslvs processing in cdns controller driver
Added I3C bus mastership handover and DEFSLVS message handling
code to Cadence's I3C master controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/i3c/master/i3c-master-cdns.c | 329 +--
1 file changed, 306 insertions(+), 23 deletions(-)
diff --git a/drivers/i3c/master/i3c-master-cdns.c
b/drivers/i3c/master/i3c-master-cdns.c
index c7db02543e33..fa54725be47c 100644
--- a/drivers/i3c/master/i3c-master-cdns.c
+++ b/drivers/i3c/master/i3c-master-cdns.c
@@ -157,6 +157,7 @@
#define SLV_IMR0x48
#define SLV_ICR0x4c
#define SLV_ISR0x50
+#define SLV_INT_DEFSLVSBIT(21)
#define SLV_INT_TM BIT(20)
#define SLV_INT_ERROR BIT(19)
#define SLV_INT_EVENT_UP BIT(18)
@@ -189,7 +190,7 @@
#define SLV_STATUS1_HJ_DIS BIT(18)
#define SLV_STATUS1_MR_DIS BIT(17)
#define SLV_STATUS1_PROT_ERR BIT(16)
-#define SLV_STATUS1_DA(x) (((s) & GENMASK(15, 9)) >> 9)
+#define SLV_STATUS1_DA(s) (((s) & GENMASK(15, 9)) >> 9)
#define SLV_STATUS1_HAS_DA BIT(8)
#define SLV_STATUS1_DDR_RX_FULLBIT(7)
#define SLV_STATUS1_DDR_TX_FULLBIT(6)
@@ -390,6 +391,9 @@ struct cdns_i3c_xfer {
struct cdns_i3c_master {
struct work_struct hj_work;
+ struct work_struct mr_yield_work;
+ struct work_struct defslvs_work;
+ struct completion mr_done;
struct i3c_master_controller base;
u32 free_rr_slots;
unsigned int maxdevs;
@@ -408,6 +412,7 @@ struct cdns_i3c_master {
struct clk *pclk;
struct cdns_i3c_master_caps caps;
unsigned long i3c_scl_lim;
+ u8 mr_addr;
};
static inline struct cdns_i3c_master *
@@ -1187,10 +1192,6 @@ static int cdns_i3c_master_do_daa(struct
i3c_master_controller *m)
cdns_i3c_master_upd_i3c_scl_lim(master);
- /* Unmask Hot-Join and Mastership request interrupts. */
- i3c_master_enec_locked(m, I3C_BROADCAST_ADDR,
- I3C_CCC_EVENT_HJ | I3C_CCC_EVENT_MR);
-
return 0;
}
@@ -1199,21 +1200,21 @@ static int cdns_i3c_master_bus_init(struct
i3c_master_controller *m)
struct cdns_i3c_master *master = to_cdns_i3c_master(m);
unsigned long pres_step, sysclk_rate, max_i2cfreq;
struct i3c_bus *bus = i3c_master_get_bus(m);
- u32 ctrl, prescl0, prescl1, pres, low;
+ u32 ctrl, prescl0, prescl1, pres, low, bus_mode;
struct i3c_device_info info = { };
int ret, ncycles;
switch (bus->mode) {
case I3C_BUS_MODE_PURE:
- ctrl = CTRL_PURE_BUS_MODE;
+ bus_mode = CTRL_PURE_BUS_MODE;
break;
case I3C_BUS_MODE_MIXED_FAST:
- ctrl = CTRL_MIXED_FAST_BUS_MODE;
+ bus_mode = CTRL_MIXED_FAST_BUS_MODE;
break;
case I3C_BUS_MODE_MIXED_SLOW:
- ctrl = CTRL_MIXED_SLOW_BUS_MODE;
+ bus_mode = CTRL_MIXED_SLOW_BUS_MODE;
break;
default:
@@ -1244,7 +1245,6 @@ static int cdns_i3c_master_bus_init(struct
i3c_master_controller *m)
bus->scl_rate.i2c = sysclk_rate / ((pres + 1) * 5);
prescl0 |= PRESCL_CTRL0_I2C(pres);
- writel(prescl0, master->regs + PRESCL_CTRL0);
/* Calculate OD and PP low. */
pres_step = 10 / (bus->scl_rate.i3c * 4);
@@ -1252,7 +1252,6 @@ static int cdns_i3c_master_bus_init(struct
i3c_master_controller *m)
if (ncycles < 0)
ncycles = 0;
prescl1 = PRESCL_CTRL1_OD_LOW(ncycles);
- writel(prescl1, master->regs + PRESCL_CTRL1);
/* Get an address for the master. */
ret = i3c_master_get_free_addr(m, 0);
@@ -1270,13 +1269,21 @@ static int cdns_i3c_master_bus_init(struct
i3c_master_controller *m)
if (ret)
return ret;
+ ctrl = readl(master->regs + CTRL);
+ if (ctrl & CTRL_DEV_EN)
+ cdns_i3c_master_disable(master);
+ writel(prescl0, master->regs + PRESCL_CTRL0);
+ writel(prescl1, master->regs + PRESCL_CTRL1);
+ ctrl &= ~CTRL_BUS_MODE_MASK;
+ ctrl |= bus_mode | CTRL_HALT_EN | CTRL_MCS_EN;
/*
* Enable Hot-Join, and, when a Hot-Join request happens, disable all
* events coming from this device.
*
* We will issue ENTDAA afterwards from the threaded IRQ handler.
*/
- ctrl |= CTRL_HJ_ACK | CTRL_HJ_DISEC | CTRL_HALT_EN | CTRL_MCS_EN;
+ if (!m->secondary)
+ ctrl |= CTRL_HJ_ACK | CTRL_HJ_DISEC;
writel(ctrl, master->regs + CTRL);
cdns_i3c_master_enable(master);
@@ -1340,6 +1347,7 @@ static void cdns_i3c_master_handle_ibi(struct
cdns_i3c_master *master,
static void cnds_i3c_master_demux_ibis(struct cdns_i3c_master *master)
{
+
Re: Re: [PATCH v2] i2c: imx-lpi2c: Fix runtime PM imbalance on error in lpi2c_imx_master_enable()
Hi, Markus, > * How do you think about to replace the word “pairing” by “corresponding”? > > * Will it be helpful to add an imperative wording? > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?id=ffeb595d84811dde16a28b33d8a7cf26d51d51b3#n151 > > * Would you like to add the tag “Fixes” to the commit message? > > * Are you going to take such possibilities into account for any more patches? > Thank you for your advice! I will fix them soon in the next version of patch. Regards, Dinghao
Re: [PATCH] iommu/amd: Fix event counter availability check
Hi,
Adding Shuah Khan to Cc: I've noticed you've seen this issue on Ryzen 2400GE;
can you have a look at the patch? Would be nice to know if it fixes the
problem for you too.
Thanks.
Alexander
On Fri, 29 May 2020, Alexander Monakov wrote:
> The driver performs an extra check if the IOMMU's capabilities advertise
> presence of performance counters: it verifies that counters are writable
> by writing a hard-coded value to a counter and testing that reading that
> counter gives back the same value.
>
> Unfortunately it does so quite early, even before pci_enable_device is
> called for the IOMMU, i.e. when accessing its MMIO space is not
> guaranteed to work. On Ryzen 4500U CPU, this actually breaks the test:
> the driver assumes the counters are not writable, and disables the
> functionality.
>
> Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves
> the issue. This is the earliest point in amd_iommu_init_pci where the
> call succeeds on my laptop.
>
> Signed-off-by: Alexander Monakov
> Cc: Joerg Roedel
> Cc: Suravee Suthikulpanit
> Cc: io...@lists.linux-foundation.org
> ---
>
> PS. I'm seeing another hiccup with IOMMU probing on my system:
> pci :00:00.2: can't derive routing for PCI INT A
> pci :00:00.2: PCI INT A: not connected
>
> Hopefully I can figure it out, but I'd appreciate hints.
>
> drivers/iommu/amd_iommu_init.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
> index 5b81fd16f5fa..1b7ec6b6a282 100644
> --- a/drivers/iommu/amd_iommu_init.c
> +++ b/drivers/iommu/amd_iommu_init.c
> @@ -1788,8 +1788,6 @@ static int __init iommu_init_pci(struct amd_iommu
> *iommu)
> if (iommu->cap & (1UL << IOMMU_CAP_NPCACHE))
> amd_iommu_np_cache = true;
>
> - init_iommu_perf_ctr(iommu);
> -
> if (is_rd890_iommu(iommu->dev)) {
> int i, j;
>
> @@ -1891,8 +1889,10 @@ static int __init amd_iommu_init_pci(void)
>
> init_device_table_dma();
>
> - for_each_iommu(iommu)
> + for_each_iommu(iommu) {
> iommu_flush_all_caches(iommu);
> + init_iommu_perf_ctr(iommu);
> + }
>
> if (!ret)
> print_iommu_info();
>
> base-commit: 75caf310d16cc5e2f851c048cd597f5437013368
>
Red Hat Enterprise Linux 8 on Supercomputer Fugaku
Hello everyone, Outline of the Development of the Supercomputer Fugaku > OS Red Hat Enterprise Linux 8 ON Supercomputer Fugaku https://www.r-ccs.riken.jp/en/overview/aboutus https://www.r-ccs.riken.jp/en/ https://www.r-ccs.riken.jp/en/postk/project/outline Programming Language and Library CompilerFortran2008 & Fortran2018 subset C11 & GNU and Clang extensions C++14 & C++17 subset and GNU and Clang extensions OpenMP 4.5 & OpenMP 5.0 subset Java Parallel ProgrammingXcalableMP FDPS Script Language Python + Numpy + Scipy, Ruby Math LibraryBLAS, LAPACK, ScaLAPACK SSL II (Fujitsu) EigenExa, Kevd, Batched BLAS, 2.5D-PDGEMM System Software OS Red Hat Enterprise Linux 8(Red Hat Linux !) McKernel MPI Fujitsu MPI (Based on OpenMPI), RIKEN-MPICH (Based on MPICH) File IO LLIO Application-oriented file IO libraries
[PATCH] pinctrl: pxa: pxa2xx: Remove 'pxa2xx_pinctrl_exit()' which is unused and broken
Commit 6d33ee7a0534 ("pinctrl: pxa: Use devm_pinctrl_register() for pinctrl
registration")
has turned a 'pinctrl_register()' into 'devm_pinctrl_register()' in
'pxa2xx_pinctrl_init()'.
However, the corresponding 'pinctrl_unregister()' call in
'pxa2xx_pinctrl_exit()' has not been removed.
This is not an issue, because 'pxa2xx_pinctrl_exit()' is unused.
Remove it now to avoid some wondering in the future and save a few LoC.
Signed-off-by: Christophe JAILLET
---
If some some reason the function should be kept, at least it should be
only 'return 0;'
---
drivers/pinctrl/pxa/pinctrl-pxa2xx.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
b/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
index bddf2c5dd3bf..eab029a21643 100644
--- a/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
+++ b/drivers/pinctrl/pxa/pinctrl-pxa2xx.c
@@ -425,15 +425,6 @@ int pxa2xx_pinctrl_init(struct platform_device *pdev,
}
EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_init);
-int pxa2xx_pinctrl_exit(struct platform_device *pdev)
-{
- struct pxa_pinctrl *pctl = platform_get_drvdata(pdev);
-
- pinctrl_unregister(pctl->pctl_dev);
- return 0;
-}
-EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_exit);
-
MODULE_AUTHOR("Robert Jarzmik ");
MODULE_DESCRIPTION("Marvell PXA2xx pinctrl driver");
MODULE_LICENSE("GPL v2");
--
2.25.1
[PATCH] bloat-o-meter: Support comparing library archives
Library archives (.a) usually contain multiple object files so their
output of nm --size-sort contains lines like:
03a8 t run_test
extent-map-tests.o:
bloat-o-meter currently doesn't handle them which results in errors
when calling .split() on them. Fix this by simply ignoring them. This
enables diffing subsystems which generate built-in.a files.
Signed-off-by: Nikolay Borisov
---
scripts/bloat-o-meter | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/bloat-o-meter b/scripts/bloat-o-meter
index 8c965f6a9881..d7ca46c612b3 100755
--- a/scripts/bloat-o-meter
+++ b/scripts/bloat-o-meter
@@ -26,6 +26,8 @@ re_NUMBER = re.compile(r'\.[0-9]+')
sym = {}
with os.popen("nm --size-sort " + file) as f:
for line in f:
+if line.startswith("\n") or ":" in line:
+continue
size, type, name = line.split()
if type in format:
# strip generated symbols
--
2.17.1
Re: [GIT PULL] sh: remove sh5 support
On 5/31/20 5:20 AM, Rob Landley wrote: > On 5/30/20 3:08 AM, John Paul Adrian Glaubitz wrote: >> On 5/29/20 7:53 PM, Rich Felker wrote: >>> Frustratingly, I _still_ don't have an official tree on kernel.org for >>> the purpose of being the canonical place for linux-next to pull from, >>> due to policies around pgp keys and nobody following up on signing >>> mine. This is all really silly since there are ridiculously many >>> independent channels I could cryptographically validate identity >>> through with vanishing probability that they're all compromised. For >>> the time being I'll reactivate my repo on git.musl-libc.org. >> >> May I suggest to pick up these patches, for example? There might be >> more I missed, but getting these merged should already help a lot with >> the clean-up of arch/sh. > > Does that include the 2 fixes to build with current binutils I made puppy eyes > about last -rc7 (in march)? > > https://marc.info/?l=linux-sh&m=158544749818664&w=2 Yes, listed as "[PATCH 1/2] arch/sh: vmlinux.scr". @Rich: Do you think you can merge all those fixes in your local tree within the next days and send a PR to Linus? Otherwise, I can volunteer to become a third maintainer for arch/sh as I have the hardware for testing and can accept patches and send PRs. We shouldn't let contributors to arch/sh wait for too long. Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer - glaub...@debian.org `. `' Freie Universitaet Berlin - glaub...@physik.fu-berlin.de `-GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
Re: [PATCH] drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> When gk20a_clk_ctor() returns an error code, pointer "clk" > should be released. Such an information is reasonable. > It's the same when gm20b_clk_new() returns from elsewhere following this call. I suggest to reconsider the interpretation of the software situation once more. Can it be that the allocated clock object should be kept usable even after a successful return from this function? Would you like to add the tag “Fixes” to the commit message? Regards, Markus
Re: [PATCH] drm/qxl: Replace deprecated function in qxl_display
On Sun, May 24, 2020 at 07:42:25AM +1000, David Airlie wrote:
> On Sun, May 24, 2020 at 2:02 AM Sidong Yang wrote:
> >
> > Hi, Dave.
> >
> > I'm a newbie kernel developer interested in qxl driver. And I want to
> > participate in
> > contributing for QXL module.
> > I wrote some simple patch for refactoring task found in todos in gpu
> > documentation.
> > I want to know it's okay to contribute and write some patch for qxl module.
> > If this patch is wrong, please give me some advice for me.
> > Or if you have some simple task for me, I'll be glad to do it.
> > Thanks.
>
> Hi Sidong,
>
> The best way to start is probably to email dri-devel list rather than
> just me, there are a few more people there who can help with
> onboarding and accepting patches.
>
> For QXL, Gerd Hoffmann (kra...@redhat.com) is also worth cc'ing as he
> is mostly maintaining it at the moment.
>
> Dave.
>
Thanks so much for advice Dave.
I'll add cc for qxl maintainer and dri-devel in next patch.
Sidong.
>
> >
> > Sincerely,
> > Sidong.
> >
> > Replace deprecated function drm_modeset_lock/unlock_all with
> > helper function DRM_MODESET_LOCK_ALL_BEGIN/END.
> >
> > Signed-off-by: Sidong Yang
> > ---
> > drivers/gpu/drm/qxl/qxl_display.c | 21 +++--
> > 1 file changed, 11 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/qxl/qxl_display.c
> > b/drivers/gpu/drm/qxl/qxl_display.c
> > index 1082cd5d2fd4..07e164cee868 100644
> > --- a/drivers/gpu/drm/qxl/qxl_display.c
> > +++ b/drivers/gpu/drm/qxl/qxl_display.c
> > @@ -162,7 +162,8 @@ static void qxl_update_offset_props(struct qxl_device
> > *qdev)
> > void qxl_display_read_client_monitors_config(struct qxl_device *qdev)
> > {
> > struct drm_device *dev = &qdev->ddev;
> > - int status, retries;
> > + struct drm_modeset_acquire_ctx ctx;
> > + int status, retries, ret;
> >
> > for (retries = 0; retries < 10; retries++) {
> > status = qxl_display_copy_rom_client_monitors_config(qdev);
> > @@ -183,9 +184,9 @@ void qxl_display_read_client_monitors_config(struct
> > qxl_device *qdev)
> > return;
> > }
> >
> > - drm_modeset_lock_all(dev);
> > + DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx,
> > DRM_MODESET_ACQUIRE_INTERRUPTIBLE, ret);
> > qxl_update_offset_props(qdev);
> > - drm_modeset_unlock_all(dev);
> > + DRM_MODESET_LOCK_ALL_END(ctx, ret);
> > if (!drm_helper_hpd_irq_event(dev)) {
> > /* notify that the monitor configuration changed, to
> >adjust at the arbitrary resolution */
> > @@ -403,18 +404,17 @@ static int qxl_framebuffer_surface_dirty(struct
> > drm_framebuffer *fb,
> > struct qxl_device *qdev = to_qxl(fb->dev);
> > struct drm_clip_rect norect;
> > struct qxl_bo *qobj;
> > + struct drm_modeset_acquire_ctx ctx;
> > bool is_primary;
> > - int inc = 1;
> > + int inc = 1, ret;
> >
> > - drm_modeset_lock_all(fb->dev);
> > + DRM_MODESET_LOCK_ALL_BEGIN(fb->dev, ctx,
> > DRM_MODESET_ACQUIRE_INTERRUPTIBLE, ret);
> >
> > qobj = gem_to_qxl_bo(fb->obj[0]);
> > /* if we aren't primary surface ignore this */
> > is_primary = qobj->shadow ? qobj->shadow->is_primary :
> > qobj->is_primary;
> > - if (!is_primary) {
> > - drm_modeset_unlock_all(fb->dev);
> > - return 0;
> > - }
> > + if (!is_primary)
> > + goto out_lock_end;
> >
> > if (!num_clips) {
> > num_clips = 1;
> > @@ -430,7 +430,8 @@ static int qxl_framebuffer_surface_dirty(struct
> > drm_framebuffer *fb,
> > qxl_draw_dirty_fb(qdev, fb, qobj, flags, color,
> > clips, num_clips, inc, 0);
> >
> > - drm_modeset_unlock_all(fb->dev);
> > +out_lock_end:
> > + DRM_MODESET_LOCK_ALL_END(ctx, ret);
> >
> > return 0;
> > }
> > --
> > 2.17.1
> >
>
Re: Re: [PATCH] drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> > > It's the same when gm20b_clk_new() returns from elsewhere following this > > call. > > I suggest to reconsider the interpretation of the software situation once > more. > Can it be that the allocated clock object should be kept usable even after > a successful return from this function? > It's possible that we expect an usable clk pointer, though I could not find the exact usage yet. For security, I will release this pointer only on error paths in this function. > > Would you like to add the tag “Fixes” to the commit message? > Thank you for your advice! I will add this tag in the next version of patch. Regards, Dinghao
I.T. X : *nix + Direct 3D is the next Amiga.
With the event of Direct 3D coming to *nix, something I really asked about with this aswell, and really goes back to 3.D. Scene ventures in 9x, https://www.youtube.com/watch?v=IsW-YO0REVc Everything is readied on this chan, with the 3.D. Scene background! *nix + Direct 3D is the next Amiga! Serene Greetings, Ywe Cærlyn Den 28.05.2020 07:59, skrev Ywe Cærlyn: * Karmic Koala bootstyle,high res text, no image / initrd. * Enligthenment, Right Corner Bar/Launch Menu * Fair Pay, lexically organized commercial directory. Com:|Top|Category|Subcategory|1m km2 zone|23.000 km2 zone|Person|Groupings - no unecessary logins, easy exposure, and changing / to | symbolizing fair pay structure, and also making / available in filenames, which is a common thing. * 0.33 ms latency Renoise, suggesting optimized paths for this. * 72.7 (3x pass) Doom 3 (low jitter config) - will probably be great for Direct 3D 12. * Readied for €-money integration. EU optimally symbolically located for this. * Calibri font for easy cursive Islamic integration, and bold chan integration, supporting all developments back to Adams Tablet, source of fair job principles. Hail Jagod! Serene Greetings, Ywe Cærlyn https://www.youtube.com/channel/UCR3gmLVjHS5A702wo4bol_Q
Re: The invitation need your response
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Re: drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> It's possible that we expect an usable clk pointer, though I could not find > the exact usage yet. I am curious if another developer would like to add helpful background information. > For security, I will release this pointer only on error paths in this > function. Do you tend to release objects (which are referenced by pointers)? Regards, Markus
Re: [PATCH 8/8] macintosh/adb-iop: Implement SRQ autopolling
Hi Finn,
On Sun, May 31, 2020 at 1:20 AM Finn Thain wrote:
> The adb_driver.autopoll method is needed during ADB bus scan and device
> address assignment. Implement this method so that the IOP's list of
> device addresses can be updated. When the list is empty, disable SRQ
> autopolling.
>
> Cc: Joshua Thompson
> Cc: Geert Uytterhoeven
> Tested-by: Stan Johnson
> Signed-off-by: Finn Thain
Thanks for your patch!
Acked-by: Geert Uytterhoeven
> arch/m68k/include/asm/adb_iop.h | 1 +
> drivers/macintosh/adb-iop.c | 32 ++--
As this header file is used by a single source file only, perhaps it should
just be absorbed by the latter?
Then you no longer need my Acked-by for future changes ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 0/4] Mac IOP driver fixes
Hi Finn,
On Sun, May 31, 2020 at 1:16 AM Finn Thain wrote:
> This patch series has several bug fixes for the IOP driver and some
> improvements to the debug level log messages.
Thanks for your series!
> Geert, please consider pushing these fixes for v5.8, if not the
> whole series.
I'm afraid it's a bit too late for that, as I expect the v5.8 merge window
to open tonight. Unless the fix is for a regression in v5.7.
BTW, how does the issue being fixed manifest itself? That's not clear to
me from the patch description.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH] kbuild: force to build vmlinux if CONFIG_MODVERSION=y
This code does not work as stated in the comment.
$(CONFIG_MODVERSIONS) is always empty because it is expanded before
include/config/auto.conf is included. Hence, 'make modules' with
CONFIG_MODVERSION=y cannot record the version CRCs.
This has been broken since 2003, commit ("kbuild: Enable modules to be
build using the "make dir/" syntax"). [1]
[1]:
https://git.kernel.org/pub/scm/linux/kernel/git/history/history.git/commit/?id=15c6240cdc44bbeef3c4797ec860f9765ef4f1a7
Cc: linux-stable # v2.5.71+
Signed-off-by: Masahiro Yamada
---
Makefile | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/Makefile b/Makefile
index 2df903429d31..b856f84e28c9 100644
--- a/Makefile
+++ b/Makefile
@@ -619,12 +619,8 @@ KBUILD_MODULES :=
KBUILD_BUILTIN := 1
# If we have only "make modules", don't compile built-in objects.
-# When we're building modules with modversions, we need to consider
-# the built-in objects during the descend as well, in order to
-# make sure the checksums are up to date before we record them.
-
ifeq ($(MAKECMDGOALS),modules)
- KBUILD_BUILTIN := $(if $(CONFIG_MODVERSIONS),1)
+ KBUILD_BUILTIN :=
endif
# If we have "make modules", compile modules
@@ -1337,6 +1333,13 @@ ifdef CONFIG_MODULES
all: modules
+# When we're building modules with modversions, we need to consider
+# the built-in objects during the descend as well, in order to
+# make sure the checksums are up to date before we record them.
+ifdef CONFIG_MODVERSIONS
+ KBUILD_BUILTIN := 1
+endif
+
# Build modules
#
# A module can be listed more than once in obj-m resulting in
--
2.25.1
Re: Re: drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> > > For security, I will release this pointer only on error paths in this > > function. > > Do you tend to release objects (which are referenced by pointers)? > I just found that clk is referenced by pclk in this function. When clk is freed, pclk will be allocated in gm20b_clk_new_speedo0(). Thus we should not release clk in this function and there is no bug here. Thank you for reminding me! Regards, Dinghao
Re: drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> I just found that clk is referenced by pclk in this function. When clk is > freed, > pclk will be allocated in gm20b_clk_new_speedo0(). Thus we should not release > clk > in this function and there is no bug here. Can there be a need to release a clock object after a failed gk20a_clk_ctor() call? Regards, Markus
Re: [PATCH] staging: gasket: Convert get_user_pages*() --> pin_user_pages*()
On Sun, May 31, 2020 at 12:53:11PM +0530, Souptick Joarder wrote: > In 2019, we introduced pin_user_pages*() and now we are converting > get_user_pages*() to the new API as appropriate. [1] & [2] could > be referred for more information. > > [1] Documentation/core-api/pin_user_pages.rst > > [2] "Explicit pinning of user-space pages": > https://lwn.net/Articles/807108/ > > Signed-off-by: Souptick Joarder > Cc: John Hubbard > Cc: Dan Carpenter > Acked-by: Dan Carpenter regards, dan carpenter
Re: [PATCH] nvme-tcp: constify static struct blk_mq_ops
Looks good, Reviewed-by: Max Gurtovoy
Re: [PATCH RFC] KVM: arm64: Sidestep stage2_unmap_vm() on vcpu reset when S2FWB is supported
Hi Marc,
On 5/30/20 5:31 PM, Marc Zyngier wrote:
> Hi Alex,
>
> On 2020-05-30 11:46, Alexandru Elisei wrote:
>> Hi,
>
> [...]
>
diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
index 48d0ec44ad77..e6378162cdef 100644
--- a/virt/kvm/arm/arm.c
+++ b/virt/kvm/arm/arm.c
@@ -983,8 +983,11 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct
kvm_vcpu
*vcpu,
/*
* Ensure a rebooted VM will fault in RAM pages and detect if the
* guest MMU is turned off and flush the caches as needed.
+ *
+ * S2FWB enforces all memory accesses to RAM being cacheable, we
+ * ensure that the cache is always coherent.
*/
- if (vcpu->arch.has_run_once)
+ if (vcpu->arch.has_run_once &&
!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
>>> I think userspace does not invalidate the icache when loading a new kernel
>>> image,
>>> and if the guest patched instructions, they could potentially still be in
>>> the
>>> icache. Should the icache be invalidated if FWB is present?
>>
>> I noticed that this was included in the current pull request and I
>> remembered that
>> I wasn't sure about this part. Did some more digging and it turns out that
>> FWB
>> implies no cache maintenance needed for *data to instruction*
>> coherence. From ARM
>> DDI 0487F.b, page D5-2635:
>>
>> "When ARMv8.4-S2FWB is implemented, the architecture requires that
>> CLIDR_EL1.{LOUU, LOIUS} are zero so that no levels of data cache need to be
>> cleaned in order to manage coherency with instruction fetches".
>>
>> However, there's no mention that I found for instruction to data coherence,
>> meaning that the icache would still need to be invalidated on each vcpu in
>> order
>> to prevent fetching of patched instructions from the icache. Am I
>> missing something?
>
> I think you are right, and this definitely matches the way we deal with
> the icache on the fault path. For some bizarre reason, I always assume
> that FWB implies DIC, which isn't true at all.
>
> I'm planning to address it as follows. Please let me know what you think.
>
> Thanks,
>
> M.
>
> From f7860d1d284f41afea176cc17e5c9d895ae665e9 Mon Sep 17 00:00:00 2001
> From: Marc Zyngier
> Date: Sat, 30 May 2020 17:22:19 +0100
> Subject: [PATCH] KVM: arm64: Flush the instruction cache if not unmapping the
> VM on reboot
>
> On a system with FWB, we don't need to unmap Stage-2 on reboot,
> as even if userspace takes this opportunity to repaint the whole
> of memory, FWB ensures that the data side stays consistent even
> if the guest uses non-cacheable mappings.
>
> However, the I-side is not necessarily coherent with the D-side
> if CTR_EL0.DIC is 0. In this case, invalidate the i-cache to
> preserve coherency.
>
> Reported-by: Alexandru Elisei
> Fixes: 892713e97ca1 ("KVM: arm64: Sidestep stage2_unmap_vm() on vcpu reset
> when
> S2FWB is supported")
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/kvm/arm.c | 14 ++
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index b0b569f2cdd0..d6988401c22a 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -989,11 +989,17 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu
> *vcpu,
> * Ensure a rebooted VM will fault in RAM pages and detect if the
> * guest MMU is turned off and flush the caches as needed.
> *
> - * S2FWB enforces all memory accesses to RAM being cacheable, we
> - * ensure that the cache is always coherent.
> + * S2FWB enforces all memory accesses to RAM being cacheable,
> + * ensuring that the data side is always coherent. We still
> + * need to invalidate the I-cache though, as FWB does *not*
> + * imply CTR_EL0.DIC.
> */
> - if (vcpu->arch.has_run_once &&
> !cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
> - stage2_unmap_vm(vcpu->kvm);
> + if (vcpu->arch.has_run_once) {
> + if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB))
> + stage2_unmap_vm(vcpu->kvm);
> + else
> + __flush_icache_all();
> + }
>
> vcpu_reset_hcr(vcpu);
>
>
Looks good, __flush_icache_all checks CTR_EL0.DIC before doing icache
maintenance:
Reviewed-by: Alexandru Elisei
Re: Re: drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> > I just found that clk is referenced by pclk in this function. When clk is > > freed, > > pclk will be allocated in gm20b_clk_new_speedo0(). Thus we should not > > release clk > > in this function and there is no bug here. > > Can there be a need to release a clock object after a failed gk20a_clk_ctor() > call? > I think this mainly depends on pclk pointer. It seems that the caller of gm20b_clk_new() always expects pclk to be allocated unless it returns -ENOMEM, which means kzalloc() failed. If gk20a_clk_ctor() never returns such an error code, we may need not to release this clock object. Regards, Dinghao
Re: [PATCH 5.6 086/126] virtio-balloon: Revert "virtio-balloon: Switch back to OOM handler for VIRTIO_BALLOON_F_DEFLATE_ON_OOM"
On Tue, May 26, 2020 at 08:53:43PM +0200, Greg Kroah-Hartman wrote:
> From: Michael S. Tsirkin
>
> [ Upstream commit 835a6a649d0dd1b1f46759eb60fff2f63ed253a7 ]
>
> This reverts commit 5a6b4cc5b7a1892a8d7f63d6cbac6e0ae2a9d031.
>
> It has been queued properly in the akpm tree, this version is just
> creating conflicts.
>
> Signed-off-by: Michael S. Tsirkin
> Signed-off-by: Sasha Levin
I don't understand. How does this make sense in stable?
stable does not merge akpm does it?
> ---
> drivers/virtio/virtio_balloon.c | 107 +++-
> 1 file changed, 63 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
> index 44375a22307b..341458fd95ca 100644
> --- a/drivers/virtio/virtio_balloon.c
> +++ b/drivers/virtio/virtio_balloon.c
> @@ -14,7 +14,6 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -28,9 +27,7 @@
> */
> #define VIRTIO_BALLOON_PAGES_PER_PAGE (unsigned)(PAGE_SIZE >>
> VIRTIO_BALLOON_PFN_SHIFT)
> #define VIRTIO_BALLOON_ARRAY_PFNS_MAX 256
> -/* Maximum number of (4k) pages to deflate on OOM notifications. */
> -#define VIRTIO_BALLOON_OOM_NR_PAGES 256
> -#define VIRTIO_BALLOON_OOM_NOTIFY_PRIORITY 80
> +#define VIRTBALLOON_OOM_NOTIFY_PRIORITY 80
>
> #define VIRTIO_BALLOON_FREE_PAGE_ALLOC_FLAG (__GFP_NORETRY | __GFP_NOWARN | \
>__GFP_NOMEMALLOC)
> @@ -115,11 +112,8 @@ struct virtio_balloon {
> /* Memory statistics */
> struct virtio_balloon_stat stats[VIRTIO_BALLOON_S_NR];
>
> - /* Shrinker to return free pages - VIRTIO_BALLOON_F_FREE_PAGE_HINT */
> + /* To register a shrinker to shrink memory upon memory pressure */
> struct shrinker shrinker;
> -
> - /* OOM notifier to deflate on OOM - VIRTIO_BALLOON_F_DEFLATE_ON_OOM */
> - struct notifier_block oom_nb;
> };
>
> static struct virtio_device_id id_table[] = {
> @@ -794,13 +788,50 @@ static unsigned long shrink_free_pages(struct
> virtio_balloon *vb,
> return blocks_freed * VIRTIO_BALLOON_HINT_BLOCK_PAGES;
> }
>
> +static unsigned long leak_balloon_pages(struct virtio_balloon *vb,
> + unsigned long pages_to_free)
> +{
> + return leak_balloon(vb, pages_to_free * VIRTIO_BALLOON_PAGES_PER_PAGE) /
> + VIRTIO_BALLOON_PAGES_PER_PAGE;
> +}
> +
> +static unsigned long shrink_balloon_pages(struct virtio_balloon *vb,
> + unsigned long pages_to_free)
> +{
> + unsigned long pages_freed = 0;
> +
> + /*
> + * One invocation of leak_balloon can deflate at most
> + * VIRTIO_BALLOON_ARRAY_PFNS_MAX balloon pages, so we call it
> + * multiple times to deflate pages till reaching pages_to_free.
> + */
> + while (vb->num_pages && pages_freed < pages_to_free)
> + pages_freed += leak_balloon_pages(vb,
> + pages_to_free - pages_freed);
> +
> + update_balloon_size(vb);
> +
> + return pages_freed;
> +}
> +
> static unsigned long virtio_balloon_shrinker_scan(struct shrinker *shrinker,
> struct shrink_control *sc)
> {
> + unsigned long pages_to_free, pages_freed = 0;
> struct virtio_balloon *vb = container_of(shrinker,
> struct virtio_balloon, shrinker);
>
> - return shrink_free_pages(vb, sc->nr_to_scan);
> + pages_to_free = sc->nr_to_scan;
> +
> + if (virtio_has_feature(vb->vdev, VIRTIO_BALLOON_F_FREE_PAGE_HINT))
> + pages_freed = shrink_free_pages(vb, pages_to_free);
> +
> + if (pages_freed >= pages_to_free)
> + return pages_freed;
> +
> + pages_freed += shrink_balloon_pages(vb, pages_to_free - pages_freed);
> +
> + return pages_freed;
> }
>
> static unsigned long virtio_balloon_shrinker_count(struct shrinker *shrinker,
> @@ -808,22 +839,26 @@ static unsigned long
> virtio_balloon_shrinker_count(struct shrinker *shrinker,
> {
> struct virtio_balloon *vb = container_of(shrinker,
> struct virtio_balloon, shrinker);
> + unsigned long count;
> +
> + count = vb->num_pages / VIRTIO_BALLOON_PAGES_PER_PAGE;
> + count += vb->num_free_page_blocks * VIRTIO_BALLOON_HINT_BLOCK_PAGES;
>
> - return vb->num_free_page_blocks * VIRTIO_BALLOON_HINT_BLOCK_PAGES;
> + return count;
> }
>
> -static int virtio_balloon_oom_notify(struct notifier_block *nb,
> - unsigned long dummy, void *parm)
> +static void virtio_balloon_unregister_shrinker(struct virtio_balloon *vb)
> {
> - struct virtio_balloon *vb = container_of(nb,
> - struct virtio_balloon, oom_nb);
> - unsigned long *freed = parm;
> + unregister_shrinker(&vb->shrinker);
> +}
>
> - *freed += leak_balloon(vb,
[PATCH] habanalabs: correctly cast u64 to void*
Use the u64_to_user_ptr(x) kernel macro to correctly cast u64 to void*
Reported-by: kbuild test robot
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/command_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/habanalabs/command_submission.c
b/drivers/misc/habanalabs/command_submission.c
index 75d8302352e5..f82974a916c3 100644
--- a/drivers/misc/habanalabs/command_submission.c
+++ b/drivers/misc/habanalabs/command_submission.c
@@ -789,7 +789,7 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv,
enum hl_cs_type cs_type,
size_to_copy = chunk->num_signal_seq_arr *
sizeof(*signal_seq_arr);
if (copy_from_user(signal_seq_arr,
- (void __user *) chunk->signal_seq_arr,
+ u64_to_user_ptr(chunk->signal_seq_arr),
size_to_copy)) {
dev_err(hdev->dev,
"Failed to copy signal seq array from user\n");
--
2.17.1
Re: [PATCH v2 2/2] crypto: virtio: Fix use-after-free in virtio_crypto_skcipher_finalize_req()
On Tue, May 26, 2020 at 02:11:37PM +, Sasha Levin wrote:
> <20200123101000.GB24255@Red>
> References: <20200526031956.1897-3-longpe...@huawei.com>
> <20200123101000.GB24255@Red>
>
> Hi
>
> [This is an automated email]
>
> This commit has been processed because it contains a "Fixes:" tag
> fixing commit: dbaf0624ffa5 ("crypto: add virtio-crypto driver").
>
> The bot has tested the following trees: v5.6.14, v5.4.42, v4.19.124,
> v4.14.181.
>
> v5.6.14: Build OK!
> v5.4.42: Failed to apply! Possible dependencies:
> eee1d6fca0a0 ("crypto: virtio - switch to skcipher API")
>
> v4.19.124: Failed to apply! Possible dependencies:
> eee1d6fca0a0 ("crypto: virtio - switch to skcipher API")
>
> v4.14.181: Failed to apply! Possible dependencies:
> 500e6807ce93 ("crypto: virtio - implement missing support for output IVs")
> 67189375bb3a ("crypto: virtio - convert to new crypto engine API")
> d0d859bb87ac ("crypto: virtio - Register an algo only if it's supported")
> e02b8b43f55a ("crypto: virtio - pr_err() strings should end with
> newlines")
> eee1d6fca0a0 ("crypto: virtio - switch to skcipher API")
>
>
> NOTE: The patch will not be queued to stable trees until it is upstream.
>
> How should we proceed with this patch?
Mike could you comment on backporting?
> --
> Thanks
> Sasha
[PATCH 3/4 v4] exfat: add boot region verification
Add Boot-Regions verification specified in exFAT specification.
Note that the checksum type is strongly related to the raw structure,
so the'u32 'type is used to clarify the number of bits.
Signed-off-by: Tetsuhiro Kohada
---
Changes in v2:
- rebase with patch 'optimize dir-cache' applied
- just print a warning when invalid exboot-signature detected
- print additional information when invalid boot-checksum detected
Changes in v3:
- based on '[PATCH 2/4 v3] exfat: separate the boot sector analysis'
Changes in v4:
- fix type of p_sig/p_chksum to __le32
fs/exfat/exfat_fs.h | 1 +
fs/exfat/misc.c | 14 +
fs/exfat/super.c| 50 +
3 files changed, 65 insertions(+)
diff --git a/fs/exfat/exfat_fs.h b/fs/exfat/exfat_fs.h
index 9673e2d31045..eebbe5a84b2b 100644
--- a/fs/exfat/exfat_fs.h
+++ b/fs/exfat/exfat_fs.h
@@ -514,6 +514,7 @@ void exfat_set_entry_time(struct exfat_sb_info *sbi, struct
timespec64 *ts,
u8 *tz, __le16 *time, __le16 *date, u8 *time_cs);
unsigned short exfat_calc_chksum_2byte(void *data, int len,
unsigned short chksum, int type);
+u32 exfat_calc_chksum32(void *data, int len, u32 chksum, int type);
void exfat_update_bh(struct super_block *sb, struct buffer_head *bh, int sync);
void exfat_chain_set(struct exfat_chain *ec, unsigned int dir,
unsigned int size, unsigned char flags);
diff --git a/fs/exfat/misc.c b/fs/exfat/misc.c
index ab7f88b1f6d3..b82d2dd5bd7c 100644
--- a/fs/exfat/misc.c
+++ b/fs/exfat/misc.c
@@ -151,6 +151,20 @@ unsigned short exfat_calc_chksum_2byte(void *data, int len,
return chksum;
}
+u32 exfat_calc_chksum32(void *data, int len, u32 chksum, int type)
+{
+ int i;
+ u8 *c = (u8 *)data;
+
+ for (i = 0; i < len; i++, c++) {
+ if (unlikely(type == CS_BOOT_SECTOR &&
+(i == 106 || i == 107 || i == 112)))
+ continue;
+ chksum = ((chksum << 31) | (chksum >> 1)) + *c;
+ }
+ return chksum;
+}
+
void exfat_update_bh(struct super_block *sb, struct buffer_head *bh, int sync)
{
set_bit(EXFAT_SB_DIRTY, &EXFAT_SB(sb)->s_state);
diff --git a/fs/exfat/super.c b/fs/exfat/super.c
index 6a1330be5a9a..405717e4e3ea 100644
--- a/fs/exfat/super.c
+++ b/fs/exfat/super.c
@@ -491,6 +491,50 @@ static int exfat_read_boot_sector(struct super_block *sb)
return 0;
}
+static int exfat_verify_boot_region(struct super_block *sb)
+{
+ struct buffer_head *bh = NULL;
+ u32 chksum = 0;
+ __le32 *p_sig, *p_chksum;
+ int sn, i;
+
+ /* read boot sector sub-regions */
+ for (sn = 0; sn < 11; sn++) {
+ bh = sb_bread(sb, sn);
+ if (!bh)
+ return -EIO;
+
+ if (sn != 0 && sn <= 8) {
+ /* extended boot sector sub-regions */
+ p_sig = (__le32 *)&bh->b_data[sb->s_blocksize - 4];
+ if (le32_to_cpu(*p_sig) != EXBOOT_SIGNATURE)
+ exfat_warn(sb, "Invalid exboot-signature(sector
= %d): 0x%08x",
+ sn, le32_to_cpu(*p_sig));
+ }
+
+ chksum = exfat_calc_chksum32(bh->b_data, sb->s_blocksize,
+ chksum, sn ? CS_DEFAULT : CS_BOOT_SECTOR);
+ brelse(bh);
+ }
+
+ /* boot checksum sub-regions */
+ bh = sb_bread(sb, sn);
+ if (!bh)
+ return -EIO;
+
+ for (i = 0; i < sb->s_blocksize; i += sizeof(u32)) {
+ p_chksum = (__le32 *)&bh->b_data[i];
+ if (le32_to_cpu(*p_chksum) != chksum) {
+ exfat_err(sb, "Invalid boot checksum (boot checksum :
0x%08x, checksum : 0x%08x)",
+ le32_to_cpu(*p_chksum), chksum);
+ brelse(bh);
+ return -EINVAL;
+ }
+ }
+ brelse(bh);
+ return 0;
+}
+
/* mount the file system volume */
static int __exfat_fill_super(struct super_block *sb)
{
@@ -503,6 +547,12 @@ static int __exfat_fill_super(struct super_block *sb)
goto free_bh;
}
+ ret = exfat_verify_boot_region(sb);
+ if (ret) {
+ exfat_err(sb, "invalid boot region");
+ goto free_bh;
+ }
+
ret = exfat_create_upcase_table(sb);
if (ret) {
exfat_err(sb, "failed to load upcase table");
--
2.25.1
Re: PANIC: double fault in fixup_bad_iret
On Fri, May 29, 2020 at 7:11 PM Peter Zijlstra wrote: > > Like with KCSAN, we should blanket kill KASAN/UBSAN and friends (at the > > very least in arch/x86/) until they get that function attribute stuff > > sorted. > > Something like so. > > --- > diff --git a/arch/x86/Makefile b/arch/x86/Makefile > index 00e378de8bc0..a90d32b87d7e 100644 > --- a/arch/x86/Makefile > +++ b/arch/x86/Makefile > @@ -1,6 +1,14 @@ > # SPDX-License-Identifier: GPL-2.0 > # Unified Makefile for i386 and x86_64 > > +# > +# Until such a time that __no_kasan and __no_ubsan work as expected (and are > +# made part of noinstr), don't sanitize anything. > +# > +KASAN_SANITIZE := n > +UBSAN_SANITIZE := n > +KCOV_INSTRUMENT := n > + > # select defconfig based on actual architecture > ifeq ($(ARCH),x86) >ifeq ($(shell uname -m),x86_64) +kasan-dev +Marco, please send a fix for this
Re: arm64: Register modification during syscall entry/exit stop
On Wed, May 27, 2020 at 11:19:29AM +0100, Dave Martin wrote: > On Wed, May 27, 2020 at 10:55:29AM +0100, Will Deacon wrote: > > On Sun, May 24, 2020 at 02:56:35AM -0400, Keno Fischer wrote: > > > Just ran into this issue again, with what I think may be most compelling > > > example yet why this is problematic: > > > > > > The tracee incurred a signal, we PTRACE_SYSEMU'd to the rt_sigreturn, > > > which the tracer tried to emulate by applying the state from the signal > > > frame. > > > However, the PTRACE_SYSEMU stop is a syscall-stop, so the tracer's write > > > to x7 was ignored and x7 retained the value it had in the signal handler, > > > which broke the tracee. > > > > Yeah, that sounds like a good justification to add a way to stop this. Could > > you send a patch, please? > > > > Interestingly, I *thought* the current behaviour was needed by strace, but I > > can't find anything there that seems to require it. Oh well, we're stuck > > with it anyway. > > The fact that PTRACE_SYSEMU is only implemented for a few arches makes > we wonder whether it was a misguided addition that should not be ported > to new arches... i.e., why does hardly anyone need it? But I haven't > attempted to understand the history. > > Can't PTRACE_SYSEMU be emulated by using PTRACE_SYSCALL, cancelling the > syscall at the syscall enter stop, then modifying the regs at the > syscall exit stop? > > > If SYSEMU was obviously always broken, perhaps we can withdraw support > for it. Assuming nobody is crazy enough to try to emulate execve() I > can't see anything other than sigreturn that would be affected by this > issue though. So maybe SYSEMU isn't broken enough to justify > withdrawal. Indeed, my preference on another thread [1] was to remove it, but it would need agreement from Arm, since it was added by them (Sudeep). But setting that aside, Keno has convinced me that the clobbering of x7 on syscall enter/exit can cause some problems for userspace, so I think that having a way to disable that seems like a good idea. We can't change the current default behaviour, but having an explicit opt-in seems worthwhile. Keno -- are you planning to send out a patch? You previously spoke about implementing this using PTRACE_SETOPTIONS. Will [1] https://lore.kernel.org/r/20200515121346.GA22919@willie-the-truck
Re: [PATCH v6 3/6] irqchip: RISC-V per-HART local interrupt controller driver
On 2020-05-31 06:36, Anup Patel wrote:
On Sat, May 30, 2020 at 5:31 PM Marc Zyngier wrote:
[...]
> plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD);
Why do you need to both disable the interrupt *and* change the
priority
threshold? It seems to be that one of them should be enough, but my
kno9wledge of the PLIC is limited. In any case, this would deserve a
comment.
Okay, I will test and remove "disable the interrupt" part from
plic_dying_cpu().
Be careful, as interrupt enabling/disabling is refcounted in order
to allow nesting. If you only enable on CPU_ON and not disable
on CPU_OFF, you will end-up with a depth that only increases,
up to the point where you hit the roof (it will take a while though).
I would keep the enable/disable as is, and drop the priority
setting from the CPU_OFF path.
> return 0;
> @@ -260,7 +266,11 @@ static int plic_starting_cpu(unsigned int cpu)
> {
> struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
>
> - csr_set(CSR_IE, IE_EIE);
> + if (plic_parent_irq)
> + enable_percpu_irq(plic_parent_irq,
> + irq_get_trigger_type(plic_parent_irq));
> + else
> + pr_warn("cpu%d: parent irq not available\n");
What does it mean to carry on if the interrupt cannot be signaled?
Shouldn't you error out instead, and leave the CPU dead?
The CPU is not dead if we cannot enable RISC-V INTC external
interrupt because the Timer and IPIs interrupts are always through
RISC-V INTC. The PLIC external interrupt not present for a CPU
only means that that CPU cannot receive peripherial interrupts.
On a sane RISC-V system, if PLIC is present then all CPUs should
be able to get RISC-V INTC external interrupt. Base on this rationale,
I have put a warning for plic_parent_irq == 0.
Fair enough.
M.
--
Jazz is not dead. It just smells funny...
[PATCH] ARM: riscpc: mark a function as __init to save some memory
'ecard_bus_init()' is only called via 'postcore_initcall'.
It can be marked as __init to save a few bytes of memory.
Signed-off-by: Christophe JAILLET
---
arch/arm/mach-rpc/ecard.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rpc/ecard.c b/arch/arm/mach-rpc/ecard.c
index 75cfad2cb143..9f4e7106efb9 100644
--- a/arch/arm/mach-rpc/ecard.c
+++ b/arch/arm/mach-rpc/ecard.c
@@ -1135,7 +1135,7 @@ struct bus_type ecard_bus_type = {
.shutdown = ecard_drv_shutdown,
};
-static int ecard_bus_init(void)
+static int __init ecard_bus_init(void)
{
return bus_register(&ecard_bus_type);
}
--
2.25.1
[PATCH 1/2] media: atomisp: get rid of a left-over wrapper function
The abstraction layer for kvfree() was removed, but there
is still a left-over code there.
Reported-by: kbuild test robot
Signed-off-by: Mauro Carvalho Chehab
---
drivers/staging/media/atomisp/pci/sh_css.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/staging/media/atomisp/pci/sh_css.c
b/drivers/staging/media/atomisp/pci/sh_css.c
index 9c754e29fa00..9f3e421cd717 100644
--- a/drivers/staging/media/atomisp/pci/sh_css.c
+++ b/drivers/staging/media/atomisp/pci/sh_css.c
@@ -1861,14 +1861,6 @@ ia_css_enable_isys_event_queue(bool enable) {
return 0;
}
-void sh_css_free(void *ptr)
-{
- if (is_vmalloc_addr(ptr))
- vfree(ptr);
- else
- kfree(ptr);
-}
-
/* For Acceleration API: Flush FW (shared buffer pointer) arguments */
void
sh_css_flush(struct ia_css_acc_fw *fw)
--
2.26.2
[PATCH 2/2] media: atomisp comment an unused code
There's a different table for some BYT variants that depend
on something inside a FIXME ifdef.
Place this also inside it, just to shut up a clang-11 warning.
Reported-by: kbuild test robot
Signed-off-by: Mauro Carvalho Chehab
---
drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c
b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c
index 094a2886bd62..5ac63c77570a 100644
--- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c
+++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c
@@ -392,6 +392,13 @@ static const struct atomisp_freq_scaling_rule
dfs_rules_byt_cr[] = {
},
};
+#ifdef FIXME
+/*
+ * Disable this, as it is used only when this is true:
+ * INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
+ * INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2))
+ * However, the original code is commented
+ */
static const struct atomisp_dfs_config dfs_config_byt_cr = {
.lowest_freq = ISP_FREQ_200MHZ,
.max_freq_at_vmin = ISP_FREQ_320MHZ,
@@ -399,6 +406,7 @@ static const struct atomisp_dfs_config dfs_config_byt_cr = {
.dfs_table = dfs_rules_byt_cr,
.dfs_table_size = ARRAY_SIZE(dfs_rules_byt_cr),
};
+#endif
static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = {
{
--
2.26.2
Re: drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> If gk20a_clk_ctor() never returns such an error code, > we may need not to release this clock object. Would you like to achieve complete exception handling also for this function implementation? Regards, Markus
[PATCH] ARM: smp_twd: mark a function as __init to save some memory
'twd_clk_init()' is only called via 'core_initcall'.
It can be marked as __init to save a few bytes of memory.
Signed-off-by: Christophe JAILLET
---
For the records, this function has been introduced in commit 4fd7f9b12810
("ARM: 7212/1: smp_twd: reconfigure clockevents after cpufreq change")
---
arch/arm/kernel/smp_twd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 9a14f721a2b0..e0a0b0d820bc 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -129,7 +129,7 @@ static struct notifier_block twd_clk_nb = {
.notifier_call = twd_rate_change,
};
-static int twd_clk_init(void)
+static int __init twd_clk_init(void)
{
if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
return clk_notifier_register(twd_clk, &twd_clk_nb);
--
2.25.1
Re: [PATCH] sh: Implement __get_user_u64() required for 64-bit get_user()
Hi Adrian,
On Fri, May 29, 2020 at 7:46 PM John Paul Adrian Glaubitz
wrote:
> Trying to build the kernel with CONFIG_INFINIBAND_USER_ACCESS enabled fails
>
> ERROR: "__get_user_unknown" [drivers/infiniband/core/ib_uverbs.ko]
> undefined!
>
> with on SH since the kernel misses a 64-bit implementation of get_user().
>
> Implement the missing 64-bit get_user() as __get_user_u64(), matching the
> already existing __put_user_u64() which implements the 64-bit put_user().
>
> Signed-off-by: John Paul Adrian Glaubitz
Thanks for your patch!
> --- a/arch/sh/include/asm/uaccess_32.h
> +++ b/arch/sh/include/asm/uaccess_32.h
> @@ -26,6 +26,9 @@ do {
> \
> case 4: \
> __get_user_asm(x, ptr, retval, "l");\
> break; \
> + case 8: \
> + __get_user_u64(x, ptr, retval); \
> + break; \
> default:\
> __get_user_unknown(); \
> break; \
> @@ -66,6 +69,52 @@ do { \
>
> extern void __get_user_unknown(void);
>
> +#if defined(CONFIG_CPU_LITTLE_ENDIAN)
> +#define __get_user_u64(x, addr, err) \
> +({ \
> +__asm__ __volatile__( \
> + "1:\n\t" \
> + "mov.l %2,%R1\n\t" \
> + "mov.l %T2,%S1\n\t" \
> + "2:\n" \
> + ".section .fixup,\"ax\"\n" \
> + "3:\n\t" \
> + "mov#0, %1\n\t" \
As this is the 64-bit variant, I think this single move should be
replaced by a double move:
"mov #0,%R1\n\t" \
"mov #0,%S1\n\t" \
Same for the big endian version below.
Disclaimer: uncompiled, untested, no SH assembler expert.
> + "mov.l 4f, %0\n\t" \
> + "jmp@%0\n\t" \
> + " mov %3, %0\n\t" \
> + ".balign4\n" \
> + "4: .long 2b\n\t" \
> + ".previous\n" \
> + ".section __ex_table,\"a\"\n\t" \
> + ".long 1b, 3b\n\t" \
> + ".previous" \
> + :"=&r" (err), "=&r" (x) \
> + :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH v4] regmap: fix alignment issue
The assembly and disassembly of data to be sent to or received from
a device invoke functions regmap_format_XX() and regmap_parse_XX()
that extract or insert data items from or into a buffer, using
assignments. In some cases the functions are called with a buffer
pointer with an odd address. On architectures with strict alignment
requirements this can result in a kernel crash. The assignments
have been replaced by functions that take alignment into account.
Signed-off-by: Jens Thoms Toerring
---
drivers/base/regmap/regmap.c | 104 ---
1 file changed, 48 insertions(+), 56 deletions(-)
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index c472f62..4cde237 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#define CREATE_TRACE_POINTS
#include "trace.h"
@@ -249,22 +250,20 @@ static void regmap_format_8(void *buf, unsigned int val,
unsigned int shift)
static void regmap_format_16_be(void *buf, unsigned int val, unsigned int
shift)
{
- __be16 *b = buf;
-
- b[0] = cpu_to_be16(val << shift);
+ put_unaligned_be16(val << shift, buf);
}
static void regmap_format_16_le(void *buf, unsigned int val, unsigned int
shift)
{
- __le16 *b = buf;
-
- b[0] = cpu_to_le16(val << shift);
+ put_unaligned_le16(val << shift, buf);
}
static void regmap_format_16_native(void *buf, unsigned int val,
unsigned int shift)
{
- *(u16 *)buf = val << shift;
+ u16 v = val << shift;
+
+ memcpy(buf, &v, sizeof(v));
}
static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
@@ -280,43 +279,39 @@ static void regmap_format_24(void *buf, unsigned int val,
unsigned int shift)
static void regmap_format_32_be(void *buf, unsigned int val, unsigned int
shift)
{
- __be32 *b = buf;
-
- b[0] = cpu_to_be32(val << shift);
+ put_unaligned_be32(val << shift, buf);
}
static void regmap_format_32_le(void *buf, unsigned int val, unsigned int
shift)
{
- __le32 *b = buf;
-
- b[0] = cpu_to_le32(val << shift);
+ put_unaligned_le32(val << shift, buf);
}
static void regmap_format_32_native(void *buf, unsigned int val,
unsigned int shift)
{
- *(u32 *)buf = val << shift;
+ u32 v = val << shift;
+
+ memcpy(buf, &v, sizeof(v));
}
#ifdef CONFIG_64BIT
static void regmap_format_64_be(void *buf, unsigned int val, unsigned int
shift)
{
- __be64 *b = buf;
-
- b[0] = cpu_to_be64((u64)val << shift);
+ put_unaligned_be64((u64) val << shift, buf);
}
static void regmap_format_64_le(void *buf, unsigned int val, unsigned int
shift)
{
- __le64 *b = buf;
-
- b[0] = cpu_to_le64((u64)val << shift);
+ put_unaligned_le64((u64) val << shift, buf);
}
static void regmap_format_64_native(void *buf, unsigned int val,
unsigned int shift)
{
- *(u64 *)buf = (u64)val << shift;
+ u64 v = (u64) val << shift;
+
+ memcpy(buf, &v, sizeof(v));
}
#endif
@@ -333,35 +328,34 @@ static unsigned int regmap_parse_8(const void *buf)
static unsigned int regmap_parse_16_be(const void *buf)
{
- const __be16 *b = buf;
-
- return be16_to_cpu(b[0]);
+ return get_unaligned_be16(buf);
}
static unsigned int regmap_parse_16_le(const void *buf)
{
- const __le16 *b = buf;
-
- return le16_to_cpu(b[0]);
+ return get_unaligned_le16(buf);
}
static void regmap_parse_16_be_inplace(void *buf)
{
- __be16 *b = buf;
-
- b[0] = be16_to_cpu(b[0]);
+ u16 v = get_unaligned_be16(buf);
+
+ memcpy(buf, &v, sizeof(v));
}
static void regmap_parse_16_le_inplace(void *buf)
{
- __le16 *b = buf;
-
- b[0] = le16_to_cpu(b[0]);
+ u16 v = get_unaligned_le16(buf);
+
+ memcpy(buf, &v, sizeof(v));
}
static unsigned int regmap_parse_16_native(const void *buf)
{
- return *(u16 *)buf;
+ u16 v;
+
+ memcpy(&v, buf, sizeof(v));
+ return v;
}
static unsigned int regmap_parse_24(const void *buf)
@@ -376,69 +370,67 @@ static unsigned int regmap_parse_24(const void *buf)
static unsigned int regmap_parse_32_be(const void *buf)
{
- const __be32 *b = buf;
-
- return be32_to_cpu(b[0]);
+ return get_unaligned_be32(buf);
}
static unsigned int regmap_parse_32_le(const void *buf)
{
- const __le32 *b = buf;
-
- return le32_to_cpu(b[0]);
+ return get_unaligned_le32(buf);
}
static void regmap_parse_32_be_inplace(void *buf)
{
- __be32 *b = buf;
+ u32 v = get_unaligned_be32(buf);
- b[0] = be32_to_cpu(b[0]);
+ memcpy(buf, &v, sizeof(v));
}
static void regmap_parse_32_le_inplace(void *buf)
{
- __le32 *b = buf;
+ u32 v = get_unaligned_le32(buf);
-
Re: [PATCH] sh: Implement __get_user_u64() required for 64-bit get_user()
Hi Geert! On 5/31/20 11:52 AM, Geert Uytterhoeven wrote: > As this is the 64-bit variant, I think this single move should be > replaced by a double move: > >"mov #0,%R1\n\t" \ >"mov #0,%S1\n\t" \ > > Same for the big endian version below. > > Disclaimer: uncompiled, untested, no SH assembler expert. Right, this makes sense. I'll send a new patch shortly. As for the assembler review, I'll ask Yutaka Niibe who is a friend of mine and one of the original SuperH wizards ;). Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer - glaub...@debian.org `. `' Freie Universitaet Berlin - glaub...@physik.fu-berlin.de `-GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
Re: [PATCH net-next] mlx5: Restore err assignment in mlx5_mdev_init
On Fri, May 29, 2020 at 10:54:48PM -0700, Nathan Chancellor wrote:
> Clang warns:
>
> drivers/net/ethernet/mellanox/mlx5/core/main.c:1278:6: warning: variable
> 'err' is used uninitialized whenever 'if' condition is true
> [-Wsometimes-uninitialized]
> if (!priv->dbg_root) {
> ^~~
> drivers/net/ethernet/mellanox/mlx5/core/main.c:1303:9: note:
> uninitialized use occurs here
> return err;
>^~~
> drivers/net/ethernet/mellanox/mlx5/core/main.c:1278:2: note: remove the
> 'if' if its condition is always false
> if (!priv->dbg_root) {
> ^~
> drivers/net/ethernet/mellanox/mlx5/core/main.c:1259:9: note: initialize
> the variable 'err' to silence this warning
> int err;
>^
> = 0
> 1 warning generated.
>
> This path previously returned -ENOMEM, restore that error code so that
> it is not uninitialized.
>
> Fixes: 810cbb25549b ("net/mlx5: Add missing mutex destroy")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1042
> Signed-off-by: Nathan Chancellor
> ---
> drivers/net/ethernet/mellanox/mlx5/core/main.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c
> b/drivers/net/ethernet/mellanox/mlx5/core/main.c
> index df46b1fce3a7..ac68445fde2d 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
> @@ -1277,6 +1277,7 @@ static int mlx5_mdev_init(struct mlx5_core_dev *dev,
> int profile_idx)
> mlx5_debugfs_root);
> if (!priv->dbg_root) {
> dev_err(dev->device, "mlx5_core: error, Cannot create debugfs
> dir, aborting\n");
> + err = -ENOMEM;
> goto err_dbg_root;
^^ this is wrong.
Failure to create debugfs should never fail the driver.
> }
>
>
> base-commit: c0cc73b79123e67b212bd537a7af88e52c9fbeac
> --
> 2.27.0.rc0
>
Re: [PATCH v2 1/4] iio: chemical: scd30: add core driver
On Sat, 30 May 2020 23:36:27 +0200
Tomasz Duszynski wrote:
> Add Sensirion SCD30 carbon dioxide core driver.
>
> Signed-off-by: Tomasz Duszynski
Hi Tomasz
A few things inline. Includes the alignment issue on
x86_32 that I fell into whilst trying to fix timestamp
alignment issues. Suggested resolution inline for that.
Thanks,
Jonathan
> ---
> Documentation/ABI/testing/sysfs-bus-iio-scd30 | 20 +
> MAINTAINERS | 6 +
> drivers/iio/chemical/Kconfig | 11 +
> drivers/iio/chemical/Makefile | 1 +
> drivers/iio/chemical/scd30.h | 75 ++
> drivers/iio/chemical/scd30_core.c | 764 ++
> 6 files changed, 877 insertions(+)
> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-scd30
> create mode 100644 drivers/iio/chemical/scd30.h
> create mode 100644 drivers/iio/chemical/scd30_core.c
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-iio-scd30
> b/Documentation/ABI/testing/sysfs-bus-iio-scd30
> new file mode 100644
> index ..a05b1d28e94a
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-bus-iio-scd30
> @@ -0,0 +1,20 @@
> +What:/sys/bus/iio/devices/iio:deviceX/calibration
> +Date:June 2020
> +KernelVersion: 5.8
> +Contact: linux-...@vger.kernel.org
> +Description:
> + Contaminants build-up in the measurement chamber or optical
> + elements deterioration leads to sensor drift.
> +
> + One can compensate for sensor drift by using either automatic
> + self calibration (asc) or forced recalibration (frc). If used
> + at once one will overwrite the other.
> +
> + Writing 1 or 0 to this attribute will respectively activate or
> + deactivate asc.
> +
> + Picking value from the range [400 1 2000] and writing it to the
> + sensor will set frc.
Seems to me like this would be more intuitive as two separate parameters
perhaps:
calibration_auto_enable
calibration_forced_value
?
> +
> + Upon reading current asc status and frc value are returned
> + respectively.
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 60ed2963efaa..41a509cca6f1 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15137,6 +15137,12 @@ S: Maintained
> F: drivers/misc/phantom.c
> F: include/uapi/linux/phantom.h
>
> +SENSIRION SCD30 CARBON DIOXIDE SENSOR DRIVER
> +M: Tomasz Duszynski
> +S: Maintained
> +F: drivers/iio/chemical/scd30.h
> +F: drivers/iio/chemical/scd30_core.c
> +
> SENSIRION SPS30 AIR POLLUTION SENSOR DRIVER
> M: Tomasz Duszynski
> S: Maintained
> diff --git a/drivers/iio/chemical/Kconfig b/drivers/iio/chemical/Kconfig
> index 7f21afd73b1c..99e852b67e55 100644
> --- a/drivers/iio/chemical/Kconfig
> +++ b/drivers/iio/chemical/Kconfig
> @@ -85,6 +85,17 @@ config PMS7003
> To compile this driver as a module, choose M here: the module will
> be called pms7003.
>
> +config SCD30_CORE
> + tristate "SCD30 carbon dioxide sensor driver"
> + select IIO_BUFFER
> + select IIO_TRIGGERED_BUFFER
> + help
> + Say Y here to build support for the Sensirion SCD30 sensor with carbon
> + dioxide, relative humidity and temperature sensing capabilities.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called scd30_core.
> +
> config SENSIRION_SGP30
> tristate "Sensirion SGPxx gas sensors"
> depends on I2C
> diff --git a/drivers/iio/chemical/Makefile b/drivers/iio/chemical/Makefile
> index aba4167db745..c9804b041ecd 100644
> --- a/drivers/iio/chemical/Makefile
> +++ b/drivers/iio/chemical/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_BME680_SPI) += bme680_spi.o
> obj-$(CONFIG_CCS811) += ccs811.o
> obj-$(CONFIG_IAQCORE)+= ams-iaq-core.o
> obj-$(CONFIG_PMS7003) += pms7003.o
> +obj-$(CONFIG_SCD30_CORE) += scd30_core.o
> obj-$(CONFIG_SENSIRION_SGP30)+= sgp30.o
> obj-$(CONFIG_SPS30) += sps30.o
> obj-$(CONFIG_VZ89X) += vz89x.o
> diff --git a/drivers/iio/chemical/scd30.h b/drivers/iio/chemical/scd30.h
> new file mode 100644
> index ..9b25f7423142
> --- /dev/null
> +++ b/drivers/iio/chemical/scd30.h
> @@ -0,0 +1,75 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef _SCD30_H
> +#define _SCD30_H
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +struct scd30_state;
> +
> +enum scd30_cmd {
> + /* start continuous measurement with pressure compensation */
> + CMD_START_MEAS,
> + /* stop continuous measurement */
> + CMD_STOP_MEAS,
> + /* set/get measurement interval */
> + CMD_MEAS_INTERVAL,
> + /* check whether new measurement is ready */
> + CMD_MEAS_READY,
> + /* get measurement */
> + CMD_READ_MEAS,
> + /* turn on/off automatic self calibration */
> + CMD_ASC,
> + /* se
[PATCH] RISC-V: Don't mark init section as non-executable
The head text section (i.e. _start, secondary_start_sbi, etc) and the
init section fall under same page table level-1 mapping.
Currently, the runtime CPU hotplug is broken because we are marking
init section as non-executable which in-turn marks head text section
as non-executable.
Further investigating other architectures, it seems marking the init
section as non-executable is redundant because the init section pages
are anyway poisoned and freed.
To fix broken runtime CPU hotplug, we simply remove the code marking
the init section as non-executable.
Fixes: d27c3c90817e ("riscv: add STRICT_KERNEL_RWX support")
Cc: sta...@vger.kernel.org
Signed-off-by: Anup Patel
---
arch/riscv/mm/init.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 736de6c8739f..e0f8ccab8a41 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -482,11 +482,6 @@ static void __init setup_vm_final(void)
void free_initmem(void)
{
- unsigned long init_begin = (unsigned long)__init_begin;
- unsigned long init_end = (unsigned long)__init_end;
-
- /* Make the region as non-execuatble. */
- set_memory_nx(init_begin, (init_end - init_begin) >> PAGE_SHIFT);
free_initmem_default(POISON_FREE_INITMEM);
}
--
2.25.1
Re: [PATCH] sh: Implement __get_user_u64() required for 64-bit get_user()
On 5/31/20 11:54 AM, John Paul Adrian Glaubitz wrote: > Hi Geert! > > On 5/31/20 11:52 AM, Geert Uytterhoeven wrote: >> As this is the 64-bit variant, I think this single move should be >> replaced by a double move: >> >>"mov #0,%R1\n\t" \ >>"mov #0,%S1\n\t" \ >> >> Same for the big endian version below. >> >> Disclaimer: uncompiled, untested, no SH assembler expert. > > Right, this makes sense. I'll send a new patch shortly. Hmm, this change is not the case for __put_user_asm() vs. __put_user_u64(). But I have to admit, I don't know what the part below "3:\n\t" is for. Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer - glaub...@debian.org `. `' Freie Universitaet Berlin - glaub...@physik.fu-berlin.de `-GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
Re: [PATCH v2 2/4] iio: chemical: scd30: add I2C interface driver
On Sat, 30 May 2020 23:36:28 +0200
Tomasz Duszynski wrote:
> Add I2C interface driver for the SCD30 sensor.
>
> Signed-off-by: Tomasz Duszynski
Looks good to me.
J
> ---
> MAINTAINERS | 1 +
> drivers/iio/chemical/Kconfig | 11 +++
> drivers/iio/chemical/Makefile| 1 +
> drivers/iio/chemical/scd30_i2c.c | 134 +++
> 4 files changed, 147 insertions(+)
> create mode 100644 drivers/iio/chemical/scd30_i2c.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 41a509cca6f1..13aed3473b7e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15142,6 +15142,7 @@ M:Tomasz Duszynski
> S: Maintained
> F: drivers/iio/chemical/scd30.h
> F: drivers/iio/chemical/scd30_core.c
> +F: drivers/iio/chemical/scd30_i2c.c
>
> SENSIRION SPS30 AIR POLLUTION SENSOR DRIVER
> M: Tomasz Duszynski
> diff --git a/drivers/iio/chemical/Kconfig b/drivers/iio/chemical/Kconfig
> index 99e852b67e55..970d34888c2e 100644
> --- a/drivers/iio/chemical/Kconfig
> +++ b/drivers/iio/chemical/Kconfig
> @@ -96,6 +96,17 @@ config SCD30_CORE
> To compile this driver as a module, choose M here: the module will
> be called scd30_core.
>
> +config SCD30_I2C
> + tristate "SCD30 carbon dioxide sensor I2C driver"
> + depends on SCD30_CORE && I2C
> + select CRC8
> + help
> + Say Y here to build support for the Sensirion SCD30 I2C interface
> + driver.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called scd30_i2c.
> +
> config SENSIRION_SGP30
> tristate "Sensirion SGPxx gas sensors"
> depends on I2C
> diff --git a/drivers/iio/chemical/Makefile b/drivers/iio/chemical/Makefile
> index c9804b041ecd..0966ca34e34b 100644
> --- a/drivers/iio/chemical/Makefile
> +++ b/drivers/iio/chemical/Makefile
> @@ -13,6 +13,7 @@ obj-$(CONFIG_CCS811)+= ccs811.o
> obj-$(CONFIG_IAQCORE)+= ams-iaq-core.o
> obj-$(CONFIG_PMS7003) += pms7003.o
> obj-$(CONFIG_SCD30_CORE) += scd30_core.o
> +obj-$(CONFIG_SCD30_I2C) += scd30_i2c.o
> obj-$(CONFIG_SENSIRION_SGP30)+= sgp30.o
> obj-$(CONFIG_SPS30) += sps30.o
> obj-$(CONFIG_VZ89X) += vz89x.o
> diff --git a/drivers/iio/chemical/scd30_i2c.c
> b/drivers/iio/chemical/scd30_i2c.c
> new file mode 100644
> index ..a6b532b83669
> --- /dev/null
> +++ b/drivers/iio/chemical/scd30_i2c.c
> @@ -0,0 +1,134 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Sensirion SCD30 carbon dioxide sensor i2c driver
> + *
> + * Copyright (c) 2020 Tomasz Duszynski
> + *
> + * I2C slave address: 0x61
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "scd30.h"
> +
> +#define SCD30_I2C_MAX_BUF_SIZE 18
> +#define SCD30_I2C_CRC8_POLYNOMIAL 0x31
> +
> +static u16 scd30_i2c_cmd_lookup_tbl[] = {
> + [CMD_START_MEAS] = 0x0010,
> + [CMD_STOP_MEAS] = 0x0104,
> + [CMD_MEAS_INTERVAL] = 0x4600,
> + [CMD_MEAS_READY] = 0x0202,
> + [CMD_READ_MEAS] = 0x0300,
> + [CMD_ASC] = 0x5306,
> + [CMD_FRC] = 0x5204,
> + [CMD_TEMP_OFFSET] = 0x5403,
> + [CMD_FW_VERSION] = 0xd100,
> + [CMD_RESET] = 0xd304,
> +};
> +
> +DECLARE_CRC8_TABLE(scd30_i2c_crc8_tbl);
> +
> +static int scd30_i2c_xfer(struct scd30_state *state, char *txbuf, int txsize,
> + char *rxbuf, int rxsize)
> +{
> + struct i2c_client *client = to_i2c_client(state->dev);
> + int ret;
> +
> + /*
> + * repeated start is not supported hence instead of sending two i2c
> + * messages in a row we send one by one
> + */
> + ret = i2c_master_send(client, txbuf, txsize);
> + if (ret != txsize)
> + return ret < 0 ? ret : -EIO;
> +
> + if (!rxbuf)
> + return 0;
> +
> + ret = i2c_master_recv(client, rxbuf, rxsize);
> + if (ret != rxsize)
> + return ret < 0 ? ret : -EIO;
> +
> + return 0;
> +}
> +
> +static int scd30_i2c_command(struct scd30_state *state, enum scd30_cmd cmd,
> + u16 arg, void *response, int size)
> +{
> + char crc, buf[SCD30_I2C_MAX_BUF_SIZE], *rsp = response;
> + int i, ret;
> +
> + put_unaligned_be16(scd30_i2c_cmd_lookup_tbl[cmd], buf);
> + i = 2;
> +
> + if (rsp) {
> + /* each two bytes are followed by a crc8 */
> + size += size / 2;
> + } else {
> + put_unaligned_be16(arg, buf + i);
> + crc = crc8(scd30_i2c_crc8_tbl, buf + i, 2, CRC8_INIT_VALUE);
> + i += 2;
> + buf[i] = crc;
> + i += 1;
> +
> + /* commands below don't take an argument */
> + if ((cmd == CMD_STOP_MEAS) || (cmd == CMD_RESET))
> + i -= 3;
> + }
> +
> + ret = scd30_i2c_xfer(state, buf, i, buf, size);
> + if (ret)
> + return ret;
> +
> + /* validate received data and strip off crc byte
[PATCH] MIPS: ralink: bootrom: mark a function as __init to save some memory
'bootrom_setup()' is only called via 'postcore_initcall'.
It can be marked as __init to save a few bytes of memory.
Signed-off-by: Christophe JAILLET
---
arch/mips/ralink/bootrom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/ralink/bootrom.c b/arch/mips/ralink/bootrom.c
index 88bcce59beeb..94ca8379b83c 100644
--- a/arch/mips/ralink/bootrom.c
+++ b/arch/mips/ralink/bootrom.c
@@ -31,7 +31,7 @@ static const struct file_operations bootrom_file_ops = {
.release= single_release,
};
-static int bootrom_setup(void)
+static int __init bootrom_setup(void)
{
debugfs_create_file("bootrom", 0444, NULL, NULL, &bootrom_file_ops);
return 0;
--
2.25.1
Re: [PATCH v6 3/6] irqchip: RISC-V per-HART local interrupt controller driver
On Sun, May 31, 2020 at 3:03 PM Marc Zyngier wrote:
>
> On 2020-05-31 06:36, Anup Patel wrote:
> > On Sat, May 30, 2020 at 5:31 PM Marc Zyngier wrote:
>
> [...]
>
> >> > plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD);
> >>
> >> Why do you need to both disable the interrupt *and* change the
> >> priority
> >> threshold? It seems to be that one of them should be enough, but my
> >> kno9wledge of the PLIC is limited. In any case, this would deserve a
> >> comment.
> >
> > Okay, I will test and remove "disable the interrupt" part from
> > plic_dying_cpu().
>
> Be careful, as interrupt enabling/disabling is refcounted in order
> to allow nesting. If you only enable on CPU_ON and not disable
> on CPU_OFF, you will end-up with a depth that only increases,
> up to the point where you hit the roof (it will take a while though).
>
> I would keep the enable/disable as is, and drop the priority
> setting from the CPU_OFF path.
The PLIC threshold is like GICv2 CPU interface enable/disable.
Based on your comment, we should only program the PLIC threshold
in CPU_ON and don't touch the PLIC threshold in CPU_OFF. Right??
>
> >> > return 0;
> >> > @@ -260,7 +266,11 @@ static int plic_starting_cpu(unsigned int cpu)
> >> > {
> >> > struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
> >> >
> >> > - csr_set(CSR_IE, IE_EIE);
> >> > + if (plic_parent_irq)
> >> > + enable_percpu_irq(plic_parent_irq,
> >> > + irq_get_trigger_type(plic_parent_irq));
> >> > + else
> >> > + pr_warn("cpu%d: parent irq not available\n");
> >>
> >> What does it mean to carry on if the interrupt cannot be signaled?
> >> Shouldn't you error out instead, and leave the CPU dead?
> >
> > The CPU is not dead if we cannot enable RISC-V INTC external
> > interrupt because the Timer and IPIs interrupts are always through
> > RISC-V INTC. The PLIC external interrupt not present for a CPU
> > only means that that CPU cannot receive peripherial interrupts.
> >
> > On a sane RISC-V system, if PLIC is present then all CPUs should
> > be able to get RISC-V INTC external interrupt. Base on this rationale,
> > I have put a warning for plic_parent_irq == 0.
>
> Fair enough.
>
> M.
> --
> Jazz is not dead. It just smells funny...
Regards,
Anup
[PATCH] kbuild: merge two 'ifdef CONFIG_TRIM_UNUSED_KSYMS' blocks
This hunk has two 'ifdef CONFIG_TRIM_UNUSED_KSYMS ... endif' blocks with no other code interleaved. Merge them. Signed-off-by: Masahiro Yamada --- Makefile | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index b856f84e28c9..44921d9cf3cf 100644 --- a/Makefile +++ b/Makefile @@ -1098,16 +1098,14 @@ vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS) # Recurse until adjust_autoksyms.sh is satisfied PHONY += autoksyms_recursive ifdef CONFIG_TRIM_UNUSED_KSYMS -autoksyms_recursive: descend modules.order - $(Q)$(CONFIG_SHELL) $(srctree)/scripts/adjust_autoksyms.sh \ - "$(MAKE) -f $(srctree)/Makefile vmlinux" -endif - # For the kernel to actually contain only the needed exported symbols, # we have to build modules as well to determine what those symbols are. # (this can be evaluated only once include/config/auto.conf has been included) -ifdef CONFIG_TRIM_UNUSED_KSYMS - KBUILD_MODULES := 1 +KBUILD_MODULES := 1 + +autoksyms_recursive: descend modules.order + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/adjust_autoksyms.sh \ + "$(MAKE) -f $(srctree)/Makefile vmlinux" endif autoksyms_h := $(if $(CONFIG_TRIM_UNUSED_KSYMS), include/generated/autoksyms.h) -- 2.25.1
RE: [PATCH] habanalabs: correctly cast u64 to void*
On Sun, May 31, 2020 at 12:16 PM, Oded Gabbay wrote: > Use the u64_to_user_ptr(x) kernel macro to correctly cast u64 to void* > > Reported-by: kbuild test robot > Signed-off-by: Oded Gabbay Reviewed-by: Omer Shpigelman
Re: [PATCH v2 3/4] iio: chemical: scd30: add serial interface driver
On Sat, 30 May 2020 23:36:29 +0200
Tomasz Duszynski wrote:
> Add serial interface driver for the SCD30 sensor.
>
> Signed-off-by: Tomasz Duszynski
Ah Now I see why you had those extra elements in the iio_priv
structure.
Hmm. serdev_device callbacks using the top level device drvdata
is a bit annoying. Really feels to me like they should have
their own priv data for those callbacks given the device
drvdata gets used for so many other things.
Oh well. Guess this is the best we can do!
Jonathan
> ---
> MAINTAINERS | 1 +
> drivers/iio/chemical/Kconfig| 11 ++
> drivers/iio/chemical/Makefile | 1 +
> drivers/iio/chemical/scd30_serial.c | 266
> 4 files changed, 279 insertions(+)
> create mode 100644 drivers/iio/chemical/scd30_serial.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 13aed3473b7e..5db4b446c8ba 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15143,6 +15143,7 @@ S:Maintained
> F: drivers/iio/chemical/scd30.h
> F: drivers/iio/chemical/scd30_core.c
> F: drivers/iio/chemical/scd30_i2c.c
> +F: drivers/iio/chemical/scd30_serial.c
>
> SENSIRION SPS30 AIR POLLUTION SENSOR DRIVER
> M: Tomasz Duszynski
> diff --git a/drivers/iio/chemical/Kconfig b/drivers/iio/chemical/Kconfig
> index 970d34888c2e..10bb431bc3ce 100644
> --- a/drivers/iio/chemical/Kconfig
> +++ b/drivers/iio/chemical/Kconfig
> @@ -107,6 +107,17 @@ config SCD30_I2C
> To compile this driver as a module, choose M here: the module will
> be called scd30_i2c.
>
> +config SCD30_SERIAL
> + tristate "SCD30 carbon dioxide sensor serial driver"
> + depends on SCD30_CORE && SERIAL_DEV_BUS
> + select CRC16
> + help
> + Say Y here to build support for the Sensirion SCD30 serial interface
> + driver.
> +
> + To compile this driver as a module, choose M here: the module will
> + be called scd30_serial.
> +
> config SENSIRION_SGP30
> tristate "Sensirion SGPxx gas sensors"
> depends on I2C
> diff --git a/drivers/iio/chemical/Makefile b/drivers/iio/chemical/Makefile
> index 0966ca34e34b..fef63dd5bf92 100644
> --- a/drivers/iio/chemical/Makefile
> +++ b/drivers/iio/chemical/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_IAQCORE) += ams-iaq-core.o
> obj-$(CONFIG_PMS7003) += pms7003.o
> obj-$(CONFIG_SCD30_CORE) += scd30_core.o
> obj-$(CONFIG_SCD30_I2C) += scd30_i2c.o
> +obj-$(CONFIG_SCD30_SERIAL) += scd30_serial.o
> obj-$(CONFIG_SENSIRION_SGP30)+= sgp30.o
> obj-$(CONFIG_SPS30) += sps30.o
> obj-$(CONFIG_VZ89X) += vz89x.o
> diff --git a/drivers/iio/chemical/scd30_serial.c
> b/drivers/iio/chemical/scd30_serial.c
> new file mode 100644
> index ..07d7d3110fe0
> --- /dev/null
> +++ b/drivers/iio/chemical/scd30_serial.c
> @@ -0,0 +1,266 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Sensirion SCD30 carbon dioxide sensor serial driver
> + *
> + * Copyright (c) 2020 Tomasz Duszynski
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "scd30.h"
> +
> +#define SCD30_SERDEV_ADDR 0x61
> +#define SCD30_SERDEV_WRITE 0x06
> +#define SCD30_SERDEV_READ 0x03
> +#define SCD30_SERDEV_MAX_BUF_SIZE 17
> +#define SCD30_SERDEV_RX_HEADER_SIZE 3
> +#define SCD30_SERDEV_CRC_SIZE 2
> +#define SCD30_SERDEV_TIMEOUT msecs_to_jiffies(200)
> +
> +struct scd30_serdev_priv {
> + struct completion meas_ready;
> + char *buf;
> + int num_expected;
> + int num;
> +};
> +
> +static u16 scd30_serdev_cmd_lookup_tbl[] = {
> + [CMD_START_MEAS] = 0x0036,
> + [CMD_STOP_MEAS] = 0x0037,
> + [CMD_MEAS_INTERVAL] = 0x0025,
> + [CMD_MEAS_READY] = 0x0027,
> + [CMD_READ_MEAS] = 0x0028,
> + [CMD_ASC] = 0x003a,
> + [CMD_FRC] = 0x0039,
> + [CMD_TEMP_OFFSET] = 0x003b,
> + [CMD_FW_VERSION] = 0x0020,
> + [CMD_RESET] = 0x0034,
> +};
> +
> +static u16 scd30_serdev_calc_crc(const char *buf, int size)
> +{
> + return crc16(0x, buf, size);
> +}
> +
> +static int scd30_serdev_xfer(struct scd30_state *state, char *txbuf, int
> txsize,
> + char *rxbuf, int rxsize)
> +{
> + struct serdev_device *serdev = to_serdev_device(state->dev);
> + struct scd30_serdev_priv *priv = state->priv;
> + int ret;
> +
> + priv->buf = rxbuf;
> + priv->num_expected = rxsize;
> + priv->num = 0;
> +
> + ret = serdev_device_write(serdev, txbuf, txsize, SCD30_SERDEV_TIMEOUT);
> + if (ret < txsize)
> + return ret < 0 ? ret : -EIO;
> +
> + ret = wait_for_completion_interruptible_timeout(&priv->meas_ready,
> + SCD30_SERDEV_TIMEOUT);
> + if (ret > 0)
> + ret = 0;
> + else if (!ret)
> + ret = -ETIMEDOUT;
> +
> + return ret;
> +}
> +
> +static int scd30_serdev_command(struct scd30
Re: [PATCH v2 1/4] iio: chemical: scd30: add core driver
On Sun, 31 May 2020 10:58:40 +0100
Jonathan Cameron wrote:
> On Sat, 30 May 2020 23:36:27 +0200
> Tomasz Duszynski wrote:
>
> > Add Sensirion SCD30 carbon dioxide core driver.
> >
> > Signed-off-by: Tomasz Duszynski
>
> Hi Tomasz
>
> A few things inline. Includes the alignment issue on
> x86_32 that I fell into whilst trying to fix timestamp
> alignment issues. Suggested resolution inline for that.
>
> Thanks,
>
> Jonathan
>
Update below after looking at the way this works with the serial dev.
> > +int scd30_probe(struct device *dev, int irq, const char *name, void *priv,
> > + scd30_command_t command)
> > +{
> > + static const unsigned long scd30_scan_masks[] = { 0x07, 0x00 };
> > + struct scd30_state *state;
> > + struct iio_dev *indio_dev;
> > + int ret;
> > + u16 val;
> > +
> > + indio_dev = devm_iio_device_alloc(dev, sizeof(*state));
> > + if (!indio_dev)
> > + return -ENOMEM;
> > +
> > + state = iio_priv(indio_dev);
> > + state->dev = dev;
>
> Doesn't seem to be used.
>
> > + state->priv = priv;
>
> What's this for? At least at first glance I can't find it being used
> anywhere.
Ah. Used in the serial module. Maybe add a comment to the structure definition
about that.
As is the dev etc. Is it possible to use the
>
> > + state->irq = irq;
> > + state->pressure_comp = SCD30_PRESSURE_COMP_DEFAULT;
> > + state->meas_interval = SCD30_MEAS_INTERVAL_DEFAULT;
> > + state->command = command;
> > + mutex_init(&state->lock);
> > + init_completion(&state->meas_ready);
> > +
> > + dev_set_drvdata(dev, indio_dev);
> > +
> > + indio_dev->dev.parent = dev;
>
> Side note that there is a series moving this into the core under revision at
> the moment. Hopefully I'll remember to fix this up when applying your patch
> if that one has gone in ahead of it.
>
> > + indio_dev->info = &scd30_info;
> > + indio_dev->name = name;
> > + indio_dev->channels = scd30_channels;
> > + indio_dev->num_channels = ARRAY_SIZE(scd30_channels);
> > + indio_dev->modes = INDIO_DIRECT_MODE;
> > + indio_dev->available_scan_masks = scd30_scan_masks;
> > +
> > + state->vdd = devm_regulator_get(dev, "vdd");
> > + if (IS_ERR(state->vdd)) {
> > + if (PTR_ERR(state->vdd) == -EPROBE_DEFER)
> > + return -EPROBE_DEFER;
> > +
> > + dev_err(dev, "failed to get regulator\n");
> > + return PTR_ERR(state->vdd);
> > + }
> > +
> > + ret = regulator_enable(state->vdd);
> > + if (ret)
> > + return ret;
> > +
> > + ret = devm_add_action_or_reset(dev, scd30_disable_regulator, state);
> > + if (ret)
> > + return ret;
> > +
...
Re: [PATCH v2 4/4] dt-bindings: iio: scd30: add device binding file
On Sat, 30 May 2020 23:36:30 +0200
Tomasz Duszynski wrote:
> Add SCD30 sensor binding file.
>
> Signed-off-by: Tomasz Duszynski
> ---
> .../iio/chemical/sensirion,scd30.yaml | 68 +++
> MAINTAINERS | 1 +
> 2 files changed, 69 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
> b/Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
> new file mode 100644
> index ..34cc3925d64d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/chemical/sensirion,scd30.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sensirion SCD30 carbon dioxide sensor
> +
> +maintainers:
> + - Tomasz Duszynski
> +
> +description: |
> + Air quality sensor capable of measuring co2 concentration, temperature
> + and relative humidity.
> +
> +properties:
> + compatible:
> +enum:
> + - sensirion,scd30
> +
> + reg:
> +maxItems: 1
> +
> + interrupts:
> +maxItems: 1
> +
> + vdd-supply: true
> +
> + sensirion,sel-gpios:
> +description: GPIO connected to the SEL line
> +maxItems: 1
> +
> + sensirion,pwm-gpios:
> +description: GPIO connected to the PWM line
> +maxItems: 1
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> +# include
> +i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + scd30@61 {
Nodes should have generic names. Not sure we have an appropriate
one in the spec, but as main focus of people using this will be
c02 herpas
c02@61?
Rob may well have a better suggestion!
> +compatible = "sensirion,scd30";
> +reg = <0x61>;
> +vdd-supply = <&vdd>;
> +interrupt-parent = <&gpio0>;
> +interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +};
> + - |
> +# include
> +serial {
> + scd30 {
> +compatible = "sensirion,scd30";
> +vdd-supply = <&vdd>;
> +interrupt-parent = <&gpio0>;
> +interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +};
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5db4b446c8ba..0ab9cf39e051 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15140,6 +15140,7 @@ F:include/uapi/linux/phantom.h
> SENSIRION SCD30 CARBON DIOXIDE SENSOR DRIVER
> M: Tomasz Duszynski
> S: Maintained
> +F: Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
> F: drivers/iio/chemical/scd30.h
> F: drivers/iio/chemical/scd30_core.c
> F: drivers/iio/chemical/scd30_i2c.c
Re: [PATCH] iio: accel: mxc4005: add support for mxc6655
On Fri, 29 May 2020 22:05:49 +0200
Christian Oder wrote:
> The mxc6655 is fully working with the existing mxc4005 driver.
> Add support for it.
>
> Signed-off-by: Christian Oder
One query on ACPI bindings. What is there already may
be missleading :(
> ---
> drivers/iio/accel/mxc4005.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/iio/accel/mxc4005.c b/drivers/iio/accel/mxc4005.c
> index 3d5bea651923..3b8614352cb4 100644
> --- a/drivers/iio/accel/mxc4005.c
> +++ b/drivers/iio/accel/mxc4005.c
> @@ -474,12 +474,14 @@ static int mxc4005_probe(struct i2c_client *client,
>
> static const struct acpi_device_id mxc4005_acpi_match[] = {
> {"MXC4005", 0},
> + {"MXC6655", 0},
Do we have a reference for these ACPI bindings? While they may seem
obvious, memsic don't have a registered PNP or ACPI ID that I can
find. If these are in the wild (i.e. in shipping firmware) then we
can take them as defacto bindings, otherwise we should avoid making
them so by putting them in the driver.
Quite a few similar bindings got in a while back that I should have
noticed, but I wasn't so familiar with ACPI back then. Some
scrubbing of these has gone on recently, but there are lots still
left in IIO.
If we aren't sure, then drop the ACPI addition and just leave the
i2c one below. Adding an explicit DT binding table would also be
good if that is method you are using to probe this (or PRP0001
from acpi which uses the dt bindings table)
Thanks,
Jonathan
> { },
> };
> MODULE_DEVICE_TABLE(acpi, mxc4005_acpi_match);
>
> static const struct i2c_device_id mxc4005_id[] = {
> {"mxc4005", 0},
> + {"mxc6655", 0},
> { },
> };
> MODULE_DEVICE_TABLE(i2c, mxc4005_id);
5.7-rc0: kswapd eats cpu during a disk test?!
Hi! This is simple cat /dev/sda > /dev/zero... on thinkpad x60 (x86-32), with spinning rust. PID USER PR NIVIRTRESSHR S %CPU %MEM TIME+ COMMAND 1000 root 20 0 0 0 0 R 53.3 0.0 57:34.93 kswapd0 27897 root 20 06976580536 R 44.5 0.0 1:44.53 cat It keeps both CPUs busy... and I don't think that's right. -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html signature.asc Description: Digital signature
Re: [PATCH V6 1/7] iio: adc: Convert the QCOM SPMI ADC bindings to .yaml format
On Thu, 28 May 2020 22:24:23 +0530 Jishnu Prakash wrote: > Convert the adc bindings from .txt to .yaml format. > > Signed-off-by: Jishnu Prakash > Reviewed-by: Amit Kucheria > Reviewed-by: Rob Herring > Acked-by: Linus Walleij Jishnu, Patch is fine, but I'd like to have seen a cover letter and clear statement of changes from v5. Thanks, Jonathan > --- > .../devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 173 -- > .../bindings/iio/adc/qcom,spmi-vadc.yaml | 252 > + > 2 files changed, 252 insertions(+), 173 deletions(-) > delete mode 100644 > Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > create mode 100644 > Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml > > diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > deleted file mode 100644 > index c878768..000 > --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > +++ /dev/null > @@ -1,173 +0,0 @@ > -Qualcomm's SPMI PMIC ADC > - > -- SPMI PMIC voltage ADC (VADC) provides interface to clients to read > - voltage. The VADC is a 15-bit sigma-delta ADC. > -- SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read > - voltage. The VADC is a 16-bit sigma-delta ADC. > - > -VADC node: > - > -- compatible: > -Usage: required > -Value type: > -Definition: Should contain "qcom,spmi-vadc". > -Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. > -Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. > -Should contain "qcom,pms405-adc" for PMS405 PMIC > - > -- reg: > -Usage: required > -Value type: > -Definition: VADC base address in the SPMI PMIC register map. > - > -- #address-cells: > -Usage: required > -Value type: > -Definition: Must be one. Child node 'reg' property should define ADC > -channel number. > - > -- #size-cells: > -Usage: required > -Value type: > -Definition: Must be zero. > - > -- #io-channel-cells: > -Usage: required > -Value type: > -Definition: Must be one. For details about IIO bindings see: > -Documentation/devicetree/bindings/iio/iio-bindings.txt > - > -- interrupts: > -Usage: optional > -Value type: > -Definition: End of conversion interrupt. > - > -Channel node properties: > - > -- reg: > -Usage: required > -Value type: > -Definition: ADC channel number. > -See include/dt-bindings/iio/qcom,spmi-vadc.h > - > -- label: > -Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2" > -Value type: > -Definition: ADC input of the platform as seen in the schematics. > -For thermistor inputs connected to generic AMUX or GPIO inputs > -these can vary across platform for the same pins. Hence select > -the platform schematics name for this channel. > - > -- qcom,decimation: > -Usage: optional > -Value type: > -Definition: This parameter is used to decrease ADC sampling rate. > -Quicker measurements can be made by reducing decimation ratio. > -- For compatible property "qcom,spmi-vadc", valid values are > - 512, 1024, 2048, 4096. If property is not found, default value > - of 512 will be used. > -- For compatible property "qcom,spmi-adc5", valid values are > 250, 420 > - and 840. If property is not found, default value of 840 is > used. > -- For compatible property "qcom,spmi-adc-rev2", valid values are > 256, > - 512 and 1024. If property is not present, default value is > 1024. > - > -- qcom,pre-scaling: > -Usage: optional > -Value type: > -Definition: Used for scaling the channel input signal before the signal > is > -fed to VADC. The configuration for this node is to know the > -pre-determined ratio and use it for post scaling. Select one from > -the following options. > -<1 1>, <1 3>, <1 4>, <1 6>, <1 20>, <1 8>, <10 81>, <1 10> > -If property is not found default value depending on chip will be > used. > - > -- qcom,ratiometric: > -Usage: optional > -Value type: > -Definition: Channel calibration type. > -- For compatible property "qcom,spmi-vadc", if this property is > - specified VADC will use the VDD reference (1.8V) and GND for > - channel calibration. If property is not found, channel will be > - calibrated with 0.625V and 1.25V reference channels, also > - known as absolute calibration. > -- For compatible property "qcom,spmi-adc5" and > "qcom,spmi-adc-rev2", > - if this property is specified VADC will use the VDD reference > - (1.875V) and GND for channel calibration. If property is not > found, > -
Re: Re: drm/nouveau/clk/gm20b: Fix memory leak in gm20b_clk_new()
> > If gk20a_clk_ctor() never returns such an error code, > > we may need not to release this clock object. > > Would you like to achieve complete exception handling > also for this function implementation? > It seems that it's possible to get -ENOMEM from gk20a_clk_ctor(). The call chain is as follows: gk20a_clk_ctor() <- nvkm_clk_ctor() <- nvkm_notify_init() When nvkm_notify_init() returns -ENOMEM, all of its callers (and callers of callers) will be influenced if there is a failed kzalloc inside which. In this case, maybe we should check the return value of gk20a_clk_ctor() and release clk if it returns -ENOMEM. And many other functions also have the same issue (e.g., gm20b_clk_new_speedo0). Do you have any idea about this problem? Regards, Dinghao
Re: [PATCH] sh: Implement __get_user_u64() required for 64-bit get_user()
Hi Adrian,
On Sun, May 31, 2020 at 11:59 AM John Paul Adrian Glaubitz
wrote:
> On 5/31/20 11:54 AM, John Paul Adrian Glaubitz wrote:
> > On 5/31/20 11:52 AM, Geert Uytterhoeven wrote:
> >> As this is the 64-bit variant, I think this single move should be
> >> replaced by a double move:
> >>
> >>"mov #0,%R1\n\t" \
> >>"mov #0,%S1\n\t" \
> >>
> >> Same for the big endian version below.
> >>
> >> Disclaimer: uncompiled, untested, no SH assembler expert.
> >
> > Right, this makes sense. I'll send a new patch shortly.
>
> Hmm, this change is not the case for __put_user_asm() vs. __put_user_u64().
> But I have to admit, I don't know what the part below "3:\n\t" is for.
It's part of the exception handling, in case the passed (userspace) pointer
points to an inaccessible address, and triggers an exception.
For an invalid store, nothing is done, besides returning -EFAULT.
Hence there's no "mov #0, %1\n\t" in the put_user case.
For an invalid load, the data is replaced by zero, and -EFAULT is returned.
> +__asm__ __volatile__( \
> + "1:\n\t" \
> + "mov.l %2,%R1\n\t" \
> + "mov.l %T2,%S1\n\t" \
> + "2:\n" \
(reordering the two sections for easier explanation)
> + ".section __ex_table,\"a\"\n\t" \
> + ".long 1b, 3b\n\t" \
In case an exception happens for the instruction at 1b, jump to 3b.
Note that the m68k version has two entries here: one for each half of
the 64-bit access[*].
I don't know if that is really needed (and thus SH needs it, too), or if
the exception code handles subsequent instructions automatically.
> + ".section .fixup,\"ax\"\n" \
> + "3:\n\t" \
> + "mov#0, %1\n\t" \
Return zero instead of the data at the (invalid) address.
> + "mov.l 4f, %0\n\t" \
> + "jmp@%0\n\t" \
Resume at 2b.
Remember: branch delay slot, so the instruction below is executed first!
> + " mov %3, %0\n\t" \
Set err to -EFAULT.
> + ".balign4\n" \
> + "4: .long 2b\n\t" \
> + ".previous\n" \
> + ".previous" \
> + :"=&r" (err), "=&r" (x) \
> + :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
[*] arch/m68k/include/asm/uaccess_mm.h
"1: "MOVES".l (%2)+,%1\n" \
"2: "MOVES".l (%2),%R1\n" \
" .section __ex_table,\"a\"\n"\
" .align 4\n"\
" .long 1b,10b\n" \
" .long 2b,10b\n" \
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH V6 1/7] iio: adc: Convert the QCOM SPMI ADC bindings to .yaml format
On Sun, 31 May 2020 11:36:12 +0100 Jonathan Cameron wrote: > On Thu, 28 May 2020 22:24:23 +0530 > Jishnu Prakash wrote: > > > Convert the adc bindings from .txt to .yaml format. > > > > Signed-off-by: Jishnu Prakash > > Reviewed-by: Amit Kucheria > > Reviewed-by: Rob Herring > > Acked-by: Linus Walleij > > Jishnu, Patch is fine, but I'd like to have seen a cover > letter and clear statement of changes from v5. > Applied to the togreg branch of iio.git and pushed out as testing. Note we've missed the merge window now for IIO so this will be in the following cycle. Thanks, J > Thanks, > > Jonathan > > > --- > > .../devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 173 -- > > .../bindings/iio/adc/qcom,spmi-vadc.yaml | 252 > > + > > 2 files changed, 252 insertions(+), 173 deletions(-) > > delete mode 100644 > > Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > > create mode 100644 > > Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml > > > > diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > > b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > > deleted file mode 100644 > > index c878768..000 > > --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt > > +++ /dev/null > > @@ -1,173 +0,0 @@ > > -Qualcomm's SPMI PMIC ADC > > - > > -- SPMI PMIC voltage ADC (VADC) provides interface to clients to read > > - voltage. The VADC is a 15-bit sigma-delta ADC. > > -- SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read > > - voltage. The VADC is a 16-bit sigma-delta ADC. > > - > > -VADC node: > > - > > -- compatible: > > -Usage: required > > -Value type: > > -Definition: Should contain "qcom,spmi-vadc". > > -Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. > > -Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC > > driver. > > -Should contain "qcom,pms405-adc" for PMS405 PMIC > > - > > -- reg: > > -Usage: required > > -Value type: > > -Definition: VADC base address in the SPMI PMIC register map. > > - > > -- #address-cells: > > -Usage: required > > -Value type: > > -Definition: Must be one. Child node 'reg' property should define ADC > > -channel number. > > - > > -- #size-cells: > > -Usage: required > > -Value type: > > -Definition: Must be zero. > > - > > -- #io-channel-cells: > > -Usage: required > > -Value type: > > -Definition: Must be one. For details about IIO bindings see: > > -Documentation/devicetree/bindings/iio/iio-bindings.txt > > - > > -- interrupts: > > -Usage: optional > > -Value type: > > -Definition: End of conversion interrupt. > > - > > -Channel node properties: > > - > > -- reg: > > -Usage: required > > -Value type: > > -Definition: ADC channel number. > > -See include/dt-bindings/iio/qcom,spmi-vadc.h > > - > > -- label: > > -Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2" > > -Value type: > > -Definition: ADC input of the platform as seen in the schematics. > > -For thermistor inputs connected to generic AMUX or GPIO inputs > > -these can vary across platform for the same pins. Hence select > > -the platform schematics name for this channel. > > - > > -- qcom,decimation: > > -Usage: optional > > -Value type: > > -Definition: This parameter is used to decrease ADC sampling rate. > > -Quicker measurements can be made by reducing decimation ratio. > > -- For compatible property "qcom,spmi-vadc", valid values are > > - 512, 1024, 2048, 4096. If property is not found, default > > value > > - of 512 will be used. > > -- For compatible property "qcom,spmi-adc5", valid values are > > 250, 420 > > - and 840. If property is not found, default value of 840 is > > used. > > -- For compatible property "qcom,spmi-adc-rev2", valid values > > are 256, > > - 512 and 1024. If property is not present, default value is > > 1024. > > - > > -- qcom,pre-scaling: > > -Usage: optional > > -Value type: > > -Definition: Used for scaling the channel input signal before the > > signal is > > -fed to VADC. The configuration for this node is to know the > > -pre-determined ratio and use it for post scaling. Select one > > from > > -the following options. > > -<1 1>, <1 3>, <1 4>, <1 6>, <1 20>, <1 8>, <10 81>, <1 10> > > -If property is not found default value depending on chip will > > be used. > > - > > -- qcom,ratiometric: > > -Usage: optional > > -Value type: > > -Definition: Channel calibration type. > > -- For compatible property "qcom,spmi-vadc", if this property is > > - specified VADC will
Re: [PATCH V6 2/7] iio: adc: Add PMIC7 ADC bindings
On Thu, 28 May 2020 22:24:24 +0530 Jishnu Prakash wrote: > Add documentation for PMIC7 ADC peripheral. > For the PMIC7-type PMICs, ADC peripheral is present in HW for the > following PMICs: PMK8350, PM8350, PM8350b, PMR735a and PMR735b. > Of these, only the ADC peripheral on PMK8350 is exposed directly to SW. > If SW needs to communicate with ADCs on other PMICs, it specifies the > PMIC to PMK8350 through the newly added SID register and communication > between PMK8350 ADC and other PMIC ADCs is carried out through > PBS(Programmable Boot Sequence) at the firmware level. > > In addition, add definitions for ADC channels and virtual channel > definitions (combination of ADC channel number and PMIC SID number) > per PMIC, to be used by ADC clients for PMIC7. > > Signed-off-by: Jishnu Prakash > Reviewed-by: Amit Kucheria > Reviewed-by: Rob Herring Applied. Thanks, J > --- > .../bindings/iio/adc/qcom,spmi-vadc.yaml | 38 -- > include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h| 67 > include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h | 88 > ++ > include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h | 46 +++ > include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h | 28 +++ > include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h | 28 +++ > include/dt-bindings/iio/qcom,spmi-vadc.h | 78 ++- > 7 files changed, 366 insertions(+), 7 deletions(-) > create mode 100644 include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h > create mode 100644 include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h > create mode 100644 include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h > create mode 100644 include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h > create mode 100644 include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h > > diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml > b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml > index de8d243..e6263b6 100644 > --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml > +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml > @@ -13,7 +13,7 @@ maintainers: > description: | >SPMI PMIC voltage ADC (VADC) provides interface to clients to read >voltage. The VADC is a 15-bit sigma-delta ADC. > - SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read > + SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read >voltage. The VADC is a 16-bit sigma-delta ADC. > > properties: > @@ -28,6 +28,7 @@ properties: >- qcom,spmi-vadc >- qcom,spmi-adc5 >- qcom,spmi-adc-rev2 > + - qcom,spmi-adc7 > >reg: > description: VADC base address in the SPMI PMIC register map > @@ -70,6 +71,8 @@ patternProperties: > description: | >ADC channel number. >See include/dt-bindings/iio/qcom,spmi-vadc.h > + For PMIC7 ADC, the channel numbers are specified separately per > PMIC > + in the PMIC-specific files in include/dt-bindings/iio/. > >label: > $ref: /schemas/types.yaml#/definitions/string > @@ -113,11 +116,11 @@ patternProperties: >channel calibration. If property is not found, channel will be >calibrated with 0.625V and 1.25V reference channels, also >known as absolute calibration. > -- For compatible property "qcom,spmi-adc5" and > "qcom,spmi-adc-rev2", > - if this property is specified VADC will use the VDD reference > (1.875V) > - and GND for channel calibration. If property is not found, > channel > - will be calibrated with 0V and 1.25V reference channels, also > known > - as absolute calibration. > +- For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7" and > + "qcom,spmi-adc-rev2", if this property is specified VADC will > use > + the VDD reference (1.875V) and GND for channel calibration. If > + property is not found, channel will be calibrated with 0V and > 1.25V > + reference channels, also known as absolute calibration. > type: boolean > >qcom,hw-settle-time: > @@ -208,6 +211,29 @@ allOf: >enum: [ 1, 2, 4, 8, 16 ] >default: 1 > > + - if: > + properties: > +compatible: > + contains: > +const: qcom,spmi-adc7 > + > +then: > + patternProperties: > +"^.*@[0-9a-f]+$": > + properties: > +qcom,decimation: > + enum: [ 85, 340, 1360 ] > + default: 1360 > + > +qcom,hw-settle-time: > + enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, > 4000, > + 8000, 16000, 32000, 64000, 128000 ] > + default: 15 > + > +qcom,avg-samples: > + enum: [ 1, 2, 4, 8, 16 ] > + defau
Re: [PATCH V6 4/7] iio: adc: Add support for PMIC7 ADC
On Thu, 28 May 2020 22:24:26 +0530
Jishnu Prakash wrote:
> The ADC architecture on PMIC7 is changed as compared to PMIC5. The
> major change from PMIC5 is that all SW communication to ADC goes through
> PMK8350, which communicates with other PMICs through PBS when the ADC
> on PMK8350 works in master mode. The SID register is used to identify the
> PMICs with which the PBS needs to communicate. Add support for the same.
>
> Signed-off-by: Jishnu Prakash
> Reviewed-by: Andy Shevchenko
one nitpick inline. But otherwise looks good to me.
Nitpick is trivial so I'll ignore it.
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.
Thanks,
Jonathan
> ---
> drivers/iio/adc/qcom-spmi-adc5.c | 215 +-
> drivers/iio/adc/qcom-vadc-common.c | 262
> +
> drivers/iio/adc/qcom-vadc-common.h | 14 ++
> 3 files changed, 488 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c
> b/drivers/iio/adc/qcom-spmi-adc5.c
> index 0fa1d37..dcc7599 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * Copyright (c) 2018, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved.
> */
>
> #include
> @@ -23,6 +23,7 @@
>
> #define ADC5_USR_REVISION1 0x0
> #define ADC5_USR_STATUS1 0x8
> +#define ADC5_USR_STATUS1_CONV_FAULT BIT(7)
> #define ADC5_USR_STATUS1_REQ_STS BIT(1)
> #define ADC5_USR_STATUS1_EOC BIT(0)
> #define ADC5_USR_STATUS1_REQ_STS_EOC_MASK0x3
> @@ -65,6 +66,9 @@
>
> #define ADC5_USR_IBAT_DATA1 0x53
>
> +#define ADC_CHANNEL_OFFSET 0x8
> +#define ADC_CHANNEL_MASK GENMASK(7, 0)
> +
> /*
> * Conversion time varies based on the decimation, clock rate, fast average
> * samples and measurements queued across different VADC peripherals.
> @@ -79,6 +83,11 @@
> #define ADC5_HW_SETTLE_DIFF_MINOR3
> #define ADC5_HW_SETTLE_DIFF_MAJOR5
>
> +/* For PMIC7 */
> +#define ADC_APP_SID 0x40
> +#define ADC_APP_SID_MASK GENMASK(3, 0)
> +#define ADC7_CONV_TIMEOUTmsecs_to_jiffies(10)
> +
> enum adc5_cal_method {
> ADC5_NO_CAL = 0,
> ADC5_RATIOMETRIC_CAL,
> @@ -96,6 +105,7 @@ enum adc5_cal_val {
> * @cal_method: calibration method.
> * @cal_val: calibration value
> * @decimation: sampling rate supported for the channel.
> + * @sid: slave id of PMIC owning the channel, for PMIC7.
> * @prescale: channel scaling performed on the input signal.
> * @hw_settle_time: the time between AMUX being configured and the
> * start of conversion.
> @@ -110,6 +120,7 @@ struct adc5_channel_prop {
> enum adc5_cal_methodcal_method;
> enum adc5_cal_val cal_val;
> unsigned intdecimation;
> + unsigned intsid;
> unsigned intprescale;
> unsigned inthw_settle_time;
> unsigned intavg_samples;
> @@ -165,6 +176,11 @@ static int adc5_write(struct adc5_chip *adc, u16 offset,
> u8 *data, int len)
> return regmap_bulk_write(adc->regmap, adc->base + offset, data, len);
> }
>
> +static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8
> val)
> +{
> + return regmap_update_bits(adc->regmap, adc->base + offset, mask, val);
> +}
> +
> static int adc5_prescaling_from_dt(u32 num, u32 den)
> {
> unsigned int pre;
> @@ -314,6 +330,47 @@ static int adc5_configure(struct adc5_chip *adc,
> return adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
> }
>
> +static int adc7_configure(struct adc5_chip *adc,
> + struct adc5_channel_prop *prop)
> +{
> + int ret;
> + u8 conv_req = 0, buf[4];
> +
> + ret = adc5_masked_write(adc, ADC_APP_SID, ADC_APP_SID_MASK, prop->sid);
> + if (ret)
> + return ret;
> +
> + ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
> + if (ret)
> + return ret;
> +
> + /* Digital param selection */
> + adc5_update_dig_param(adc, prop, &buf[0]);
> +
> + /* Update fast average sample value */
> + buf[1] &= ~ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK;
> + buf[1] |= prop->avg_samples;
> +
> + /* Select ADC channel */
> + buf[2] = prop->channel;
> +
> + /* Select HW settle delay for channel */
> + buf[3] &= ~ADC5_USR_HW_SETTLE_DELAY_MASK;
> + buf[3] |= prop->hw_settle_time;
> +
> + /* Select CONV request */
> + conv_req = ADC5_USR_CONV_REQ_REQ;
> +
> + if (!adc->poll_eoc)
> + reinit_completion(&adc->complete);
> +
> + ret = adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
> + if (ret)
> +
Re: [PATCH V6 3/7] iio: adc: Add info property under adc_data
On Thu, 28 May 2020 22:24:25 +0530
Jishnu Prakash wrote:
> Add info property under adc_data to support adding ADC variants
> which may use different iio_info than the one defined for PMIC5.
>
> Signed-off-by: Jishnu Prakash
Applied.
Thanks,
Jonathan
> ---
> drivers/iio/adc/qcom-spmi-adc5.c | 4 +++-
> drivers/iio/adc/qcom-vadc-common.h | 1 +
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c
> b/drivers/iio/adc/qcom-spmi-adc5.c
> index 21fdcde..0fa1d37 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -629,6 +629,7 @@ static const struct adc5_data adc5_data_pmic = {
> .full_scale_code_volt = 0x70e4,
> .full_scale_code_cur = 0x2710,
> .adc_chans = adc5_chans_pmic,
> + .info = &adc5_info,
> .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX])
> {250, 420, 840},
> .hw_settle_1 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX])
> @@ -643,6 +644,7 @@ static const struct adc5_data adc5_data_pmic_rev2 = {
> .full_scale_code_volt = 0x4000,
> .full_scale_code_cur = 0x1800,
> .adc_chans = adc5_chans_rev2,
> + .info = &adc5_info,
> .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX])
> {256, 512, 1024},
> .hw_settle_1 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX])
> @@ -777,7 +779,7 @@ static int adc5_probe(struct platform_device *pdev)
> indio_dev->dev.of_node = node;
> indio_dev->name = pdev->name;
> indio_dev->modes = INDIO_DIRECT_MODE;
> - indio_dev->info = &adc5_info;
> + indio_dev->info = adc->data->info;
> indio_dev->channels = adc->iio_chans;
> indio_dev->num_channels = adc->nchannels;
>
> diff --git a/drivers/iio/adc/qcom-vadc-common.h
> b/drivers/iio/adc/qcom-vadc-common.h
> index e074902a..6a7553f 100644
> --- a/drivers/iio/adc/qcom-vadc-common.h
> +++ b/drivers/iio/adc/qcom-vadc-common.h
> @@ -136,6 +136,7 @@ struct adc5_data {
> const u32 full_scale_code_volt;
> const u32 full_scale_code_cur;
> const struct adc5_channels *adc_chans;
> + const struct iio_info *info;
> unsigned int*decimation;
> unsigned int*hw_settle_1;
> unsigned int*hw_settle_2;
Re: [PATCH V6 5/7] iio: adc: Update return value checks
On Thu, 28 May 2020 22:24:27 +0530
Jishnu Prakash wrote:
> Clean up some return value checks to make code more compact.
>
> Signed-off-by: Jishnu Prakash
Applied.
Thanks,
J
> ---
> drivers/iio/adc/qcom-spmi-adc5.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c
> b/drivers/iio/adc/qcom-spmi-adc5.c
> index dcc7599..3022313 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -301,7 +301,7 @@ static int adc5_configure(struct adc5_chip *adc,
>
> /* Read registers 0x42 through 0x46 */
> ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
> - if (ret < 0)
> + if (ret)
> return ret;
>
> /* Digital param selection */
> @@ -388,7 +388,7 @@ static int adc5_do_conversion(struct adc5_chip *adc,
>
> if (adc->poll_eoc) {
> ret = adc5_poll_wait_eoc(adc);
> - if (ret < 0) {
> + if (ret) {
> pr_err("EOC bit not set\n");
> goto unlock;
> }
> @@ -398,7 +398,7 @@ static int adc5_do_conversion(struct adc5_chip *adc,
> if (!ret) {
> pr_debug("Did not get completion timeout.\n");
> ret = adc5_poll_wait_eoc(adc);
> - if (ret < 0) {
> + if (ret) {
> pr_err("EOC bit not set\n");
> goto unlock;
> }
> @@ -516,8 +516,6 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
> default:
> return -EINVAL;
> }
> -
> - return 0;
> }
>
> static int adc7_read_raw(struct iio_dev *indio_dev,
> @@ -761,7 +759,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
>
> ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version,
> sizeof(dig_version));
> - if (ret < 0) {
> + if (ret) {
> dev_err(dev, "Invalid dig version read %d\n", ret);
> return ret;
> }
[PATCH v2] sh: Implement __get_user_u64() required for 64-bit get_user()
Trying to build the kernel with CONFIG_INFINIBAND_USER_ACCESS enabled fails
ERROR: "__get_user_unknown" [drivers/infiniband/core/ib_uverbs.ko]
undefined!
with on SH since the kernel misses a 64-bit implementation of get_user().
Implement the missing 64-bit get_user() as __get_user_u64(), matching the
already existing __put_user_u64() which implements the 64-bit put_user().
Signed-off-by: John Paul Adrian Glaubitz
---
arch/sh/include/asm/uaccess_32.h | 51
1 file changed, 51 insertions(+)
Changes since v1:
- Replace single mov instruction for exception handling
in case of invalid load
diff --git a/arch/sh/include/asm/uaccess_32.h b/arch/sh/include/asm/uaccess_32.h
index 624cf55acc27..35f6c1e40ec3 100644
--- a/arch/sh/include/asm/uaccess_32.h
+++ b/arch/sh/include/asm/uaccess_32.h
@@ -26,6 +26,9 @@ do {
\
case 4: \
__get_user_asm(x, ptr, retval, "l");\
break; \
+ case 8: \
+ __get_user_u64(x, ptr, retval); \
+ break; \
default:\
__get_user_unknown(); \
break; \
@@ -66,6 +69,54 @@ do { \
extern void __get_user_unknown(void);
+#if defined(CONFIG_CPU_LITTLE_ENDIAN)
+#define __get_user_u64(x, addr, err) \
+({ \
+__asm__ __volatile__( \
+ "1:\n\t" \
+ "mov.l %2,%R1\n\t" \
+ "mov.l %T2,%S1\n\t" \
+ "2:\n" \
+ ".section .fixup,\"ax\"\n" \
+ "3:\n\t" \
+ "mov #0,%R1\n\t" \
+ "mov #0,%S1\n\t" \
+ "mov.l 4f, %0\n\t" \
+ "jmp@%0\n\t" \
+ " mov %3, %0\n\t" \
+ ".balign4\n" \
+ "4: .long 2b\n\t" \
+ ".previous\n" \
+ ".section __ex_table,\"a\"\n\t" \
+ ".long 1b, 3b\n\t" \
+ ".previous" \
+ :"=&r" (err), "=&r" (x) \
+ :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
+#else
+#define __get_user_u64(x, addr, err) \
+({ \
+__asm__ __volatile__( \
+ "1:\n\t" \
+ "mov.l %2,%S1\n\t" \
+ "mov.l %T2,%R1\n\t" \
+ "2:\n" \
+ ".section .fixup,\"ax\"\n" \
+ "3:\n\t" \
+ "mov #0,%S1\n\t" \
+ "mov #0,%R1\n\t" \
+ "mov.l 4f, %0\n\t" \
+ "jmp@%0\n\t" \
+ " mov %3, %0\n\t" \
+ ".balign4\n" \
+ "4: .long 2b\n\t" \
+ ".previous\n" \
+ ".section __ex_table,\"a\"\n\t" \
+ ".long 1b, 3b\n\t" \
+ ".previous" \
+ :"=&r" (err), "=&r" (x) \
+ :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
+#endif
+
#define __put_user_size(x,ptr,size,retval) \
do { \
retval = 0; \
--
2.27.0.rc2
Re: [PATCH] sh: Implement __get_user_u64() required for 64-bit get_user()
Hi Geert! Thanks a lot for the explanation! On 5/31/20 12:43 PM, Geert Uytterhoeven wrote: >> Hmm, this change is not the case for __put_user_asm() vs. __put_user_u64(). >> But I have to admit, I don't know what the part below "3:\n\t" is for. > > It's part of the exception handling, in case the passed (userspace) pointer > points to an inaccessible address, and triggers an exception. > > For an invalid store, nothing is done, besides returning -EFAULT. > Hence there's no "mov #0, %1\n\t" in the put_user case. I have replaced it with two individual mov's now as suggested since I now understand what's happening here. > For an invalid load, the data is replaced by zero, and -EFAULT is returned. > >> +__asm__ __volatile__( \ >> + "1:\n\t" \ >> + "mov.l %2,%R1\n\t" \ >> + "mov.l %T2,%S1\n\t" \ >> + "2:\n" \ > > (reordering the two sections for easier explanation) > >> + ".section __ex_table,\"a\"\n\t" \ >> + ".long 1b, 3b\n\t" \ > > In case an exception happens for the instruction at 1b, jump to 3b. > > Note that the m68k version has two entries here: one for each half of > the 64-bit access[*]. > I don't know if that is really needed (and thus SH needs it, too), or if > the exception code handles subsequent instructions automatically. Hmm. I assume this is something one of the SH maintainers or Yutaka Niibe can answer. >> + ".section .fixup,\"ax\"\n" \ >> + "3:\n\t" \ >> + "mov#0, %1\n\t" \ > > Return zero instead of the data at the (invalid) address. Makes sense. >> + "mov.l 4f, %0\n\t" \ >> + "jmp@%0\n\t" \ > > Resume at 2b. > Remember: branch delay slot, so the instruction below is executed first! I didn't even know that SH has delay slots. >> + " mov %3, %0\n\t" \ > > Set err to -EFAULT. Yes. >> + ".balign4\n" \ >> + "4: .long 2b\n\t" \ >> + ".previous\n" \ > >> + ".previous" \ >> + :"=&r" (err), "=&r" (x) \ >> + :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) > > [*] arch/m68k/include/asm/uaccess_mm.h > > "1: "MOVES".l (%2)+,%1\n" \ > "2: "MOVES".l (%2),%R1\n" \ > > " .section __ex_table,\"a\"\n"\ > " .align 4\n"\ > " .long 1b,10b\n" \ > " .long 2b,10b\n" \ > Hmm. I'll wait for more feedback whether need to do the same as on m68k here. Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer - glaub...@debian.org `. `' Freie Universitaet Berlin - glaub...@physik.fu-berlin.de `-GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
Re: [PATCH V6 7/7] iio: adc: Add a common read function for PMIC5 and PMIC7
On Thu, 28 May 2020 22:24:29 +0530
Jishnu Prakash wrote:
> Add a common function used for read_raw callback for both PMIC5
> and PMIC7 ADCs.
>
> Signed-off-by: Jishnu Prakash
Hmm. I'm not completely sold on this one. Suggestions below.
Jonathan
> ---
> drivers/iio/adc/qcom-spmi-adc5.c | 53
> +++-
> 1 file changed, 25 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c
> b/drivers/iio/adc/qcom-spmi-adc5.c
> index 0f9af66..fe49741 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -449,6 +449,13 @@ static int adc7_do_conversion(struct adc5_chip *adc,
> return ret;
> }
>
> +struct adc_do_conversion {
> + int (*adc_do_conversion)(struct adc5_chip *adc,
> + struct adc5_channel_prop *prop,
> + struct iio_chan_spec const *chan,
> + u16 *data_volt, u16 *data_cur);
Why use a structure for this? It's just a function pointer.
If they form is too long you can always use a typedef.
This is fine if you have other stuff coming shortly that will add
to this structure but for now it's just a bit confusing.
Directly passing the function pointer will reduce the amount
of coded added here and make the argument in favour of refactoring
rather stronger.
> +};
> +
> static irqreturn_t adc5_isr(int irq, void *dev_id)
> {
> struct adc5_chip *adc = dev_id;
> @@ -487,9 +494,9 @@ static int adc7_of_xlate(struct iio_dev *indio_dev,
> return -EINVAL;
> }
>
> -static int adc5_read_raw(struct iio_dev *indio_dev,
> +static int adc_read_raw_common(struct iio_dev *indio_dev,
>struct iio_chan_spec const *chan, int *val, int *val2,
> - long mask)
> + long mask, struct adc_do_conversion do_conv)
> {
> struct adc5_chip *adc = iio_priv(indio_dev);
> struct adc5_channel_prop *prop;
> @@ -500,8 +507,8 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
>
> switch (mask) {
> case IIO_CHAN_INFO_PROCESSED:
> - ret = adc5_do_conversion(adc, prop, chan,
> - &adc_code_volt, &adc_code_cur);
> + ret = do_conv.adc_do_conversion(adc, prop, chan,
> + &adc_code_volt, &adc_code_cur);
> if (ret)
> return ret;
>
> @@ -518,36 +525,26 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
> }
> }
>
> -static int adc7_read_raw(struct iio_dev *indio_dev,
> +static int adc5_read_raw(struct iio_dev *indio_dev,
>struct iio_chan_spec const *chan, int *val, int *val2,
>long mask)
> {
> - struct adc5_chip *adc = iio_priv(indio_dev);
> - struct adc5_channel_prop *prop;
> - u16 adc_code_volt, adc_code_cur;
> - int ret;
> -
> - prop = &adc->chan_props[chan->address];
> -
> - switch (mask) {
> - case IIO_CHAN_INFO_PROCESSED:
> - ret = adc7_do_conversion(adc, prop, chan,
> - &adc_code_volt, &adc_code_cur);
> - if (ret)
> - return ret;
> + struct adc_do_conversion do_conv;
>
> - ret = qcom_adc5_hw_scale(prop->scale_fn_type,
> - &adc5_prescale_ratios[prop->prescale],
> - adc->data,
> - adc_code_volt, val);
> + do_conv.adc_do_conversion = adc5_do_conversion;
> + return adc_read_raw_common(indio_dev, chan, val, val2,
> + mask, do_conv);
> +}
>
> - if (ret)
> - return ret;
> +static int adc7_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan, int *val, int *val2,
> + long mask)
> +{
> + struct adc_do_conversion do_conv;
>
> - return IIO_VAL_INT;
> - default:
> - return -EINVAL;
> - }
> + do_conv.adc_do_conversion = adc7_do_conversion;
> + return adc_read_raw_common(indio_dev, chan, val, val2,
> + mask, do_conv);
> }
>
> static const struct iio_info adc5_info = {
Re: [PATCH V6 6/7] iio: adc: Update debug prints
On Thu, 28 May 2020 22:24:28 +0530
Jishnu Prakash wrote:
> Change pr_err/pr_debug statements to dev_err/dev_dbg for
> increased clarity.
>
> Signed-off-by: Jishnu Prakash
> Reviewed-by: Andy Shevchenko
Applied. Thanks, J
> ---
> drivers/iio/adc/qcom-spmi-adc5.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c
> b/drivers/iio/adc/qcom-spmi-adc5.c
> index 3022313..0f9af66 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -246,11 +246,11 @@ static int adc5_read_voltage_data(struct adc5_chip
> *adc, u16 *data)
> *data = (rslt_msb << 8) | rslt_lsb;
>
> if (*data == ADC5_USR_DATA_CHECK) {
> - pr_err("Invalid data:0x%x\n", *data);
> + dev_err(adc->dev, "Invalid data:0x%x\n", *data);
> return -EINVAL;
> }
>
> - pr_debug("voltage raw code:0x%x\n", *data);
> + dev_dbg(adc->dev, "voltage raw code:0x%x\n", *data);
>
> return 0;
> }
> @@ -382,24 +382,24 @@ static int adc5_do_conversion(struct adc5_chip *adc,
>
> ret = adc5_configure(adc, prop);
> if (ret) {
> - pr_err("ADC configure failed with %d\n", ret);
> + dev_err(adc->dev, "ADC configure failed with %d\n", ret);
> goto unlock;
> }
>
> if (adc->poll_eoc) {
> ret = adc5_poll_wait_eoc(adc);
> if (ret) {
> - pr_err("EOC bit not set\n");
> + dev_err(adc->dev, "EOC bit not set\n");
> goto unlock;
> }
> } else {
> ret = wait_for_completion_timeout(&adc->complete,
> ADC5_CONV_TIMEOUT);
> if (!ret) {
> - pr_debug("Did not get completion timeout.\n");
> + dev_dbg(adc->dev, "Did not get completion timeout.\n");
> ret = adc5_poll_wait_eoc(adc);
> if (ret) {
> - pr_err("EOC bit not set\n");
> + dev_err(adc->dev, "EOC bit not set\n");
> goto unlock;
> }
> }
> @@ -721,7 +721,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
> channel_name = of_get_property(node,
> "label", NULL) ? : node->name;
> if (!channel_name) {
> - pr_err("Invalid channel name\n");
> + dev_err(dev, "Invalid channel name\n");
> return -EINVAL;
> }
> prop->datasheet_name = channel_name;
> @@ -764,7 +764,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
> return ret;
> }
>
> - pr_debug("dig_ver:minor:%d, major:%d\n", dig_version[0],
> + dev_dbg(dev, "dig_ver:minor:%d, major:%d\n", dig_version[0],
> dig_version[1]);
> /* Digital controller >= 5.3 have hw_settle_2 option */
> if ((dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR &&
> @@ -966,7 +966,7 @@ static int adc5_probe(struct platform_device *pdev)
>
> ret = adc5_get_dt_data(adc, node);
> if (ret) {
> - pr_err("adc get dt data failed\n");
> + dev_err(dev, "adc get dt data failed\n");
> return ret;
> }
>
Re: [PATCH v6 3/6] irqchip: RISC-V per-HART local interrupt controller driver
On 2020-05-31 11:06, Anup Patel wrote: On Sun, May 31, 2020 at 3:03 PM Marc Zyngier wrote: On 2020-05-31 06:36, Anup Patel wrote: > On Sat, May 30, 2020 at 5:31 PM Marc Zyngier wrote: [...] >> > plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD); >> >> Why do you need to both disable the interrupt *and* change the >> priority >> threshold? It seems to be that one of them should be enough, but my >> kno9wledge of the PLIC is limited. In any case, this would deserve a >> comment. > > Okay, I will test and remove "disable the interrupt" part from > plic_dying_cpu(). Be careful, as interrupt enabling/disabling is refcounted in order to allow nesting. If you only enable on CPU_ON and not disable on CPU_OFF, you will end-up with a depth that only increases, up to the point where you hit the roof (it will take a while though). I would keep the enable/disable as is, and drop the priority setting from the CPU_OFF path. The PLIC threshold is like GICv2 CPU interface enable/disable. Looking at the documentation[1], that's not really a correct analogy: - The PLIC is far removed from the CPU, and is more akin a GICv3 distributor. The INTC itself is more like a GICv3 redistributor, as it deals with local interrupts only. I don't see anything in the RISC-V architecture that actually behaves like a GIC CPU interface (not necessarily a bad thing...). - The threshold register is not an ON/OFF, but a priority mask, similar to the GIC PMR (except that the PMR lives in the CPU interface and affects all interrupts targetting this CPU while this only seem to affect PLIC interrupts and not the INTC interrupts). You may be using it as an ON/OFF for now as you don't support multiple priorities yet, but that's just a SW thing. Based on your comment, we should only program the PLIC threshold in CPU_ON and don't touch the PLIC threshold in CPU_OFF. Right?? This seems like the correct thing to do. M. [1] https://sifive.cdn.prismic.io/sifive%2Fdc4980ff-17db-448b-b521-4c7ab26b7488_sifive+u54-mc+manual+v19.08.pdf -- Jazz is not dead. It just smells funny...
[PATCH] arm64: debug: mark a function as __init to save some memory
'debug_monitors_init()' is only called via 'postcore_initcall'.
It can be marked as __init to save a few bytes of memory.
Signed-off-by: Christophe JAILLET
---
arch/arm64/kernel/debug-monitors.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/debug-monitors.c
b/arch/arm64/kernel/debug-monitors.c
index 15e80c876d46..5df49366e9ab 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -130,7 +130,7 @@ static int clear_os_lock(unsigned int cpu)
return 0;
}
-static int debug_monitors_init(void)
+static int __init debug_monitors_init(void)
{
return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING,
"arm64/debug_monitors:starting",
--
2.25.1
Re: [PATCH v7 1/4] bitops: Introduce the the for_each_set_clump macro
On Sun, May 31, 2020 at 4:11 AM Syed Nayyar Waris wrote: > On Sat, May 30, 2020 at 2:50 PM Andy Shevchenko > wrote: > > On Sat, May 30, 2020 at 11:45 AM Syed Nayyar Waris > > wrote: > > > On Sat, May 30, 2020 at 3:49 AM Andy Shevchenko > > > wrote: ... > #if (l) == 0 > #define GENMASK_INPUT_CHECK(h, l) 0 > #elif > #define GENMASK_INPUT_CHECK(h, l) \ > (BUILD_BUG_ON_ZERO(__builtin_choose_expr( \ > __builtin_constant_p((l) > (h)), (l) > (h), 0))) > #endif > > I have verified that this works. Basically this just avoids the sanity > check when the 'lower' bound 'l' is zero. Let me know if it looks > fine. Unfortunately, it's not enough. We need to take care about the following cases 1) h or l negative; 2) h == 0, if l == 0, I dunno what is this. it's basically either 0 or warning; 3) l == 0; 4) h and l > 0. Now, on top of that (since it's a macro) we have to keep in mind that h and l can be signed and / or unsigned types. And macro shall work for all 4 cases (by type signedess). > Regarding min, max macro that you suggested I am also looking further into it. Since this has been introduced in v5.7 and not only your code is affected by this I think we need to ping original author either to fix or revert. So, I Cc'ed to the author and reviewers, because they probably know better why that had been done in the first place and breaking existing code. -- With Best Regards, Andy Shevchenko
Re: [PATCH v7 3/5] dt-bindings: iio: magnetometer: ak8975: add gpio reset support
On Thu, 28 May 2020 16:59:28 +0200
Jonathan Albrieux wrote:
> Add reset-gpio support.
>
> Without reset's deassertion during ak8975_power_on(), driver's probe fails
> on ak8975_who_i_am() while checking for device identity for AK09911 chip.
>
> AK09911 has an active low reset gpio to handle register's reset.
> AK09911 datasheet says that, if not used, reset pin should be connected
> to VID. This patch emulates this situation.
>
> Signed-off-by: Jonathan Albrieux
> Reviewed-by: Rob Herring
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.
thanks,
Jonathan
> ---
> .../bindings/iio/magnetometer/asahi-kasei,ak8975.yaml | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git
> a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
> b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
> index 55b18784e503..e8af53d60759 100644
> ---
> a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
> +++
> b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
> @@ -47,6 +47,11 @@ properties:
>mount-matrix:
> description: an optional 3x3 mounting rotation matrix.
>
> + reset-gpios:
> +description: |
> + an optional pin needed for AK09911 to set the reset state. This should
> + be usually active low
> +
> required:
>- compatible
>- reg
> @@ -54,6 +59,7 @@ required:
> examples:
>- |
> #include
> +#include
> i2c {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -64,6 +70,7 @@ examples:
> interrupt-parent = <&gpio6>;
> interrupts = <15 IRQ_TYPE_EDGE_RISING>;
> vdd-supply = <&ldo_3v3_gnss>;
> +reset-gpios = <&msmgpio 111 GPIO_ACTIVE_LOW>;
> mount-matrix = "-0.984807753012208", /* x0 */
> "0", /* y0 */
> "-0.173648177666930", /* z0 */
[PATCH] staging:rtl8712: avoid skb_clone after skb allocation fail
The skb allocated when out of memory is likely to be discarded
during subsequent processing.
Signed-off-by: Ivan Safonov
---
drivers/staging/rtl8712/rtl8712_recv.c | 29 ++
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/staging/rtl8712/rtl8712_recv.c
b/drivers/staging/rtl8712/rtl8712_recv.c
index 116773943a2e..570030be3077 100644
--- a/drivers/staging/rtl8712/rtl8712_recv.c
+++ b/drivers/staging/rtl8712/rtl8712_recv.c
@@ -1037,24 +1037,17 @@ static void recvbuf2recvframe(struct _adapter
*padapter, struct sk_buff *pskb)
*/
alloc_sz += 6;
pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
- if (pkt_copy) {
- precvframe->u.hdr.pkt = pkt_copy;
- skb_reserve(pkt_copy, 4 - ((addr_t)(pkt_copy->data)
- % 4));
- skb_reserve(pkt_copy, shift_sz);
- memcpy(pkt_copy->data, pbuf, tmp_len);
- precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data =
-precvframe->u.hdr.rx_tail = pkt_copy->data;
- precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
- } else {
- precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
- if (!precvframe->u.hdr.pkt)
- return;
- precvframe->u.hdr.rx_head = pbuf;
- precvframe->u.hdr.rx_data = pbuf;
- precvframe->u.hdr.rx_tail = pbuf;
- precvframe->u.hdr.rx_end = pbuf + alloc_sz;
- }
+ if (!pkt_copy)
+ return;
+
+ precvframe->u.hdr.pkt = pkt_copy;
+ skb_reserve(pkt_copy, 4 - ((addr_t)(pkt_copy->data) % 4));
+ skb_reserve(pkt_copy, shift_sz);
+ memcpy(pkt_copy->data, pbuf, tmp_len);
+ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data =
+ precvframe->u.hdr.rx_tail = pkt_copy->data;
+ precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
+
recvframe_put(precvframe, tmp_len);
recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
/* because the endian issue, driver avoid reference to the
--
2.26.2
Re: [PATCH v7 4/5] iio: magnetometer: ak8975: Fix typo, uniform measurement unit style
On Thu, 28 May 2020 17:00:17 +0200 Jonathan Albrieux wrote: > Minor comment style edits. > > Signed-off-by: Jonathan Albrieux > Reviewed-by: Andy Shevchenko Applied > --- > drivers/iio/magnetometer/ak8975.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/iio/magnetometer/ak8975.c > b/drivers/iio/magnetometer/ak8975.c > index 3c881541ae72..fd368455cd7b 100644 > --- a/drivers/iio/magnetometer/ak8975.c > +++ b/drivers/iio/magnetometer/ak8975.c > @@ -385,9 +385,9 @@ static int ak8975_power_on(const struct ak8975_data *data) > return ret; > } > /* > - * According to the datasheet the power supply rise time i 200us > + * According to the datasheet the power supply rise time is 200us >* and the minimum wait time before mode setting is 100us, in > - * total 300 us. Add some margin and say minimum 500us here. > + * total 300us. Add some margin and say minimum 500us here. >*/ > usleep_range(500, 1000); > return 0;
Re: [PATCH v7 5/5] iio: magnetometer: ak8975: Add gpio reset support
On Thu, 28 May 2020 17:01:05 +0200
Jonathan Albrieux wrote:
> According to AK09911 datasheet, if reset gpio is provided then
> deassert reset on ak8975_power_on() and assert reset on ak8975_power_off().
>
> Without reset's deassertion during ak8975_power_on(), driver's probe fails
> on ak8975_who_i_am() while checking for device identity for AK09911 chip.
>
> AK09911 has an active low reset gpio to handle register's reset.
> AK09911 datasheet says that, if not used, reset pin should be connected
> to VID. This patch emulates this situation.
>
> Signed-off-by: Jonathan Albrieux
> Reviewed-by: Andy Shevchenko
> Reviewed-by: Stephan Gerhold
Applied. Thanks,
Jonathan
> ---
> drivers/iio/magnetometer/ak8975.c | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/iio/magnetometer/ak8975.c
> b/drivers/iio/magnetometer/ak8975.c
> index fd368455cd7b..a23422aad97d 100644
> --- a/drivers/iio/magnetometer/ak8975.c
> +++ b/drivers/iio/magnetometer/ak8975.c
> @@ -358,6 +358,7 @@ struct ak8975_data {
> u8 asa[3];
> longraw_to_gauss[3];
> struct gpio_desc*eoc_gpiod;
> + struct gpio_desc*reset_gpiod;
> int eoc_irq;
> wait_queue_head_t data_ready_queue;
> unsigned long flags;
> @@ -384,6 +385,9 @@ static int ak8975_power_on(const struct ak8975_data *data)
>"Failed to enable specified Vid supply\n");
> return ret;
> }
> +
> + gpiod_set_value_cansleep(data->reset_gpiod, 0);
> +
> /*
>* According to the datasheet the power supply rise time is 200us
>* and the minimum wait time before mode setting is 100us, in
> @@ -396,6 +400,8 @@ static int ak8975_power_on(const struct ak8975_data *data)
> /* Disable attached power regulator if any. */
> static void ak8975_power_off(const struct ak8975_data *data)
> {
> + gpiod_set_value_cansleep(data->reset_gpiod, 1);
> +
> regulator_disable(data->vid);
> regulator_disable(data->vdd);
> }
> @@ -839,6 +845,7 @@ static int ak8975_probe(struct i2c_client *client,
> struct ak8975_data *data;
> struct iio_dev *indio_dev;
> struct gpio_desc *eoc_gpiod;
> + struct gpio_desc *reset_gpiod;
> const void *match;
> unsigned int i;
> int err;
> @@ -856,6 +863,16 @@ static int ak8975_probe(struct i2c_client *client,
> if (eoc_gpiod)
> gpiod_set_consumer_name(eoc_gpiod, "ak_8975");
>
> + /*
> + * According to AK09911 datasheet, if reset GPIO is provided then
> + * deassert reset on ak8975_power_on() and assert reset on
> + * ak8975_power_off().
> + */
> + reset_gpiod = devm_gpiod_get_optional(&client->dev,
> + "reset", GPIOD_OUT_HIGH);
> + if (IS_ERR(reset_gpiod))
> + return PTR_ERR(reset_gpiod);
> +
> /* Register with IIO */
> indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
> if (indio_dev == NULL)
> @@ -866,6 +883,7 @@ static int ak8975_probe(struct i2c_client *client,
>
> data->client = client;
> data->eoc_gpiod = eoc_gpiod;
> + data->reset_gpiod = reset_gpiod;
> data->eoc_irq = 0;
>
> err = iio_read_mount_matrix(&client->dev, "mount-matrix",
> &data->orientation);
[PATCH] arm: allwinner: a20: Add Drejo DS167 initial support
From: Sertac TULLUK
Drejo DS167 is an Allwinner A20 based IoT device,
which support
- Allwinner A20 Cortex-A7
- Mali-400MP2 GPU
- AXP209 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- 10/100M Ethernet
- SATA
- HDMI
- 10.1inch and 7.0inch LVDS LCD and Touch screens
- CSI: OV5640 sensor
- USB OTG
- 2x USB2.0
- built-in KNX Transceiver
- 3x Dry Contact Input
- 3x Relay output
- IR RX/TX
- UART3
- SPI1
- RTC Battery
- 8x GPIO
- Analogue + Digital Microphone
- PAM8620 speaker Amplifier
- 12V DC power supply
- 3.7V Battery Operable
Signed-off-by: Sertac TULLUK
---
arch/arm/boot/dts/Makefile| 2 +
.../boot/dts/sun7i-a20-drejo-ds167-emmc.dts | 69 +
arch/arm/boot/dts/sun7i-a20-drejo-ds167.dts | 288 ++
3 files changed, 359 insertions(+)
create mode 100644 arch/arm/boot/dts/sun7i-a20-drejo-ds167-emmc.dts
create mode 100644 arch/arm/boot/dts/sun7i-a20-drejo-ds167.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3823090d07e7..d81e685dee38 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1097,6 +1097,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapro.dtb \
sun7i-a20-cubieboard2.dtb \
sun7i-a20-cubietruck.dtb \
+ sun7i-a20-drejo-ds167.dtb \
+sun7i-a20-drejo-ds167-emmc.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-itead-ibox.dtb \
sun7i-a20-i12-tvbox.dtb \
diff --git a/arch/arm/boot/dts/sun7i-a20-drejo-ds167-emmc.dts
b/arch/arm/boot/dts/sun7i-a20-drejo-ds167-emmc.dts
new file mode 100644
index ..b6147eb013b0
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-drejo-ds167-emmc.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2020 Sertac TULLUK
+ *
+ * Sertac TULLUK
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun7i-a20-drejo-ds167.dts"
+
+/ {
+ model = "drejo DS167-eMMC";
+ compatible = "drejo,sun7i-a20-drejo-ds167-emmc", "allwinner,sun7i-a20";
+
+ mmc2_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&pio 2 24 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&mmc2 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&mmc2_pwrseq>;
+ status = "okay";
+
+ emmc: emmc@0 {
+ reg = <0>;
+ compatible = "mmc-card";
+ broken-hpi;
+ };
+};
diff --git a/arch/arm/boot/dts/sun7i-a20-drejo-ds167.dts
b/arch/arm/boot/dts/sun7i-a20-drejo-ds167.dts
new file mode 100644
index ..79db92f88251
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-drejo-ds167.dts
@@ -0,0 +1,288 @@
+/*
+ * Copyright 2020 Sertac TULLUK
+ *
+ * Sertac TULLUK
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * publis
Re: [PATCH] irqchip/gic-v3-its: Don't try to move a disabled irq
On 2020-05-30 17:49, Marc Zyngier wrote:
Hi Ali,
On Fri, 29 May 2020 12:36:42 +
"Saidi, Ali" wrote:
Hi Marc,
> On May 29, 2020, at 3:33 AM, Marc Zyngier wrote:
>
> Hi Ali,
>
>> On 2020-05-29 02:55, Ali Saidi wrote:
>> If an interrupt is disabled the ITS driver has sent a discard removing
>> the DeviceID and EventID from the ITT. After this occurs it can't be
>> moved to another collection with a MOVI and a command error occurs if
>> attempted. Before issuing the MOVI command make sure that the IRQ isn't
>> disabled and change the activate code to try and use the previous
>> affinity.
>>
>> Signed-off-by: Ali Saidi
>> ---
>> drivers/irqchip/irq-gic-v3-its.c | 18 +++---
>> 1 file changed, 15 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/irqchip/irq-gic-v3-its.c
>> b/drivers/irqchip/irq-gic-v3-its.c
>> index 124251b0ccba..1235dd9a2fb2 100644
>> --- a/drivers/irqchip/irq-gic-v3-its.c
>> +++ b/drivers/irqchip/irq-gic-v3-its.c
>> @@ -1540,7 +1540,11 @@ static int its_set_affinity(struct irq_data *d,
>> const struct cpumask *mask_val,
>> /* don't set the affinity when the target cpu is same as current one
>> */
>> if (cpu != its_dev->event_map.col_map[id]) {
>> target_col = &its_dev->its->collections[cpu];
>> - its_send_movi(its_dev, target_col, id);
>> +
>> + /* If the IRQ is disabled a discard was sent so don't move */
>> + if (!irqd_irq_disabled(d))
>> + its_send_movi(its_dev, target_col, id);
>> +
>
> This looks wrong. What you are testing here is whether the interrupt
> is masked, not that there isn't a valid translation.
I’m not exactly sure the correct condition, but what I’m looking for
is interrupts which are deactivated and we have thus sent a discard.
That looks like IRQD_IRQ_STARTED not being set in this case.
>
> In the commit message, you're saying that we've issued a discard.
> This hints at doing a set_affinity on an interrupt that has been
> deactivated (mapping removed). Is that actually the case? If so,
> why was it deactivated
> the first place?
This is the case. If we down a NIC, that interface’s MSIs will be
deactivated but remain allocated until the device is unbound from the
driver or the NIC is brought up.
While stressing down/up a device I’ve found that irqbalance can move
interrupts and you end up with the situation described. The device is
downed, the interrupts are deactivated but still present and then
trying to move one results in sending a MOVI after the DISCARD which
is an error per the GIC spec.
Not great indeed. But this is not, as far as I can tell, a GIC
driver problem.
The semantic of activate/deactivate (which maps to started/shutdown
in the IRQ code) is that the HW resources for a given interrupt are
only committed when the interrupt is activated. Trying to perform
actions involving the HW on an interrupt that isn't active cannot be
guaranteed to take effect.
I'd rather address it in the core code, by preventing set_affinity (and
potentially others) to take place when the interrupt is not in the
STARTED state. Userspace would get an error, which is perfectly
legitimate, and which it already has to deal with it for plenty of
other
reasons.
How about this:
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 453a8a0f4804..1a2ac1392c0f 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -147,7 +147,8 @@ cpumask_var_t irq_default_affinity;
static bool __irq_can_set_affinity(struct irq_desc *desc)
{
if (!desc || !irqd_can_balance(&desc->irq_data) ||
- !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
+ !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity ||
+ !irqd_is_started(&desc->irq_data))
return false;
return true;
}
Thanks,
M.
--
Jazz is not dead. It just smells funny...
[tip:x86/entry 2/19] include/xen/interface/hvm/hvm_op.h:33:28: error: a parameter list without types is only allowed in a function definition
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/entry
head: 5980d208e5ef28455e9e8b08f6250b443a2f0893
commit: 28447ea4154239025044381144f849ff749ee9ef [2/19] xen: Move
xen_setup_callback_vector() definition to include/xen/hvm.h
config: x86_64-randconfig-r036-20200531 (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project
2388a096e7865c043e83ece4e26654bd3d1a20d5)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git checkout 28447ea4154239025044381144f849ff749ee9ef
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot
All error/warnings (new ones prefixed by >>, old ones prefixed by <<):
In file included from arch/x86/xen/suspend_hvm.c:5:
In file included from include/xen/hvm.h:6:
In file included from include/xen/interface/hvm/params.h:24:
include/xen/interface/hvm/hvm_op.h:29:5: error: unknown type name 'domid_t'
domid_t domid;/* IN */
^
>> include/xen/interface/hvm/hvm_op.h:33:1: warning: declaration specifier
>> missing, defaulting to 'int'
DEFINE_GUEST_HANDLE_STRUCT(xen_hvm_param);
^
int
>> include/xen/interface/hvm/hvm_op.h:33:28: error: a parameter list without
>> types is only allowed in a function definition
DEFINE_GUEST_HANDLE_STRUCT(xen_hvm_param);
^
include/xen/interface/hvm/hvm_op.h:39:5: error: unknown type name 'domid_t'
domid_t domid;
^
include/xen/interface/hvm/hvm_op.h:44:1: warning: declaration specifier
missing, defaulting to 'int'
DEFINE_GUEST_HANDLE_STRUCT(xen_hvm_pagetable_dying_t);
^
int
include/xen/interface/hvm/hvm_op.h:56:5: error: unknown type name 'domid_t'
domid_t domid;
^
include/xen/interface/hvm/hvm_op.h:63:1: warning: declaration specifier
missing, defaulting to 'int'
DEFINE_GUEST_HANDLE_STRUCT(xen_hvm_get_mem_type);
^
int
include/xen/interface/hvm/hvm_op.h:63:28: error: a parameter list without types
is only allowed in a function definition
DEFINE_GUEST_HANDLE_STRUCT(xen_hvm_get_mem_type);
^
3 warnings and 5 errors generated.
vim +33 include/xen/interface/hvm/hvm_op.h
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 23
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 24 /* Get/set subcommands: the
second argument of the hypercall is a
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 25 * pointer to a
xen_hvm_param struct. */
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 26 #define HVMOP_set_param
0
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 27 #define HVMOP_get_param
1
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 28 struct xen_hvm_param {
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 29 domid_t domid;/* IN
*/
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 30 uint32_t index;/* IN
*/
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 31 uint64_t value;/*
IN/OUT */
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 32 };
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 @33
DEFINE_GUEST_HANDLE_STRUCT(xen_hvm_param);
18f19aa62a267f Jeremy Fitzhardinge 2010-05-14 34
:: The code at line 33 was first introduced by commit
:: 18f19aa62a267f2f759e278018f1032adf4c3774 xen: Add support for HVM
hypercalls.
:: TO: Jeremy Fitzhardinge
:: CC: Jeremy Fitzhardinge
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
Re: [PATCH v2] iio: mma8452: Add missed iio_device_unregister() call in mma8452_probe()
On Thu, 28 May 2020 14:41:21 +0800
Chuhong Yuan wrote:
> The function iio_device_register() was called in mma8452_probe().
> But the function iio_device_unregister() was not called after
> a call of the function mma8452_set_freefall_mode() failed.
> Thus add the missed function call for one error case.
>
> Fixes: 1a965d405fc6 ("drivers:iio:accel:mma8452: added cleanup provision in
> case of failure.")
> Signed-off-by: Chuhong Yuan
Applied to the fixes-togreg branch of iio.git
> ---
> Changes in v2:
> - Add fixes tag.
> - Modify description.
>
> drivers/iio/accel/mma8452.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> index 00e100fc845a..813bca7cfc3e 100644
> --- a/drivers/iio/accel/mma8452.c
> +++ b/drivers/iio/accel/mma8452.c
> @@ -1685,10 +1685,13 @@ static int mma8452_probe(struct i2c_client *client,
>
> ret = mma8452_set_freefall_mode(data, false);
> if (ret < 0)
> - goto buffer_cleanup;
> + goto unregister_device;
>
> return 0;
>
> +unregister_device:
> + iio_device_unregister(indio_dev);
> +
> buffer_cleanup:
> iio_triggered_buffer_cleanup(indio_dev);
>
Re: [PATCH v2 01/12] iio: imu: inv_icm42600: add core of new inv_icm42600 driver
On Wed, 27 May 2020 20:57:00 +0200
Jean-Baptiste Maneyrol wrote:
> Core component of a new driver for InvenSense ICM-426xx devices.
> It includes registers definition, main probe/setup, and device
> utility functions.
>
> ICM-426xx devices are latest generation of 6-axis IMU,
> gyroscope+accelerometer and temperature sensor. This device
> includes a 2K FIFO, supports I2C/I3C/SPI, and provides
> intelligent motion features like pedometer, tilt detection,
> and tap detection.
>
> Signed-off-by: Jean-Baptiste Maneyrol
A few things inline.
Either I'm missing something or I'm guessing vddio is not controllable
on your test board.
> ---
> drivers/iio/imu/inv_icm42600/inv_icm42600.h | 372 ++
> .../iio/imu/inv_icm42600/inv_icm42600_core.c | 635 ++
> 2 files changed, 1007 insertions(+)
> create mode 100644 drivers/iio/imu/inv_icm42600/inv_icm42600.h
> create mode 100644 drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
>
...
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> new file mode 100644
> index ..81b171d6782c
> --- /dev/null
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> +const struct iio_mount_matrix *
> +inv_icm42600_get_mount_matrix(const struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan)
> +{
> + const struct inv_icm42600_state *st =
> + iio_device_get_drvdata((struct iio_dev *)indio_dev);
If you review my patch to the core, I can get that applied and we can drop
the ugly cast from here!
Just waiting for someone to sanity check it.
> +
> + return &st->orientation;
> +}
...
> +/* Runtime suspend will turn off sensors that are enabled by iio devices. */
> +static int __maybe_unused inv_icm42600_runtime_suspend(struct device *dev)
> +{
> + struct inv_icm42600_state *st = dev_get_drvdata(dev);
> + int ret;
> +
> + mutex_lock(&st->lock);
> +
> + /* disable all sensors */
> + ret = inv_icm42600_set_pwr_mgmt0(st, INV_ICM42600_SENSOR_MODE_OFF,
> + INV_ICM42600_SENSOR_MODE_OFF, false,
> + NULL);
> + if (ret)
> + goto error_unlock;
> +
> + regulator_disable(st->vddio_supply);
Don't seem to turn this on again in runtime_resume..
Why? Definitely needs at least a comment.
> +
> +error_unlock:
> + mutex_unlock(&st->lock);
> + return ret;
> +}
> +
> +/* Sensors are enabled by iio devices, no need to turn them back on here. */
> +static int __maybe_unused inv_icm42600_runtime_resume(struct device *dev)
> +{
> + struct inv_icm42600_state *st = dev_get_drvdata(dev);
> + int ret;
> +
> + mutex_lock(&st->lock);
> +
> + ret = inv_icm42600_enable_regulator_vddio(st);
> +
> + mutex_unlock(&st->lock);
> + return ret;
> +}
> +
> +const struct dev_pm_ops inv_icm42600_pm_ops = {
> + SET_SYSTEM_SLEEP_PM_OPS(inv_icm42600_suspend, inv_icm42600_resume)
> + SET_RUNTIME_PM_OPS(inv_icm42600_runtime_suspend,
> +inv_icm42600_runtime_resume, NULL)
> +};
> +EXPORT_SYMBOL_GPL(inv_icm42600_pm_ops);
> +
> +MODULE_AUTHOR("InvenSense, Inc.");
> +MODULE_DESCRIPTION("InvenSense ICM-426xx device driver");
> +MODULE_LICENSE("GPL");
Re: [PATCH 5.6 086/126] virtio-balloon: Revert "virtio-balloon: Switch back to OOM handler for VIRTIO_BALLOON_F_DEFLATE_ON_OOM"
On Sun, May 31, 2020 at 05:18:06AM -0400, Michael S. Tsirkin wrote: > On Tue, May 26, 2020 at 08:53:43PM +0200, Greg Kroah-Hartman wrote: > > From: Michael S. Tsirkin > > > > [ Upstream commit 835a6a649d0dd1b1f46759eb60fff2f63ed253a7 ] > > > > This reverts commit 5a6b4cc5b7a1892a8d7f63d6cbac6e0ae2a9d031. > > > > It has been queued properly in the akpm tree, this version is just > > creating conflicts. > > > > Signed-off-by: Michael S. Tsirkin > > Signed-off-by: Sasha Levin > > I don't understand. How does this make sense in stable? > stable does not merge akpm does it? It does not make sense, and is queued up to be reverted in the next release. thanks, greg k-h
Re: [PATCH v2 02/12] iio: imu: inv_icm42600: add I2C driver for inv_icm42600 driver
On Wed, 27 May 2020 20:57:01 +0200
Jean-Baptiste Maneyrol wrote:
> Add I2C driver for InvenSense ICM-426xxx devices.
>
> Configure bus signal slew rates as indicated in the datasheet.
>
> Signed-off-by: Jean-Baptiste Maneyrol
Looks fine to me.
J
> ---
> .../iio/imu/inv_icm42600/inv_icm42600_i2c.c | 100 ++
> 1 file changed, 100 insertions(+)
> create mode 100644 drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
>
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
> b/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
> new file mode 100644
> index ..4789cead23b3
> --- /dev/null
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
> @@ -0,0 +1,100 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2020 InvenSense, Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "inv_icm42600.h"
> +
> +static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st)
> +{
> + unsigned int mask, val;
> + int ret;
> +
> + /* setup interface registers */
> + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
> + INV_ICM42600_INTF_CONFIG6_MASK,
> + INV_ICM42600_INTF_CONFIG6_I3C_EN);
> + if (ret)
> + return ret;
> +
> + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
> + INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
> + if (ret)
> + return ret;
> +
> + /* set slew rates for I2C and SPI */
> + mask = INV_ICM42600_DRIVE_CONFIG_I2C_MASK |
> +INV_ICM42600_DRIVE_CONFIG_SPI_MASK;
> + val = INV_ICM42600_DRIVE_CONFIG_I2C(INV_ICM42600_SLEW_RATE_12_36NS) |
> + INV_ICM42600_DRIVE_CONFIG_SPI(INV_ICM42600_SLEW_RATE_12_36NS);
> + ret = regmap_update_bits(st->map, INV_ICM42600_REG_DRIVE_CONFIG,
> + mask, val);
> + if (ret)
> + return ret;
> +
> + /* disable SPI bus */
> + return regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
> + INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK,
> +
> INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_SPI_DIS);
> +}
> +
> +static int inv_icm42600_probe(struct i2c_client *client)
> +{
> + const void *match;
> + enum inv_icm42600_chip chip;
> + struct regmap *regmap;
> +
> + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
> + return -ENOTSUPP;
> +
> + match = device_get_match_data(&client->dev);
> + if (!match)
> + return -EINVAL;
> + chip = (enum inv_icm42600_chip)match;
> +
> + regmap = devm_regmap_init_i2c(client, &inv_icm42600_regmap_config);
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);
> +
> + return inv_icm42600_core_probe(regmap, chip,
> inv_icm42600_i2c_bus_setup);
> +}
> +
> +static const struct of_device_id inv_icm42600_of_matches[] = {
> + {
> + .compatible = "invensense,icm42600",
> + .data = (void *)INV_CHIP_ICM42600,
> + }, {
> + .compatible = "invensense,icm42602",
> + .data = (void *)INV_CHIP_ICM42602,
> + }, {
> + .compatible = "invensense,icm42605",
> + .data = (void *)INV_CHIP_ICM42605,
> + }, {
> + .compatible = "invensense,icm42622",
> + .data = (void *)INV_CHIP_ICM42622,
> + },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, inv_icm42600_of_matches);
> +
> +static struct i2c_driver inv_icm42600_driver = {
> + .driver = {
> + .name = "inv-icm42600-i2c",
> + .of_match_table = inv_icm42600_of_matches,
> + .pm = &inv_icm42600_pm_ops,
> + },
> + .probe_new = inv_icm42600_probe,
> +};
> +module_i2c_driver(inv_icm42600_driver);
> +
> +MODULE_AUTHOR("InvenSense, Inc.");
> +MODULE_DESCRIPTION("InvenSense ICM-426xx I2C driver");
> +MODULE_LICENSE("GPL");
[PATCH v3 1/4] seccomp: rename "usage" to "refs" and document
Naming the lifetime counter of a seccomp filter "usage" suggests a
little too strongly that its about tasks that are using this filter
while it also tracks other references such as the user notifier or
ptrace. This also updates the documentation to note this fact.
We'll be introducing an actual usage counter in a follow-up patch.
Cc: Tycho Andersen
Cc: Kees Cook
Cc: Matt Denton
Cc: Sargun Dhillon
Cc: Jann Horn
Cc: Chris Palmer
Cc: Aleksa Sarai
Cc: Robert Sesek
Cc: Jeffrey Vander Stoep
Cc: Linux Containers
Signed-off-by: Christian Brauner
---
/* v2 */
patch not present
/* v3 */
patch introduced
---
kernel/seccomp.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 55a6184f5990..0ba2d6d0800f 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -106,10 +106,11 @@ struct notification {
/**
* struct seccomp_filter - container for seccomp BPF programs
*
- * @usage: reference count to manage the object lifetime.
- * get/put helpers should be used when accessing an instance
- * outside of a lifetime-guarded section. In general, this
- * is only needed for handling filters shared across tasks.
+ * @refs: Reference count to manage the object lifetime.
+ * A filter's reference count is incremented for each directly
+ * attached task, once for the dependent filter, and if
+ * requested for the user notifier. When @refs reaches zero,
+ * the filter can be freed.
* @log: true if all actions except for SECCOMP_RET_ALLOW should be logged
* @prev: points to a previously installed, or inherited, filter
* @prog: the BPF program to evaluate
@@ -124,10 +125,10 @@ struct notification {
* how namespaces work.
*
* seccomp_filter objects should never be modified after being attached
- * to a task_struct (other than @usage).
+ * to a task_struct (other than @refs).
*/
struct seccomp_filter {
- refcount_t usage;
+ refcount_t refs;
bool log;
struct seccomp_filter *prev;
struct bpf_prog *prog;
@@ -461,7 +462,7 @@ static struct seccomp_filter *seccomp_prepare_filter(struct
sock_fprog *fprog)
return ERR_PTR(ret);
}
- refcount_set(&sfilter->usage, 1);
+ refcount_set(&sfilter->refs, 1);
return sfilter;
}
@@ -554,7 +555,7 @@ static long seccomp_attach_filter(unsigned int flags,
static void __get_seccomp_filter(struct seccomp_filter *filter)
{
- refcount_inc(&filter->usage);
+ refcount_inc(&filter->refs);
}
/* get_seccomp_filter - increments the reference count of the filter on @tsk */
@@ -577,7 +578,7 @@ static inline void seccomp_filter_free(struct
seccomp_filter *filter)
static void __put_seccomp_filter(struct seccomp_filter *orig)
{
/* Clean up single-reference branches iteratively. */
- while (orig && refcount_dec_and_test(&orig->usage)) {
+ while (orig && refcount_dec_and_test(&orig->refs)) {
struct seccomp_filter *freeme = orig;
orig = orig->prev;
seccomp_filter_free(freeme);
base-commit: b9bbe6ed63b2b9f2c9ee5cbd0f2c946a2723f4ce
--
2.26.2
[PATCH v3 4/4] tests: test seccomp filter notifications
This verifies we're correctly notified when a seccomp filter becomes
unused when a notifier is in use.
Signed-off-by: Christian Brauner
---
/* v2 */
unchanged
/* v3 */
At first it seemed sensible to add POLLHUP to all poll invocations but
all checks test for revents to be equal to POLLIN. Hence, when POLLHUP
is reported we'd fail the test so we don't gain anyhing by testing for
POLLHUP additionally.
---
tools/testing/selftests/seccomp/seccomp_bpf.c | 136 ++
1 file changed, 136 insertions(+)
diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c
b/tools/testing/selftests/seccomp/seccomp_bpf.c
index c0aa46ce14f6..4dae278cf77e 100644
--- a/tools/testing/selftests/seccomp/seccomp_bpf.c
+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c
@@ -51,6 +51,7 @@
#include
#include "../kselftest_harness.h"
+#include "../clone3/clone3_selftests.h"
#ifndef PR_SET_PTRACER
# define PR_SET_PTRACER 0x59616d61
@@ -3686,6 +3687,141 @@ TEST(user_notification_continue)
}
}
+TEST(user_notification_filter_empty)
+{
+ pid_t pid;
+ long ret;
+ int status;
+ struct pollfd pollfd;
+ struct clone_args args = {
+ .flags = CLONE_FILES,
+ .exit_signal = SIGCHLD,
+ };
+
+ ret = prctl(PR_SET_NO_NEW_PRIVS, 1, 0, 0, 0);
+ ASSERT_EQ(0, ret) {
+ TH_LOG("Kernel does not support PR_SET_NO_NEW_PRIVS!");
+ }
+
+ pid = sys_clone3(&args, sizeof(args));
+ ASSERT_GE(pid, 0);
+
+ if (pid == 0) {
+ int listener;
+
+ listener = user_trap_syscall(__NR_mknod,
SECCOMP_FILTER_FLAG_NEW_LISTENER);
+ if (listener < 0)
+ _exit(EXIT_FAILURE);
+
+ if (dup2(listener, 200) != 200)
+ _exit(EXIT_FAILURE);
+
+ close(listener);
+
+ _exit(EXIT_SUCCESS);
+ }
+
+ EXPECT_EQ(waitpid(pid, &status, 0), pid);
+ EXPECT_EQ(true, WIFEXITED(status));
+ EXPECT_EQ(0, WEXITSTATUS(status));
+
+ /*
+* The seccomp filter has become unused so we should be notified once
+* the kernel gets around to cleaning up task struct.
+*/
+ pollfd.fd = 200;
+ pollfd.events = POLLHUP;
+
+ EXPECT_GT(poll(&pollfd, 1, -1), 0);
+ EXPECT_GT((pollfd.revents & POLLHUP) ?: 0, 0);
+}
+
+static void *do_thread(void *data)
+{
+ return NULL;
+}
+
+TEST(user_notification_filter_empty_threaded)
+{
+ pid_t pid;
+ long ret;
+ int status;
+ struct pollfd pollfd;
+ struct clone_args args = {
+ .flags = CLONE_FILES,
+ .exit_signal = SIGCHLD,
+ };
+
+ ret = prctl(PR_SET_NO_NEW_PRIVS, 1, 0, 0, 0);
+ ASSERT_EQ(0, ret) {
+ TH_LOG("Kernel does not support PR_SET_NO_NEW_PRIVS!");
+ }
+
+ pid = sys_clone3(&args, sizeof(args));
+ ASSERT_GE(pid, 0);
+
+ if (pid == 0) {
+ pid_t pid1, pid2;
+ int listener, status;
+ pthread_t thread;
+
+ listener = user_trap_syscall(__NR_dup,
SECCOMP_FILTER_FLAG_NEW_LISTENER);
+ if (listener < 0)
+ _exit(EXIT_FAILURE);
+
+ if (dup2(listener, 200) != 200)
+ _exit(EXIT_FAILURE);
+
+ close(listener);
+
+ pid1 = fork();
+ if (pid1 < 0)
+ _exit(EXIT_FAILURE);
+
+ if (pid1 == 0)
+ _exit(EXIT_SUCCESS);
+
+ pid2 = fork();
+ if (pid2 < 0)
+ _exit(EXIT_FAILURE);
+
+ if (pid2 == 0)
+ _exit(EXIT_SUCCESS);
+
+ if (pthread_create(&thread, NULL, do_thread, NULL) ||
+ pthread_join(thread, NULL))
+ _exit(EXIT_FAILURE);
+
+ if (pthread_create(&thread, NULL, do_thread, NULL) ||
+ pthread_join(thread, NULL))
+ _exit(EXIT_FAILURE);
+
+ if (waitpid(pid1, &status, 0) != pid1 || !WIFEXITED(status) ||
+ WEXITSTATUS(status))
+ _exit(EXIT_FAILURE);
+
+ if (waitpid(pid2, &status, 0) != pid2 || !WIFEXITED(status) ||
+ WEXITSTATUS(status))
+ _exit(EXIT_FAILURE);
+
+ exit(EXIT_SUCCESS);
+ }
+
+ EXPECT_EQ(waitpid(pid, &status, 0), pid);
+ EXPECT_EQ(true, WIFEXITED(status));
+ EXPECT_EQ(0, WEXITSTATUS(status));
+
+ /*
+* The seccomp filter has become unused so we should be notified once
+* the kernel gets around to cleaning up task struct.
+*/
+ pollfd.fd = 200;
+ pollfd.events = POLLHUP;
+
+ EXPECT_GT(poll(&pollfd, 1, -1), 0);
+ EXPECT_GT((pollfd.revents & POLLHUP) ?: 0, 0);
+}
+
/*
* TODO:
* - add microbenchmarks
--
2.26.2
[PATCH v3 2/4] seccomp: release filter after task is fully dead
The seccomp filter used to be released in free_task() which is called
asynchronously via call_rcu() and assorted mechanisms. Since we need
to inform tasks waiting on the seccomp notifier when a filter goes empty
we will notify them as soon as a task has been marked fully dead in
release_task(). To not split seccomp cleanup into two parts, move
filter release out of free_task() and into release_task() after we've
unhashed struct task from struct pid, exited signals, and unlinked it
from the threadgroups' thread list. We'll put the empty filter
notification infrastructure into it in a follow up patch.
This also renames put_seccomp_filter() to seccomp_filter_release() which
is a more descriptive name of what we're doing here especially once
we've added the empty filter notification mechanism in there.
We're also NULL-ing the task's filter tree entrypoint which seems
cleaner than leaving a dangling pointer in there. Note that this shouldn't
need any memory barriers since we're calling this when the task is in
release_task() which means it's EXIT_DEAD. So it can't modify it's seccomp
filters anymore. You can also see this from the point where we're calling
seccomp_filter_release(). It's after __exit_signal() and at this point,
tsk->sighand will already have been NULLed which is required for
thread-sync and filter installation alike.
Cc: Tycho Andersen
Cc: Kees Cook
Cc: Matt Denton
Cc: Sargun Dhillon
Cc: Jann Horn
Cc: Chris Palmer
Cc: Aleksa Sarai
Cc: Robert Sesek
Cc: Jeffrey Vander Stoep
Cc: Linux Containers
Signed-off-by: Christian Brauner
---
/* v2 */
patch not present
/* v3 */
patch introduced
---
include/linux/seccomp.h | 4 +--
kernel/exit.c | 1 +
kernel/fork.c | 1 -
kernel/seccomp.c| 60 -
4 files changed, 38 insertions(+), 28 deletions(-)
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index 4192369b8418..1644922af19a 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -82,10 +82,10 @@ static inline int seccomp_mode(struct seccomp *s)
#endif /* CONFIG_SECCOMP */
#ifdef CONFIG_SECCOMP_FILTER
-extern void put_seccomp_filter(struct task_struct *tsk);
+extern void seccomp_filter_release(struct task_struct *tsk);
extern void get_seccomp_filter(struct task_struct *tsk);
#else /* CONFIG_SECCOMP_FILTER */
-static inline void put_seccomp_filter(struct task_struct *tsk)
+static inline void seccomp_filter_release(struct task_struct *tsk)
{
return;
}
diff --git a/kernel/exit.c b/kernel/exit.c
index ce2a75bc0ade..5490cc04f436 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -218,6 +218,7 @@ void release_task(struct task_struct *p)
}
write_unlock_irq(&tasklist_lock);
+ seccomp_filter_release(p);
proc_flush_pid(thread_pid);
put_pid(thread_pid);
release_thread(p);
diff --git a/kernel/fork.c b/kernel/fork.c
index 48ed22774efa..b948a14da94f 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -471,7 +471,6 @@ void free_task(struct task_struct *tsk)
#endif
rt_mutex_debug_task_free(tsk);
ftrace_graph_exit_task(tsk);
- put_seccomp_filter(tsk);
arch_release_task_struct(tsk);
if (tsk->flags & PF_KTHREAD)
free_kthread_struct(tsk);
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 0ba2d6d0800f..55251b1fe03f 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -367,6 +367,40 @@ static inline pid_t seccomp_can_sync_threads(void)
return 0;
}
+static inline void seccomp_filter_free(struct seccomp_filter *filter)
+{
+ if (filter) {
+ bpf_prog_destroy(filter->prog);
+ kfree(filter);
+ }
+}
+
+static void __put_seccomp_filter(struct seccomp_filter *orig)
+{
+ /* Clean up single-reference branches iteratively. */
+ while (orig && refcount_dec_and_test(&orig->refs)) {
+ struct seccomp_filter *freeme = orig;
+ orig = orig->prev;
+ seccomp_filter_free(freeme);
+ }
+}
+
+/**
+ * seccomp_filter_release - Detach the task from its filter tree
+ * and drop its reference count during
+ * exit.
+ *
+ * This function should only be called when the task is exiting as
+ * it detaches it from its filter tree.
+ */
+void seccomp_filter_release(struct task_struct *tsk)
+{
+ struct seccomp_filter *cur = tsk->seccomp.filter;
+
+ tsk->seccomp.filter = NULL;
+ __put_seccomp_filter(cur);
+}
+
/**
* seccomp_sync_threads: sets all threads to use current's filter
*
@@ -396,7 +430,7 @@ static inline void seccomp_sync_threads(unsigned long flags)
* current's path will hold a reference. (This also
* allows a put before the assignment.)
*/
- put_seccomp_filter(thread);
+ __put_seccomp_filter(thread->seccomp.filter);
smp_store_release(&thread->secc
[PATCH v3 3/4] seccomp: notify about unused filter
We've been making heavy use of the seccomp notifier to intercept and
handle certain syscalls for containers. This patch allows a syscall
supervisor listening on a given notifier to be notified when a seccomp
filter has become unused.
A container is often managed by a singleton supervisor process the
so-called "monitor". This monitor process has an event loop which has
various event handlers registered. If the user specified a seccomp
profile that included a notifier for various syscalls then we also
register a seccomp notify even handler. For any container using a
separate pid namespace the lifecycle of the seccomp notifier is bound to
the init process of the pid namespace, i.e. when the init process exits
the filter must be unused.
If a new process attaches to a container we force it to assume a seccomp
profile. This can either be the same seccomp profile as the container
was started with or a modified one. If the attaching process makes use
of the seccomp notifier we will register a new seccomp notifier handler
in the monitor's event loop. However, when the attaching process exits
we can't simply delete the handler since other child processes could've
been created (daemons spawned etc.) that have inherited the seccomp
filter and so we need to keep the seccomp notifier fd alive in the event
loop. But this is problematic since we don't get a notification when the
seccomp filter has become unused and so we currently never remove the
seccomp notifier fd from the event loop and just keep accumulating fds
in the event loop. We've had this issue for a while but it has recently
become more pressing as more and larger users make use of this.
To fix this, we introduce a new "users" reference counter that tracks
any tasks and dependent filters making use of a filter. When a notifier is
registered waiting tasks will be notified that the filter is now empty by
receiving a (E)POLLHUP event.
The concept in this patch introduces is the same as for signal_struct,
i.e. reference counting for life-cycle management is decoupled from
reference counting taks using the object.
There's probably some trickery possible but the second counter is just
the correct way of doing this imho and has precedence. The patch also
lifts the waitqeue from struct notification into sruct seccomp_filter.
This is cleaner overall and let's us avoid having to take the notifier
mutex since we neither need to read nor modify the notifier specific
aspects of the seccomp filter. In the exit path I'd very much like to
avoid having to take the notifier mutex for each filter in the task's
filter hierarchy.
Cc: Tycho Andersen
Cc: Kees Cook
Cc: Matt Denton
Cc: Sargun Dhillon
Cc: Jann Horn
Cc: Chris Palmer
Cc: Aleksa Sarai
Cc: Robert Sesek
Cc: Jeffrey Vander Stoep
Cc: Linux Containers
Signed-off-by: Christian Brauner
---
/* v2 */
- Jann Horn :
- Use more descriptive instead of seccomp_filter_notify().
(I went with seccomp_filter_release().)
/* v3 */
- Kees Cook :
- Rename counter from "live" to "users".
---
kernel/seccomp.c | 68 +---
1 file changed, 53 insertions(+), 15 deletions(-)
diff --git a/kernel/seccomp.c b/kernel/seccomp.c
index 55251b1fe03f..45244f1ba148 100644
--- a/kernel/seccomp.c
+++ b/kernel/seccomp.c
@@ -94,13 +94,11 @@ struct seccomp_knotif {
* filter->notify_lock.
* @next_id: The id of the next request.
* @notifications: A list of struct seccomp_knotif elements.
- * @wqh: A wait queue for poll.
*/
struct notification {
struct semaphore request;
u64 next_id;
struct list_head notifications;
- wait_queue_head_t wqh;
};
/**
@@ -116,6 +114,15 @@ struct notification {
* @prog: the BPF program to evaluate
* @notif: the struct that holds all notification related information
* @notify_lock: A lock for all notification-related accesses.
+ * @wqh: A wait queue for poll if a notifier is in use.
+ * @users: A filter's @users count is incremented for each directly
+ * attached task (filter installation, fork(), thread_sync),
+ *and once for the dependent filter (tracked in filter->prev).
+ *When it reaches zero it indicates that no direct or indirect
+ *users of that filter exist. No new tasks can get associated with
+ *this filter after reaching 0. The @users count is always smaller
+ *or equal to @refs. Hence, reaching 0 for @users does not mean
+ *the filter can be freed.
*
* seccomp_filter objects are organized in a tree linked via the @prev
* pointer. For any task, it appears to be a singly-linked list starting
@@ -134,6 +141,8 @@ struct seccomp_filter {
struct bpf_prog *prog;
struct notification *notif;
struct mutex notify_lock;
+ refcount_t users;
+ wait_queue_head_t wqh;
};
/* Limit any path through the tree to 256KB worth of instructions. */
@@ -375,6 +384,15 @@ static inline void seccomp_filter_free(struct
seccomp_fi
Re: [PATCH v2 04/12] iio: imu: inv_icm42600: add gyroscope IIO device
On Wed, 27 May 2020 20:57:03 +0200
Jean-Baptiste Maneyrol wrote:
> Add IIO device for gyroscope sensor with data polling interface.
> Attributes: raw, scale, sampling_frequency, calibbias.
>
> Gyroscope in low noise mode.
>
> Signed-off-by: Jean-Baptiste Maneyrol
Unusual to have a calibration offset specified in output units,
which contributes a lot of the complexity in here.
Normally those are strictly front end (output of some calibration DAC).
So if they have units (and often they don't) I'd expect them to be
the same as _raw.
We need to tidy up the docs on this though as it doesn't express
any sort of preference. It's hard to be specific as often the calibration
scales are defined - they are just like tweaking a POT on an analog
sensor board.
A few trivial other things inline, including a suggestion to modify
the layering of the driver a tiny bit during probe.
Thanks,
Jonathan
> ---
> drivers/iio/imu/inv_icm42600/inv_icm42600.h | 6 +
> .../iio/imu/inv_icm42600/inv_icm42600_core.c | 4 +
> .../iio/imu/inv_icm42600/inv_icm42600_gyro.c | 600 ++
> 3 files changed, 610 insertions(+)
> create mode 100644 drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c
>
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> index 14c8ef152418..c1023d59b37b 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> @@ -120,6 +120,8 @@ struct inv_icm42600_suspended {
> * @orientation:sensor chip orientation relative to main hardware.
> * @conf: chip sensors configurations.
> * @suspended: suspended sensors configuration.
> + * @indio_gyro: gyroscope IIO device.
> + * @buffer: data transfer buffer aligned for DMA.
> */
> struct inv_icm42600_state {
> struct mutex lock;
> @@ -131,6 +133,8 @@ struct inv_icm42600_state {
> struct iio_mount_matrix orientation;
> struct inv_icm42600_conf conf;
> struct inv_icm42600_suspended suspended;
> + struct iio_dev *indio_gyro;
> + uint8_t buffer[2] cacheline_aligned;
> };
>
> /* Virtual register addresses: @bank on MSB (4 upper bits), @address on LSB
> */
> @@ -369,4 +373,6 @@ int inv_icm42600_debugfs_reg(struct iio_dev *indio_dev,
> unsigned int reg,
> int inv_icm42600_core_probe(struct regmap *regmap, int chip,
> inv_icm42600_bus_setup bus_setup);
>
> +int inv_icm42600_gyro_init(struct inv_icm42600_state *st);
> +
> #endif
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> index 81b171d6782c..dccb7bcc782e 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> @@ -510,6 +510,10 @@ int inv_icm42600_core_probe(struct regmap *regmap, int
> chip,
> if (ret)
> return ret;
>
> + ret = inv_icm42600_gyro_init(st);
> + if (ret)
> + return ret;
> +
> /* setup runtime power management */
> ret = pm_runtime_set_active(dev);
> if (ret)
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c
> b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c
> new file mode 100644
> index ..9d9672989b23
> --- /dev/null
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c
> @@ -0,0 +1,600 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2020 Invensense, Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "inv_icm42600.h"
> +
> +#define INV_ICM42600_GYRO_CHAN(_modifier, _index, _ext_info) \
> + { \
> + .type = IIO_ANGL_VEL, \
> + .modified = 1, \
> + .channel2 = _modifier, \
> + .info_mask_separate = \
> + BIT(IIO_CHAN_INFO_RAW) |\
> + BIT(IIO_CHAN_INFO_CALIBBIAS), \
> + .info_mask_shared_by_type = \
> + BIT(IIO_CHAN_INFO_SCALE), \
> + .info_mask_shared_by_type_available = \
> + BIT(IIO_CHAN_INFO_SCALE) | \
> + BIT(IIO_CHAN_INFO_CALIBBIAS), \
> + .info_mask_shared_by_all = \
> + BIT(IIO_CHAN_INFO_SAMP_FREQ), \
> + .info_mask_shared_by_all_available =\
> + BIT(IIO_CHAN_INFO_SAMP_FREQ), \
> + .scan_index = _index,
Re: drm/nouveau/clk/gm20b: Fix memory leaks after failed gk20a_clk_ctor() calls
> In this case, maybe we should check the return value of > gk20a_clk_ctor() and release clk if it returns -ENOMEM. All error situations (including failed memory allocations) can matter here. > And many other functions also have the same issue > (e.g. gm20b_clk_new_speedo0). I recommend to increase the error detection and improve the desired exception handling accordingly. Regards, Markus
Re: [PATCH v2 08/12] iio: imu: inv_icm42600: add device interrupt
On Wed, 27 May 2020 20:57:07 +0200
Jean-Baptiste Maneyrol wrote:
> Add INT1 interrupt support. Support interrupt edge and level,
> active high or low. Push-pull or open-drain configurations.
>
> Interrupt will be used to read data from the FIFO.
>
> Signed-off-by: Jean-Baptiste Maneyrol
Some nitpicks inline - all cases where a blank line would slightly
help readability.
J
> ---
> drivers/iio/imu/inv_icm42600/inv_icm42600.h | 2 +-
> .../iio/imu/inv_icm42600/inv_icm42600_core.c | 96 ++-
> .../iio/imu/inv_icm42600/inv_icm42600_i2c.c | 3 +-
> .../iio/imu/inv_icm42600/inv_icm42600_spi.c | 3 +-
> 4 files changed, 100 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> index c534acae0308..43749f56426c 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> @@ -372,7 +372,7 @@ int inv_icm42600_set_temp_conf(struct inv_icm42600_state
> *st, bool enable,
> int inv_icm42600_debugfs_reg(struct iio_dev *indio_dev, unsigned int reg,
>unsigned int writeval, unsigned int *readval);
>
> -int inv_icm42600_core_probe(struct regmap *regmap, int chip,
> +int inv_icm42600_core_probe(struct regmap *regmap, int chip, int irq,
> inv_icm42600_bus_setup bus_setup);
>
> int inv_icm42600_gyro_init(struct inv_icm42600_state *st);
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> index e7f7835aca9b..246c1eb52231 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> @@ -9,8 +9,11 @@
> #include
> #include
> #include
> +#include
> +#include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -409,6 +412,79 @@ static int inv_icm42600_setup(struct inv_icm42600_state
> *st,
> return inv_icm42600_set_conf(st, hw->conf);
> }
>
> +static irqreturn_t inv_icm42600_irq_handler(int irq, void *_data)
> +{
> + struct inv_icm42600_state *st = _data;
> + struct device *dev = regmap_get_device(st->map);
> + unsigned int status;
> + int ret;
> +
> + mutex_lock(&st->lock);
> +
> + ret = regmap_read(st->map, INV_ICM42600_REG_INT_STATUS, &status);
> + if (ret)
> + goto out_unlock;
> +
> + /* FIFO full */
> + if (status & INV_ICM42600_INT_STATUS_FIFO_FULL)
> + dev_warn(dev, "FIFO full data lost!\n");
> +
> +out_unlock:
> + mutex_unlock(&st->lock);
> + return IRQ_HANDLED;
> +}
> +
> +/**
> + * inv_icm42600_irq_init() - initialize int pin and interrupt handler
> + * @st: driver internal state
> + * @irq: irq number
> + * @irq_type:irq trigger type
> + * @open_drain: true if irq is open drain, false for push-pull
> + *
> + * Returns 0 on success, a negative error code otherwise.
> + */
> +static int inv_icm42600_irq_init(struct inv_icm42600_state *st, int irq,
> + int irq_type, bool open_drain)
> +{
> + struct device *dev = regmap_get_device(st->map);
> + unsigned int val;
> + int ret;
> +
> + /* configure INT1 interrupt: default is active low on edge */
> + switch (irq_type) {
> + case IRQF_TRIGGER_RISING:
> + case IRQF_TRIGGER_HIGH:
> + val = INV_ICM42600_INT_CONFIG_INT1_ACTIVE_HIGH;
> + break;
> + default:
> + val = INV_ICM42600_INT_CONFIG_INT1_ACTIVE_LOW;
> + break;
> + }
blank line here
> + switch (irq_type) {
> + case IRQF_TRIGGER_LOW:
> + case IRQF_TRIGGER_HIGH:
> + val |= INV_ICM42600_INT_CONFIG_INT1_LATCHED;
> + break;
> + default:
> + break;
> + }
blank line here.
> + if (!open_drain)
> + val |= INV_ICM42600_INT_CONFIG_INT1_PUSH_PULL;
blank line here
> + ret = regmap_write(st->map, INV_ICM42600_REG_INT_CONFIG, val);
> + if (ret)
> + return ret;
> +
> + /* Deassert async reset for proper INT pin operation (cf datasheet) */
> + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_CONFIG1,
> + INV_ICM42600_INT_CONFIG1_ASYNC_RESET, 0);
> + if (ret)
> + return ret;
> +
> + return devm_request_threaded_irq(dev, irq, NULL,
> + inv_icm42600_irq_handler, irq_type,
> + "inv_icm42600", st);
> +}
> +
> static int inv_icm42600_enable_regulator_vddio(struct inv_icm42600_state *st)
> {
> int ret;
> @@ -453,11 +529,14 @@ static void inv_icm42600_disable_pm(void *_data)
> pm_runtime_disable(dev);
> }
>
> -int inv_icm42600_core_probe(struct regmap *regmap, int chip,
> +int inv_icm42600_core_probe(struct regmap *regmap, int chip, int irq,
> inv_icm42600_bus_setup bus_setup)
>
Re: next-20200515: Xorg killed due to "OOM"
On Thu 2020-05-28 14:07:50, Michal Hocko wrote: > On Thu 28-05-20 14:03:54, Pavel Machek wrote: > > On Thu 2020-05-28 11:05:17, Michal Hocko wrote: > > > On Tue 26-05-20 11:10:54, Pavel Machek wrote: > > > [...] > > > > [38617.276517] oom_reaper: reaped process 31769 (chromium), now > > > > anon-rss:0kB, file-rss:0kB, shmem-rss:7968kB > > > > [38617.277232] Xorg invoked oom-killer: gfp_mask=0x0(), order=0, > > > > oom_score_adj=0 > > > > [38617.277247] CPU: 0 PID: 2978 Comm: Xorg Not tainted > > > > 5.7.0-rc5-next-20200515+ #117 > > > > [38617.277256] Hardware name: LENOVO 17097HU/17097HU, BIOS 7BETD8WW > > > > (2.19 ) 03/31/2011 > > > > [38617.277266] Call Trace: > > > > [38617.277286] dump_stack+0x54/0x6e > > > > [38617.277300] dump_header+0x45/0x321 > > > > [38617.277313] oom_kill_process.cold+0x9/0xe > > > > [38617.277324] ? out_of_memory+0x167/0x420 > > > > [38617.277336] out_of_memory+0x1f2/0x420 > > > > [38617.277348] pagefault_out_of_memory+0x34/0x56 > > > > [38617.277361] mm_fault_error+0x4a/0x130 > > > > [38617.277372] do_page_fault+0x3ce/0x416 > > > > > > The reason the OOM killer has been invoked is that the page fault > > > handler has returned VM_FAULT_OOM. So this is not a result of the page > > > allocator struggling to allocate a memory. It would be interesting to > > > check which code path has returned this. > > > > Should the core WARN_ON if that happens and there's enough memory, or > > something like that? > > I wish it would simply go away. There shouldn't be really any reason for > VM_FAULT_OOM to exist. The real low on memory situation is already > handled in the page allocator. Umm. Maybe the WARN_ON is first step in that direction? So we can see what driver actually did that, and complain to its authors? Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html signature.asc Description: PGP signature
Re: [PATCH 0/3] perf test: Unwind fixes
Em Sat, May 30, 2020 at 01:20:12AM -0700, Ian Rogers escreveu: > Fix stack frame count and memory sanitizer issues when running the > dwarf unwinding test with the elfutils/libdw unwinder (libunwind > disabled). Thanks, applied. > Ian Rogers (3): > tools compiler.h: Add attribute to disable tail calls > perf tests: Don't tail call optimize in unwind test > perf test: Initialize memory in dwarf-unwind > > tools/include/linux/compiler-gcc.h | 8 > tools/include/linux/compiler.h | 3 +++ > tools/perf/arch/x86/tests/dwarf-unwind.c | 8 > tools/perf/tests/dwarf-unwind.c | 11 ++- > 4 files changed, 25 insertions(+), 5 deletions(-) > > -- > 2.27.0.rc2.251.g90737beb825-goog > -- - Arnaldo
Re: [PATCH v8 0/3] perf arm-spe: Add support for synthetic events
Em Sat, May 30, 2020 at 08:24:39PM +0800, Leo Yan escreveu:
> This patch set is to support synthetic events with enabling Arm SPE
> decoder. This patch set is based Xiaojun Tan (Hisilicon) and
> James Clark (Arm)'s previous patches who have contributed much for
> the related task.
Applied, will push to tmp.perf/core, and then perf/core if all tests are
successful, Adrian, if you could provide an Acked-by: for the auxtrace
case, that would be good,
- Arnaldo
> This patch set has been checked with checkpatch.pl, though it leaves
> several warnings, but these warnings are deliberately kept after
> reviewing. Some warnings ask to add maintainer (so far it's not
> necessary), and some warnings complaint for patch 02 "perf auxtrace:
> Add four itrace options" for the text format, since need to keep the
> consistency with the same code format in the source code, this is why
> this patch doesn't get rid of checkpatch warnings.
>
> This patch set has been rebased on Perf tmp.perf/core branch with
> latest commit 9300acc6fed8 ("perf build: Add a LIBPFM4=1 build test
> entry"). The patches has been tested on Arm N1 machine (by James)
> and on Hisilicon D06 platform (by Leo).
>
> Changes from v7:
> * Added James's tested-by tags;
> * Rebased on Perf tmp.perf/core branch.
>
>
> Tan Xiaojun (3):
> perf tools: Move arm-spe-pkt-decoder.h/c to the new dir
> perf auxtrace: Add four itrace options
> perf arm-spe: Support synthetic events
>
> tools/perf/Documentation/itrace.txt | 6 +-
> tools/perf/util/Build | 2 +-
> tools/perf/util/arm-spe-decoder/Build | 1 +
> .../util/arm-spe-decoder/arm-spe-decoder.c| 219 +
> .../util/arm-spe-decoder/arm-spe-decoder.h| 82 ++
> .../arm-spe-pkt-decoder.c | 0
> .../arm-spe-pkt-decoder.h | 16 +
> tools/perf/util/arm-spe.c | 823 +-
> tools/perf/util/auxtrace.c| 17 +
> tools/perf/util/auxtrace.h| 15 +-
> 10 files changed, 1135 insertions(+), 46 deletions(-)
> create mode 100644 tools/perf/util/arm-spe-decoder/Build
> create mode 100644 tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
> create mode 100644 tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
> rename tools/perf/util/{ => arm-spe-decoder}/arm-spe-pkt-decoder.c (100%)
> rename tools/perf/util/{ => arm-spe-decoder}/arm-spe-pkt-decoder.h (64%)
>
> --
> 2.17.1
>
--
- Arnaldo
