Re: [PATCH v2 0/3] pwm: add pwm AO on meson gx
On Thu, Jun 08, 2017 at 02:24:13PM +0200, Jerome Brunet wrote: > The pwms found in the AO domain of the meson gx family have different > clock sources than the ones found in the EE domain. The AO pwms only > have 2 connected clock input which are clk81 and the crytal. > > This patchset adds the necessary compatible and the clock data for it. > > Changes since v1: [0] > * Correct clock source order for gxbb pwm ao. Documenation shows xtal as > source #1 while it is actually source #0 > * Add patch 3 to fix pwm calculation. Issue while testing pwm with clk81 > as clock source. > > [0]: https://lkml.kernel.org/r/20170607133013.4766-1-jbru...@baylibre.com > > Jerome Brunet (3): > dt-bindings: pwm: meson: add comptabible for gxbb ao pwms > pwm: meson: add compatible for the gxbb ao pwms > pwm: meson: improve pwm calculation precision. > > .../devicetree/bindings/pwm/pwm-meson.txt | 4 +- > drivers/pwm/pwm-meson.c| 47 > +- > 2 files changed, 41 insertions(+), 10 deletions(-) For some reason the Author field keeps getting set to: jbrunet It seems like the headers are correct, so maybe this is patchwork messing things up? Anyway, I've applied the series and manually fixed up the Author field. Thanks, Thierry signature.asc Description: PGP signature
Re: [PATCH V1 3/4] spmi: pmic-arb: add support for HW version 5
On 07/03, Kiran Gunda wrote:
> From: David Collins
>
> Add support for version 5 of the SPMI PMIC arbiter. It utilizes
> different offsets for registers than those found on version 3.
> Also, the procedure to determine if writing and IRQ access is
> allowed for a given PPID changes for version 5.
>
David's sign-off is missing?
> Signed-off-by: Kiran Gunda
> ---
> drivers/spmi/spmi-pmic-arb.c | 233
> +++
> 1 file changed, 214 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
> index 86affb0..bc88c19 100644
> --- a/drivers/spmi/spmi-pmic-arb.c
> +++ b/drivers/spmi/spmi-pmic-arb.c
> @@ -1,5 +1,5 @@
> /*
> - * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 and
> @@ -29,6 +29,7 @@
> #define PMIC_ARB_VERSION 0x
> #define PMIC_ARB_VERSION_V2_MIN 0x2001
> #define PMIC_ARB_VERSION_V3_MIN 0x3000
> +#define PMIC_ARB_VERSION_V5_MIN 0x5000
> #define PMIC_ARB_INT_EN 0x0004
>
> /* PMIC Arbiter channel registers offsets */
> @@ -39,7 +40,6 @@
> #define PMIC_ARB_WDATA1 0x14
> #define PMIC_ARB_RDATA0 0x18
> #define PMIC_ARB_RDATA1 0x1C
> -#define PMIC_ARB_REG_CHNL(N) (0x800 + 0x4 * (N))
>
> /* Mapping Table */
> #define SPMI_MAPPING_TABLE_REG(N)(0x0B00 + (4 * (N)))
> @@ -52,6 +52,8 @@
> #define SPMI_MAPPING_TABLE_TREE_DEPTH16 /* Maximum of 16-bits */
> #define PMIC_ARB_MAX_PPIDBIT(12) /* PPID is 12bit */
> #define PMIC_ARB_APID_VALID BIT(15)
> +#define PMIC_ARB_CHAN_IS_IRQ_OWNER(reg) ((reg) & BIT(24))
> +#define INVALID (-1)
INVALID_EE? And then define it to be 0xff?
>
> /* Ownership Table */
> #define SPMI_OWNERSHIP_TABLE_REG(N) (0x0700 + (4 * (N)))
> @@ -86,6 +88,15 @@ enum pmic_arb_cmd_op_code {
> PMIC_ARB_OP_ZERO_WRITE = 16,
> };
>
> +/*
> + * PMIC arbiter version 5 uses different register offsets for read/write vs
> + * observer channels.
> + */
> +enum pmic_arb_channel {
> + PMIC_ARB_CHANNEL_RW,
> + PMIC_ARB_CHANNEL_OBS,
> +};
> +
> /* Maximum number of support PMIC peripherals */
> #define PMIC_ARB_MAX_PERIPHS 512
[...]
> @@ -112,7 +123,8 @@ enum pmic_arb_cmd_op_code {
>
> +
> /* v2 offset per ppid and per ee */
> static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16
> addr,
> - u32 *offset)
> +enum pmic_arb_channel ch_type, u32 *offset)
> {
> u16 apid;
> u16 ppid;
> @@ -841,6 +947,34 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb
> *pmic_arb, u8 sid, u16 addr,
> return 0;
> }
>
> +/*
> + * v5 offset per ee and per apid for observer channels and per apid for
> + * read/write channels.
> + */
> +static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16
> addr,
> +enum pmic_arb_channel ch_type, u32 *offset)
> +{
> + u16 apid;
> + int rc;
> + u16 ppid = (sid << 8) | (addr >> 8);
> +
> + rc = pmic_arb_ppid_to_apid_v5(pmic_arb, ppid);
> + if (rc < 0)
> + return rc;
> +
> + apid = rc;
> + switch (ch_type) {
> + case PMIC_ARB_CHANNEL_OBS:
> + *offset = 0x1 * pmic_arb->ee + 0x80 * apid;
> + break;
> + case PMIC_ARB_CHANNEL_RW:
> + *offset = 0x1 * apid;
> + break;
> + }
> +
> + return 0;
Why doesn't this also return an iomem pointer?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v2 0/3] pwm: sun4i: switch to atomic PWM
On 06/07/2017 at 08:49:22 +0200, Thierry Reding wrote: > On Tue, May 30, 2017 at 09:32:06PM +0200, Alexandre Belloni wrote: > > Switch to atomic PWM. The main goal is to properly wait for a period before > > disabling a channel to ensure the correct level is set on the output. > > > > Changes in v2: > > - fixed remaining checkpatch warnings > > - split the series to ease reviews > > - changed the delay handling to ensure the proper amount of time has > > elapsed > >before disabling a channel > > - dropped RDY bit handling as it doesn't have any real effect. > > > > Alexandre Belloni (3): > > pwm: sun4i: improve hardware read out > > pwm: sun4i: switch to atomic PWM > > pwm: sun4i: drop legacy callbacks > > > > drivers/pwm/pwm-sun4i.c | 263 > > +++- > > 1 file changed, 148 insertions(+), 115 deletions(-) > > Series applied, though you could've just squashed together patches 2 and > 3 because they don't make sense apart. > Ok, thanks. IIRC, Boris suggested the split ;) > Thierry -- Alexandre Belloni, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
Re: [PATCH v2 0/3] pwm: sun4i: switch to atomic PWM
On Thu, 6 Jul 2017 09:00:16 +0200 Alexandre Belloni wrote: > On 06/07/2017 at 08:49:22 +0200, Thierry Reding wrote: > > On Tue, May 30, 2017 at 09:32:06PM +0200, Alexandre Belloni wrote: > > > Switch to atomic PWM. The main goal is to properly wait for a period > > > before > > > disabling a channel to ensure the correct level is set on the output. > > > > > > Changes in v2: > > > - fixed remaining checkpatch warnings > > > - split the series to ease reviews > > > - changed the delay handling to ensure the proper amount of time has > > > elapsed > > >before disabling a channel > > > - dropped RDY bit handling as it doesn't have any real effect. > > > > > > Alexandre Belloni (3): > > > pwm: sun4i: improve hardware read out > > > pwm: sun4i: switch to atomic PWM > > > pwm: sun4i: drop legacy callbacks > > > > > > drivers/pwm/pwm-sun4i.c | 263 > > > +++- > > > 1 file changed, 148 insertions(+), 115 deletions(-) > > > > Series applied, though you could've just squashed together patches 2 and > > 3 because they don't make sense apart. > > > > Ok, thanks. IIRC, Boris suggested the split ;) Yes, I did it because the diff was really hard to review.
Re: [PATCH 3/3] mfd: twl: move header file out of I2C realm
On Thu, 06 Jul 2017, Thierry Reding wrote:
> On Mon, May 22, 2017 at 12:02:10AM +0200, Wolfram Sang wrote:
> > include/linux/i2c is not for client devices. Move the header file to a
> > more appropriate location.
> >
> > Signed-off-by: Wolfram Sang
> > ---
> > arch/arm/mach-omap2/common.h| 2 +-
> > arch/arm/mach-omap2/omap_twl.c | 2 +-
> > drivers/gpio/gpio-twl4030.c | 2 +-
> > drivers/iio/adc/twl4030-madc.c | 2 +-
> > drivers/iio/adc/twl6030-gpadc.c | 2 +-
> > drivers/input/keyboard/twl4030_keypad.c | 2 +-
> > drivers/input/misc/twl4030-pwrbutton.c | 2 +-
> > drivers/input/misc/twl4030-vibra.c | 2 +-
> > drivers/mfd/twl-core.c | 6 +++---
> > drivers/mfd/twl4030-audio.c | 2 +-
> > drivers/mfd/twl4030-irq.c | 2 +-
> > drivers/mfd/twl4030-power.c | 2 +-
> > drivers/mfd/twl6030-irq.c | 2 +-
> > drivers/phy/phy-twl4030-usb.c | 2 +-
> > drivers/power/supply/twl4030_charger.c | 2 +-
> > drivers/pwm/pwm-twl-led.c | 2 +-
> > drivers/pwm/pwm-twl.c | 2 +-
> > drivers/regulator/twl-regulator.c | 2 +-
> > drivers/regulator/twl6030-regulator.c | 2 +-
> > drivers/rtc/rtc-twl.c | 2 +-
> > drivers/usb/phy/phy-twl6030-usb.c | 2 +-
> > drivers/video/backlight/pandora_bl.c| 2 +-
> > drivers/watchdog/twl4030_wdt.c | 2 +-
> > include/linux/{i2c => mfd}/twl.h| 0
> > sound/soc/codecs/twl4030.c | 2 +-
> > 25 files changed, 26 insertions(+), 26 deletions(-)
> > rename include/linux/{i2c => mfd}/twl.h (100%)
>
> I didn't see this get applied yet, so just in case anyone was waiting
> for me (this is trivial, so I don't think there's a need):
You're not the last. :)
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
[PATCH 2/2] Staging: dgnc: I have fixed the changes in dgnc_neo.c This is a patch to the dgnc_neo.c warning udealy to usleep range Signed-off-by: Yash Omer
From: Yash Omer --- drivers/staging/dgnc/dgnc_neo.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c index 1943e66..0034ebe 100644 --- a/drivers/staging/dgnc/dgnc_neo.c +++ b/drivers/staging/dgnc/dgnc_neo.c @@ -1230,7 +1230,7 @@ static void neo_flush_uart_write(struct channel_t *ch) */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 4) - udelay(10); + usleep_range(10); else break; } @@ -1261,7 +1261,7 @@ static void neo_flush_uart_read(struct channel_t *ch) */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 2) - udelay(10); + usleep_range(10); else break; } @@ -1483,7 +1483,7 @@ static void neo_assert_modem_signals(struct channel_t *ch) neo_pci_posting_flush(ch->ch_bd); /* Give time for the UART to actually raise/drop the signals */ - udelay(10); + usleep_range(10); } static void neo_send_start_character(struct channel_t *ch) @@ -1495,7 +1495,7 @@ static void neo_send_start_character(struct channel_t *ch) ch->ch_xon_sends++; writeb(ch->ch_startc, &ch->ch_neo_uart->txrx); neo_pci_posting_flush(ch->ch_bd); - udelay(10); + usleep_range(10); } } @@ -1508,7 +1508,7 @@ static void neo_send_stop_character(struct channel_t *ch) ch->ch_xoff_sends++; writeb(ch->ch_stopc, &ch->ch_neo_uart->txrx); neo_pci_posting_flush(ch->ch_bd); - udelay(10); + usleep_range(10); } } -- 2.1.4
Re: [PATCH v2] KVM: arm/arm64: Handle hva aging while destroying the vm
On 05.07.17 10:57, Suzuki K Poulose wrote:
Hi Alex,
On Wed, Jul 05, 2017 at 08:20:31AM +0200, Alexander Graf wrote:
The kvm_age_hva callback may be called all the way concurrently while
kvm_mmu_notifier_release() is running.
The release function sets kvm->arch.pgd = NULL which the aging function
however implicitly relies on in stage2_get_pud(). That means they can
race and the aging function may dereference a NULL pgd pointer.
This patch adds a check for that case, so that we leave the aging
function silently.
Cc: sta...@vger.kernel.org
Fixes: 293f29363 ("kvm-arm: Unmap shadow pagetables properly")
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Fix commit message
- Add Fixes and stable tags
---
virt/kvm/arm/mmu.c | 4
1 file changed, 4 insertions(+)
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
index f2d5b6c..227931f 100644
--- a/virt/kvm/arm/mmu.c
+++ b/virt/kvm/arm/mmu.c
@@ -861,6 +861,10 @@ static pud_t *stage2_get_pud(struct kvm *kvm, struct
kvm_mmu_memory_cache *cache
pgd_t *pgd;
pud_t *pud;
+ /* Do we clash with kvm_free_stage2_pgd()? */
+ if (!kvm->arch.pgd)
+ return NULL;
+
I think this check should be moved up in the chain. We call kvm_age_hva(), with
the kvm->mmu_lock held and we don't release it till we reach here. So, ideally,
if we find the PGD is null when we reach kvm_age_hva(), we could simply return
there, like we do for other call backs from the KVM mmu_notifier.
That probably works too - I'm not sure which version is more consistent
as well as more maintainable in the long run. I'll leave the call here
to Christoffer.
Alex
[PATCH] sctp: set the value of flowi6_oif to sk_bound_dev_if to make sctp_v6_get_dst to find the correct route entry.
From: Zheng Li
if there are several same route entries with different outgoing net device,
application's socket specifies the oif through setsockopt with
SO_BINDTODEVICE, sctpv6 should choose the route entry whose outgoing net
device is the oif which was specified by socket, set the value of
flowi6_oif to sk->sk_bound_dev_if to make sctp_v6_get_dst to find the
correct route entry.
Signed-off-by: Zheng Li
---
net/sctp/ipv6.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/sctp/ipv6.c b/net/sctp/ipv6.c
index f5b45b8..2a186b20 100644
--- a/net/sctp/ipv6.c
+++ b/net/sctp/ipv6.c
@@ -252,6 +252,8 @@ static void sctp_v6_get_dst(struct sctp_transport *t, union
sctp_addr *saddr,
fl6->flowi6_proto = IPPROTO_SCTP;
if (ipv6_addr_type(&daddr->v6.sin6_addr) & IPV6_ADDR_LINKLOCAL)
fl6->flowi6_oif = daddr->v6.sin6_scope_id;
+ else if (asoc)
+ fl6->flowi6_oif = asoc->base.sk->sk_bound_dev_if;
pr_debug("%s: dst=%pI6 ", __func__, &fl6->daddr);
--
2.7.4
Re: [PATCH v5 3/3] mfd: dln2: Send restart command if HW init fails
On Wed, 05 Jul 2017, Jack Andersen wrote:
> I have mixed feelings about making this patch. The device appears to
> lose its ability to send command responses when the driver
> unexpectedly goes offline (probably overflowing an internal send
> buffer).
>
> The restart command is a send-only way to recover the device.
> What concerns me is if there's another issue causing init to fail and
> a restart doesn't fix, this will trigger an endless probe loop. I'm
> not sure if there's a better way to discern this condition.
Why does dln2_restart() cause an unbind/bind?
> On 5 July 2017 at 11:12, Jack Andersen wrote:
> > There's an issue with reinitializing DLN2 hardware if ADC channel event
> > configurations aren't reset before suspending the driver. A physical
> > reconnect
> > of the device solves the problem, but restarting the machine without a power
> > cycle leaves the device state inconsistent.
> >
> > This patch transmits a restart command in the event of a failed init.
> > To the kernel's perspective, this is the rough equivalent of a disconnect
> > and
> > reconnect, so another probe occurs shortly afterwards.
> >
> > Signed-off-by: Jack Andersen
> > ---
> > drivers/mfd/dln2.c | 11 ++-
> > 1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c
> > index a22ab8c..1eb0056 100644
> > --- a/drivers/mfd/dln2.c
> > +++ b/drivers/mfd/dln2.c
> > @@ -40,6 +40,7 @@ struct dln2_response {
> > #define DLN2_GENERIC_CMD(cmd) DLN2_CMD(cmd,
> > DLN2_GENERIC_MODULE_ID)
> > #define CMD_GET_DEVICE_VER DLN2_GENERIC_CMD(0x30)
> > #define CMD_GET_DEVICE_SN DLN2_GENERIC_CMD(0x31)
> > +#define CMD_RESTARTDLN2_GENERIC_CMD(0x43)
> >
> > #define DLN2_HW_ID 0x200
> > #define DLN2_USB_TIMEOUT 200 /* in ms */
> > @@ -531,6 +532,12 @@ int dln2_transfer(struct platform_device *pdev, u16
> > cmd,
> > }
> > EXPORT_SYMBOL(dln2_transfer);
> >
> > +static int dln2_restart(struct dln2_dev *dln2)
> > +{
> > + return _dln2_transfer(dln2, DLN2_HANDLE_CTRL, CMD_RESTART,
> > + NULL, 0, NULL, NULL);
> > +}
> > +
> > static int dln2_check_hw(struct dln2_dev *dln2)
> > {
> > int ret;
> > @@ -782,7 +789,9 @@ static int dln2_probe(struct usb_interface *interface,
> >
> > ret = dln2_hw_init(dln2);
> > if (ret < 0) {
> > - dev_err(dev, "failed to initialize hardware\n");
> > + dev_err(dev,
> > + "failed to initialize hardware; attempting
> > restart\n");
> > + dln2_restart(dln2);
> > goto out_stop_rx;
> > }
> >
> >
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
Re: [PATCH 2/2] Staging: dgnc: I have fixed the changes in dgnc_neo.c This is a patch to the dgnc_neo.c warning udealy to usleep range Signed-off-by: Yash Omer
On Thu, Jul 6, 2017 at 3:22 AM, yash007 wrote: > From: Yash Omer Your commit message is completely broken. Please fix it. See Documentation/process/submitting-patches.rst chapter 14. > > --- > drivers/staging/dgnc/dgnc_neo.c | 10 +- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c > index 1943e66..0034ebe 100644 > --- a/drivers/staging/dgnc/dgnc_neo.c > +++ b/drivers/staging/dgnc/dgnc_neo.c > @@ -1230,7 +1230,7 @@ static void neo_flush_uart_write(struct channel_t *ch) > */ > tmp = readb(&ch->ch_neo_uart->isr_fcr); > if (tmp & 4) > - udelay(10); > + usleep_range(10); > else > break; > } > @@ -1261,7 +1261,7 @@ static void neo_flush_uart_read(struct channel_t *ch) > */ > tmp = readb(&ch->ch_neo_uart->isr_fcr); > if (tmp & 2) > - udelay(10); > + usleep_range(10); > else > break; > } > @@ -1483,7 +1483,7 @@ static void neo_assert_modem_signals(struct channel_t > *ch) > neo_pci_posting_flush(ch->ch_bd); > > /* Give time for the UART to actually raise/drop the signals */ > - udelay(10); > + usleep_range(10); > } > > static void neo_send_start_character(struct channel_t *ch) > @@ -1495,7 +1495,7 @@ static void neo_send_start_character(struct channel_t > *ch) > ch->ch_xon_sends++; > writeb(ch->ch_startc, &ch->ch_neo_uart->txrx); > neo_pci_posting_flush(ch->ch_bd); > - udelay(10); > + usleep_range(10); > } > } > > @@ -1508,7 +1508,7 @@ static void neo_send_stop_character(struct channel_t > *ch) > ch->ch_xoff_sends++; > writeb(ch->ch_stopc, &ch->ch_neo_uart->txrx); > neo_pci_posting_flush(ch->ch_bd); > - udelay(10); > + usleep_range(10); > } > } > > -- > 2.1.4 >
Re: [PATCH v5 2/3] mfd: dln2: Add cell for initializing DLN2 ADC
On Wed, 05 Jul 2017, Jack Andersen wrote:
> Signed-off-by: Jack Andersen
> ---
> drivers/mfd/dln2.c | 12
> 1 file changed, 12 insertions(+)
Patch looks fine, but you need a commit message.
Once you have one, you may apply my:
For my own reference:
Acked-for-MFD-by: Lee Jones
> diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c
> index 704e189..a22ab8c 100644
> --- a/drivers/mfd/dln2.c
> +++ b/drivers/mfd/dln2.c
> @@ -53,6 +53,7 @@ enum dln2_handle {
> DLN2_HANDLE_GPIO,
> DLN2_HANDLE_I2C,
> DLN2_HANDLE_SPI,
> + DLN2_HANDLE_ADC,
> DLN2_HANDLES
> };
>
> @@ -663,6 +664,12 @@ static int dln2_start_rx_urbs(struct dln2_dev *dln2,
> gfp_t gfp)
> .port = 0,
> };
>
> +/* Only one ADC port supported */
> +static struct dln2_platform_data dln2_pdata_adc = {
> + .handle = DLN2_HANDLE_ADC,
> + .port = 0,
> +};
> +
> static const struct mfd_cell dln2_devs[] = {
> {
> .name = "dln2-gpio",
> @@ -679,6 +686,11 @@ static int dln2_start_rx_urbs(struct dln2_dev *dln2,
> gfp_t gfp)
> .platform_data = &dln2_pdata_spi,
> .pdata_size = sizeof(struct dln2_platform_data),
> },
> + {
> + .name = "dln2-adc",
> + .platform_data = &dln2_pdata_adc,
> + .pdata_size = sizeof(struct dln2_platform_data),
> + },
> };
>
> static void dln2_stop(struct dln2_dev *dln2)
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
Re: [lkp-robot] [scsi] 5c279bd9e4: blogbench.read_score -10.0% regression
On Thu, Jul 6, 2017 at 10:54 AM, Ye Xiaolong wrote: > Hi, Ming Lei > > On 07/06, Ming Lei wrote: >>Hi Xiaolong, >> >>On Mon, Jul 3, 2017 at 10:57 AM, kernel test robot >> wrote: >>> >>> Greeting, >>> >>> FYI, we noticed a -10.0% regression of blogbench.read_score due to commit: >> >>Looks like related with mq scheduler, could you test the following patch to >>see >>if your issue can be fixed? >> >>https://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git/commit/?h=for-linus&id=32825c45ff8f4cce937ab85b030dc693ceb1aa0a >> > > Here is the comparison of commit 5c279bd9e4 and 32825c45, it does help recover > performance back. That is great, thanks for your test! This patch has been in block tree, and will be pushed to v4.13. Thanks, Ming
Re: [PATCH v2 3/3] cros_ec: Don't signal wake event for non-wake host events
On Wed, 05 Jul 2017, Benson Leung wrote: > On Mon, Jul 03, 2017 at 12:46:41PM +0100, Lee Jones wrote: > > On Tue, 27 Jun 2017, Benson Leung wrote: > > > > > Hi Thierry, > > > > > > On Tue, Feb 14, 2017 at 08:58:02PM +0100, Thierry Escande wrote: > > > > From: Shawn Nematbakhsh > > > > > > > > The subset of wake-enabled host events is defined by the EC, but the EC > > > > may still send non-wake host events if we're in the process of > > > > suspending. Get the mask of wake-enabled host events from the EC and > > > > filter out non-wake events to prevent spurious aborted suspend > > > > attempts. > > > > > > > > Signed-off-by: Shawn Nematbakhsh > > > > Signed-off-by: Thierry Escande > > > > --- > > > > drivers/mfd/cros_ec.c | 13 -- > > > > drivers/platform/chrome/cros_ec_proto.c | 76 > > > > ++--- > > > > include/linux/mfd/cros_ec.h | 5 ++- > > > > 3 files changed, 85 insertions(+), 9 deletions(-) > > > > > > > > > > Another use of cros_ec_get_next_event was introduced in cros_ec_lpc.c > > > since > > > this patch was posted, so I went ahead and modified that too. > > > > > > Applied. Thanks. > > > > No need to change anything this time, but please note the "for my own > > reference" in my Ack in future. It typically means that I plan on > > pushing it through the MFD tree or that it requires further discussion > > (in the case that another Maintainer would prefer it go through their > > tree). > > Sorry about that. Thanks for the advice! I'm still getting my sea legs for > maintainership. It's not your fault. The tag I use is non-standard, so I expect some trivial issues like this to occur from time to time. But it solves more problems than it creates, so it's still work me using it. Thanks for your understanding. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog
答复: [PATCH v5] mmc: dw_mmc-k3: add sd support for hi3660
Hi, Jaehoon
Thank you for your advice during your busy schedule,
1."Need the patch for adding "hi3660-dw-mshc" compatible
Documentation/devicetree/bindings/k3-dw-mshc.txt"
This "hi3660-dw-mshc" compatible string has been integrated into platform
maintainer's tree together with dts changes. It's now in linux-next [1]；need
this one more?
2. And added the minor comments.
Iwill fix them in patch v6.
Thank you very much.
-邮件原件-
发件人: Guodong Xu [mailto:guodong...@linaro.org]
发送时间: 2017年7月6日 14:45
收件人: Jaehoon Chung; liwei (CM)
抄送: Ulf Hansson; adrian.hun...@intel.com; Shawn Lin;
wsa+rene...@sang-engineering.com; hkallwe...@gmail.com;
linux-...@vger.kernel.org; linux-kernel@vger.kernel.org
主题: Re: [PATCH v5] mmc: dw_mmc-k3: add sd support for hi3660
On Thu, Jul 6, 2017 at 1:13 PM, Jaehoon Chung wrote:
> Hi,
>
> To Guodong, if you can forward this to Li Wei, plz do it. Sorry.
>
Sure. Put Li Wei in cc.
And add my response.
> On 07/03/2017 10:06 AM, liwei wrote:
>>
>> Add sd card support for hi3660 soc
>
> Need the patch for adding "hi3660-dw-mshc" compatible
> Documentation/devicetree/bindings/k3-dw-mshc.txt
>
> And added the minor comments.
>
Hi, Jaehoo,
This "hi3660-dw-mshc" compatible string has been integrated into platform
maintainer's tree together with dts changes. It's now in linux-next [1], and in
Linus' master branch [2], will be in mainline v4.13-rc's.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/log/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt?h=next-20170706
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
-Guodong
>>
>> Major changes in v3:
>> - solve review comments from Heiner Kallweit.
>>*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
>>*use usleep_range() replace udelay() and mdelay().
>>
>> Major changes in v4:
>> - solve review comments from Jaehoon Chung.
>>*move common register for dwmmc controller to dwmmc header file.
>>*modify definitions type of some register variables.
>>*get rid of the magic numbers.
>>
>> Major changes in v5:
>> - further improve coding style.
>> ---
>> drivers/mmc/host/dw_mmc-k3.c | 315
>> +++
>> drivers/mmc/host/dw_mmc.h| 2 +
>> 2 files changed, 317 insertions(+)
>>
>> diff --git a/drivers/mmc/host/dw_mmc-k3.c
>> b/drivers/mmc/host/dw_mmc-k3.c index e38fb0020bb1..a28eb8c7da82
>> 100644
>> --- a/drivers/mmc/host/dw_mmc-k3.c
>> +++ b/drivers/mmc/host/dw_mmc-k3.c
>> @@ -8,6 +8,8 @@
>> * (at your option) any later version.
>> */
>>
>> +#include
>> +#include
>> #include
>> #include
>> #include
>> @@ -28,7 +30,38 @@
>> #define AO_SCTRL_SEL18 BIT(10)
>> #define AO_SCTRL_CTRL3 0x40C
>>
>> +#define DWMMC_SDIO_ID 2
>> +
>> +#define SOC_SCTRL_SCPERCTRL5(0x314)
>> +#define SDCARD_IO_SEL18 BIT(2)
>> +
>> +#define SDCARD_RD_THRESHOLD (512)
>> +
>> +#define GENCLK_DIV (7)
>> +
>> +#define GPIO_CLK_ENABLE BIT(16)
>> +#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
>> +#define GPIO_USE_SAMPLE_DLY_MASK GENMASK(13, 13)
>> +#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
>> +#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK GENMASK(25, 21)
>> +#define UHS_REG_EXT_SAMPLE_DLY_MASK GENMASK(30, 26)
>> +
>> +#define TIMING_MODE 3
>> +#define TIMING_CFG_NUM 10
>> +
>> +#define PULL_DOWN BIT(1)
>> +#define PULL_UP BIT(0)
>> +
>> +#define NUM_PHASES (40)
>> +
>> +#define ENABLE_SHIFT_MIN_SMPL (4)
>> +#define ENABLE_SHIFT_MAX_SMPL (12)
>> +#define USE_DLY_MIN_SMPL (11)
>> +#define USE_DLY_MAX_SMPL (14)
>> +
>> struct k3_priv {
>> + int ctrl_id;
>> + u32 cur_speed;
>> struct regmap *reg;
>> };
>>
>> @@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
>> 0
>> };
>>
>> +struct hs_timing {
>> + u32 drv_phase;
>> + u32 smpl_dly;
>> + u32 smpl_phase_max;
>> + u32 smpl_phase_min;
>> +};
>> +
>> +struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
>> + { /* reserved */ },
>> + { /* SD */
>> + {7, 0, 15, 15,}, /* 0: LEGACY 400k */
>> + {6, 0, 4, 4,}, /* 1: MMC_HS */
>> + {6, 0,
[PATCH] Fix header-name to read full state name and adjust column width
---Steps to Reproduce---
1.Execute the cpupower monitor command to fetch all the Idle_Stats values.
root:~# cpupower monitor
|Idle_Stats
PKG |CORE|CPU | snoo | stop | stop
0| 8| 0| 0.00| 0.00| 2.79
0| 8| 1| 0.00| 0.00| 70.68
User interpret it as 2 columns for stop Idle_stats.
root:/sys/devices/system/cpu/cpu8/cpuidle# cat */name
snooze
stop0_lite
stop1_lite
cpupower monitor now shows full state name and adjust colomn width.
root:~/linux/tools/power/cpupower# cpupower monitor
|Idle_Stats
PKG |CORE|CPU |snooze|stop0_lite|stop1_lite
0| 8| 0| 0.00| 0.00| 99.83
0| 8| 1| 0.00| 0.00| 43.82
0| 8| 2| 0.00| 0.00| 102.1
0| 8| 3| 0.00| 0.00| 96.56
tested on x86 as well.
Signed-off-by: Seeteena Thoufeek
---
.../cpupower/utils/idle_monitor/cpupower-monitor.c | 25 ++
.../cpupower/utils/idle_monitor/cpupower-monitor.h | 2 +-
2 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c
b/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c
index 05f953f..5e708d5 100644
--- a/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c
+++ b/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.c
@@ -88,7 +88,7 @@ void print_header(int topology_depth)
int state, need_len;
cstate_t s;
char buf[128] = "";
- int percent_width = 4;
+ unsigned int percent_width = 6;
fill_string_with_spaces(buf, topology_depth * 5 - 1);
printf("%s|", buf);
@@ -116,17 +116,18 @@ void print_header(int topology_depth)
for (mon = 0; mon < avail_monitors; mon++) {
if (mon != 0)
printf("|| ");
- else
- printf(" ");
for (state = 0; state < monitors[mon]->hw_states_num; state++) {
if (state != 0)
- printf(" | ");
+ printf("|");
s = monitors[mon]->hw_states[state];
sprintf(buf, "%s", s.name);
- fill_string_with_spaces(buf, percent_width);
+ if (strlen(s.name) > percent_width)
+ fill_string_with_spaces(buf, strlen(s.name));
+ else
+ fill_string_with_spaces(buf, percent_width);
+
printf("%s", buf);
- }
- printf(" ");
+ }
}
printf("\n");
}
@@ -139,7 +140,9 @@ void print_results(int topology_depth, int cpu)
double percent;
unsigned long long result;
cstate_t s;
-
+ char buf[128] = "";
+ unsigned int percent_width = 6;
+ unsigned int width;
/* Be careful CPUs may got resorted for pkg value do not just use cpu */
if (!bitmask_isbitset(cpus_chosen, cpu_top.core_info[cpu].cpu))
return;
@@ -163,7 +166,11 @@ void print_results(int topology_depth, int cpu)
printf("|");
s = monitors[mon]->hw_states[state];
-
+ if (strlen(s.name) > percent_width) {
+ width = strlen(s.name) - percent_width;
+ fill_string_with_spaces(buf, width);
+ printf("%s", buf);
+ }
if (s.get_count_percent) {
ret = s.get_count_percent(s.id, &percent,
cpu_top.core_info[cpu].cpu);
diff --git a/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.h
b/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.h
index 9e43f33..c9179c6 100644
--- a/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.h
+++ b/tools/power/cpupower/utils/idle_monitor/cpupower-monitor.h
@@ -15,7 +15,7 @@
#define MONITORS_MAX 20
#define MONITOR_NAME_LEN 20
-#define CSTATE_NAME_LEN 5
+#define CSTATE_NAME_LEN 16
#define CSTATE_DESC_LEN 60
int cpu_count;
--
1.8.3.1
[PATCH 8/8] Staging: lustre :lustre: include :lustre_compat.h: Prefer using the BIT macro
Replace all instances of (1 << 27) with BIT(27) to fix checkpatch check messages Signed-off-by: Jaya Durga --- drivers/staging/lustre/lustre/include/lustre_compat.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/lustre/lustre/include/lustre_compat.h b/drivers/staging/lustre/lustre/include/lustre_compat.h index da9ce19..686a251 100644 --- a/drivers/staging/lustre/lustre/include/lustre_compat.h +++ b/drivers/staging/lustre/lustre/include/lustre_compat.h @@ -43,7 +43,7 @@ * set ATTR_BLOCKS to a high value to avoid any risk of collision with other * ATTR_* attributes (see bug 13828) */ -#define ATTR_BLOCKS(1 << 27) +#define ATTR_BLOCKSBIT(27) #define current_ngroups current_cred()->group_info->ngroups #define current_groups current_cred()->group_info->small_block -- 1.9.1
Re: [PATCH 1/3] drm: Widen vblank count to 64 bits. Change vblank time precision to ns
On Wed, Jul 05, 2017 at 03:10:11PM -0700, Keith Packard wrote:
> This modifies the datatypes used by the vblank code to provide both 64
> bits of vblank count and to increase the resolution of the vblank
> timestamp from microseconds to nanoseconds.
>
> The driver interfaces have also been changed to return 64-bits of
> vblank count; fortunately all of the code necessary to widen that value
> was already included to handle devices returning fewer than 32-bits.
Extending the reported/sw vblank counter to u64 makes sense imo, but do we
have to extend the driver interfaces too? If there's no 64 bit hw vblank
currently I think I'd be good to postpone that part, simply because I'm
too lazy to audit all the drivers for correctly setting max_vblank_count
after your change :-)
Other thought on this, since you bother to change all the types: Afaik
both timespec and timeval suffer from the 32bit issues. If we bother with
changing everything I think it'd be neat to switch all internal interfaces
over to ktime, and only convert to the userspace types once when we
generate the event. I think that's how cool hackers are supposed to do it,
but not fully sure.
Otherwise looks all good, but haven't yet carefully hunted for fumbles in
review before the above is clear.
-Daniel
> This will provide the necessary datatypes for the Vulkan API.
>
> Signed-off-by: Keith Packard
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
> drivers/gpu/drm/drm_vblank.c | 159
> ++-
> drivers/gpu/drm/exynos/exynos_drm_crtc.c | 2 +-
> drivers/gpu/drm/gma500/psb_drv.h | 2 +-
> drivers/gpu/drm/gma500/psb_irq.c | 2 +-
> drivers/gpu/drm/gma500/psb_irq.h | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 4 +-
> drivers/gpu/drm/mga/mga_drv.h| 2 +-
> drivers/gpu/drm/mga/mga_irq.c| 2 +-
> drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 2 +-
> drivers/gpu/drm/r128/r128_drv.h | 2 +-
> drivers/gpu/drm/r128/r128_irq.c | 2 +-
> drivers/gpu/drm/radeon/radeon_drv.c | 2 +-
> drivers/gpu/drm/radeon/radeon_kms.c | 2 +-
> drivers/gpu/drm/tegra/dc.c | 2 +-
> drivers/gpu/drm/via/via_drv.h| 2 +-
> drivers/gpu/drm/via/via_irq.c| 5 +-
> drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 2 +-
> drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 2 +-
> include/drm/drmP.h | 2 +-
> include/drm/drm_crtc.h | 2 +-
> include/drm/drm_drv.h| 4 +-
> include/drm/drm_vblank.h | 18 ++--
> 24 files changed, 130 insertions(+), 98 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index e0adad590ecb..860f5e194864 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1979,7 +1979,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
> int amdgpu_suspend(struct amdgpu_device *adev);
> int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon);
> int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon);
> -u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
> +u64 amdgpu_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
> int amdgpu_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
> void amdgpu_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
> long amdgpu_kms_compat_ioctl(struct file *filp, unsigned int cmd,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 12497a40ef92..f8c814c9c91a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -922,7 +922,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
> * Gets the frame count on the requested crtc (all asics).
> * Returns frame count on success, -EINVAL on failure.
> */
> -u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe)
> +u64 amdgpu_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe)
> {
> struct amdgpu_device *adev = dev->dev_private;
> int vpos, hpos, stat;
> diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
> index 463e4d81fb0d..f55f997c0b8f 100644
> --- a/drivers/gpu/drm/drm_vblank.c
> +++ b/drivers/gpu/drm/drm_vblank.c
> @@ -43,7 +43,7 @@
>
> static bool
> drm_get_last_vbltimestamp(struct drm_device *dev, unsigned int pipe,
> - struct timeval *tvblank, bool in_vblank_irq);
> + struct timespec *tvblank, bool in_vblank_irq);
>
> static unsigned int drm_timestamp_precision = 20; /* Default to 20 usecs. */
>
> @@ -63,8 +63,8 @@ MODULE_PARM_DESC(timestamp_precision_usec, "Max. error on
> timestamps [usecs]");
> MODULE_PARM_
Re: [PATCH v7 04/18] xen/pvcalls: xenbus state handling
On 05/07/17 23:50, Stefano Stabellini wrote: > Introduce the code to handle xenbus state changes. > > Implement the probe function for the pvcalls backend. Write the > supported versions, max-page-order and function-calls nodes to xenstore, > as required by the protocol. > > Introduce stub functions for disconnecting/connecting to a frontend. > > Signed-off-by: Stefano Stabellini > Reviewed-by: Boris Ostrovsky Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH v7 05/18] xen/pvcalls: connect to a frontend
On 05/07/17 23:50, Stefano Stabellini wrote: > Introduce a per-frontend data structure named pvcalls_fedata. It > contains pointers to the command ring, its event channel, a list of > active sockets and a tree of passive sockets (passing sockets need to be > looked up from the id on listen, accept and poll commands, while active > sockets only on release). > > It also has an unbound workqueue to schedule the work of parsing and > executing commands on the command ring. socket_lock protects the two > lists. In pvcalls_back_global, keep a list of connected frontends. > > Signed-off-by: Stefano Stabellini > Reviewed-by: Boris Ostrovsky Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH v7 06/18] xen/pvcalls: handle commands from the frontend
On 05/07/17 23:50, Stefano Stabellini wrote: > When the other end notifies us that there are commands to be read > (pvcalls_back_event), wake up the backend thread to parse the command. > > The command ring works like most other Xen rings, so use the usual > ring macros to read and write to it. The functions implementing the > commands are empty stubs for now. > > Signed-off-by: Stefano Stabellini Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH 8/8] Staging: lustre :lustre: include :lustre_compat.h: Prefer using the BIT macro
On Thu, Jul 6, 2017 at 9:13 AM, Jaya Durga wrote: > Subject: Staging: lustre :lustre: include :lustre_compat.h: Prefer using the > BIT macro Don't overdo it ;-). Subject: staging: lustre: lustre_compat.h: Prefer using the BIT macro > Replace all instances of (1 << 27) with BIT(27) to fix > checkpatch check messages While it may technically be true that this one instance is every instance of (1<<27) there is in lustre_compat.h, I must say I expected a bigger patch when I saw "replace all instances". > Signed-off-by: Jaya Durga > --- > drivers/staging/lustre/lustre/include/lustre_compat.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/staging/lustre/lustre/include/lustre_compat.h > b/drivers/staging/lustre/lustre/include/lustre_compat.h > index da9ce19..686a251 100644 > --- a/drivers/staging/lustre/lustre/include/lustre_compat.h > +++ b/drivers/staging/lustre/lustre/include/lustre_compat.h > @@ -43,7 +43,7 @@ > * set ATTR_BLOCKS to a high value to avoid any risk of collision with other > * ATTR_* attributes (see bug 13828) > */ > -#define ATTR_BLOCKS(1 << 27) > +#define ATTR_BLOCKSBIT(27) > > #define current_ngroups current_cred()->group_info->ngroups > #define current_groups current_cred()->group_info->small_block > -- > 1.9.1 > > ___ > devel mailing list > de...@linuxdriverproject.org > http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v7 08/18] xen/pvcalls: implement connect command
On 05/07/17 23:50, Stefano Stabellini wrote: > Allocate a socket. Keep track of socket <-> ring mappings with a new data > structure, called sock_mapping. Implement the connect command by calling > inet_stream_connect, and mapping the new indexes page and data ring. > Allocate a workqueue and a work_struct, called ioworker, to perform > reads and writes to the socket. > > When an active socket is closed (sk_state_change), set in_error to > -ENOTCONN and notify the other end, as specified by the protocol. > > sk_data_ready and pvcalls_back_ioworker will be implemented later. > > Signed-off-by: Stefano Stabellini Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH 18/18] ALSA: opl4: Move inline before return type
On Wed, 05 Jul 2017 22:02:27 +0200, Joe Perches wrote: > > Make the code like the rest of the kernel. > > Signed-off-by: Joe Perches Applied, thanks. Takashi
Re: [PATCH] Make Common clock framework a menuconfig to ease disabling it all
Hello, On Wed, Jul 5, 2017 at 11:15 PM, Stephen Boyd wrote: > On 07/02, Vincent Legoll wrote: >> -menu "Common Clock Framework" >> +menuconfig COMMON_CLK_FRAMEWORK >> + tristate "Common Clock Framework" >> depends on COMMON_CLK > > Wouldn't this put the clk drivers inside the drivers menu? This does not move anything (at least I think), it just change the already existing submenu into a menuconfig, which you can choose to disable as a whole, which disable everything inside that menuconfig. Maybe there are side effects visible outside of this menu. > Which is already quite large right now. That's right, and I'm willing to tackle at least a part of this problem, first by making it easier to disable whole chunks at once. > Plus this makes common clk > tristate which so far we haven't supported. No thanks. OK that was an oversight, I'll revisit later (going for the low hanging fruits). But this is moot anyways, you should drop that patch because it introduces new compile warnings on ARM. Sorry -- Vincent Legoll
[PATCH 2/2] Staging: dgnc: I have fixed the changes in dgnc_neo.c This is a patch to the dgnc_neo.c warning udealy to usleep range Signed-off-by: Yash Omer
From: Yash Omer --- drivers/staging/dgnc/dgnc_neo.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c index 1943e66..0034ebe 100644 --- a/drivers/staging/dgnc/dgnc_neo.c +++ b/drivers/staging/dgnc/dgnc_neo.c @@ -1230,7 +1230,7 @@ static void neo_flush_uart_write(struct channel_t *ch) */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 4) - udelay(10); + usleep_range(10); else break; } @@ -1261,7 +1261,7 @@ static void neo_flush_uart_read(struct channel_t *ch) */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 2) - udelay(10); + usleep_range(10); else break; } @@ -1483,7 +1483,7 @@ static void neo_assert_modem_signals(struct channel_t *ch) neo_pci_posting_flush(ch->ch_bd); /* Give time for the UART to actually raise/drop the signals */ - udelay(10); + usleep_range(10); } static void neo_send_start_character(struct channel_t *ch) @@ -1495,7 +1495,7 @@ static void neo_send_start_character(struct channel_t *ch) ch->ch_xon_sends++; writeb(ch->ch_startc, &ch->ch_neo_uart->txrx); neo_pci_posting_flush(ch->ch_bd); - udelay(10); + usleep_range(10); } } @@ -1508,7 +1508,7 @@ static void neo_send_stop_character(struct channel_t *ch) ch->ch_xoff_sends++; writeb(ch->ch_stopc, &ch->ch_neo_uart->txrx); neo_pci_posting_flush(ch->ch_bd); - udelay(10); + usleep_range(10); } } -- 2.1.4
Re: [PATCH v7 09/18] xen/pvcalls: implement bind command
On 05/07/17 23:50, Stefano Stabellini wrote: > Allocate a socket. Track the allocated passive sockets with a new data > structure named sockpass_mapping. It contains an unbound workqueue to > schedule delayed work for the accept and poll commands. It also has a > reqcopy field to be used to store a copy of a request for delayed work. > Reads/writes to it are protected by a lock (the "copy_lock" spinlock). > Initialize the workqueue in pvcalls_back_bind. > > Implement the bind command with inet_bind. > > The pass_sk_data_ready event handler will be added later. > > Signed-off-by: Stefano Stabellini Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH v7 14/18] xen/pvcalls: disconnect and module_exit
On 05/07/17 23:50, Stefano Stabellini wrote: > Implement backend_disconnect. Call pvcalls_back_release_active on active > sockets and pvcalls_back_release_passive on passive sockets. > > Implement module_exit by calling backend_disconnect on frontend > connections. > > Signed-off-by: Stefano Stabellini Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH 2/9] RISC-V: Atomic and Locking Code
On Thu, Jul 06, 2017 at 07:08:33PM +0800, Boqun Feng wrote:
> On Wed, Jul 05, 2017 at 10:43:21AM +0200, Peter Zijlstra wrote:
> > On Tue, Jul 04, 2017 at 12:50:55PM -0700, Palmer Dabbelt wrote:
> > > +/*
> > > + * FIXME: I could only find documentation that atomic_{add,sub,inc,dec}
> > > are
> > > + * barrier-free. I'm assuming that and/or/xor have the same constraints
> > > as the
> > > + * others.
> > > + */
> >
> > Yes.. we have new documentation in the work to which I would post a link
> > but for some reason copy/paste stopped working again (Konsole does that
> > at times and is #$%#$%#4# annoying).
> >
> > Ha, found it using google...
> >
> > https://marc.info/?l=linux-kernel&m=14972790112580
> >
>
> The link is broken, you miss a tailing 1 ;-)
>
> https://marc.info/?l=linux-kernel&m=149727901125801
>
Argh... thanks for fixing that!
Re: [PATCH v7 15/18] xen/pvcalls: implement the ioworker functions
On 05/07/17 23:50, Stefano Stabellini wrote:
> We have one ioworker per socket. Each ioworker goes through the list of
> outstanding read/write requests. Once all requests have been dealt with,
> it returns.
>
> We use one atomic counter per socket for "read" operations and one
> for "write" operations to keep track of the reads/writes to do.
>
> We also use one atomic counter ("io") per ioworker to keep track of how
> many outstanding requests we have in total assigned to the ioworker. The
> ioworker finishes when there are none.
>
> Signed-off-by: Stefano Stabellini
> Reviewed-by: Boris Ostrovsky
Reviewed-by: Juergen Gross
Thanks,
Juergen
Re: [tip:locking/urgent] locking/rwsem-spinlock: Fix EINTR branch in __down_write_common()
* Niklas Cassel wrote: > On 07/05/2017 04:27 PM, tip-bot for Kirill Tkhai wrote: > > Commit-ID: a0c4acd2c220376b4e9690e75782d0c0afdaab9f > > Gitweb: > > http://git.kernel.org/tip/a0c4acd2c220376b4e9690e75782d0c0afdaab9f > > Author: Kirill Tkhai > > AuthorDate: Fri, 16 Jun 2017 16:44:34 +0300 > > Committer: Ingo Molnar > > CommitDate: Wed, 5 Jul 2017 12:26:29 +0200 > > > > locking/rwsem-spinlock: Fix EINTR branch in __down_write_common() > > > > If a writer could been woken up, the above branch > > > > if (sem->count == 0) > > break; > > > > would have moved us to taking the sem. So, it's > > not the time to wake a writer now, and only readers > > are allowed now. Thus, 0 must be passed to __rwsem_do_wake(). > > > > Next, __rwsem_do_wake() wakes readers unconditionally. > > But we mustn't do that if the sem is owned by writer > > in the moment. Otherwise, writer and reader own the sem > > the same time, which leads to memory corruption in > > callers. > > > > rwsem-xadd.c does not need that, as: > > > > 1) the similar check is made lockless there, > > 2) in __rwsem_mark_wake::try_reader_grant we test, > > > > that sem is not owned by writer. > > > > Signed-off-by: Kirill Tkhai > > Acked-by: Peter Zijlstra > > Cc: > > Cc: Linus Torvalds > > Cc: Niklas Cassel > > Cc: Peter Zijlstra (Intel) > > Cc: Peter Zijlstra > > Cc: Thomas Gleixner > > Fixes: 17fcbd590d0c "locking/rwsem: Fix down_write_killable() for > > CONFIG_RWSEM_GENERIC_SPINLOCK=y" > > Link: > > http://lkml.kernel.org/r/149762063282.19811.9129615532201147826.stgit@localhost.localdomain > > Signed-off-by: Ingo Molnar > > --- > > kernel/locking/rwsem-spinlock.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/kernel/locking/rwsem-spinlock.c > > b/kernel/locking/rwsem-spinlock.c > > index c65f798..20819df 100644 > > --- a/kernel/locking/rwsem-spinlock.c > > +++ b/kernel/locking/rwsem-spinlock.c > > @@ -231,8 +231,8 @@ int __sched __down_write_common(struct rw_semaphore > > *sem, int state) > > > > out_nolock: > > list_del(&waiter.list); > > - if (!list_empty(&sem->wait_list)) > > - __rwsem_do_wake(sem, 1); > > + if (!list_empty(&sem->wait_list) && sem->count >= 0) > > + __rwsem_do_wake(sem, 0); > > raw_spin_unlock_irqrestore(&sem->wait_lock, flags); > > > > return -EINTR; > > > > For the record, there is actually a v2 of this: > > http://marc.info/?l=linux-kernel&m=149866422128912 Hm, so I missed that because it was within the discussion - please post v2 patches with a new subject line next time around. But I also disagree with -v2 mildly: in practice a >= test has the same CPU overhead as a > test, and if we rely on the earlier "sem->count == 0" test then we should also comment on that. It's more straightforward to just do the canonical sem->count >= 0 test that we do elsewhere in the rwsem-spinlock code. PeterZ, what's your preference? Thanks, Ingo
[PATCH v6] mmc: dw_mmc-k3: add sd support for hi3660
From: Li Wei
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
*use usleep_range() replace udelay() and mdelay().
Major changes in v4:
- solve review comments from Jaehoon Chung.
*move common register for dwmmc controller to dwmmc header file.
*modify definitions type of some register variables.
*get rid of the magic numbers.
Major changes in v5:
- further improve coding style.
Major changes in v6:
- solve review comments for Jaehoon Chung.
*modify dw_mci_hi3660_set_ios() to static.
*fix the comment style.
---
drivers/mmc/host/dw_mmc-k3.c | 316 +++
drivers/mmc/host/dw_mmc.h| 2 +
2 files changed, 318 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
index e38fb0020bb1..863bc580eeb8 100644
--- a/drivers/mmc/host/dw_mmc-k3.c
+++ b/drivers/mmc/host/dw_mmc-k3.c
@@ -8,6 +8,8 @@
* (at your option) any later version.
*/
+#include
+#include
#include
#include
#include
@@ -28,7 +30,38 @@
#define AO_SCTRL_SEL18 BIT(10)
#define AO_SCTRL_CTRL3 0x40C
+#define DWMMC_SDIO_ID 2
+
+#define SOC_SCTRL_SCPERCTRL5(0x314)
+#define SDCARD_IO_SEL18 BIT(2)
+
+#define SDCARD_RD_THRESHOLD (512)
+
+#define GENCLK_DIV (7)
+
+#define GPIO_CLK_ENABLE BIT(16)
+#define GPIO_CLK_DIV_MASK GENMASK(11, 8)
+#define GPIO_USE_SAMPLE_DLY_MASK GENMASK(13, 13)
+#define UHS_REG_EXT_SAMPLE_PHASE_MASK GENMASK(20, 16)
+#define UHS_REG_EXT_SAMPLE_DRVPHASE_MASK GENMASK(25, 21)
+#define UHS_REG_EXT_SAMPLE_DLY_MASK GENMASK(30, 26)
+
+#define TIMING_MODE 3
+#define TIMING_CFG_NUM 10
+
+#define PULL_DOWN BIT(1)
+#define PULL_UP BIT(0)
+
+#define NUM_PHASES (40)
+
+#define ENABLE_SHIFT_MIN_SMPL (4)
+#define ENABLE_SHIFT_MAX_SMPL (12)
+#define USE_DLY_MIN_SMPL (11)
+#define USE_DLY_MAX_SMPL (14)
+
struct k3_priv {
+ int ctrl_id;
+ u32 cur_speed;
struct regmap *reg;
};
@@ -38,6 +71,41 @@ static unsigned long dw_mci_hi6220_caps[] = {
0
};
+struct hs_timing {
+ u32 drv_phase;
+ u32 smpl_dly;
+ u32 smpl_phase_max;
+ u32 smpl_phase_min;
+};
+
+struct hs_timing hs_timing_cfg[TIMING_MODE][TIMING_CFG_NUM] = {
+ { /* reserved */ },
+ { /* SD */
+ {7, 0, 15, 15,}, /* 0: LEGACY 400k */
+ {6, 0, 4, 4,}, /* 1: MMC_HS */
+ {6, 0, 3, 3,}, /* 2: SD_HS */
+ {6, 0, 15, 15,}, /* 3: SDR12 */
+ {6, 0, 2, 2,}, /* 4: SDR25 */
+ {4, 0, 11, 0,}, /* 5: SDR50 */
+ {6, 4, 15, 0,}, /* 6: SDR104 */
+ {0}, /* 7: DDR50 */
+ {0}, /* 8: DDR52 */
+ {0}, /* 9: HS200 */
+ },
+ { /* SDIO */
+ {7, 0, 15, 15,}, /* 0: LEGACY 400k */
+ {0}, /* 1: MMC_HS */
+ {6, 0, 15, 15,}, /* 2: SD_HS */
+ {6, 0, 15, 15,}, /* 3: SDR12 */
+ {6, 0, 0, 0,}, /* 4: SDR25 */
+ {4, 0, 12, 0,}, /* 5: SDR50 */
+ {5, 4, 15, 0,}, /* 6: SDR104 */
+ {0}, /* 7: DDR50 */
+ {0}, /* 8: DDR52 */
+ {0}, /* 9: HS200 */
+ }
+};
+
static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
{
int ret;
@@ -66,6 +134,10 @@ static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
if (IS_ERR(priv->reg))
priv->reg = NULL;
+ priv->ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
+ if (priv->ctrl_id < 0)
+ priv->ctrl_id = 0;
+
host->priv = priv;
return 0;
}
@@ -144,7 +216,246 @@ static const struct dw_mci_drv_data hi6220_data = {
.execute_tuning = dw_mci_hi6220_execute_tuning,
};
+static void dw_mci_hs_set_timing(struct dw_mci *host, int timing,
+int smpl_phase)
+{
+ u32 drv_phase;
+ u32 smpl_dly;
+ u32 use_smpl_dly = 0;
+ u32 enable_shift = 0;
+ u32 reg_value;
+ int ctrl_id;
+ struct k3_priv *priv;
+
+ priv = host->priv;
+ ctrl_id = priv->ctrl_id;
+
+ drv_phase = hs_timing_cfg[ctrl_id][timing].drv_phase;
+ smpl_dly = hs_timing_cfg[ctrl_id][timing].smpl_dly;
+ if (smpl_phase == -1)
+ smpl_phase = (hs_timing_cfg[ctrl_id][timing].smpl_phase_max +
+hs_timing_cfg[ctrl_id][timing].smpl_phase_min) / 2;
+
+ switch (timing) {
+ case MMC_TIMING_UHS_SDR104:
+ if (smpl_phase >= USE_DLY_MIN_SMPL &&
+ smpl_phase <= USE_DLY_MAX_SMPL)
+ use_smpl_dly = 1;
+
Re: [PATCH 2/3] drm: Reorganize drm_pending_event to support future event types
On Wed, Jul 05, 2017 at 03:10:12PM -0700, Keith Packard wrote:
> Place drm_event_vblank in a new union that includes that and a bare
> drm_event structure. This will allow new members of that union to be
> added in the future without changing code related to the existing vbl
> event type.
>
> Assignments to the crtc_id field are now done when the event is
> allocated, rather than when delievered. This way, delivery doesn't
> need to have the crtc ID available.
>
> Signed-off-by: Keith Packard
A few nits below, but looks good otherwise.
-Daniel
> ---
> drivers/gpu/drm/drm_atomic.c | 7 ---
> drivers/gpu/drm/drm_plane.c | 2 +-
> drivers/gpu/drm/drm_vblank.c | 27 ---
> drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 4 ++--
> drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 4 ++--
> include/drm/drm_vblank.h | 8 +++-
> 6 files changed, 32 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index c0f336d23f9c..f569d7f03f3c 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1839,7 +1839,7 @@ int drm_atomic_debugfs_init(struct drm_minor *minor)
> */
>
> static struct drm_pending_vblank_event *create_vblank_event(
> - struct drm_device *dev, uint64_t user_data)
> + struct drm_device *dev, struct drm_crtc *crtc, uint64_t
> user_data)
Nit: Please also drop the dev argument, we have crtc->dev easily
available. That fits better into my long-term goal of getting rid of the
(dev, pipe) pairs everywhere in the vblank code and fully switching over
to drm_crtc *.
> {
> struct drm_pending_vblank_event *e = NULL;
>
> @@ -1849,7 +1849,8 @@ static struct drm_pending_vblank_event
> *create_vblank_event(
>
> e->event.base.type = DRM_EVENT_FLIP_COMPLETE;
> e->event.base.length = sizeof(e->event);
> - e->event.user_data = user_data;
> + e->event.vbl.crtc_id = crtc->base.id;
> + e->event.vbl.user_data = user_data;
>
> return e;
> }
> @@ -2052,7 +2053,7 @@ static int prepare_crtc_signaling(struct drm_device
> *dev,
> if (arg->flags & DRM_MODE_PAGE_FLIP_EVENT || fence_ptr) {
> struct drm_pending_vblank_event *e;
>
> - e = create_vblank_event(dev, arg->user_data);
> + e = create_vblank_event(dev, crtc, arg->user_data);
> if (!e)
> return -ENOMEM;
>
> diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
> index 5dc8c4350602..fe9f31285bc2 100644
> --- a/drivers/gpu/drm/drm_plane.c
> +++ b/drivers/gpu/drm/drm_plane.c
> @@ -918,7 +918,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
> }
> e->event.base.type = DRM_EVENT_FLIP_COMPLETE;
> e->event.base.length = sizeof(e->event);
> - e->event.user_data = page_flip->user_data;
> + e->event.vbl.user_data = page_flip->user_data;
> ret = drm_event_reserve_init(dev, file_priv, &e->base,
> &e->event.base);
> if (ret) {
> kfree(e);
> diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
> index f55f997c0b8f..9ae170857ef6 100644
> --- a/drivers/gpu/drm/drm_vblank.c
> +++ b/drivers/gpu/drm/drm_vblank.c
> @@ -807,13 +807,18 @@ static void send_vblank_event(struct drm_device *dev,
> struct drm_pending_vblank_event *e,
> u64 seq, struct timespec *now)
> {
> - e->event.sequence = seq;
> - e->event.tv_sec = now->tv_sec;
> - e->event.tv_usec = now->tv_nsec / 1000;
> -
> - trace_drm_vblank_event_delivered(e->base.file_priv, e->pipe,
> - e->event.sequence);
> -
> + switch (e->event.base.type) {
> + case DRM_EVENT_VBLANK:
> + case DRM_EVENT_FLIP_COMPLETE:
> + if (seq)
> + e->event.vbl.sequence = (u32) seq;
> + if (now) {
> + e->event.vbl.tv_sec = now->tv_sec;
> + e->event.vbl.tv_usec = now->tv_nsec / 1000;
> + }
> + break;
> + }
Not sure why this change? Also prep for the new, presumably extended
events? Seems at least slightly inconsistent with other paths, where we
still unconditionally fill it in.
> + trace_drm_vblank_event_delivered(e->base.file_priv, e->pipe, seq);
> drm_send_event_locked(dev, &e->base);
> }
>
> @@ -865,7 +870,6 @@ void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,
>
> e->pipe = pipe;
> e->sequence = drm_vblank_count(dev, pipe);
> - e->event.crtc_id = crtc->base.id;
> list_add_tail(&e->base.link, &dev->vblank_event_list);
> }
> EXPORT_SYMBOL(drm_crtc_arm_vblank_event);
> @@ -897,7 +901,6 @@ void drm_crtc_send_vblank_event(struct drm_crtc *crtc,
> now = get_drm_timestamp();
> }
> e->pipe = pipe;
Re: [PATCH 2/2] Staging: dgnc: I have fixed the changes in dgnc_neo.c This is a patch to the dgnc_neo.c warning udealy to usleep range Signed-off-by: Yash Omer
Hi, On Thu, Jul 6, 2017 at 3:49 AM, yash007 wrote: > From: Yash Omer Instead of resending the same thing every time, could you instead fix your commit message and send a v2? Also, where's patch 1 of 2? > > --- > drivers/staging/dgnc/dgnc_neo.c | 10 +- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c > index 1943e66..0034ebe 100644 > --- a/drivers/staging/dgnc/dgnc_neo.c > +++ b/drivers/staging/dgnc/dgnc_neo.c > @@ -1230,7 +1230,7 @@ static void neo_flush_uart_write(struct channel_t *ch) > */ > tmp = readb(&ch->ch_neo_uart->isr_fcr); > if (tmp & 4) > - udelay(10); > + usleep_range(10); > else > break; > } > @@ -1261,7 +1261,7 @@ static void neo_flush_uart_read(struct channel_t *ch) > */ > tmp = readb(&ch->ch_neo_uart->isr_fcr); > if (tmp & 2) > - udelay(10); > + usleep_range(10); > else > break; > } > @@ -1483,7 +1483,7 @@ static void neo_assert_modem_signals(struct channel_t > *ch) > neo_pci_posting_flush(ch->ch_bd); > > /* Give time for the UART to actually raise/drop the signals */ > - udelay(10); > + usleep_range(10); > } > > static void neo_send_start_character(struct channel_t *ch) > @@ -1495,7 +1495,7 @@ static void neo_send_start_character(struct channel_t > *ch) > ch->ch_xon_sends++; > writeb(ch->ch_startc, &ch->ch_neo_uart->txrx); > neo_pci_posting_flush(ch->ch_bd); > - udelay(10); > + usleep_range(10); > } > } > > @@ -1508,7 +1508,7 @@ static void neo_send_stop_character(struct channel_t > *ch) > ch->ch_xoff_sends++; > writeb(ch->ch_stopc, &ch->ch_neo_uart->txrx); > neo_pci_posting_flush(ch->ch_bd); > - udelay(10); > + usleep_range(10); > } > } > > -- > 2.1.4 >
Re: [PATCH v2 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
On 05.07.2017 18:29, Nicolas Ferre wrote:
> On 05/07/2017 at 17:23, Ludovic Desroches wrote:
>> On Mon, Jul 03, 2017 at 03:56:11PM +0300, Claudiu Beznea wrote:
>>> Add specific DTS file and bindings for sama5d27 SoM1 board.
>>>
>>> Signed-off-by: Claudiu Beznea
>>> Signed-off-by: Cristian Birsan
>>> ---
>>> arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178
>>> ++
>>> 1 file changed, 178 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>> b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>> new file mode 100644
>>> index 000..c3a1dc8
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
>>
>> [...]
>>
>>> +
>>> + i2c0: i2c@f8028000 {
>>> + dmas = <0>, <0>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_i2c0_default>;
>>> + i2c-sda-hold-time-ns = <350>;
>>> + status = "disabled";
>>> +
>>> + 24aa@50 {
>>> + compatible = "24mac602";
>>> + reg = <0x50>;
>>> + pagesize = <8>;
>>> + start-offset = /bits/ 8 <0xf8>;
>>
>> Are you sure about the offset? I thought it was 0xfa but maybe I am
>> wrong.
Indeed, it is 0xfa. I chose 0xf8 because at24 driver will truncate the
eeprom size at something that is power of 2 (I don't know the reason behind
this, maybe it is something historical, maybe it is something I don't get
it for the moment). If I would use 24mac402 (which EEPROM size should be
6 bytes but due to the truncation it will become of 4 bytes) and 0xfa as
starting offset I could read only 4 octets. Due to this I chose to use
24mac602 which length is 8 = 2^3 bytes, the reading will start from 0xf8
but the first 2 bytes will not be of interest.
Sorry that I forgot to mention this in the cover letter.
>
> Moreover, as the binding for this is not yet accepted I would advice to
> remove this part for now. It will be easier for synchronization with i2c
> eeprom.
Yes, I will remove this part form in the 3rd version.
Thanks,
Claudiu
>
> Best regards,
>
Re: [PATCH 2/2] rtc: stm32: add STM32H7 RTC support
Hi,
On 07/05/2017 11:37 PM, Alexandre Belloni wrote:
Hi,
This is mostly fine, even if I'm not too happy with the
s/ck_rtc/rtc_ck/.
This clock name has changed in datasheet between STM32F4/STM32F7 and
STM32H7, so, I'm not really happy too... But, as there is only one clock
on F4/F7, its name is not important for the end user. Now that pclk
appears, we need to distinguish the two clocks, and for the end user, it
is better if the clock names match the datasheet.
On 26/06/2017 at 11:51:29 +0200, Amelie Delaunay wrote:
- rtc->ck_rtc = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(rtc->ck_rtc)) {
- dev_err(&pdev->dev, "no ck_rtc clock");
- return PTR_ERR(rtc->ck_rtc);
+ match = of_match_device(stm32_rtc_of_match, &pdev->dev);
+ if (match && match->data)
+ rtc->data = (struct stm32_rtc_data *)match->data;
+ else
+ return -EINVAL;
This will never happen, you can remove that test.
OK, will be done in V2.
Thanks for the review,
Amelie
Re: [PATCH] mm: larger stack guard gap, between vmas
On Wed 05-07-17 08:36:45, Michal Hocko wrote: > On Tue 04-07-17 16:31:52, Linus Torvalds wrote: > > On Tue, Jul 4, 2017 at 4:01 PM, Ben Hutchings wrote: > > > > > > We have: > > > > > > bottom = 0xff803fff > > > sp = 0xb178 > > > > > > The relevant mappings are: > > > > > > ff7fc000-ff7fd000 rwxp 00:00 0 > > > fffdd000-e000 rw-p 00:00 0 > > > [stack] > > > > Ugh. So that stack is actually 8MB in size, but the alloca() is about > > to use up almost all of it, and there's only about 28kB left between > > "bottom" and that 'rwx' mapping. > > > > Still, that rwx mapping is interesting: it is a single page, and it > > really is almost exactly 8MB below the stack. > > > > In fact, the top of stack (at 0xe000) is *exactly* 8MB+4kB from > > the top of that odd one-page allocation (0xff7fd000). > > Very interesting! I would be really curious whether changing ulimit to > something bigger changes the picture. It's public holiday today here and I haven't read all new emails and I will be mostly offline today. I will catch up tomorrow. But before we go to more tricky workarounds. Could you double check that simply increasing the RLIMIT_STACK workarounds the problem here? Because if it does and other workarounds require some manual intervention then changing ulimit sounds like the least tricky one to me. -- Michal Hocko SUSE Labs
[PATCH] um: Correctly check for PTRACE_GETRESET/SETREGSET
When checking for PTRACE_GETRESET/SETREGSET, make sure that the correct header file is included. We need linux/ptrace.h which contains all ptrace UAPI related defines. Otherwise #if defined(PTRACE_GETRESET) is always false. Cc: Florian Fainelli Signed-off-by: Richard Weinberger --- arch/x86/um/user-offsets.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/um/user-offsets.c b/arch/x86/um/user-offsets.c index 8af0fb5d2780..ae4cd58c0c7a 100644 --- a/arch/x86/um/user-offsets.c +++ b/arch/x86/um/user-offsets.c @@ -5,7 +5,7 @@ #include #include #define __FRAME_OFFSETS -#include +#include #include #ifdef __i386__ -- 2.12.3
[PATCH 2/2] Staging: dgnc: I have fixed the changes in dgnc_neo.c This is a patch to the dgnc_neo.c warning udealy to usleep range Signed-off-by: Yash Omer
From: Yash Omer --- drivers/staging/dgnc/dgnc_neo.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c index 1943e66..0034ebe 100644 --- a/drivers/staging/dgnc/dgnc_neo.c +++ b/drivers/staging/dgnc/dgnc_neo.c @@ -1230,7 +1230,7 @@ static void neo_flush_uart_write(struct channel_t *ch) */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 4) - udelay(10); + usleep_range(10); else break; } @@ -1261,7 +1261,7 @@ static void neo_flush_uart_read(struct channel_t *ch) */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 2) - udelay(10); + usleep_range(10); else break; } @@ -1483,7 +1483,7 @@ static void neo_assert_modem_signals(struct channel_t *ch) neo_pci_posting_flush(ch->ch_bd); /* Give time for the UART to actually raise/drop the signals */ - udelay(10); + usleep_range(10); } static void neo_send_start_character(struct channel_t *ch) @@ -1495,7 +1495,7 @@ static void neo_send_start_character(struct channel_t *ch) ch->ch_xon_sends++; writeb(ch->ch_startc, &ch->ch_neo_uart->txrx); neo_pci_posting_flush(ch->ch_bd); - udelay(10); + usleep_range(10); } } @@ -1508,7 +1508,7 @@ static void neo_send_stop_character(struct channel_t *ch) ch->ch_xoff_sends++; writeb(ch->ch_stopc, &ch->ch_neo_uart->txrx); neo_pci_posting_flush(ch->ch_bd); - udelay(10); + usleep_range(10); } } -- 2.1.4
[PATCH 0/2] nvmem: rockchip-efuse: add support for rk3328-efuse
Add a new property to define eFuse size and add the necessary data for handling eFuse on the rk3328. Finley Xiao (2): nvmem: rockchip-efuse: parse 'rockchip,efuse-size' nvmem: rockchip-efuse: add support for rk3328-efuse .../devicetree/bindings/nvmem/rockchip-efuse.txt | 5 ++ drivers/nvmem/rockchip-efuse.c | 70 +- 2 files changed, 74 insertions(+), 1 deletion(-) -- 2.7.4
[PATCH 2/2] nvmem: rockchip-efuse: add support for rk3328-efuse
This adds the necessary data for handling eFuse on the rk3328.
Signed-off-by: Finley Xiao
---
.../devicetree/bindings/nvmem/rockchip-efuse.txt | 1 +
drivers/nvmem/rockchip-efuse.c | 66 ++
2 files changed, 67 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
index d206aa1..7a817c5 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -6,6 +6,7 @@ Required properties:
- "rockchip,rk3188-efuse" - for RK3188 SoCs.
- "rockchip,rk322x-efuse" - for RK322x SoCs.
- "rockchip,rk3288-efuse" - for RK3288 SoCs.
+ - "rockchip,rk3328-efuse" - for RK3328 SoCs.
- "rockchip,rk3399-efuse" - for RK3399 SoCs.
- reg: Should contain the registers location and exact eFuse size
- clocks: Should be the clock id of eFuse
diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
index 8e3e5d0..70c2d64 100644
--- a/drivers/nvmem/rockchip-efuse.c
+++ b/drivers/nvmem/rockchip-efuse.c
@@ -32,6 +32,14 @@
#define RK3288_STROBE BIT(1)
#define RK3288_CSB BIT(0)
+#define RK3328_SECURE_SIZES96
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_DOUT0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_AUTO_ENBBIT(0)
+#define RK3328_AUTO_RD BIT(1)
+
#define RK3399_A_SHIFT 16
#define RK3399_A_MASK 0x3ff
#define RK3399_NBYTES 4
@@ -92,6 +100,60 @@ static int rockchip_rk3288_efuse_read(void *context,
unsigned int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_efuse_chip *efuse = context;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value, status;
+ u8 *buf;
+ int ret, i = 0;
+
+ ret = clk_prepare_enable(efuse->clk);
+ if (ret < 0) {
+ dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
+ return ret;
+ }
+
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+ offset += RK3328_SECURE_SIZES;
+ addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
+ addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
+ addr_offset = offset % RK3399_NBYTES;
+ addr_len = addr_end - addr_start;
+
+ buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto nomem;
+ }
+
+ while (addr_len--) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ efuse->base + RK3328_AUTO_CTRL);
+ udelay(2);
+ status = readl(efuse->base + RK3328_INT_STATUS);
+ if (!(status & RK3328_INT_FINISH)) {
+ ret = -EIO;
+ goto err;
+ }
+ out_value = readl(efuse->base + RK3328_DOUT);
+ writel(RK3328_INT_FINISH, efuse->base + RK3328_INT_STATUS);
+
+ memcpy(&buf[i], &out_value, RK3399_NBYTES);
+ i += RK3399_NBYTES;
+ }
+
+ memcpy(val, buf + addr_offset, bytes);
+err:
+ kfree(buf);
+nomem:
+ clk_disable_unprepare(efuse->clk);
+
+ return ret;
+}
+
static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
void *val, size_t bytes)
{
@@ -178,6 +240,10 @@ static const struct of_device_id rockchip_efuse_match[] = {
.data = (void *)&rockchip_rk3288_efuse_read,
},
{
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (void *)&rockchip_rk3328_efuse_read,
+ },
+ {
.compatible = "rockchip,rk3399-efuse",
.data = (void *)&rockchip_rk3399_efuse_read,
},
--
2.7.4
[PATCH 1/2] nvmem: rockchip-efuse: parse 'rockchip,efuse-size'
The eFuse size is defined in property before, but the length of registers is not equal to the size on some platforms, so we add a new property to redefine it. Signed-off-by: Finley Xiao --- Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 4 drivers/nvmem/rockchip-efuse.c | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt index 194926f..d206aa1 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt +++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt @@ -11,6 +11,10 @@ Required properties: - clocks: Should be the clock id of eFuse - clock-names: Should be "pclk_efuse" +Optional properties: +- rockchip,efuse-size: Should be exact eFuse size in byte, the eFuse + size in property will be invalid if define this property. + Deprecated properties: - compatible: "rockchip,rockchip-efuse" Old efuse compatible value compatible to rk3066a, rk3188 and rk3288 diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c index a0d4ede..8e3e5d0 100644 --- a/drivers/nvmem/rockchip-efuse.c +++ b/drivers/nvmem/rockchip-efuse.c @@ -214,7 +214,9 @@ static int rockchip_efuse_probe(struct platform_device *pdev) return PTR_ERR(efuse->clk); efuse->dev = &pdev->dev; - econfig.size = resource_size(res); + if (of_property_read_u32(dev->of_node, "rockchip,efuse-size", +&econfig.size)) + econfig.size = resource_size(res); econfig.reg_read = match->data; econfig.priv = efuse; econfig.dev = efuse->dev; -- 2.7.4
[GIT PULL] bulk pin control changes for v4.13
Hi Linus Here is the big bulk of pin control changes for v4.13. The description of the details are on the signed tag as usual. Here is some administrativa: There are a few commits to MMC, PWM, fbdev and MTD for the jz4740 cleanup. These are ACKed by the subsystem maintainers. This change set also touches the jz4740 MIPS machine, and the patch submitter is maintaining that machine in arch/mips. I merged in v4.12-rc7 quite late. This was because we were reverting a patch in fixes, that then gets reimplemented by a new patch touching the same documentation file. Sorting out that conflict would just be a massive mess, so I merged in -rc7 and applied the new stuff on top. Then you will still get two conflicts in drivers/pinctrl/pinctrl-rockchip.c this is because there were last minute fixes after v4.12-rc7 for this driver. The conflicts are simply because of proximity in the raw text. It looks like this: <<< HEAD === * @irq_lock: bus lock for irq chip * @new_irqs: newly configured irqs which must be muxed as GPIOs in *irq_bus_sync_unlock() * @route_mask: bits describing the routing pins of per bank >>> d2ac9fe67277b411da9299a7cfdc2ae07d076050 The irq_lock and new_irqs were deleted and should go away, and route_mask was added so it should be kept. The same in the actual struct. That said: please pull it in, resolve that little snag and we should be clear to go! It was tested with the above resolution in linux-next. Yours, Linus Walleij The following changes since commit c0bc126f97fb929b3ae02c1c62322645d70eb408: Linux 4.12-rc7 (2017-06-25 18:30:05 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v4.13-1 for you to fetch changes up to 3fa53ec2ed885b0aec3f0472e3b4a8a6f1cd748c: pinctrl: samsung: Remove bogus irq_[un]mask from resource management (2017-06-30 15:51:42 +0200) This is the big bulk of pin control changes for the v4.13 series: Core: - The documentation is moved over to RST. - We now have agreed bindings for enabling input and output buffers without actually enabling input and/or output on a pin. We are chiseling out some details of pin control electronics. New drivers: - ZTE ZX - Renesas RZA1 - MIPS Ingenic JZ47xx: also switch over existing drivers in the tree to use this pin controller and consolidate earlier spread out code. - Microschip MCP23S08: this driver is migrated from the GPIO subsystem and totally rewritten to use proper pin control. All users are switched over. New subdrivers: - Renesas R8A7743 and R8A7745. - Allwinner Sunxi A83T R_PIO. - Marvell MVEBU Armada CP110 and AP806. - Intel Cannon Lake PCH. - Qualcomm IPQ8074. Notable improvements: - IRQ support on the Marvell MVEBU Armada 37xx. - Meson driver supports HDMI CEC, AO, I2S, SPDIF and PWM. - Rockchip driver now supports iomux-route switching for RK3228, RK3328 and RK3399. - Rockchip A10 and A20 are merged into a single driver. - STM32 has improved GPIO support. - Samsung Exynos drivers are split per ARMv7 and ARMv8. - Marvell MVEBU is converted to use regmap for register access. Maintenance: - Several Renesas SH-PFC refactorings and updates. - Serious code size cut for Mediatek MT7623. - Misc janitorial and MAINTAINERS fixes. Alexandre TORGUE (3): pinctrl: stm32: set pin to gpio input when used as interrupt pinctrl: stm32: Implement .get_direction gpio_chip callback pinctrl: stm32: remove useless check Arnd Bergmann (1): pinctrl: mcp23s08: improve I2C Kconfig dependency Arvind Yadav (1): pinctrl: freescale: imx7d: make of_device_ids const. Bjorn Andersson (1): MAINTAINERS: Add Qualcomm pinctrl drivers section Chen-Yu Tsai (3): pinctrl: sunxi: Fix SPDIF function name for A83T dt-bindings: pinctrl: sunxi: Add compatible string for A83T R_PIO pinctrl: sunxi: Add support for A83T R_PIO Christophe JAILLET (1): pinctrl: imx: Check for memory allocation failure Colin Ian King (1): pinctrl: rza1: make structures rza1_gpiochip_template and rza1_pinmux_ops static Dan Carpenter (1): pinctrl: ingenic: checking for NULL instead of IS_ERR() David Wu (4): pinctrl: rockchip: Add iomux-route switching support pinctrl: rockchip: Add iomux-route switching support for rk3228 pinctrl: rockchip: Add iomux-route switching support for rk3328 pinctrl: rockchip: Add iomux-route switching support for rk3399 Dong Aisheng (4): pinctrl: imx: fix debug message for SHARE_MUX_CONF_REG case pinctrl: imx: add generic pin config core support pinctrl: imx: add soc specific mux_mode mask and shift property pinctrl: DT: extend the pinmux property to support integers array Geert Uytterhoeven (3): pinctrl: sh-pfc: r8a7796: Add group for AVB MDIO and MII pins
Re: [tip:locking/urgent] locking/rwsem-spinlock: Fix EINTR branch in __down_write_common()
On Thu, Jul 06, 2017 at 09:28:58AM +0200, Ingo Molnar wrote: > It's more straightforward to just do the canonical sem->count >= 0 test that > we do > elsewhere in the rwsem-spinlock code. > > PeterZ, what's your preference? Leave it as is.. it doesn't matter (the 0 case shouldn't happen) and as you say >= 0 is what most other code does.
Re: [PATCH v2 4/8] pwm: Add STM32 LPTimer PWM driver
On Wed, Jun 21, 2017 at 04:30:11PM +0200, Fabrice Gasnier wrote:
> Add support for single PWM channel on Low-Power Timer, that can be
> found on some STM32 platforms.
>
> Signed-off-by: Fabrice Gasnier
> ---
> Changes in v2:
> - s/Low Power/Low-Power
> - update few comment lines
> ---
> drivers/pwm/Kconfig| 10 +++
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-stm32-lp.c | 216
> +
> 3 files changed, 227 insertions(+)
> create mode 100644 drivers/pwm/pwm-stm32-lp.c
>
> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
> index 313c107..7cb982b 100644
> --- a/drivers/pwm/Kconfig
> +++ b/drivers/pwm/Kconfig
> @@ -417,6 +417,16 @@ config PWM_STM32
> To compile this driver as a module, choose M here: the module
> will be called pwm-stm32.
>
> +config PWM_STM32_LP
> + tristate "STMicroelectronics STM32 PWM LP"
> + depends on MFD_STM32_LPTIMER || COMPILE_TEST
> + help
> + Generic PWM framework driver for STMicroelectronics STM32 SoCs
> + with Low-Power Timer (LPTIM).
> +
> + To compile this driver as a module, choose M here: the module
> + will be called pwm-stm32-lp.
> +
> config PWM_STMPE
> bool "STMPE expander PWM export"
> depends on MFD_STMPE
> diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
> index 93da1f7..a3a4bee 100644
> --- a/drivers/pwm/Makefile
> +++ b/drivers/pwm/Makefile
> @@ -40,6 +40,7 @@ obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
> obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
> obj-$(CONFIG_PWM_STI)+= pwm-sti.o
> obj-$(CONFIG_PWM_STM32) += pwm-stm32.o
> +obj-$(CONFIG_PWM_STM32_LP) += pwm-stm32-lp.o
> obj-$(CONFIG_PWM_STMPE) += pwm-stmpe.o
> obj-$(CONFIG_PWM_SUN4I) += pwm-sun4i.o
> obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
> diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> new file mode 100644
> index 000..eb997a8
> --- /dev/null
> +++ b/drivers/pwm/pwm-stm32-lp.c
> @@ -0,0 +1,216 @@
> +/*
> + * STM32 Low-Power Timer PWM driver
> + *
> + * Copyright (C) STMicroelectronics 2017
> + *
> + * Author: Gerald Baeza
> + *
> + * License terms: GNU General Public License (GPL), version 2
> + *
> + * Inspired by Gerald Baeza's pwm-stm32 driver
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +struct stm32_pwm_lp {
> + struct pwm_chip chip;
> + struct clk *clk;
> + struct regmap *regmap;
> +};
> +
> +static inline struct stm32_pwm_lp *to_stm32_pwm_lp(struct pwm_chip *chip)
> +{
> + return container_of(chip, struct stm32_pwm_lp, chip);
> +}
> +
> +static const u8 prescalers[] = {1, 2, 4, 8, 16, 32, 64, 128};
> +
> +static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
> + struct pwm_state *state)
> +{
> + struct stm32_pwm_lp *priv = to_stm32_pwm_lp(chip);
> + unsigned long long prd, div, dty;
> + struct pwm_state cstate;
> + u32 val, mask, cfgr, wavpol, presc = 0;
> + bool reenable = false;
> + int ret;
> +
> + pwm_get_state(pwm, &cstate);
> +
> + if (!state->enabled) {
> + if (cstate.enabled) {
> + /* Disable LP timer */
> + ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
> + if (ret)
> + return ret;
> + clk_disable(priv->clk);
> + }
> + return 0;
> + }
> +
> + /* Calculate the period and prescaler value */
> + div = (unsigned long long)clk_get_rate(priv->clk) * state->period;
> + do_div(div, NSEC_PER_SEC);
> + prd = div;
> + while (div > STM32_LPTIM_MAX_ARR) {
> + presc++;
> + if (presc >= ARRAY_SIZE(prescalers)) {
> + dev_err(priv->chip.dev, "max prescaler exceeded\n");
> + return -EINVAL;
> + }
> + div = prd;
> + do_div(div, prescalers[presc]);
> + }
> + prd = div;
> +
> + /* Calculate the duty cycle */
> + dty = prd * state->duty_cycle;
> + do_div(dty, state->period);
> +
> + wavpol = FIELD_PREP(STM32_LPTIM_WAVPOL, state->polarity);
> +
> + if (!cstate.enabled) {
> + ret = clk_enable(priv->clk);
> + if (ret)
> + return ret;
> + }
Why do you need the checks here? Clock enabled are reference counted, so
you could do the clk_enable() unconditionally.
Speaking of which, I don't see a clk_prepare() anywhere. Doesn't the clk
core warn about clk_enable() being called on a clock that's not been
prepared?
> +
> + ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr);
> + if (ret)
> + goto err;
> +
> + if ((wavpol != FIELD_GET(STM32_LPTIM_WAVPOL, cfgr)) ||
This looks wrong to me. Looking at the macro definitions, FIELD_PREP()
will store the shifte
Re: [PATCH 1/2] genirq: Get the fwnode back for irqchips being probed via ACPI namespace
On 06/07/17 05:35, Hanjun Guo wrote: > From: Hanjun Guo > > commit d59f6617eef0 (genirq: Allow fwnode to carry name information only) > forgot to do "domain->fwnode = fwnode;" for irqchips being probed via > ACPI namesapce (DSDT/SSDT), that will break platforms with irqchip such > as mbigen or qcom irq combiner, set the fwnode back to fix the issue. > > Reported-by: John Garry > Signed-off-by: Hanjun Guo > --- > kernel/irq/irqdomain.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c > index 14fe862..1bc38fa 100644 > --- a/kernel/irq/irqdomain.c > +++ b/kernel/irq/irqdomain.c > @@ -151,7 +151,6 @@ struct irq_domain *__irq_domain_add(struct fwnode_handle > *fwnode, int size, > domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; > break; > default: > - domain->fwnode = fwnode; > domain->name = fwid->name; > break; > } > @@ -172,7 +171,6 @@ struct irq_domain *__irq_domain_add(struct fwnode_handle > *fwnode, int size, > strreplace(name, '/', ':'); > > domain->name = name; > - domain->fwnode = fwnode; > domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; > } > > @@ -196,6 +194,7 @@ struct irq_domain *__irq_domain_add(struct fwnode_handle > *fwnode, int size, > INIT_RADIX_TREE(&domain->revmap_tree, GFP_KERNEL); > domain->ops = ops; > domain->host_data = host_data; > + domain->fwnode = fwnode; > domain->hwirq_max = hwirq_max; > domain->revmap_size = size; > domain->revmap_direct_max_irq = direct_max; > This doesn't seem right. Why is is_fwnode_irqchip() returning false when presented with an irqchip probed via the ACPI namespace? That's what you should consider fixing instead of moving that code around. Thanks, M. -- Jazz is not dead. It just smells funny...
Re: [PATCH v2] KVM: arm/arm64: Handle hva aging while destroying the vm
On Thu, Jul 06, 2017 at 09:07:49AM +0200, Alexander Graf wrote:
>
>
> On 05.07.17 10:57, Suzuki K Poulose wrote:
> >Hi Alex,
> >
> >On Wed, Jul 05, 2017 at 08:20:31AM +0200, Alexander Graf wrote:
> >>The kvm_age_hva callback may be called all the way concurrently while
> >>kvm_mmu_notifier_release() is running.
> >>
> >>The release function sets kvm->arch.pgd = NULL which the aging function
> >>however implicitly relies on in stage2_get_pud(). That means they can
> >>race and the aging function may dereference a NULL pgd pointer.
> >>
> >>This patch adds a check for that case, so that we leave the aging
> >>function silently.
> >>
> >>Cc: sta...@vger.kernel.org
> >>Fixes: 293f29363 ("kvm-arm: Unmap shadow pagetables properly")
> >>Signed-off-by: Alexander Graf
> >>
> >>---
> >>
> >>v1 -> v2:
> >>
> >> - Fix commit message
> >> - Add Fixes and stable tags
> >>---
> >> virt/kvm/arm/mmu.c | 4
> >> 1 file changed, 4 insertions(+)
> >>
> >>diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
> >>index f2d5b6c..227931f 100644
> >>--- a/virt/kvm/arm/mmu.c
> >>+++ b/virt/kvm/arm/mmu.c
> >>@@ -861,6 +861,10 @@ static pud_t *stage2_get_pud(struct kvm *kvm, struct
> >>kvm_mmu_memory_cache *cache
> >>pgd_t *pgd;
> >>pud_t *pud;
> >>+ /* Do we clash with kvm_free_stage2_pgd()? */
> >>+ if (!kvm->arch.pgd)
> >>+ return NULL;
> >>+
> >
> >I think this check should be moved up in the chain. We call kvm_age_hva(),
> >with
> >the kvm->mmu_lock held and we don't release it till we reach here. So,
> >ideally,
> >if we find the PGD is null when we reach kvm_age_hva(), we could simply
> >return
> >there, like we do for other call backs from the KVM mmu_notifier.
>
> That probably works too - I'm not sure which version is more
> consistent as well as more maintainable in the long run. I'll leave
> the call here to Christoffer.
>
Let's look at the callers to stage2_get_pmd, which is the only caller of
stage2_get_pud, where the problem was observed:
user_mem_abort
-> stage2_set_pmd_huge
-> stage2_get_pmd
user_mem_abort
-> stage2_set_pte
-> stage2_get_pmd
handle_access_fault
-> stage2_get_pmd
For the above three functions, pgd cannot ever be NULL, because this is
running in the context of a VCPU thread, which means the reference on
the VM fd must not reach zero, so no need to call that here.
kvm_set_spte_handler
-> stage2_set_pte
-> stage2_get_pmd
This is called from kvm_set_spte_hva, which is one of the MMU notifiers,
so it can race similarly kvm_age_hva and kvm_test_age_hva, but it
already checks for !kvm->arch.pgd.
kvm_phys_addr_ioremap
-> stage2_set_pte
-> stage2_get_pmd
This is called from two places: (1) The VGIC code (as part of
vgic_v2_map_resources) and can only be called in the context of running
a VCPU, so the pgd cannot be null by virtue of the same argument as for
user_mem_abort. (2) kvm_arch_prepare_memory_region calls
kvm_phys_addr_ioremap, which is a VM ioctl so similarly, I cannot see
how the VM can be in the middle of being freed while handling ioctls on
the fd. Therefore, following the same argument, this should be safe as
well.
kvm_age_hva_handler and kvm_test_age_hva_handler
-> stage2_get_pmd
Handled by the patch proposed by Suzuki.
What does all that tell us? First, it should give us some comfort that we
don't have more races of this kind. Second, it teels us that there are
a number of different and not-obvious call paths to stage2_pet_pud,
which could be an argument to simply check the pgd whenever it's called,
despite the minor runtime overhead. On the other hand, the check itself
is only valid knowing that we synchronize against kvm_free_stage2_pgd
using the kvm->mmu_lock() and understanding that this only happens when
mmu notifiers call into the KVM MMU code outside the context of the VM.
The last consideration is the winning argument for me to put the check
in kvm_age_hva_handler and kvm_test_age_hva_handler, but I think it's
important that we document why it's only these three high-level callers
(incl. kvm_set_spte_handler) that need the check, either in the code or
in the commit message.
Marc, thoughts?
Thanks,
-Christoffer
Re: [PATCH 1/3] drm: Widen vblank count to 64 bits. Change vblank time precision to ns
On 06/07/17 07:10 AM, Keith Packard wrote:
> This modifies the datatypes used by the vblank code to provide both 64
> bits of vblank count and to increase the resolution of the vblank
> timestamp from microseconds to nanoseconds.
>
> The driver interfaces have also been changed to return 64-bits of
> vblank count; fortunately all of the code necessary to widen that value
> was already included to handle devices returning fewer than 32-bits.
>
> This will provide the necessary datatypes for the Vulkan API.
>
> Signed-off-by: Keith Packard
[...]
> @@ -1492,9 +1515,11 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
>
> switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) {
> case _DRM_VBLANK_RELATIVE:
> - vblwait->request.sequence += seq;
> + req_seq = seq + vblwait->request.sequence;
> vblwait->request.type &= ~_DRM_VBLANK_RELATIVE;
Subtle breakage here: vblwait->request.sequence must still get updated
for _DRM_VBLANK_RELATIVE, in case we're interrupted by a signal.
> @@ -317,6 +317,9 @@ int via_driver_irq_postinstall(struct drm_device *dev)
> if (!dev_priv)
> return -EINVAL;
>
> + if (dev->driver->get_vblank_counter)
> + dev->max_vblank_count = 0x;
What's the purpose of this? All drivers providing get_vblank_counter
should already initialize max_vblank_count correctly.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
[PATCH] use macro SHIFT instead of hard code 32
32 is already defined as macro SHIFT, so it's better
to use macro SHIFT
Signed-off-by: Ganesh Mahendran
---
Documentation/scheduler/sched-pelt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/scheduler/sched-pelt.c
b/Documentation/scheduler/sched-pelt.c
index e421913..726cb31 100644
--- a/Documentation/scheduler/sched-pelt.c
+++ b/Documentation/scheduler/sched-pelt.c
@@ -22,7 +22,7 @@ void calc_runnable_avg_yN_inv(void)
printf("static const u32 runnable_avg_yN_inv[] = {");
for (i = 0; i < HALFLIFE; i++) {
- x = ((1UL<<32)-1)*pow(y, i);
+ x = ((1UL< -1)
--
1.9.1
Re: [PATCH] irqchip/mips-gic: Add missing shared interrupt handler
On Thu, 6 Jul 2017, jrj...@gmail.com wrote:
> From: Jun-Ru Chang
>
> Set handle_level_irq handler for shared interrupts to avoid hanging with
> "unexpected IRQ" messages display.
>
> Change-Id: I6b9c0e8a13b28361f2daf89609f48cbdd397eb36
This information is entirely useless. Instead of that please provide the
information which commit introduced the problem in the form of a Fixes tag.
Fixes: 0123456789AB ("irqchip/mips-gic: Make stuff different")
That information lets us identify the scope of the fix, i.e. whether it
fixes something which was introduced in the current merge window or whether
this is a fix which needs to be backported into stable.
Thanks,
tglx
Re: [PATCH 0/5 v4] Fix sp5100_tco watchdog driver regression
Hi, ping for the series. Adding Greg Kroah-Hartman to the cc: list, both for the USB core and stable series maintainership. 2017-06-22 15:21 keltezéssel, Zoltán Böszörményi írta: This patch series fixes a regression introduced by: commit 2fee61d22e606fc99ade9079fda15fdee83ec33e Author: Christian Fetzer Date: Thu Nov 19 20:13:48 2015 +0100 i2c: piix4: Add support for multiplexed main adapter in SB800 The regression caused sp5100_tco fail to load: sp5100_tco: SP5100/SB800 TCO WatchDog Timer Driver v0.05 sp5100_tco: PCI Vendor ID: 0x1002, Device ID: 0x4385, Revision ID: 0x42 sp5100_tco: I/O address 0x0cd6 already in use Notable bugzilla links about this issue: https://bugzilla.kernel.org/show_bug.cgi?id=170741 https://bugzilla.redhat.com/show_bug.cgi?id=1369269 https://bugzilla.redhat.com/show_bug.cgi?id=1406844 The previous two versions of this patch series introduced a common mutex to synchronize access to the I/O port pair 0xcd6 / 0xcd7 used by the AMD SB800 USB PCI quirk code and the i2c-piix and sp5100_tco drivers. The common mutex was criticized because it introduces an inter-dependency between drivers. This approach modifies the request_muxed_region() semantics and modifies the possible use cases. The first patch in the series adds a new IORESOURCE_ALLOCATED flag that alloc_resource() sets and free_resource() considers. The core of __request_region() is factored out into a new function that doesn't allocate. With this change, drivers can use the pre-existing DEFINE_RES_IO_NAMED() static initialized macro to declare struct resource statically (e.g. on the stack) and pass the address of it to the new __request_declared_region() function. A new macro called request_declared_muxed_region() was added to exploit this functionality. Because of the new IORESOURCE_ALLOCATED resource flag, release_region() can still be called with the old interface (the port region start and end values) and it won't attempt to free a non-allocated resource. This eliminated one failure case that can come from allocation errors. The second patch modifies the behaviour of IORESOURCE_MUXED, a.k.a. the request_*muxed_region() macros. When these macros are called, the caller goes to sleep when there is any conflicting regions, even if the conflicting region did not use the IORESOURCE_MUXED flag. The kernel logs this inconsistent flag usage with KERN_ERR. This change eliminates the second failure case for IORESOURCE_MUXED and request_muxed_region() can be used like mutex_lock(), i.e. it returns only in case it could successfully request the region. The last three patches adds proper synchronization between the USB PCI quirks code and the i2c-piix and sp5100_tco drivers. The result is that the sp5100_tco driver can load and works again: sp5100_tco: SP5100/SB800 TCO WatchDog Timer Driver v0.05 sp5100_tco: PCI Vendor ID: 0x1002, Device ID: 0x4385, Revision ID: 0x42 sp5100_tco: Using 0xfed80b00 for watchdog MMIO address sp5100_tco: Last reboot was not triggered by watchdog. sp5100_tco: initialized (0xba2f4192db00). heartbeat=60 sec (nowayout=0) Signed-off-by: Zoltán Böszörményi --- drivers/i2c/busses/i2c-piix4.c | 41 - drivers/usb/host/pci-quirks.c | 4 drivers/watchdog/sp5100_tco.c | 28 + include/linux/ioport.h | 14 + kernel/resource.c | 46 ++ 5 files changed, 88 insertions(+), 45 deletions(-) The synchronized access to the SB800 I/O ports seems to also have made a rare "disabled by hub (EMI?), re-enabling..." report from the kernel disappear. Can someone review the series? Thanks in advance, Zoltán Böszörményi
Re: [PATCH 3/3] drm: Add CRTC_GET_SEQUENCE and CRTC_QUEUE_SEQUENCE ioctls
On Wed, Jul 05, 2017 at 03:10:13PM -0700, Keith Packard wrote:
> These provide crtc-id based functions instead of pipe-number, while
> also offering higher resolution time (ns) and wider frame count (64)
> as required by the Vulkan API.
>
> Signed-off-by: Keith Packard
I very much like this since the old ioctl really is a rather bad horror
show. And since it's tied in with ums drivers everything is complicated.
\o/ for much cleaner ioctls.
Bunch of comments below, but looks good overall.
-Daniel
> ---
> drivers/gpu/drm/drm_internal.h | 6 ++
> drivers/gpu/drm/drm_ioctl.c| 2 +
> drivers/gpu/drm/drm_vblank.c | 148
> +
> include/drm/drm_vblank.h | 1 +
> include/uapi/drm/drm.h | 32 +
> 5 files changed, 189 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
> index 5cecc974d2f9..b68a193b7907 100644
> --- a/drivers/gpu/drm/drm_internal.h
> +++ b/drivers/gpu/drm/drm_internal.h
> @@ -65,6 +65,12 @@ int drm_legacy_irq_control(struct drm_device *dev, void
> *data,
> int drm_legacy_modeset_ctl(struct drm_device *dev, void *data,
> struct drm_file *file_priv);
>
> +int drm_crtc_get_sequence_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *filp);
> +
> +int drm_crtc_queue_sequence_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *filp);
> +
> /* drm_auth.c */
> int drm_getmagic(struct drm_device *dev, void *data,
>struct drm_file *file_priv);
> diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
> index f1e568176da9..63016cf3e224 100644
> --- a/drivers/gpu/drm/drm_ioctl.c
> +++ b/drivers/gpu/drm/drm_ioctl.c
> @@ -657,6 +657,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
> DRM_UNLOCKED|DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF(DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE,
> drm_syncobj_fd_to_handle_ioctl,
> DRM_UNLOCKED|DRM_RENDER_ALLOW),
> + DRM_IOCTL_DEF(DRM_IOCTL_CRTC_GET_SEQUENCE, drm_crtc_get_sequence_ioctl,
> DRM_UNLOCKED),
> + DRM_IOCTL_DEF(DRM_IOCTL_CRTC_QUEUE_SEQUENCE,
> drm_crtc_queue_sequence_ioctl, DRM_UNLOCKED),
I started a discussion a while back whether these should be restricted to
DRM_MASTER (i.e. the modeset resource owner) or available to everyone.
Since it's read-only I guess we can keep it accessible to everyone, but it
has a bit the problem that client app developers see this, think it does
what it does and then use it to schedule frames without asking the
compositor. Which sometimes even works, but isn't really proper design.
The reasons seems to be that on X11 there's no EGL extension for accurate
timing frame updates (DRI2/3 can do it ofc, and glx exposes it, but glx is
uncool or something like that).
> };
>
> #define DRM_CORE_IOCTL_COUNT ARRAY_SIZE( drm_ioctls )
> diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
> index 9ae170857ef6..93004b1bf84c 100644
> --- a/drivers/gpu/drm/drm_vblank.c
> +++ b/drivers/gpu/drm/drm_vblank.c
> @@ -817,6 +817,12 @@ static void send_vblank_event(struct drm_device *dev,
> e->event.vbl.tv_usec = now->tv_nsec / 1000;
> }
> break;
> + case DRM_EVENT_CRTC_SEQUENCE:
> + if (seq)
> + e->event.seq.sequence = seq;
> + if (now)
> + e->event.seq.time_ns = timespec_to_ns(now);
> + break;
> }
> trace_drm_vblank_event_delivered(e->base.file_priv, e->pipe, seq);
> drm_send_event_locked(dev, &e->base);
> @@ -1516,6 +1522,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
> DRM_DEBUG("crtc %d failed to acquire vblank counter, %d\n",
> pipe, ret);
> return ret;
> }
> +
> seq = drm_vblank_count(dev, pipe);
>
> switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) {
> @@ -1676,3 +1683,144 @@ bool drm_crtc_handle_vblank(struct drm_crtc *crtc)
> return drm_handle_vblank(crtc->dev, drm_crtc_index(crtc));
> }
> EXPORT_SYMBOL(drm_crtc_handle_vblank);
> +
> +/*
> + * Get crtc VBLANK count.
> + *
> + * \param dev DRM device
> + * \param data user arguement, pointing to a drm_crtc_get_sequence structure.
> + * \param file_priv drm file private for the user's open file descriptor
> + */
Since this stuff isn't parsed by kerneldoc I tend to just free-form ioctl
comments completely. Someday maybe someone even gets around to doing
proper uabi documentation :-) Just an aside.
> +
> +int drm_crtc_get_sequence_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv)
> +{
> + struct drm_crtc *crtc;
> + int pipe;
> + struct drm_crtc_get_sequence *get_seq = data;
> + struct timespec now;
> +
You need a DRIVER_MODESET check here or the drm_crtc_find will oops. Same
below.
>
[PATCH v2] mwifiex: uninit wakeup info in the error handling
We inited wakeup info at the beginning of mwifiex_add_card, so we need
to uninit it in the error handling.
It's much the same as what we did in:
36908c4 mwifiex: uninit wakeup info when removing device
Signed-off-by: Jeffy Chen
---
Changes in v2:
Uninit wakeup when _mwifiex_fw_dpc failed too.
drivers/net/wireless/marvell/mwifiex/main.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/marvell/mwifiex/main.c
b/drivers/net/wireless/marvell/mwifiex/main.c
index f2600b8..097a899 100644
--- a/drivers/net/wireless/marvell/mwifiex/main.c
+++ b/drivers/net/wireless/marvell/mwifiex/main.c
@@ -665,8 +665,11 @@ static int _mwifiex_fw_dpc(const struct firmware
*firmware, void *context)
release_firmware(adapter->firmware);
adapter->firmware = NULL;
}
- if (init_failed)
+ if (init_failed) {
+ if (adapter->irq_wakeup >= 0)
+ device_init_wakeup(adapter->dev, false);
mwifiex_free_adapter(adapter);
+ }
/* Tell all current and future waiters we're finished */
complete_all(fw_done);
@@ -1655,6 +1658,8 @@ mwifiex_add_card(void *card, struct completion *fw_done,
mwifiex_shutdown_drv(adapter);
}
err_kmalloc:
+ if (adapter->irq_wakeup >= 0)
+ device_init_wakeup(adapter->dev, false);
mwifiex_free_adapter(adapter);
err_init_sw:
--
2.1.4
Re: [PATCH 06/14] bpf: Implement show_options
On 07/05/2017 05:24 PM, David Howells wrote: Implement the show_options superblock op for bpf as part of a bid to get rid of s_options and generic_show_options() to make it easier to implement a context-based mount where the mount options can be passed individually over a file descriptor. Signed-off-by: David Howells cc: Alexei Starovoitov cc: Daniel Borkmann cc: net...@vger.kernel.org Acked-by: Daniel Borkmann
Re: [PATCH v2 0/7] [PATCH v2 0/7] Add support of OV9655 camera
Hi Sylwester, Do you have the possibility to check for non-regression of this patchset on 9650/52 camera ? Best regards, Hugues. On 07/03/2017 11:16 AM, Hugues Fruchet wrote: > This patchset enables OV9655 camera support. > > OV9655 support has been tested using STM32F4DIS-CAM extension board > plugged on connector P1 of STM32F746G-DISCO board. > Due to lack of OV9650/52 hardware support, the modified related code > could not have been checked for non-regression. > > First patches upgrade current support of OV9650/52 to prepare then > introduction of OV9655 variant patch. > Because of OV9655 register set slightly different from OV9650/9652, > not all of the driver features are supported (controls). Supported > resolutions are limited to VGA, QVGA, QQVGA. > Supported format is limited to RGB565. > Controls are limited to color bar test pattern for test purpose. > > OV9655 initial support is based on a driver written by H. Nikolaus Schaller > [1]. > OV9655 registers sequences come from STM32CubeF7 embedded software [2]. > > [1] > http://git.goldelico.com/?p=gta04-kernel.git;a=shortlog;h=refs/heads/work/hns/video/ov9655 > [2] > https://developer.mbed.org/teams/ST/code/BSP_DISCO_F746NG/file/e1d9da7fe856/Drivers/BSP/Components/ov9655/ov9655.c > > === > = history = > === > version 2: >- Remove some unneeded semicolons (kbuild test robot): >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114616.html >- Remove patch [media] ov9650: select the nearest higher resolution: > it is up to the application to find the best matching resolution > using ENUM_FRAMESIZES/S_FMT/S_SELECTION (S_CROP), see >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114667.html >- dt-bindings: Fix remarks from Rob Herring about polarity: >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114705.html >- dt-bindings: Add optional regulators avdd, dvdd, dovdd: >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114785.html >- fix missing semicolons in if condition: >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114611.html >- move ov965x_pixfmt relocation in right patch: >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114849.html >- revisit OV965x renaming to ov965x for device id names and DT compatible > strings, > drop of_device_id .data device identification >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114635.html >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114738.html >- Add analog power supply and clock gating, needed for GTA04 platform: >http://www.mail-archive.com/linux-media@vger.kernel.org/msg114519.html > > version 1: >- Initial submission. > > H. Nikolaus Schaller (1): >DT bindings: add bindings for ov965x camera module > > Hugues Fruchet (6): >[media] ov9650: switch i2c device id to lower case >[media] ov9650: add device tree support >[media] ov9650: use write_array() for resolution sequences >[media] ov9650: add multiple variant support >[media] ov9650: add support of OV9655 variant >[media] ov9650: add analog power supply and clock gating > > .../devicetree/bindings/media/i2c/ov965x.txt | 45 ++ > drivers/media/i2c/Kconfig | 6 +- > drivers/media/i2c/ov9650.c | 816 > + > 3 files changed, 736 insertions(+), 131 deletions(-) > create mode 100644 Documentation/devicetree/bindings/media/i2c/ov965x.txt >
Re: [PATCH v2 2/4] pwm-backlight: add support for pwm-delay-us property
On Fri, Jun 30, 2017 at 01:21:07PM +0200, Enric Balletbo i Serra wrote:
> From: huang lin
>
> Some panels (i.e. N116BGE-L41), in their power sequence specifications,
> request a delay between set the PWM signal and enable the backlight and
> between clear the PWM signal and disable the backlight. Add support for
> the new pwm-delay-us property to meet the timing.
>
> Note that this patch inverts current sequence. Before this patch the
> enable signal was set before the PWM signal and vice-versa on power off.
>
> I assumed that this sequence was wrong, at least it is on different panel
> datasheets that I checked, so I inverted the sequence to follow:
>
> On power on, set the PWM signal, wait, and set the LED_EN signal.
> On power off, clear the LED_EN signal, wait, and stop the PWM signal.
I think this should be two separate patches to make it easier to revert
the inverted sequence should it prove to regress on other panels.
Two more comments below.
> Signed-off-by: huang lin
> Signed-off-by: Enric Balletbo i Serra
> ---
> Changes since v1:
> - As suggested by Daniel Thompson
>- Do not assume power-on delay and power-off delay will be the same
> - Move the check of dt property to the parse dt function.
>
> v1: https://lkml.org/lkml/2017/6/28/219
>
> drivers/video/backlight/pwm_bl.c | 24
> include/linux/pwm_backlight.h| 1 +
> 2 files changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/backlight/pwm_bl.c
> b/drivers/video/backlight/pwm_bl.c
> index 002f1ce..0f5470e 100644
> --- a/drivers/video/backlight/pwm_bl.c
> +++ b/drivers/video/backlight/pwm_bl.c
> @@ -10,6 +10,7 @@
> * published by the Free Software Foundation.
> */
>
> +#include
> #include
> #include
> #include
> @@ -35,6 +36,7 @@ struct pwm_bl_data {
> struct gpio_desc*enable_gpio;
> unsigned intscale;
> boollegacy;
> + unsigned intpwm_delay[2];
> int (*notify)(struct device *,
> int brightness);
> void(*notify_after)(struct device *,
> @@ -54,10 +56,14 @@ static void pwm_backlight_power_on(struct pwm_bl_data
> *pb, int brightness)
> if (err < 0)
> dev_err(pb->dev, "failed to enable power supply\n");
>
> + pwm_enable(pb->pwm);
> +
> + if (pb->pwm_delay[0])
> + usleep_range(pb->pwm_delay[0], pb->pwm_delay[0] + 2000);
2000 us is kind of arbitrary. What if pwm_delay[0] is on the order of 20
us? Making the delay 2 ms longer (in the worst case) seems somewhat
excessive. Why not something like:
usleep_range(pb->pwm_delay[0], pb->pwm_delay[0] * 2);
?
> +
> if (pb->enable_gpio)
> gpiod_set_value_cansleep(pb->enable_gpio, 1);
>
> - pwm_enable(pb->pwm);
> pb->enabled = true;
> }
>
> @@ -66,12 +72,15 @@ static void pwm_backlight_power_off(struct pwm_bl_data
> *pb)
> if (!pb->enabled)
> return;
>
> - pwm_config(pb->pwm, 0, pb->period);
> - pwm_disable(pb->pwm);
> -
> if (pb->enable_gpio)
> gpiod_set_value_cansleep(pb->enable_gpio, 0);
>
> + if (pb->pwm_delay[1])
> + usleep_range(pb->pwm_delay[1], pb->pwm_delay[1] + 2000);
> +
> + pwm_config(pb->pwm, 0, pb->period);
> + pwm_disable(pb->pwm);
> +
> regulator_disable(pb->power_supply);
> pb->enabled = false;
> }
> @@ -174,6 +183,12 @@ static int pwm_backlight_parse_dt(struct device *dev,
> data->max_brightness--;
> }
>
> + /* read pwm to enable pre/post delays from DT property */
This comment is confusing. This isn't reading anything from the PWM.
Thierry
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Re: [PATCH 2/7] rwsem-spinlock: Add killable versions of rwsem_down_read_failed()
On Mon, Jun 19, 2017 at 09:02:26PM +0300, Kirill Tkhai wrote: > Subject: [PATCH 2/7] rwsem-spinlock: Add killable versions of > rwsem_down_read_failed() > kernel/locking/rwsem-xadd.c | 33 ++--- Fixed that subject for your ;-)
Re: [PATCH 2/2] mmc: sdhci-of-at91: set clocks and presets after resume from deepest PM
On 07/05/2017 09:45 AM, Quentin Schulz wrote:
> Better with the link.
>
> On 05/07/2017 08:23, Quentin Schulz wrote:
>> Hi Adrian and Ludovic,
>>
>> On 20/06/2017 11:49, Ludovic Desroches wrote:
>>> On Tue, Jun 20, 2017 at 10:07:06AM +0200, Quentin Schulz wrote:
Hi Adrian,
On 20/06/2017 09:39, Adrian Hunter wrote:
> On 16/06/17 10:29, Quentin Schulz wrote:
>> This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2
>> SoC's SDHCI controller.
>>
>> When resuming from deepest state, it is required to restore preset
>> registers as the registers are lost since VDD core has been shut down
>> when entering deepest state on the SAMA5D2. The clocks need to be
>> reconfigured as well.
>>
>> The other registers and init process are taken care of by the SDHCI
>> core.
>>
>> Signed-off-by: Quentin Schulz
>> ---
>> drivers/mmc/host/sdhci-of-at91.c | 34 --
>> 1 file changed, 32 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-of-at91.c
>> b/drivers/mmc/host/sdhci-of-at91.c
>> index fb8c6011f13d..300513fc1068 100644
>> --- a/drivers/mmc/host/sdhci-of-at91.c
>> +++ b/drivers/mmc/host/sdhci-of-at91.c
>> @@ -207,6 +207,37 @@ static int sdhci_at91_set_clks_presets(struct
>> device *dev)
>> }
>>
>> #ifdef CONFIG_PM
>
> Should be CONFIG_PM_SLEEP for suspend / resume callbacks.
>
So I let this CONFIG_PM around the runtime_suspend/resume but put
another CONFIG_PM_SLEEP around the suspend/resume functions?
>> +static int sdhci_at91_suspend(struct device *dev)
>> +{
>> +struct sdhci_host *host = dev_get_drvdata(dev);
>> +struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>> +struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host);
>> +int ret;
>> +
>> +ret = sdhci_suspend_host(host);
>> +
>> +if (host->runtime_suspended)
>> +return ret;
>
> Suspending while runtime suspended seems like a bad idea. Have you
> considered just adding sdhci_at91_set_clks_presets() to
> sdhci_at91_runtime_resume()?
>
Adding sdhci_at91_set_clks_presets() to runtime_resume() seems a bad
idea as well. You don't need to recompute the clock rate, set it and set
the presets registers each time you do a runtime_resume. As the
runtime_pm of sdhci has a quite aggressive policy of activation, this
seems like a bad idea on the optimization side.
What is the runtime resume time with and without sdhci_at91_set_clks_presets()?
>>>
>>> So maybe increment/decrement the device's usage counter. It should be
>>> safer.
>>>
>>
>> From what I've understood from the runtime_pm documentation[1], it seems
>> that there is no need in my case to test if the system has been runtime
>> suspended before being suspended. So I think we can safely remove the
>> test and leave the rest as is.
>>
>> My understanding is the following:
>> If the system is not runtime suspended before doing suspend, then it
>> just does suspend and then resume.
>> => enable and disable clocks are called once each so it is balanced.
>>
>> If the system is already runtime suspended when suspending, the resume
>> will be called and once the device will be used, the runtime resume will
>> be called.
>> => enable and disable clocks are called twice each (once in runtime and
>> system suspend/resume) so it is balanced.
>>
>> A few quick tests on my sama5d2_xplained seem to be validating those
>> hypothesis.
>>
>> Do we agree on removing the `if (host->runtime_suspended)`?
>>
>
> [1]
> http://elixir.free-electrons.com/linux/latest/source/Documentation/power/runtime_pm.txt#L613
In the future we may want to rationalize sdhci pm functions or make other
changes. That means they must be used correctly. In particular, they must
not be interleaved or nested. i.e. it is not acceptable to call
sdhci_suspend_host() in between calls to sdhci_runtime_suspend_host() and
sdhci_runtime_resume_host().
Also use pm_runtime_suspended() not host->runtime_suspended.
>
>> Thanks,
>> Quentin
>>
>>> Ludovic
>>>
Thanks,
Quentin
>> +
>> +clk_disable_unprepare(priv->gck);
>> +clk_disable_unprepare(priv->hclock);
>> +clk_disable_unprepare(priv->mainck);
>> +
>> +return ret;
>> +}
>> +
>> +static int sdhci_at91_resume(struct device *dev)
>> +{
>> +struct sdhci_host *host = dev_get_drvdata(dev);
>> +int ret;
>> +
>> +ret = sdhci_at91_set_clks_presets(dev);
>> +if (ret)
>> +return ret;
>> +
>> +return sdhci_resume_host(host);
>> +}
>> +
>> static int sdhci_at91_runtime_suspend(struct device *dev)
>> {
>> struct sdhci_host *host =
Re: [PATCH 1/3] drm: Widen vblank count to 64 bits. Change vblank time precision to ns
On 06/07/17 04:45 PM, Michel Dänzer wrote:
> On 06/07/17 07:10 AM, Keith Packard wrote:
>> This modifies the datatypes used by the vblank code to provide both 64
>> bits of vblank count and to increase the resolution of the vblank
>> timestamp from microseconds to nanoseconds.
>>
>> The driver interfaces have also been changed to return 64-bits of
>> vblank count; fortunately all of the code necessary to widen that value
>> was already included to handle devices returning fewer than 32-bits.
>>
>> This will provide the necessary datatypes for the Vulkan API.
>>
>> Signed-off-by: Keith Packard
>
> [...]
>
>> @@ -1492,9 +1515,11 @@ int drm_wait_vblank(struct drm_device *dev, void
>> *data,
>>
>> switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) {
>> case _DRM_VBLANK_RELATIVE:
>> -vblwait->request.sequence += seq;
>> +req_seq = seq + vblwait->request.sequence;
>> vblwait->request.type &= ~_DRM_VBLANK_RELATIVE;
>
> Subtle breakage here: vblwait->request.sequence must still get updated
> for _DRM_VBLANK_RELATIVE, in case we're interrupted by a signal.
BTW, this got me thinking that we should probably treat
_DRM_VBLANK_NEXTONMISS the same way, i.e. clear the flag after updating
vblwait->request.sequence. Otherwise there could theoretically (though
unlikely) be an infinite loop:
ioctl with _DRM_VBLANK_NEXTONMISS, target missed => wait for next vblank
wait interrupted by signal
lather, rinse, repeat
I'd advise against adding a "next on miss" flag for the new ioctl until
there is specific demand for that.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
Re: [PATCH] irqchip/mips-gic: Add missing shared interrupt handler
Hi Thomas,
OK. I will provide more information and submit again.
Thanks.
JR
2017-07-06 15:47 GMT+08:00 Thomas Gleixner :
> On Thu, 6 Jul 2017, jrj...@gmail.com wrote:
>> From: Jun-Ru Chang
>>
>> Set handle_level_irq handler for shared interrupts to avoid hanging with
>> "unexpected IRQ" messages display.
>>
>> Change-Id: I6b9c0e8a13b28361f2daf89609f48cbdd397eb36
>
> This information is entirely useless. Instead of that please provide the
> information which commit introduced the problem in the form of a Fixes tag.
>
> Fixes: 0123456789AB ("irqchip/mips-gic: Make stuff different")
>
> That information lets us identify the scope of the fix, i.e. whether it
> fixes something which was introduced in the current merge window or whether
> this is a fix which needs to be backported into stable.
>
> Thanks,
>
> tglx
[PATCH v10 02/15] dmaengine: pch_dma: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Tested-by: Peter Senna Tschudin
---
drivers/dma/pch_dma.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c
index f9028e9d0dfc..afd8f27bda96 100644
--- a/drivers/dma/pch_dma.c
+++ b/drivers/dma/pch_dma.c
@@ -123,7 +123,7 @@ struct pch_dma_chan {
struct pch_dma {
struct dma_device dma;
void __iomem *membase;
- struct pci_pool *pool;
+ struct dma_pool *pool;
struct pch_dma_regs regs;
struct pch_dma_desc_regs ch_regs[MAX_CHAN_NR];
struct pch_dma_chan channels[MAX_CHAN_NR];
@@ -437,7 +437,7 @@ static struct pch_dma_desc *pdc_alloc_desc(struct dma_chan
*chan, gfp_t flags)
struct pch_dma *pd = to_pd(chan->device);
dma_addr_t addr;
- desc = pci_pool_zalloc(pd->pool, flags, &addr);
+ desc = dma_pool_zalloc(pd->pool, flags, &addr);
if (desc) {
INIT_LIST_HEAD(&desc->tx_list);
dma_async_tx_descriptor_init(&desc->txd, chan);
@@ -549,7 +549,7 @@ static void pd_free_chan_resources(struct dma_chan *chan)
spin_unlock_irq(&pd_chan->lock);
list_for_each_entry_safe(desc, _d, &tmp_list, desc_node)
- pci_pool_free(pd->pool, desc, desc->txd.phys);
+ dma_pool_free(pd->pool, desc, desc->txd.phys);
pdc_enable_irq(chan, 0);
}
@@ -880,7 +880,7 @@ static int pch_dma_probe(struct pci_dev *pdev,
goto err_iounmap;
}
- pd->pool = pci_pool_create("pch_dma_desc_pool", pdev,
+ pd->pool = dma_pool_create("pch_dma_desc_pool", &pdev->dev,
sizeof(struct pch_dma_desc), 4, 0);
if (!pd->pool) {
dev_err(&pdev->dev, "Failed to alloc DMA descriptors\n");
@@ -931,7 +931,7 @@ static int pch_dma_probe(struct pci_dev *pdev,
return 0;
err_free_pool:
- pci_pool_destroy(pd->pool);
+ dma_pool_destroy(pd->pool);
err_free_irq:
free_irq(pdev->irq, pd);
err_iounmap:
@@ -963,7 +963,7 @@ static void pch_dma_remove(struct pci_dev *pdev)
tasklet_kill(&pd_chan->tasklet);
}
- pci_pool_destroy(pd->pool);
+ dma_pool_destroy(pd->pool);
pci_iounmap(pdev, pd->membase);
pci_release_regions(pdev);
pci_disable_device(pdev);
--
2.11.0
[PATCH v10 00/15] Replace PCI pool by DMA pool API
The current PCI pool API are simple macro functions direct expanded to the appropriate dma pool functions. The prototypes are almost the same and semantically, they are very similar. I propose to use the DMA pool API directly and get rid of the old API. This set of patches, replaces the old API by the dma pool API and remove the defines. Changes in v10: - Rebased series onto next-20170706 - I have fixed and improved patch "scsi: megaraid: Replace PCI pool old API" Changes in v9: - Rebased series onto next-20170522 - I have fixed and improved the patch for lpfc driver Changes in v8: - Rebased series onto next-20170428 Changes in v7: - Rebased series onto next-20170416 - Added Acked-by, Tested-by and Reviwed-by tags Changes in v6: - Fixed an issue reported by kbuild test robot about changes in DAC960 - Removed patches 15/19,16/19,17/19,18/19. They have been merged by Greg - Added Acked-by Tags Changes in v5: - Re-worded the cover letter (remove sentence about checkpatch.pl) - Rebased series onto next-20170308 - Fix typos in commit message - Added Acked-by Tags Changes in v4: - Rebased series onto next-20170301 - Removed patch 20/20: checks done by checkpath.pl, no longer required. Thanks to Peter and Joe for their feedbacks. - Added Reviewed-by tags Changes in v3: - Rebased series onto next-20170224 - Fix checkpath.pl reports for patch 11/20 and patch 12/20 - Remove prefix RFC Changes in v2: - Introduced patch 18/20 - Fixed cosmetic changes: spaces before brace, live over 80 characters - Removed some of the check for NULL pointers before calling dma_pool_destroy - Improved the regexp in checkpatch for pci_pool, thanks to Joe Perches - Added Tested-by and Acked-by tags Romain Perier (15): block: DAC960: Replace PCI pool old API dmaengine: pch_dma: Replace PCI pool old API IB/mthca: Replace PCI pool old API net: e100: Replace PCI pool old API mlx4: Replace PCI pool old API mlx5: Replace PCI pool old API wireless: ipw2200: Replace PCI pool old API scsi: be2iscsi: Replace PCI pool old API scsi: csiostor: Replace PCI pool old API scsi: lpfc: Replace PCI pool old API scsi: megaraid: Replace PCI pool old API scsi: mpt3sas: Replace PCI pool old API scsi: mvsas: Replace PCI pool old API scsi: pmcraid: Replace PCI pool old API PCI: Remove PCI pool macro functions drivers/block/DAC960.c| 38 ++- drivers/block/DAC960.h| 4 +- drivers/dma/pch_dma.c | 12 ++-- drivers/infiniband/hw/mthca/mthca_av.c| 10 +-- drivers/infiniband/hw/mthca/mthca_cmd.c | 8 +-- drivers/infiniband/hw/mthca/mthca_dev.h | 4 +- drivers/net/ethernet/intel/e100.c | 12 ++-- drivers/net/ethernet/mellanox/mlx4/cmd.c | 10 +-- drivers/net/ethernet/mellanox/mlx4/mlx4.h | 2 +- drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 11 ++-- drivers/net/wireless/intel/ipw2x00/ipw2200.c | 13 ++-- drivers/scsi/be2iscsi/be_iscsi.c | 6 +- drivers/scsi/be2iscsi/be_main.c | 6 +- drivers/scsi/be2iscsi/be_main.h | 2 +- drivers/scsi/csiostor/csio_hw.h | 2 +- drivers/scsi/csiostor/csio_init.c | 11 ++-- drivers/scsi/csiostor/csio_scsi.c | 6 +- drivers/scsi/lpfc/lpfc.h | 16 ++--- drivers/scsi/lpfc/lpfc_init.c | 16 ++--- drivers/scsi/lpfc/lpfc_mem.c | 90 +-- drivers/scsi/lpfc/lpfc_nvme.c | 6 +- drivers/scsi/lpfc/lpfc_nvmet.c| 4 +- drivers/scsi/lpfc/lpfc_scsi.c | 12 ++-- drivers/scsi/lpfc/lpfc_sli.c | 6 +- drivers/scsi/megaraid/megaraid_mbox.c | 30 - drivers/scsi/megaraid/megaraid_mm.c | 29 - drivers/scsi/megaraid/megaraid_sas_base.c | 27 drivers/scsi/megaraid/megaraid_sas_fusion.c | 46 +++--- drivers/scsi/mpt3sas/mpt3sas_base.c | 73 ++ drivers/scsi/mvsas/mv_init.c | 6 +- drivers/scsi/mvsas/mv_sas.c | 6 +- drivers/scsi/pmcraid.c| 10 +-- drivers/scsi/pmcraid.h| 2 +- include/linux/mlx5/driver.h | 2 +- include/linux/pci.h | 9 --- 35 files changed, 269 insertions(+), 278 deletions(-) -- 2.11.0
[PATCH v10 05/15] mlx4: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Tested-by: Peter Senna Tschudin
Reviewed-by: Leon Romanovsky
Acked-by: Doug Ledford
Tested-by: Doug Ledford
---
drivers/net/ethernet/mellanox/mlx4/cmd.c | 10 +-
drivers/net/ethernet/mellanox/mlx4/mlx4.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c
b/drivers/net/ethernet/mellanox/mlx4/cmd.c
index 674773b28b2e..78b89ceb4f46 100644
--- a/drivers/net/ethernet/mellanox/mlx4/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx4/cmd.c
@@ -2535,8 +2535,8 @@ int mlx4_cmd_init(struct mlx4_dev *dev)
}
if (!priv->cmd.pool) {
- priv->cmd.pool = pci_pool_create("mlx4_cmd",
-dev->persist->pdev,
+ priv->cmd.pool = dma_pool_create("mlx4_cmd",
+&dev->persist->pdev->dev,
MLX4_MAILBOX_SIZE,
MLX4_MAILBOX_SIZE, 0);
if (!priv->cmd.pool)
@@ -2607,7 +2607,7 @@ void mlx4_cmd_cleanup(struct mlx4_dev *dev, int
cleanup_mask)
struct mlx4_priv *priv = mlx4_priv(dev);
if (priv->cmd.pool && (cleanup_mask & MLX4_CMD_CLEANUP_POOL)) {
- pci_pool_destroy(priv->cmd.pool);
+ dma_pool_destroy(priv->cmd.pool);
priv->cmd.pool = NULL;
}
@@ -2699,7 +2699,7 @@ struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct
mlx4_dev *dev)
if (!mailbox)
return ERR_PTR(-ENOMEM);
- mailbox->buf = pci_pool_zalloc(mlx4_priv(dev)->cmd.pool, GFP_KERNEL,
+ mailbox->buf = dma_pool_zalloc(mlx4_priv(dev)->cmd.pool, GFP_KERNEL,
&mailbox->dma);
if (!mailbox->buf) {
kfree(mailbox);
@@ -2716,7 +2716,7 @@ void mlx4_free_cmd_mailbox(struct mlx4_dev *dev,
if (!mailbox)
return;
- pci_pool_free(mlx4_priv(dev)->cmd.pool, mailbox->buf, mailbox->dma);
+ dma_pool_free(mlx4_priv(dev)->cmd.pool, mailbox->buf, mailbox->dma);
kfree(mailbox);
}
EXPORT_SYMBOL_GPL(mlx4_free_cmd_mailbox);
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index 30616cd0140d..32843f53c5aa 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -626,7 +626,7 @@ struct mlx4_mgm {
};
struct mlx4_cmd {
- struct pci_pool*pool;
+ struct dma_pool*pool;
void __iomem *hcr;
struct mutexslave_cmd_mutex;
struct semaphorepoll_sem;
--
2.11.0
[PATCH v10 01/15] block: DAC960: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Tested-by: Peter Senna Tschudin
---
drivers/block/DAC960.c | 38 ++
drivers/block/DAC960.h | 4 ++--
2 files changed, 20 insertions(+), 22 deletions(-)
diff --git a/drivers/block/DAC960.c b/drivers/block/DAC960.c
index 245a879b036e..e03c150efdd7 100644
--- a/drivers/block/DAC960.c
+++ b/drivers/block/DAC960.c
@@ -268,17 +268,17 @@ static bool
DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
void *AllocationPointer = NULL;
void *ScatterGatherCPU = NULL;
dma_addr_t ScatterGatherDMA;
- struct pci_pool *ScatterGatherPool;
+ struct dma_pool *ScatterGatherPool;
void *RequestSenseCPU = NULL;
dma_addr_t RequestSenseDMA;
- struct pci_pool *RequestSensePool = NULL;
+ struct dma_pool *RequestSensePool = NULL;
if (Controller->FirmwareType == DAC960_V1_Controller)
{
CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
- ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
- Controller->PCIDevice,
+ ScatterGatherPool = dma_pool_create("DAC960_V1_ScatterGather",
+ &Controller->PCIDevice->dev,
DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
if (ScatterGatherPool == NULL)
@@ -290,18 +290,18 @@ static bool
DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
{
CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
- ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
- Controller->PCIDevice,
+ ScatterGatherPool = dma_pool_create("DAC960_V2_ScatterGather",
+ &Controller->PCIDevice->dev,
DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
if (ScatterGatherPool == NULL)
return DAC960_Failure(Controller,
"AUXILIARY STRUCTURE CREATION (SG)");
- RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
- Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
+ RequestSensePool = dma_pool_create("DAC960_V2_RequestSense",
+ &Controller->PCIDevice->dev, sizeof(DAC960_SCSI_RequestSense_T),
sizeof(int), 0);
if (RequestSensePool == NULL) {
- pci_pool_destroy(ScatterGatherPool);
+ dma_pool_destroy(ScatterGatherPool);
return DAC960_Failure(Controller,
"AUXILIARY STRUCTURE CREATION (SG)");
}
@@ -335,16 +335,16 @@ static bool
DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
Command->Next = Controller->FreeCommands;
Controller->FreeCommands = Command;
Controller->Commands[CommandIdentifier-1] = Command;
- ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
+ ScatterGatherCPU = dma_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
&ScatterGatherDMA);
if (ScatterGatherCPU == NULL)
return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
if (RequestSensePool != NULL) {
- RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
+ RequestSenseCPU = dma_pool_alloc(RequestSensePool, GFP_ATOMIC,
&RequestSenseDMA);
if (RequestSenseCPU == NULL) {
-pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
+dma_pool_free(ScatterGatherPool, ScatterGatherCPU,
ScatterGatherDMA);
return DAC960_Failure(Controller,
"AUXILIARY STRUCTURE CREATION");
@@ -379,8 +379,8 @@ static bool
DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
{
int i;
- struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
- struct pci_pool *RequestSensePool = NULL;
+ struct dma_pool *ScatterGatherPool = Controller->ScatterGatherPool;
+ struct dma_pool *RequestSensePool = NULL;
void *ScatterGatherCPU;
dma_addr_t ScatterGatherDMA;
void *RequestSenseCPU;
@@ -411,9 +411,9 @@ static void
DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
RequestSenseDMA = Command->V2.RequestSenseDMA;
}
if (ScatterGatherCPU != NULL)
- pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
+ dma_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
Re: [PATCH] kvm: avoid unused variable warning for UP builds
Hi Paolo, [auto build test ERROR on kvm/linux-next] [also build test ERROR on v4.12] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Paolo-Bonzini/kvm-avoid-unused-variable-warning-for-UP-builds/20170706-051225 base: https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next config: x86_64-allyesdebian (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): arch/x86/kvm/../../../virt/kvm/kvm_main.c: In function 'kvm_make_all_cpus_request': >> arch/x86/kvm/../../../virt/kvm/kvm_main.c:221:4: error: implicit declaration >> of function '__cpumask_set_cpu' [-Werror=implicit-function-declaration] __cpumask_set_cpu(cpu, cpus); ^ cc1: some warnings being treated as errors vim +/__cpumask_set_cpu +221 arch/x86/kvm/../../../virt/kvm/kvm_main.c 215 216 if (!(req & KVM_REQUEST_NO_WAKEUP) && kvm_vcpu_wake_up(vcpu)) 217 continue; 218 219 if (cpus != NULL && cpu != -1 && cpu != me && 220 kvm_request_needs_ipi(vcpu, req)) > 221 __cpumask_set_cpu(cpu, cpus); 222 } 223 called = kvm_kick_many_cpus(cpus, !!(req & KVM_REQUEST_WAIT)); 224 put_cpu(); --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip
Re: [PATCH v2] KVM: arm/arm64: Handle hva aging while destroying the vm
On Wed, Jul 05, 2017 at 09:57:00AM +0100, Suzuki K Poulose wrote:
> Hi Alex,
>
> On Wed, Jul 05, 2017 at 08:20:31AM +0200, Alexander Graf wrote:
> > The kvm_age_hva callback may be called all the way concurrently while
> > kvm_mmu_notifier_release() is running.
> >
> > The release function sets kvm->arch.pgd = NULL which the aging function
> > however implicitly relies on in stage2_get_pud(). That means they can
> > race and the aging function may dereference a NULL pgd pointer.
> >
> > This patch adds a check for that case, so that we leave the aging
> > function silently.
> >
> > Cc: sta...@vger.kernel.org
> > Fixes: 293f29363 ("kvm-arm: Unmap shadow pagetables properly")
> > Signed-off-by: Alexander Graf
> >
> > ---
> >
> > v1 -> v2:
> >
> > - Fix commit message
> > - Add Fixes and stable tags
> > ---
> > virt/kvm/arm/mmu.c | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
> > index f2d5b6c..227931f 100644
> > --- a/virt/kvm/arm/mmu.c
> > +++ b/virt/kvm/arm/mmu.c
> > @@ -861,6 +861,10 @@ static pud_t *stage2_get_pud(struct kvm *kvm, struct
> > kvm_mmu_memory_cache *cache
> > pgd_t *pgd;
> > pud_t *pud;
> >
> > + /* Do we clash with kvm_free_stage2_pgd()? */
> > + if (!kvm->arch.pgd)
> > + return NULL;
> > +
>
> I think this check should be moved up in the chain. We call kvm_age_hva(),
> with
> the kvm->mmu_lock held and we don't release it till we reach here. So,
> ideally,
> if we find the PGD is null when we reach kvm_age_hva(), we could simply return
> there, like we do for other call backs from the KVM mmu_notifier.
>
>
> 8>
>
> kvm-arm: Handle hva aging while destroying vm
>
> The mmu_notifier_release() callback of KVM triggers cleaning up
> the stage2 page table on kvm-arm. However there could be other
> notifier callbacks in parallel with the mmu_notifier_release(),
> which could cause the call backs ending up in an empty stage2
> page table. Make sure we check it for all the notifier callbacks.
>
> Reported-by: Alex Graf
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc: sta...@vger.kernel.org
> Fixes: commit 293f29363 ("kvm-arm: Unmap shadow pagetables properly")
> Signed-off-by: Suzuki K Poulose
> ---
> virt/kvm/arm/mmu.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
> index e2e5eff..db1c7b2 100644
> --- a/virt/kvm/arm/mmu.c
> +++ b/virt/kvm/arm/mmu.c
> @@ -1665,12 +1665,16 @@ static int kvm_test_age_hva_handler(struct kvm *kvm,
> gpa_t gpa, u64 size, void *
>
> int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
> {
> + if (!kvm->arch.pgd)
> + return 0;
> trace_kvm_age_hva(start, end);
> return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
> }
>
> int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
> {
> + if (!kvm->arch.pgd)
> + return 0;
> trace_kvm_test_age_hva(hva);
> return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
> }
> --
> 2.7.5
>
For this patch:
Reviewed-by: Christoffer Dall
[PATCH v10 04/15] net: e100: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Acked-by: Jeff Kirsher
Tested-by: Peter Senna Tschudin
---
drivers/net/ethernet/intel/e100.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/intel/e100.c
b/drivers/net/ethernet/intel/e100.c
index 4d10270ddf8f..d1470d30351c 100644
--- a/drivers/net/ethernet/intel/e100.c
+++ b/drivers/net/ethernet/intel/e100.c
@@ -607,7 +607,7 @@ struct nic {
struct mem *mem;
dma_addr_t dma_addr;
- struct pci_pool *cbs_pool;
+ struct dma_pool *cbs_pool;
dma_addr_t cbs_dma_addr;
u8 adaptive_ifs;
u8 tx_threshold;
@@ -1892,7 +1892,7 @@ static void e100_clean_cbs(struct nic *nic)
nic->cb_to_clean = nic->cb_to_clean->next;
nic->cbs_avail++;
}
- pci_pool_free(nic->cbs_pool, nic->cbs, nic->cbs_dma_addr);
+ dma_pool_free(nic->cbs_pool, nic->cbs, nic->cbs_dma_addr);
nic->cbs = NULL;
nic->cbs_avail = 0;
}
@@ -1910,7 +1910,7 @@ static int e100_alloc_cbs(struct nic *nic)
nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL;
nic->cbs_avail = 0;
- nic->cbs = pci_pool_alloc(nic->cbs_pool, GFP_KERNEL,
+ nic->cbs = dma_pool_alloc(nic->cbs_pool, GFP_KERNEL,
&nic->cbs_dma_addr);
if (!nic->cbs)
return -ENOMEM;
@@ -2961,8 +2961,8 @@ static int e100_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
netif_err(nic, probe, nic->netdev, "Cannot register net device,
aborting\n");
goto err_out_free;
}
- nic->cbs_pool = pci_pool_create(netdev->name,
- nic->pdev,
+ nic->cbs_pool = dma_pool_create(netdev->name,
+ &nic->pdev->dev,
nic->params.cbs.max * sizeof(struct cb),
sizeof(u32),
0);
@@ -3002,7 +3002,7 @@ static void e100_remove(struct pci_dev *pdev)
unregister_netdev(netdev);
e100_free(nic);
pci_iounmap(pdev, nic->csr);
- pci_pool_destroy(nic->cbs_pool);
+ dma_pool_destroy(nic->cbs_pool);
free_netdev(netdev);
pci_release_regions(pdev);
pci_disable_device(pdev);
--
2.11.0
[PATCH v10 03/15] IB/mthca: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Tested-by: Peter Senna Tschudin
Acked-by: Doug Ledford
Tested-by: Doug Ledford
---
drivers/infiniband/hw/mthca/mthca_av.c | 10 +-
drivers/infiniband/hw/mthca/mthca_cmd.c | 8
drivers/infiniband/hw/mthca/mthca_dev.h | 4 ++--
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/infiniband/hw/mthca/mthca_av.c
b/drivers/infiniband/hw/mthca/mthca_av.c
index 2aec9908c40a..e7f6223e9c60 100644
--- a/drivers/infiniband/hw/mthca/mthca_av.c
+++ b/drivers/infiniband/hw/mthca/mthca_av.c
@@ -186,7 +186,7 @@ int mthca_create_ah(struct mthca_dev *dev,
on_hca_fail:
if (ah->type == MTHCA_AH_PCI_POOL) {
- ah->av = pci_pool_zalloc(dev->av_table.pool,
+ ah->av = dma_pool_zalloc(dev->av_table.pool,
GFP_ATOMIC, &ah->avdma);
if (!ah->av)
return -ENOMEM;
@@ -250,7 +250,7 @@ int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah
*ah)
break;
case MTHCA_AH_PCI_POOL:
- pci_pool_free(dev->av_table.pool, ah->av, ah->avdma);
+ dma_pool_free(dev->av_table.pool, ah->av, ah->avdma);
break;
case MTHCA_AH_KMALLOC:
@@ -340,7 +340,7 @@ int mthca_init_av_table(struct mthca_dev *dev)
if (err)
return err;
- dev->av_table.pool = pci_pool_create("mthca_av", dev->pdev,
+ dev->av_table.pool = dma_pool_create("mthca_av", &dev->pdev->dev,
MTHCA_AV_SIZE,
MTHCA_AV_SIZE, 0);
if (!dev->av_table.pool)
@@ -360,7 +360,7 @@ int mthca_init_av_table(struct mthca_dev *dev)
return 0;
out_free_pool:
- pci_pool_destroy(dev->av_table.pool);
+ dma_pool_destroy(dev->av_table.pool);
out_free_alloc:
mthca_alloc_cleanup(&dev->av_table.alloc);
@@ -374,6 +374,6 @@ void mthca_cleanup_av_table(struct mthca_dev *dev)
if (dev->av_table.av_map)
iounmap(dev->av_table.av_map);
- pci_pool_destroy(dev->av_table.pool);
+ dma_pool_destroy(dev->av_table.pool);
mthca_alloc_cleanup(&dev->av_table.alloc);
}
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c
b/drivers/infiniband/hw/mthca/mthca_cmd.c
index 9d83a53c0c67..0b03c09e637c 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -538,7 +538,7 @@ int mthca_cmd_init(struct mthca_dev *dev)
return -ENOMEM;
}
- dev->cmd.pool = pci_pool_create("mthca_cmd", dev->pdev,
+ dev->cmd.pool = dma_pool_create("mthca_cmd", &dev->pdev->dev,
MTHCA_MAILBOX_SIZE,
MTHCA_MAILBOX_SIZE, 0);
if (!dev->cmd.pool) {
@@ -551,7 +551,7 @@ int mthca_cmd_init(struct mthca_dev *dev)
void mthca_cmd_cleanup(struct mthca_dev *dev)
{
- pci_pool_destroy(dev->cmd.pool);
+ dma_pool_destroy(dev->cmd.pool);
iounmap(dev->hcr);
if (dev->cmd.flags & MTHCA_CMD_POST_DOORBELLS)
iounmap(dev->cmd.dbell_map);
@@ -621,7 +621,7 @@ struct mthca_mailbox *mthca_alloc_mailbox(struct mthca_dev
*dev,
if (!mailbox)
return ERR_PTR(-ENOMEM);
- mailbox->buf = pci_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma);
+ mailbox->buf = dma_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma);
if (!mailbox->buf) {
kfree(mailbox);
return ERR_PTR(-ENOMEM);
@@ -635,7 +635,7 @@ void mthca_free_mailbox(struct mthca_dev *dev, struct
mthca_mailbox *mailbox)
if (!mailbox)
return;
- pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
+ dma_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
kfree(mailbox);
}
diff --git a/drivers/infiniband/hw/mthca/mthca_dev.h
b/drivers/infiniband/hw/mthca/mthca_dev.h
index ec7da9a474cd..5508afbf1c67 100644
--- a/drivers/infiniband/hw/mthca/mthca_dev.h
+++ b/drivers/infiniband/hw/mthca/mthca_dev.h
@@ -118,7 +118,7 @@ enum {
};
struct mthca_cmd {
- struct pci_pool *pool;
+ struct dma_pool *pool;
struct mutex hcr_mutex;
struct semaphore poll_sem;
struct semaphore event_sem;
@@ -263,7 +263,7 @@ struct mthca_qp_table {
};
struct mthca_av_table {
- struct pci_pool *pool;
+ struct dma_pool *pool;
intnum_ddr_avs;
u64ddr_av_base;
void __iomem *av_map;
--
2.11.0
[PATCH v10 06/15] mlx5: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
Acked-by: Doug Ledford
Tested-by: Doug Ledford
---
drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 11 ++-
include/linux/mlx5/driver.h | 2 +-
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
index f5a2c605749f..7a40e8790f75 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
@@ -1095,7 +1095,7 @@ static struct mlx5_cmd_mailbox *alloc_cmd_box(struct
mlx5_core_dev *dev,
if (!mailbox)
return ERR_PTR(-ENOMEM);
- mailbox->buf = pci_pool_zalloc(dev->cmd.pool, flags,
+ mailbox->buf = dma_pool_zalloc(dev->cmd.pool, flags,
&mailbox->dma);
if (!mailbox->buf) {
mlx5_core_dbg(dev, "failed allocation\n");
@@ -1110,7 +1110,7 @@ static struct mlx5_cmd_mailbox *alloc_cmd_box(struct
mlx5_core_dev *dev,
static void free_cmd_box(struct mlx5_core_dev *dev,
struct mlx5_cmd_mailbox *mailbox)
{
- pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
+ dma_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
kfree(mailbox);
}
@@ -1759,7 +1759,8 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
return -EINVAL;
}
- cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
+ cmd->pool = dma_pool_create("mlx5_cmd", &dev->pdev->dev, size, align,
+ 0);
if (!cmd->pool)
return -ENOMEM;
@@ -1849,7 +1850,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
free_cmd_page(dev, cmd);
err_free_pool:
- pci_pool_destroy(cmd->pool);
+ dma_pool_destroy(cmd->pool);
return err;
}
@@ -1863,6 +1864,6 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
destroy_workqueue(cmd->wq);
destroy_msg_cache(dev);
free_cmd_page(dev, cmd);
- pci_pool_destroy(cmd->pool);
+ dma_pool_destroy(cmd->pool);
}
EXPORT_SYMBOL(mlx5_cmd_cleanup);
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index df6ce59a1f95..a7174ca26ca8 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -291,7 +291,7 @@ struct mlx5_cmd {
struct semaphore pages_sem;
int mode;
struct mlx5_cmd_work_ent *ent_arr[MLX5_MAX_COMMANDS];
- struct pci_pool *pool;
+ struct dma_pool *pool;
struct mlx5_cmd_debug dbg;
struct cmd_msg_cache cache[MLX5_NUM_COMMAND_CACHES];
int checksum_disabled;
--
2.11.0
Re: [PATCH] pwm: cros-ec: fix transposed param settings
On Fri, Jun 23, 2017 at 02:52:47PM -0700, Nick Vaccaro wrote: > The __cros_ec_pwm_get_duty() routine was transposing the insize and > outsize fields when calling cros_ec_cmd_xfer_status(). > > The original code worked without error due to size of the two particular > parameter blocks passed to cros_ec_cmd_xfer_status(), so this change is > not fixing an actual runtime problem, just correcting the calling usage. > > Signed-off-by: Nick Vaccaro > Reviewed-by: Brian Norris > --- > drivers/pwm/pwm-cros-ec.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Applied, thanks. Thierry signature.asc Description: PGP signature
Re: [PATCH v2 2/4] pwm-backlight: add support for pwm-delay-us property
On Fri, Jun 30, 2017 at 01:21:07PM +0200, Enric Balletbo i Serra wrote:
> From: huang lin
>
> Some panels (i.e. N116BGE-L41), in their power sequence specifications,
> request a delay between set the PWM signal and enable the backlight and
> between clear the PWM signal and disable the backlight. Add support for
> the new pwm-delay-us property to meet the timing.
>
> Note that this patch inverts current sequence. Before this patch the
> enable signal was set before the PWM signal and vice-versa on power off.
>
> I assumed that this sequence was wrong, at least it is on different panel
> datasheets that I checked, so I inverted the sequence to follow:
>
> On power on, set the PWM signal, wait, and set the LED_EN signal.
> On power off, clear the LED_EN signal, wait, and stop the PWM signal.
>
> Signed-off-by: huang lin
> Signed-off-by: Enric Balletbo i Serra
> ---
> Changes since v1:
> - As suggested by Daniel Thompson
>- Do not assume power-on delay and power-off delay will be the same
> - Move the check of dt property to the parse dt function.
>
> v1: https://lkml.org/lkml/2017/6/28/219
>
> drivers/video/backlight/pwm_bl.c | 24
> include/linux/pwm_backlight.h| 1 +
> 2 files changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/video/backlight/pwm_bl.c
> b/drivers/video/backlight/pwm_bl.c
> index 002f1ce..0f5470e 100644
> --- a/drivers/video/backlight/pwm_bl.c
> +++ b/drivers/video/backlight/pwm_bl.c
> @@ -10,6 +10,7 @@
> * published by the Free Software Foundation.
> */
>
> +#include
> #include
> #include
> #include
> @@ -35,6 +36,7 @@ struct pwm_bl_data {
> struct gpio_desc*enable_gpio;
> unsigned intscale;
> boollegacy;
> + unsigned intpwm_delay[2];
> int (*notify)(struct device *,
> int brightness);
> void(*notify_after)(struct device *,
> @@ -54,10 +56,14 @@ static void pwm_backlight_power_on(struct pwm_bl_data
> *pb, int brightness)
> if (err < 0)
> dev_err(pb->dev, "failed to enable power supply\n");
>
> + pwm_enable(pb->pwm);
> +
> + if (pb->pwm_delay[0])
> + usleep_range(pb->pwm_delay[0], pb->pwm_delay[0] + 2000);
> +
> if (pb->enable_gpio)
> gpiod_set_value_cansleep(pb->enable_gpio, 1);
>
> - pwm_enable(pb->pwm);
> pb->enabled = true;
> }
>
> @@ -66,12 +72,15 @@ static void pwm_backlight_power_off(struct pwm_bl_data
> *pb)
> if (!pb->enabled)
> return;
>
> - pwm_config(pb->pwm, 0, pb->period);
> - pwm_disable(pb->pwm);
> -
> if (pb->enable_gpio)
> gpiod_set_value_cansleep(pb->enable_gpio, 0);
>
> + if (pb->pwm_delay[1])
> + usleep_range(pb->pwm_delay[1], pb->pwm_delay[1] + 2000);
> +
> + pwm_config(pb->pwm, 0, pb->period);
> + pwm_disable(pb->pwm);
> +
> regulator_disable(pb->power_supply);
> pb->enabled = false;
> }
> @@ -174,6 +183,12 @@ static int pwm_backlight_parse_dt(struct device *dev,
> data->max_brightness--;
> }
>
> + /* read pwm to enable pre/post delays from DT property */
> + ret = of_property_read_u32_array(node, "pwm-delay-us", data->pwm_delay,
> + ARRAY_SIZE(data->pwm_delay));
> + if (ret < 0)
> + return ret;
Also I think you need to make sure you have a fallback in place in case
that this fails, otherwise the property is no longer optional.
Ignoring -EINVAL should do the trick since data->pwm_delay should be
zeroed out by the memset() earlier in this function.
Thierry
signature.asc
Description: PGP signature
[PATCH v10 08/15] scsi: be2iscsi: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Tested-by: Peter Senna Tschudin
---
drivers/scsi/be2iscsi/be_iscsi.c | 6 +++---
drivers/scsi/be2iscsi/be_main.c | 6 +++---
drivers/scsi/be2iscsi/be_main.h | 2 +-
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/scsi/be2iscsi/be_iscsi.c b/drivers/scsi/be2iscsi/be_iscsi.c
index 97dca4681784..43a80ce5ce6a 100644
--- a/drivers/scsi/be2iscsi/be_iscsi.c
+++ b/drivers/scsi/be2iscsi/be_iscsi.c
@@ -82,8 +82,8 @@ struct iscsi_cls_session *beiscsi_session_create(struct
iscsi_endpoint *ep,
return NULL;
sess = cls_session->dd_data;
beiscsi_sess = sess->dd_data;
- beiscsi_sess->bhs_pool = pci_pool_create("beiscsi_bhs_pool",
- phba->pcidev,
+ beiscsi_sess->bhs_pool = dma_pool_create("beiscsi_bhs_pool",
+ &phba->pcidev->dev,
sizeof(struct be_cmd_bhs),
64, 0);
if (!beiscsi_sess->bhs_pool)
@@ -108,7 +108,7 @@ void beiscsi_session_destroy(struct iscsi_cls_session
*cls_session)
struct beiscsi_session *beiscsi_sess = sess->dd_data;
printk(KERN_INFO "In beiscsi_session_destroy\n");
- pci_pool_destroy(beiscsi_sess->bhs_pool);
+ dma_pool_destroy(beiscsi_sess->bhs_pool);
iscsi_session_teardown(cls_session);
}
diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c
index f862332261f8..b4542e7e2ad5 100644
--- a/drivers/scsi/be2iscsi/be_main.c
+++ b/drivers/scsi/be2iscsi/be_main.c
@@ -4257,7 +4257,7 @@ static void beiscsi_cleanup_task(struct iscsi_task *task)
pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
if (io_task->cmd_bhs) {
- pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
+ dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
io_task->bhs_pa.u.a64.address);
io_task->cmd_bhs = NULL;
task->hdr = NULL;
@@ -4374,7 +4374,7 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task,
uint8_t opcode)
struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
dma_addr_t paddr;
- io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
+ io_task->cmd_bhs = dma_pool_alloc(beiscsi_sess->bhs_pool,
GFP_ATOMIC, &paddr);
if (!io_task->cmd_bhs)
return -ENOMEM;
@@ -4501,7 +4501,7 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task,
uint8_t opcode)
if (io_task->pwrb_handle)
free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
io_task->pwrb_handle = NULL;
- pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
+ dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
io_task->bhs_pa.u.a64.address);
io_task->cmd_bhs = NULL;
return -ENOMEM;
diff --git a/drivers/scsi/be2iscsi/be_main.h b/drivers/scsi/be2iscsi/be_main.h
index 338dbe0800c1..81ce3ffda968 100644
--- a/drivers/scsi/be2iscsi/be_main.h
+++ b/drivers/scsi/be2iscsi/be_main.h
@@ -438,7 +438,7 @@ struct beiscsi_hba {
test_bit(BEISCSI_HBA_ONLINE, &phba->state))
struct beiscsi_session {
- struct pci_pool *bhs_pool;
+ struct dma_pool *bhs_pool;
};
/**
--
2.11.0
[PATCH v10 07/15] wireless: ipw2200: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
---
drivers/net/wireless/intel/ipw2x00/ipw2200.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/intel/ipw2x00/ipw2200.c
b/drivers/net/wireless/intel/ipw2x00/ipw2200.c
index 9368abdf18e2..ac73436bc1c8 100644
--- a/drivers/net/wireless/intel/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/intel/ipw2x00/ipw2200.c
@@ -3209,7 +3209,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 *
data, size_t len)
struct fw_chunk *chunk;
int total_nr = 0;
int i;
- struct pci_pool *pool;
+ struct dma_pool *pool;
void **virts;
dma_addr_t *phys;
@@ -3226,9 +3226,10 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 *
data, size_t len)
kfree(virts);
return -ENOMEM;
}
- pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0);
+ pool = dma_pool_create("ipw2200", &priv->pci_dev->dev, CB_MAX_LENGTH, 0,
+ 0);
if (!pool) {
- IPW_ERROR("pci_pool_create failed\n");
+ IPW_ERROR("dma_pool_create failed\n");
kfree(phys);
kfree(virts);
return -ENOMEM;
@@ -3253,7 +3254,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 *
data, size_t len)
nr = (chunk_len + CB_MAX_LENGTH - 1) / CB_MAX_LENGTH;
for (i = 0; i < nr; i++) {
- virts[total_nr] = pci_pool_alloc(pool, GFP_KERNEL,
+ virts[total_nr] = dma_pool_alloc(pool, GFP_KERNEL,
&phys[total_nr]);
if (!virts[total_nr]) {
ret = -ENOMEM;
@@ -3297,9 +3298,9 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 *
data, size_t len)
}
out:
for (i = 0; i < total_nr; i++)
- pci_pool_free(pool, virts[i], phys[i]);
+ dma_pool_free(pool, virts[i], phys[i]);
- pci_pool_destroy(pool);
+ dma_pool_destroy(pool);
kfree(phys);
kfree(virts);
--
2.11.0
[PATCH v10 15/15] PCI: Remove PCI pool macro functions
Now that all the drivers use dma pool API, we can remove the macro
functions for PCI pool.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
---
include/linux/pci.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 4869e66dd659..01153fa1fbd4 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1297,15 +1297,6 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
#include
#include
-#definepci_pool dma_pool
-#define pci_pool_create(name, pdev, size, align, allocation) \
- dma_pool_create(name, &pdev->dev, size, align, allocation)
-#definepci_pool_destroy(pool) dma_pool_destroy(pool)
-#definepci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags,
handle)
-#definepci_pool_zalloc(pool, flags, handle) \
- dma_pool_zalloc(pool, flags, handle)
-#definepci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr,
addr)
-
struct msix_entry {
u32 vector; /* kernel uses to write allocated vector */
u16 entry; /* driver uses to specify entry, OS writes */
--
2.11.0
[PATCH v10 10/15] scsi: lpfc: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API. It also updates
some comments, accordingly.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
---
drivers/scsi/lpfc/lpfc.h | 16
drivers/scsi/lpfc/lpfc_init.c | 16
drivers/scsi/lpfc/lpfc_mem.c | 90 +-
drivers/scsi/lpfc/lpfc_nvme.c | 6 +--
drivers/scsi/lpfc/lpfc_nvmet.c | 4 +-
drivers/scsi/lpfc/lpfc_scsi.c | 12 +++---
drivers/scsi/lpfc/lpfc_sli.c | 6 +--
7 files changed, 75 insertions(+), 75 deletions(-)
diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
index 562dc0139735..7039549cad02 100644
--- a/drivers/scsi/lpfc/lpfc.h
+++ b/drivers/scsi/lpfc/lpfc.h
@@ -946,14 +946,14 @@ struct lpfc_hba {
struct list_head active_rrq_list;
spinlock_t hbalock;
- /* pci_mem_pools */
- struct pci_pool *lpfc_sg_dma_buf_pool;
- struct pci_pool *lpfc_mbuf_pool;
- struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
- struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
- struct pci_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
- struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
- struct pci_pool *txrdy_payload_pool;
+ /* dma_mem_pools */
+ struct dma_pool *lpfc_sg_dma_buf_pool;
+ struct dma_pool *lpfc_mbuf_pool;
+ struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
+ struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
+ struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
+ struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
+ struct dma_pool *txrdy_payload_pool;
struct lpfc_dma_pool lpfc_mbuf_safety_pool;
mempool_t *mbox_mem_pool;
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 491aa95eb0f6..9294c89c7ccd 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -3275,7 +3275,7 @@ lpfc_scsi_free(struct lpfc_hba *phba)
list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
list) {
list_del(&sb->list);
- pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
+ dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
sb->dma_handle);
kfree(sb);
phba->total_scsi_bufs--;
@@ -3286,7 +3286,7 @@ lpfc_scsi_free(struct lpfc_hba *phba)
list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
list) {
list_del(&sb->list);
- pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
+ dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
sb->dma_handle);
kfree(sb);
phba->total_scsi_bufs--;
@@ -3317,7 +3317,7 @@ lpfc_nvme_free(struct lpfc_hba *phba)
list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
&phba->lpfc_nvme_buf_list_put, list) {
list_del(&lpfc_ncmd->list);
- pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
+ dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
lpfc_ncmd->dma_handle);
kfree(lpfc_ncmd);
phba->total_nvme_bufs--;
@@ -3328,7 +3328,7 @@ lpfc_nvme_free(struct lpfc_hba *phba)
list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
&phba->lpfc_nvme_buf_list_get, list) {
list_del(&lpfc_ncmd->list);
- pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
+ dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
lpfc_ncmd->dma_handle);
kfree(lpfc_ncmd);
phba->total_nvme_bufs--;
@@ -3640,7 +3640,7 @@ lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
list_remove_head(&scsi_sgl_list, psb,
struct lpfc_scsi_buf, list);
if (psb) {
- pci_pool_free(phba->lpfc_sg_dma_buf_pool,
+ dma_pool_free(phba->lpfc_sg_dma_buf_pool,
psb->data, psb->dma_handle);
kfree(psb);
}
@@ -3774,7 +3774,7 @@ lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
list_remove_head(&nvme_sgl_list, lpfc_ncmd,
struct lpfc_nvme_buf, list);
if (lpfc_ncmd) {
- pci_pool_free(phba->lpfc_sg_dma_buf_pool,
+ dma_pool_free(phba->lpfc_sg_dma_buf_pool,
[PATCH v10 14/15] scsi: pmcraid: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Acked-by: Peter Senna Tschudin
Tested-by: Peter Senna Tschudin
---
drivers/scsi/pmcraid.c | 10 +-
drivers/scsi/pmcraid.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index 1cc814f1505a..1f8b1533d0c4 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -4655,13 +4655,13 @@ pmcraid_release_control_blocks(
return;
for (i = 0; i < max_index; i++) {
- pci_pool_free(pinstance->control_pool,
+ dma_pool_free(pinstance->control_pool,
pinstance->cmd_list[i]->ioa_cb,
pinstance->cmd_list[i]->ioa_cb_bus_addr);
pinstance->cmd_list[i]->ioa_cb = NULL;
pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
}
- pci_pool_destroy(pinstance->control_pool);
+ dma_pool_destroy(pinstance->control_pool);
pinstance->control_pool = NULL;
}
@@ -4718,8 +4718,8 @@ static int pmcraid_allocate_control_blocks(struct
pmcraid_instance *pinstance)
pinstance->host->unique_id);
pinstance->control_pool =
- pci_pool_create(pinstance->ctl_pool_name,
- pinstance->pdev,
+ dma_pool_create(pinstance->ctl_pool_name,
+ &pinstance->pdev->dev,
sizeof(struct pmcraid_control_block),
PMCRAID_IOARCB_ALIGNMENT, 0);
@@ -4728,7 +4728,7 @@ static int pmcraid_allocate_control_blocks(struct
pmcraid_instance *pinstance)
for (i = 0; i < PMCRAID_MAX_CMD; i++) {
pinstance->cmd_list[i]->ioa_cb =
- pci_pool_alloc(
+ dma_pool_alloc(
pinstance->control_pool,
GFP_KERNEL,
&(pinstance->cmd_list[i]->ioa_cb_bus_addr));
diff --git a/drivers/scsi/pmcraid.h b/drivers/scsi/pmcraid.h
index 01eb2bc16dc1..8bfac72a242b 100644
--- a/drivers/scsi/pmcraid.h
+++ b/drivers/scsi/pmcraid.h
@@ -755,7 +755,7 @@ struct pmcraid_instance {
/* structures related to command blocks */
struct kmem_cache *cmd_cachep; /* cache for cmd blocks */
- struct pci_pool *control_pool; /* pool for control blocks */
+ struct dma_pool *control_pool; /* pool for control blocks */
char cmd_pool_name[64]; /* name of cmd cache */
char ctl_pool_name[64]; /* name of control cache */
--
2.11.0
[PATCH v10 12/15] scsi: mpt3sas: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
---
drivers/scsi/mpt3sas/mpt3sas_base.c | 73 +
1 file changed, 34 insertions(+), 39 deletions(-)
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c
b/drivers/scsi/mpt3sas/mpt3sas_base.c
index 18039bba26c4..1a5b6e40fb5c 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_base.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_base.c
@@ -3198,9 +3198,8 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
}
if (ioc->sense) {
- pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
- if (ioc->sense_dma_pool)
- pci_pool_destroy(ioc->sense_dma_pool);
+ dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
+ dma_pool_destroy(ioc->sense_dma_pool);
dexitprintk(ioc, pr_info(MPT3SAS_FMT
"sense_pool(0x%p): free\n",
ioc->name, ioc->sense));
@@ -3208,9 +3207,8 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
}
if (ioc->reply) {
- pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
- if (ioc->reply_dma_pool)
- pci_pool_destroy(ioc->reply_dma_pool);
+ dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
+ dma_pool_destroy(ioc->reply_dma_pool);
dexitprintk(ioc, pr_info(MPT3SAS_FMT
"reply_pool(0x%p): free\n",
ioc->name, ioc->reply));
@@ -3218,10 +3216,9 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
}
if (ioc->reply_free) {
- pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
+ dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
ioc->reply_free_dma);
- if (ioc->reply_free_dma_pool)
- pci_pool_destroy(ioc->reply_free_dma_pool);
+ dma_pool_destroy(ioc->reply_free_dma_pool);
dexitprintk(ioc, pr_info(MPT3SAS_FMT
"reply_free_pool(0x%p): free\n",
ioc->name, ioc->reply_free));
@@ -3232,7 +3229,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
do {
rps = &ioc->reply_post[i];
if (rps->reply_post_free) {
- pci_pool_free(
+ dma_pool_free(
ioc->reply_post_free_dma_pool,
rps->reply_post_free,
rps->reply_post_free_dma);
@@ -3244,8 +3241,7 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
} while (ioc->rdpq_array_enable &&
(++i < ioc->reply_queue_count));
- if (ioc->reply_post_free_dma_pool)
- pci_pool_destroy(ioc->reply_post_free_dma_pool);
+ dma_pool_destroy(ioc->reply_post_free_dma_pool);
kfree(ioc->reply_post);
}
@@ -3266,12 +3262,11 @@ _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
if (ioc->chain_lookup) {
for (i = 0; i < ioc->chain_depth; i++) {
if (ioc->chain_lookup[i].chain_buffer)
- pci_pool_free(ioc->chain_dma_pool,
+ dma_pool_free(ioc->chain_dma_pool,
ioc->chain_lookup[i].chain_buffer,
ioc->chain_lookup[i].chain_buffer_dma);
}
- if (ioc->chain_dma_pool)
- pci_pool_destroy(ioc->chain_dma_pool);
+ dma_pool_destroy(ioc->chain_dma_pool);
free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
ioc->chain_lookup = NULL;
}
@@ -3446,23 +3441,23 @@ _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc)
ioc->name);
goto out;
}
- ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
- ioc->pdev, sz, 16, 0);
+ ioc->reply_post_free_dma_pool = dma_pool_create("reply_post_free pool",
+ &ioc->pdev->dev, sz, 16, 0);
if (!ioc->reply_post_free_dma_pool) {
pr_err(MPT3SAS_FMT
-"reply_post_free pool: pci_pool_create failed\n",
+"reply_post_free pool: dma_pool_create failed\n",
ioc->name);
goto out;
}
i = 0;
do {
ioc->reply_post[i].reply_post_free =
- pci_pool_alloc(ioc->reply_post_free_dma_pool,
+ dma_pool_alloc(ioc->reply_post_free_dma_pool,
G
[PATCH v10 13/15] scsi: mvsas: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
---
drivers/scsi/mvsas/mv_init.c | 6 +++---
drivers/scsi/mvsas/mv_sas.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
index 4e047b5001a6..1d53410334cc 100644
--- a/drivers/scsi/mvsas/mv_init.c
+++ b/drivers/scsi/mvsas/mv_init.c
@@ -125,8 +125,7 @@ static void mvs_free(struct mvs_info *mvi)
else
slot_nr = MVS_CHIP_SLOT_SZ;
- if (mvi->dma_pool)
- pci_pool_destroy(mvi->dma_pool);
+ dma_pool_destroy(mvi->dma_pool);
if (mvi->tx)
dma_free_coherent(mvi->dev,
@@ -296,7 +295,8 @@ static int mvs_alloc(struct mvs_info *mvi, struct Scsi_Host
*shost)
goto err_out;
sprintf(pool_name, "%s%d", "mvs_dma_pool", mvi->id);
- mvi->dma_pool = pci_pool_create(pool_name, mvi->pdev, MVS_SLOT_BUF_SZ,
16, 0);
+ mvi->dma_pool = dma_pool_create(pool_name, &mvi->pdev->dev,
+ MVS_SLOT_BUF_SZ, 16, 0);
if (!mvi->dma_pool) {
printk(KERN_DEBUG "failed to create dma pool %s.\n",
pool_name);
goto err_out;
diff --git a/drivers/scsi/mvsas/mv_sas.c b/drivers/scsi/mvsas/mv_sas.c
index c7cc8035eacb..ee81d10252e0 100644
--- a/drivers/scsi/mvsas/mv_sas.c
+++ b/drivers/scsi/mvsas/mv_sas.c
@@ -790,7 +790,7 @@ static int mvs_task_prep(struct sas_task *task, struct
mvs_info *mvi, int is_tmf
slot->n_elem = n_elem;
slot->slot_tag = tag;
- slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
+ slot->buf = dma_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
if (!slot->buf) {
rc = -ENOMEM;
goto err_out_tag;
@@ -840,7 +840,7 @@ static int mvs_task_prep(struct sas_task *task, struct
mvs_info *mvi, int is_tmf
return rc;
err_out_slot_buf:
- pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
+ dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
err_out_tag:
mvs_tag_free(mvi, tag);
err_out:
@@ -918,7 +918,7 @@ static void mvs_slot_task_free(struct mvs_info *mvi, struct
sas_task *task,
}
if (slot->buf) {
- pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
+ dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
slot->buf = NULL;
}
list_del_init(&slot->entry);
--
2.11.0
[PATCH v10 11/15] scsi: megaraid: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
Acked-by: Sumit Saxena
---
drivers/scsi/megaraid/megaraid_mbox.c | 30 +--
drivers/scsi/megaraid/megaraid_mm.c | 29 +-
drivers/scsi/megaraid/megaraid_sas_base.c | 27 +
drivers/scsi/megaraid/megaraid_sas_fusion.c | 46 +++--
4 files changed, 68 insertions(+), 64 deletions(-)
diff --git a/drivers/scsi/megaraid/megaraid_mbox.c
b/drivers/scsi/megaraid/megaraid_mbox.c
index f0987f22ea70..6d0bd3ae397e 100644
--- a/drivers/scsi/megaraid/megaraid_mbox.c
+++ b/drivers/scsi/megaraid/megaraid_mbox.c
@@ -1153,8 +1153,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
// Allocate memory for 16-bytes aligned mailboxes
- raid_dev->mbox_pool_handle = pci_pool_create("megaraid mbox pool",
- adapter->pdev,
+ raid_dev->mbox_pool_handle = dma_pool_create("megaraid mbox pool",
+ &adapter->pdev->dev,
sizeof(mbox64_t) + 16,
16, 0);
@@ -1164,7 +1164,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
mbox_pci_blk = raid_dev->mbox_pool;
for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
- mbox_pci_blk[i].vaddr = pci_pool_alloc(
+ mbox_pci_blk[i].vaddr = dma_pool_alloc(
raid_dev->mbox_pool_handle,
GFP_KERNEL,
&mbox_pci_blk[i].dma_addr);
@@ -1181,8 +1181,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
* share common memory pool. Passthru structures piggyback on memory
* allocted to extended passthru since passthru is smaller of the two
*/
- raid_dev->epthru_pool_handle = pci_pool_create("megaraid mbox pthru",
- adapter->pdev, sizeof(mraid_epassthru_t), 128, 0);
+ raid_dev->epthru_pool_handle = dma_pool_create("megaraid mbox pthru",
+ &adapter->pdev->dev, sizeof(mraid_epassthru_t), 128, 0);
if (raid_dev->epthru_pool_handle == NULL) {
goto fail_setup_dma_pool;
@@ -1190,7 +1190,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
epthru_pci_blk = raid_dev->epthru_pool;
for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
- epthru_pci_blk[i].vaddr = pci_pool_alloc(
+ epthru_pci_blk[i].vaddr = dma_pool_alloc(
raid_dev->epthru_pool_handle,
GFP_KERNEL,
&epthru_pci_blk[i].dma_addr);
@@ -1202,8 +1202,8 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
// Allocate memory for each scatter-gather list. Request for 512 bytes
// alignment for each sg list
- raid_dev->sg_pool_handle = pci_pool_create("megaraid mbox sg",
- adapter->pdev,
+ raid_dev->sg_pool_handle = dma_pool_create("megaraid mbox sg",
+ &adapter->pdev->dev,
sizeof(mbox_sgl64) * MBOX_MAX_SG_SIZE,
512, 0);
@@ -1213,7 +1213,7 @@ megaraid_mbox_setup_dma_pools(adapter_t *adapter)
sg_pci_blk = raid_dev->sg_pool;
for (i = 0; i < MBOX_MAX_SCSI_CMDS; i++) {
- sg_pci_blk[i].vaddr = pci_pool_alloc(
+ sg_pci_blk[i].vaddr = dma_pool_alloc(
raid_dev->sg_pool_handle,
GFP_KERNEL,
&sg_pci_blk[i].dma_addr);
@@ -1249,29 +1249,29 @@ megaraid_mbox_teardown_dma_pools(adapter_t *adapter)
sg_pci_blk = raid_dev->sg_pool;
for (i = 0; i < MBOX_MAX_SCSI_CMDS && sg_pci_blk[i].vaddr; i++) {
- pci_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
+ dma_pool_free(raid_dev->sg_pool_handle, sg_pci_blk[i].vaddr,
sg_pci_blk[i].dma_addr);
}
if (raid_dev->sg_pool_handle)
- pci_pool_destroy(raid_dev->sg_pool_handle);
+ dma_pool_destroy(raid_dev->sg_pool_handle);
epthru_pci_blk = raid_dev->epthru_pool;
for (i = 0; i < MBOX_MAX_SCSI_CMDS && epthru_pci_blk[i].vaddr; i++) {
- pci_pool_free(raid_dev->epthru_pool_handle,
+ dma_pool_free(raid_dev->epthru_pool_handle,
epthru_pci_blk[i].vaddr, epthru_pci_blk[i].dma_addr);
}
if (raid_dev->epthru_pool_handle)
- pci_pool_d
[PATCH v10 09/15] scsi: csiostor: Replace PCI pool old API
The PCI pool API is deprecated. This commit replaces the PCI pool old
API by the appropriate function with the DMA pool API. It also updates
the name of some variables and the content of comments, accordingly.
Signed-off-by: Romain Perier
Reviewed-by: Peter Senna Tschudin
---
drivers/scsi/csiostor/csio_hw.h | 2 +-
drivers/scsi/csiostor/csio_init.c | 11 ++-
drivers/scsi/csiostor/csio_scsi.c | 6 +++---
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/scsi/csiostor/csio_hw.h b/drivers/scsi/csiostor/csio_hw.h
index 9acb89538e29..667046419b19 100644
--- a/drivers/scsi/csiostor/csio_hw.h
+++ b/drivers/scsi/csiostor/csio_hw.h
@@ -465,7 +465,7 @@ struct csio_hw {
struct csio_pport pport[CSIO_MAX_PPORTS]; /* Ports (XGMACs) */
struct csio_hw_params params; /* Hw parameters */
- struct pci_pool *scsi_pci_pool; /* PCI pool for SCSI */
+ struct dma_pool *scsi_dma_pool; /* DMA pool for SCSI */
mempool_t *mb_mempool;/* Mailbox memory pool*/
mempool_t *rnode_mempool; /* rnode memory pool */
diff --git a/drivers/scsi/csiostor/csio_init.c
b/drivers/scsi/csiostor/csio_init.c
index ea0c31086cc6..d5fb016b5fc2 100644
--- a/drivers/scsi/csiostor/csio_init.c
+++ b/drivers/scsi/csiostor/csio_init.c
@@ -485,9 +485,10 @@ csio_resource_alloc(struct csio_hw *hw)
if (!hw->rnode_mempool)
goto err_free_mb_mempool;
- hw->scsi_pci_pool = pci_pool_create("csio_scsi_pci_pool", hw->pdev,
- CSIO_SCSI_RSP_LEN, 8, 0);
- if (!hw->scsi_pci_pool)
+ hw->scsi_dma_pool = dma_pool_create("csio_scsi_dma_pool",
+ &hw->pdev->dev, CSIO_SCSI_RSP_LEN,
+ 8, 0);
+ if (!hw->scsi_dma_pool)
goto err_free_rn_pool;
return 0;
@@ -505,8 +506,8 @@ csio_resource_alloc(struct csio_hw *hw)
static void
csio_resource_free(struct csio_hw *hw)
{
- pci_pool_destroy(hw->scsi_pci_pool);
- hw->scsi_pci_pool = NULL;
+ dma_pool_destroy(hw->scsi_dma_pool);
+ hw->scsi_dma_pool = NULL;
mempool_destroy(hw->rnode_mempool);
hw->rnode_mempool = NULL;
mempool_destroy(hw->mb_mempool);
diff --git a/drivers/scsi/csiostor/csio_scsi.c
b/drivers/scsi/csiostor/csio_scsi.c
index a1ff75f1384f..dab0d3f9bee1 100644
--- a/drivers/scsi/csiostor/csio_scsi.c
+++ b/drivers/scsi/csiostor/csio_scsi.c
@@ -2445,7 +2445,7 @@ csio_scsim_init(struct csio_scsim *scm, struct csio_hw
*hw)
/* Allocate Dma buffers for Response Payload */
dma_buf = &ioreq->dma_buf;
- dma_buf->vaddr = pci_pool_alloc(hw->scsi_pci_pool, GFP_KERNEL,
+ dma_buf->vaddr = dma_pool_alloc(hw->scsi_dma_pool, GFP_KERNEL,
&dma_buf->paddr);
if (!dma_buf->vaddr) {
csio_err(hw,
@@ -2485,7 +2485,7 @@ csio_scsim_init(struct csio_scsim *scm, struct csio_hw
*hw)
ioreq = (struct csio_ioreq *)tmp;
dma_buf = &ioreq->dma_buf;
- pci_pool_free(hw->scsi_pci_pool, dma_buf->vaddr,
+ dma_pool_free(hw->scsi_dma_pool, dma_buf->vaddr,
dma_buf->paddr);
kfree(ioreq);
@@ -2516,7 +2516,7 @@ csio_scsim_exit(struct csio_scsim *scm)
ioreq = (struct csio_ioreq *)tmp;
dma_buf = &ioreq->dma_buf;
- pci_pool_free(scm->hw->scsi_pci_pool, dma_buf->vaddr,
+ dma_pool_free(scm->hw->scsi_dma_pool, dma_buf->vaddr,
dma_buf->paddr);
kfree(ioreq);
--
2.11.0
Re: [PATCH] mm: larger stack guard gap, between vmas
On Wed, Jul 05, 2017 at 04:51:06PM -0700, Linus Torvalds wrote: > On Wed, Jul 5, 2017 at 4:35 PM, Ben Hutchings wrote: > >> > >> And I think your second patch breaks that "use a really large value to > >> approximate infinity" case that definitely has existed as a pattern. > > > > Right. Well that seems to leave us with remembering the MAP_FIXED flag > > and using that as the condition to ignore the previous mapping. > > I'm not particularly happy about having a MAP_FIXED special case, but > yeah, I'm not seeing a lot of alternatives. We can possibly refine it like this : - use PROT_NONE as a mark for the end of the stack and consider the application doing this knows exactly what it's doing ; - use other MAP_FIXED as a limit for a shorter gap (ie 4kB), considering that 1) it used to work like this for many years, and 2) if an application is forcing a MAP_FIXED just below the stack and at the same time uses large alloca() or VLA it's definitely bogus and looking for unfixable trouble. Not allowing this means we break existing applications anyway. Willy
Re: [GIT PULL] USB/PHY patches for 4.13-rc1
Hi Babu, On Tue, Jul 4, 2017 at 10:19 AM, Babu Moger wrote: > Max, Do you have any concerns about xtensa? no, not ATM. I still haven't got a chance to look closer at moving endianness macros back to Kconfig for xtensa. -- Thanks. -- Max
[PATCH v1] clk: fractional-divider: fix up the fractional clk's jitter
fractional divider must set that denominator is 20 times larger than
numerator to generate precise clock frequency.
Otherwise the CLK jitter is very big, poor quality of the clock signal.
RK document description:
3.1.9 Fractional divider usage
To get specific frequency, clocks of I2S, SPDIF, UARTcan be generated by
fractional divider. Generally you must set that denominator is 20 times
larger than numerator to generate precise clock frequency. So the
fractional divider applies only to generate low frequency clock like
I2S, UART.
Signed-off-by: Elaine Zhang
---
drivers/clk/clk-fractional-divider.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/clk/clk-fractional-divider.c
b/drivers/clk/clk-fractional-divider.c
index aab904618eb6..1c29d6f5ffd8 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -56,11 +56,24 @@ static long clk_fd_round_rate(struct clk_hw *hw, unsigned
long rate,
unsigned long scale;
unsigned long m, n;
u64 ret;
+ struct clk_hw *p_parent;
+ unsigned long p_rate, p_parent_rate;
if (!rate || rate >= *parent_rate)
return *parent_rate;
/*
+* fractional divider must set that denominator is 20 times larger than
+* numerator to generate precise clock frequency.
+*/
+ p_rate = clk_hw_get_rate(clk_hw_get_parent(hw));
+ if ((rate * 20 > p_rate) && (p_rate % rate != 0)) {
+ p_parent = clk_hw_get_parent(clk_hw_get_parent(hw));
+ p_parent_rate = clk_hw_get_rate(p_parent);
+ *parent_rate = p_parent_rate;
+ }
+
+ /*
* Get rate closer to *parent_rate to guarantee there is no overflow
* for m and n. In the result it will be the nearest rate left shifted
* by (scale - fd->nwidth) bits.
--
1.9.1
Re: [RFC PATCH 1/5] base: dma-mapping: Export commonly used symbols
On Thu, Jul 6, 2017 at 3:44 AM, Tomasz Figa wrote: > On Thu, Jul 6, 2017 at 2:20 AM, Christoph Hellwig wrote: >> On Thu, Jul 06, 2017 at 12:22:35AM +0900, Tomasz Figa wrote: >> In general I think moving dma >> ops and iommu implementations into modules is a bad idea > > Could you elaborate on this? I'd be interested in seeing the reasoning > behind this. > >> but I >> don't want to reject the idea before seeing the code. Or maybe >> by looking at the user we can come up with an even better idea >> to solve the original issue you're trying to solve, so please also >> explain your rationale. I had pretty much the same thoughts here. > Basically we have an x86 platform with a camera subsystem that is a > PCI device, has its own MMU and needs cache maintenance. Moreover, the > V4L2 subsystem, which is the right place for camera drivers, heavily > relies on DMA mapping as a way to abstract memory allocation, mapping > and cache maintenance. So it feels natural to me to hide the hardware > details (additional cache maintenance, mapping into the built-in > IOMMU) in the DMA mapping ops for this camera subsystem and simply > make V4L2 just work without knowing those details. I can understand your reasoning here, but I'm also not convinced that this is the best approach. There may be a middle ground somewhere though. Generally speaking I don't want to have to deal with the horrors of deciding whether an IOMMU is going to be there eventually or not at probe() time. At some point, we had decided that IOMMUs need to be initialized (almost) as early as irqchips and clocksources so we can rely on them to be there at device discovery time. That got pushed back already, and now we may have to deal with -EPROBE_DEFER when an IOMMU has not been fully initialized at device probe time, but at least we can reliably see if one is there or not. Making IOMMUs modular will add further uncertainty here. Obviously we cannot attach an IOMMU to a device once we have started using DMA mapping calls on it. For your particular use case, I would instead leave the knowledge about the IOMMU in the driver itself, like we do for the IOMMUs that are integrated in desktop GPUs, and have the code use the DMA mapping API with the system-provided dma_map_ops to get dma_addr_t tokens which you then program into the device IOMMU. An open question however would be whether to use the IOMMU API without the DMA mapping API here, or whether to completely leave the knowledge of the IOMMU inside of the driver itself. I don't have a strong opinion on that part, and I guess this mostly depends on what the hardware looks like. Arnd
Re: [PATCH v2 2/4] pwm-backlight: add support for pwm-delay-us property
Hi Thierry,
Many thanks for your comments, I'll send a v3.
2017-07-06 10:13 GMT+02:00 Thierry Reding :
> On Fri, Jun 30, 2017 at 01:21:07PM +0200, Enric Balletbo i Serra wrote:
>> From: huang lin
>>
>> Some panels (i.e. N116BGE-L41), in their power sequence specifications,
>> request a delay between set the PWM signal and enable the backlight and
>> between clear the PWM signal and disable the backlight. Add support for
>> the new pwm-delay-us property to meet the timing.
>>
>> Note that this patch inverts current sequence. Before this patch the
>> enable signal was set before the PWM signal and vice-versa on power off.
>>
>> I assumed that this sequence was wrong, at least it is on different panel
>> datasheets that I checked, so I inverted the sequence to follow:
>>
>> On power on, set the PWM signal, wait, and set the LED_EN signal.
>> On power off, clear the LED_EN signal, wait, and stop the PWM signal.
>>
>> Signed-off-by: huang lin
>> Signed-off-by: Enric Balletbo i Serra
>> ---
>> Changes since v1:
>> - As suggested by Daniel Thompson
>>- Do not assume power-on delay and power-off delay will be the same
>> - Move the check of dt property to the parse dt function.
>>
>> v1: https://lkml.org/lkml/2017/6/28/219
>>
>> drivers/video/backlight/pwm_bl.c | 24
>> include/linux/pwm_backlight.h| 1 +
>> 2 files changed, 21 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/video/backlight/pwm_bl.c
>> b/drivers/video/backlight/pwm_bl.c
>> index 002f1ce..0f5470e 100644
>> --- a/drivers/video/backlight/pwm_bl.c
>> +++ b/drivers/video/backlight/pwm_bl.c
>> @@ -10,6 +10,7 @@
>> * published by the Free Software Foundation.
>> */
>>
>> +#include
>> #include
>> #include
>> #include
>> @@ -35,6 +36,7 @@ struct pwm_bl_data {
>> struct gpio_desc*enable_gpio;
>> unsigned intscale;
>> boollegacy;
>> + unsigned intpwm_delay[2];
>> int (*notify)(struct device *,
>> int brightness);
>> void(*notify_after)(struct device *,
>> @@ -54,10 +56,14 @@ static void pwm_backlight_power_on(struct pwm_bl_data
>> *pb, int brightness)
>> if (err < 0)
>> dev_err(pb->dev, "failed to enable power supply\n");
>>
>> + pwm_enable(pb->pwm);
>> +
>> + if (pb->pwm_delay[0])
>> + usleep_range(pb->pwm_delay[0], pb->pwm_delay[0] + 2000);
>> +
>> if (pb->enable_gpio)
>> gpiod_set_value_cansleep(pb->enable_gpio, 1);
>>
>> - pwm_enable(pb->pwm);
>> pb->enabled = true;
>> }
>>
>> @@ -66,12 +72,15 @@ static void pwm_backlight_power_off(struct pwm_bl_data
>> *pb)
>> if (!pb->enabled)
>> return;
>>
>> - pwm_config(pb->pwm, 0, pb->period);
>> - pwm_disable(pb->pwm);
>> -
>> if (pb->enable_gpio)
>> gpiod_set_value_cansleep(pb->enable_gpio, 0);
>>
>> + if (pb->pwm_delay[1])
>> + usleep_range(pb->pwm_delay[1], pb->pwm_delay[1] + 2000);
>> +
>> + pwm_config(pb->pwm, 0, pb->period);
>> + pwm_disable(pb->pwm);
>> +
>> regulator_disable(pb->power_supply);
>> pb->enabled = false;
>> }
>> @@ -174,6 +183,12 @@ static int pwm_backlight_parse_dt(struct device *dev,
>> data->max_brightness--;
>> }
>>
>> + /* read pwm to enable pre/post delays from DT property */
>> + ret = of_property_read_u32_array(node, "pwm-delay-us", data->pwm_delay,
>> + ARRAY_SIZE(data->pwm_delay));
>> + if (ret < 0)
>> + return ret;
>
> Also I think you need to make sure you have a fallback in place in case
> that this fails, otherwise the property is no longer optional.
>
> Ignoring -EINVAL should do the trick since data->pwm_delay should be
> zeroed out by the memset() earlier in this function.
>
Yep, you have reason. Thanks.
> Thierry
ath10k: ret used but uninitialized (was: Re: ath10k: add initial SDIO support)
On Wed, Jul 5, 2017 at 9:52 PM, Linux Kernel Mailing List
wrote:
> Web:
> https://git.kernel.org/torvalds/c/d96db25d20256208ce47d71b9f673a1de4c6fd7e
> Commit: d96db25d20256208ce47d71b9f673a1de4c6fd7e
> Parent: f008d1537bf88396cf41a7c7a831e3acd1ee92a1
> Refname:refs/heads/master
> Author: Erik Stromdahl
> AuthorDate: Wed Apr 26 12:18:00 2017 +0300
> Committer: Kalle Valo
> CommitDate: Thu May 4 15:55:55 2017 +0300
>
> ath10k: add initial SDIO support
>
> Chipsets like QCA6584 have support for SDIO so add initial SDIO bus
> support to
> ath10k. With this patch we have the low level HTC protocol working and
> it's
> possible to boot the firmware, but it's still not possible to connect or
> anything like. More changes are needed for full functionality. For that
> reason
> we print during initialisation:
>
> WARNING: ath10k SDIO support is incomplete, don't expect anything to work!
>
> Signed-off-by: Erik Stromdahl
> [kv...@qca.qualcomm.com: refactoring, cleanup, commit log]
> Signed-off-by: Kalle Valo
> --- /dev/null
> +++ b/drivers/net/wireless/ath/ath10k/sdio.c
> +static int ath10k_sdio_mbox_rxmsg_pending_handler(struct ath10k *ar,
> + u32 msg_lookahead, bool
> *done)
> +{
> + struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
> + u32 lookaheads[ATH10K_SDIO_MAX_RX_MSGS];
> + int n_lookaheads = 1;
> + unsigned long timeout;
> + int ret;
With gcc 4.1.2:
drivers/net/wireless/ath/ath10k/sdio.c: In function
‘ath10k_sdio_mbox_rxmsg_pending_handler’:
drivers/net/wireless/ath/ath10k/sdio.c:676: warning: ‘ret’ may be used
uninitialized in this function
> +
> + *done = true;
> +
> + /* Copy the lookahead obtained from the HTC register table into our
> +* temp array as a start value.
> +*/
> + lookaheads[0] = msg_lookahead;
> +
> + timeout = jiffies + SDIO_MBOX_PROCESSING_TIMEOUT_HZ;
Although very unlikely due to the long timeout, if the code is preempted here,
and the loop below never entered, ret will indeed be uninitialized.
It's unclear to me what the proper initialization would be, though, so
that's why I didn't send a patch.
> + while (time_before(jiffies, timeout)) {
> + /* Try to allocate as many HTC RX packets indicated by
> +* n_lookaheads.
> +*/
> + ret = ath10k_sdio_mbox_rx_alloc(ar, lookaheads,
> + n_lookaheads);
> + if (ret)
> + break;
> +
> + if (ar_sdio->n_rx_pkts >= 2)
> + /* A recv bundle was detected, force IRQ status
> +* re-check again.
> +*/
> + *done = false;
> +
> + ret = ath10k_sdio_mbox_rx_fetch(ar);
> +
> + /* Process fetched packets. This will potentially update
> +* n_lookaheads depending on if the packets contain lookahead
> +* reports.
> +*/
> + n_lookaheads = 0;
> + ret = ath10k_sdio_mbox_rx_process_packets(ar,
> + lookaheads,
> + &n_lookaheads);
> +
> + if (!n_lookaheads || ret)
> + break;
> +
> + /* For SYNCH processing, if we get here, we are running
> +* through the loop again due to updated lookaheads. Set
> +* flag that we should re-check IRQ status registers again
> +* before leaving IRQ processing, this can net better
> +* performance in high throughput situations.
> +*/
> + *done = false;
> + }
> +
> + if (ret && (ret != -ECANCELED))
> + ath10k_warn(ar, "failed to get pending recv messages: %d\n",
> + ret);
> +
> + return ret;
> +}
> +static void ath10k_sdio_irq_handler(struct sdio_func *func)
> +{
> + struct ath10k_sdio *ar_sdio = sdio_get_drvdata(func);
> + struct ath10k *ar = ar_sdio->ar;
> + unsigned long timeout;
> + bool done = false;
> + int ret;
drivers/net/wireless/ath/ath10k/sdio.c: In function ‘ath10k_sdio_irq_handler’:
drivers/net/wireless/ath/ath10k/sdio.c:1331: warning: ‘ret’ may be
used uninitialized in this function
> +
> + /* Release the host during interrupts so we can pick it back up when
> +* we process commands.
> +*/
> + sdio_release_host(ar_sdio->func);
> +
> + timeout = jiffies + ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ;
Same here.
Should ret be preinitialized to 0, -ECANCELED, or something else?
> + while (time_before(jiffies, timeout) && !done) {
> + ret = ath10k_sdio_mbox_proc_pending_irqs(ar, &done);
> +
Re: [PATCH 0/5] Make PDF builds work again
> Am 05.07.2017 um 23:22 schrieb Jim Davis : > > On Mon, Jul 3, 2017 at 5:44 AM, Jonathan Corbet wrote: >> On Mon, 3 Jul 2017 10:25:38 +0200 >> Daniel Vetter wrote: >> >>> Only now stumbled over the full thread, but the drm patch is already >>> queued up for at least 4.13 (Dave was out and all that). I guess we could >>> try to cherry-pick through stable. >> >> I kind of gave up on the 4.12 goal, at least for now. The number of >> complaints has not been huge - I suspect you're far from the only one who >> is not too worried about building PDFs...:) > > If fixing pdf (and ps) builds isn't worth the bother -- which I > wouldn't debate -- then it's best to just drop those build targets. > The only worrisome thing I see here is having build targets carried > from release to release that don't work. my 5cent: we have to communicate that PDF build is in a beta stage (for a long time). Sphinx-doc's PDF chain was not well maintained for a long time. With newer versions (started with 1.5 and continued in 1.6) it becomes better and better. This gives me some hope that there comes a day where building PDFs is robust enough to use in automatic builds. As long as we try to support various version of Sphinx shipped by various distros and at the same time make/need deep (LaTeX) adjustments, we will find those discussions on the ML. If you are doubtful about my assessment, compare Sphinx's TeX stuff from master https://github.com/sphinx-doc/sphinx/tree/master/sphinx/texinputs with e.g. 1.4.9 tag https://github.com/sphinx-doc/sphinx/tree/1.4.9/sphinx/texinputs -- Markus --
Re: [PATCH 3/3] ACPI: EC: Change EC noirq tuning to be an optional behavior
Hi Lv, On Mon, Jul 03, 2017 at 01:15:26PM +0800, Zheng, Lv wrote: > Hi, Rafael > > > From: Rafael J. Wysocki [mailto:r...@rjwysocki.net] > > Subject: Re: [PATCH 3/3] ACPI: EC: Change EC noirq tuning to be an optional > > behavior > > > > On Wednesday, June 14, 2017 01:59:24 PM Lv Zheng wrote: > > > According to the bug report, though the busy polling mode can make noirq > > > stages executed faster, it causes abnormal fan blowing in noirq stages. > > > > > > This patch prepares an option so that the automatic busy polling mode > > > switching for noirq stages can be enabled by who wants to tune it, not all > > > users. > > > Noticed that the new global option cannot be changed during noirq stages. > > > There is no need to lock its value changes to sync with polling mode > > > settings switches. > > > > > > For reporters and testers in the thread, as there are too many reporters > > > on the bug link, this patch only picks names from most active commenters. > > > Sorry for the neglet. > > > > > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=191181 > > > Reported-by: Tatsuyuki Ishi > > > Reported-by: Claudio Sacerdoti Coen > > > Tested-by: Nicolo' > > > Reported-by: Jens Axboe > > > Tested-by: Gjorgji Jankovski > > > Tested-by: Damjan Georgievski > > > Tested-by: Fernando Chaves > > > Signed-off-by: Lv Zheng > > > > First of all, this seems to be a fix for commit c3a696b6e8f8 (ACPI / EC: > > Use busy polling > > mode when GPE is not enabled), so there should be a Fixes: tag pointing to > > that > > one. > > > > Moreover, if that is just a performance optimization and not a matter of > > correctness, > > why don't we simply drop acpi_ec_enter/leave_noirq() entirely? > > > > What is going to break if we do that? > > Let me Cc Yu for justification. > I just added busy poll support for suspend/boot according to the root cause > reported by him. > He should know the end user requirements better than me. > I remembered the original issue was reported against the slowness during suspend/resume due to the ec is running with GPE disabled, and falls into schedule_timeout() loop. If the busy polling mode is controlled by the boot options rather than acpi_ec_enter/leave_noirq(), then user should be noticed of the result that the cpu usage might be always higer if they enable the busy polling mode. Thanks, Yu > Thanks and best regards > Lv
[PATCH] x86/boot/KASLR: exclude EFI_BOOT_SERVICES_{CODE|DATA} from KASLR's choice
Hi Baoquan, everyone,
I'm also interested in KASLR/EFI related issue (but not the same issue
with yours, so I separated the thread.)
This patch is based on Baoquan's recent patches[1], adding more code
on the new function process_efi_entry().
If it's OK, could you queue this onto your tree/series?
[1] "[PATCH v3 0/2] x86/boot/KASLR: Restrict kernel to be randomized"
https://lkml.org/lkml/2017/7/5/98
Thanks,
Naoya Horiguchi
---
From: Naoya Horiguchi
Date: Thu, 6 Jul 2017 16:40:52 +0900
Subject: [PATCH] x86/boot/KASLR: exclude EFI_BOOT_SERVICES_{CODE|DATA} from
KASLR's choice
KASLR chooses kernel location from E820_TYPE_RAM regions by walking over
e820 entries now. E820_TYPE_RAM includes EFI_BOOT_SERVICES_CODE and
EFI_BOOT_SERVICES_DATA, so those regions can be the target. According to
UEFI spec, all memory regions marked as EfiBootServicesCode and
EfiBootServicesData are available for free memory after the first call
of ExitBootServices(). So such regions should be usable for kernel on
spec basis.
In x86, however, we have some workaround for broken firmware, where we
keep such regions reserved until SetVirtualAddressMap() is done.
See the following code in should_map_region():
static bool should_map_region(efi_memory_desc_t *md)
{
...
/*
* Map boot services regions as a workaround for buggy
* firmware that accesses them even when they shouldn't.
*
* See efi_{reserve,free}_boot_services().
*/
if (md->type == EFI_BOOT_SERVICES_CODE ||
md->type == EFI_BOOT_SERVICES_DATA)
return false;
This workaround suppressed a boot crash, but potential issues still
remain because no one prevents the regions from overlapping with kernel
image by KASLR.
So let's make sure that EFI_BOOT_SERVICES_{CODE|DATA} regions are never
chosen as kernel memory for the workaround to work fine.
Signed-off-by: Naoya Horiguchi
---
arch/x86/boot/compressed/kaslr.c | 41 +++-
1 file changed, 32 insertions(+), 9 deletions(-)
diff --git a/arch/x86/boot/compressed/kaslr.c b/arch/x86/boot/compressed/kaslr.c
index 94f08fd375ae..f43fed0441a6 100644
--- a/arch/x86/boot/compressed/kaslr.c
+++ b/arch/x86/boot/compressed/kaslr.c
@@ -563,7 +563,8 @@ static void process_mem_region(struct mem_vector *entry,
/* Marks if efi mirror regions have been found and handled. */
static bool efi_mirror_found;
-static void process_efi_entry(unsigned long minimum, unsigned long image_size)
+/* Returns true if we really enter efi memmap walk, otherwise returns false. */
+static bool process_efi_entry(unsigned long minimum, unsigned long image_size)
{
struct efi_info *e = &boot_params->efi_info;
struct mem_vector region;
@@ -577,13 +578,13 @@ static void process_efi_entry(unsigned long minimum,
unsigned long image_size)
signature = (char *)&boot_params->efi_info.efi_loader_signature;
if (strncmp(signature, EFI32_LOADER_SIGNATURE, 4) &&
strncmp(signature, EFI64_LOADER_SIGNATURE, 4))
- return;
+ return false;
#ifdef CONFIG_X86_32
/* Can't handle data above 4GB at this time */
if (e->efi_memmap_hi) {
warn("Memory map is above 4GB, EFI should be disabled.\n");
- return;
+ return false;
}
pmap = e->efi_memmap;
#else
@@ -593,13 +594,36 @@ static void process_efi_entry(unsigned long minimum,
unsigned long image_size)
nr_desc = e->efi_memmap_size / e->efi_memdesc_size;
for (i = 0; i < nr_desc; i++) {
md = (efi_memory_desc_t *)(pmap + (i * e->efi_memdesc_size));
- if (md->attribute & EFI_MEMORY_MORE_RELIABLE) {
- region.start = md->phys_addr;
- region.size = md->num_pages << EFI_PAGE_SHIFT;
- process_mem_region(®ion, minimum, image_size);
+ if (md->attribute & EFI_MEMORY_MORE_RELIABLE)
efi_mirror_found = true;
+ }
+
+ for (i = 0; i < nr_desc; i++) {
+ md = (efi_memory_desc_t *)(pmap + (i * e->efi_memdesc_size));
+
+ /*
+* EFI_BOOT_SERVICES_{CODE|DATA} are avoided because boot
+* services regions could be accessed after ExitBootServices()
+* due to the workaround for buggy firmware.
+*/
+ if (!(md->type == EFI_LOADER_CODE ||
+ md->type == EFI_LOADER_DATA ||
+ md->type == EFI_CONVENTIONAL_MEMORY))
+ continue;
+
+ if (efi_mirror_found &&
+ !(md->attribute & EFI_MEMORY_MORE_RELIABLE))
+ continue;
+
+ region.start = md->phys_addr;
+ region.size = md->num_pages << EFI_PA
Re: [PATCH v2 1/6] serial: imx: only set DMA rx-ing when DMA starts
Hello, Le 05/07/2017 à 15:29, Uwe Kleine-König a écrit : > Hello, > > On Wed, Jul 05, 2017 at 03:07:01PM +0200, Romain Perier wrote: >> From: Nandor Han >> >> Avoid the situation when `dma_is_rxing` could incorrectly signal that >> DMA RX channel is receiving data in case DMA preparation or sg mapping >> fails. >> >> This commit fixes the issues by moving the assignment of dma_is_rxing >> out of imx_disable_rx_int(), then the variable is set to 1 from >> start_rx_dma() only when the preparation is correctly done. > I'd write: > > There are a few issues with setting dma_is_rxing to 1 in > imx_disable_rx_int: > >- Currently always after imx_disable_rx_int() the function > start_rx_dma() is called. This dependency isn't obvious though. >- start_rx_dma() does error checking and might exit without enabling > DMA but keeping dma_is_rxing 1. > > So the more natural place for setting dma_is_rxing to 1 is in > start_rx_dma after all errors are checked. > > If you use this, there is nothing left of Nandor Han's patch and you can > drop his authorship. > > Best regards > Uwe > Ok, will do. No other feedback for the rest of the series ? (just to know if I send a v3 or If I wait a bit...) Thanks, Romain
Re: [PATCH v3 2/2] i2c: Add Spreadtrum I2C controller driver
Hi Chunyan, On 一, 7月 03, 2017 at 05:29:57下午 +0800, Chunyan Zhang wrote: > Hi Baolin, > > On 26 June 2017 at 18:28, Baolin Wang wrote: > > This patch adds the I2C controller driver for Spreadtrum SC9860 platform. > > > > Signed-off-by: Baolin Wang > > --- > > Changes since v2: > > - Remove some redundant comments and parens. > > - Define macros instead of magic number. > > - Add some comments to explain clock formula. > > - Change of_clk_get_by_name() to devm_clk_get(). > > - Deal with other frequency. > > - Change register definiton to low case. > > - Change is_last_msg to boolean. > > - Other optimization. > > > > Changes sice v1: > > - Power on I2C device in probe(). > > - Remove redundant macros and usb __maybe_unused. > > - Remove redundant 'of_match_ptr'. > > - Modify return values and check the return value for 'clk_prepare_enable'. > > --- > > drivers/i2c/busses/Kconfig|7 + > > drivers/i2c/busses/Makefile |1 + > > drivers/i2c/busses/i2c-sprd.c | 683 > > + > > 3 files changed, 691 insertions(+) > > create mode 100644 drivers/i2c/busses/i2c-sprd.c > > > > [snip] > > > diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c > > new file mode 100644 > > index 000..a070f61 > > --- /dev/null > > +++ b/drivers/i2c/busses/i2c-sprd.c > > @@ -0,0 +1,683 @@ > > +/* > > + * Copyright (C) 2017 Spreadtrum Communications Inc. > > + * > > + * This software is licensed under the terms of the GNU General Public > > + * License version 2, as published by the Free Software Foundation, and > > + * may be copied, distributed, and modified under those terms. > > + * > > + * This program is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + */ > > According to RobH's comments [1], we're switching to use > SPDX-License-Identifier tag instead, like [2]. > > [1] http://lkml.iu.edu/hypermail/linux/kernel/1702.2/05122.html > [2] > http://elixir.free-electrons.com/linux/v4.12/source/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts#L6 Will use SPDX-License-Identifier tag instead and resend. Thanks. > > Thanks, > Chunyan
Re: [RFC PATCH 1/5] base: dma-mapping: Export commonly used symbols
On Thu, Jul 6, 2017 at 5:26 PM, Arnd Bergmann wrote: > On Thu, Jul 6, 2017 at 3:44 AM, Tomasz Figa wrote: >> On Thu, Jul 6, 2017 at 2:20 AM, Christoph Hellwig wrote: >>> On Thu, Jul 06, 2017 at 12:22:35AM +0900, Tomasz Figa wrote: > >>> In general I think moving dma >>> ops and iommu implementations into modules is a bad idea >> >> Could you elaborate on this? I'd be interested in seeing the reasoning >> behind this. >> >>> but I >>> don't want to reject the idea before seeing the code. Or maybe >>> by looking at the user we can come up with an even better idea >>> to solve the original issue you're trying to solve, so please also >>> explain your rationale. > > I had pretty much the same thoughts here. > >> Basically we have an x86 platform with a camera subsystem that is a >> PCI device, has its own MMU and needs cache maintenance. Moreover, the >> V4L2 subsystem, which is the right place for camera drivers, heavily >> relies on DMA mapping as a way to abstract memory allocation, mapping >> and cache maintenance. So it feels natural to me to hide the hardware >> details (additional cache maintenance, mapping into the built-in >> IOMMU) in the DMA mapping ops for this camera subsystem and simply >> make V4L2 just work without knowing those details. > > I can understand your reasoning here, but I'm also not convinced > that this is the best approach. There may be a middle ground somewhere > though. > > Generally speaking I don't want to have to deal with the horrors of > deciding whether an IOMMU is going to be there eventually or not > at probe() time. At some point, we had decided that IOMMUs need to > be initialized (almost) as early as irqchips and clocksources so we can > rely on them to be there at device discovery time. That got pushed > back already, and now we may have to deal with -EPROBE_DEFER > when an IOMMU has not been fully initialized at device probe time, > but at least we can reliably see if one is there or not. Making IOMMUs > modular will add further uncertainty here. Obviously we cannot attach > an IOMMU to a device once we have started using DMA mapping > calls on it. The hardware can only work with IOMMU and so the main module is highly tied with the IOMMU module and it initialized it directly. There is no separate struct driver or device associated with the IOMMU, as it's a part of the one and only one PCI device (as visible from the system PCI bus point of view) and technically handled by one pci_driver. > > For your particular use case, I would instead leave the knowledge > about the IOMMU in the driver itself, like we do for the IOMMUs > that are integrated in desktop GPUs, and have the code use the > DMA mapping API with the system-provided dma_map_ops to > get dma_addr_t tokens which you then program into the device > IOMMU. > > An open question however would be whether to use the IOMMU > API without the DMA mapping API here, or whether to completely > leave the knowledge of the IOMMU inside of the driver itself. > I don't have a strong opinion on that part, and I guess this mostly > depends on what the hardware looks like. + linux-media and some media folks I'd say that this is something that has been consistently tried to be avoided by V4L2 and that's why it's so tightly integrated with DMA mapping. IMHO re-implementing the code that's already there in videobuf2 again in the driver, only because, for no good reason mentioned as for now, having a loadable module providing DMA ops was disliked. Similarly with IOMMU API. It provides a lot of help in managing the mappings and re-implementing this would be IMHO backwards. Best regards, Tomasz
Re: [PATCH v3 05/16] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set
> >> @@ -1369,27 +1362,57 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap,
> >> struct fb_info *info)
> >>memcpy(g + cmap->start, cmap->green, cmap->len * sizeof(*g));
> >>memcpy(b + cmap->start, cmap->blue, cmap->len * sizeof(*b));
> >>
> >> - for (j = 0; j < cmap->len; j++) {
> >> - u16 hred, hgreen, hblue, htransp = 0x;
> >> + ret = crtc->funcs->gamma_set(crtc, r, g, b,
> >> + crtc->gamma_size, crtc_state);
> >
> > I guess my description of what I have in mind wasn't really clear. I think
> > a proper atomic commit should never reuse one of the old hooks
> > (->gamma_set) here, that's just confusing. Instead what I had in mind is
> > to do the proper adjusting that gamma_set does here in this function, i.e.
> >
> > - create the new blob, fill it with the cmap data
> >
> > - assign that blob to the crtc state:
> >
> > drm_atomic_replace_property_blob(&crtc_state->gamma_lut,
> > new_table, &temp);
>
> That function is static, and...
Missed these comments here. I think we should just make them unstatic,
that might also explain why gamma_set is going this indirect path. Means
we need some kerneldoc, but that's not much work. Ping the original author
if you have questions.
Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
[PATCH] ptp: dte: Use LL suffix for 64-bit constants
With gcc 4.1.2:
drivers/ptp/ptp_dte.c: In function ‘dte_write_nco_delta’:
drivers/ptp/ptp_dte.c:105: warning: integer constant is too large for
‘long’ type
drivers/ptp/ptp_dte.c:112: warning: integer constant is too large for
‘long’ type
drivers/ptp/ptp_dte.c:114: warning: integer constant is too large for
‘long’ type
Add the missing "LL" suffix to fix this.
Fixes: 8a56aa107f1e8123 ("ptp: Add a ptp clock driver for Broadcom DTE")
Signed-off-by: Geert Uytterhoeven
---
drivers/ptp/ptp_dte.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ptp/ptp_dte.c b/drivers/ptp/ptp_dte.c
index 00145a3f1e707451..faf6f7a837137408 100644
--- a/drivers/ptp/ptp_dte.c
+++ b/drivers/ptp/ptp_dte.c
@@ -40,7 +40,7 @@
#define DTE_WRAP_AROUND_NSEC_SHIFT 44
/* 44 bits NCO */
-#define DTE_NCO_MAX_NS 0xFFF
+#define DTE_NCO_MAX_NS 0xFFFLL
/* 125MHz with 3.29 reg cfg */
#define DTE_PPB_ADJ(ppb) (u32)(div64_u64u64)abs(ppb) * BIT(28)) +\
--
2.7.4
[PATCH v3 0/5] Add SoM1 support
Hi all, This series adds support for sama5d2 SoM1 devices. The at91-sama5d27_som1.dtsi add specific bindings for SoM1 board. The at91-sama5d27_som1_ek.dts add specific bindings for SoM1 EK board. Thank you, Claudiu Changes in v3: - remove qspi flash mapping for the moment - remove at24 and i2c bindings; this will be introduced when "Add at24 functionality to read form different EEPROM offsets" patch will be accepted - change the title of patch 5 from this series from "ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to "ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to match the desired prefix Changes in v2: o in at91-sama5d27_som1.dtsi: - increase bootloader and kernel size in flash map (with bootloader flash offset the dtb and kernel flash offsets were changed) - use right pin for ethernet-phy interrupt o in at91-sama5d27_som1_ek.dts: - removed memory tag and rely on bootloader to fill the right value - use pin macros (from arch/arm/boot/dts/sama5d2-pinfunc.h) wherever posible instead of pin numbers - remove pinctrl_sensor_power and pinctrl_sensor_reset pin muxing since they are not of intereset for this board - use "pb4" label for user button instead of "bp1" Claudiu Beznea (2): ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support Cristian Birsan (1): drivers: soc: atmel: Add basic support for new sama5d2 SiPs Cyrille Pitchen (1): ARM: dts: at91: sama5d2: add QSPI nodes Songjun Wu (1): ARM: dts: at91: sama5d2: add isc node arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 + arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 arch/arm/boot/dts/sama5d2.dtsi | 38 ++ drivers/soc/atmel/soc.c | 8 + drivers/soc/atmel/soc.h | 4 + 6 files changed, 780 insertions(+) create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts -- 2.7.4
[PATCH v3 2/5] ARM: dts: at91: sama5d2: add isc node
From: Songjun Wu
Add isc node, it conflicts with pdmic and uart3.
Signed-off-by: Songjun Wu
[claudiu.bez...@microchip.com: place isc node after hlcdc node]
Signed-off-by: Claudiu Beznea
---
arch/arm/boot/dts/sama5d2.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 71e9d83..9d13b55 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -416,6 +416,17 @@
};
};
+ isc: isc@f0008000 {
+ compatible = "atmel,sama5d2-isc";
+ reg = <0xf0008000 0x4000>;
+ interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
+ clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
+ clock-names = "hclock", "iscck", "gck";
+ #clock-cells = <0>;
+ clock-output-names = "isc-mck";
+ status = "disabled";
+ };
+
ramc0: ramc@f000c000 {
compatible = "atmel,sama5d3-ddramc";
reg = <0xf000c000 0x200>;
@@ -925,6 +936,11 @@
atmel,clk-output-range = <0
8300>;
};
+ isc_gclk: isc_gclk {
+ #clock-cells = <0>;
+ reg = <46>;
+ };
+
pdmic_gclk: pdmic_gclk {
#clock-cells = <0>;
reg = <48>;
--
2.7.4
[PATCH v3 5/5] ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support
Add specifig DTS files and bindings for sama5d27 SoM1 EK board.
Signed-off-by: Claudiu Beznea
Signed-off-by: Cristian Birsan
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 537
2 files changed, 538 insertions(+)
create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9449493..3396f73 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
at91sam9x35ek.dtb
dtb-$(CONFIG_SOC_SAM_V7) += \
at91-kizbox2.dtb \
+ at91-sama5d27_som1_ek.dtb \
at91-sama5d2_xplained.dtb \
at91-sama5d3_xplained.dtb \
at91-tse850-3.dtb \
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
new file mode 100644
index 000..9c9088c
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
@@ -0,0 +1,537 @@
+/*
+ * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
+ *
+ * Copyright (c) 2017, Microchip Technology Inc.
+ *2016 Nicolas Ferre
+ *2017 Cristian Birsan
+ *2017 Claudiu Beznea
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "at91-sama5d27_som1.dtsi"
+#include
+#include
+
+/ {
+ model = "Atmel SAMA5D27 SOM1 EK";
+ compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1",
"atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ ahb {
+ usb0: gadget@0030 {
+ atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usba_vbus>;
+ status = "okay";
+ };
+
+ usb1: ohci@0040 {
+ num-ports = <3>;
+ atmel,vbus-gpio = <&pioA PIN_PA10 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+ };
+
+ usb2: ehci@0050 {
+ status = "okay";
+ };
+
+ sdmmc0: sdio-host@a000 {
+ bus-width = <8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc0_default>;
+ status = "okay";
+ };
+
+ sdmmc1: sdio-host@b000 {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc1_default>;
+ status = "okay";
+ };
+
+ apb {
+ isc: isc@f0008000 {
+ pinctrl-names = "default";
+ pinctrl-
[PATCH v3 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs
From: Cristian Birsan
Add basic support for new sama5d2 System in a Package chips.
Signed-off-by: Cristian Birsan
[claudiu.bez...@microchip.com: use MiB instead of MB]
Signed-off-by: Claudiu Beznea
---
drivers/soc/atmel/soc.c | 8
drivers/soc/atmel/soc.h | 4
2 files changed, 12 insertions(+)
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index c1363c8..4dd03b0 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -72,6 +72,8 @@ static const struct at91_soc __initconst socs[] = {
"sama5d21", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
"sama5d22", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D225C_D1M_EXID_MATCH,
+"sama5d225c 16MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
"sama5d23", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
@@ -84,10 +86,16 @@ static const struct at91_soc __initconst socs[] = {
"sama5d27", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
"sama5d27", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D1G_EXID_MATCH,
+"sama5d27c 128MiB SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
+"sama5d27c 64MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
"sama5d28", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
+"sama5d28c 128MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
"sama5d31", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index a90bd5b..94cd5d1 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -64,14 +64,18 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMA5D2_CIDR_MATCH 0x0a5c08c0
#define SAMA5D21CU_EXID_MATCH 0x005a
+#define SAMA5D225C_D1M_EXID_MATCH 0x0053
#define SAMA5D22CU_EXID_MATCH 0x0059
#define SAMA5D22CN_EXID_MATCH 0x0069
#define SAMA5D23CU_EXID_MATCH 0x0058
#define SAMA5D24CX_EXID_MATCH 0x0004
#define SAMA5D24CU_EXID_MATCH 0x0014
#define SAMA5D26CU_EXID_MATCH 0x0012
+#define SAMA5D27C_D1G_EXID_MATCH 0x0033
+#define SAMA5D27C_D5M_EXID_MATCH 0x0032
#define SAMA5D27CU_EXID_MATCH 0x0011
#define SAMA5D27CN_EXID_MATCH 0x0021
+#define SAMA5D28C_D1G_EXID_MATCH 0x0013
#define SAMA5D28CU_EXID_MATCH 0x0010
#define SAMA5D28CN_EXID_MATCH 0x0020
--
2.7.4
[PATCH v3 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
Add specific DTS file and bindings for sama5d27 SoM1 board.
Signed-off-by: Claudiu Beznea
Signed-off-by: Cristian Birsan
---
arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 102 ++
1 file changed, 102 insertions(+)
create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
new file mode 100644
index 000..63a5af8
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
@@ -0,0 +1,102 @@
+/*
+ * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
+ *
+ * Copyright (c) 2017, Microchip Technology Inc.
+ *2017 Cristian Birsan
+ *2017 Claudiu Beznea
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+
+/ {
+ model = "Atmel SAMA5D27 SoM1";
+ compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2",
"atmel,sama5";
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <2400>;
+ };
+ };
+
+ ahb {
+ apb {
+ macb0: ethernet@f8008000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_default>;
+ phy-mode = "rmii";
+
+ ethernet-phy@1 {
+ reg = <0x1>;
+ interrupt-parent = <&pioA>;
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_phy_irq>;
+ };
+ };
+
+ pinctrl@fc038000 {
+
+ pinctrl_macb0_default: macb0_default {
+ pinmux = ,
+,
+,
+,
+,
+,
+,
+,
+,
+;
+ bias-disable;
+ };
+
+ pinctrl_macb0_phy_irq: macb0_phy_irq {
+ pinmux = ;
+ bias-disable;
+ };
+ };
+ };
+ };
+};
--
2.7.4
Re: [PATCH v3 03/16] drm/fb-helper: remove drm_fb_helper_save_lut_atomic
On Tue, Jul 04, 2017 at 12:36:59PM +0200, Peter Rosin wrote:
> drm_fb_helper_save_lut_atomic is redundant since the .gamma_store is
> now always kept up to date by drm_fb_helper_setcmap.
>
> Signed-off-by: Peter Rosin
Merged up to this patch to drm-misc-next, thanks. Pleas base your next
round of patches on top of that tree (or drm-tip if you feel like).
-Daniel
> ---
> drivers/gpu/drm/drm_fb_helper.c | 17 -
> 1 file changed, 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index 41fd9e0..b75b1f2 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -253,22 +253,6 @@ int drm_fb_helper_remove_one_connector(struct
> drm_fb_helper *fb_helper,
> }
> EXPORT_SYMBOL(drm_fb_helper_remove_one_connector);
>
> -static void drm_fb_helper_save_lut_atomic(struct drm_crtc *crtc, struct
> drm_fb_helper *helper)
> -{
> - uint16_t *r_base, *g_base, *b_base;
> - int i;
> -
> - if (helper->funcs->gamma_get == NULL)
> - return;
> -
> - r_base = crtc->gamma_store;
> - g_base = r_base + crtc->gamma_size;
> - b_base = g_base + crtc->gamma_size;
> -
> - for (i = 0; i < crtc->gamma_size; i++)
> - helper->funcs->gamma_get(crtc, &r_base[i], &g_base[i],
> &b_base[i], i);
> -}
> -
> static void drm_fb_helper_restore_lut_atomic(struct drm_crtc *crtc)
> {
> uint16_t *r_base, *g_base, *b_base;
> @@ -309,7 +293,6 @@ int drm_fb_helper_debug_enter(struct fb_info *info)
> if (drm_drv_uses_atomic_modeset(mode_set->crtc->dev))
> continue;
>
> - drm_fb_helper_save_lut_atomic(mode_set->crtc, helper);
> funcs->mode_set_base_atomic(mode_set->crtc,
> mode_set->fb,
> mode_set->x,
> --
> 2.1.4
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
[PATCH v3 1/5] ARM: dts: at91: sama5d2: add QSPI nodes
From: Cyrille Pitchen
This patch adds DT nodes for sama5d2 QSPI controllers.
Signed-off-by: Cyrille Pitchen
[claudiu.bez...@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea
---
arch/arm/boot/dts/sama5d2.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index cc06da3..71e9d83 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -954,6 +954,28 @@
};
};
+ qspi0: spi@f002 {
+ compatible = "atmel,sama5d2-qspi";
+ reg = <0xf002 0x100>, <0xd000
0x0800>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&qspi0_clk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ qspi1: spi@f0024000 {
+ compatible = "atmel,sama5d2-qspi";
+ reg = <0xf0024000 0x100>, <0xd800
0x0800>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&qspi1_clk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
sha@f0028000 {
compatible = "atmel,at91sam9g46-sha";
reg = <0xf0028000 0x100>;
--
2.7.4
