Re: [PATCH v2 0/2] kbuild: cleanup asm-offset generation, and make it work with clang

2017-04-23 Thread Masahiro Yamada
2017-04-21 15:21 GMT+09:00 Masahiro Yamada :
> 1/2 is a trivial cleanup of sed script
>
> 2/2 imports clang work-around from U-Boot.


Series, applied to linux-kbuild/kbuild.


-- 
Best Regards
Masahiro Yamada


[PATCH 1/1] mt7601u: check return value of alloc_skb

2017-04-23 Thread Pan Bian
Function alloc_skb() will return a NULL pointer if there is no enough
memory. However, in function mt7601u_mcu_msg_alloc(), its return value
is not validated before it is used. This patch fixes it.

Signed-off-by: Pan Bian 
---
 drivers/net/wireless/mediatek/mt7601u/mcu.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/mediatek/mt7601u/mcu.c 
b/drivers/net/wireless/mediatek/mt7601u/mcu.c
index dbdfb3f..a9f5f39 100644
--- a/drivers/net/wireless/mediatek/mt7601u/mcu.c
+++ b/drivers/net/wireless/mediatek/mt7601u/mcu.c
@@ -66,8 +66,10 @@ static inline void trace_mt_mcu_msg_send_cs(struct 
mt7601u_dev *dev,
WARN_ON(len % 4); /* if length is not divisible by 4 we need to pad */
 
skb = alloc_skb(len + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
-   skb_reserve(skb, MT_DMA_HDR_LEN);
-   memcpy(skb_put(skb, len), data, len);
+   if (skb) {
+   skb_reserve(skb, MT_DMA_HDR_LEN);
+   memcpy(skb_put(skb, len), data, len);
+   }
 
return skb;
 }
@@ -170,6 +172,8 @@ static int mt7601u_mcu_function_select(struct mt7601u_dev 
*dev,
};
 
skb = mt7601u_mcu_msg_alloc(dev, &msg, sizeof(msg));
+   if (!skb)
+   return -ENOMEM;
return mt7601u_mcu_msg_send(dev, skb, CMD_FUN_SET_OP, func == 5);
 }
 
@@ -205,6 +209,8 @@ int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int 
use_hvga)
};
 
skb = mt7601u_mcu_msg_alloc(dev, &msg, sizeof(msg));
+   if (!skb)
+   return -ENOMEM;
return mt7601u_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP, true);
 }
 
-- 
1.9.1




[PATCH 1/1] tipc: check return value of nlmsg_new

2017-04-23 Thread Pan Bian
Function nlmsg_new() will return a NULL pointer if there is no enough
memory, and its return value should be checked before it is used.
However, in function tipc_nl_node_get_monitor(), the validation of the
return value of function nlmsg_new() is missed. This patch fixes the
bug.

Signed-off-by: Pan Bian 
---
 net/tipc/node.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/tipc/node.c b/net/tipc/node.c
index 4512e83..568e48d 100644
--- a/net/tipc/node.c
+++ b/net/tipc/node.c
@@ -2098,6 +2098,8 @@ int tipc_nl_node_get_monitor(struct sk_buff *skb, struct 
genl_info *info)
int err;
 
msg.skb = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
+   if (!msg.skb)
+   return -ENOMEM;
msg.portid = info->snd_portid;
msg.seq = info->snd_seq;
 
-- 
1.9.1




Re: [PATCH] kbuild: drop -Wno-unknown-warning-option from clang options

2017-04-23 Thread Masahiro Yamada
2017-04-13 7:25 GMT+09:00 Masahiro Yamada :
> Since commit c3f0d0bc5b01 ("kbuild, LLVMLinux: Add -Werror to
> cc-option to support clang"), cc-option and friends work correctly
> for clang.
>
> However, the combination of -Werror and -Wno-unknown-warning-option
> makes clang happy with any unknown warning options.
>
> Once -Wno-unknown-warning-option is added, any succeeding call of
> cc-disable-warning is evaluated positive, then unknown warning
> options are accepted.  This should be dropped.
>
> Signed-off-by: Masahiro Yamada 


Applied to linux-kbuild/kbuild.



-- 
Best Regards
Masahiro Yamada


Re: [PATCH 1/1] tipc: check return value of nlmsg_new

2017-04-23 Thread Joe Perches
On Sun, 2017-04-23 at 15:09 +0800, Pan Bian wrote:
> Function nlmsg_new() will return a NULL pointer if there is no enough
> memory, and its return value should be checked before it is used.
> However, in function tipc_nl_node_get_monitor(), the validation of the
> return value of function nlmsg_new() is missed. This patch fixes the
> bug.

Hello.

Thanks for the patches.

Are you finding these via a tool or inspection?

If a tool is being used, could you please describe it?



[PATCH v2 1/2] tiocsti-restrict : Add owner user namespace to tty_struct

2017-04-23 Thread Matt Brown
This patch adds struct user_namespace *owner_user_ns to the tty_struct.
Then it is set to current_user_ns() in the alloc_tty_struct function.

This is done to facilitate capability checks against the original user
namespace that allocated the tty.

E.g. ns_capable(tty->owner_user_ns,CAP_SYS_ADMIN)

This combined with the use of user namespace's will allow hardening
protections to be built to mitigate container escapes that utilize TTY
ioctls such as TIOCSTI.

See: https://bugzilla.redhat.com/show_bug.cgi?id=1411256

Signed-off-by: Matt Brown 
---
 drivers/tty/tty_io.c | 1 +
 include/linux/tty.h  | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index e6d1a65..e774385 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -3191,6 +3191,7 @@ struct tty_struct *alloc_tty_struct(struct tty_driver 
*driver, int idx)
tty->index = idx;
tty_line_name(driver, idx, tty->name);
tty->dev = tty_get_device(tty);
+   tty->owner_user_ns = current_user_ns();
 
return tty;
 }
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 1017e904..d902d42 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 
 /*
@@ -333,6 +334,7 @@ struct tty_struct {
/* If the tty has a pending do_SAK, queue it here - akpm */
struct work_struct SAK_work;
struct tty_port *port;
+   struct user_namespace *owner_user_ns;
 };
 
 /* Each of a tty's open files has private_data pointing to tty_file_private */
-- 
2.10.2



[PATCH v2 2/2] tiocsti-restrict : make TIOCSTI ioctl require CAP_SYS_ADMIN

2017-04-23 Thread Matt Brown
This introduces the tiocsti_restrict sysctl, whose default is controlled via
CONFIG_SECURITY_TIOCSTI_RESTRICT. When activated, this control restricts
all TIOCSTI ioctl calls from non CAP_SYS_ADMIN users.

This patch was inspired from GRKERNSEC_HARDEN_TTY.

This patch would have prevented
https://bugzilla.redhat.com/show_bug.cgi?id=1411256 under the following
conditions:
* non-privileged container
* container run inside new user namespace

Possible effects on userland:

There could be a few user programs that would be effected by this
change.
See: 
notable programs are: agetty, csh, xemacs and tcsh

However, I still believe that this change is worth it given that the
Kconfig defaults to n. This will be a feature that is turned on for the
same reason that people activate it when using grsecurity. Users of this
opt-in feature will realize that they are choosing security over some OS
features like unprivileged TIOCSTI ioctls, as should be clear in the
Kconfig help message.

Threat Model/Patch Rational:

>From grsecurity's config for GRKERNSEC_HARDEN_TTY.

 | There are very few legitimate uses for this functionality and it
 | has made vulnerabilities in several 'su'-like programs possible in
 | the past.  Even without these vulnerabilities, it provides an
 | attacker with an easy mechanism to move laterally among other
 | processes within the same user's compromised session.

So if one process within a tty session becomes compromised it can follow
that additional processes, that are thought to be in different security
boundaries, can be compromised as a result. When using a program like su
or sudo, these additional processes could be in a tty session where TTY file
descriptors are indeed shared over privilege boundaries.

This is also an excellent writeup about the issue:


When user namespaces are in use, the check for the capability
CAP_SYS_ADMIN is done against the user namespace that originally opened
the tty.

Signed-off-by: Matt Brown 
---
 Documentation/sysctl/kernel.txt | 21 +
 drivers/tty/tty_io.c|  6 ++
 include/linux/tty.h |  2 ++
 kernel/sysctl.c | 12 
 security/Kconfig| 13 +
 5 files changed, 54 insertions(+)

diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt
index bac23c1..c15c660 100644
--- a/Documentation/sysctl/kernel.txt
+++ b/Documentation/sysctl/kernel.txt
@@ -89,6 +89,7 @@ show up in /proc/sys/kernel:
 - sysctl_writes_strict
 - tainted
 - threads-max
+- tiocsti_restrict
 - unknown_nmi_panic
 - watchdog
 - watchdog_thresh
@@ -987,6 +988,26 @@ available RAM pages threads-max is reduced accordingly.
 
 ==
 
+tiocsti_restrict:
+
+This toggle indicates whether unprivileged users are prevented
+from using the TIOCSTI ioctl to inject commands into otherprocesses
+which share a tty session.
+
+When tiocsti_restrict is set to (0) there are no restrictions(accept
+the default restriction of only being able to injection commands into
+one's own tty). When tiocsti_restrict is set to (1), users must
+have CAP_SYS_ADMIN to use the TIOCSTI ioctl.
+
+When user namespaces are in use, the check for the capability
+CAP_SYS_ADMIN is done against the user namespace that originally
+opened the tty.
+
+The kernel config option CONFIG_SECURITY_TIOCSTI_RESTRICT sets the
+default value of tiocsti_restrict.
+
+==
+
 unknown_nmi_panic:
 
 The value in this file affects behavior of handling NMI. When the
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index e774385..2e15dca 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -2296,11 +2296,17 @@ static int tty_fasync(int fd, struct file *filp, int on)
  * FIXME: may race normal receive processing
  */
 
+int tiocsti_restrict = IS_ENABLED(CONFIG_SECURITY_TIOCSTI_RESTRICT);
+
 static int tiocsti(struct tty_struct *tty, char __user *p)
 {
char ch, mbz = 0;
struct tty_ldisc *ld;
 
+   if (tiocsti_restrict && !ns_capable(tty->owner_user_ns,CAP_SYS_ADMIN)) {
+   pr_warn_ratelimited("TIOCSTI ioctl call blocked for 
non-privileged process\n");
+   return -EPERM;
+   }
if ((current->signal->tty != tty) && !capable(CAP_SYS_ADMIN))
return -EPERM;
if (get_user(ch, p))
diff --git a/include/linux/tty.h b/include/linux/tty.h
index d902d42..2fd7f49 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -344,6 +344,8 @@ struct tty_file_private {
struct list_head list;
 };
 
+extern int tiocsti_restrict;
+
 /* tty magic number */
 #define TTY_MAGIC  0x5401
 
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index acf0a5a..68d1363 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ 

[PATCH 1/2] team: fix memory leak

2017-04-23 Thread Pan Bian
In function team_nl_send_port_list_get(), pointer skb keeps the return
value of nlmsg_new(). When the call to genlmsg_put() fails, the memory
is not freed. This will result in a memory leak bug. This patch fixes
it.

Signed-off-by: Pan Bian 
---
 drivers/net/team/team.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index f8c81f1..dd3a2e9 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -2634,8 +2634,10 @@ static int team_nl_send_port_list_get(struct team *team, 
u32 portid, u32 seq,
 
hdr = genlmsg_put(skb, portid, seq, &team_nl_family, flags | 
NLM_F_MULTI,
  TEAM_CMD_PORT_LIST_GET);
-   if (!hdr)
+   if (!hdr) {
+   nlmsg_free(skb);
return -EMSGSIZE;
+   }
 
if (nla_put_u32(skb, TEAM_ATTR_TEAM_IFINDEX, team->dev->ifindex))
goto nla_put_failure;
-- 
1.9.1




[PATCH 2/2] team: fix memory leak

2017-04-23 Thread Pan Bian
In function team_nl_send_options_get(), pointer skb keeps the return
value of function nlmsg_new(). When the call to genlmsg_put() fails, the
control flow directly returns and does not free skb. This will result in
a memory leak bug. This patch fixes it.

Signed-off-by: Pan Bian 
---
 drivers/net/team/team.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index dd3a2e9..85c0124 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -2361,8 +2361,10 @@ static int team_nl_send_options_get(struct team *team, 
u32 portid, u32 seq,
 
hdr = genlmsg_put(skb, portid, seq, &team_nl_family, flags | 
NLM_F_MULTI,
  TEAM_CMD_OPTIONS_GET);
-   if (!hdr)
+   if (!hdr) {
+   nlmsg_free(skb);
return -EMSGSIZE;
+   }
 
if (nla_put_u32(skb, TEAM_ATTR_TEAM_IFINDEX, team->dev->ifindex))
goto nla_put_failure;
-- 
1.9.1




Re: [PATCH v2 03/12] IB/ocrdma: Improve size determinations in ten functions

2017-04-23 Thread Leon Romanovsky
On Sat, Apr 22, 2017 at 04:36:19PM +0200, SF Markus Elfring wrote:
> From: Markus Elfring 
> Date: Sat, 22 Apr 2017 13:26:49 +0200
>
> Replace the specification of data types by pointer dereferences
> as the parameter for the operator "sizeof" to make the corresponding size
> determinations a bit safer according to the Linux coding style convention.
>
> Signed-off-by: Markus Elfring 
> ---
>
> v2:
> Changes were rebased on source files from Linux next-20170421.
> These were recombined as requested by Doug Ledford.

Hi Doug,

I recommend you to be extra cautious with this blind automatic
conversions. It requires inspection that every size before and after
match each other.

I already asked it and would be like to repeat it. Please DON'T take any
patches from Markus, which are related to mlx4/mlx5/rxe without our explicit
review of them.

Thanks

>
>  drivers/infiniband/hw/ocrdma/ocrdma_hw.c| 28 
>  drivers/infiniband/hw/ocrdma/ocrdma_main.c  |  2 +-
>  drivers/infiniband/hw/ocrdma/ocrdma_verbs.c |  4 ++--
>  3 files changed, 15 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c 
> b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c
> index d5a3127b6df8..7e58a74102f6 100644
> --- a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c
> +++ b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c
> @@ -352,7 +352,7 @@ static void *ocrdma_init_emb_mqe(u8 opcode, u32 cmd_len)
>  {
>   struct ocrdma_mqe *mqe;
>
> - mqe = kzalloc(sizeof(struct ocrdma_mqe), GFP_KERNEL);
> + mqe = kzalloc(sizeof(*mqe), GFP_KERNEL);
>   if (!mqe)
>   return NULL;
>   mqe->hdr.spcl_sge_cnt_emb |=
> @@ -890,7 +890,7 @@ static int ocrdma_mq_cq_handler(struct ocrdma_dev *dev, 
> u16 cq_id)
>   ocrdma_process_acqe(dev, cqe);
>   else if (cqe->valid_ae_cmpl_cons & OCRDMA_MCQE_CMPL_MASK)
>   ocrdma_process_mcqe(dev, cqe);
> - memset(cqe, 0, sizeof(struct ocrdma_mcqe));
> + memset(cqe, 0, sizeof(*cqe));
>   ocrdma_mcq_inc_tail(dev);
>   }
>   ocrdma_ring_cq_db(dev, dev->mq.cq.id, true, false, cqe_popped);
> @@ -1302,7 +1302,7 @@ int ocrdma_mbx_rdma_stats(struct ocrdma_dev *dev, bool 
> reset)
>   mqe->u.nonemb_req.sge[0].len = dev->stats_mem.size;
>
>   /* Cache the old stats */
> - memcpy(old_stats, req, sizeof(struct ocrdma_rdma_stats_resp));
> + memcpy(old_stats, req, sizeof(*old_stats));
>   memset(req, 0, dev->stats_mem.size);
>
>   ocrdma_init_mch((struct ocrdma_mbx_hdr *)req,
> @@ -1315,7 +1315,7 @@ int ocrdma_mbx_rdma_stats(struct ocrdma_dev *dev, bool 
> reset)
>   status = ocrdma_nonemb_mbx_cmd(dev, mqe, dev->stats_mem.va);
>   if (status)
>   /* Copy from cache, if mbox fails */
> - memcpy(req, old_stats, sizeof(struct ocrdma_rdma_stats_resp));
> + memcpy(req, old_stats, sizeof(*old_stats));
>   else
>   ocrdma_le32_to_cpu(req, dev->stats_mem.size);
>
> @@ -1331,7 +1331,7 @@ static int ocrdma_mbx_get_ctrl_attribs(struct 
> ocrdma_dev *dev)
>   struct ocrdma_get_ctrl_attribs_rsp *ctrl_attr_rsp;
>   struct mgmt_hba_attribs *hba_attribs;
>
> - mqe = kzalloc(sizeof(struct ocrdma_mqe), GFP_KERNEL);
> + mqe = kzalloc(sizeof(*mqe), GFP_KERNEL);
>   if (!mqe)
>   return status;
>
> @@ -1595,8 +1595,7 @@ void ocrdma_alloc_pd_pool(struct ocrdma_dev *dev)
>  {
>   int status;
>
> - dev->pd_mgr = kzalloc(sizeof(struct ocrdma_pd_resource_mgr),
> -   GFP_KERNEL);
> + dev->pd_mgr = kzalloc(sizeof(*dev->pd_mgr), GFP_KERNEL);
>   if (!dev->pd_mgr)
>   return;
>
> @@ -2487,7 +2486,7 @@ int ocrdma_mbx_query_qp(struct ocrdma_dev *dev, struct 
> ocrdma_qp *qp,
>   if (status)
>   goto mbx_err;
>   rsp = (struct ocrdma_query_qp_rsp *)cmd;
> - memcpy(param, &rsp->params, sizeof(struct ocrdma_qp_params));
> + memcpy(param, &rsp->params, sizeof(*param));
>  mbx_err:
>   kfree(cmd);
>   return status;
> @@ -2901,9 +2900,8 @@ static int ocrdma_mbx_get_dcbx_config(struct ocrdma_dev 
> *dev, u32 ptype,
>   struct pci_dev *pdev = dev->nic_info.pdev;
>   struct ocrdma_mqe_sge *mqe_sge = cmd.u.nonemb_req.sge;
>
> - memset(&cmd, 0, sizeof(struct ocrdma_mqe));
> - cmd.hdr.pyld_len = max_t (u32, sizeof(struct ocrdma_get_dcbx_cfg_rsp),
> - sizeof(struct ocrdma_get_dcbx_cfg_req));
> + memset(&cmd, 0, sizeof(cmd));
> + cmd.hdr.pyld_len = max_t(u32, sizeof(*rsp), sizeof(*req));
>   req = dma_alloc_coherent(&pdev->dev, cmd.hdr.pyld_len, &pa, GFP_KERNEL);
>   if (!req) {
>   status = -ENOMEM;
> @@ -2915,8 +2913,7 @@ static int ocrdma_mbx_get_dcbx_config(struct ocrdma_dev 
> *dev, u32 ptype,
>   mqe_sge->pa_lo = (u32) (pa & 0xUL);
>   mqe_sge->pa_hi = (u32) upper_32_bits(pa);
>   mqe_sge->len = cmd.hdr.pyld_len;

Re: [PATCH 1/1] tipc: check return value of nlmsg_new

2017-04-23 Thread PanBian
On Sun, Apr 23, 2017 at 12:17:16AM -0700, Joe Perches wrote:
> On Sun, 2017-04-23 at 15:09 +0800, Pan Bian wrote:
> > Function nlmsg_new() will return a NULL pointer if there is no enough
> > memory, and its return value should be checked before it is used.
> > However, in function tipc_nl_node_get_monitor(), the validation of the
> > return value of function nlmsg_new() is missed. This patch fixes the
> > bug.
> 
> Hello.
> 
> Thanks for the patches.
> 
> Are you finding these via a tool or inspection?
> 
> If a tool is being used, could you please describe it?
> 

Yes. I developed a tool to find this kind of bugs.

The detecting idea is simple. In large systems like the Linux kernel, 
most implementations are correct, and incorrect ones are rare. Based on
this observation, we take programs that have different implementations
with others as bugs. For example, in most cases, the return vlaue of
nlmsg_new() is validated and it will not be passed to genlmsg_reply() if
its value is NULL. However, in function tipc_nl_node_get_monitor(), the
validation is missing. The abnormal behavior leads us to believe that
there is a bug.


Thanks for your attention.



undefined reference to`ccu_gate_helper_disable in clk/sunxi-ng/ccu_common on linux-next

2017-04-23 Thread Corentin Labbe
Hello

I got this build error with linux-next-20170421
  MODPOST vmlinux.o
drivers/built-in.o: In function `ccu_pll_notifier_cb':
drivers/clk/sunxi-ng/ccu_common.c:71: undefined reference to 
`ccu_gate_helper_disable'
drivers/clk/sunxi-ng/ccu_common.c:73: undefined reference to 
`ccu_gate_helper_enable'
make[1]: *** [/linux-next/Makefile:987: vmlinux] Error 1

I have attached my .config

Regards
Corentin Labbe
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.11.0-rc7 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_VECTORS_BASE=0x
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_GENERIC_BUG=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y

#
# General setup
#
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_LZ4=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
# CONFIG_KERNEL_LZ4 is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
# CONFIG_USELIB is not set
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_WATCH=y
CONFIG_AUDIT_TREE=y

#
# IRQ subsystem
#
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_HANDLE_DOMAIN_IRQ=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y

#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
# CONFIG_NO_HZ_FULL is not set
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y

#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y

#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
CONFIG_TREE_SRCU=y
# CONFIG_TASKS_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
CONFIG_BUILD_BIN2C=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_CGROUPS=y
# CONFIG_MEMCG is not set
CONFIG_BLK_CGROUP=y
# CONFIG_DEBUG_BLK_CGROUP is not set
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
# CONFIG_CGROUP_PIDS is not set
# CONFIG_CGROUP_RDMA is not set
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_SOCK_CGROUP_DATA is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
CONFIG_IPC_NS=y
CONFIG_USER_NS=y
CONFIG_PID_NS=y
CONFIG_NET_NS=y
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
CONFIG_BPF=y
# CONFIG_EXPERT is not set
CONFIG_UID16=y
CONFIG_MULTIUSER=y
# CONFIG_SGETMASK_SYSCALL is not set
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_POSIX_TIMERS=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_USERFAULTFD=y
CONFIG_MEMBARRIER=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
# CONFIG_PC104 is not set

#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CO

Re: [PATCH 1/3] nvme: Fix APST comment

2017-04-23 Thread Christoph Hellwig
On Fri, Apr 21, 2017 at 04:19:22PM -0700, Andy Lutomirski wrote:
> There was a typo in the description of the timeout heuristic.

Looks good,

Reviewed-by: Christoph Hellwig 


Re: [PATCH 2/3] nvme: Display raw APST configuration via DYNAMIC_DEBUG

2017-04-23 Thread Christoph Hellwig
Looks good,

Reviewed-by: Christoph Hellwig 


Re: [PATCH 3/3] nvme: Add nvme_core.force_apst to ignore the NO_APST quirk

2017-04-23 Thread Christoph Hellwig
Looks fine,

Reviewed-by: Christoph Hellwig 


Re: [PATCH 1/1] tipc: check return value of nlmsg_new

2017-04-23 Thread Joe Perches
On Sun, 2017-04-23 at 16:00 +0800, PanBian wrote:
> On Sun, Apr 23, 2017 at 12:17:16AM -0700, Joe Perches wrote:
> > On Sun, 2017-04-23 at 15:09 +0800, Pan Bian wrote:
> > > Function nlmsg_new() will return a NULL pointer if there is no enough
> > > memory, and its return value should be checked before it is used.
> > > However, in function tipc_nl_node_get_monitor(), the validation of the
> > > return value of function nlmsg_new() is missed. This patch fixes the
> > > bug.
> > 
> > Hello.
> > 
> > Thanks for the patches.
> > 
> > Are you finding these via a tool or inspection?
> > 
> > If a tool is being used, could you please describe it?
> > 
> 
> Yes. I developed a tool to find this kind of bugs.
> 
> The detecting idea is simple. In large systems like the Linux kernel, 
> most implementations are correct, and incorrect ones are rare. Based on
> this observation, we take programs that have different implementations
> with others as bugs. For example, in most cases, the return vlaue of
> nlmsg_new() is validated and it will not be passed to genlmsg_reply() if
> its value is NULL. However, in function tipc_nl_node_get_monitor(), the
> validation is missing. The abnormal behavior leads us to believe that
> there is a bug.

Perhaps adding __must_check to some of the appropriate function
declarations/prototypes would help avoid new future misuses.



[PATCH 0/2] Add PCIe host driver support for some Mediatek SoCs

2017-04-23 Thread Ryder Lee
Hi,

This patch series add PCIe host controller driver and dt-binding
documentation for Mediatek mt7623 SoCs families.

This driver was validated using Broadcom Tigon3 ethernet card.

Ryder Lee (2):
  PCI: mediatek: Add Mediatek PCIe host controller support
  dt-bindings: pcie: Add documentation for Mediatek PCIe

 .../bindings/pci/mediatek,mt7623-pcie.txt  | 153 ++
 drivers/pci/host/Kconfig   |  11 +
 drivers/pci/host/Makefile  |   1 +
 drivers/pci/host/pcie-mediatek.c   | 611 +
 4 files changed, 776 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pci/mediatek,mt7623-pcie.txt
 create mode 100644 drivers/pci/host/pcie-mediatek.c

-- 
1.9.1



[PATCH 1/2] phy: add PCIe phy driver for mt7623 SoCs families

2017-04-23 Thread Ryder Lee
support PCIe phy of mt7623 SoCs families

Signed-off-by: Ryder Lee 
---
 drivers/phy/Kconfig   |   9 ++
 drivers/phy/Makefile  |   1 +
 drivers/phy/phy-mt7623-pcie.c | 290 ++
 3 files changed, 300 insertions(+)
 create mode 100644 drivers/phy/phy-mt7623-pcie.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index dc5277a..00ab313 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -518,4 +518,13 @@ config PHY_NSP_USB3
help
  Enable this to support the Broadcom Northstar plus USB3 PHY.
  If unsure, say N.
+
+config PHY_MT7623_PCIE
+   tristate "Mediatek PCIe PHY driver for MT7623 SoC families"
+   depends on ARCH_MEDIATEK && OF
+   select GENERIC_PHY
+   select MFD_SYSCON
+   help
+ Say 'Y' here to add support for Mediatek PCIe PHY driver which
+ can be found on the MT7623 SoC families.
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index e7b0feb..95032d6 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -63,3 +63,4 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
 obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
 obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
 obj-$(CONFIG_PHY_NSP_USB3) += phy-bcm-nsp-usb3.o
+obj-$(CONFIG_PHY_MT7623_PCIE)  += phy-mt7623-pcie.o
diff --git a/drivers/phy/phy-mt7623-pcie.c b/drivers/phy/phy-mt7623-pcie.c
new file mode 100644
index 000..4096c12
--- /dev/null
+++ b/drivers/phy/phy-mt7623-pcie.c
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ryder Lee 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Offsets of sub-segment in each port registers */
+#define PCIE_SIFSLV_PHYD_BANK2_BASE0xa00
+#define SSUSB_SIFSLV_PHYA_BASE 0xb00
+#define SSUSB_SIFSLV_PHYA_DA_BASE  0xc00
+
+/*
+ * RX detection stable - 1 scale represent 8 reference cycles
+ * cover reference clock from 1M~100MHz, 7us~40us
+ */
+#define B2_PHYD_RXDET1 (PCIE_SIFSLV_PHYD_BANK2_BASE + 0x28)
+#define RG_SSUSB_RXDET_STB2GENMASK(17, 9)
+#define RG_SSUSB_RXDET_STB2_VAL(x) ((0x1ff & (x)) << 9)
+
+#define B2_PHYD_RXDET2 (PCIE_SIFSLV_PHYD_BANK2_BASE + 0x2c)
+#define RG_SSUSB_RXDET_STB2_P3 GENMASK(8, 0)
+#define RG_SSUSB_RXDET_STB2_P3_VAL(x)  (0x1ff & (x))
+
+#define U3_PHYA_REG0   (SSUSB_SIFSLV_PHYA_BASE + 0x00)
+#define RG_PCIE_CLKDRV_OFFSET  GENMASK(3, 1)
+#define RG_PCIE_CLKDRV_OFFSET_VAL(x)   ((0x3 & (x)) << 2)
+
+#define U3_PHYA_REG1   (SSUSB_SIFSLV_PHYA_BASE + 0x04)
+#define RG_PCIE_CLKDRV_AMP GENMASK(31, 29)
+#define RG_PCIE_CLKDRV_AMP_VAL(x)  ((0x7 & (x)) << 29)
+
+#define DA_SSUSB_CDR_REFCK_SEL (SSUSB_SIFSLV_PHYA_DA_BASE + 0x00)
+#define RG_SSUSB_XTAL_EXT_PE1H GENMASK(13, 12)
+#define RG_SSUSB_XTAL_EXT_PE1H_VAL(x)  ((0x3 & (x)) << 12)
+#define RG_SSUSB_XTAL_EXT_PE2H GENMASK(17, 16)
+#define RG_SSUSB_XTAL_EXT_PE2H_VAL(x)  ((0x3 & (x)) << 16)
+
+#define DA_SSUSB_PLL_IC(SSUSB_SIFSLV_PHYA_DA_BASE + 
0x0c)
+#define RG_SSUSB_PLL_IC_PE2H   GENMASK(15, 12)
+#define RG_SSUSB_PLL_IC_PE2H_VAL(x)((0xf & (x)) << 12)
+#define RG_SSUSB_PLL_BR_PE2H   GENMASK(29, 28)
+#define RG_SSUSB_PLL_BR_PE2H_VAL(x)((0x3 & (x)) << 28)
+
+#define DA_SSUSB_PLL_BC(SSUSB_SIFSLV_PHYA_DA_BASE + 
0x08)
+#define RG_SSUSB_PLL_DIVEN_PE2HGENMASK(21, 19)
+#define RG_SSUSB_PLL_BC_PE2H   GENMASK(7, 6)
+#define RG_SSUSB_PLL_BC_PE2H_VAL(x)((0x3 & (x)) << 6)
+
+#define DA_SSUSB_PLL_IR(SSUSB_SIFSLV_PHYA_DA_BASE + 
0x10)
+#define RG_SSUSB_PLL_IR_PE2H   GENMASK(19, 16)
+#define RG_SSUSB_PLL_IR_PE2H_VAL(x)((0xf & (x)) << 16)
+
+#define DA_SSUSB_PLL_BP(SSUSB_SIFSLV_PHYA_DA_BASE + 
0x14)
+#define RG_SSUSB_PLL_BP_PE2H   GENMASK(19, 16)
+#define RG_SSUSB_PLL_BP_PE2H_VAL(x)((0xf & (x)) << 16)
+
+#define DA_SSUSB_PLL_SSC_DELTA1_REG20  (SSUSB_SIFSLV_PHYA_DA_BASE + 0x3c)
+#define RG_SSUSB_PLL_SSC_DELTA1_PE2H   GENMASK(31, 16)
+#define RG_SSUSB_PLL_SSC_DELTA1_PE2H_VAL(x)((0x & (x)) << 16)
+
+#define DA_SSUSB_PLL_SSC_DELTA_REG25   (SSUSB_SIFSLV_PHYA_DA_BASE + 0x48)
+#define RG_SSUSB_PLL_SSC_DELTA_PE2HGENMASK(15, 0)
+#define RG_SSUSB_PLL_SSC_DELTA_PE2H_VAL(x) (0x & (x))

[PATCH 2/2] dt-bindings: phy: Add documentation for Mediatek PCIe PHY

2017-04-23 Thread Ryder Lee
Add documentation for PCIe PHY available in MT7623 series SoCs.

Signed-off-by: Ryder Lee 
---
 .../devicetree/bindings/phy/phy-mt7623-pcie.txt| 67 ++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt 
b/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
new file mode 100644
index 000..27a9253
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
@@ -0,0 +1,67 @@
+Mediatek MT7623 PCIe PHY
+---
+
+Required properties:
+ - compatible: Should contain "mediatek,mt7623-pcie-phy"
+ - #phy-cells: must be 0
+ - clocks: Must contain an entry in clock-names.
+   See ../clocks/clock-bindings.txt for details.
+ - clock-names: Must be "refclk"
+ - resets: Must contain an entry in reset-names.
+   See ../reset/reset.txt for details.
+ - reset-names: Must be "phy"
+
+Optional properties:
+ - phy-switch: The PHY on PCIe port2 is shared with USB u3phy2. If you
+   want to enable port2, you should contain it.
+
+Example:
+
+   pcie0_phy: pciephy@1a149000 {
+   compatible = "mediatek,mt7623-pcie-phy";
+   reg = <0 0x1a149000 0 0x1000>;
+   clocks = <&clk26m>;
+   clock-names = "pciephya_ref";
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
+   pcie1_phy: pciephy@1a14a000 {
+   compatible = "mediatek,mt7623-pcie-phy";
+   reg = <0 0x1a14a000 0 0x1000>;
+   clocks = <&clk26m>;
+   clock-names = "pciephya_ref";
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+
+   pcie2_phy: pciephy@1a244000 {
+   compatible = "mediatek,mt7623-pcie-phy";
+   reg = <0 0x1a244000 0 0x1000>;
+   clocks = <&clk26m>;
+   clock-names = "pciephya_ref";
+   #phy-cells = <0>;
+
+   phy-switch = <&hifsys>;
+   status = "disabled";
+   };
+
+Specifying phy control of devices
+-
+
+Device nodes should specify the configuration required in their "phys"
+property, containing a phandle to the phy node and phy-names.
+
+Example:
+
+#include 
+
+pcie: pcie@1a14 {
+   ...
+   pcie@1,0 {
+   ...
+   phys = <&pcie0_phy>;
+   phy-names = "pcie-phy0";
+   }
+   ...
+};
-- 
1.9.1



[PATCH 2/2] dt-bindings: pcie: Add documentation for Mediatek PCIe

2017-04-23 Thread Ryder Lee
Add documentation for PCIe host driver available in MT7623
series SoCs.

Signed-off-by: Ryder Lee 
---
 .../bindings/pci/mediatek,mt7623-pcie.txt  | 153 +
 1 file changed, 153 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pci/mediatek,mt7623-pcie.txt

diff --git a/Documentation/devicetree/bindings/pci/mediatek,mt7623-pcie.txt 
b/Documentation/devicetree/bindings/pci/mediatek,mt7623-pcie.txt
new file mode 100644
index 000..ee93ba2
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/mediatek,mt7623-pcie.txt
@@ -0,0 +1,153 @@
+Mediatek MT7623 PCIe controller
+
+Required properties:
+- compatible: Should contain "mediatek,mt7623-pcie".
+- device_type: Must be "pci"
+- reg: Base addresses and lengths of the pcie controller.
+- interrupts: A list of interrupt outputs of the controller.
+- #address-cells: Address representation for root ports (must be 3)
+  - cell 0 specifies the bus and device numbers of the root port:
+[23:16]: bus number
+[15:11]: device number
+  - cell 1 denotes the upper 32 address bits and should be 0
+  - cell 2 contains the lower 32 address bits and is used to translate to the
+CPU address space
+- #size-cells: Size representation for root ports (must be 2)
+- clocks: Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Must include the following entries:
+  - free_ck
+- power-domains: A phandle and power domain specifier pair to the power domain
+  which is responsible for collapsing and restoring power to the peripheral
+- bus-range: Range of bus numbers associated with this controller
+- ranges: Describes the translation of addresses for root ports and standard
+  PCI regions. The entries must be 6 cells each, where the first three cells
+  correspond to the address as described for the #address-cells property
+  above, the fourth cell is the physical CPU address to translate to and the
+  fifth and six cells are as described for the #size-cells property above.
+  - The first three entries are expected to translate the addresses for the 
root
+port registers, which are referenced by the assigned-addresses property of
+the root port nodes (see below).
+  - The remaining entries setup the mapping for the standard I/O and memory
+   regions.
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+
+In addition, the device tree node must have sub-nodes describing each
+PCIe interface, having the following mandatory properties:
+
+Required properties:
+- device_type: Must be "pci"
+- assigned-addresses: Address and size of the port configuration registers
+- reg: Only the first four bytes are used to refer to the correct bus number
+  and device number.
+- #address-cells: Must be 3
+- #size-cells: Must be 2
+- ranges: Sub-ranges distributed from the PCIe controller node. An empty
+  property is sufficient.
+- clocks: Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Must include the following entries:
+  - sys_ck
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - pcie-reset
+- num-lanes: Number of lanes to use for this port.
+- phys: Must contain an entry for each entry in phy-names.
+- phy-names: Must include an entry for each sub node. Entries are of the form
+  "pcie-phyN": where N ranges from 0 to the value specified for port number.
+  See ../phy/phy-mt7623-pcie.txt for details.
+
+Examples:
+
+SoC dtsi:
+
+   pcie: pcie@1a14 {
+   compatible = "mediatek,mt7623-pcie";
+   device_type = "pci";
+   reg = <0 0x1a14 0 0x1000>; /* PCIe shared registers */
+   interrupts = ,
+,
+;
+   #address-cells = <3>;
+   #size-cells = <2>;
+   clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
+   clock-names = "free_ck";
+   power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
+
+   bus-range = <0x00 0xff>;
+   ranges = <0x8200 0 0x1a142000 0 0x1a142000 0 0x1000 /* Por0 
registers */
+ 0x8200 0 0x1a143000 0 0x1a143000 0 0x1000 /* Por1 
registers */
+ 0x8200 0 0x1a144000 0 0x1a144000 0 0x1000 /* Por2 
registers */
+ 0x8100 0 0x1a16 0 0x1a16 0 0x0001 /* 
I/O space */
+ 0x8300 0 0x6000 0 0x6000 0 0x1000>;   
/* memory space */
+   status = "disabled";
+
+   pcie@1,0 {
+   device_type = "pci";
+   assigned-addresses = <0x82000800 0 0x1a142000 0 0x1000>;
+   reg = <0x0800 0 0 0 0>;
+   #address-cells = <3>;
+

[PATCH 0/2] Add PCIe phy driver for some Mediatek SoCs

2017-04-23 Thread Ryder Lee
Hi,

This patch series add PCIe phy driver and related dt-binding file for
Mediatek mt7623 SoCs families.

Thanks.

Ryder Lee (2):
  phy: add PCIe phy driver for mt7623 SoCs families
  dt-bindings: phy: Add documentation for Mediatek PCIe PHY

 .../devicetree/bindings/phy/phy-mt7623-pcie.txt|  67 +
 drivers/phy/Kconfig|   9 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-mt7623-pcie.c  | 290 +
 4 files changed, 367 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-mt7623-pcie.txt
 create mode 100644 drivers/phy/phy-mt7623-pcie.c

-- 
1.9.1



[PATCH 1/2] PCI: mediatek: Add Mediatek PCIe host controller support

2017-04-23 Thread Ryder Lee
Add support for the Mediatek PCIe controller which can be found
on MT7623A/N, MT2701 and MT8521p platforms.

Signed-off-by: Ryder Lee 
---
 drivers/pci/host/Kconfig |  11 +
 drivers/pci/host/Makefile|   1 +
 drivers/pci/host/pcie-mediatek.c | 611 +++
 3 files changed, 623 insertions(+)
 create mode 100644 drivers/pci/host/pcie-mediatek.c

diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index f7c1d4d..cf13b5d 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -174,6 +174,17 @@ config PCIE_ROCKCHIP
  There is 1 internal PCIe port available to support GEN2 with
  4 slots.
 
+config PCIE_MEDIATEK
+   bool "Mediatek PCIe Controller for MT7623 SoCs families"
+   depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
+   depends on OF
+   depends on PCI
+   select PCIEPORTBUS
+   help
+ Say Y here if you want to enable PCIe controller support on MT7623 A/N
+ series SoCs. There is a one root complex with 3 root ports available.
+ Each port supports Gen2 lane x1.
+
 config VMD
depends on PCI_MSI && X86_64 && SRCU
tristate "Intel Volume Management Device Driver"
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 4d36866..265adff 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o
 obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o
 obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o
 obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o
+obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o
 obj-$(CONFIG_VMD) += vmd.o
 
 # The following drivers are for devices that use the generic ACPI
diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
new file mode 100644
index 000..98e84d9
--- /dev/null
+++ b/drivers/pci/host/pcie-mediatek.c
@@ -0,0 +1,611 @@
+/*
+ * PCIe host controller driver for Mediatek MT7623 SoCs families
+ *
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Ryder Lee 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* PCIe shared registers */
+#define PCIE_SYS_CFG   0x00
+#define PCIE_INT_ENABLE0x0c
+#define PCIE_CFG_ADDR  0x20
+#define PCIE_CFG_DATA  0x24
+
+/* PCIe per port registers */
+#define PCIE_BAR0_SETUP0x10
+#define PCIE_BAR1_SETUP0x14
+#define PCIE_BAR0_MEM_BASE 0x18
+#define PCIE_CLASS 0x34
+#define PCIE_LINK_STATUS   0x50
+
+#define PCIE_PORT_INT_EN(x)BIT(20 + (x))
+#define PCIE_PORT_PERST(x) BIT(1 + (x))
+#define PCIE_PORT_LINKUP   BIT(0)
+#define PCIE_BAR_MAP_MAX   GENMASK(31, 16)
+
+#define PCIE_BAR_ENABLEBIT(0)
+#define PCIE_REVISION_ID   BIT(0)
+#define PCIE_CLASS_CODE(0x60400 << 8)
+#define PCIE_CONF_REG(regn)(((regn) & GENMASK(7, 2)) | \
+   regn) >> 8) & GENMASK(3, 0)) << 24))
+#define PCIE_CONF_FUN(fun) (((fun) << 8) & GENMASK(10, 8))
+#define PCIE_CONF_DEV(dev) (((dev) << 11) & GENMASK(15, 11))
+#define PCIE_CONF_BUS(bus) (((bus) << 16) & GENMASK(23, 16))
+#define PCIE_CONF_ADDR(regn, fun, dev, bus) \
+   (PCIE_CONF_REG(regn) | PCIE_CONF_FUN(fun) | \
+PCIE_CONF_DEV(dev) | PCIE_CONF_BUS(bus))
+
+/* Mediatek specific configuration registers */
+#define PCIE_FTS_NUM   0x70c
+#define PCIE_FTS_NUM_MASK  GENMASK(15, 8)
+#define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8)
+
+#define PCIE_FC_CREDIT 0x73c
+#define PCIE_FC_CREDIT_MASK(GENMASK(31, 31) | GENMASK(28, 16))
+#define PCIE_FC_CREDIT_VAL(x)  ((x) << 16)
+
+/**
+ * struct mtk_pcie_port - PCIe port information
+ * @dev: pointer to root port device
+ * @base: IO mapped register base
+ * @list: port list
+ * @pcie: pointer to PCIe host info
+ * @reset: pointer to RC reset control
+ * @regs: port memory region
+ * @sys_ck: root port clock
+ * @phy: pointer to phy control block
+ * @irq: IRQ number
+ * @lane: lane count
+ * @index: port index
+ */
+struct mtk_pcie_port {
+   struct device *dev;
+   void __iomem *base;
+   struct list_head list;
+   struct mtk_pcie *pcie;
+   struct reset_control *reset;
+   struct resource regs;
+   struct clk *sys_ck;
+   struct phy *phy;
+   int irq;
+   u32 lane;
+   u32 index;
+};
+
+/**
+ * struct mtk_pcie - PCIe host informatio

Re: [PATCH] scsi: pmcraid: use normal copy_from_user

2017-04-23 Thread Christoph Hellwig
Looks good,

Reviewed-by: Christoph Hellwig 


Re: [PATCH 2/4] scsi: pmcraid: fix lock imbalance in pmcraid_reset_reload()

2017-04-23 Thread Christoph Hellwig
On Thu, Apr 20, 2017 at 07:54:46PM +0200, Arnd Bergmann wrote:
> sparse found a bug that has always been present since the driver
> was merged:
> 
> drivers/scsi/pmcraid.c:2353:12: warning: context imbalance in 
> 'pmcraid_reset_reload' - different lock contexts for basic block
> 
> This adds the missing unlock at the end of the function. I could
> not figure out if this will happen in practice, but I could not
> prove that it doesn't happen, so to be on the safe side, let's
> backport this fix.
> 
> Cc: sta...@vger.kernel.org
> Fixes: 89a368104150 ("[SCSI] pmcraid: PMC-Sierra MaxRAID driver to support 
> 6Gb/s SAS RAID controller")
> Signed-off-by: Arnd Bergmann 
> ---
>  drivers/scsi/pmcraid.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
> index 096c704ca39a..35087e94c2ad 100644
> --- a/drivers/scsi/pmcraid.c
> +++ b/drivers/scsi/pmcraid.c
> @@ -2411,8 +2411,11 @@ static int pmcraid_reset_reload(
>   scsi_unblock_requests(pinstance->host);
>   if (pinstance->ioa_state == target_state)
>   reset = 0;
> + spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
>   }
>  
> + spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
> +

This looks weird.  Using a proper goto label to unwind seem like the
best way to go, e.g. this patch:

---
>From 8c58854f345bd87789b68eba2b2f72d0cac952fa Mon Sep 17 00:00:00 2001
From: Christoph Hellwig 
Date: Sun, 23 Apr 2017 10:33:23 +0200
Subject: pmcraid: fix lock imbalance in pmcraid_reset_reload()

sparse found a bug that has always been present since the driver was
merged:

drivers/scsi/pmcraid.c:2353:12: warning: context imbalance in 
'pmcraid_reset_reload' - different lock contexts for basic block

Fix this by using a common unlock goto label, and also reduce the
indentation level in the function.

Signed-off-by: Christoph Hellwig 
Reported-by: Arnd Bergmann 
---
 drivers/scsi/pmcraid.c | 59 --
 1 file changed, 28 insertions(+), 31 deletions(-)

diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index 49e70a383afa..3cc858f45838 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -2373,46 +2373,43 @@ static int pmcraid_reset_reload(
spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
 
if (pinstance->ioa_state == IOA_STATE_DEAD) {
-   spin_unlock_irqrestore(pinstance->host->host_lock,
-  lock_flags);
pmcraid_info("reset_reload: IOA is dead\n");
-   return reset;
-   } else if (pinstance->ioa_state == target_state) {
+   goto out_unlock;
+   }
+
+   if (pinstance->ioa_state == target_state) {
reset = 0;
+   goto out_unlock;
}
}
 
-   if (reset) {
-   pmcraid_info("reset_reload: proceeding with reset\n");
-   scsi_block_requests(pinstance->host);
-   reset_cmd = pmcraid_get_free_cmd(pinstance);
-
-   if (reset_cmd == NULL) {
-   pmcraid_err("no free cmnd for reset_reload\n");
-   spin_unlock_irqrestore(pinstance->host->host_lock,
-  lock_flags);
-   return reset;
-   }
+   pmcraid_info("reset_reload: proceeding with reset\n");
+   scsi_block_requests(pinstance->host);
+   reset_cmd = pmcraid_get_free_cmd(pinstance);
+   if (reset_cmd == NULL) {
+   pmcraid_err("no free cmnd for reset_reload\n");
+   goto out_unlock;
+   }
 
-   if (shutdown_type == SHUTDOWN_NORMAL)
-   pinstance->ioa_bringdown = 1;
+   if (shutdown_type == SHUTDOWN_NORMAL)
+   pinstance->ioa_bringdown = 1;
 
-   pinstance->ioa_shutdown_type = shutdown_type;
-   pinstance->reset_cmd = reset_cmd;
-   pinstance->force_ioa_reset = reset;
-   pmcraid_info("reset_reload: initiating reset\n");
-   pmcraid_ioa_reset(reset_cmd);
-   spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
-   pmcraid_info("reset_reload: waiting for reset to complete\n");
-   wait_event(pinstance->reset_wait_q,
-  !pinstance->ioa_reset_in_progress);
+   pinstance->ioa_shutdown_type = shutdown_type;
+   pinstance->reset_cmd = reset_cmd;
+   pinstance->force_ioa_reset = reset;
+   pmcraid_info("reset_reload: initiating reset\n");
+   pmcraid_ioa_reset(reset_cmd);
+   spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
+   pmcraid_info("reset_reload: waiting for reset to complete\n");
+   wait_event(pinstance->reset_wait_q,
+   

Re: [PATCH v6 0/7] perf report: Show branch type

2017-04-23 Thread Jin, Yao



On 4/20/2017 5:36 PM, Jiri Olsa wrote:

On Thu, Apr 20, 2017 at 08:07:48PM +0800, Jin Yao wrote:

v6:
Update according to the review comments from
Jiri Olsa . Major modifications are:

1. Move that multiline conditional code inside {} brackets.

2. Move branch_type_stat_display() from builtin-report.c to
   branch.c. Move branch_type_str() from callchain.c to
   branch.c.

3. Keep the original branch info display order, that is:
   predicted, abort, cycles, iterations

for the tools part

Acked-by: Jiri Olsa 

thanks,
jirka


Thanks so much!

Is the kernel part OK?

Thanks
Jin Yao



Re: [PATCH 3/4] scsi: pmcraid: fix endianess sparse annotations

2017-04-23 Thread Christoph Hellwig
>   mb();
> - iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
> -   pinstance->ioarrin);
> + iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), 
> pinstance->ioarrin);

It really seems like some of these fields should be swapped once
and store in an in-memory structure.

But for now this patch looks fine to me:

Reviewed-by: Christoph Hellwig 


Re: [PATCH] scsi: mvumi: add check for dma mapping errors

2017-04-23 Thread Christoph Hellwig
On Sat, Apr 22, 2017 at 02:17:50AM +0300, Alexey Khoroshilov wrote:
>   } else {
> - scmd->SCp.dma_handle = scsi_bufflen(scmd) ?
> - pci_map_single(mhba->pdev, scsi_sglist(scmd),
> - scsi_bufflen(scmd),
> - (int) scmd->sc_data_direction)
> - : 0;
> + if (!scsi_bufflen(scmd))
> + return -1;
> + scmd->SCp.dma_handle = pci_map_single(mhba->pdev,
> + scsi_sglist(scmd),
> + scsi_bufflen(scmd),
> + (int) scmd->sc_data_direction);
> + if (pci_dma_mapping_error(mhba->pdev, scmd->SCp.dma_handle))
> + return -1;

This looks completely broken.  Why would you DMA map the in-memory
struct scatterlist?  It has no meaning for the hardware.

In fact this whole branch (and the equivalent in the unmap path)
are dead - SCSI commands that transfer data always have a SG entry.

So the right fix is to remove the !scsi_sg_count(scmd) map/unmap
path.


Re: [PATCH 4/4] scsi: pmcraid: fix minor sparse warnings

2017-04-23 Thread Christoph Hellwig
Looks fine,

Reviewed-by: Christoph Hellwig 


[PATCH 1/1] power: check return value of devm_kzalloc

2017-04-23 Thread Pan Bian
Function devm_kzalloc() will return a NULL pointer if there is no enough
memory. However, in function isp1704_charger_probe(), the return value
of devm_kzalloc() is used without validation. This may result in a bad
memory access bug. This patch fixes the bug.

Signed-off-by: Pan Bian 
---
 drivers/power/supply/isp1704_charger.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/power/supply/isp1704_charger.c 
b/drivers/power/supply/isp1704_charger.c
index 4cd6899..4dd2482 100644
--- a/drivers/power/supply/isp1704_charger.c
+++ b/drivers/power/supply/isp1704_charger.c
@@ -418,6 +418,8 @@ static int isp1704_charger_probe(struct platform_device 
*pdev)
 
pdata = devm_kzalloc(&pdev->dev,
sizeof(struct isp1704_charger_data), GFP_KERNEL);
+   if (!pdata)
+   return -ENOMEM;
pdata->enable_gpio = gpio;
 
dev_info(&pdev->dev, "init gpio %d\n", pdata->enable_gpio);
-- 
1.9.1




[PATCH 0/2] dmaengine: k3dma: Fine-tuning for five function implementations

2017-04-23 Thread SF Markus Elfring
From: Markus Elfring 
Date: Sun, 23 Apr 2017 10:56:54 +0200

A few update suggestions were taken into account
from static source code analysis.

Markus Elfring (2):
  Use devm_kcalloc() in k3_dma_probe()
  Adjust six checks for null pointers

 drivers/dma/k3dma.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

-- 
2.12.2



[PATCH 1/2] dmaengine: k3dma: Use devm_kcalloc() in k3_dma_probe()

2017-04-23 Thread SF Markus Elfring
From: Markus Elfring 
Date: Sun, 23 Apr 2017 10:30:32 +0200

* Multiplications for the size determination of memory allocations
  indicated that array data structures should be processed.
  Thus use the corresponding function "devm_kcalloc".

  This issue was detected by using the Coccinelle software.

* Replace the specification of data structures by pointer dereferences
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring 
---
 drivers/dma/k3dma.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index 01e25c68dd5a..31a51ee1a910 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -845,8 +845,8 @@ static int k3_dma_probe(struct platform_device *op)
return -ENOMEM;
 
/* init phy channel */
-   d->phy = devm_kzalloc(&op->dev,
-   d->dma_channels * sizeof(struct k3_dma_phy), GFP_KERNEL);
+   d->phy = devm_kcalloc(&op->dev, d->dma_channels, sizeof(*d->phy),
+ GFP_KERNEL);
if (d->phy == NULL)
return -ENOMEM;
 
@@ -875,8 +875,8 @@ static int k3_dma_probe(struct platform_device *op)
d->slave.copy_align = DMAENGINE_ALIGN_8_BYTES;
 
/* init virtual channel */
-   d->chans = devm_kzalloc(&op->dev,
-   d->dma_requests * sizeof(struct k3_dma_chan), GFP_KERNEL);
+   d->chans = devm_kcalloc(&op->dev, d->dma_requests, sizeof(*d->chans),
+   GFP_KERNEL);
if (d->chans == NULL)
return -ENOMEM;
 
-- 
2.12.2



[PATCH 2/2] dmaengine: k3dma: Adjust six checks for null pointers

2017-04-23 Thread SF Markus Elfring
From: Markus Elfring 
Date: Sun, 23 Apr 2017 10:47:04 +0200
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The script “checkpatch.pl” pointed information out like the following.

Comparison to NULL could be written …

Thus fix the affected source code places.

Signed-off-by: Markus Elfring 
---
 drivers/dma/k3dma.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index 31a51ee1a910..da20565f7a8d 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -230,7 +230,7 @@ static irqreturn_t k3_dma_int_handler(int irq, void *dev_id)
}
if (c && (tc2 & BIT(i))) {
spin_lock_irqsave(&c->vc.lock, flags);
-   if (p->ds_run != NULL)
+   if (p->ds_run)
vchan_cyclic_callback(&p->ds_run->vd);
spin_unlock_irqrestore(&c->vc.lock, flags);
}
@@ -312,7 +312,7 @@ static void k3_dma_tasklet(unsigned long arg)
for (pch = 0; pch < d->dma_channels; pch++) {
p = &d->phy[pch];
 
-   if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
+   if (!p->vchan && !list_empty(&d->chan_pending)) {
c = list_first_entry(&d->chan_pending,
struct k3_dma_chan, node);
/* remove from d->chan_pending */
@@ -527,7 +527,7 @@ static struct dma_async_tx_descriptor *k3_dma_prep_slave_sg(
dma_addr_t addr, src = 0, dst = 0;
int num = sglen, i;
 
-   if (sgl == NULL)
+   if (!sgl)
return NULL;
 
c->cyclic = 0;
@@ -645,7 +645,7 @@ static int k3_dma_config(struct dma_chan *chan,
u32 maxburst = 0, val = 0;
enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
 
-   if (cfg == NULL)
+   if (!cfg)
return -EINVAL;
c->dir = cfg->direction;
if (c->dir == DMA_DEV_TO_MEM) {
@@ -847,7 +847,7 @@ static int k3_dma_probe(struct platform_device *op)
/* init phy channel */
d->phy = devm_kcalloc(&op->dev, d->dma_channels, sizeof(*d->phy),
  GFP_KERNEL);
-   if (d->phy == NULL)
+   if (!d->phy)
return -ENOMEM;
 
for (i = 0; i < d->dma_channels; i++) {
@@ -877,7 +877,7 @@ static int k3_dma_probe(struct platform_device *op)
/* init virtual channel */
d->chans = devm_kcalloc(&op->dev, d->dma_requests, sizeof(*d->chans),
GFP_KERNEL);
-   if (d->chans == NULL)
+   if (!d->chans)
return -ENOMEM;
 
for (i = 0; i < d->dma_requests; i++) {
-- 
2.12.2



[PATCH 1/1] iw_cxgb4: check return value of alloc_skb

2017-04-23 Thread Pan Bian
Function alloc_skb() will return a NULL pointer when there is no enough
memory. However, the return value of alloc_skb() is directly used
without validation in function send_fw_pass_open_req(). This patches
checks the return value of alloc_skb() against NULL.

Signed-off-by: Pan Bian 
---
 drivers/infiniband/hw/cxgb4/cm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 03a1b0e..196969c 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -3800,6 +3800,8 @@ static void send_fw_pass_open_req(struct c4iw_dev *dev, 
struct sk_buff *skb,
int ret;
 
req_skb = alloc_skb(sizeof(struct fw_ofld_connection_wr), GFP_KERNEL);
+   if (!req_skb)
+   return;
req = (struct fw_ofld_connection_wr *)__skb_put(req_skb, sizeof(*req));
memset(req, 0, sizeof(*req));
req->op_compl = htonl(WR_OP_V(FW_OFLD_CONNECTION_WR) | FW_WR_COMPL_F);
-- 
1.9.1




Re: [GIT PULL rcu/next] RCU commits for 4.12

2017-04-23 Thread Ingo Molnar

* Paul E. McKenney  wrote:

> Hello, Ingo,
> 
> This pull request contains the following changes:
> 
> 1.Documentation updates.
> 
>   http://lkml.kernel.org/r/20170412163956.ga15...@linux.vnet.ibm.com
> 
> 2.Miscellaneous fixes.
> 
>   http://lkml.kernel.org/r/20170417232714.ga19...@linux.vnet.ibm.com
> 
> 3.Parallelize SRCU callback handling (plus overlapping patches).
> 
>   http://lkml.kernel.org/r/20170419165805.gb10...@linux.vnet.ibm.com
> 
>   http://lkml.kernel.org/r/87zifatu3a@concordia.ellerman.id.au
> 
> All of these changes have been subjected to 0day Test Robot and -next
> testing, and are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git 
> for-mingo
> 
> for you to fetch changes up to f2094107ac82bf867184efd77cee30b6a98e2e20:
> 
>   Merge branches 'doc.2017.04.12a', 'fixes.2017.04.19a' and 
> 'srcu.2017.04.21a' into HEAD (2017-04-21 06:00:13 -0700)
> 
> 
> Dmitry Vyukov (1):
>   rcu: Fix warning in rcu_seq_end()
> 
> Michael S. Tsirkin (1):
>   hlist_add_tail_rcu disable sparse warning
> 
> Michalis Kokologiannakis (1):
>   doc: Update the comparisons rule in rcu_dereference.txt
> 
> Nicholas Mc Guire (2):
>   rcu: Use bool value directly
>   rcu: Use true/false in assignment to bool
> 
> Paul E. McKenney (56):
>   doc: Synchronous RCU grace periods are now legal throughout boot
>   doc: Add mid-boot operation to expedited grace periods
>   doc: Update stallwarn.txt to make causes more prominent
>   doc: Update RCU data-structure documentation for rcu_segcblist
>   doc: Update requirements based on recent changes
>   doc: Update rcu_assign_pointer() definition in whatisRCU.txt
>   doc: Emphasize that "toy" RCU requires recursive rwlock
>   rcu: Maintain special bits at bottom of ->dynticks counter
>   rcu: Make arch select smp_mb__after_unlock_lock() strength
>   srcu: Consolidate batch checking into rcu_all_batches_empty()
>   srcu: Check for tardy grace-period activity in cleanup_srcu_struct()
>   rcu: Semicolon inside RCU_TRACE() for rcu.h
>   rcu: Semicolon inside RCU_TRACE() for Tiny RCU
>   rcu: Semicolon inside RCU_TRACE() for tree.c
>   rcu: Pull rcu_sched_qs_mask into rcu_dynticks structure
>   rcu: Pull rcu_qs_ctr into rcu_dynticks structure
>   rcu: Eliminate flavor scan in rcu_momentary_dyntick_idle()
>   rcu: Place guard on rcu_all_qs() and rcu_note_context_switch() actions
>   rcu: Default RCU_FANOUT_LEAF to 16 unless explicitly changed
>   srcu: Abstract multi-tail callback list handling
>   srcu: Allow SRCU to access rcu_scheduler_active
>   srcu: Allow early boot use of synchronize_srcu()
>   rcu: Add single-element dequeue functions to rcu_segcblist
>   srcu: Move rcu_seq_start() and friends to rcu.h
>   rcu: Expedited wakeups need to be fully ordered
>   srcu: Push srcu_advance_batches() fastpath into common case
>   srcu: Move to state-based grace-period sequencing
>   srcu: Add grace-period sequence numbers
>   srcu: Use rcu_segcblist to track SRCU callbacks
>   srcu: Move combining-tree definitions for SRCU's benefit
>   srcu: Move rcu_init_levelspread() to rcu_tree_node.h
>   rcu: Remove redundant levelcnt[] array from rcu_init_one()
>   srcu: Move rcu_node traversal macros to rcu.h
>   srcu: Make num_rcu_lvl[] array be external
>   srcu: Fix bogus try_check_zero() comment
>   srcu: Improve rcu_seq grace-period-counter abstraction
>   srcu: Allow a second bit in rcu_seq for SRCU state
>   srcu: Merge ->srcu_state into ->srcu_gp_seq
>   srcu: Crude control of expedited grace periods
>   mm: Use static initialization for "srcu"
>   srcu: Create a tiny SRCU
>   srcutorture: Print Tiny SRCU reader statistics
>   srcu: Introduce CLASSIC_SRCU Kconfig option
>   mm: Rename SLAB_DESTROY_BY_RCU to SLAB_TYPESAFE_BY_RCU
>   lockdep: Use "WARNING" tag on lockdep splats
>   types: Update obsolete callback_head comment
>   rcu: Make RCU_FANOUT_LEAF help text more explicit about skew_tick
>   rcu: Remove obsolete comment from rcu_future_gp_cleanup() header
>   rcu: Improve comments for hotplug/suspend/hibernate functions
>   torture: Use correct path for Kconfig fragment for duplicates
>   rcu: Fix typo in PER_RCU_NODE_PERIOD header comment
>   kvm: Move srcu_struct fields to end of struct kvm
>   srcu: Parallelize callback handling
>   srcu: Expedite srcu_schedule_cbs_snp() callback invocation
>   rcu: Make non-preemptive schedule be Tasks RCU quiescent state
>   Merge branches 'doc.2017.04.12a', 'fixes.2017.04.19a' and 
> 'srcu.2017.04.21a' into HEAD
> 
> pierre Kuo (1):
>   doc: Update control-dependencies section of memory-barriers.txt
> 
>  Documentation/RCU/00-INDEX  

Re: [PATCH] mm: gup: fix access_ok() argument type

2017-04-23 Thread Ingo Molnar

* Arnd Bergmann  wrote:

> MIPS just got changed to only accept a pointer argument for access_ok(),
> causing one warning in drivers/scsi/pmcraid.c. I tried changing x86
> the same way and found the same warning in __get_user_pages_fast()
> and nowhere else in the kernel during randconfig testing:

Doing that for x86 access_ok() would definitely be a good idea.

> mm/gup.c: In function '__get_user_pages_fast':
> mm/gup.c:1578:6: error: passing argument 1 of '__chk_range_not_ok' makes 
> pointer from integer without a cast [-Werror=int-conversion]
> 
> It would probably be a good idea to enforce type-safety in general,
> so let's change this file to not cause a warning if we do that.
> 
> I don't know why the warning did not appear on MIPS.
> 
> Fixes: 2667f50e8b81 ("mm: introduce a general RCU get_user_pages_fast()")
> Cc: Alexander Viro 
> Signed-off-by: Arnd Bergmann 
> ---
>  mm/gup.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/mm/gup.c b/mm/gup.c
> index 2559a3987de7..7f5bc26d9229 100644
> --- a/mm/gup.c
> +++ b/mm/gup.c
> @@ -1575,7 +1575,7 @@ int __get_user_pages_fast(unsigned long start, int 
> nr_pages, int write,
>   end = start + len;
>  
>   if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
> - start, len)))
> + (void __user *)start, len)))
>   return 0;

Acked-by: Ingo Molnar 

Thanks,

Ingo


[PATCH v3 00/15] staging: ccree: add Arm TrustZone CryptoCell REE driver

2017-04-23 Thread Gilad Ben-Yossef
Arm TrustZone CryptoCell 700 is a family of cryptographic hardware
accelerators. It is supported by a long lived series of out of tree
drivers, which I am now in the process of unifying and upstreaming.
This is the first drop, supporting the new CryptoCell 712 REE.

The code still needs some cleanup before maturing to a proper
upstream driver, which I am in the process of doing. However,
as discussion of some of the capabilities of the hardware and
its application to some dm-crypt and dm-verity features recently
took place I though it is better to do this in the open via the
staging tree.

Signed-off-by: Gilad Ben-Yossef 
CC: Binoy Jayan 
CC: Ofir Drang 
CC: Stuart Yoder 
CC: Stephan Muller 

Changes from v2:
- Fix stupid build error on i386 due to left over Arm specific code.
- Fix copyright header to match GPLv2 license, as pointed out by Greg KH.
- Add proper handling of FIPS mode to TODO list, as pointed by Stephan Müller.
- Remove uneeded empty file bsp.h
- Fold in a bunch of fixes from kbuild robot.

Changes from v1:
- Broke up patch set into smaller units for mailing list review as per
  Greg KH's indication.
- Changed DT binding compatible tag as per Mark Rutland suggestion.
- Moved DT binding document inside the staging directory and added DT binding
  review to TODO list as per Mark Rutland's request.


Gilad Ben-Yossef (10):
  staging: ccree: introduce CryptoCell HW driver
  staging: ccree: add ahash support
  staging: ccree: add skcipher support
  staging: ccree: add IV generation support
  staging: ccree: add AEAD support
  staging: ccree: add FIPS support
  staging: ccree: add TODO list
  staging: ccree: add DT bindings for Arm CryptoCell
  MAINTAINERS: add Gilad BY as ccree maintainer
  staging: ccree: remove useless NULL test of field

kbuild test robot (5):
  staging: ccree: fix platform_no_drv_owner.cocci warnings
  staging: ccree: fix semicolon.cocci warnings
  staging: ccree: fix array_size.cocci warnings
  staging: ccree: fix ifnullfree.cocci warnings
  staging: ccree: fix ifnullfree.cocci warnings

 MAINTAINERS|7 +
 drivers/staging/Kconfig|2 +
 drivers/staging/Makefile   |2 +-
 .../devicetree/bindings/crypto/arm-cryptocell.txt  |   27 +
 drivers/staging/ccree/Kconfig  |   43 +
 drivers/staging/ccree/Makefile |3 +
 drivers/staging/ccree/TODO |   30 +
 drivers/staging/ccree/cc_bitops.h  |   62 +
 drivers/staging/ccree/cc_crypto_ctx.h  |  299 +++
 drivers/staging/ccree/cc_hal.h |   30 +
 drivers/staging/ccree/cc_hw_queue_defs.h   |  603 +
 drivers/staging/ccree/cc_lli_defs.h|   57 +
 drivers/staging/ccree/cc_pal_log.h |  188 ++
 drivers/staging/ccree/cc_pal_log_plat.h|   33 +
 drivers/staging/ccree/cc_pal_types.h   |   97 +
 drivers/staging/ccree/cc_pal_types_plat.h  |   29 +
 drivers/staging/ccree/cc_regs.h|  106 +
 drivers/staging/ccree/dx_crys_kernel.h |  180 ++
 drivers/staging/ccree/dx_env.h |  224 ++
 drivers/staging/ccree/dx_host.h|  155 ++
 drivers/staging/ccree/dx_reg_base_host.h   |   34 +
 drivers/staging/ccree/dx_reg_common.h  |   26 +
 drivers/staging/ccree/hash_defs.h  |   78 +
 drivers/staging/ccree/hw_queue_defs_plat.h |   43 +
 drivers/staging/ccree/ssi_aead.c   | 2832 
 drivers/staging/ccree/ssi_aead.h   |  120 +
 drivers/staging/ccree/ssi_buffer_mgr.c | 1873 +
 drivers/staging/ccree/ssi_buffer_mgr.h |  105 +
 drivers/staging/ccree/ssi_cipher.c | 1503 +++
 drivers/staging/ccree/ssi_cipher.h |   89 +
 drivers/staging/ccree/ssi_config.h |   61 +
 drivers/staging/ccree/ssi_driver.c |  556 
 drivers/staging/ccree/ssi_driver.h |  228 ++
 drivers/staging/ccree/ssi_fips.c   |   65 +
 drivers/staging/ccree/ssi_fips.h   |   70 +
 drivers/staging/ccree/ssi_fips_data.h  |  315 +++
 drivers/staging/ccree/ssi_fips_ext.c   |   96 +
 drivers/staging/ccree/ssi_fips_ll.c| 1681 
 drivers/staging/ccree/ssi_fips_local.c |  369 +++
 drivers/staging/ccree/ssi_fips_local.h |   77 +
 drivers/staging/ccree/ssi_hash.c   | 2742 +++
 drivers/staging/ccree/ssi_hash.h   |  101 +
 drivers/staging/ccree/ssi_ivgen.c  |  301 +++
 drivers/staging/ccree/ssi_ivgen.h  |   72 +
 drivers/staging/ccree/ssi_pm.c |  150 ++
 drivers/staging/ccree/ssi_pm.h |   46 +
 drivers/staging/ccree/ssi_pm_ext.c  

[PATCH 1/1] m5602_s5k83a: check return value of kthread_create

2017-04-23 Thread Pan Bian
From: Pan Bian 

Function kthread_create() returns an ERR_PTR on error. However, in
function s5k83a_start(), its return value is used without validation.
This may result in a bad memory access bug. This patch fixes the bug.

Signed-off-by: Pan Bian 
---
 drivers/media/usb/gspca/m5602/m5602_s5k83a.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/media/usb/gspca/m5602/m5602_s5k83a.c 
b/drivers/media/usb/gspca/m5602/m5602_s5k83a.c
index be5e25d1..6ad8d48 100644
--- a/drivers/media/usb/gspca/m5602/m5602_s5k83a.c
+++ b/drivers/media/usb/gspca/m5602/m5602_s5k83a.c
@@ -345,6 +345,11 @@ int s5k83a_start(struct sd *sd)
   to assume that there is no better way of accomplishing this */
sd->rotation_thread = kthread_create(rotation_thread_function,
 sd, "rotation thread");
+   if (IS_ERR(sd->rotation_thread)) {
+   err = PTR_ERR(sd->rotation_thread);
+   sd->rotation_thread = NULL;
+   return err;
+   }
wake_up_process(sd->rotation_thread);
 
/* Preinit the sensor */
-- 
1.9.1




[PATCH v3 03/15] staging: ccree: add skcipher support

2017-04-23 Thread Gilad Ben-Yossef
Add CryptoCell skcipher support

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Kconfig  |8 +
 drivers/staging/ccree/Makefile |2 +-
 drivers/staging/ccree/cc_crypto_ctx.h  |   21 +
 drivers/staging/ccree/ssi_buffer_mgr.c |  147 
 drivers/staging/ccree/ssi_buffer_mgr.h |   16 +
 drivers/staging/ccree/ssi_cipher.c | 1440 
 drivers/staging/ccree/ssi_cipher.h |   88 ++
 drivers/staging/ccree/ssi_driver.c |   14 +
 drivers/staging/ccree/ssi_driver.h |   30 +
 9 files changed, 1765 insertions(+), 1 deletion(-)
 create mode 100644 drivers/staging/ccree/ssi_cipher.c
 create mode 100644 drivers/staging/ccree/ssi_cipher.h

diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index a528a99..3fff040 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -3,11 +3,19 @@ config CRYPTO_DEV_CCREE
depends on CRYPTO_HW && OF && HAS_DMA
default n
select CRYPTO_HASH
+   select CRYPTO_BLKCIPHER
+   select CRYPTO_DES
+   select CRYPTO_AUTHENC
select CRYPTO_SHA1
select CRYPTO_MD5
select CRYPTO_SHA256
select CRYPTO_SHA512
select CRYPTO_HMAC
+   select CRYPTO_AES
+   select CRYPTO_CBC
+   select CRYPTO_ECB
+   select CRYPTO_CTR
+   select CRYPTO_XTS
help
  Say 'Y' to enable a driver for the Arm TrustZone CryptoCell 
  C7xx. Currently only the CryptoCell 712 REE is supported.
diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index f94e225..21a80d5 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
-ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_hash.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
+ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_cipher.o ssi_hash.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index a4aa066..a7f7d95 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -242,6 +242,27 @@ struct drv_ctx_hmac {
CC_DIGEST_SIZE_MAX - CC_HMAC_BLOCK_SIZE_MAX];
 };
 
+struct drv_ctx_cipher {
+   enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
+   enum drv_cipher_mode mode;
+   enum drv_crypto_direction direction;
+   enum drv_crypto_key_type crypto_key_type;
+   enum drv_crypto_padding_type padding_type;
+   uint32_t key_size; /* numeric value in bytes   */
+   uint32_t data_unit_size; /* required for XTS */
+   /* block_state is the AES engine block state.
+   *  It is used by the host to pass IV or counter at initialization.
+   *  It is used by SeP for intermediate block chaining state and for
+   *  returning MAC algorithms results.   */
+   uint8_t block_state[CC_AES_BLOCK_SIZE];
+   uint8_t key[CC_AES_KEY_SIZE_MAX];
+   uint8_t xex_key[CC_AES_KEY_SIZE_MAX];
+   /* reserve to end of allocated context size */
+   uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 7 -
+   CC_AES_BLOCK_SIZE/sizeof(uint32_t) - 2 *
+   (CC_AES_KEY_SIZE_MAX/sizeof(uint32_t))];
+};
+
 /***/
 /* MESSAGE BASED CONTEXTS **/
 /***/
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index aceb01c..d0d5352 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -28,6 +28,7 @@
 
 #include "ssi_buffer_mgr.h"
 #include "cc_lli_defs.h"
+#include "ssi_cipher.h"
 #include "ssi_hash.h"
 
 #define LLI_MAX_NUM_OF_DATA_ENTRIES 128
@@ -517,6 +518,152 @@ static inline int ssi_ahash_handle_curr_buf(struct device 
*dev,
return 0;
 }
 
+void ssi_buffer_mgr_unmap_blkcipher_request(
+   struct device *dev,
+   void *ctx,
+   unsigned int ivsize,
+   struct scatterlist *src,
+   struct scatterlist *dst)
+{
+   struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
+
+   if (likely(req_ctx->gen_ctx.iv_dma_addr != 0)) {
+   SSI_LOG_DEBUG("Unmapped iv: iv_dma_addr=0x%llX iv_size=%u\n", 
+   (unsigned long long)req_ctx->gen_ctx.iv_dma_addr,
+   ivsize);
+   SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->gen_ctx.iv_dma_addr);
+   dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr, 
+ivsize, 
+DMA_TO_DEVICE);
+   }
+   /* Release pool */
+   if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) {
+   
SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->mlli_params.mlli_dma_addr);
+  

[PATCH v3 02/15] staging: ccree: add ahash support

2017-04-23 Thread Gilad Ben-Yossef
Add CryptoCell async. hash and HMAC support.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Kconfig  |6 +
 drivers/staging/ccree/Makefile |2 +-
 drivers/staging/ccree/cc_crypto_ctx.h  |   22 +
 drivers/staging/ccree/hash_defs.h  |   78 +
 drivers/staging/ccree/ssi_buffer_mgr.c |  311 +++-
 drivers/staging/ccree/ssi_buffer_mgr.h |6 +
 drivers/staging/ccree/ssi_driver.c |   11 +-
 drivers/staging/ccree/ssi_driver.h |4 +-
 drivers/staging/ccree/ssi_hash.c   | 2732 
 drivers/staging/ccree/ssi_hash.h   |  101 ++
 drivers/staging/ccree/ssi_pm.c |4 +
 11 files changed, 3263 insertions(+), 14 deletions(-)
 create mode 100644 drivers/staging/ccree/hash_defs.h
 create mode 100644 drivers/staging/ccree/ssi_hash.c
 create mode 100644 drivers/staging/ccree/ssi_hash.h

diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index 0f723d7..a528a99 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -2,6 +2,12 @@ config CRYPTO_DEV_CCREE
tristate "Support for ARM TrustZone CryptoCell C7XX family of Crypto 
accelerators"
depends on CRYPTO_HW && OF && HAS_DMA
default n
+   select CRYPTO_HASH
+   select CRYPTO_SHA1
+   select CRYPTO_MD5
+   select CRYPTO_SHA256
+   select CRYPTO_SHA512
+   select CRYPTO_HMAC
help
  Say 'Y' to enable a driver for the Arm TrustZone CryptoCell 
  C7xx. Currently only the CryptoCell 712 REE is supported.
diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index 972af69..f94e225 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
-ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
+ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_hash.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index 3547cb4..a4aa066 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -220,6 +220,28 @@ struct drv_ctx_generic {
 } __attribute__((__may_alias__));
 
 
+struct drv_ctx_hash {
+   enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HASH */
+   enum drv_hash_mode mode;
+   uint8_t digest[CC_DIGEST_SIZE_MAX];
+   /* reserve to end of allocated context size */
+   uint8_t reserved[CC_CTX_SIZE - 2 * sizeof(uint32_t) -
+   CC_DIGEST_SIZE_MAX];
+};
+
+/*  drv_ctx_hmac should have the same structure as drv_ctx_hash except
+   k0, k0_size fields */
+struct drv_ctx_hmac {
+   enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */
+   enum drv_hash_mode mode;
+   uint8_t digest[CC_DIGEST_SIZE_MAX];
+   uint32_t k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(uint32_t)];
+   uint32_t k0_size;
+   /* reserve to end of allocated context size */
+   uint8_t reserved[CC_CTX_SIZE - 3 * sizeof(uint32_t) -
+   CC_DIGEST_SIZE_MAX - CC_HMAC_BLOCK_SIZE_MAX];
+};
+
 /***/
 /* MESSAGE BASED CONTEXTS **/
 /***/
diff --git a/drivers/staging/ccree/hash_defs.h 
b/drivers/staging/ccree/hash_defs.h
new file mode 100644
index 000..5ab0861
--- /dev/null
+++ b/drivers/staging/ccree/hash_defs.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2012-2017 ARM Limited or its affiliates.
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see .
+ */
+
+#ifndef  _HASH_DEFS_H__
+#define  _HASH_DEFS_H__
+
+#include "cc_crypto_ctx.h"
+
+/* this files provides definitions required for hash engine drivers */
+#ifndef CC_CONFIG_HASH_SHA_512_SUPPORTED
+#define SEP_HASH_LENGTH_WORDS  2
+#else
+#define SEP_HASH_LENGTH_WORDS  4
+#endif
+
+#ifdef BIG__ENDIAN
+#define OPAD_CURRENT_LENGTH 0x4000, 0x , 0x, 0x
+#define HASH_LARVAL_MD5  0x76543210, 0xFEDCBA98, 0x89ABCDEF, 0x01234567
+#define HASH_LARVAL_SHA1 0xF0E1D2C3, 0x76543210, 0xFEDCBA98, 0x89ABCDEF, 
0x01234567
+#define HASH_LARVAL_SHA224 0XA44FFABE, 0XA78FF964, 0X11155868, 0X310BC0FF, 
0X39590EF7, 0X17DD7030, 0X07D57C36, 0XD89E05C1
+#define HASH_LARVAL_SHA256 0X19CDE05B, 

[PATCH v3 05/15] staging: ccree: add AEAD support

2017-04-23 Thread Gilad Ben-Yossef
Add CryptoCell AEAD support

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Kconfig  |1 +
 drivers/staging/ccree/Makefile |2 +-
 drivers/staging/ccree/cc_crypto_ctx.h  |   21 +
 drivers/staging/ccree/ssi_aead.c   | 2826 
 drivers/staging/ccree/ssi_aead.h   |  120 ++
 drivers/staging/ccree/ssi_buffer_mgr.c |  899 ++
 drivers/staging/ccree/ssi_buffer_mgr.h |4 +
 drivers/staging/ccree/ssi_driver.c |   11 +
 drivers/staging/ccree/ssi_driver.h |4 +
 9 files changed, 3887 insertions(+), 1 deletion(-)
 create mode 100644 drivers/staging/ccree/ssi_aead.c
 create mode 100644 drivers/staging/ccree/ssi_aead.h

diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index 3fff040..2d11223 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -5,6 +5,7 @@ config CRYPTO_DEV_CCREE
select CRYPTO_HASH
select CRYPTO_BLKCIPHER
select CRYPTO_DES
+   select CRYPTO_AEAD
select CRYPTO_AUTHENC
select CRYPTO_SHA1
select CRYPTO_MD5
diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index 89afe9a..b9285c0 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
-ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_cipher.o ssi_hash.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
+ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o 
ssi_pm_ext.o
diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index a7f7d95..9e10b26 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -263,6 +263,27 @@ struct drv_ctx_cipher {
(CC_AES_KEY_SIZE_MAX/sizeof(uint32_t))];
 };
 
+/* authentication and encryption with associated data class */
+struct drv_ctx_aead {
+   enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
+   enum drv_cipher_mode mode;
+   enum drv_crypto_direction direction;
+   uint32_t key_size; /* numeric value in bytes   */
+   uint32_t nonce_size; /* nonce size (octets) */
+   uint32_t header_size; /* finit additional data size (octets) */
+   uint32_t text_size; /* finit text data size (octets) */
+   uint32_t tag_size; /* mac size, element of {4, 6, 8, 10, 12, 14, 16} */
+   /* block_state1/2 is the AES engine block state */
+   uint8_t block_state[CC_AES_BLOCK_SIZE];
+   uint8_t mac_state[CC_AES_BLOCK_SIZE]; /* MAC result */
+   uint8_t nonce[CC_AES_BLOCK_SIZE]; /* nonce buffer */
+   uint8_t key[CC_AES_KEY_SIZE_MAX];
+   /* reserve to end of allocated context size */
+   uint32_t reserved[CC_DRV_CTX_SIZE_WORDS - 8 -
+   3 * (CC_AES_BLOCK_SIZE/sizeof(uint32_t)) -
+   CC_AES_KEY_SIZE_MAX/sizeof(uint32_t)];
+};
+
 /***/
 /* MESSAGE BASED CONTEXTS **/
 /***/
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
new file mode 100644
index 000..33d72d2
--- /dev/null
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -0,0 +1,2826 @@
+/*
+ * Copyright (C) 2012-2017 ARM Limited or its affiliates.
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "ssi_config.h"
+#include "ssi_driver.h"
+#include "ssi_buffer_mgr.h"
+#include "ssi_aead.h"
+#include "ssi_request_mgr.h"
+#include "ssi_hash.h"
+#include "ssi_sysfs.h"
+#include "ssi_sram_mgr.h"
+
+#define template_aead  template_u.aead
+
+#define MAX_AEAD_SETKEY_SEQ 12
+#define MAX_AEAD_PROCESS_SEQ 23
+
+#define MAX_HMAC_DIGEST_SIZE (SHA256_DIGEST_SIZE)
+#define MAX_HMAC_BLOCK_SIZE (SHA256_BLOCK_SIZE)
+
+#define AES_CCM_RFC4309_NONCE_SIZE 3
+#define MAX_NONCE_SIZE CTR_RFC3686_NONCE_SIZE
+
+
+/* Value of each ICV_CMP byte (of 8) in case of success */
+#define ICV_VERIF_OK 0x01  
+
+struct ssi_aead_handle {
+   ssi_sram_addr_t sram_workspace_addr;
+   struct list_head aead_list;
+};
+
+struct ssi_a

[PATCH v3 04/15] staging: ccree: add IV generation support

2017-04-23 Thread Gilad Ben-Yossef
Add CryptoCell IV hardware generation support.

This patch adds the needed support to drive the HW but does not expose
the ability via the kernel crypto API yet.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Makefile  |   2 +-
 drivers/staging/ccree/ssi_buffer_mgr.c  |   2 +
 drivers/staging/ccree/ssi_cipher.c  |  11 ++
 drivers/staging/ccree/ssi_cipher.h  |   1 +
 drivers/staging/ccree/ssi_driver.c  |   9 +
 drivers/staging/ccree/ssi_driver.h  |   7 +
 drivers/staging/ccree/ssi_ivgen.c   | 301 
 drivers/staging/ccree/ssi_ivgen.h   |  72 
 drivers/staging/ccree/ssi_pm.c  |   2 +
 drivers/staging/ccree/ssi_request_mgr.c |  33 +++-
 10 files changed, 438 insertions(+), 2 deletions(-)
 create mode 100644 drivers/staging/ccree/ssi_ivgen.c
 create mode 100644 drivers/staging/ccree/ssi_ivgen.h

diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index 21a80d5..89afe9a 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
-ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_cipher.o ssi_hash.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
+ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_cipher.o ssi_hash.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index d0d5352..6ff5d6b 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -534,6 +534,7 @@ void ssi_buffer_mgr_unmap_blkcipher_request(
SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->gen_ctx.iv_dma_addr);
dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr, 
 ivsize, 
+req_ctx->is_giv ? DMA_BIDIRECTIONAL :
 DMA_TO_DEVICE);
}
/* Release pool */
@@ -587,6 +588,7 @@ int ssi_buffer_mgr_map_blkcipher_request(
req_ctx->gen_ctx.iv_dma_addr = 
dma_map_single(dev, (void *)info, 
   ivsize, 
+  req_ctx->is_giv ? DMA_BIDIRECTIONAL:
   DMA_TO_DEVICE);
if (unlikely(dma_mapping_error(dev, 
req_ctx->gen_ctx.iv_dma_addr))) {
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index d22a1b3..4a95f13 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -819,6 +819,13 @@ static int ssi_blkcipher_process(
  areq,
  desc, &seq_len);
 
+   /* do we need to generate IV? */
+   if (req_ctx->is_giv == true) {
+   ssi_req.ivgen_dma_addr[0] = req_ctx->gen_ctx.iv_dma_addr;
+   ssi_req.ivgen_dma_addr_len = 1;
+   /* set the IV size (8/16 B long)*/
+   ssi_req.ivgen_size = ivsize;
+   }
END_CYCLE_COUNT(ssi_req.op_type, STAT_PHASE_2);
 
/* STAT_PHASE_3: Lock HW and push sequence */
@@ -901,6 +908,7 @@ static int ssi_sblkcipher_encrypt(struct blkcipher_desc 
*desc,
unsigned int ivsize = crypto_blkcipher_ivsize(blk_tfm);
 
req_ctx->backup_info = desc->info;
+   req_ctx->is_giv = false;
 
return ssi_blkcipher_process(tfm, req_ctx, dst, src, nbytes, 
desc->info, ivsize, NULL, DRV_CRYPTO_DIRECTION_ENCRYPT);
 }
@@ -916,6 +924,7 @@ static int ssi_sblkcipher_decrypt(struct blkcipher_desc 
*desc,
unsigned int ivsize = crypto_blkcipher_ivsize(blk_tfm);
 
req_ctx->backup_info = desc->info;
+   req_ctx->is_giv = false;
 
return ssi_blkcipher_process(tfm, req_ctx, dst, src, nbytes, 
desc->info, ivsize, NULL, DRV_CRYPTO_DIRECTION_DECRYPT);
 }
@@ -948,6 +957,7 @@ static int ssi_ablkcipher_encrypt(struct ablkcipher_request 
*req)
unsigned int ivsize = crypto_ablkcipher_ivsize(ablk_tfm);
 
req_ctx->backup_info = req->info;
+   req_ctx->is_giv = false;
 
return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, 
req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_ENCRYPT);
 }
@@ -960,6 +970,7 @@ static int ssi_ablkcipher_decrypt(struct ablkcipher_request 
*req)
unsigned int ivsize = crypto_ablkcipher_ivsize(ablk_tfm);
 
req_ctx->backup_info = req->info;
+   req_ctx->is_giv = false;
return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, 
req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_DECRYPT);
 }
 
diff --git a/drivers/staging/ccree/ssi_cipher.h 
b/drivers/staging/ccree/ssi_cipher.h
index 9ceb0b6..ba4eb7c 100644
--- a/drivers/staging/ccree/ssi_cipher.h
+++ b/drivers/staging/ccree/ssi_cipher.h
@@ -45,6 +45,7 @@ struct blkcipher_req_ctx {
  

[PATCH v3 07/15] staging: ccree: add TODO list

2017-04-23 Thread Gilad Ben-Yossef
Add TODO list for moving out of staging tree for ccree crypto driver

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/TODO | 30 ++
 1 file changed, 30 insertions(+)
 create mode 100644 drivers/staging/ccree/TODO

diff --git a/drivers/staging/ccree/TODO b/drivers/staging/ccree/TODO
new file mode 100644
index 000..c9f5754
--- /dev/null
+++ b/drivers/staging/ccree/TODO
@@ -0,0 +1,30 @@
+
+
+*
+*  *
+* Arm Trust Zone CryptoCell REE Linux driver upstreaming TODO items*
+*  *
+*
+
+ccree specific items
+a.k.a stuff fixing for this driver to move out of staging
+~
+
+1.  Move to using Crypto Engine to handle backlog queueing.
+2.  Remove synchronous algorithm support leftovers.
+3.  Separate platform specific code for FIPS and power management into 
separate platform modules.
+4.  Drop legacy kernel support code.
+5.  Move most (all?) #ifdef CONFIG into inline functions.
+6.  Remove all unused definitions.
+7.  Re-factor to accomediate newer/older HW revisions besides the 712.
+8.  Handle the many checkpatch errors.
+9.  Implement ahash import/export correctly.
+10. Go through a proper review of DT bindings and sysfs ABI
+11. Sort out FIPS mode: bake tests into testmgr, sort out behaviour on error, 
+figure if 3DES weak key check is needed
+
+Kernel infrastructure items
+a.k.a stuff we either neither need to fix in the kernel or understand what 
we're doing wrong
+
+1. ahash import/export context has a PAGE_SIZE/8 size limit.  We need more.
+2. Crypto Engine seems to be built for HW with hardware queue depth of 1, we 
have 600++.
-- 
2.1.4



[PATCH v3 06/15] staging: ccree: add FIPS support

2017-04-23 Thread Gilad Ben-Yossef
Add FIPS mode support to CryptoCell driver

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Kconfig   |9 +
 drivers/staging/ccree/Makefile  |1 +
 drivers/staging/ccree/ssi_aead.c|6 +
 drivers/staging/ccree/ssi_cipher.c  |   52 +
 drivers/staging/ccree/ssi_driver.c  |   19 +-
 drivers/staging/ccree/ssi_driver.h  |2 +
 drivers/staging/ccree/ssi_fips.c|   65 ++
 drivers/staging/ccree/ssi_fips.h|   70 ++
 drivers/staging/ccree/ssi_fips_data.h   |  315 ++
 drivers/staging/ccree/ssi_fips_ext.c|   96 ++
 drivers/staging/ccree/ssi_fips_ll.c | 1681 +++
 drivers/staging/ccree/ssi_fips_local.c  |  369 +++
 drivers/staging/ccree/ssi_fips_local.h  |   77 ++
 drivers/staging/ccree/ssi_hash.c|   21 +-
 drivers/staging/ccree/ssi_request_mgr.c |2 +
 15 files changed, 2783 insertions(+), 2 deletions(-)
 create mode 100644 drivers/staging/ccree/ssi_fips.c
 create mode 100644 drivers/staging/ccree/ssi_fips.h
 create mode 100644 drivers/staging/ccree/ssi_fips_data.h
 create mode 100644 drivers/staging/ccree/ssi_fips_ext.c
 create mode 100644 drivers/staging/ccree/ssi_fips_ll.c
 create mode 100644 drivers/staging/ccree/ssi_fips_local.c
 create mode 100644 drivers/staging/ccree/ssi_fips_local.h

diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index 2d11223..ae62704 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -24,6 +24,15 @@ config CRYPTO_DEV_CCREE
  cryptographic operations on the system REE.
  If unsure say Y.
 
+config CCREE_FIPS_SUPPORT
+   bool "Turn on CryptoCell 7XX REE FIPS mode support"
+   depends on CRYPTO_DEV_CCREE
+   default n
+   help
+ Say 'Y' to enable support for FIPS compliant mode by the
+ CCREE driver.
+ If unsure say N.
+
 config CCREE_DISABLE_COHERENT_DMA_OPS
bool "Disable Coherent DMA operations for the CCREE driver"
depends on CRYPTO_DEV_CCREE
diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index b9285c0..44f3e3e 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
 ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o 
ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o 
ssi_pm_ext.o
+ccree-$(CCREE_FIPS_SUPPORT) += ssi_fips.o ssi_fips_ll.o ssi_fips_ext.o 
ssi_fips_local.o
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 33d72d2..0382917 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -36,6 +36,7 @@
 #include "ssi_hash.h"
 #include "ssi_sysfs.h"
 #include "ssi_sram_mgr.h"
+#include "ssi_fips_local.h"
 
 #define template_aead  template_u.aead
 
@@ -153,6 +154,8 @@ static int ssi_aead_init(struct crypto_aead *tfm)
container_of(alg, struct ssi_crypto_alg, aead_alg);
SSI_LOG_DEBUG("Initializing context @%p for %s\n", ctx, 
crypto_tfm_alg_name(&(tfm->base)));
 
+   CHECK_AND_RETURN_UPON_FIPS_ERROR();
+
/* Initialize modes in instance */
ctx->cipher_mode = ssi_alg->cipher_mode;
ctx->flow_mode = ssi_alg->flow_mode;
@@ -572,6 +575,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
SSI_LOG_DEBUG("Setting key in context @%p for %s. key=%p keylen=%u\n",
ctx, crypto_tfm_alg_name(crypto_aead_tfm(tfm)), key, keylen);
 
+   CHECK_AND_RETURN_UPON_FIPS_ERROR();
/* STAT_PHASE_0: Init and sanity checks */
START_CYCLE_COUNT();
 
@@ -699,6 +703,7 @@ static int ssi_aead_setauthsize(
 {
struct ssi_aead_ctx *ctx = crypto_aead_ctx(authenc);

+   CHECK_AND_RETURN_UPON_FIPS_ERROR();
/* Unsupported auth. sizes */
if ((authsize == 0) ||
(authsize >crypto_aead_maxauthsize(authenc))) {
@@ -2006,6 +2011,7 @@ static int ssi_aead_process(struct aead_request *req, 
enum drv_crypto_direction
SSI_LOG_DEBUG("%s context=%p req=%p iv=%p src=%p src_ofs=%d dst=%p 
dst_ofs=%d cryptolen=%d\n",
((direct==DRV_CRYPTO_DIRECTION_ENCRYPT)?"Encrypt":"Decrypt"), 
ctx, req, req->iv,
sg_virt(req->src), req->src->offset, sg_virt(req->dst), 
req->dst->offset, req->cryptlen);
+   CHECK_AND_RETURN_UPON_FIPS_ERROR();
 
/* STAT_PHASE_0: Init and sanity checks */
START_CYCLE_COUNT();
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index 4a95f13..664ed7e 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -31,6 +31,7 @@
 #include "ssi_cipher.h"
 #include "ssi_request_mgr.h"
 #include "ssi_sysfs.h"
+#include "ssi_fips_local.h"
 
 #define MAX_ABLKCIPHER_SEQ_LEN 6
 
@@ -191,6 +192,7 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
SSI_LOG_DEBUG

[PATCH v3 08/15] staging: ccree: add DT bindings for Arm CryptoCell

2017-04-23 Thread Gilad Ben-Yossef
This adds DT bindings for the Arm TrustZone CryptoCell cryptographic
accelerator IP.

Signed-off-by: Gilad Ben-Yossef 
---
 .../devicetree/bindings/crypto/arm-cryptocell.txt  | 27 ++
 1 file changed, 27 insertions(+)
 create mode 100644 
drivers/staging/ccree/Documentation/devicetree/bindings/crypto/arm-cryptocell.txt

diff --git 
a/drivers/staging/ccree/Documentation/devicetree/bindings/crypto/arm-cryptocell.txt
 
b/drivers/staging/ccree/Documentation/devicetree/bindings/crypto/arm-cryptocell.txt
new file mode 100644
index 000..2ea6517
--- /dev/null
+++ 
b/drivers/staging/ccree/Documentation/devicetree/bindings/crypto/arm-cryptocell.txt
@@ -0,0 +1,27 @@
+Arm TrustZone CryptoCell cryptographic accelerators
+
+Required properties:
+- compatible: must be "arm,cryptocell-712-ree".
+- reg: shall contain base register location and length.
+   Typically length is 0x1.
+- interrupts: shall contain the interrupt for the device.
+
+Optional properties:
+- interrupt-parent: can designate the interrupt controller the
+   device interrupt is connected to, if needed.
+- clocks: may contain the clock handling the device, if needed.
+- power-domains: may contain a reference to the PM domain, if applicable.
+
+
+Examples:
+
+Zynq FPGA device
+
+
+   arm_cc7x: arm_cc7x@8000 {
+   compatible = "arm,cryptocell-712-ree";
+   interrupt-parent = <&intc>;
+   interrupts = < 0 30 4 >;
+   reg = < 0x8000 0x1 >;
+   };
+
-- 
2.1.4



[PATCH v3 15/15] staging: ccree: fix ifnullfree.cocci warnings

2017-04-23 Thread Gilad Ben-Yossef
From: kbuild test robot 

drivers/staging/ccree/ssi_hash.c:317:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:320:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:323:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:373:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:375:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:377:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:379:3-8: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:381:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.
drivers/staging/ccree/ssi_hash.c:383:2-7: WARNING: NULL check before freeing 
functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb 
is not needed. Maybe consider reorganizing relevant code to avoid passing NULL 
values.

 NULL check before some freeing functions is not needed.

 Based on checkpatch warning
 "kfree(NULL) is safe this check is probably not required"
 and kfreeaddr.cocci by Julia Lawall.

Generated by: scripts/coccinelle/free/ifnullfree.cocci

Signed-off-by: Gilad Ben-Yossef 
Signed-off-by: Fengguang Wu 
---
 drivers/staging/ccree/ssi_hash.c | 27 +--
 1 file changed, 9 insertions(+), 18 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index ab191de..8ff5d4e 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -314,14 +314,11 @@ static int ssi_hash_map_request(struct device *dev,
state->digest_buff_dma_addr = 0;
}
 fail3:
-   if (state->opad_digest_buff != NULL)
-   kfree(state->opad_digest_buff);
+   kfree(state->opad_digest_buff);
 fail2:
-   if (state->digest_bytes_len != NULL)
-   kfree(state->digest_bytes_len);
+   kfree(state->digest_bytes_len);
 fail1:
-   if (state->digest_buff != NULL)
-   kfree(state->digest_buff);
+kfree(state->digest_buff);
 fail_digest_result_buff:
 if (state->digest_result_buff != NULL) {
 kfree(state->digest_result_buff);
@@ -370,18 +367,12 @@ static void ssi_hash_unmap_request(struct device *dev,
state->opad_digest_dma_addr = 0;
}
 
-   if (state->opad_digest_buff != NULL)
-   kfree(state->opad_digest_buff);
-   if (state->digest_bytes_len != NULL)
-   kfree(state->digest_bytes_len);
-   if (state->digest_buff != NULL)
-   kfree(state->digest_buff);
-   if (state->digest_result_buff != NULL) 
-   kfree(state->digest_result_buff);
-   if (state->buff1 != NULL) 
-   kfree(state->buff1);
-   if (state->buff0 != NULL)
-   kfree(state->buff0);
+   kfree(state->opad_digest_buff);
+   kfree(state->digest_bytes_len);
+   kfree(state->digest_buff);
+   kfree(state->digest_result_buff);
+   kfree(state->buff1);
+   kfree(state->buff0);
 }
 
 static void ssi_hash_unmap_result(struct device *dev, 
-- 
2.1.4



[PATCH v3 14/15] staging: ccree: fix ifnullfree.cocci warnings

2017-04-23 Thread Gilad Ben-Yossef
From: kbuild test robot 

drivers/staging/ccree/ssi_buffer_mgr.c:530:3-19: WARNING: NULL check before 
freeing functions like kfree, debugfs_remove, debugfs_remove_recursive or 
usb_free_urb is not needed. Maybe consider reorganizing relevant code to avoid 
passing NULL values.

 NULL check before some freeing functions is not needed.

 Based on checkpatch warning
 "kfree(NULL) is safe this check is probably not required"
 and kfreeaddr.cocci by Julia Lawall.

Generated by: scripts/coccinelle/free/ifnullfree.cocci

Signed-off-by: Gilad Ben-Yossef 
Signed-off-by: Fengguang Wu 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index af50904..038e2ff 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -1863,8 +1863,7 @@ int ssi_buffer_mgr_fini(struct ssi_drvdata *drvdata)
struct buff_mgr_handle *buff_mgr_handle = drvdata->buff_mgr_handle;
 
if (buff_mgr_handle  != NULL) {
-   if (buff_mgr_handle->mlli_buffs_pool != NULL)
-   dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
+   dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
kfree(drvdata->buff_mgr_handle);
drvdata->buff_mgr_handle = NULL;
 
-- 
2.1.4



[PATCH v3 13/15] staging: ccree: fix array_size.cocci warnings

2017-04-23 Thread Gilad Ben-Yossef
From: kbuild test robot 

drivers/staging/ccree/ssi_sysfs.c:319:34-35: WARNING: Use ARRAY_SIZE
drivers/staging/ccree/ssi_sysfs.c:429:34-35: WARNING: Use ARRAY_SIZE

 Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element

Semantic patch information:
 This makes an effort to find cases where ARRAY_SIZE can be used such as
 where there is a division of sizeof the array by the sizeof its first
 element or by any indexed element or the element type. It replaces the
 division of the two sizeofs by ARRAY_SIZE.

Generated by: scripts/coccinelle/misc/array_size.cocci

Signed-off-by: Gilad Ben-Yossef 
Signed-off-by: Fengguang Wu 
---
 drivers/staging/ccree/ssi_sysfs.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/ccree/ssi_sysfs.c 
b/drivers/staging/ccree/ssi_sysfs.c
index 6db7573..7c514c1 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -316,7 +316,7 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj,
int i=0, offset = 0;
 
offset += scnprintf(buf + offset, PAGE_SIZE - offset, "Usage:\n");
-   for ( i = 0; i < (sizeof(help_str)/sizeof(help_str[0])); i+=2) {
+   for ( i = 0; i < ARRAY_SIZE(help_str); i+=2) {
   offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s\t\t%s\n", 
help_str[i], help_str[i+1]);
}
return offset;
@@ -426,8 +426,7 @@ int ssi_sysfs_init(struct kobject *sys_dev_obj, struct 
ssi_drvdata *drvdata)
/* Initialize top directory */
retval = sys_init_dir(&sys_top_dir, drvdata, sys_dev_obj,
"cc_info", ssi_sys_top_level_attrs,
-   sizeof(ssi_sys_top_level_attrs) /
-   sizeof(struct kobj_attribute));
+   ARRAY_SIZE(ssi_sys_top_level_attrs));
return retval;
 }
 
-- 
2.1.4



[PATCH v3 10/15] staging: ccree: remove useless NULL test of field

2017-04-23 Thread Gilad Ben-Yossef
Remove kbuild test robot reported NULL check for a struct field address.

Signed-off-by: Gilad Ben-Yossef 
Reported-by: kbuild test robot 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 0140199..af50904 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -755,9 +755,7 @@ void ssi_buffer_mgr_unmap_aead_request(
AES_BLOCK_SIZE, DMA_TO_DEVICE);
}
 
-   if (&areq_ctx->ccm_adata_sg != NULL)
-   dma_unmap_sg(dev, &areq_ctx->ccm_adata_sg,
-   1, DMA_TO_DEVICE);
+   dma_unmap_sg(dev, &areq_ctx->ccm_adata_sg, 1, DMA_TO_DEVICE);
}
if (areq_ctx->gen_ctx.iv_dma_addr != 0) {
SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gen_ctx.iv_dma_addr);
-- 
2.1.4



[PATCH v3 12/15] staging: ccree: fix semicolon.cocci warnings

2017-04-23 Thread Gilad Ben-Yossef
From: kbuild test robot 

drivers/staging/ccree/ssi_request_mgr.c:623:3-4: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Signed-off-by: Gilad Ben-Yossef 
Signed-off-by: Fengguang Wu 
---
 drivers/staging/ccree/ssi_request_mgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index 42ab2b1..522bd62 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -653,7 +653,7 @@ static void comp_handler(unsigned long devarg)
/* Avoid race with above clear: Test completion counter 
once more */
request_mgr_handle->axi_completed += 
CC_REG_FLD_GET(CRY_KERNEL, AXIM_MON_COMP, VALUE, 
CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
-   };
+   }

}
/* after verifing that there is nothing to do, Unmask AXI completion 
interrupt */
-- 
2.1.4



[PATCH v3 11/15] staging: ccree: fix platform_no_drv_owner.cocci warnings

2017-04-23 Thread Gilad Ben-Yossef
From: kbuild test robot 

drivers/staging/ccree/ssi_driver.c:484:6-11: No need to set .owner here. The 
core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Signed-off-by: Gilad Ben-Yossef 
Signed-off-by: Fengguang Wu 
---
 drivers/staging/ccree/ssi_driver.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 03a044a..bc19adc 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -539,7 +539,6 @@ MODULE_DEVICE_TABLE(of, arm_cc7x_dev_of_match);
 static struct platform_driver cc7x_driver = {
.driver = {
   .name = "cc7xree",
-  .owner = THIS_MODULE,
 #ifdef CONFIG_OF
   .of_match_table = arm_cc7x_dev_of_match,
 #endif
-- 
2.1.4



[PATCH v3 09/15] MAINTAINERS: add Gilad BY as ccree maintainer

2017-04-23 Thread Gilad Ben-Yossef
I work for Arm on maintaining the TrustZone CryptoCell driver.

Signed-off-by: Gilad Ben-Yossef 
---
 MAINTAINERS | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 676c139..f21caa1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3066,6 +3066,13 @@ F:   drivers/net/ieee802154/cc2520.c
 F: include/linux/spi/cc2520.h
 F: Documentation/devicetree/bindings/net/ieee802154/cc2520.txt
 
+CCREE ARM TRUSTZONE CRYPTOCELL 700 REE DRIVER
+M: Gilad Ben-Yossef 
+L: linux-cry...@vger.kernel.org
+S: Supported
+F: drivers/staging/ccree/
+W: 
https://developer.arm.com/products/system-ip/trustzone-cryptocell/cryptocell-700-family
+
 CEC DRIVER
 M: Hans Verkuil 
 L: linux-me...@vger.kernel.org
-- 
2.1.4



Re: [PATCH 3/4] nfs: remove the objlayout driver

2017-04-23 Thread Boaz Harrosh
On 04/21/2017 05:00 PM, Trond Myklebust wrote:
> Maintenance is not development. It’s about doing all the followup
> _after_ the feature is declared to be developed. That’s been missing
> for quite some time in the case of the OSD pNFS code, which is why
> I’m not even bothering to consider staging. If you are saying you are
> still maintaining exofs, and want to continue doing so, then great,
> but note that there is a file called BUGS in that directory that has
> been untouched since 2008, and that’s why I thing staging is a good
> idea.
> 

No, the BUGS file is just stale. As you said was not ever updated. All
the bugs (1) in there do no longer exist for a long long time.
I will send a patch to remove the file.

Yes I maintain this fs. It has the complete fixture list, of what was
first intended. I keep running it every major kernel release to make
sure it actually runs, and there are no regressions.

If this FS stands in the way of any new development please anyone
contact me and I will help in the conversion. Of exofs and the
osd-uld.

Thanks
Boaz



Re: [PATCH] ore: fix spelling mistake: "Multples" -> "multiples"

2017-04-23 Thread Boaz Harrosh
On 04/22/2017 03:48 PM, Colin King wrote:
> From: Colin Ian King 
> 
> trivial fix to spelling mistake in ORE_ERR message and make word all
> lower case.
> 
> Signed-off-by: Colin Ian King 

Thanks
ACK-by: Boaz Harrosh 

> ---
>  fs/exofs/ore.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/fs/exofs/ore.c b/fs/exofs/ore.c
> index 8bb72807e70d..811522ae45e1 100644
> --- a/fs/exofs/ore.c
> +++ b/fs/exofs/ore.c
> @@ -68,7 +68,7 @@ int ore_verify_layout(unsigned total_comps, struct 
> ore_layout *layout)
>   }
>   if (0 != (layout->stripe_unit & ~PAGE_MASK)) {
>   ORE_ERR("Stripe Unit(0x%llx)"
> -   " must be Multples of PAGE_SIZE(0x%lx)\n",
> +   " must be multiples of PAGE_SIZE(0x%lx)\n",
> _LLU(layout->stripe_unit), PAGE_SIZE);
>   return -EINVAL;
>   }
> 



Re: [PATCH v2 1/9] staging: ccree: introduce CryptoCell HW driver

2017-04-23 Thread Gilad Ben-Yossef
Hi,

[ Re sending with all recipients this time ... ]

On Thu, Apr 20, 2017 at 5:01 PM, Greg Kroah-Hartman
 wrote:

>> > Oh, I have to ask, do you really mean "any later version" here and
>> > elsewhere?
>> >
>> > If so, then your MODULE_LICENSE() marking is wrong, please fix that up,
>> > or fix up the license text, I can't take incompatible ones without
>> > getting angry emails from legal people sent to me...
>> >
>>
>> Thanks for noticing this.
>>
>> The copyright + license notice is a boilerplate I got from the powers
>> that be here.
>>
>> I'll consult internally what is the proper action. I don't want to
>> make legal mad either... :-)
>
> Ok, I'll drop this patch series then, and wait for an updated one with
> this fixed up.

This issue, along with some others pointed by reviewers, are fixed in
v3 of the patch set.

I will be happy if you choose to take it into the staging tree and
will continue to work to cut down the TODO list.

Thanks,
Gilad

-- 
Gilad Ben-Yossef
Chief Coffee Drinker

"If you take a class in large-scale robotics, can you end up in a
situation where the homework eats your dog?"
 -- Jean-Baptiste Queru


[PATCH v2] mmc: sdio: Fix sdio wait busy implement limitation

2017-04-23 Thread Jiajie Hao
The host may issue an I/O abort by writing to the CCCR at any time
during I/O read operation via CMD52. And host may need suspend
transcation during write busy stage in SDIO suspend/resume scenario.
>From other side, a card may accept CMD52 during data transfer phase.

Previous implement would block issuing above command in busy stage.
It cause function driver can't implement as proper way and has no
opportunity to do some coverage in error case via I/O abort etc.

We need bypass some necessary operation during busy check stage.

Signed-off-by: Jiajie Hao 
---
Changes since v1:(https://lkml.org/lkml/2017/4/17/69)
* extend orignal interface to cover necessary cases.
* rename mmc_is_io_op() to sdio_is_op_busy() for matching it's meaning.

---
 drivers/mmc/core/core.c |4 +++-
 drivers/mmc/core/sdio_ops.h |   10 --
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 926e0fd..2ae83a7 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -234,8 +234,10 @@ static void __mmc_start_request(struct mmc_host *host, 
struct mmc_request *mrq)
/*
 * For sdio rw commands we must wait for card busy otherwise some
 * sdio devices won't work properly.
+* And bypass I/O abort, reset and bus suspend operations.
 */
-   if (mmc_is_io_op(mrq->cmd->opcode) && host->ops->card_busy) {
+   if (sdio_is_io_busy(mrq->cmd->opcode, mrq->cmd->arg) &&
+   host->ops->card_busy) {
int tries = 500; /* Wait aprox 500ms at maximum */
 
while (host->ops->card_busy(host) && --tries)
diff --git a/drivers/mmc/core/sdio_ops.h b/drivers/mmc/core/sdio_ops.h
index bed8a83..ee35cb4 100644
--- a/drivers/mmc/core/sdio_ops.h
+++ b/drivers/mmc/core/sdio_ops.h
@@ -26,9 +26,15 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, 
unsigned fn,
 int sdio_reset(struct mmc_host *host);
 unsigned int mmc_align_data_size(struct mmc_card *card, unsigned int sz);
 
-static inline bool mmc_is_io_op(u32 opcode)
+static inline bool sdio_is_io_busy(u32 opcode, u32 arg)
 {
-   return opcode == SD_IO_RW_DIRECT || opcode == SD_IO_RW_EXTENDED;
+   u32 addr;
+
+   addr = (arg >> 9) & 0x1;
+
+   return (opcode == SD_IO_RW_EXTENDED ||
+   (opcode == SD_IO_RW_DIRECT &&
+   !(addr == SDIO_CCCR_ABORT || addr == SDIO_CCCR_SUSPEND)));
 }
 
 #endif
-- 
1.7.9.5



[PATCH 1/1] wan: pc300too: abort path on failure

2017-04-23 Thread Pan Bian
From: Pan Bian 

In function pc300_pci_init_one(), on the ioremap error path, function
pc300_pci_remove_one() is called to free the allocated memory. However,
the path is not terminated, and the freed memory will be used later,
resulting in use-after-free bugs. This path fixes the bug.

Signed-off-by: Pan Bian 
---
 drivers/net/wan/pc300too.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/wan/pc300too.c b/drivers/net/wan/pc300too.c
index e1dd1ec..b9b934b 100644
--- a/drivers/net/wan/pc300too.c
+++ b/drivers/net/wan/pc300too.c
@@ -346,6 +346,7 @@ static int pc300_pci_init_one(struct pci_dev *pdev,
card->rambase == NULL) {
pr_err("ioremap() failed\n");
pc300_pci_remove_one(pdev);
+   return -ENOMEM;
}
 
/* PLX PCI 9050 workaround for local configuration register read bug */
-- 
1.9.1




Re: [PATCH v2 6/9] staging: ccree: add FIPS support

2017-04-23 Thread Gilad Ben-Yossef
Hi,

Thank you for the review.

On Thu, Apr 20, 2017 at 4:39 PM, Stephan Müller  wrote:

>> +/* The function verifies that tdes keys are not weak.*/
>> +static int ssi_fips_verify_3des_keys(const u8 *key, unsigned int keylen)
>> +{
>> +#ifdef CCREE_FIPS_SUPPORT
>> +tdes_keys_t *tdes_key = (tdes_keys_t*)key;
>> +
>> + /* verify key1 != key2 and key3 != key2*/
>
> I do not think that this check is necessary. There is no FIPS requirement or
> IG that mandates this (unlike the XTS key check).
>
> If there would be such requirement, we would need a common service function
> for all TDES implementations

I am not sure. I have forwarded a question internally and based on the
answer will either drop this or add a common function and post a patch
add the check to all 3DES implementation.

This has been added to the staging TODO list for the driver.

>
>> +if (unlikely( (memcmp((u8*)tdes_key->key1, (u8*)tdes_key->key2,
>> sizeof(tdes_key->key1)) == 0) || +  
>> (memcmp((u8*)tdes_key->key3,
>> (u8*)tdes_key->key2, sizeof(tdes_key->key3)) == 0) )) { +
>> return -ENOEXEC;
>> +}
>> +#endif /* CCREE_FIPS_SUPPORT */
>> +
>> +return 0;
>> +}
>> +
>> +/* The function verifies that xts keys are not weak.*/
>> +static int ssi_fips_verify_xts_keys(const u8 *key, unsigned int keylen)
>> +{
>> +#ifdef CCREE_FIPS_SUPPORT
>> +/* Weak key is define as key that its first half (128/256 lsb)
>> equals its second half (128/256 msb) */ +int singleKeySize = keylen
>> >> 1;
>> +
>> + if (unlikely(memcmp(key, &key[singleKeySize], singleKeySize) == 0)) {
>> + return -ENOEXEC;
>
> Use xts_check_key.

Will fix. Added to TODO staging list for the driver.

>
>> +The test vectors were taken from:
>> +
>> +* AES
>> +NIST Special Publication 800-38A 2001 Edition
>> +Recommendation for Block Cipher Modes of Operation
>> +http://csrc.nist.gov/publications/nistpubs/800-38a/sp800-38a.pdf
>> +Appendix F: Example Vectors for Modes of Operation of the AES
>> +
>> +* AES CTS
>> +Advanced Encryption Standard (AES) Encryption for Kerberos 5
>> +February 2005
>> +https://tools.ietf.org/html/rfc3962#appendix-B
>> +B.  Sample Test Vectors
>> +
>> +* AES XTS
>> +http://csrc.nist.gov/groups/STM/cavp/#08
>> +http://csrc.nist.gov/groups/STM/cavp/documents/aes/XTSTestVectors.zip
>> +
>> +* AES CMAC
>> +http://csrc.nist.gov/groups/STM/cavp/index.html#07
>> +http://csrc.nist.gov/groups/STM/cavp/documents/mac/cmactestvectors.zip
>> +
>> +* AES-CCM
>> +http://csrc.nist.gov/groups/STM/cavp/#07
>> +http://csrc.nist.gov/groups/STM/cavp/documents/mac/ccmtestvectors.zip
>> +
>> +* AES-GCM
>> +http://csrc.nist.gov/groups/STM/cavp/documents/mac/gcmtestvectors.zip
>> +
>> +* Triple-DES
>> +NIST Special Publication 800-67 January 2012
>> +Recommendation for the Triple Data Encryption Algorithm (TDEA) Block Cipher
>> +http://csrc.nist.gov/publications/nistpubs/800-67-Rev1/SP-800-67-Rev1.pdf
>> +APPENDIX B: EXAMPLE OF TDEA FORWARD AND INVERSE CIPHER OPERATIONS +and
>> +http://csrc.nist.gov/groups/STM/cavp/#01
>> +http://csrc.nist.gov/groups/STM/cavp/documents/des/tdesmct_intermediate.zip
>> +
>> +* HASH
>> +http://csrc.nist.gov/groups/STM/cavp/#03
>> +http://csrc.nist.gov/groups/STM/cavp/documents/shs/shabytetestvectors.zip
>> +
>> +* HMAC
>> +http://csrc.nist.gov/groups/STM/cavp/#07
>> +http://csrc.nist.gov/groups/STM/cavp/documents/mac/hmactestvectors.zip
>> +
>> +*/
>
> Is this test vector business really needed? Why do you think that testmgr.c is
> not sufficient? Other successful FIPS validations of the kernel crypto API
> managed without such special code.

That is a very good question. I am guessing this has something to do
to with this driver spending its life out of tree and being maintained
against old kernel versions that may have had some gaps in FIPS
testing and since fixed.

I will review what, if at all, is missing from testmgr and fold those
missing parts (if found) there and drop this from the driver.

>
> Also, your entire API seems to implement the approach that if there is a self
> test error, you disable the cipher functions, but leave the rest in-tact. The
> standard kernel crypto API handling logic is to simply panic the kernel. Is it
> really necessary to implement a special case for your driver?
>
>

No it isn't. What ever the behavior we need it should be added,
pending review of course, to the generic FIPS logic handling.

I do wonder if there is value in alternate behavior of stopping crypto
API on FIPS error rather than a panic though. I will try to get an
explanation why we do it this way.

Handling all these has been added to the driver staging TODO list and
will be handled before it matures into drivers/crypto/

Many thanks for the review!

Gilad


-- 
Gilad Ben-Yossef
Chief Coffee Drinker

"If you take a class in large-scale robotics, can you end up in a
situation where the homework eats your dog?"
 -- Jean-Baptiste Queru


[PATCH] Revert "x86/mm/gup: Switch GUP to the generic get_user_page_fast() implementation"

2017-04-23 Thread Ingo Molnar

* Dan Williams  wrote:

> > I can't find the issue either.
> >
> > Is it something reproducible without hardware? In KVM?
> 
> You can do it in KVM, just boot with the memmap=ss!nn parameter to
> simulate pmem. In this case I'm booting with memmap=4G!8G, you should
> also specify "nokaslr".
> 
> > If yes, could you share the test-case?
> 
> Yes, run:
> 
> ./autogen.sh
> ./configure CFLAGS='-g -O0' --prefix=/usr --sysconfdir=/etc
> --libdir=/usr/lib64
> make TESTS=device-dax check
> 
> ...from a checkout of the ndctl project:
> 
> https://github.com/pmem/ndctl
> 
> Let me know if you run into any problems getting the test to build or run.
> 
> >
> >> [   35.423841] WARNING: CPU: 8 PID: 245 at lib/percpu-refcount.c:155
> >> percpu_ref_switch_to_atomic_rcu+0x1f5/0x200
> >> [   35.425328] percpu ref (dax_pmem_percpu_release [dax_pmem]) <= 0
> >> (0) after switching to atomic

Since the bug appears to be pretty severe (GUP race causing possible memory 
corruption that could affect a lot of code), and the merge window is awfully 
close, plus the reproducer appears to be pretty quick, I've queued up the
revert below for the time being, to not block the rest of the pending
tip:x86/mm changes.

I'd have loved to see this conversion in v4.12, but not at any cost.

Thanks,

Ingo

==>
>From 6dd29b3df975582ef429b5b93c899e6575785940 Mon Sep 17 00:00:00 2001
From: Ingo Molnar 
Date: Sun, 23 Apr 2017 11:37:17 +0200
Subject: [PATCH] Revert "x86/mm/gup: Switch GUP to the generic 
get_user_page_fast() implementation"

This reverts commit 2947ba054a4dabbd82848728d765346886050029.

Dan Williams reported dax-pmem kernel warnings with the following signature:

   WARNING: CPU: 8 PID: 245 at lib/percpu-refcount.c:155 
percpu_ref_switch_to_atomic_rcu+0x1f5/0x200
   percpu ref (dax_pmem_percpu_release [dax_pmem]) <= 0 (0) after switching to 
atomic

... and bisected it to this commit, which suggests possible memory corruption
caused by the x86 fast-GUP conversion.

He also pointed out:

 "
  This is similar to the backtrace when we were not properly handling
  pud faults and was fixed with this commit: 220ced1676c4 "mm: fix
  get_user_pages() vs device-dax pud mappings"

  I've found some missing _devmap checks in the generic
  get_user_pages_fast() path, but this does not fix the regression
  [...]
 "

So given that there are known bugs, and a pretty robust looking bisection
points to this commit suggesting that are unknown bugs in the conversion
as well, revert it for the time being - we'll re-try in v4.13.

Reported-by: Dan Williams 
Cc: Andrew Morton 
Cc: Borislav Petkov 
Cc: Catalin Marinas 
Cc: Kirill A. Shutemov 
Cc: Linus Torvalds 
Cc: Michal Hocko 
Cc: Peter Zijlstra 
Cc: Rik van Riel 
Cc: Thomas Gleixner 
Cc: aneesh.ku...@linux.vnet.ibm.com
Cc: dann.fraz...@canonical.com
Cc: dave.han...@intel.com
Cc: steve.cap...@linaro.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar 
---
 arch/arm/Kconfig  |   2 +-
 arch/arm64/Kconfig|   2 +-
 arch/powerpc/Kconfig  |   2 +-
 arch/x86/Kconfig  |   3 -
 arch/x86/include/asm/mmu_context.h|  12 +
 arch/x86/include/asm/pgtable-3level.h |  47 
 arch/x86/include/asm/pgtable.h|  53 
 arch/x86/include/asm/pgtable_64.h |  16 +-
 arch/x86/mm/Makefile  |   2 +-
 arch/x86/mm/gup.c | 496 ++
 mm/Kconfig|   2 +-
 mm/gup.c  |  10 +-
 12 files changed, 519 insertions(+), 128 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 454fadd077ad..0d4e71b42c77 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1666,7 +1666,7 @@ config ARCH_SELECT_MEMORY_MODEL
 config HAVE_ARCH_PFN_VALID
def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 
-config HAVE_GENERIC_GUP
+config HAVE_GENERIC_RCU_GUP
def_bool y
depends on ARM_LPAE
 
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index af62bf79721a..3741859765cf 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -205,7 +205,7 @@ config GENERIC_CALIBRATE_DELAY
 config ZONE_DMA
def_bool y
 
-config HAVE_GENERIC_GUP
+config HAVE_GENERIC_RCU_GUP
def_bool y
 
 config ARCH_DMA_ADDR_T_64BIT
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3a716b2dcde9..97a8bc8a095c 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -135,7 +135,7 @@ config PPC
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER
select HAVE_GCC_PLUGINS
-   select HAVE_GENERIC_GUP
+   select HAVE_GENERIC_RCU_GUP
select HAVE_HW_BREAKPOINT   if PERF_EVENTS && (PPC_BOOK3S 
|| PPC_8xx)
select HAVE_IDE
select HAVE_IOREMAP_PROT
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a641b900fc1f..2bde14451e54 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -278

Re: [RFC][PATCH] proc: invalidate the deleting or deleted proc dentry

2017-04-23 Thread Hou Tao
Hi, any comment ?

On 2017/4/13 21:49, Hou Tao wrote:
> After the invocation of remove_proc_entry() for a proc fs directory,
> if the related dentry had been held by some processes (eg., by chdir),
> the lookup afterwards will still return the old proc_dir_entry. The
> new created proc fs files under the proc fs directory will not be
> visible until the old dentry is released, and this makes our hotplug
> process to fail which needs to access the new proc fs files.
> 
> To fix it, we need to mark the deleting or deleted proc_dir_entry
> as invalid and the lookup afterwards will use the new proc_dir_entry
> regardless of the status of the old dentry.
> 
> Signed-off-by: Hou Tao 
> ---
>  fs/proc/generic.c  | 21 -
>  fs/proc/inode.c|  5 +
>  fs/proc/internal.h |  1 +
>  3 files changed, 26 insertions(+), 1 deletion(-)
> 
> diff --git a/fs/proc/generic.c b/fs/proc/generic.c
> index ee27feb..92c9dd4 100644
> --- a/fs/proc/generic.c
> +++ b/fs/proc/generic.c
> @@ -23,11 +23,19 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "internal.h"
>  
> +static int proc_dentry_revalidate(struct dentry *dentry, unsigned int flags);
> +
>  static DEFINE_RWLOCK(proc_subdir_lock);
>  
> +static const struct dentry_operations proc_dentry_operations = {
> + .d_revalidate = proc_dentry_revalidate,
> + .d_delete = always_delete_dentry,
> +};
> +
>  static int proc_match(unsigned int len, const char *name, struct 
> proc_dir_entry *de)
>  {
>   if (len < de->namelen)
> @@ -223,6 +231,17 @@ void proc_free_inum(unsigned int inum)
>   spin_unlock_irqrestore(&proc_inum_lock, flags);
>  }
>  
> +static int proc_dentry_revalidate(struct dentry *dentry, unsigned int flags)
> +{
> + struct proc_dir_entry *de;
> +
> + if (flags & LOOKUP_RCU)
> + return -ECHILD;
> +
> + de = PDE(d_inode(dentry));
> + return !proc_entry_is_removing(de);
> +}
> +
>  /*
>   * Don't create negative dentries here, return -ENOENT by hand
>   * instead.
> @@ -240,7 +259,7 @@ struct dentry *proc_lookup_de(struct proc_dir_entry *de, 
> struct inode *dir,
>   inode = proc_get_inode(dir->i_sb, de);
>   if (!inode)
>   return ERR_PTR(-ENOMEM);
> - d_set_d_op(dentry, &simple_dentry_operations);
> + d_set_d_op(dentry, &proc_dentry_operations);
>   d_add(dentry, inode);
>   return NULL;
>   }
> diff --git a/fs/proc/inode.c b/fs/proc/inode.c
> index 2cc7a80..84232d0 100644
> --- a/fs/proc/inode.c
> +++ b/fs/proc/inode.c
> @@ -171,6 +171,11 @@ static void close_pdeo(struct proc_dir_entry *pde, 
> struct pde_opener *pdeo)
>   }
>  }
>  
> +bool proc_entry_is_removing(struct proc_dir_entry *de)
> +{
> + return (atomic_read(&de->in_use) == BIAS);
> +}
> +
>  void proc_entry_rundown(struct proc_dir_entry *de)
>  {
>   DECLARE_COMPLETION_ONSTACK(c);
> diff --git a/fs/proc/internal.h b/fs/proc/internal.h
> index c5ae09b..646b3f6 100644
> --- a/fs/proc/internal.h
> +++ b/fs/proc/internal.h
> @@ -205,6 +205,7 @@ void set_proc_pid_nlink(void);
>  extern struct inode *proc_get_inode(struct super_block *, struct 
> proc_dir_entry *);
>  extern int proc_fill_super(struct super_block *, void *data, int flags);
>  extern void proc_entry_rundown(struct proc_dir_entry *);
> +extern bool proc_entry_is_removing(struct proc_dir_entry *de);
>  
>  /*
>   * proc_namespaces.c
> 


[PATCH 1/1] staging: comedi: addi_apci_3xxx: check return value

2017-04-23 Thread Pan Bian
From: Pan Bian 

Function pci_ioremap_bar() will return a NULL pointer if there is no
enough memory. However, in function apci3xxx_auto_attach(), the return
value of function pci_ioremap_bar() is not validated. This may result in
NULL dereference in following access to dev->mmio. This patch fixes the
bug.

Signed-off-by: Pan Bian 
---
 drivers/staging/comedi/drivers/addi_apci_3xxx.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/staging/comedi/drivers/addi_apci_3xxx.c 
b/drivers/staging/comedi/drivers/addi_apci_3xxx.c
index b6af3eb..a07d5bd 100644
--- a/drivers/staging/comedi/drivers/addi_apci_3xxx.c
+++ b/drivers/staging/comedi/drivers/addi_apci_3xxx.c
@@ -787,6 +787,8 @@ static int apci3xxx_auto_attach(struct comedi_device *dev,
 
dev->iobase = pci_resource_start(pcidev, 2);
dev->mmio = pci_ioremap_bar(pcidev, 3);
+   if (!dev->mmio)
+   return -ENOMEM;
 
if (pcidev->irq > 0) {
ret = request_irq(pcidev->irq, apci3xxx_irq_handler,
-- 
1.9.1




tango_nand: is logic right in error cases? (was Re: fsl_ifc_nand: are blank pages protected by ECC?)

2017-04-23 Thread Pavel Machek
Hi!

> > Maybe I figured it out. Unfortunately, it is only compile tested. Does
> > it look approximately right?
> 
> Yep that's definitely better. Just one thing missing (see below),
> otherwise it looks good.

I'm copying from tango_nand, therefore I had to check tango_nand, too.

static int check_erased_page(struct nand_chip *chip, u8 *buf)
{
...
res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size,
  meta, meta_len,
  chip->ecc.strength);
if (res < 0)
mtd->ecc_stats.failed++;
else
mtd->ecc_stats.corrected += res;

bitflips = max(res, bitflips);
...
return bitflips;
}

static int tango_read_page(struct mtd_info *mtd, struct nand_chip *chip,
   u8 *buf, int oob_required, int page)
{
...
res = decode_error_report(nfc);
if (res < 0) {
chip->ecc.read_oob_raw(mtd, chip, page);
res = check_erased_page(chip, buf);
}

return res;
}


So nand_check_erased_ecc_chunk() returns < 0 (failed ECC), but then we
perform max() with bitflips (lets say 1, correctable ECC) and return
1? tango_read_page then returns 1 (correctable ECC) forgetting about
failed ECC...?

Best regards,
Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) 
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


signature.asc
Description: Digital signature


[PATCH 1/1] net: bcmgenet: fix incorrect return value checks

2017-04-23 Thread Pan Bian
From: Pan Bian 

Function platform_get_irq() will return a negative value on errors.
However, in function bcmgenet_probe(), 0 is considered as a flag of
error. This patch fixes the bug by checking whether the return value of
platform_get_irq() is less than 0.

Signed-off-by: Pan Bian 
---
 drivers/net/ethernet/broadcom/genet/bcmgenet.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c 
b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
index 365895e..0bccf2b 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
@@ -3329,7 +3329,7 @@ static int bcmgenet_probe(struct platform_device *pdev)
priv->irq0 = platform_get_irq(pdev, 0);
priv->irq1 = platform_get_irq(pdev, 1);
priv->wol_irq = platform_get_irq(pdev, 2);
-   if (!priv->irq0 || !priv->irq1) {
+   if (priv->irq0 < 0 || priv->irq1 < 0) {
dev_err(&pdev->dev, "can't find IRQs\n");
err = -EINVAL;
goto err;
-- 
1.9.1




Re: [PATCH] mailbox: fix completion order for blocking requests

2017-04-23 Thread Jassi Brar
On Tue, Apr 11, 2017 at 6:15 PM, Alexey Klimov  wrote:
> On Thu, Apr 06, 2017 at 10:45:26PM +0530, Jassi Brar wrote:
>> On 6 April 2017 at 22:28, Alexey Klimov  wrote:
>> > Hi Jassi/Sudeep,
>> >
>> > On Wed, Mar 29, 2017 at 07:01:09PM +0100, Sudeep Holla wrote:
>> >>
>> >>
>> >> On 29/03/17 18:43, Jassi Brar wrote:
>> ...
>>
>> >> > diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c
>> >> > index 9dfbf7e..e06c50c 100644
>> >> > --- a/drivers/mailbox/mailbox.c
>> >> > +++ b/drivers/mailbox/mailbox.c
>> >> > @@ -41,6 +41,7 @@ static int add_to_rbuf(struct mbox_chan *chan, void 
>> >> > *mssg)
>> >> >
>> >> > idx = chan->msg_free;
>> >> > chan->msg_data[idx] = mssg;
>> >> > +   init_completion(&chan->tx_cmpl[idx]);
>> >>
>> >> reinit would be better.
>> >
>> Of course.
>>
>> 
>> > From: Alexey Klimov 
>> > Date: Thu, 6 Apr 2017 13:57:02 +0100
>> > Subject: [RFC][PATCH] mailbox: per-channel arrays with msg data and 
>> > completion
>> >  structures
>> >
>> > When a mailbox client doesn't serialize sending of the message itself,
>> > and asks mailbox framework to block on mbox_send_message(), one
>> > completion structure per channel is not enough. Client can make a few
>> > mbox_send_message() calls at the same time, and there is no guaranteed
>> > order of going to sleep on completion.
>> >
>> > If mailbox controller acks a message transfer, then tx_tick() wakes up
>> > the first thread that waits on completion.
>> > If mailbox controller doesn't ack the transfer and timeout happens, then
>> > tx_tick() calls complete, and the next caller trying to sleep on
>> > completion wakes up immediately.
>> >
>> > This patch fixes this by changing completion structures to be inserted
>> > into an array that contains a) pointer to data provided by client and
>> > b) the completion structure. Thus active_req field tracks the index of
>> > the current running request that was submitted to mailbox controller.
>> >
>> > Signed-off-by: Alexey Klimov 
>> > ---
>> >  drivers/mailbox/mailbox.c  | 40 
>> > +++---
>> >  drivers/mailbox/pcc.c  | 10 +++---
>> >  include/linux/mailbox_controller.h | 24 +--
>> ...
>> >  3 files changed, 49 insertions(+), 25 deletions(-)
>> >
>>  Versus   4 files changed, 17 insertions(+), 8 deletions(-)
>>
>> I think we should just keep it simpler if it works just as fine.
>
> Along with this patch you still need at least one patch from Sudeep with 
> subject:
> "[PATCH 1/3] mailbox: always wait in mbox_send_message for blocking Tx mode"
>
Yes. Just so we are on same page, can you please redo your tests and
see if this and Sudeep's patch-1/3 does the trick?

Thanks


[PATCH] staging: android: ion: fix coding style issue

2017-04-23 Thread Adheer Chandravanshi
Use tab instead of spaces for indentation, as reported by checkpatch.pl

Signed-off-by: Adheer Chandravanshi 
---
 drivers/staging/android/ion/ion_cma_heap.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/android/ion/ion_cma_heap.c 
b/drivers/staging/android/ion/ion_cma_heap.c
index dc2a913..a0949bc 100644
--- a/drivers/staging/android/ion/ion_cma_heap.c
+++ b/drivers/staging/android/ion/ion_cma_heap.c
@@ -108,7 +108,7 @@ static struct ion_heap *__ion_cma_heap_create(struct cma 
*cma)
 
 int __ion_add_cma_heaps(struct cma *cma, void *data)
 {
-struct ion_heap *heap;
+   struct ion_heap *heap;
 
heap = __ion_cma_heap_create(cma);
if (IS_ERR(heap))
@@ -116,8 +116,8 @@ int __ion_add_cma_heaps(struct cma *cma, void *data)
 
heap->name = cma_get_name(cma);
 
-ion_device_add_heap(heap);
-return 0;
+   ion_device_add_heap(heap);
+   return 0;
 }
 
 static int ion_add_cma_heaps(void)
-- 
1.9.1



Re: [PATCH 1/2] dmaengine: s3c24xx: Use devm_kcalloc() in s3c24xx_dma_probe()

2017-04-23 Thread Tobias Jakobi
Hello Markus,


SF Markus Elfring wrote:
> From: Markus Elfring 
> Date: Sat, 22 Apr 2017 23:00:23 +0200
> 
> * A multiplication for the size determination of a memory allocation
>   indicated that an array data structure should be processed.
>   Thus use the corresponding function "devm_kcalloc".
I have trouble parsing that sentences. This looks like the typical
approach of native german speakers to directly transfer sentence
constructions from German to English. Which, in most cases, doesn't work
or is just plain confusing.

With best wishes,
Tobias


> * Replace the specification of a data structure by a pointer dereference
>   to make the corresponding size determination a bit safer according to
>   the Linux coding style convention.
> 
> Signed-off-by: Markus Elfring 
> ---
>  drivers/dma/s3c24xx-dma.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
> index f04c4702d98b..967229829683 100644
> --- a/drivers/dma/s3c24xx-dma.c
> +++ b/drivers/dma/s3c24xx-dma.c
> @@ -1216,10 +1216,10 @@ static int s3c24xx_dma_probe(struct platform_device 
> *pdev)
>   if (IS_ERR(s3cdma->base))
>   return PTR_ERR(s3cdma->base);
>  
> - s3cdma->phy_chans = devm_kzalloc(&pdev->dev,
> -   sizeof(struct s3c24xx_dma_phy) *
> - pdata->num_phy_channels,
> -   GFP_KERNEL);
> + s3cdma->phy_chans = devm_kcalloc(&pdev->dev,
> +  pdata->num_phy_channels,
> +  sizeof(*s3cdma->phy_chans),
> +  GFP_KERNEL);
>   if (!s3cdma->phy_chans)
>   return -ENOMEM;
>  
> 



[PATCH 1/1] char: xillybus: check return value

2017-04-23 Thread Pan Bian
From: Pan Bian 

Function of_address_to_resource() tries to translate device tree address
and return as resource. If the translation fails, it will return a
negative errno. However, function xilly_drv_probe() does not validate
its return value, which may result in a bad memory access bug. This
patch fixes the bug.

Signed-off-by: Pan Bian 
---
 drivers/char/xillybus/xillybus_of.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/char/xillybus/xillybus_of.c 
b/drivers/char/xillybus/xillybus_of.c
index 78a492f..57b295a 100644
--- a/drivers/char/xillybus/xillybus_of.c
+++ b/drivers/char/xillybus/xillybus_of.c
@@ -137,6 +137,8 @@ static int xilly_drv_probe(struct platform_device *op)
dev_set_drvdata(dev, endpoint);
 
rc = of_address_to_resource(dev->of_node, 0, &res);
+   if (rc < 0)
+   return rc;
endpoint->registers = devm_ioremap_resource(dev, &res);
 
if (IS_ERR(endpoint->registers))
-- 
1.9.1




[PATCH 1/1] iommu/amd: fix incorrect error handling

2017-04-23 Thread Pan Bian
From: Pan Bian 

In function amd_iommu_bind_pasid(), the control flow jumps to label
out_free when pasid_state->mm and mm is NULL. And mmput(mm) is called.
In function mmput(mm), mm is referenced without validation. This will
result in a NULL dereference bug. This patch fixes the bug.

Signed-off-by: Pan Bian 
---
 drivers/iommu/amd_iommu_v2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/amd_iommu_v2.c b/drivers/iommu/amd_iommu_v2.c
index 0633439..6629c47 100644
--- a/drivers/iommu/amd_iommu_v2.c
+++ b/drivers/iommu/amd_iommu_v2.c
@@ -696,9 +696,9 @@ int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
 
 out_unregister:
mmu_notifier_unregister(&pasid_state->mn, mm);
+   mmput(mm);
 
 out_free:
-   mmput(mm);
free_pasid_state(pasid_state);
 
 out:
-- 
1.9.1




Re: [PATCH] mm, vmscan: do not loop on too_many_isolated for ever

2017-04-23 Thread Tetsuo Handa
On 2017/03/10 20:44, Tetsuo Handa wrote:
> Michal Hocko wrote:
>> On Thu 09-03-17 13:05:40, Johannes Weiner wrote:
>>> On Tue, Mar 07, 2017 at 02:52:36PM -0500, Rik van Riel wrote:
 It only does this to some extent.  If reclaim made
 no progress, for example due to immediately bailing
 out because the number of already isolated pages is
 too high (due to many parallel reclaimers), the code
 could hit the "no_progress_loops > MAX_RECLAIM_RETRIES"
 test without ever looking at the number of reclaimable
 pages.
>>>
>>> Hm, there is no early return there, actually. We bump the loop counter
>>> every time it happens, but then *do* look at the reclaimable pages.
>>>
 Could that create problems if we have many concurrent
 reclaimers?
>>>
>>> With increased concurrency, the likelihood of OOM will go up if we
>>> remove the unlimited wait for isolated pages, that much is true.
>>>
>>> I'm not sure that's a bad thing, however, because we want the OOM
>>> killer to be predictable and timely. So a reasonable wait time in
>>> between 0 and forever before an allocating thread gives up under
>>> extreme concurrency makes sense to me.
>>>
 It may be OK, I just do not understand all the implications.

 I like the general direction your patch takes the code in,
 but I would like to understand it better...
>>>
>>> I feel the same way. The throttling logic doesn't seem to be very well
>>> thought out at the moment, making it hard to reason about what happens
>>> in certain scenarios.
>>>
>>> In that sense, this patch isn't really an overall improvement to the
>>> way things work. It patches a hole that seems to be exploitable only
>>> from an artificial OOM torture test, at the risk of regressing high
>>> concurrency workloads that may or may not be artificial.
>>>
>>> Unless I'm mistaken, there doesn't seem to be a whole lot of urgency
>>> behind this patch. Can we think about a general model to deal with
>>> allocation concurrency? 
>>
>> I am definitely not against. There is no reason to rush the patch in.
> 
> I don't hurry if we can check using watchdog whether this problem is occurring
> in the real world. I have to test corner cases because watchdog is missing.
> 
Ping?

This problem can occur even immediately after the first invocation of
the OOM killer. I believe this problem can occur in the real world.
When are we going to apply this patch or watchdog patch?


[0.00] Linux version 4.11.0-rc7-next-20170421+ (root@ccsecurity) (gcc 
version 4.8.5 20150623 (Red Hat 4.8.5-11) (GCC) ) #588 SMP Sun Apr 23 17:38:02 
JST 2017
[0.00] Command line: BOOT_IMAGE=/boot/vmlinuz-4.11.0-rc7-next-20170421+ 
root=UUID=17c3c28f-a70a-4666-95fa-ecf6acd901e4 ro vconsole.keymap=jp106 
crashkernel=256M vconsole.font=latarcyrheb-sun16 security=none 
sysrq_always_enabled console=ttyS0,115200n8 console=tty0 LANG=en_US.UTF-8 
debug_guardpage_minorder=1
(...snipped...)
CentOS Linux 7 (Core)
Kernel 4.11.0-rc7-next-20170421+ on an x86_64

ccsecurity login: [   32.406723] ip6_tables: (C) 2000-2006 Netfilter Core Team
[   32.852917] Ebtables v2.0 registered
[   33.034402] nf_conntrack version 0.5.0 (16384 buckets, 65536 max)
[   33.467929] e1000: ens32 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: 
None
[   33.475728] IPv6: ADDRCONF(NETDEV_UP): ens32: link is not ready
[   33.478910] IPv6: ADDRCONF(NETDEV_CHANGE): ens32: link becomes ready
[   33.950365] Netfilter messages via NETLINK v0.30.
[   33.983449] ip_set: protocol 6
[   37.335966] e1000: ens35 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: 
None
[   37.337587] IPv6: ADDRCONF(NETDEV_UP): ens35: link is not ready
[   37.339925] IPv6: ADDRCONF(NETDEV_CHANGE): ens35: link becomes ready
[   39.940942] nf_conntrack: default automatic helper assignment has been 
turned off for security reasons and CT-based  firewall rule not found. Use the 
iptables CT target to attach helpers instead.
[   98.926202] a.out invoked oom-killer: 
gfp_mask=0x14280ca(GFP_HIGHUSER_MOVABLE|__GFP_ZERO), nodemask=(null),  order=0, 
oom_score_adj=0
[   98.932977] a.out cpuset=/ mems_allowed=0
[   98.934780] CPU: 1 PID: 2972 Comm: a.out Not tainted 
4.11.0-rc7-next-20170421+ #588
[   98.937988] Hardware name: VMware, Inc. VMware Virtual Platform/440BX 
Desktop Reference Platform, BIOS 6.00 07/02/2015
[   98.942193] Call Trace:
[   98.942942]  ? dump_stack+0x5c/0x7d
[   98.943907]  ? dump_header+0x97/0x233
[   98.945334]  ? ktime_get+0x30/0x90
[   98.946290]  ? delayacct_end+0x35/0x60
[   98.947319]  ? do_try_to_free_pages+0x2ca/0x370
[   98.948554]  ? oom_kill_process+0x223/0x3e0
[   98.949715]  ? has_capability_noaudit+0x17/0x20
[   98.950948]  ? oom_badness+0xeb/0x160
[   98.951962]  ? out_of_memory+0x10b/0x490
[   98.953030]  ? __alloc_pages_slowpath+0x701/0x8e2
[   98.954313]  ? __alloc_pages_nodemask+0x1ed/0x210
[   98.956242]  ? alloc_pages_vma+0x9f/0x220
[   98.957486]  ? __handle_mm_fault+0xc22/0x11e

Re: [PATCH v2 3/3] powerpc/mm: Implement CONFIG_DEBUG_RODATA on PPC32

2017-04-23 Thread Michael Ellerman
christophe leroy  writes:

> Le 22/04/2017 à 08:08, Michael Ellerman a écrit :
>> "Naveen N. Rao"  writes:
>>> Excerpts from Christophe Leroy's message of April 21, 2017 18:32:
 diff --git a/arch/powerpc/kernel/ftrace.c
 b/arch/powerpc/kernel/ftrace.c
 index 32509de6ce4c..06d2ac53f471 100644
 --- a/arch/powerpc/kernel/ftrace.c
 +++ b/arch/powerpc/kernel/ftrace.c
 @@ -46,6 +46,7 @@ static int
 @@ -67,10 +68,11 @@ ftrace_modify_code(unsigned long ip, unsigned int old, 
 unsigned int new)
}

/* replace the text with the new text */
 -  if (patch_instruction((unsigned int *)ip, new))
 -  return -EPERM;
 +  set_kernel_text_rw(ip);
 +  err = patch_instruction((unsigned int *)ip, new);
 +  set_kernel_text_ro(ip);
>>>
>>> Is there a reason to not put those inside patch_instruction()?
>>
>> Yes and no.
>>
>> patch_instruction() is called quite early from apply_feature_fixups(), I
>> haven't looked closely but I suspect the set_kernel_text_rx() routines
>> won't work that early.
>>
>> But on the other hand patch_instruction() is used by things other than
>> ftrace, like jump labels, so we probably want the rw/ro setting in there
>> so that we don't have to go and fixup jump labels etc.
>>
>> So probably we need a raw_patch_instruction() which does just the
>> patching (what patch_instruction() does now), and can be used early in
>> boot. And then patch_instruction() would have the rw/ro change in it, so
>> that all users of it are OK.
>>
>> eg ~=:
>>
>> int raw_patch_instruction(unsigned int *addr, unsigned int instr)
>> {
>>   ...
>> }
>>
>> int patch_instruction(unsigned int *addr, unsigned int instr)
>> {
>>  int err;
>>
>>  set_kernel_text_rw(ip);
>>  err = raw_patch_instruction((unsigned int *)ip, new);
>>  set_kernel_text_ro(ip);
>>
>>  return err;
>> }
>
> Shouldn't we then also have some kind of protection against parallel use 
> of patch_instruction() like a spin_lock_irqsave(), or is it garantied 
> not to happen for other reasons ?
>
> Otherwise, we might end up with one instance setting back the kernel 
> text to RO while the other one has just put it RW and is about to patch 
> the instruction.

Yes it'd need some locking for sure.

"Locking left as an exercise for the reader." ;)

cheers


RE: [PATCH v1 1/8] lib/uuid: Introduce uuid_{be|le}_cmp_p{p}() helpers

2017-04-23 Thread Winkler, Tomas
> New helpers take pointers to uuid_{be|le} as parameters.
> 
> When using them on a raw data we don't need to do an ugly dereference and,
> in some cases, a type casting.
> 
> Cc: Andrew Morton 
> Cc: Arnd Bergmann 
> Cc: Liam Girdwood 
> Cc: Mark Brown 
> Cc: Vinod Koul 
> Cc: Srinivas Pandruvada 
> Cc: Benjamin Tissoires 
> Cc: Kirti Wankhede 
> Cc: Alex Williamson 
> Cc: "K. Y. Srinivasan" 
> Cc: Haiyang Zhang 
> Cc: Stephen Hemminger 
> Cc: Tomas Winkler 
> Cc: Matt Fleming 
> Cc: Ard Biesheuvel 
> Cc: "Rafael J. Wysocki" 
> 
> Signed-off-by: Andy Shevchenko 
> ---
>  include/linux/uuid.h | 20 
>  1 file changed, 20 insertions(+)
> 
> diff --git a/include/linux/uuid.h b/include/linux/uuid.h index
> 4dff73a89758..45312cb5ac65 100644
> --- a/include/linux/uuid.h
> +++ b/include/linux/uuid.h
> @@ -58,6 +58,26 @@ static inline int uuid_be_cmp(const uuid_be u1, const
> uuid_be u2)
>   return memcmp(&u1, &u2, sizeof(uuid_be));  }
> 
> +static inline int uuid_le_cmp_p(const uuid_le *pu1, const uuid_le u2) {
> + return memcmp(pu1, &u2, sizeof(uuid_le)); }
> +
> +static inline int uuid_be_cmp_p(const uuid_be *pu1, const uuid_be u2) {
> + return memcmp(pu1, &u2, sizeof(uuid_be)); }
> +
> +static inline int uuid_le_cmp_pp(const uuid_le *pu1, const uuid_le
> +*pu2) {
> + return memcmp(pu1, pu2, sizeof(uuid_le)); }
> +
> +static inline int uuid_be_cmp_pp(const uuid_be *pu1, const uuid_be
> +*pu2) {
> + return memcmp(pu1, pu2, sizeof(uuid_be)); }
> +
>  void generate_random_uuid(unsigned char uuid[16]);
> 
>  extern void uuid_le_gen(uuid_le *u);

I think this going overboard, the _pp types  are just enough. 
Tomas


Re: [PATCH 1/2] PCI: mediatek: Add Mediatek PCIe host controller support

2017-04-23 Thread kbuild test robot
Hi Ryder,

[auto build test WARNING on pci/next]
[also build test WARNING on v4.11-rc7 next-20170421]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Ryder-Lee/Add-PCIe-host-driver-support-for-some-Mediatek-SoCs/20170423-163432
base:   https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 6.2.0
reproduce:
wget 
https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=ia64 

All warnings (new ones prefixed by >>):

>> WARNING: drivers/pci/host/built-in.o(.text+0x1830): Section mismatch in 
>> reference from the function mtk_pcie_probe() to the function 
>> .init.text:mtk_pcie_map_irq()
   The function mtk_pcie_probe() references
   the function __init mtk_pcie_map_irq().
   This is often because mtk_pcie_probe lacks a __init
   annotation or the annotation of mtk_pcie_map_irq is wrong.

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip


[PATCH 2/5] plugin:python: check asprintf() errors

2017-04-23 Thread Federico Vaga
The code was validating the string but the man page for asprintf(3)
says clearly:


If memory allocation wasn't possible, or some other error occurs,
these functions  will return -1, and the contents of strp are undefined.


So, we cannot really rely on the returned string pointer.

Signed-off-by: Federico Vaga 
---
 plugin_python.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/plugin_python.c b/plugin_python.c
index d3da8b0..2997679 100644
--- a/plugin_python.c
+++ b/plugin_python.c
@@ -24,6 +24,7 @@ static int load_plugin(struct pevent *pevent, const char 
*path,
const char *name, void *data)
 {
PyObject *globals = data;
+   int err;
int len = strlen(path) + strlen(name) + 2;
int nlen = strlen(name) + 1;
char *full = malloc(len);
@@ -41,9 +42,9 @@ static int load_plugin(struct pevent *pevent, const char 
*path,
strcpy(n, name);
n[nlen - 4] = '\0';
 
-   asprintf(&load, pyload, full, n);
-   if (!load)
-   return -ENOMEM;
+   err = asprintf(&load, pyload, full, n);
+   if (err < 0)
+   return err;
 
res = PyRun_String(load, Py_file_input, globals, globals);
if (!res) {
-- 
2.9.3



trace-cmd bug fixes

2017-04-23 Thread Federico Vaga
This set of patches contains some fixes found while studying
the trace-cmd code.



[PATCH 4/5] trace-cmd: fix argument parsing minor BUG

2017-04-23 Thread Federico Vaga
For some reason the list command does not use anymore `getopt()`
to parse the arguments, instead it uses a custum implementation.

During this change [5da0eff trace-cmd: Add regex for listing of events]
the variable `optind` has been forgotten.

To reproduce the problem try to use invalid arguments. The application
will not report the correct invalid argument

$ ./trace-cmd list -a
list: invalid option -- 'i'

Signed-off-by: Federico Vaga 
---
 trace-cmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/trace-cmd.c b/trace-cmd.c
index 1a62faa..a05df92 100644
--- a/trace-cmd.c
+++ b/trace-cmd.c
@@ -706,7 +706,7 @@ int main (int argc, char **argv)
break;
default:
fprintf(stderr, "list: invalid option 
-- '%c'\n",
-   argv[optind][1]);
+   argv[i][1]);
usage(argv);
}
}
-- 
2.9.3



[PATCH 5/5] trace-cmd: BUG fix malloc() pointer validation

2017-04-23 Thread Federico Vaga
To reproduce the bug

mkdir /sys/kernel/debug/tracing/instances/test
./trace-cmd show -B test -s -f
  Failed to allocate instance path snapshot

Signed-off-by: Federico Vaga 
---
 trace-cmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/trace-cmd.c b/trace-cmd.c
index a05df92..320229e 100644
--- a/trace-cmd.c
+++ b/trace-cmd.c
@@ -616,7 +616,7 @@ int main (int argc, char **argv)
if (buffer) {
path = malloc(strlen(buffer) + strlen("instances//") +
  strlen(file) + 1);
-   if (path)
+   if (!path)
die("Failed to allocate instance path %s", 
file);
sprintf(path, "instances/%s/%s", buffer, file);
file = path;
-- 
2.9.3



[PATCH 1/5] plugin:python: fix compiler warning

2017-04-23 Thread Federico Vaga
The function `load_plugin` is passed, as argument, to
`trace_util_load_plugins()` but the prototype was not exactly the same.

Signed-off-by: Federico Vaga 
---
 plugin_python.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/plugin_python.c b/plugin_python.c
index da07d27..d3da8b0 100644
--- a/plugin_python.c
+++ b/plugin_python.c
@@ -20,7 +20,7 @@ static const char pyload[] =
 "finally:\n"
 "   file.close()\n";
 
-static void load_plugin(struct pevent *pevent, const char *path,
+static int load_plugin(struct pevent *pevent, const char *path,
const char *name, void *data)
 {
PyObject *globals = data;
@@ -32,7 +32,7 @@ static void load_plugin(struct pevent *pevent, const char 
*path,
PyObject *res;
 
if (!full || !n)
-   return;
+   return -ENOMEM;
 
strcpy(full, path);
strcat(full, "/");
@@ -43,7 +43,7 @@ static void load_plugin(struct pevent *pevent, const char 
*path,
 
asprintf(&load, pyload, full, n);
if (!load)
-   return;
+   return -ENOMEM;
 
res = PyRun_String(load, Py_file_input, globals, globals);
if (!res) {
@@ -53,6 +53,8 @@ static void load_plugin(struct pevent *pevent, const char 
*path,
Py_DECREF(res);
 
free(load);
+
+   return 0;
 }
 
 int PEVENT_PLUGIN_LOADER(struct pevent *pevent)
-- 
2.9.3



[PATCH 3/5] trace-cmd:read: BUG initialize input_files item to zero

2017-04-23 Thread Federico Vaga
On allocation the data structure was not initialized. Later on some
attribute of this structure are used (e.g. tsoffset) assuming that the
default value is zero, but it is not always true.

Signed-off-by: Federico Vaga 
---
 trace-read.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/trace-read.c b/trace-read.c
index 79519bd..9773a47 100644
--- a/trace-read.c
+++ b/trace-read.c
@@ -295,6 +295,7 @@ static void add_input(const char *file)
item = malloc(sizeof(*item));
if (!item)
die("Failed to allocate for %s", file);
+   memset(item, 0, sizeof(*item));
item->file = file;
list_add_tail(&item->list, &input_files);
last_input_file = item;
-- 
2.9.3



[PATCH v5 00/11] Initial Allwinner Display Engine 2.0 Support

2017-04-23 Thread Icenowy Zheng
This patchset is the initial patchset for Allwinner DE2 support.

It contains the support of clocks in DE2 and the mixers in DE2.

The SoC used to develop this patchset is V3s, as V3s is the simplest
one of the SoCs that have DE2.
(Allwinner V3s features only one mixer, although its clock control
unit contains support for second mixer's clock; and its only video
output is RGB LCD, which is already supported in our TCON driver)

The last patch is only a testing patch, it shouldn't be merged; and
for the patch to be really usable, the RFC fix of the TCON driver [1]
is needed.

No HDMI, TV encoder or other internal bridges' support is included
in this patchset, which makes it currently not usable on H3. (Some
WIP code have already been written based on v4 of this patchset by
Jernej Skrabec and be, including TVE support (basical but usable)
and HDMI support (can display something, but still not so usable
because of some problem). )

Thanks to Jean-Francois Moine and Jernej Skrabec for their efforts
to discover the internal of DE2!

[1] https://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html

Icenowy Zheng (11):
  dt-bindings: add binding for the Allwinner DE2 CCU
  clk: sunxi-ng: add support for DE2 CCU
  dt-bindings: add bindings for DE2 on V3s SoC
  drm/sun4i: return only planes for layers created
  drm/sun4i: abstract a engine type
  drm/sun4i: add support for Allwinner DE2 mixers
  drm/sun4i: Add compatible string for V3s display engine
  drm/sun4i: tcon: add support for V3s TCON
  ARM: dts: sun8i: add DE2 nodes for V3s SoC
  ARM: dts: sun8i: add pinmux for LCD pins of V3s SoC
  [DO NOT MERGE] ARM: dts: sun8i: enable LCD panel of Lichee Pi Zero

 .../devicetree/bindings/clock/sun8i-de2.txt|  31 ++
 .../bindings/display/sunxi/sun4i-drm.txt   |  29 +-
 arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts  |  36 ++
 arch/arm/boot/dts/sun8i-v3s.dtsi   |  96 +
 drivers/clk/sunxi-ng/Kconfig   |   5 +
 drivers/clk/sunxi-ng/Makefile  |   1 +
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c   | 218 
 drivers/clk/sunxi-ng/ccu-sun8i-de2.h   |  28 ++
 drivers/gpu/drm/sun4i/Kconfig  |  20 ++
 drivers/gpu/drm/sun4i/Makefile |  10 +-
 drivers/gpu/drm/sun4i/sun4i_backend.c  |  68 ++--
 drivers/gpu/drm/sun4i/sun4i_backend.h  |  13 +-
 drivers/gpu/drm/sun4i/sun4i_crtc.c |  32 +-
 drivers/gpu/drm/sun4i/sun4i_crtc.h |   5 +-
 drivers/gpu/drm/sun4i/sun4i_drv.c  |   4 +-
 drivers/gpu/drm/sun4i/sun4i_drv.h  |   2 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c|  20 +-
 drivers/gpu/drm/sun4i/sun4i_layer.h|   7 +-
 drivers/gpu/drm/sun4i/sun4i_tcon.c |   7 +-
 drivers/gpu/drm/sun4i/sun4i_tv.c   |   9 +-
 drivers/gpu/drm/sun4i/sun8i_layer.c| 140 
 drivers/gpu/drm/sun4i/sun8i_layer.h|  36 ++
 drivers/gpu/drm/sun4i/sun8i_mixer.c| 390 +
 drivers/gpu/drm/sun4i/sun8i_mixer.h| 137 
 drivers/gpu/drm/sun4i/sunxi_engine.h   |  91 +
 include/dt-bindings/clock/sun8i-de2.h  |  18 +
 include/dt-bindings/reset/sun8i-de2.h  |  14 +
 27 files changed, 1387 insertions(+), 80 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/sun8i-de2.txt
 create mode 100644 drivers/clk/sunxi-ng/ccu-sun8i-de2.c
 create mode 100644 drivers/clk/sunxi-ng/ccu-sun8i-de2.h
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.h
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_mixer.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_mixer.h
 create mode 100644 drivers/gpu/drm/sun4i/sunxi_engine.h
 create mode 100644 include/dt-bindings/clock/sun8i-de2.h
 create mode 100644 include/dt-bindings/reset/sun8i-de2.h

-- 
2.12.2



[PATCH v5 01/11] dt-bindings: add binding for the Allwinner DE2 CCU

2017-04-23 Thread Icenowy Zheng
Allwinner "Display Engine 2.0" contains some clock controls in it.

In order to add them as clock drivers, we need a device tree binding.
Add the binding here.

Also add the device tree binding headers.

Signed-off-by: Icenowy Zheng 
---
Changes in v5:
- Moved dt-binding headers here.
- Changed dt-binding headers' license header to SPDX license.
Changes in v4:
- Dropped the leading 0 in clock at 100 .
Changes in v3:
- Fill the address space length of DE2 CCU to 0x10, just reach the start of 
mixer0.

 .../devicetree/bindings/clock/sun8i-de2.txt| 31 ++
 include/dt-bindings/clock/sun8i-de2.h  | 18 +
 include/dt-bindings/reset/sun8i-de2.h  | 14 ++
 3 files changed, 63 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/sun8i-de2.txt
 create mode 100644 include/dt-bindings/clock/sun8i-de2.h
 create mode 100644 include/dt-bindings/reset/sun8i-de2.h

diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt 
b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
new file mode 100644
index ..15a60bd7dcf3
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
@@ -0,0 +1,31 @@
+Allwinner Display Engine 2.0 Clock Control Binding
+--
+
+Required properties :
+- compatible: must contain one of the following compatibles:
+   - "allwinner,sun8i-a83t-de2-clk"
+   - "allwinner,sun50i-a64-de2-clk"
+   - "allwinner,sun50i-h5-de2-clk"
+
+- reg: Must contain the registers base address and length
+- clocks: phandle to the clocks feeding the display engine subsystem.
+ Three are needed:
+  - "mod": the display engine module clock
+  - "bus": the bus clock for the whole display engine subsystem
+- clock-names: Must contain the clock names described just above
+- resets: phandle to the reset control for the display engine subsystem.
+- #clock-cells : must contain 1
+- #reset-cells : must contain 1
+
+Example:
+de2_clocks: clock@100 {
+   compatible = "allwinner,sun50i-a64-de2-clk";
+   reg = <0x0100 0x10>;
+   clocks = <&ccu CLK_DE>,
+<&ccu CLK_BUS_DE>;
+   clock-names = "mod",
+ "bus";
+   resets = <&ccu RST_BUS_DE>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+};
diff --git a/include/dt-bindings/clock/sun8i-de2.h 
b/include/dt-bindings/clock/sun8i-de2.h
new file mode 100644
index ..3bed63b524aa
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-de2.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng 
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SUN8I_DE2_H_
+#define _DT_BINDINGS_CLOCK_SUN8I_DE2_H_
+
+#define CLK_BUS_MIXER0 0
+#define CLK_BUS_MIXER1 1
+#define CLK_BUS_WB 2
+
+#define CLK_MIXER0 6
+#define CLK_MIXER1 7
+#define CLK_WB 8
+
+#endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */
diff --git a/include/dt-bindings/reset/sun8i-de2.h 
b/include/dt-bindings/reset/sun8i-de2.h
new file mode 100644
index ..9526017432f0
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-de2.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng 
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _DT_BINDINGS_RESET_SUN8I_DE2_H_
+#define _DT_BINDINGS_RESET_SUN8I_DE2_H_
+
+#define RST_MIXER0 0
+#define RST_MIXER1 1
+#define RST_WB 2
+
+#endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */
-- 
2.12.2



[PATCH v5 02/11] clk: sunxi-ng: add support for DE2 CCU

2017-04-23 Thread Icenowy Zheng
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.

Add a sunxi-ng style driver for it.

Signed-off-by: Icenowy Zheng 
---
Changes in v5:
- Removed dt-bindings headers (they're now in patch 1).
Changes in v4:
- Fixed the inconsistence between mixer_div clocks' number and real clock.
Changes in v2:
- Rename sunxi-de2-ccu to sun8i-de2-ccu.

 drivers/clk/sunxi-ng/Kconfig |   5 +
 drivers/clk/sunxi-ng/Makefile|   1 +
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 218 +++
 drivers/clk/sunxi-ng/ccu-sun8i-de2.h |  28 +
 4 files changed, 252 insertions(+)
 create mode 100644 drivers/clk/sunxi-ng/ccu-sun8i-de2.c
 create mode 100644 drivers/clk/sunxi-ng/ccu-sun8i-de2.h

diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 64088e599404..2e4d804fbf61 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -140,6 +140,11 @@ config SUN8I_V3S_CCU
default MACH_SUN8I
depends on MACH_SUN8I || COMPILE_TEST
 
+config SUN8I_DE2_CCU
+   bool "Support for the Allwinner SoCs DE2 CCU"
+   select SUNXI_CCU_DIV
+   select SUNXI_CCU_GATE
+
 config SUN9I_A80_CCU
bool "Support for the Allwinner A80 CCU"
select SUNXI_CCU_DIV
diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
index 0ec02fe14c50..be616279450e 100644
--- a/drivers/clk/sunxi-ng/Makefile
+++ b/drivers/clk/sunxi-ng/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_SUN8I_A23_CCU)   += ccu-sun8i-a23.o
 obj-$(CONFIG_SUN8I_A33_CCU)+= ccu-sun8i-a33.o
 obj-$(CONFIG_SUN8I_H3_CCU) += ccu-sun8i-h3.o
 obj-$(CONFIG_SUN8I_V3S_CCU)+= ccu-sun8i-v3s.o
+obj-$(CONFIG_SUN8I_DE2_CCU)+= ccu-sun8i-de2.o
 obj-$(CONFIG_SUN8I_R_CCU)  += ccu-sun8i-r.o
 obj-$(CONFIG_SUN9I_A80_CCU)+= ccu-sun9i-a80.o
 obj-$(CONFIG_SUN9I_A80_CCU)+= ccu-sun9i-a80-de.o
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c 
b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
new file mode 100644
index ..adb2c344692a
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2017 Icenowy Zheng 
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ccu_common.h"
+#include "ccu_div.h"
+#include "ccu_gate.h"
+#include "ccu_reset.h"
+
+#include "ccu-sun8i-de2.h"
+
+static SUNXI_CCU_GATE(bus_mixer0_clk,  "bus-mixer0",   "bus-de",
+ 0x04, BIT(0), 0);
+static SUNXI_CCU_GATE(bus_mixer1_clk,  "bus-mixer1",   "bus-de",
+ 0x04, BIT(1), 0);
+static SUNXI_CCU_GATE(bus_wb_clk,  "bus-wb",   "bus-de",
+ 0x04, BIT(2), 0);
+
+static SUNXI_CCU_GATE(mixer0_clk,  "mixer0",   "mixer0-div",
+ 0x00, BIT(0), CLK_SET_RATE_PARENT);
+static SUNXI_CCU_GATE(mixer1_clk,  "mixer1",   "mixer1-div",
+ 0x00, BIT(1), CLK_SET_RATE_PARENT);
+static SUNXI_CCU_GATE(wb_clk,  "wb",   "wb-div",
+ 0x00, BIT(2), CLK_SET_RATE_PARENT);
+
+static SUNXI_CCU_M(mixer0_div_clk, "mixer0-div", "de", 0x0c, 0, 4,
+  CLK_SET_RATE_PARENT);
+static SUNXI_CCU_M(mixer1_div_clk, "mixer1-div", "de", 0x0c, 4, 4,
+  CLK_SET_RATE_PARENT);
+static SUNXI_CCU_M(wb_div_clk, "wb-div", "de", 0x0c, 8, 4,
+  CLK_SET_RATE_PARENT);
+
+static struct ccu_common *sunxi_de2_clks[] = {
+   &mixer0_clk.common,
+   &mixer1_clk.common,
+   &wb_clk.common,
+
+   &bus_mixer0_clk.common,
+   &bus_mixer1_clk.common,
+   &bus_wb_clk.common,
+
+   &mixer0_div_clk.common,
+   &mixer1_div_clk.common,
+   &wb_div_clk.common,
+};
+
+static struct clk_hw_onecell_data sunxi_de2_hw_clks = {
+   .hws= {
+   [CLK_MIXER0]= &mixer0_clk.common.hw,
+   [CLK_MIXER1]= &mixer1_clk.common.hw,
+   [CLK_WB]= &wb_clk.common.hw,
+
+   [CLK_BUS_MIXER0]= &bus_mixer0_clk.common.hw,
+   [CLK_BUS_MIXER1]= &bus_mixer1_clk.common.hw,
+   [CLK_BUS_WB]= &bus_wb_clk.common.hw,
+
+   [CLK_MIXER0_DIV]= &mixer0_div_clk.common.hw,
+   [CLK_MIXER1_DIV]= &mixer1_div_clk.common.hw,
+   [CLK_WB_DIV]= &wb_div_clk.common.hw,
+   },
+   .num= CLK_NUMBER,
+};
+
+static struct ccu_reset_map sun8i_a83t_de2_resets[] = {
+   

[PATCH v5 06/11] drm/sun4i: add support for Allwinner DE2 mixers

2017-04-23 Thread Icenowy Zheng
Allwinner have a new "Display Engine 2.0" in their new SoCs, which comes
with mixers to do graphic processing and feed data to TCON, like the old
backends and frontends.

Add support for the mixer on Allwinner V3s SoC; it's the simplest one.

Currently a lot of functions are still missing -- more investigations
are needed to gain enough information for them.

Signed-off-by: Icenowy Zheng 
---
Changes in v5:
- Changed some code alignment.
- Request real 32-bit DMA (prepare for 64-bit SoCs).
Changes in v4:
- Killed some dead code according to Jernej.

 drivers/gpu/drm/sun4i/Kconfig   |  10 +
 drivers/gpu/drm/sun4i/Makefile  |   4 +
 drivers/gpu/drm/sun4i/sun8i_layer.c | 140 +
 drivers/gpu/drm/sun4i/sun8i_layer.h |  36 
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 390 
 drivers/gpu/drm/sun4i/sun8i_mixer.h | 137 +
 6 files changed, 717 insertions(+)
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.h
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_mixer.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_mixer.h

diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
index 5a8227f37cc4..15557484520d 100644
--- a/drivers/gpu/drm/sun4i/Kconfig
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -22,3 +22,13 @@ config DRM_SUN4I_BACKEND
  original Allwinner Display Engine, which has a backend to
  do some alpha blending and feed graphics to TCON. If M is
  selected the module will be called sun4i-backend.
+
+config DRM_SUN4I_SUN8I_MIXER
+   tristate "Support for Allwinner Display Engine 2.0 Mixer"
+   depends on DRM_SUN4I
+   default MACH_SUN8I
+   help
+ Choose this option if you have an Allwinner SoC with the
+ Allwinner Display Engine 2.0, which has a mixer to do some
+ graphics mixture and feed graphics to TCON, If M is
+ selected the module will be called sun8i-mixer.
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 1db1068b9be1..0d67d6e80fd6 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -9,7 +9,11 @@ sun4i-tcon-y += sun4i_crtc.o
 sun4i-backend-y += sun4i_layer.o
 sun4i-backend-y += sun4i_backend.o
 
+sun8i-mixer-y += sun8i_layer.o
+sun8i-mixer-y += sun8i_mixer.o
+
 obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o sun4i-tcon.o
 obj-$(CONFIG_DRM_SUN4I_BACKEND)+= sun4i-backend.o
+obj-$(CONFIG_DRM_SUN4I_SUN8I_MIXER)+= sun8i-mixer.o
 obj-$(CONFIG_DRM_SUN4I)+= sun6i_drc.o
 obj-$(CONFIG_DRM_SUN4I)+= sun4i_tv.o
diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c 
b/drivers/gpu/drm/sun4i/sun8i_layer.c
new file mode 100644
index ..48f33d8e013b
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun8i_layer.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) Icenowy Zheng 
+ *
+ * Based on sun4i_layer.h, which is:
+ *   Copyright (C) 2015 Free Electrons
+ *   Copyright (C) 2015 NextThing Co
+ *
+ *   Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+
+#include "sun8i_layer.h"
+#include "sun8i_mixer.h"
+
+struct sun8i_plane_desc {
+  enum drm_plane_type type;
+  const uint32_t  *formats;
+  uint32_tnformats;
+};
+
+static int sun8i_mixer_layer_atomic_check(struct drm_plane *plane,
+   struct drm_plane_state *state)
+{
+   return 0;
+}
+
+static void sun8i_mixer_layer_atomic_disable(struct drm_plane *plane,
+  struct drm_plane_state 
*old_state)
+{
+   struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
+   struct sun8i_mixer *mixer = layer->mixer;
+
+   sun8i_mixer_layer_enable(mixer, layer->id, false);
+}
+
+static void sun8i_mixer_layer_atomic_update(struct drm_plane *plane,
+ struct drm_plane_state *old_state)
+{
+   struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
+   struct sun8i_mixer *mixer = layer->mixer;
+
+   sun8i_mixer_update_layer_coord(mixer, layer->id, plane);
+   sun8i_mixer_update_layer_formats(mixer, layer->id, plane);
+   sun8i_mixer_update_layer_buffer(mixer, layer->id, plane);
+   sun8i_mixer_layer_enable(mixer, layer->id, true);
+}
+
+static struct drm_plane_helper_funcs sun8i_mixer_layer_helper_funcs = {
+   .atomic_check   = sun8i_mixer_layer_atomic_check,
+   .atomic_disable = sun8i_mixer_layer_atomic_disable,
+   .atomic_update  = sun8i_mixer_layer_atomic_update,
+};
+
+static const struct drm_plane_funcs sun8i_mixer_layer_funcs = {
+   .atomic_destroy_state   = drm_atom

[PATCH v5 03/11] dt-bindings: add bindings for DE2 on V3s SoC

2017-04-23 Thread Icenowy Zheng
Allwinner V3s SoC have a display engine which have a different pipeline
with older SoCs.

Add document for it (new compatibles and the new "mixer" part).

Signed-off-by: Icenowy Zheng 
Acked-by: Rob Herring 
---
Changes in v4:
- Removed the refactor at TCON chapter.

Changes in v3:
- Remove the description of having a BE directly as allwinner,pipeline.

 .../bindings/display/sunxi/sun4i-drm.txt   | 29 --
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 57a8d0610062..7da80e26d61b 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -31,6 +31,7 @@ Required properties:
* allwinner,sun6i-a31-tcon
* allwinner,sun6i-a31s-tcon
* allwinner,sun8i-a33-tcon
+   * allwinner,sun8i-v3s-tcon
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
  - clocks: phandles to the clocks feeding the TCON. Three are needed:
@@ -52,7 +53,7 @@ Required properties:
   second the block connected to the TCON channel 1 (usually the TV
   encoder)
 
-On SoCs other than the A33, there is one more clock required:
+On SoCs other than the A33 and V3s, there is one more clock required:
- 'tcon-ch1': The clock driving the TCON channel 1
 
 DRC
@@ -138,6 +139,26 @@ Required properties:
   Documentation/devicetree/bindings/media/video-interfaces.txt. The
   first port should be the input endpoints, the second one the outputs
 
+Display Engine 2.0 Mixer
+
+
+The DE2 mixer have many functionalities, currently only layer blending is
+supported.
+
+Required properties:
+  - compatible: value must be one of:
+* allwinner,sun8i-v3s-de2-mixer
+  - reg: base address and size of the memory-mapped region.
+  - clocks: phandles to the clocks feeding the frontend and backend
+* bus: the backend interface clock
+* ram: the backend DRAM clock
+  - clock-names: the clock names mentioned above
+  - resets: phandles to the reset controllers driving the backend
+
+- ports: A ports node with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt. The
+  first port should be the input endpoints, the second one the output
+
 
 Display Engine Pipeline
 ---
@@ -152,9 +173,13 @@ Required properties:
 * allwinner,sun6i-a31-display-engine
 * allwinner,sun6i-a31s-display-engine
 * allwinner,sun8i-a33-display-engine
+* allwinner,sun8i-v3s-display-engine
 
   - allwinner,pipelines: list of phandle to the display engine
-frontends available.
+pipeline entry point. For SoCs with original DE (currently
+all SoCs supported by display engine except V3s), this
+phandle should be a display frontend; for SoCs with DE2,
+this phandle should be a mixer.
 
 Example:
 
-- 
2.12.2



[PATCH v5 08/11] drm/sun4i: tcon: add support for V3s TCON

2017-04-23 Thread Icenowy Zheng
Allwinner V3s SoC features a TCON without channel 1.

Add support for it.

Signed-off-by: Icenowy Zheng 
---
 drivers/gpu/drm/sun4i/sun4i_drv.c  | 3 ++-
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 68c0b754cdb5..736b28e47281 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -176,7 +176,8 @@ static bool sun4i_drv_node_is_tcon(struct device_node *node)
return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon") ||
of_device_is_compatible(node, "allwinner,sun6i-a31-tcon") ||
of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") ||
-   of_device_is_compatible(node, "allwinner,sun8i-a33-tcon");
+   of_device_is_compatible(node, "allwinner,sun8i-a33-tcon") ||
+   of_device_is_compatible(node, "allwinner,sun8i-v3s-tcon");
 }
 
 static int compare_of(struct device *dev, void *data)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index e4fef0639656..c8e695d5776b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -533,11 +533,16 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
/* nothing is supported */
 };
 
+static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
+   /* nothing is supported */
+};
+
 static const struct of_device_id sun4i_tcon_of_table[] = {
{ .compatible = "allwinner,sun5i-a13-tcon", .data = &sun5i_a13_quirks },
{ .compatible = "allwinner,sun6i-a31-tcon", .data = &sun6i_a31_quirks },
{ .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks 
},
{ .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
+   { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_tcon_of_table);
-- 
2.12.2



[PATCH v5 04/11] drm/sun4i: return only planes for layers created

2017-04-23 Thread Icenowy Zheng
As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm
driver, we will finally have two types of layers.

Each layer is bound to a drm_plane that is CRTC-specific, so we create
them when initializing CRTC (calling sun4i_layers_init, which will be
generalized in next patch). The drm_plane's will be used when creating
CRTC, but the CRTC initialization code do not care other properties of
the layer, so we let the sun4i_layers_init function return drm_plane's
only.

As we have no need to trace the layers after the CRTC is properly
created, we drop the layers pointer in sun4i_crtc struct.

Doing these things makes the CRTC code independent to the type of layer
(the sun4i_layers_init function name is still hardcoded and will be
changed in the next patch), so that we can finally gain support for the
mixer in DE2, which will has different layers.

Signed-off-by: Icenowy Zheng 
---
 drivers/gpu/drm/sun4i/sun4i_crtc.c  | 23 ---
 drivers/gpu/drm/sun4i/sun4i_crtc.h  |  1 -
 drivers/gpu/drm/sun4i/sun4i_layer.c | 18 ++
 drivers/gpu/drm/sun4i/sun4i_layer.h |  4 ++--
 4 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c 
b/drivers/gpu/drm/sun4i/sun4i_crtc.c
index 3c876c3a356a..708b3543d4e9 100644
--- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
@@ -139,6 +139,7 @@ struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
   struct sun4i_tcon *tcon)
 {
struct sun4i_crtc *scrtc;
+   struct drm_plane **planes;
struct drm_plane *primary = NULL, *cursor = NULL;
int ret, i;
 
@@ -149,22 +150,22 @@ struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
scrtc->tcon = tcon;
 
/* Create our layers */
-   scrtc->layers = sun4i_layers_init(drm, scrtc->backend);
-   if (IS_ERR(scrtc->layers)) {
+   planes = sun4i_layers_init(drm, scrtc);
+   if (IS_ERR(planes)) {
dev_err(drm->dev, "Couldn't create the planes\n");
return NULL;
}
 
/* find primary and cursor planes for drm_crtc_init_with_planes */
-   for (i = 0; scrtc->layers[i]; i++) {
-   struct sun4i_layer *layer = scrtc->layers[i];
+   for (i = 0; planes[i]; i++) {
+   struct drm_plane *plane = planes[i];
 
-   switch (layer->plane.type) {
+   switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
-   primary = &layer->plane;
+   primary = plane;
break;
case DRM_PLANE_TYPE_CURSOR:
-   cursor = &layer->plane;
+   cursor = plane;
break;
default:
break;
@@ -188,12 +189,12 @@ struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
   1);
 
/* Set possible_crtcs to this crtc for overlay planes */
-   for (i = 0; scrtc->layers[i]; i++) {
+   for (i = 0; planes[i]; i++) {
uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc));
-   struct sun4i_layer *layer = scrtc->layers[i];
+   struct drm_plane *plane = planes[i];
 
-   if (layer->plane.type == DRM_PLANE_TYPE_OVERLAY)
-   layer->plane.possible_crtcs = possible_crtcs;
+   if (plane->type == DRM_PLANE_TYPE_OVERLAY)
+   plane->possible_crtcs = possible_crtcs;
}
 
return scrtc;
diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.h 
b/drivers/gpu/drm/sun4i/sun4i_crtc.h
index 230cb8f0d601..4dae3508424a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_crtc.h
+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.h
@@ -19,7 +19,6 @@ struct sun4i_crtc {
 
struct sun4i_backend*backend;
struct sun4i_tcon   *tcon;
-   struct sun4i_layer  **layers;
 };
 
 static inline struct sun4i_crtc *drm_crtc_to_sun4i_crtc(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index f26bde5b9117..e1f03e1cc0ac 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -16,6 +16,7 @@
 #include 
 
 #include "sun4i_backend.h"
+#include "sun4i_crtc.h"
 #include "sun4i_layer.h"
 
 struct sun4i_plane_desc {
@@ -128,15 +129,16 @@ static struct sun4i_layer *sun4i_layer_init_one(struct 
drm_device *drm,
return layer;
 }
 
-struct sun4i_layer **sun4i_layers_init(struct drm_device *drm,
-  struct sun4i_backend *backend)
+struct drm_plane **sun4i_layers_init(struct drm_device *drm,
+struct sun4i_crtc *crtc)
 {
-   struct sun4i_layer **layers;
+   struct drm_plane **planes;
+   struct sun4i_backend *backend = crtc->backend;
int i;
 
-   layers = devm

Re: s3c24xx: Use devm_kcalloc() in s3c24xx_dma_probe()

2017-04-23 Thread SF Markus Elfring
>> * A multiplication for the size determination of a memory allocation
>>   indicated that an array data structure should be processed.
>>   Thus use the corresponding function "devm_kcalloc".
> I have trouble parsing that sentences. This looks like the typical
> approach of native german speakers to directly transfer sentence
> constructions from German to English. Which, in most cases, doesn't work
> or is just plain confusing.

Do you find the following wording better to understand
if it would be presented by a script like “checkpatch.pl”?

WARNING: Prefer devm_kcalloc over devm_kzalloc with multiply


Regards,
Markus


[PATCH v5 07/11] drm/sun4i: Add compatible string for V3s display engine

2017-04-23 Thread Icenowy Zheng
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.

Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.

Signed-off-by: Icenowy Zheng 
---
 drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 8ddd72cd5873..68c0b754cdb5 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -294,6 +294,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun6i-a31-display-engine" },
{ .compatible = "allwinner,sun6i-a31s-display-engine" },
{ .compatible = "allwinner,sun8i-a33-display-engine" },
+   { .compatible = "allwinner,sun8i-v3s-display-engine" },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_drv_of_table);
-- 
2.12.2



[PATCH v5 09/11] ARM: dts: sun8i: add DE2 nodes for V3s SoC

2017-04-23 Thread Icenowy Zheng
Allwinner V3s SoC features a "Display Engine 2.0" with only one TCON
which have RGB LCD output.

Add device nodes for it as well as the TCON.

Signed-off-by: Icenowy Zheng 
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 87 
 1 file changed, 87 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 71075969e5e6..0a895179d8ae 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -41,6 +41,10 @@
  */
 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 / {
#address-cells = <1>;
@@ -59,6 +63,12 @@
};
};
 
+   de: display-engine {
+   compatible = "allwinner,sun8i-v3s-display-engine";
+   allwinner,pipelines = <&de2_mixer0>;
+   status = "disabled";
+   };
+
timer {
compatible = "arm,armv7-timer";
interrupts = ,
@@ -93,6 +103,83 @@
#size-cells = <1>;
ranges;
 
+   de2_clocks: clock@100 {
+   compatible = "allwinner,sun50i-h5-de2-clk";
+   reg = <0x0100 0x10>;
+   clocks = <&ccu CLK_DE>,
+<&ccu CLK_BUS_DE>;
+   clock-names = "mod",
+ "bus";
+   resets = <&ccu RST_BUS_DE>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+   de2_mixer0: mixer@110 {
+   compatible = "allwinner,sun8i-v3s-de2-mixer";
+   reg = <0x0110 0x10>;
+   clocks = <&de2_clocks CLK_MIXER0>,
+<&de2_clocks CLK_BUS_MIXER0>;
+   clock-names = "mod",
+ "bus";
+   resets = <&de2_clocks RST_MIXER0>;
+   assigned-clocks = <&de2_clocks CLK_MIXER0>;
+   assigned-clock-rates = <15000>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mixer0_out: port@1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   mixer0_out_tcon0: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = 
<&tcon0_in_mixer0>;
+   };
+   };
+   };
+   };
+
+   tcon0: lcd-controller@1c0c000 {
+   compatible = "allwinner,sun8i-v3s-tcon";
+   reg = <0x01c0c000 0x1000>;
+   interrupts = ;
+   clocks = <&ccu CLK_BUS_TCON0>,
+<&ccu CLK_TCON0>;
+   clock-names = "ahb",
+ "tcon-ch0";
+   clock-output-names = "tcon-pixel-clock";
+   resets = <&ccu RST_BUS_TCON0>;
+   reset-names = "lcd";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   tcon0_in: port@0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0>;
+
+   tcon0_in_mixer0: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = 
<&mixer0_out_tcon0>;
+   };
+   };
+
+   tcon0_out: port@1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+   };
+   };
+   };
+
+
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
-- 
2.12.2



[PATCH v5 11/11] [DO NOT MERGE] ARM: dts: sun8i: enable LCD panel of Lichee Pi Zero

2017-04-23 Thread Icenowy Zheng
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.

This commit connects this panel to Lichee Pi Zero.

Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.

Signed-off-by: Icenowy Zheng 
---
 arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 36 +++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts 
b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index 387fc2aa546d..7ae72bf63cd0 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -75,6 +75,28 @@
gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */
};
};
+
+   panel: panel {
+   compatible = "qiaodian,qd43003c0-40", "simple-panel";
+   enable-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* Should be 
backlight */
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   panel_input: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <&tcon0_out_lcd>;
+   };
+   };
+   };
+};
+
+&de {
+   status = "okay";
 };
 
 &mmc0 {
@@ -86,6 +108,20 @@
status = "okay";
 };
 
+&tcon0 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&lcd_rgb666_pins>;
+   status = "okay";
+
+};
+
+&tcon0_out {
+   tcon0_out_lcd: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <&panel_input>;
+   };
+};
+
 &uart0 {
pinctrl-0 = <&uart0_pins_a>;
pinctrl-names = "default";
-- 
2.12.2



[PATCH v5 10/11] ARM: dts: sun8i: add pinmux for LCD pins of V3s SoC

2017-04-23 Thread Icenowy Zheng
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.

Add pinctrl node for them.

Signed-off-by: Icenowy Zheng 
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 0a895179d8ae..a37d68b227bc 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -297,6 +297,15 @@
function = "i2c0";
};
 
+   lcd_rgb666_pins: lcd_rgb666@0 {
+   pins = "PE0", "PE1", "PE2", "PE3", "PE4",
+  "PE5", "PE6", "PE7", "PE8", "PE9",
+  "PE10", "PE11", "PE12", "PE13", "PE14",
+  "PE15", "PE16", "PE17", "PE18", "PE19",
+  "PE23", "PE24";
+   function = "lcd";
+   };
+
uart0_pins_a: uart0@0 {
pins = "PB8", "PB9";
function = "uart0";
-- 
2.12.2



[PATCH v5 05/11] drm/sun4i: abstract a engine type

2017-04-23 Thread Icenowy Zheng
As we are going to add support for the Allwinner DE2 engine in sun4i-drm
driver, we will finally have two types of display engines -- the DE1
backend and the DE2 mixer. They both do some display blending and feed
graphics data to TCON, so I choose to call them both "engine" here.

Abstract the engine type to a new struct with an ops struct, which contains
functions that should be called outside the engine-specified code (in
TCON, CRTC or TV Encoder code).

A dedicated Kconfig option is also added to control whether
sun4i-backend-specified code (sun4i_backend.c and sun4i_layer.c) should
be built. As we removed the codes in CRTC code that directly call the
layer code, we can now extract the layer part and combine it with the
backend part into a new module, sun4i-backend.ko.

Signed-off-by: Icenowy Zheng 
---
Changes in v5:
- Really made a sunxi_engine struct type, and moved ops pointer
  into it.
- Added checked ops wrappers.
- Changed the second parameter of layers_init from crtc to engine.
Changes in v4:
- Comments to tag the color correction functions as optional.
- Check before calling the optional functions.
- Change layers_init to satisfy new PATCH v4 04/11.

 drivers/gpu/drm/sun4i/Kconfig | 10 
 drivers/gpu/drm/sun4i/Makefile|  6 ++-
 drivers/gpu/drm/sun4i/sun4i_backend.c | 68 ++
 drivers/gpu/drm/sun4i/sun4i_backend.h | 13 +++--
 drivers/gpu/drm/sun4i/sun4i_crtc.c| 11 ++---
 drivers/gpu/drm/sun4i/sun4i_crtc.h|  4 +-
 drivers/gpu/drm/sun4i/sun4i_drv.h |  2 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c   |  8 ++-
 drivers/gpu/drm/sun4i/sun4i_layer.h   |  5 +-
 drivers/gpu/drm/sun4i/sun4i_tcon.c|  2 +-
 drivers/gpu/drm/sun4i/sun4i_tv.c  |  9 ++--
 drivers/gpu/drm/sun4i/sunxi_engine.h  | 91 +++
 12 files changed, 169 insertions(+), 60 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sunxi_engine.h

diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
index a4b357db8856..5a8227f37cc4 100644
--- a/drivers/gpu/drm/sun4i/Kconfig
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -12,3 +12,13 @@ config DRM_SUN4I
  Choose this option if you have an Allwinner SoC with a
  Display Engine. If M is selected the module will be called
  sun4i-drm.
+
+config DRM_SUN4I_BACKEND
+   tristate "Support for Allwinner A10 Display Engine Backend"
+   depends on DRM_SUN4I
+   default DRM_SUN4I
+   help
+ Choose this option if you have an Allwinner SoC with the
+ original Allwinner Display Engine, which has a backend to
+ do some alpha blending and feed graphics to TCON. If M is
+ selected the module will be called sun4i-backend.
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 59b757350a1f..1db1068b9be1 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -5,9 +5,11 @@ sun4i-tcon-y += sun4i_tcon.o
 sun4i-tcon-y += sun4i_rgb.o
 sun4i-tcon-y += sun4i_dotclock.o
 sun4i-tcon-y += sun4i_crtc.o
-sun4i-tcon-y += sun4i_layer.o
+
+sun4i-backend-y += sun4i_layer.o
+sun4i-backend-y += sun4i_backend.o
 
 obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o sun4i-tcon.o
-obj-$(CONFIG_DRM_SUN4I)+= sun4i_backend.o
+obj-$(CONFIG_DRM_SUN4I_BACKEND)+= sun4i-backend.o
 obj-$(CONFIG_DRM_SUN4I)+= sun6i_drc.o
 obj-$(CONFIG_DRM_SUN4I)+= sun4i_tv.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index d660741ba475..360ab046121b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -23,6 +23,8 @@
 
 #include "sun4i_backend.h"
 #include "sun4i_drv.h"
+#include "sun4i_layer.h"
+#include "sunxi_engine.h"
 
 static const u32 sunxi_rgb2yuv_coef[12] = {
0x0107, 0x0204, 0x0064, 0x0108,
@@ -30,41 +32,38 @@ static const u32 sunxi_rgb2yuv_coef[12] = {
0x01c1, 0x3e88, 0x3fb8, 0x0808
 };
 
-void sun4i_backend_apply_color_correction(struct sun4i_backend *backend)
+static void sun4i_backend_apply_color_correction(struct sunxi_engine *engine)
 {
int i;
 
DRM_DEBUG_DRIVER("Applying RGB to YUV color correction\n");
 
/* Set color correction */
-   regmap_write(backend->regs, SUN4I_BACKEND_OCCTL_REG,
+   regmap_write(engine->regs, SUN4I_BACKEND_OCCTL_REG,
 SUN4I_BACKEND_OCCTL_ENABLE);
 
for (i = 0; i < 12; i++)
-   regmap_write(backend->regs, SUN4I_BACKEND_OCRCOEF_REG(i),
+   regmap_write(engine->regs, SUN4I_BACKEND_OCRCOEF_REG(i),
 sunxi_rgb2yuv_coef[i]);
 }
-EXPORT_SYMBOL(sun4i_backend_apply_color_correction);
 
-void sun4i_backend_disable_color_correction(struct sun4i_backend *backend)
+static void sun4i_backend_disable_color_correction(struct sunxi_engine *engine)
 {
DRM_DEBUG_DRIVER("Disabling color correction\n");
 
 

Re: s3c24xx: Use devm_kcalloc() in s3c24xx_dma_probe()

2017-04-23 Thread Tobias Jakobi
SF Markus Elfring wrote:
>>> * A multiplication for the size determination of a memory allocation
>>>   indicated that an array data structure should be processed.
>>>   Thus use the corresponding function "devm_kcalloc".
>> I have trouble parsing that sentences. This looks like the typical
>> approach of native german speakers to directly transfer sentence
>> constructions from German to English. Which, in most cases, doesn't work
>> or is just plain confusing.
> 
> Do you find the following wording better to understand
> if it would be presented by a script like “checkpatch.pl”?
> 
> WARNING: Prefer devm_kcalloc over devm_kzalloc with multiply
For example. Also I just noticed some previous comment by Krzysztof that
pointed that out already.

My suggestion: One sentence describing that the current situation is.
Another sentence explaining why this is bad/undesirable. Last sentence
saying what you're doing to fix this (can sometimes be omitted if it's
clear from the diffstat). In this case, the output of the checkpatch
script would come in handy.

With this, you avoid cramming every information into one long and
complicated sentence.

With best wishes,
Tobias


> 
> 
> Regards,
> Markus
> 



Question on the five-level page table support patches

2017-04-23 Thread John Paul Adrian Glaubitz
Hi Kirill!

I recently read the LWN article on your and your colleagues work to
add five-level page table support for x86 to the Linux kernel [1]
and I got your email address from the last patch of the series.

Since this extends the address space beyond 48-bits, as you may know,
it will cause potential headaches with Javascript engines which use
tagged pointers. On SPARC, the virtual address space already extends
to 52 bits and we are running into these very issues with Javascript
engines on SPARC.

Now, a possible way to mitigate this problem would be to pass the
"hint" parameter to mmap() in order to tell the kernel not to allocate
memory beyond the 48 bits address space. Unfortunately, on Linux this
will only work when the area pointed to by "hint" is unallocated which
means one cannot simply use a hardcoded "hint" to mitigate this problem.

However, since this trick still works on NetBSD and used to work on
Linux [3], I was wondering whether there are plans to bring back
this behavior to mmap() in Linux.

Currently, people are using ugly work-arounds [4] to address this
problem which involve a manual iteration over memory blocks and
basically implementing another allocator in the user space
application.

Thanks,
Adrian

> [1] https://lwn.net/Articles/717293/
> [2] https://lwn.net/Articles/717300/
> [3] https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=824449#22
> [4] https://hg.mozilla.org/mozilla-central/rev/dfaafbaaa291

-- 
 .''`.  John Paul Adrian Glaubitz
: :' :  Debian Developer - glaub...@debian.org
`. `'   Freie Universitaet Berlin - glaub...@physik.fu-berlin.de
  `-GPG: 62FF 8A75 84E0 2956 9546  0006 7426 3B37 F5B5 F913


Re: s3c24xx: Use devm_kcalloc() in s3c24xx_dma_probe()

2017-04-23 Thread SF Markus Elfring
>> WARNING: Prefer devm_kcalloc over devm_kzalloc with multiply
> For example. Also I just noticed some previous comment by Krzysztof that
> pointed that out already.
> 
> My suggestion: One sentence describing that the current situation is.

Why do you find the sentence for the multiplication information inappropriate
(or incomplete) at the moment?


> Another sentence explaining why this is bad/undesirable.

Which details do you miss here?


> In this case, the output of the checkpatch script would come in handy.

Its implementation of the check “ALLOC_WITH_MULTIPLY” considers only an other
search pattern so far.

* Do you find it worthwhile to add a prefix like “devm_” to the used
  regular expression?

* Would like to improve any related scripts for the semantic patch language
  (Coccinelle software) a bit more?


> With this, you avoid cramming every information into one long and
> complicated sentence.

Thanks for your feedback about other wording preferences.

Regards,
Markus


[PATCH 1/1] usb: hub: check return value

2017-04-23 Thread Pan Bian
From: Pan Bian 

Function usb_autopm_get_interface() will return a negative errno on
failure, and function usb_autopm_put_interface() should not be called if
it fails. However, in function usb_remove_device(), the return value of
function usb_autopm_get_interface() is not validated before calling
usb_autopm_put_interface().

Signed-off-by: Pan Bian 
---
 drivers/usb/core/hub.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 5286bf6..9627175 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -940,16 +940,18 @@ int usb_remove_device(struct usb_device *udev)
 {
struct usb_hub *hub;
struct usb_interface *intf;
+   int if_err;
 
if (!udev->parent)  /* Can't remove a root hub */
return -EINVAL;
hub = usb_hub_to_struct_hub(udev->parent);
intf = to_usb_interface(hub->intfdev);
 
-   usb_autopm_get_interface(intf);
+   if_err = usb_autopm_get_interface(intf);
set_bit(udev->portnum, hub->removed_bits);
hub_port_logical_disconnect(hub, udev->portnum);
-   usb_autopm_put_interface(intf);
+   if (!if_err)
+   usb_autopm_put_interface(intf);
return 0;
 }
 
-- 
1.9.1




[tip:timers/urgent] tick: Make sure tick timer is active when bypassing reprogramming

2017-04-23 Thread tip-bot for Frederic Weisbecker
Commit-ID:  22aa2ad45fd8a6ef56eb60038fc0ac7059c0a986
Gitweb: http://git.kernel.org/tip/22aa2ad45fd8a6ef56eb60038fc0ac7059c0a986
Author: Frederic Weisbecker 
AuthorDate: Fri, 21 Apr 2017 16:00:55 +0200
Committer:  Thomas Gleixner 
CommitDate: Sun, 23 Apr 2017 13:33:18 +0200

tick: Make sure tick timer is active when bypassing reprogramming

So far we have run into too much troubles with the optimization path
that skips reprogramming the clock on IRQ exit when the expiration
deadline hasn't changed. If by accident the cached deadline happens to
be out of sync with the hardware deadline, the buggy result and its
cause are hard to investigate. So lets detect and warn about the issue
early.

Signed-off-by: Frederic Weisbecker 
Acked-by: Rik van Riel 
Cc: James Hartsock 
Cc: Peter Zijlstra 
Cc: sta...@vger.kernel.org
Cc: Tim Wright 
Cc: Pavel Machek 
Link: 
http://lkml.kernel.org/r/1492783255-5051-3-git-send-email-fweis...@gmail.com
Signed-off-by: Thomas Gleixner 

---
 kernel/time/tick-sched.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index 502b320..be7ca4d 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -783,8 +783,13 @@ static ktime_t tick_nohz_stop_sched_tick(struct tick_sched 
*ts,
tick = expires;
 
/* Skip reprogram of event if its not changed */
-   if (ts->tick_stopped && (expires == ts->next_tick))
-   goto out;
+   if (ts->tick_stopped && (expires == ts->next_tick)) {
+   /* Sanity check: make sure clockevent is actually programmed */
+   if (likely(dev->next_event <= ts->next_tick))
+   goto out;
+
+   WARN_ON_ONCE(1);
+   }
 
/*
 * nohz_stop_sched_tick can be called several times before


[tip:timers/urgent] nohz: Fix again collision between tick and other hrtimers

2017-04-23 Thread tip-bot for Frederic Weisbecker
Commit-ID:  d58bd60c773d8b16c19c4b9533bceee3761eb804
Gitweb: http://git.kernel.org/tip/d58bd60c773d8b16c19c4b9533bceee3761eb804
Author: Frederic Weisbecker 
AuthorDate: Fri, 21 Apr 2017 16:00:54 +0200
Committer:  Thomas Gleixner 
CommitDate: Sun, 23 Apr 2017 13:33:18 +0200

nohz: Fix again collision between tick and other hrtimers

(This restores commit 24b91e360ef521a2808771633d76ebc68bd5604b that got
reverted by commit 558e8e27e73f53f8a512485be538b07115fe5f3c due to a
regression where CPUs spuriously stopped ticking. The issue happened
when a tick fired too early past its expected expiration: on IRQ exit
the tick was scheduled again to the same deadline but skipped
reprogramming because ts->next_tick still kept in cache the deadline.
This has been fixed now with resetting ts->next_tick from the tick
itself. Extra care has also been taken to prevent from obsolete values
throughout CPU hotplug operations.)

When the tick is stopped and an interrupt occurs afterward, we check on
that interrupt exit if the next tick needs to be rescheduled. If it
doesn't need any update, we don't want to do anything.

In order to check if the tick needs an update, we compare it against the
clockevent device deadline. Now that's a problem because the clockevent
device is at a lower level than the tick itself if it is implemented
on top of hrtimer.

Every hrtimer share this clockevent device. So comparing the next tick
deadline against the clockevent device deadline is wrong because the
device may be programmed for another hrtimer whose deadline collides
with the tick. As a result we may end up not reprogramming the tick
accidentally.

In a worst case scenario under full dynticks mode, the tick stops firing
as it is supposed to every 1hz, leaving /proc/stat stalled:

  Task in a full dynticks CPU
  

  * hrtimer A is queued 2 seconds ahead
  * the tick is stopped, scheduled 1 second ahead
  * tick fires 1 second later
  * on tick exit, nohz schedules the tick 1 second ahead but sees
the clockevent device is already programmed to that deadline,
fooled by hrtimer A, the tick isn't rescheduled.
  * hrtimer A is cancelled before its deadline
  * tick never fires again until an interrupt happens...

In order to fix this, store the next tick deadline to the tick_sched
local structure and reuse that value later to check whether we need to
reprogram the clock after an interrupt.

On the other hand, ts->sleep_length still wants to know about the next
clock event and not just the tick, so we want to improve the related
comment to avoid confusion.

Reported-and-tested-by: Tim Wright 
Reported-and-tested-by: Pavel Machek 
Reported-by: James Hartsock 
Signed-off-by: Frederic Weisbecker 
Acked-by: Rik van Riel 
Cc: Peter Zijlstra 
Cc: sta...@vger.kernel.org
Link: 
http://lkml.kernel.org/r/1492783255-5051-2-git-send-email-fweis...@gmail.com
Signed-off-by: Thomas Gleixner 

---
 kernel/time/tick-sched.c | 26 --
 kernel/time/tick-sched.h |  2 ++
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index 7fe53be..502b320 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -150,6 +150,12 @@ static void tick_sched_handle(struct tick_sched *ts, 
struct pt_regs *regs)
touch_softlockup_watchdog_sched();
if (is_idle_task(current))
ts->idle_jiffies++;
+   /*
+* In case the current tick fired too early past its expected
+* expiration, make sure we don't bypass the next clock 
reprogramming
+* to the same deadline.
+*/
+   ts->next_tick = 0;
}
 #endif
update_process_times(user_mode(regs));
@@ -660,6 +666,12 @@ static void tick_nohz_restart(struct tick_sched *ts, 
ktime_t now)
hrtimer_start_expires(&ts->sched_timer, 
HRTIMER_MODE_ABS_PINNED);
else
tick_program_event(hrtimer_get_expires(&ts->sched_timer), 1);
+
+   /*
+* Reset to make sure next tick stop doesn't get fooled by past
+* cached clock deadline.
+*/
+   ts->next_tick = 0;
 }
 
 static ktime_t tick_nohz_stop_sched_tick(struct tick_sched *ts,
@@ -771,7 +783,7 @@ static ktime_t tick_nohz_stop_sched_tick(struct tick_sched 
*ts,
tick = expires;
 
/* Skip reprogram of event if its not changed */
-   if (ts->tick_stopped && (expires == dev->next_event))
+   if (ts->tick_stopped && (expires == ts->next_tick))
goto out;
 
/*
@@ -791,6 +803,8 @@ static ktime_t tick_nohz_stop_sched_tick(struct tick_sched 
*ts,
trace_tick_stop(1, TICK_DEP_MASK_NONE);
}
 
+   ts->next_tick = tick;
+
/*
 * If the expiration time == KTIME_MAX, then we simply stop
 * the tick timer.
@@ -806,7 +820,10 @@ static kt

[GIT pull] irq fix for 4.11

2017-04-23 Thread Thomas Gleixner
Linus,

please pull the latest irq-urgent-for-linus git tree from:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
irq-urgent-for-linus

The (hopefully) final fix for the irq affinity spreading logic.

Thanks,

tglx

-->
Keith Busch (1):
  genirq/affinity: Fix calculating vectors to assign


 kernel/irq/affinity.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/irq/affinity.c b/kernel/irq/affinity.c
index d052947fe785..e2d356dd7581 100644
--- a/kernel/irq/affinity.c
+++ b/kernel/irq/affinity.c
@@ -98,7 +98,7 @@ irq_create_affinity_masks(int nvecs, const struct 
irq_affinity *affd)
int ncpus, v, vecs_to_assign, vecs_per_node;
 
/* Spread the vectors per node */
-   vecs_per_node = (affv - curvec) / nodes;
+   vecs_per_node = (affv - (curvec - affd->pre_vectors)) / nodes;
 
/* Get the cpus on this node which are in the mask */
cpumask_and(nmsk, cpu_online_mask, cpumask_of_node(n));


Re: [v3,7/7] powerpc: kprobes: remove duplicate saving of msr

2017-04-23 Thread Michael Ellerman
On Wed, 2017-04-19 at 12:51:06 UTC, "Naveen N. Rao" wrote:
> set_current_kprobe() already saves regs->msr into kprobe_saved_msr. Remove
> the redundant save.
> 
> Signed-off-by: Naveen N. Rao 
> Reviewed-by: Masami Hiramatsu 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/d08f8a28bcc8c2004a7186839148fc

cheers


Re: [v4,1/6] powerpc: ftrace: minor cleanup

2017-04-23 Thread Michael Ellerman
On Wed, 2017-04-19 at 12:52:23 UTC, "Naveen N. Rao" wrote:
> Move the stack setup and teardown code to the ftrace_graph_caller().
> This way, we don't incur the cost of setting it up unless function graph
> is enabled for this function.
> 
> Also, remove the extraneous LR restore code after the function graph
> stub. LR has previously been restored and neither livepatch_handler()
> nor ftrace_graph_caller() return back here.
> 
> Signed-off-by: Naveen N. Rao 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/700e64377c2c8e2406e9c4c1632e2e

cheers


[PATCH 1/1] staging: wilc1000: fix unchecked return value

2017-04-23 Thread Pan Bian
From: Pan Bian 

Function dev_alloc_skb() will return a NULL pointer if there is no
enough memory. However, in function WILC_WFI_mon_xmit(), its return
value is used without validation. This may result in a bad memory access
bug. This patch fixes the bug.

Signed-off-by: Pan Bian 
---
 drivers/staging/wilc1000/linux_mon.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/staging/wilc1000/linux_mon.c 
b/drivers/staging/wilc1000/linux_mon.c
index f328d75..c9782d4 100644
--- a/drivers/staging/wilc1000/linux_mon.c
+++ b/drivers/staging/wilc1000/linux_mon.c
@@ -197,6 +197,8 @@ static netdev_tx_t WILC_WFI_mon_xmit(struct sk_buff *skb,
 
if (skb->data[0] == 0xc0 && (!(memcmp(broadcast, &skb->data[4], 6 {
skb2 = dev_alloc_skb(skb->len + sizeof(struct 
wilc_wfi_radiotap_cb_hdr));
+   if (!skb2)
+   return -ENOMEM;
 
memcpy(skb_put(skb2, skb->len), skb->data, skb->len);
 
-- 
1.9.1




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