Re: [PATCH V4] thermal: Add cooling device's statistics in sysfs

2018-03-14 Thread Zhang Rui
On 二, 2018-03-13 at 15:02 +0800, Zhang Rui wrote:
> Hi, Viresh,
> 
> I will queue it for 4.17, with just one minor fix below.
> 
I got the following warning from checkpatch.pl
---

WARNING: please write a paragraph that describes the config symbol
fully
#147: FILE: drivers/thermal/Kconfig:18:
+config THERMAL_STATISTICS

WARNING: Consider renaming function(s)
'thermal_cooling_device_total_trans_show' to 'total_trans_show'
#391: FILE: drivers/thermal/thermal_sysfs.c:901:
+}

WARNING: Consider renaming function(s)
'thermal_cooling_device_time_in_state_show' to 'time_in_state_show'
#395: FILE: drivers/thermal/thermal_sysfs.c:905:
+static DEVICE_ATTR(time_in_state, 0444,

WARNING: Consider renaming function(s)
'thermal_cooling_device_reset_store' to 'reset_store'
#397: FILE: drivers/thermal/thermal_sysfs.c:907:
+static DEVICE_ATTR(reset, 0200, NULL,
thermal_cooling_device_reset_store);

WARNING: Consider renaming function(s)
'thermal_cooling_device_trans_table_show' to 'trans_table_show'
#398: FILE: drivers/thermal/thermal_sysfs.c:908:
+static DEVICE_ATTR(trans_table, 0444,

total: 0 errors, 5 warnings, 366 lines checked


I'm okay with the first one because the description does not have to be
larger than 3 lines.
the last 4 warnings makes sense to me. I think we should rename the
function and use DEVICE_ATTR_RO() and DEVICE_ATTR_WO() instead.

what do you think?

thanks,
rui

> On 二, 2018-01-16 at 15:22 +0530, Viresh Kumar wrote:
> > 
> > This extends the sysfs interface for thermal cooling devices and
> > exposes
> > some pretty useful statistics. These statistics have proven to be
> > quite
> > useful specially while doing benchmarks related to the task
> > scheduler,
> > where we want to make sure that nothing has disrupted the test,
> > specially the cooling device which may have put constraints on the
> > CPUs.
> > The information exposed here tells us to what extent the CPUs were
> > constrained by the thermal framework.
> > 
> > The write-only "reset" file is used to reset the statistics.
> > 
> > The read-only "time_in_state" file shows the clock_t time spent by
> > the
> > device in the respective cooling states, and it prints one line per
> > cooling state.
> > 
> > The read-only "total_trans" file shows single positive integer
> > value
> > showing the total number of cooling state transitions the device
> > has
> > gone through since the time the cooling device is registered or the
> > time
> > when statistics were reset last.
> > 
> > The read-only "trans_table" file shows a two dimensional matrix,
> > where
> > an entry  (row i, column j) represents the number of
> > transitions
> > from State_i to State_j.
> > 
> > This is how the directory structure looks like for a single cooling
> > device:
> > 
> > $ ls -R /sys/class/thermal/cooling_device0/
> > /sys/class/thermal/cooling_device0/:
> > cur_state  max_state  power  stats  subsystem  type  uevent
> > 
> > /sys/class/thermal/cooling_device0/power:
> > autosuspend_delay_ms  runtime_active_time  runtime_suspended_time
> > control   runtime_status
> > 
> > /sys/class/thermal/cooling_device0/stats:
> > reset  time_in_state  total_trans  trans_table
> > 
> > This is tested on ARM 64-bit Hisilicon hikey620 board running
> > Ubuntu
> > and
> > ARM 64-bit Hisilicon hikey960 board running Android.
> > 
> > Signed-off-by: Viresh Kumar 
> [snip]
> 
> > 
> > +static void cooling_device_stats_setup(struct
> > thermal_cooling_device
> > *cdev)
> > +{
> > +   struct cooling_dev_stats *stats;
> > +   unsigned long states;
> > +   int var;
> > +
> > +   if (cdev->ops->get_max_state(cdev, &states))
> > +   return;
> > +
> > +   states++; /* Total number of states is highest state + 1
> > */
> > +
> > +   var = sizeof(*stats);
> > +   var += sizeof(*stats->time_in_state) * states;
> > +   var += sizeof(*stats->trans_table) * states * states;
> > +
> > +   stats = kzalloc(var, GFP_KERNEL);
> > +   if (!stats)
> > +   return;
> > +
> > +   stats->time_in_state = (ktime_t *)(stats + 1);
> > +   stats->trans_table = (unsigned int *)(stats->time_in_state 
> > +
> > states);
> > +   cdev->stats = stats;
> > +   stats->last_time = ktime_get();
> > +   stats->max_states = states;
> > +   cdev->stats = stats;
> > +
> cdev->stats is set twice here, I will remove the first one.
> 
> thanks,
> rui
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Re: [PATCH V4] thermal: Add cooling device's statistics in sysfs

2018-03-14 Thread Viresh Kumar
On 14-03-18, 16:01, Zhang Rui wrote:
> WARNING: please write a paragraph that describes the config symbol
> fully
> #147: FILE: drivers/thermal/Kconfig:18:
> +config THERMAL_STATISTICS
> 
> WARNING: Consider renaming function(s)
> 'thermal_cooling_device_total_trans_show' to 'total_trans_show'
> #391: FILE: drivers/thermal/thermal_sysfs.c:901:
> +}
> 
> WARNING: Consider renaming function(s)
> 'thermal_cooling_device_time_in_state_show' to 'time_in_state_show'
> #395: FILE: drivers/thermal/thermal_sysfs.c:905:
> +static DEVICE_ATTR(time_in_state, 0444,
> 
> WARNING: Consider renaming function(s)
> 'thermal_cooling_device_reset_store' to 'reset_store'
> #397: FILE: drivers/thermal/thermal_sysfs.c:907:
> +static DEVICE_ATTR(reset, 0200, NULL,
> thermal_cooling_device_reset_store);
> 
> WARNING: Consider renaming function(s)
> 'thermal_cooling_device_trans_table_show' to 'trans_table_show'
> #398: FILE: drivers/thermal/thermal_sysfs.c:908:
> +static DEVICE_ATTR(trans_table, 0444,
> 
> total: 0 errors, 5 warnings, 366 lines checked
> 
> 
> I'm okay with the first one because the description does not have to be
> larger than 3 lines.

Right.

> the last 4 warnings makes sense to me. I think we should rename the
> function and use DEVICE_ATTR_RO() and DEVICE_ATTR_WO() instead.
> 
> what do you think?

I got those warnings as well, and I quietly ignored them :)

I ignored the renaming part for the sake of consistency. The other existing
routines for similar purpose are named as:

thermal_cooling_device_type_show
thermal_cooling_device_max_state_show
thermal_cooling_device_cur_state_show
thermal_cooling_device_cur_state_store

for me it made more sense to follow that naming convention. And I didn't use the
_RO and _WO variants for the same reason.

Now here is what I propose now:

- You apply this patch as-is and ignore the warning.

- I will send few patches on top of that to do:
  - renaming of all such routines to shorter versions.
  - Use the _RO or _WO variants of the macro everywhere.

What do you say ?

-- 
viresh
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Re: [PATCH 5/8] trace_uprobe: Support SDT markers having reference count (semaphore)

2018-03-14 Thread Masami Hiramatsu
Hi Ravi,

On Tue, 13 Mar 2018 18:26:00 +0530
Ravi Bangoria  wrote:

> Userspace Statically Defined Tracepoints[1] are dtrace style markers
> inside userspace applications. These markers are added by developer at
> important places in the code. Each marker source expands to a single
> nop instruction in the compiled code but there may be additional
> overhead for computing the marker arguments which expands to couple of
> instructions. In case the overhead is more, execution of it can be
> ommited by runtime if() condition when no one is tracing on the marker:
> 
> if (reference_counter > 0) {
> Execute marker instructions;
> }
> 
> Default value of reference counter is 0. Tracer has to increment the
> reference counter before tracing on a marker and decrement it when
> done with the tracing.
> 
> Implement the reference counter logic in trace_uprobe, leaving core
> uprobe infrastructure as is, except one new callback from uprobe_mmap()
> to trace_uprobe.
> 
> trace_uprobe definition with reference counter will now be:
> 
>   :[(ref_ctr_offset)]

Would you mean 
:()
?

or use "[]" for delimiter?

Since,

> @@ -454,6 +458,26 @@ static int create_trace_uprobe(int argc, char **argv)
>   goto fail_address_parse;
>   }
>  
> + /* Parse reference counter offset if specified. */
> + rctr = strchr(arg, '(');

This seems you choose "()" for delimiter.

> + if (rctr) {
> + rctr_end = strchr(arg, ')');

rctr_end = strchr(rctr, ')');

? since we are sure rctr != NULL.

> + if (rctr > rctr_end || *(rctr_end + 1) != 0) {
> + ret = -EINVAL;
> + pr_info("Invalid reference counter offset.\n");
> + goto fail_address_parse;
> + }


Also

> +
> + *rctr++ = 0;
> + *rctr_end = 0;

Please consider to use '\0' for nul;

Thanks,



> + ret = kstrtoul(rctr, 0, &ref_ctr_offset);
> + if (ret) {
> + pr_info("Invalid reference counter offset.\n");
> + goto fail_address_parse;
> + }
> + }
> +
> + /* Parse uprobe offset. */
>   ret = kstrtoul(arg, 0, &offset);
>   if (ret)
>   goto fail_address_parse;
> @@ -488,6 +512,7 @@ static int create_trace_uprobe(int argc, char **argv)
>   goto fail_address_parse;
>   }
>   tu->offset = offset;
> + tu->ref_ctr_offset = ref_ctr_offset;
>   tu->inode = inode;
>   tu->filename = kstrdup(filename, GFP_KERNEL);
>  
> @@ -620,6 +645,8 @@ static int probes_seq_show(struct seq_file *m, void *v)
>   break;
>   }
>   }
> + if (tu->ref_ctr_offset)
> + seq_printf(m, "(0x%lx)", tu->ref_ctr_offset);
>  
>   for (i = 0; i < tu->tp.nr_args; i++)
>   seq_printf(m, " %s=%s", tu->tp.args[i].name, 
> tu->tp.args[i].comm);
> @@ -894,6 +921,139 @@ static void uretprobe_trace_func(struct trace_uprobe 
> *tu, unsigned long func,
>   return trace_handle_return(s);
>  }
>  
> +static bool sdt_valid_vma(struct trace_uprobe *tu, struct vm_area_struct 
> *vma)
> +{
> + unsigned long vaddr = vma_offset_to_vaddr(vma, tu->ref_ctr_offset);
> +
> + return tu->ref_ctr_offset &&
> + vma->vm_file &&
> + file_inode(vma->vm_file) == tu->inode &&
> + vma->vm_flags & VM_WRITE &&
> + vma->vm_start <= vaddr &&
> + vma->vm_end > vaddr;
> +}
> +
> +static struct vm_area_struct *
> +sdt_find_vma(struct mm_struct *mm, struct trace_uprobe *tu)
> +{
> + struct vm_area_struct *tmp;
> +
> + for (tmp = mm->mmap; tmp != NULL; tmp = tmp->vm_next)
> + if (sdt_valid_vma(tu, tmp))
> + return tmp;
> +
> + return NULL;
> +}
> +
> +/*
> + * Reference count gate the invocation of probe. If present,
> + * by default reference count is 0. One needs to increment
> + * it before tracing the probe and decrement it when done.
> + */
> +static int
> +sdt_update_ref_ctr(struct mm_struct *mm, unsigned long vaddr, short d)
> +{
> + void *kaddr;
> + struct page *page;
> + struct vm_area_struct *vma;
> + int ret = 0;
> + unsigned short orig = 0;
> +
> + if (vaddr == 0)
> + return -EINVAL;
> +
> + ret = get_user_pages_remote(NULL, mm, vaddr, 1,
> + FOLL_FORCE | FOLL_WRITE, &page, &vma, NULL);
> + if (ret <= 0)
> + return ret;
> +
> + kaddr = kmap_atomic(page);
> + memcpy(&orig, kaddr + (vaddr & ~PAGE_MASK), sizeof(orig));
> + orig += d;
> + memcpy(kaddr + (vaddr & ~PAGE_MASK), &orig, sizeof(orig));
> + kunmap_atomic(kaddr);
> +
> + put_page(page);
> + return 0;
> +}
> +
> +static void sdt_increment_ref_ctr(struct trace_uprobe *tu)
> +{
> + struct uprobe_map_info *info;
> + struct vm_area_struct *vma;
> + unsigned long vaddr;
> +
> + uprobe_start_dup_mmap();
> + info 

Re: [PATCH 8/8] trace_uprobe/sdt: Document about reference counter

2018-03-14 Thread Masami Hiramatsu
On Tue, 13 Mar 2018 18:26:03 +0530
Ravi Bangoria  wrote:

> No functionality changes.

Please consider to describe what is this change and why, here.

> 
> Signed-off-by: Ravi Bangoria 
> ---
>  Documentation/trace/uprobetracer.txt | 16 +---
>  kernel/trace/trace.c |  2 +-
>  2 files changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/trace/uprobetracer.txt 
> b/Documentation/trace/uprobetracer.txt
> index bf526a7c..8fb13b0 100644
> --- a/Documentation/trace/uprobetracer.txt
> +++ b/Documentation/trace/uprobetracer.txt
> @@ -19,15 +19,25 @@ user to calculate the offset of the probepoint in the 
> object.
>  
>  Synopsis of uprobe_tracer
>  -
> -  p[:[GRP/]EVENT] PATH:OFFSET [FETCHARGS] : Set a uprobe
> -  r[:[GRP/]EVENT] PATH:OFFSET [FETCHARGS] : Set a return uprobe (uretprobe)
> -  -:[GRP/]EVENT   : Clear uprobe or uretprobe event
> +  p[:[GRP/]EVENT] PATH:OFFSET[(REF_CTR_OFFSET)] [FETCHARGS]
> +  r[:[GRP/]EVENT] PATH:OFFSET[(REF_CTR_OFFSET)] [FETCHARGS]

Ah, OK in this context, [] means optional syntax :)

> +  -:[GRP/]EVENT
> +
> +  p : Set a uprobe
> +  r : Set a return uprobe (uretprobe)
> +  - : Clear uprobe or uretprobe event
>  
>GRP   : Group name. If omitted, "uprobes" is the default value.
>EVENT : Event name. If omitted, the event name is generated based
>on PATH+OFFSET.
>PATH  : Path to an executable or a library.
>OFFSET: Offset where the probe is inserted.
> +  REF_CTR_OFFSET: Reference counter offset. Optional field. Reference count
> +  gate the invocation of probe. If present, by default
> +  reference count is 0. Kernel needs to increment it before
> +  tracing the probe and decrement it when done. This is
> +  identical to semaphore in Userspace Statically Defined
> +  Tracepoints (USDT).
>  
>FETCHARGS : Arguments. Each probe can have up to 128 args.
> %REG : Fetch register REG
> diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c
> index 20a2300..2104d03 100644
> --- a/kernel/trace/trace.c
> +++ b/kernel/trace/trace.c
> @@ -4604,7 +4604,7 @@ static int tracing_trace_options_open(struct inode 
> *inode, struct file *file)
>"place (kretprobe): [:][+]|\n"
>  #endif
>  #ifdef CONFIG_UPROBE_EVENTS
> - "\tplace: :\n"
> +  "   place (uprobe): :[(ref_ctr_offset)]\n"
>  #endif
>   "\t args: =fetcharg[:type]\n"
>   "\t fetcharg: %, @, @[+|-],\n"
> -- 
> 1.8.3.1
> 


-- 
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Re: [PATCH 7/8] perf probe: Support SDT markers having reference counter (semaphore)

2018-03-14 Thread Masami Hiramatsu
Hi Ravi,

This code logic looks good. I just have several small comments for style.

On Tue, 13 Mar 2018 18:26:02 +0530
Ravi Bangoria  wrote:

> diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
> index e1dbc98..2cbe68a 100644
> --- a/tools/perf/util/probe-event.c
> +++ b/tools/perf/util/probe-event.c
> @@ -1832,6 +1832,12 @@ int parse_probe_trace_command(const char *cmd, struct 
> probe_trace_event *tev)
>   tp->offset = strtoul(fmt2_str, NULL, 10);
>   }
>  
> + if (tev->uprobes) {
> + fmt2_str = strchr(p, '(');
> + if (fmt2_str)
> + tp->ref_ctr_offset = strtoul(fmt2_str + 1, NULL, 0);
> + }
> +
>   tev->nargs = argc - 2;
>   tev->args = zalloc(sizeof(struct probe_trace_arg) * tev->nargs);
>   if (tev->args == NULL) {
> @@ -2054,15 +2060,22 @@ char *synthesize_probe_trace_command(struct 
> probe_trace_event *tev)
>   }
>  
>   /* Use the tp->address for uprobes */
> - if (tev->uprobes)
> - err = strbuf_addf(&buf, "%s:0x%lx", tp->module, tp->address);
> - else if (!strncmp(tp->symbol, "0x", 2))
> + if (tev->uprobes) {
> + if (tp->ref_ctr_offset)
> + err = strbuf_addf(&buf, "%s:0x%lx(0x%lx)", tp->module,
> +   tp->address, tp->ref_ctr_offset);
> + else
> + err = strbuf_addf(&buf, "%s:0x%lx", tp->module,
> +   tp->address);
> + } else if (!strncmp(tp->symbol, "0x", 2)) {
>   /* Absolute address. See try_to_find_absolute_address() */
>   err = strbuf_addf(&buf, "%s%s0x%lx", tp->module ?: "",
> tp->module ? ":" : "", tp->address);
> - else
> + } else {
>   err = strbuf_addf(&buf, "%s%s%s+%lu", tp->module ?: "",
>   tp->module ? ":" : "", tp->symbol, tp->offset);
> + }

What the purpose of this {}?

> +
>   if (err)
>   goto error;
>  
> diff --git a/tools/perf/util/probe-event.h b/tools/perf/util/probe-event.h
> index 45b14f0..15a98c3 100644
> --- a/tools/perf/util/probe-event.h
> +++ b/tools/perf/util/probe-event.h
> @@ -27,6 +27,7 @@ struct probe_trace_point {
>   char*symbol;/* Base symbol */
>   char*module;/* Module name */
>   unsigned long   offset; /* Offset from symbol */
> + unsigned long   ref_ctr_offset; /* SDT reference counter offset */
>   unsigned long   address;/* Actual address of the trace point */
>   boolretprobe;   /* Return probe flag */
>  };
> diff --git a/tools/perf/util/probe-file.c b/tools/perf/util/probe-file.c
> index 4ae1123..08ba3a6 100644
> --- a/tools/perf/util/probe-file.c
> +++ b/tools/perf/util/probe-file.c
> @@ -701,6 +701,12 @@ static unsigned long long sdt_note__get_addr(struct 
> sdt_note *note)
>: (unsigned long long)note->addr.a64[0];
>  }
>  
> +static unsigned long long sdt_note__get_ref_ctr_offset(struct sdt_note *note)
> +{
> + return note->bit32 ? (unsigned long long)note->addr.a32[2]
> + : (unsigned long long)note->addr.a64[2];
> +}

Could you please introduce an enum for specifying the index by name?

e.g.
enum {
SDT_NOTE_IDX_ADDR = 0,
SDT_NOTE_IDX_REFCTR = 2,
};

> +
>  static const char * const type_to_suffix[] = {
>   ":s64", "", "", "", ":s32", "", ":s16", ":s8",
>   "", ":u8", ":u16", "", ":u32", "", "", "", ":u64"
> @@ -776,14 +782,24 @@ static char *synthesize_sdt_probe_command(struct 
> sdt_note *note,
>  {
>   struct strbuf buf;
>   char *ret = NULL, **args;
> - int i, args_count;
> + int i, args_count, err;
> + unsigned long long ref_ctr_offset;
>  
>   if (strbuf_init(&buf, 32) < 0)
>   return NULL;
>  
> - if (strbuf_addf(&buf, "p:%s/%s %s:0x%llx",
> + ref_ctr_offset = sdt_note__get_ref_ctr_offset(note);
> +
> + if (ref_ctr_offset)
> + err = strbuf_addf(&buf, "p:%s/%s %s:0x%llx(0x%llx)",
>   sdtgrp, note->name, pathname,
> - sdt_note__get_addr(note)) < 0)
> + sdt_note__get_addr(note), ref_ctr_offset);
> + else
> + err = strbuf_addf(&buf, "p:%s/%s %s:0x%llx",
> + sdtgrp, note->name, pathname,
> + sdt_note__get_addr(note));

This can be minimized (and avoid repeating) by using 2 strbuf_addf()s, like

err = strbuf_addf(&buf, "p:%s/%s %s:0x%llx",
sdtgrp, note->name, pathname,
sdt_note__get_addr(note));
if (ref_ctr_offset && !err < 0)
err = strbuf_addf("(0x%llx)", ref_ctr_offset);


> +
> + if (err < 0)
>   goto error;
>  
>   if (!note->args)
> diff --git a/tools/perf/util/symbol-elf.c b/tool

Re: [PATCH 6/8] trace_uprobe/sdt: Fix multiple update of same reference counter

2018-03-14 Thread Masami Hiramatsu
On Tue, 13 Mar 2018 18:26:01 +0530
Ravi Bangoria  wrote:

> For tiny binaries/libraries, different mmap regions points to the
> same file portion. In such cases, we may increment reference counter
> multiple times. But while de-registration, reference counter will get
> decremented only by once leaving reference counter > 0 even if no one
> is tracing on that marker.
> 
> Ensure increment and decrement happens in sync by keeping list of
> mms in trace_uprobe. Increment reference counter only if mm is not
> present in the list and decrement only if mm is present in the list.
> 
> Example
> 
>   # echo "p:sdt_tick/loop2 /tmp/tick:0x6e4(0x10036)" > uprobe_events
> 
> Before patch:
> 
>   # perf stat -a -e sdt_tick:loop2
>   # /tmp/tick
>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
> 2>/dev/null | xxd
>000: 02   .
> 
>   # pkill perf
>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
> 2>/dev/null | xxd
>   000: 01   .
> 
> After patch:
> 
>   # perf stat -a -e sdt_tick:loop2
>   # /tmp/tick
>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
> 2>/dev/null | xxd
>   000: 01   .
> 
>   # pkill perf
>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
> 2>/dev/null | xxd
>   000: 00   .
> 
> Signed-off-by: Ravi Bangoria 
> ---
>  kernel/trace/trace_uprobe.c | 105 
> +++-
>  1 file changed, 103 insertions(+), 2 deletions(-)
> 
> diff --git a/kernel/trace/trace_uprobe.c b/kernel/trace/trace_uprobe.c
> index b6c9b48..9bf3f7a 100644
> --- a/kernel/trace/trace_uprobe.c
> +++ b/kernel/trace/trace_uprobe.c
> @@ -50,6 +50,11 @@ struct trace_uprobe_filter {
>   struct list_headperf_events;
>  };
>  
> +struct sdt_mm_list {
> + struct mm_struct *mm;
> + struct sdt_mm_list *next;
> +};

Oh, please use struct list_head instead of defining your own pointer-chain :(

> +
>  /*
>   * uprobe event core functions
>   */
> @@ -61,6 +66,8 @@ struct trace_uprobe {
>   char*filename;
>   unsigned long   offset;
>   unsigned long   ref_ctr_offset;
> + struct sdt_mm_list  *sml;
> + struct rw_semaphore sml_rw_sem;

BTW, is there any reason to use rw_semaphore? (mutex doesn't fit?)

Thank you,

>   unsigned long   nhit;
>   struct trace_probe  tp;
>  };
> @@ -274,6 +281,7 @@ static inline bool is_ret_probe(struct trace_uprobe *tu)
>   if (is_ret)
>   tu->consumer.ret_handler = uretprobe_dispatcher;
>   init_trace_uprobe_filter(&tu->filter);
> + init_rwsem(&tu->sml_rw_sem);
>   return tu;
>  
>  error:
> @@ -921,6 +929,74 @@ static void uretprobe_trace_func(struct trace_uprobe 
> *tu, unsigned long func,
>   return trace_handle_return(s);
>  }
>  
> +static bool sdt_check_mm_list(struct trace_uprobe *tu, struct mm_struct *mm)
> +{
> + struct sdt_mm_list *tmp = tu->sml;
> +
> + if (!tu->sml || !mm)
> + return false;
> +
> + while (tmp) {
> + if (tmp->mm == mm)
> + return true;
> + tmp = tmp->next;
> + }
> +
> + return false;
> +}
> +
> +static void sdt_add_mm_list(struct trace_uprobe *tu, struct mm_struct *mm)
> +{
> + struct sdt_mm_list *tmp;
> +
> + tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
> + if (!tmp)
> + return;
> +
> + tmp->mm = mm;
> + tmp->next = tu->sml;
> + tu->sml = tmp;
> +}
> +
> +static void sdt_del_mm_list(struct trace_uprobe *tu, struct mm_struct *mm)
> +{
> + struct sdt_mm_list *prev, *curr;
> +
> + if (!tu->sml)
> + return;
> +
> + if (tu->sml->mm == mm) {
> + curr = tu->sml;
> + tu->sml = tu->sml->next;
> + kfree(curr);
> + return;
> + }
> +
> + prev = tu->sml;
> + curr = tu->sml->next;
> + while (curr) {
> + if (curr->mm == mm) {
> + prev->next = curr->next;
> + kfree(curr);
> + return;
> + }
> + prev = curr;
> + curr = curr->next;
> + }
> +}
> +
> +static void sdt_flush_mm_list(struct trace_uprobe *tu)
> +{
> + struct sdt_mm_list *next, *curr = tu->sml;
> +
> + while (curr) {
> + next = curr->next;
> + kfree(curr);
> + curr = next;
> + }
> + tu->sml = NULL;
> +}
> +
>  static bool sdt_valid_vma(struct trace_uprobe *tu, struct vm_area_struct 
> *vma)
>  {
>   unsigned long vaddr = vma_offset_to_vaddr(vma, tu->ref_ctr_offset);
> @@ -989,17 +1065,25 @@ static void sdt_increment_ref_ctr(struct trace_uprobe 
> *tu)
>   if (IS_ERR(info))
>   goto out;
>  
> + down_write(

[PATCH 00/16] remove eight obsolete architectures

2018-03-14 Thread Arnd Bergmann
Here is the collection of patches I have applied to my 'asm-generic' tree
on top of the 'metag' removal. This does not include any of the device
drivers, I'll send those separately to a someone different list of people.

The removal came out of a discussion that is now documented at
https://lwn.net/Articles/748074/

Following up from the state described there, I ended up removing the
mn10300, tile, blackfin and cris architectures directly, rather than
waiting, after consulting with the respective maintainers.

However, the unicore32 architecture is no longer part of the removal,
after its maintainer Xuetao Guan said that the port is still actively
being used and that he intends to keep working on it, and that he will
try to provide updated toolchain sources.

In the end, it seems that while the eight architectures are extremely
different, they all suffered the same fate: There was one company in
charge of an SoC line, a CPU microarchitecture and a software ecosystem,
which was more costly than licensing newer off-the-shelf CPU cores from
a third party (typically ARM, MIPS, or RISC-V). It seems that all the
SoC product lines are still around, but have not used the custom CPU
architectures for several years at this point.

  Arnd

Arnd Bergmann (14):
  arch: remove frv port
  arch: remove m32r port
  arch: remove score port
  arch: remove blackfin port
  arch: remove tile port
  procfs: remove CONFIG_HARDWALL dependency
  mm: remove blackfin MPU support
  mm: remove obsolete alloc_remap()
  treewide: simplify Kconfig dependencies for removed archs
  asm-generic: siginfo: remove obsolete #ifdefs
  Documentation: arch-support: remove obsolete architectures
  asm-generic: clean up asm/unistd.h
  recordmcount.pl: drop blackin and tile support
  ktest: remove obsolete architectures

David Howells (1):
  mn10300: Remove the architecture

Jesper Nilsson (1):
  CRIS: Drop support for the CRIS port

Dirstat only (full diffstat is over 100KB):

   6.3% arch/blackfin/mach-bf548/include/mach/
   4.5% arch/blackfin/mach-bf609/include/mach/
  26.3% arch/blackfin/
   4.1% arch/cris/arch-v32/
   5.6% arch/cris/include/arch-v32/arch/hwregs/iop/
   4.1% arch/cris/include/arch-v32/mach-a3/mach/hwregs/
   4.7% arch/cris/include/arch-v32/
   7.8% arch/cris/
   5.6% arch/frv/
   5.5% arch/m32r/
   7.0% arch/mn10300/
   7.6% arch/tile/include/
   6.4% arch/tile/kernel/
   0.0% Documentation/admin-guide/
   0.0% Documentation/blackfin/
   0.0% Documentation/cris/
   0.0% Documentation/devicetree/bindings/cris/
   0.0% Documentation/devicetree/bindings/interrupt-controller/
   2.8% Documentation/features/
   0.5% Documentation/frv/
   0.0% Documentation/ioctl/
   0.0% Documentation/mn10300/
   0.0% Documentation/
   0.0% block/
   0.0% crypto/
   0.0% drivers/ide/
   0.0% drivers/input/joystick/
   0.0% drivers/isdn/hisax/
   0.0% drivers/net/ethernet/davicom/
   0.0% drivers/net/ethernet/smsc/
   0.0% drivers/net/wireless/cisco/
   0.0% drivers/pci/
   0.0% drivers/pwm/
   0.0% drivers/rtc/
   0.0% drivers/spi/
   0.0% drivers/staging/speakup/
   0.0% drivers/usb/musb/
   0.0% drivers/video/console/
   0.0% drivers/watchdog/
   0.0% fs/minix/
   0.0% fs/proc/
   0.0% fs/
   0.0% include/asm-generic/
   0.0% include/linux/
   0.0% include/uapi/asm-generic/
   0.0% init/
   0.0% kernel/
   0.0% lib/
   0.0% mm/
   0.0% samples/blackfin/
   0.0% samples/kprobes/
   0.0% samples/
   0.0% scripts/mod/
   0.0% scripts/
   0.0% tools/arch/frv/include/uapi/asm/
   0.0% tools/arch/m32r/include/uapi/asm/
   0.0% tools/arch/mn10300/include/uapi/asm/
   0.0% tools/arch/score/include/uapi/asm/
   0.0% tools/arch/tile/include/asm/
   0.0% tools/arch/tile/include/uapi/asm/
   0.0% tools/include/asm-generic/
   0.0% tools/scripts/
   0.0% tools/testing/ktest/examples/
   0.0% tools/testing/ktest/

Cc: linux-doc@vger.kernel.org
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Cc: net...@vger.kernel.org
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Cc: linux-...@vger.kernel.org
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Cc: linux-...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: linux-fb...@vger.kernel.org
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Re: [PATCH 5/8] trace_uprobe: Support SDT markers having reference count (semaphore)

2018-03-14 Thread Ravi Bangoria
Hi Masami,

On 03/14/2018 07:18 PM, Masami Hiramatsu wrote:
> Hi Ravi,
>
> On Tue, 13 Mar 2018 18:26:00 +0530
> Ravi Bangoria  wrote:
>
>> Userspace Statically Defined Tracepoints[1] are dtrace style markers
>> inside userspace applications. These markers are added by developer at
>> important places in the code. Each marker source expands to a single
>> nop instruction in the compiled code but there may be additional
>> overhead for computing the marker arguments which expands to couple of
>> instructions. In case the overhead is more, execution of it can be
>> ommited by runtime if() condition when no one is tracing on the marker:
>>
>> if (reference_counter > 0) {
>> Execute marker instructions;
>> }
>>
>> Default value of reference counter is 0. Tracer has to increment the
>> reference counter before tracing on a marker and decrement it when
>> done with the tracing.
>>
>> Implement the reference counter logic in trace_uprobe, leaving core
>> uprobe infrastructure as is, except one new callback from uprobe_mmap()
>> to trace_uprobe.
>>
>> trace_uprobe definition with reference counter will now be:
>>
>>   :[(ref_ctr_offset)]
> Would you mean 
> :()
> ?
>
> or use "[]" for delimiter?

[] indicates optional field.

> Since,
>
>> @@ -454,6 +458,26 @@ static int create_trace_uprobe(int argc, char **argv)
>>  goto fail_address_parse;
>>  }
>>  
>> +/* Parse reference counter offset if specified. */
>> +rctr = strchr(arg, '(');
> This seems you choose "()" for delimiter.

Correct.

>> +if (rctr) {
>> +rctr_end = strchr(arg, ')');
>   rctr_end = strchr(rctr, ')');
>
> ? since we are sure rctr != NULL.

Yes. we can use rctr instead of arg.

>> +if (rctr > rctr_end || *(rctr_end + 1) != 0) {
>> +ret = -EINVAL;
>> +pr_info("Invalid reference counter offset.\n");
>> +goto fail_address_parse;
>> +}
>
> Also
>
>> +
>> +*rctr++ = 0;
>> +*rctr_end = 0;
> Please consider to use '\0' for nul;

Sure. Will change it.

Thanks for the review :)
Ravi

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Re: [PATCH 6/8] trace_uprobe/sdt: Fix multiple update of same reference counter

2018-03-14 Thread Ravi Bangoria


On 03/14/2018 07:45 PM, Masami Hiramatsu wrote:
> On Tue, 13 Mar 2018 18:26:01 +0530
> Ravi Bangoria  wrote:
>
>> For tiny binaries/libraries, different mmap regions points to the
>> same file portion. In such cases, we may increment reference counter
>> multiple times. But while de-registration, reference counter will get
>> decremented only by once leaving reference counter > 0 even if no one
>> is tracing on that marker.
>>
>> Ensure increment and decrement happens in sync by keeping list of
>> mms in trace_uprobe. Increment reference counter only if mm is not
>> present in the list and decrement only if mm is present in the list.
>>
>> Example
>>
>>   # echo "p:sdt_tick/loop2 /tmp/tick:0x6e4(0x10036)" > uprobe_events
>>
>> Before patch:
>>
>>   # perf stat -a -e sdt_tick:loop2
>>   # /tmp/tick
>>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
>> 2>/dev/null | xxd
>>000: 02   .
>>
>>   # pkill perf
>>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
>> 2>/dev/null | xxd
>>   000: 01   .
>>
>> After patch:
>>
>>   # perf stat -a -e sdt_tick:loop2
>>   # /tmp/tick
>>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
>> 2>/dev/null | xxd
>>   000: 01   .
>>
>>   # pkill perf
>>   # dd if=/proc/`pgrep tick`/mem bs=1 count=1 skip=$(( 0x10020036 )) 
>> 2>/dev/null | xxd
>>   000: 00   .
>>
>> Signed-off-by: Ravi Bangoria 
>> ---
>>  kernel/trace/trace_uprobe.c | 105 
>> +++-
>>  1 file changed, 103 insertions(+), 2 deletions(-)
>>
>> diff --git a/kernel/trace/trace_uprobe.c b/kernel/trace/trace_uprobe.c
>> index b6c9b48..9bf3f7a 100644
>> --- a/kernel/trace/trace_uprobe.c
>> +++ b/kernel/trace/trace_uprobe.c
>> @@ -50,6 +50,11 @@ struct trace_uprobe_filter {
>>  struct list_headperf_events;
>>  };
>>  
>> +struct sdt_mm_list {
>> +struct mm_struct *mm;
>> +struct sdt_mm_list *next;
>> +};
> Oh, please use struct list_head instead of defining your own pointer-chain :(

Sure, will change it.

>> +
>>  /*
>>   * uprobe event core functions
>>   */
>> @@ -61,6 +66,8 @@ struct trace_uprobe {
>>  char*filename;
>>  unsigned long   offset;
>>  unsigned long   ref_ctr_offset;
>> +struct sdt_mm_list  *sml;
>> +struct rw_semaphore sml_rw_sem;
> BTW, is there any reason to use rw_semaphore? (mutex doesn't fit?)

Hmm.. No specific reason.. will use a mutex instead.

Thanks for the review :)
Ravi

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Re: [PATCH 7/8] perf probe: Support SDT markers having reference counter (semaphore)

2018-03-14 Thread Ravi Bangoria


On 03/14/2018 07:39 PM, Masami Hiramatsu wrote:
> Hi Ravi,
>
> This code logic looks good. I just have several small comments for style.
>
> On Tue, 13 Mar 2018 18:26:02 +0530
> Ravi Bangoria  wrote:
>
>> diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
>> index e1dbc98..2cbe68a 100644
>> --- a/tools/perf/util/probe-event.c
>> +++ b/tools/perf/util/probe-event.c
>> @@ -1832,6 +1832,12 @@ int parse_probe_trace_command(const char *cmd, struct 
>> probe_trace_event *tev)
>>  tp->offset = strtoul(fmt2_str, NULL, 10);
>>  }
>>  
>> +if (tev->uprobes) {
>> +fmt2_str = strchr(p, '(');
>> +if (fmt2_str)
>> +tp->ref_ctr_offset = strtoul(fmt2_str + 1, NULL, 0);
>> +}
>> +
>>  tev->nargs = argc - 2;
>>  tev->args = zalloc(sizeof(struct probe_trace_arg) * tev->nargs);
>>  if (tev->args == NULL) {
>> @@ -2054,15 +2060,22 @@ char *synthesize_probe_trace_command(struct 
>> probe_trace_event *tev)
>>  }
>>  
>>  /* Use the tp->address for uprobes */
>> -if (tev->uprobes)
>> -err = strbuf_addf(&buf, "%s:0x%lx", tp->module, tp->address);
>> -else if (!strncmp(tp->symbol, "0x", 2))
>> +if (tev->uprobes) {
>> +if (tp->ref_ctr_offset)
>> +err = strbuf_addf(&buf, "%s:0x%lx(0x%lx)", tp->module,
>> +  tp->address, tp->ref_ctr_offset);
>> +else
>> +err = strbuf_addf(&buf, "%s:0x%lx", tp->module,
>> +  tp->address);
>> +} else if (!strncmp(tp->symbol, "0x", 2)) {
>>  /* Absolute address. See try_to_find_absolute_address() */
>>  err = strbuf_addf(&buf, "%s%s0x%lx", tp->module ?: "",
>>tp->module ? ":" : "", tp->address);
>> -else
>> +} else {
>>  err = strbuf_addf(&buf, "%s%s%s+%lu", tp->module ?: "",
>>  tp->module ? ":" : "", tp->symbol, tp->offset);
>> +}
> What the purpose of this {}?

The starting if has multiple statements and thus it needs braces. So I added
braces is all other conditions.

>> +
>>  if (err)
>>  goto error;
>>  
>> diff --git a/tools/perf/util/probe-event.h b/tools/perf/util/probe-event.h
>> index 45b14f0..15a98c3 100644
>> --- a/tools/perf/util/probe-event.h
>> +++ b/tools/perf/util/probe-event.h
>> @@ -27,6 +27,7 @@ struct probe_trace_point {
>>  char*symbol;/* Base symbol */
>>  char*module;/* Module name */
>>  unsigned long   offset; /* Offset from symbol */
>> +unsigned long   ref_ctr_offset; /* SDT reference counter offset */
>>  unsigned long   address;/* Actual address of the trace point */
>>  boolretprobe;   /* Return probe flag */
>>  };
>> diff --git a/tools/perf/util/probe-file.c b/tools/perf/util/probe-file.c
>> index 4ae1123..08ba3a6 100644
>> --- a/tools/perf/util/probe-file.c
>> +++ b/tools/perf/util/probe-file.c
>> @@ -701,6 +701,12 @@ static unsigned long long sdt_note__get_addr(struct 
>> sdt_note *note)
>>   : (unsigned long long)note->addr.a64[0];
>>  }
>>  
>> +static unsigned long long sdt_note__get_ref_ctr_offset(struct sdt_note 
>> *note)
>> +{
>> +return note->bit32 ? (unsigned long long)note->addr.a32[2]
>> +: (unsigned long long)note->addr.a64[2];
>> +}
> Could you please introduce an enum for specifying the index by name?
>
> e.g.
> enum {
>   SDT_NOTE_IDX_ADDR = 0,
>   SDT_NOTE_IDX_REFCTR = 2,
> };

That will be good. Will change it.

>> +
>>  static const char * const type_to_suffix[] = {
>>  ":s64", "", "", "", ":s32", "", ":s16", ":s8",
>>  "", ":u8", ":u16", "", ":u32", "", "", "", ":u64"
>> @@ -776,14 +782,24 @@ static char *synthesize_sdt_probe_command(struct 
>> sdt_note *note,
>>  {
>>  struct strbuf buf;
>>  char *ret = NULL, **args;
>> -int i, args_count;
>> +int i, args_count, err;
>> +unsigned long long ref_ctr_offset;
>>  
>>  if (strbuf_init(&buf, 32) < 0)
>>  return NULL;
>>  
>> -if (strbuf_addf(&buf, "p:%s/%s %s:0x%llx",
>> +ref_ctr_offset = sdt_note__get_ref_ctr_offset(note);
>> +
>> +if (ref_ctr_offset)
>> +err = strbuf_addf(&buf, "p:%s/%s %s:0x%llx(0x%llx)",
>>  sdtgrp, note->name, pathname,
>> -sdt_note__get_addr(note)) < 0)
>> +sdt_note__get_addr(note), ref_ctr_offset);
>> +else
>> +err = strbuf_addf(&buf, "p:%s/%s %s:0x%llx",
>> +sdtgrp, note->name, pathname,
>> +sdt_note__get_addr(note));
> This can be minimized (and avoid repeating) by using 2 strbuf_addf()s, like
>
>   err = strbuf_addf(&buf, "p:%s/%s %s:0x%llx",
>   sdtgrp, note->name, pathname,
>   sdt_

Re: [PATCH 8/8] trace_uprobe/sdt: Document about reference counter

2018-03-14 Thread Ravi Bangoria


On 03/14/2018 07:20 PM, Masami Hiramatsu wrote:
> On Tue, 13 Mar 2018 18:26:03 +0530
> Ravi Bangoria  wrote:
>
>> No functionality changes.
> Please consider to describe what is this change and why, here.

Will add in next version.

>> Signed-off-by: Ravi Bangoria 
>> ---
>>  Documentation/trace/uprobetracer.txt | 16 +---
>>  kernel/trace/trace.c |  2 +-
>>  2 files changed, 14 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/trace/uprobetracer.txt 
>> b/Documentation/trace/uprobetracer.txt
>> index bf526a7c..8fb13b0 100644
>> --- a/Documentation/trace/uprobetracer.txt
>> +++ b/Documentation/trace/uprobetracer.txt
>> @@ -19,15 +19,25 @@ user to calculate the offset of the probepoint in the 
>> object.
>>  
>>  Synopsis of uprobe_tracer
>>  -
>> -  p[:[GRP/]EVENT] PATH:OFFSET [FETCHARGS] : Set a uprobe
>> -  r[:[GRP/]EVENT] PATH:OFFSET [FETCHARGS] : Set a return uprobe (uretprobe)
>> -  -:[GRP/]EVENT   : Clear uprobe or uretprobe event
>> +  p[:[GRP/]EVENT] PATH:OFFSET[(REF_CTR_OFFSET)] [FETCHARGS]
>> +  r[:[GRP/]EVENT] PATH:OFFSET[(REF_CTR_OFFSET)] [FETCHARGS]
> Ah, OK in this context, [] means optional syntax :)

Correct.

Thanks,
Ravi

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[PATCH 00/47] arch-removal: device drivers

2018-03-14 Thread Arnd Bergmann
Hi driver maintainers,

I just posted one series with the removal of eight architectures,
see https://lkml.org/lkml/2018/3/14/505 for details, or
https://lwn.net/Articles/748074/ for more background.

These are the device drivers that go along with them. I have already
picked up the drivers for arch/metag/ into my tree, they were reviewed
earlier.

Please let me know if you have any concerns with the patch, or if you
prefer to pick up the patches in your respective trees.  I created
the patches with 'git format-patch -D', so they will not apply without
manually removing those files.

For anything else, I'd keep the removal patches in my asm-generic tree
and will send a pull request for 4.17 along with the actual arch removal.

   Arnd

Arnd Bergmann
  edac: remove tile driver
  net: tile: remove ethernet drivers
  net: adi: remove blackfin ethernet drivers
  net: 8390: remove m32r specific bits
  net: remove cris etrax ethernet driver
  net: smsc: remove m32r specific smc91x configuration
  raid: remove tile specific raid6 implementation
  rtc: remove tile driver
  rtc: remove bfin driver
  char: remove obsolete ds1302 rtc driver
  char: remove tile-srom.c
  char: remove blackfin OTP driver
  pcmcia: remove m32r drivers
  pcmcia: remove blackfin driver
  ASoC: remove blackfin drivers
  video/logo: remove obsolete logo files
  fbdev: remove blackfin drivers
  fbdev: s1d13xxxfb: remove m32r specific hacks
  crypto: remove blackfin CRC driver
  media: platform: remove blackfin capture driver
  media: platform: remove m32r specific arv driver
  cpufreq: remove blackfin driver
  cpufreq: remove cris specific drivers
  gpio: remove etraxfs driver
  pinctrl: remove adi2/blackfin drivers
  ata: remove bf54x driver
  input: keyboard: remove bf54x driver
  input: misc: remove blackfin rotary driver
  mmc: remove bfin_sdh driver
  can: remove bfin_can driver
  watchdog: remove bfin_wdt driver
  mtd: maps: remove bfin-async-flash driver
  mtd: nand: remove bf5xx_nand driver
  spi: remove blackfin related host drivers
  i2c: remove bfin-twi driver
  pwm: remobe pwm-bfin driver
  usb: host: remove tilegx platform glue
  usb: musb: remove blackfin port
  usb: isp1362: remove blackfin arch glue
  serial: remove cris/etrax uart drivers
  serial: remove blackfin drivers
  serial: remove m32r_sio driver
  serial: remove tile uart driver
  tty: remove bfin_jtag_comm and hvc_bfin_jtag drivers
  tty: hvc: remove tile driver
  staging: irda: remove bfin_sir driver
  staging: iio: remove iio-trig-bfin-timer driver

 .../devicetree/bindings/gpio/gpio-etraxfs.txt  |   22 -
 .../bindings/serial/axis,etraxfs-uart.txt  |   22 -
 Documentation/watchdog/watchdog-parameters.txt |5 -
 MAINTAINERS|8 -
 drivers/ata/Kconfig|9 -
 drivers/ata/Makefile   |1 -
 drivers/ata/pata_bf54x.c   | 1703 
 drivers/char/Kconfig   |   48 -
 drivers/char/Makefile  |3 -
 drivers/char/bfin-otp.c|  237 --
 drivers/char/ds1302.c  |  357 --
 drivers/char/tile-srom.c   |  475 ---
 drivers/cpufreq/Makefile   |3 -
 drivers/cpufreq/blackfin-cpufreq.c |  217 -
 drivers/cpufreq/cris-artpec3-cpufreq.c |   93 -
 drivers/cpufreq/cris-etraxfs-cpufreq.c |   92 -
 drivers/crypto/Kconfig |7 -
 drivers/crypto/Makefile|1 -
 drivers/crypto/bfin_crc.c  |  753 
 drivers/crypto/bfin_crc.h  |  124 -
 drivers/edac/Kconfig   |8 -
 drivers/edac/Makefile  |2 -
 drivers/edac/tile_edac.c   |  265 --
 drivers/gpio/Kconfig   |9 -
 drivers/gpio/Makefile  |1 -
 drivers/gpio/gpio-etraxfs.c|  475 ---
 drivers/i2c/busses/Kconfig |   18 -
 drivers/i2c/busses/Makefile|1 -
 drivers/i2c/busses/i2c-bfin-twi.c  |  737 
 drivers/input/keyboard/Kconfig |9 -
 drivers/input/keyboard/Makefile|1 -
 drivers/input/keyboard/bf54x-keys.c|  396 --
 drivers/input/misc/Kconfig |9 -
 drivers/input/misc/Makefile|1 -
 drivers/input/misc/bfin_rotary.c   |  294 --
 drivers/media/platform/Kconfig |   22 -
 drivers/media/platform/Makefile|4 -
 drivers/media/platform/arv.c   |  884 
 drivers/media/platform/blackfin/Kconfig|   16 -
 drivers/media/platform/blackfin/Makefile   | 

[PATCH 31/47] watchdog: remove bfin_wdt driver

2018-03-14 Thread Arnd Bergmann
The blackfin architecture is getting removed, so this driver has
become obsolete.

Signed-off-by: Arnd Bergmann 
---
 Documentation/watchdog/watchdog-parameters.txt |   5 -
 drivers/watchdog/Kconfig   |  17 -
 drivers/watchdog/Makefile  |   7 -
 drivers/watchdog/bfin_wdt.c| 476 -
 4 files changed, 505 deletions(-)
 delete mode 100644 drivers/watchdog/bfin_wdt.c

diff --git a/Documentation/watchdog/watchdog-parameters.txt 
b/Documentation/watchdog/watchdog-parameters.txt
index beea975980f6..6d6200ea27b8 100644
--- a/Documentation/watchdog/watchdog-parameters.txt
+++ b/Documentation/watchdog/watchdog-parameters.txt
@@ -55,11 +55,6 @@ wdt_time: Watchdog time in seconds. (default=30)
 nowayout: Watchdog cannot be stopped once started
(default=kernel config parameter)
 -
-bfin_wdt:
-timeout: Watchdog timeout in seconds. (1<=timeout<=((2^32)/SCLK), default=20)
-nowayout: Watchdog cannot be stopped once started
-   (default=kernel config parameter)
--
 coh901327_wdt:
 margin: Watchdog margin in seconds (default 60s)
 -
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 098e5ed4ee3d..f89f8869ca2a 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -815,23 +815,6 @@ config SPRD_WATCHDOG
  Say Y here to include watchdog timer supported
  by Spreadtrum system.
 
-# BLACKFIN Architecture
-
-config BFIN_WDT
-   tristate "Blackfin On-Chip Watchdog Timer"
-   depends on BLACKFIN
-   ---help---
- If you say yes here you will get support for the Blackfin On-Chip
- Watchdog Timer. If you have one of these processors and wish to
- have watchdog support enabled, say Y, otherwise say N.
-
- To compile this driver as a module, choose M here: the
- module will be called bfin_wdt.
-
-# CRIS Architecture
-
-# FRV Architecture
-
 # X86 (i386 + ia64 + x86_64) Architecture
 
 config ACQUIRE_WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 0474d38aa854..e209824541b8 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -91,13 +91,6 @@ obj-$(CONFIG_UNIPHIER_WATCHDOG) += uniphier_wdt.o
 obj-$(CONFIG_RTD119X_WATCHDOG) += rtd119x_wdt.o
 obj-$(CONFIG_SPRD_WATCHDOG) += sprd_wdt.o
 
-# BLACKFIN Architecture
-obj-$(CONFIG_BFIN_WDT) += bfin_wdt.o
-
-# CRIS Architecture
-
-# FRV Architecture
-
 # X86 (i386 + ia64 + x86_64) Architecture
 obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
 obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
diff --git a/drivers/watchdog/bfin_wdt.c b/drivers/watchdog/bfin_wdt.c
deleted file mode 100644
index aa4d2e8a8ef9..
-- 
2.9.0

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Re: [PATCH 31/47] watchdog: remove bfin_wdt driver

2018-03-14 Thread Guenter Roeck
On Wed, Mar 14, 2018 at 04:35:44PM +0100, Arnd Bergmann wrote:
> The blackfin architecture is getting removed, so this driver has
> become obsolete.
> 
> Signed-off-by: Arnd Bergmann 

Acked-by: Guenter Roeck 

> ---
>  Documentation/watchdog/watchdog-parameters.txt |   5 -
>  drivers/watchdog/Kconfig   |  17 -
>  drivers/watchdog/Makefile  |   7 -
>  drivers/watchdog/bfin_wdt.c| 476 
> -
>  4 files changed, 505 deletions(-)
>  delete mode 100644 drivers/watchdog/bfin_wdt.c
> 
> diff --git a/Documentation/watchdog/watchdog-parameters.txt 
> b/Documentation/watchdog/watchdog-parameters.txt
> index beea975980f6..6d6200ea27b8 100644
> --- a/Documentation/watchdog/watchdog-parameters.txt
> +++ b/Documentation/watchdog/watchdog-parameters.txt
> @@ -55,11 +55,6 @@ wdt_time: Watchdog time in seconds. (default=30)
>  nowayout: Watchdog cannot be stopped once started
>   (default=kernel config parameter)
>  -
> -bfin_wdt:
> -timeout: Watchdog timeout in seconds. (1<=timeout<=((2^32)/SCLK), default=20)
> -nowayout: Watchdog cannot be stopped once started
> - (default=kernel config parameter)
> --
>  coh901327_wdt:
>  margin: Watchdog margin in seconds (default 60s)
>  -
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index 098e5ed4ee3d..f89f8869ca2a 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -815,23 +815,6 @@ config SPRD_WATCHDOG
> Say Y here to include watchdog timer supported
> by Spreadtrum system.
>  
> -# BLACKFIN Architecture
> -
> -config BFIN_WDT
> - tristate "Blackfin On-Chip Watchdog Timer"
> - depends on BLACKFIN
> - ---help---
> -   If you say yes here you will get support for the Blackfin On-Chip
> -   Watchdog Timer. If you have one of these processors and wish to
> -   have watchdog support enabled, say Y, otherwise say N.
> -
> -   To compile this driver as a module, choose M here: the
> -   module will be called bfin_wdt.
> -
> -# CRIS Architecture
> -
> -# FRV Architecture
> -
>  # X86 (i386 + ia64 + x86_64) Architecture
>  
>  config ACQUIRE_WDT
> diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> index 0474d38aa854..e209824541b8 100644
> --- a/drivers/watchdog/Makefile
> +++ b/drivers/watchdog/Makefile
> @@ -91,13 +91,6 @@ obj-$(CONFIG_UNIPHIER_WATCHDOG) += uniphier_wdt.o
>  obj-$(CONFIG_RTD119X_WATCHDOG) += rtd119x_wdt.o
>  obj-$(CONFIG_SPRD_WATCHDOG) += sprd_wdt.o
>  
> -# BLACKFIN Architecture
> -obj-$(CONFIG_BFIN_WDT) += bfin_wdt.o
> -
> -# CRIS Architecture
> -
> -# FRV Architecture
> -
>  # X86 (i386 + ia64 + x86_64) Architecture
>  obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
>  obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
> diff --git a/drivers/watchdog/bfin_wdt.c b/drivers/watchdog/bfin_wdt.c
> deleted file mode 100644
> index aa4d2e8a8ef9..
> -- 
> 2.9.0
> 
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Re: [PATCH 5/8] trace_uprobe: Support SDT markers having reference count (semaphore)

2018-03-14 Thread Oleg Nesterov
On 03/13, Ravi Bangoria wrote:
>
> +static bool sdt_valid_vma(struct trace_uprobe *tu, struct vm_area_struct 
> *vma)
> +{
> + unsigned long vaddr = vma_offset_to_vaddr(vma, tu->ref_ctr_offset);
> +
> + return tu->ref_ctr_offset &&
> + vma->vm_file &&
> + file_inode(vma->vm_file) == tu->inode &&
> + vma->vm_flags & VM_WRITE &&
> + vma->vm_start <= vaddr &&
> + vma->vm_end > vaddr;
> +}

Perhaps in this case a simple

ref_ctr_offset < vma->vm_end - vma->vm_start

check without vma_offset_to_vaddr() makes more sense, but I won't insist.



> +static void sdt_increment_ref_ctr(struct trace_uprobe *tu)
> +{
> + struct uprobe_map_info *info;
> + struct vm_area_struct *vma;
> + unsigned long vaddr;
> +
> + uprobe_start_dup_mmap();
> + info = uprobe_build_map_info(tu->inode->i_mapping,
> + tu->ref_ctr_offset, false);

Hmm. This doesn't look right.

If you need to find all mappings (and avoid the races with fork/dup_mmap) you
need to take this semaphore for writing, uprobe_start_dup_mmap() can't help.

Oleg.

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Re: [PATCH v4] cpuset: Enable cpuset controller in default hierarchy

2018-03-14 Thread Tejun Heo
Hello,

On Sat, Mar 10, 2018 at 04:47:28AM +0100, Mike Galbraith wrote:
> Some form of cpu_exclusive (preferably exactly that, but something else
> could replace it) is needed to define sets that must not overlap any
> other set at creation time or any time thereafter.  A set with property
> 'exclusive' is the enabler for fundamentally exclusive (but dynamic!)
> set properties such as 'isolated' (etc etc).

I'm not sure cpu_exclusive makes sense.  A controller knob can either
belong to the parent or the cgroup itself and cpu_exclusive doesn't
make sense in either case.

1. cpu_exclusive is owned by the parent as other usual resource
   control knobs.  IOW, it's not delegatable.

   This is weird because it's asking the kernel to protect against its
   own misconfiguration and there's nothing preventing cpu_exclusive
   itself being cleared by the same entitya.

2. cpu_exclusive is owned by the cgroup itself like memory.oom_group.
   IOW, it's delegatable.

   This allows a cgroup to affect what its siblings can or cannot do,
   which is broken.  Semantically, it doesn't make much sense either.

I don't think it's a good idea to add a kernel mechanism to prevent
misconfiguration from a single entity.

Thanks.

-- 
tejun
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RE: Documentation: networking: ixgb: Remove reference to IXGB_NAPI

2018-03-14 Thread Brown, Aaron F
> From patchwork Mon Jan 29 12:17:54 2018
> Content-Type: text/plain; charset="utf-8"
> MIME-Version: 1.0
> Content-Transfer-Encoding: 7bit
> Subject: Documentation: networking: ixgb: Remove reference to IXGB_NAPI
> X-Patchwork-Submitter: Corentin Labbe 
> X-Patchwork-Id: 867294
> X-Patchwork-Delegate: jeffrey.t.kirs...@intel.com
> Message-Id: <1517228274-1305-1-git-send-email-cla...@baylibre.com>
> To: cor...@lwn.net,   jeffrey.t.kirs...@intel.com
> Cc: Corentin Labbe , intel-wired-...@lists.osuosl.org, 
>  linux-ker...@vger.kernel.org, linux-doc@vger.kernel.org
> Date: Mon, 29 Jan 2018 12:17:54 +
> From: Corentin Labbe 
> List-Id: Intel Wired Ethernet Linux Kernel Driver Development  
> 
>
> NAPI is enabled by default and IXGB_NAPI was removed since
> commit 6d37ab282e24 ("ixgb: make NAPI the only option and the default")
> Update the doc accordingly.
>
> Signed-off-by: Corentin Labbe 
> ---
>  Documentation/networking/ixgb.txt | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)

Tested-by: Aaron Brown 

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Re: [PATCH 5/8] trace_uprobe: Support SDT markers having reference count (semaphore)

2018-03-14 Thread Steven Rostedt
On Tue, 13 Mar 2018 18:26:00 +0530
Ravi Bangoria  wrote:

>  include/linux/uprobes.h |   2 +
>  kernel/events/uprobes.c |   6 ++
>  kernel/trace/trace_uprobe.c | 172 
> +++-

I'm currently traveling, but I'll try to look at it in a week or two.

-- Steve

>  3 files changed, 178 insertions(+), 2 deletions(-)
> 
>
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[PATCH] Documentation/CodingStyle: Add an example for braces

2018-03-14 Thread Gary R Hook
Add another example of required braces when using a compound statement in
a loop.

Signed-off-by: Gary R Hook 
---
 Documentation/process/coding-style.rst |9 +
 1 file changed, 9 insertions(+)

diff --git a/Documentation/process/coding-style.rst 
b/Documentation/process/coding-style.rst
index a20b44a40ec4..d98deb62c400 100644
--- a/Documentation/process/coding-style.rst
+++ b/Documentation/process/coding-style.rst
@@ -200,6 +200,15 @@ statement; in the latter case use braces in both branches:
otherwise();
}
 
+Also, use braces when a loop contains more than a single simple statement:
+
+.. code-block:: c
+
+   while (condition) {
+   if (test)
+   do_something();
+   }
+
 3.1) Spaces
 ***
 

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[PATCH v4 0/6] Introduce GENI SE Controller Driver

2018-03-14 Thread Karthikeyan Ramasubramanian
Generic Interface (GENI) firmware based Qualcomm Universal Peripheral (QUP)
Wrapper is a next generation programmable module for supporting a wide
range of serial interfaces like UART, SPI, I2C, I3C, etc. A single QUP
module can provide upto 8 Serial Interfaces using its internal Serial
Engines (SE). The protocol supported by each interface is determined by
the firmware loaded to the Serial Engine.

This patch series introduces GENI SE Driver to manage the GENI based QUP
Wrapper and the common aspects of all SEs inside the QUP Wrapper. This
patch series also introduces the UART and I2C Controller drivers to
drive the SEs that are programmed with the respective protocols.

[v4]
 * Add SPI controller information in device tree binding
 * Add support for debug UART & I2C controllers in SDM845 device tree
 * Remove any unnecessary parenthesis & casting
 * Identify break character in UART line and pass it to the framework
 * Transmit data from fault handler reliably in debug UART
 * Map the register block when the UART port is requested
 * Move concise exported functions as macros or inlines in public header
 * Move the clock performance table from the wrapper to serial engines
 * Add a lock to synchronize between IRQ & error handling in I2C controller
 * Remove any compiler optimization hints like likely/unlikely
 * Update documentation to clarify tables and hardware blocks

[v3]
 * Update the driver dependencies
 * Use the SPDX License Expression
 * Squash all the controller device tree bindings together
 * Use kernel doc format for documentation
 * Add additional documentation for packing configuration
 * Use clk_bulk_* API for related clocks
 * Remove driver references to pinctrl and their states
 * Replace magic numbers with appropriate macros
 * Update memory barrier usage and associated comments
 * Reduce interlacing of register reads/writes
 * Fix poll_get_char() operation in console UART driver under polling mode
 * Address other comments from Bjorn Andersson to improve code readability

[v2]
 * Updated device tree bindings to describe the hardware
 * Updated SE DT node as child node of QUP Wrapper DT node
 * Moved common AHB clocks to QUP Wrapper DT node
 * Use the standard "clock-frequency" I2C property
 * Update compatible field in UART Controller to reflect hardware manual
 * Addressed other device tree binding specific comments from Rob Herring

Karthikeyan Ramasubramanian (5):
  dt-bindings: soc: qcom: Add device tree binding for GENI SE
  soc: qcom: Add GENI based QUP Wrapper driver
  i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C
controller
  tty: serial: msm_geni_serial: Add serial driver support for GENI based
QUP
  arm64: dts: sdm845: Add I2C controller support

Rajendra Nayak (1):
  arm64: dts: sdm845: Add serial console support

 .../devicetree/bindings/soc/qcom/qcom,geni-se.txt  |  123 +++
 arch/arm64/boot/dts/qcom/sdm845-mtp.dts|   58 +
 arch/arm64/boot/dts/qcom/sdm845.dtsi   |   67 ++
 drivers/i2c/busses/Kconfig |   13 +
 drivers/i2c/busses/Makefile|1 +
 drivers/i2c/busses/i2c-qcom-geni.c |  648 +++
 drivers/soc/qcom/Kconfig   |9 +
 drivers/soc/qcom/Makefile  |1 +
 drivers/soc/qcom/qcom-geni-se.c|  748 +
 drivers/tty/serial/Kconfig |   15 +
 drivers/tty/serial/Makefile|1 +
 drivers/tty/serial/qcom_geni_serial.c  | 1158 
 include/linux/qcom-geni-se.h   |  425 +++
 13 files changed, 3267 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
 create mode 100644 drivers/i2c/busses/i2c-qcom-geni.c
 create mode 100644 drivers/soc/qcom/qcom-geni-se.c
 create mode 100644 drivers/tty/serial/qcom_geni_serial.c
 create mode 100644 include/linux/qcom-geni-se.h

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[PATCH v4 5/6] arm64: dts: sdm845: Add serial console support

2018-03-14 Thread Karthikeyan Ramasubramanian
From: Rajendra Nayak 

Add the qup uart node and geni se instance needed to
support the serial console on the MTP.

Signed-off-by: Rajendra Nayak 
---
 arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 39 +
 arch/arm64/boot/dts/qcom/sdm845.dtsi| 38 
 2 files changed, 77 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts 
b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
index 979ab49..ea3efc5 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
@@ -12,4 +12,43 @@
 / {
model = "Qualcomm Technologies, Inc. SDM845 MTP";
compatible = "qcom,sdm845-mtp";
+
+   aliases {
+   serial0 = &uart2;
+   };
+
+   chosen {
+   stdout-path = "serial0";
+   };
+};
+
+&soc {
+   geniqup@ac {
+   serial@a84000 {
+   status = "okay";
+   };
+   };
+
+   pinctrl@340 {
+   qup-uart2-default {
+   pinconf_tx {
+   pins = "gpio4";
+   drive-strength = <2>;
+   bias-disable;
+   };
+
+   pinconf_rx {
+   pins = "gpio5";
+   drive-strength = <2>;
+   bias-pull-up;
+   };
+   };
+
+   qup-uart2-sleep {
+   pinconf {
+   pins = "gpio4", "gpio5";
+   bias-pull-down;
+   };
+   };
+   };
 };
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 32f8561..59334d9 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 
 / {
interrupt-parent = <&intc>;
@@ -194,6 +195,20 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+
+   qup_uart2_default: qup-uart2-default {
+   pinmux {
+   function = "qup9";
+   pins = "gpio4", "gpio5";
+   };
+   };
+
+   qup_uart2_sleep: qup-uart2-sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio4", "gpio5";
+   };
+   };
};
 
timer@17c9 {
@@ -272,5 +287,28 @@
#interrupt-cells = <4>;
cell-index = <0>;
};
+
+   geniqup@ac {
+   compatible = "qcom,geni-se-qup";
+   reg = <0xac 0x6000>;
+   clock-names = "m-ahb", "s-ahb";
+   clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
+<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   uart2: serial@a84000 {
+   compatible = "qcom,geni-debug-uart";
+   reg = <0xa84000 0x4000>;
+   clock-names = "se";
+   clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&qup_uart2_default>;
+   pinctrl-1 = <&qup_uart2_sleep>;
+   interrupts = ;
+   status = "disabled";
+   };
+   };
};
 };
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[PATCH v4 2/6] soc: qcom: Add GENI based QUP Wrapper driver

2018-03-14 Thread Karthikeyan Ramasubramanian
This driver manages the Generic Interface (GENI) firmware based Qualcomm
Universal Peripheral (QUP) Wrapper. GENI based QUP is the next generation
programmable module composed of multiple Serial Engines (SE) and supports
a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. This
driver also enables managing the serial interface independent aspects of
Serial Engines.

Signed-off-by: Karthikeyan Ramasubramanian 
Signed-off-by: Sagar Dharia 
Signed-off-by: Girish Mahadevan 
---
 drivers/soc/qcom/Kconfig|   9 +
 drivers/soc/qcom/Makefile   |   1 +
 drivers/soc/qcom/qcom-geni-se.c | 748 
 include/linux/qcom-geni-se.h| 425 +++
 4 files changed, 1183 insertions(+)
 create mode 100644 drivers/soc/qcom/qcom-geni-se.c
 create mode 100644 include/linux/qcom-geni-se.h

diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index e050eb8..98ca9f5 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -3,6 +3,15 @@
 #
 menu "Qualcomm SoC drivers"
 
+config QCOM_GENI_SE
+   tristate "QCOM GENI Serial Engine Driver"
+   depends on ARCH_QCOM || COMPILE_TEST
+   help
+ This driver is used to manage Generic Interface (GENI) firmware based
+ Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This
+ driver is also used to manage the common aspects of multiple Serial
+ Engines present in the QUP.
+
 config QCOM_GLINK_SSR
tristate "Qualcomm Glink SSR driver"
depends on RPMSG
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index dcebf28..959aa74 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_QCOM_GENI_SE) +=  qcom-geni-se.o
 obj-$(CONFIG_QCOM_GLINK_SSR) +=glink_ssr.o
 obj-$(CONFIG_QCOM_GSBI)+=  qcom_gsbi.o
 obj-$(CONFIG_QCOM_MDT_LOADER)  += mdt_loader.o
diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c
new file mode 100644
index 000..feed3db2
--- /dev/null
+++ b/drivers/soc/qcom/qcom-geni-se.c
@@ -0,0 +1,748 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * DOC: Overview
+ *
+ * Generic Interface (GENI) Serial Engine (SE) Wrapper driver is introduced
+ * to manage GENI firmware based Qualcomm Universal Peripheral (QUP) Wrapper
+ * controller. QUP Wrapper is designed to support various serial bus protocols
+ * like UART, SPI, I2C, I3C, etc.
+ */
+
+/**
+ * DOC: Hardware description
+ *
+ * GENI based QUP is a highly-flexible and programmable module for supporting
+ * a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single
+ * QUP module can provide upto 8 serial interfaces, using its internal
+ * serial engines. The actual configuration is determined by the target
+ * platform configuration. The protocol supported by each interface is
+ * determined by the firmware loaded to the serial engine. Each SE consists
+ * of a DMA Engine and GENI sub modules which enable serial engines to
+ * support FIFO and DMA modes of operation.
+ *
+ *
+ *  +-+
+ *  |QUP Wrapper  |
+ *  | ++  |
+ *   --QUP & SE Clocks--> | Serial Engine N|  +-IO-->
+ *  | | ...|  | Interface
+ *   <---Clock Perf.+++---+|  |
+ * State Interface  || Serial Engine 1||  |
+ *  ||||  |
+ *  ||||  |
+ *   |||  |
+ *  ||++  |
+ *  |||   |
+ *  |||   |
+ *   <--SE IRQ--+++   |
+ *  | |
+ *  +-+
+ *
+ * Figure 1: GENI based QUP Wrapper
+ *
+ * The GENI submodules include primary and secondary sequencers which are
+ * used to drive TX & RX operations. On serial interfaces that operate using
+ * master-slave model, primary sequencer drives both TX & RX operations. On
+ * serial interfaces that operate using peer-to-peer model, primary sequencer
+ * drives TX operation and secondary sequencer drives RX operation.
+ */
+
+/**
+ * DOC: Software description
+ *
+ * GENI SE Wrapper driver is structured into 2 parts:
+ *
+ * geni_wrap

[PATCH v4 1/6] dt-bindings: soc: qcom: Add device tree binding for GENI SE

2018-03-14 Thread Karthikeyan Ramasubramanian
Add device tree binding support for the QCOM GENI SE driver.

Signed-off-by: Karthikeyan Ramasubramanian 
Signed-off-by: Sagar Dharia 
Signed-off-by: Girish Mahadevan 
---
 .../devicetree/bindings/soc/qcom/qcom,geni-se.txt  | 123 +
 1 file changed, 123 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
new file mode 100644
index 000..b71b5df
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
@@ -0,0 +1,123 @@
+Qualcomm Technologies, Inc. GENI Serial Engine QUP Wrapper Controller
+
+Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
+is a programmable module for supporting a wide range of serial interfaces
+like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
+Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
+Wrapper controller is modeled as a node with zero or more child nodes each
+representing a serial engine.
+
+Required properties:
+- compatible:  Must be "qcom,geni-se-qup".
+- reg: Must contain QUP register address and length.
+- clock-names: Must contain "m-ahb" and "s-ahb".
+- clocks:  AHB clocks needed by the device.
+
+Required properties if child node exists:
+- #address-cells:  Must be <1> for Serial Engine Address
+- #size-cells: Must be <1> for Serial Engine Address Size
+- ranges:  Must be present
+
+Properties for children:
+
+A GENI based QUP wrapper controller node can contain 0 or more child nodes
+representing serial devices.  These serial devices can be a QCOM UART, I2C
+controller, SPI controller, or some combination of aforementioned devices.
+Please refer below the child node definitions for the supported serial
+interface protocols.
+
+Qualcomm Technologies Inc. GENI Serial Engine based I2C Controller
+
+Required properties:
+- compatible:  Must be "qcom,geni-i2c".
+- reg: Must contain QUP register address and length.
+- interrupts:  Must contain I2C interrupt.
+- clock-names: Must contain "se".
+- clocks:  Serial engine core clock needed by the device.
+- #address-cells:  Must be <1> for I2C device address.
+- #size-cells: Must be <0> as I2C addresses have no size component.
+
+Optional property:
+- clock-frequency: Desired I2C bus clock frequency in Hz.
+   When missing default to 40Hz.
+
+Child nodes should conform to I2C bus binding as described in i2c.txt.
+
+Qualcomm Technologies Inc. GENI Serial Engine based UART Controller
+
+Required properties:
+- compatible:  Must be "qcom,geni-debug-uart".
+- reg: Must contain UART register location and length.
+- interrupts:  Must contain UART core interrupts.
+- clock-names: Must contain "se".
+- clocks:  Serial engine core clock needed by the device.
+
+Qualcomm Technologies Inc. GENI Serial Engine based SPI Controller
+
+Required properties:
+- compatible:  Must contain "qcom,geni-spi".
+- reg: Must contain SPI register location and length.
+- interrupts:  Must contain SPI controller interrupts.
+- clock-names: Must contain "se".
+- clocks:  Serial engine core clock needed by the device.
+- spi-max-frequency:   Specifies maximum SPI clock frequency, units - Hz.
+- #address-cells:  Must be <1> to define a chip select address on
+   the SPI bus.
+- #size-cells: Must be <0>.
+
+Optional property:
+- qcom,rt: Indicates if the framework worker thread for this
+   controller device should have real-time priority.
+
+SPI slave nodes must be children of the SPI master node and conform to SPI bus
+binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.
+
+Example:
+   geniqup@8c {
+   compatible = "qcom,geni-se-qup";
+   reg = <0x8c 0x6000>;
+   clock-names = "m-ahb", "s-ahb";
+   clocks = <&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+   <&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   i2c0: i2c@a94000 {
+   compatible = "qcom,geni-i2c";
+   reg = <0xa94000 0x4000>;
+   interrupts = ;
+   clock-names = "se";
+   clocks = <&clock_gcc GCC_QUPV3_WRAP0_S5_CLK>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&qup_1_i2c_5_active>;
+   pinctrl-1 = <&qup_1_i2c_5_sleep>;
+   #address-cells = <1>;
+

[PATCH v4 6/6] arm64: dts: sdm845: Add I2C controller support

2018-03-14 Thread Karthikeyan Ramasubramanian
Add I2C master controller support for a built-in test I2C slave.

Signed-off-by: Karthikeyan Ramasubramanian 
---
 arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 19 +++
 arch/arm64/boot/dts/qcom/sdm845.dtsi| 29 +
 2 files changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts 
b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
index ea3efc5..69445f1 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
@@ -27,6 +27,10 @@
serial@a84000 {
status = "okay";
};
+
+   i2c@a88000 {
+   status = "okay";
+   };
};
 
pinctrl@340 {
@@ -50,5 +54,20 @@
bias-pull-down;
};
};
+
+   qup-i2c10-default {
+   pinconf {
+   pins = "gpio55", "gpio56";
+   drive-strength = <2>;
+   bias-disable;
+   };
+   };
+
+   qup-i2c10-sleep {
+   pinconf {
+   pins = "gpio55", "gpio56";
+   bias-pull-up;
+   };
+   };
};
 };
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 59334d9..9ef056f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -209,6 +209,21 @@
pins = "gpio4", "gpio5";
};
};
+
+   qup_i2c10_default: qup-i2c10-default {
+   pinmux {
+   function = "qup10";
+   pins = "gpio55", "gpio56";
+   };
+   };
+
+   qup_i2c10_sleep: qup-i2c10-sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio55", "gpio56";
+   };
+   };
+
};
 
timer@17c9 {
@@ -309,6 +324,20 @@
interrupts = ;
status = "disabled";
};
+
+   i2c10: i2c@a88000 {
+   compatible = "qcom,geni-i2c";
+   reg = <0xa88000 0x4000>;
+   clock-names = "se";
+   clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&qup_i2c10_default>;
+   pinctrl-1 = <&qup_i2c10_sleep>;
+   interrupts = ;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
};
};
 };
-- 
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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[PATCH v4 4/6] tty: serial: msm_geni_serial: Add serial driver support for GENI based QUP

2018-03-14 Thread Karthikeyan Ramasubramanian
This driver supports GENI based UART Controller in the Qualcomm SOCs. The
Qualcomm Generic Interface (GENI) is a programmable module supporting a
wide range of serial interfaces including UART. This driver support console
operations using FIFO mode of transfer.

Signed-off-by: Girish Mahadevan 
Signed-off-by: Karthikeyan Ramasubramanian 
Signed-off-by: Sagar Dharia 
Signed-off-by: Doug Anderson 
---
 drivers/tty/serial/Kconfig|   15 +
 drivers/tty/serial/Makefile   |1 +
 drivers/tty/serial/qcom_geni_serial.c | 1158 +
 3 files changed, 1174 insertions(+)
 create mode 100644 drivers/tty/serial/qcom_geni_serial.c

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 3682fd3..d132971 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1104,6 +1104,21 @@ config SERIAL_MSM_CONSOLE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
 
+config SERIAL_QCOM_GENI
+   tristate "QCOM on-chip GENI based serial port support"
+   depends on ARCH_QCOM || COMPILE_TEST
+   depends on QCOM_GENI_SE
+   select SERIAL_CORE
+
+config SERIAL_QCOM_GENI_CONSOLE
+   bool "QCOM GENI Serial Console support"
+   depends on SERIAL_QCOM_GENI=y
+   select SERIAL_CORE_CONSOLE
+   select SERIAL_EARLYCON
+   help
+ Serial console driver for Qualcomm Technologies Inc's GENI based
+ QUP hardware.
+
 config SERIAL_VT8500
bool "VIA VT8500 on-chip serial port support"
depends on ARCH_VT8500
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 842d185..64a8d82 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -63,6 +63,7 @@ obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
 obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
 obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
 obj-$(CONFIG_SERIAL_MSM) += msm_serial.o
+obj-$(CONFIG_SERIAL_QCOM_GENI) += qcom_geni_serial.o
 obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
 obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
 obj-$(CONFIG_SERIAL_OMAP) += omap-serial.o
diff --git a/drivers/tty/serial/qcom_geni_serial.c 
b/drivers/tty/serial/qcom_geni_serial.c
new file mode 100644
index 000..1442777
--- /dev/null
+++ b/drivers/tty/serial/qcom_geni_serial.c
@@ -0,0 +1,1158 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* UART specific GENI registers */
+#define SE_UART_TX_TRANS_CFG   0x25c
+#define SE_UART_TX_WORD_LEN0x268
+#define SE_UART_TX_STOP_BIT_LEN0x26c
+#define SE_UART_TX_TRANS_LEN   0x270
+#define SE_UART_RX_TRANS_CFG   0x280
+#define SE_UART_RX_WORD_LEN0x28c
+#define SE_UART_RX_STALE_CNT   0x294
+#define SE_UART_TX_PARITY_CFG  0x2a4
+#define SE_UART_RX_PARITY_CFG  0x2a8
+
+/* SE_UART_TRANS_CFG */
+#define UART_TX_PAR_EN BIT(0)
+#define UART_CTS_MASK  BIT(1)
+
+/* SE_UART_TX_WORD_LEN */
+#define TX_WORD_LEN_MSKGENMASK(9, 0)
+
+/* SE_UART_TX_STOP_BIT_LEN */
+#define TX_STOP_BIT_LEN_MSKGENMASK(23, 0)
+#define TX_STOP_BIT_LEN_1  0
+#define TX_STOP_BIT_LEN_1_51
+#define TX_STOP_BIT_LEN_2  2
+
+/* SE_UART_TX_TRANS_LEN */
+#define TX_TRANS_LEN_MSK   GENMASK(23, 0)
+
+/* SE_UART_RX_TRANS_CFG */
+#define UART_RX_INS_STATUS_BIT BIT(2)
+#define UART_RX_PAR_EN BIT(3)
+
+/* SE_UART_RX_WORD_LEN */
+#define RX_WORD_LEN_MASK   GENMASK(9, 0)
+
+/* SE_UART_RX_STALE_CNT */
+#define RX_STALE_CNT   GENMASK(23, 0)
+
+/* SE_UART_TX_PARITY_CFG/RX_PARITY_CFG */
+#define PAR_CALC_ENBIT(0)
+#define PAR_MODE_MSK   GENMASK(2, 1)
+#define PAR_MODE_SHFT  1
+#define PAR_EVEN   0x00
+#define PAR_ODD0x01
+#define PAR_SPACE  0x10
+#define PAR_MARK   0x11
+
+/* UART M_CMD OP codes */
+#define UART_START_TX  0x1
+#define UART_START_BREAK   0x4
+#define UART_STOP_BREAK0x5
+/* UART S_CMD OP codes */
+#define UART_START_READ0x1
+#define UART_PARAM 0x1
+
+#define UART_OVERSAMPLING  32
+#define STALE_TIMEOUT  16
+#define DEFAULT_BITS_PER_CHAR  10
+#define GENI_UART_CONS_PORTS   1
+#define DEF_FIFO_DEPTH_WORDS   16
+#define DEF_TX_WM  2
+#define DEF_FIFO_WIDTH_BITS32
+#define UART_CONSOLE_RX_WM 2
+
+#ifdef CONFIG_CONSOLE_POLL
+#define RX_BYTES_PW 1
+#else
+#define RX_BYTES_PW 4
+#endif
+
+struct qcom_geni_serial_port {
+   struct uart_port uport;
+   struct geni_se se;
+   char name[20];
+   u32 tx_fifo_depth;
+   u32 tx_fifo_width;
+   u32 rx_fifo_depth;
+   u32 tx_wm;
+   u32 rx_wm;
+   u32 rx_rfr;
+   enum geni_se_xfer_mode xfer_mode;
+

[PATCH v4 3/6] i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C controller

2018-03-14 Thread Karthikeyan Ramasubramanian
This bus driver supports the GENI based i2c hardware controller in the
Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable
module supporting a wide range of serial interfaces including I2C. The
driver supports FIFO mode and DMA mode of transfer and switches modes
dynamically depending on the size of the transfer.

Signed-off-by: Karthikeyan Ramasubramanian 
Signed-off-by: Sagar Dharia 
Signed-off-by: Girish Mahadevan 
---
 drivers/i2c/busses/Kconfig |  13 +
 drivers/i2c/busses/Makefile|   1 +
 drivers/i2c/busses/i2c-qcom-geni.c | 648 +
 3 files changed, 662 insertions(+)
 create mode 100644 drivers/i2c/busses/i2c-qcom-geni.c

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index e2954fb..89e642a 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -848,6 +848,19 @@ config I2C_PXA_SLAVE
  is necessary for systems where the PXA may be a target on the
  I2C bus.
 
+config I2C_QCOM_GENI
+   tristate "Qualcomm Technologies Inc.'s GENI based I2C controller"
+   depends on ARCH_QCOM || COMPILE_TEST
+   depends on QCOM_GENI_SE
+   help
+ This driver supports GENI serial engine based I2C controller in
+ master mode on the Qualcomm Technologies Inc.'s SoCs. If you say
+ yes to this option, support will be included for the built-in I2C
+ interface on the Qualcomm Technologies Inc.'s SoCs.
+
+ This driver can also be built as a module.  If so, the module
+ will be called i2c-qcom-geni.
+
 config I2C_QUP
tristate "Qualcomm QUP based I2C controller"
depends on ARCH_QCOM
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 2ce8576..201fce1 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -84,6 +84,7 @@ obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
 obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
 obj-$(CONFIG_I2C_PXA)  += i2c-pxa.o
 obj-$(CONFIG_I2C_PXA_PCI)  += i2c-pxa-pci.o
+obj-$(CONFIG_I2C_QCOM_GENI)+= i2c-qcom-geni.o
 obj-$(CONFIG_I2C_QUP)  += i2c-qup.o
 obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
 obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o
diff --git a/drivers/i2c/busses/i2c-qcom-geni.c 
b/drivers/i2c/busses/i2c-qcom-geni.c
new file mode 100644
index 000..4926efb
--- /dev/null
+++ b/drivers/i2c/busses/i2c-qcom-geni.c
@@ -0,0 +1,648 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SE_I2C_TX_TRANS_LEN0x26c
+#define SE_I2C_RX_TRANS_LEN0x270
+#define SE_I2C_SCL_COUNTERS0x278
+
+#define SE_I2C_ERR  (M_CMD_OVERRUN_EN | M_ILLEGAL_CMD_EN | M_CMD_FAILURE_EN |\
+   M_GP_IRQ_1_EN | M_GP_IRQ_3_EN | M_GP_IRQ_4_EN)
+#define SE_I2C_ABORT   BIT(1)
+
+/* M_CMD OP codes for I2C */
+#define I2C_WRITE  0x1
+#define I2C_READ   0x2
+#define I2C_WRITE_READ 0x3
+#define I2C_ADDR_ONLY  0x4
+#define I2C_BUS_CLEAR  0x6
+#define I2C_STOP_ON_BUS0x7
+/* M_CMD params for I2C */
+#define PRE_CMD_DELAY  BIT(0)
+#define TIMESTAMP_BEFORE   BIT(1)
+#define STOP_STRETCH   BIT(2)
+#define TIMESTAMP_AFTERBIT(3)
+#define POST_COMMAND_DELAY BIT(4)
+#define IGNORE_ADD_NACKBIT(6)
+#define READ_FINISHED_WITH_ACK BIT(7)
+#define BYPASS_ADDR_PHASE  BIT(8)
+#define SLV_ADDR_MSK   GENMASK(15, 9)
+#define SLV_ADDR_SHFT  9
+/* I2C SCL COUNTER fields */
+#define HIGH_COUNTER_MSK   GENMASK(29, 20)
+#define HIGH_COUNTER_SHFT  20
+#define LOW_COUNTER_MSKGENMASK(19, 10)
+#define LOW_COUNTER_SHFT   10
+#define CYCLE_COUNTER_MSK  GENMASK(9, 0)
+
+enum geni_i2c_err_code {
+   GP_IRQ0,
+   NACK,
+   GP_IRQ2,
+   BUS_PROTO,
+   ARB_LOST,
+   GP_IRQ5,
+   GENI_OVERRUN,
+   GENI_ILLEGAL_CMD,
+   GENI_ABORT_DONE,
+   GENI_TIMEOUT,
+};
+
+#define DM_I2C_CB_ERR  ((BIT(NACK) | BIT(BUS_PROTO) | BIT(ARB_LOST)) \
+   << 5)
+
+#define I2C_AUTO_SUSPEND_DELAY 250
+#define KHZ(freq)  (1000 * freq)
+#define PACKING_BYTES_PW   4
+
+#define ABORT_TIMEOUT  HZ
+#define XFER_TIMEOUT   HZ
+#define RST_TIMEOUTHZ
+
+struct geni_i2c_dev {
+   struct geni_se se;
+   u32 tx_wm;
+   int irq;
+   int err;
+   struct i2c_adapter adap;
+   struct completion done;
+   struct i2c_msg *cur;
+   int cur_wr;
+   int cur_rd;
+   spinlock_t lock;
+   u32 clk_freq_out;
+   const struct geni_i2c_clk_fld *clk_fld;
+};
+
+struct geni_i2c_err_log {
+   int err;
+   const c

Re: [PATCH v4] cpuset: Enable cpuset controller in default hierarchy

2018-03-14 Thread Mike Galbraith
On Wed, 2018-03-14 at 12:57 -0700, Tejun Heo wrote:
> Hello,
> 
> On Sat, Mar 10, 2018 at 04:47:28AM +0100, Mike Galbraith wrote:
> > Some form of cpu_exclusive (preferably exactly that, but something else
> > could replace it) is needed to define sets that must not overlap any
> > other set at creation time or any time thereafter.  A set with property
> > 'exclusive' is the enabler for fundamentally exclusive (but dynamic!)
> > set properties such as 'isolated' (etc etc).
> 
> I'm not sure cpu_exclusive makes sense.  A controller knob can either
> belong to the parent or the cgroup itself and cpu_exclusive doesn't
> make sense in either case.
> 
> 1. cpu_exclusive is owned by the parent as other usual resource
>control knobs.  IOW, it's not delegatable.
> 
>This is weird because it's asking the kernel to protect against its
>own misconfiguration and there's nothing preventing cpu_exclusive
>itself being cleared by the same entitya.
> 
> 2. cpu_exclusive is owned by the cgroup itself like memory.oom_group.
>IOW, it's delegatable.
> 
>This allows a cgroup to affect what its siblings can or cannot do,
>which is broken.  Semantically, it doesn't make much sense either.
> 
> I don't think it's a good idea to add a kernel mechanism to prevent
> misconfiguration from a single entity.

Under the hood v2 details are entirely up to you.  My input ends at
please don't leave dynamic partitioning standing at the dock when v2
sails.

-Mike
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Re: [PATCH 00/47] arch-removal: device drivers

2018-03-14 Thread Boris Brezillon
Hi Arnd,

On Wed, 14 Mar 2018 16:35:13 +0100
Arnd Bergmann  wrote:

> Hi driver maintainers,
> 
> I just posted one series with the removal of eight architectures,
> see https://lkml.org/lkml/2018/3/14/505 for details, or
> https://lwn.net/Articles/748074/ for more background.
> 
> These are the device drivers that go along with them. I have already
> picked up the drivers for arch/metag/ into my tree, they were reviewed
> earlier.
> 
> Please let me know if you have any concerns with the patch, or if you
> prefer to pick up the patches in your respective trees.  I created
> the patches with 'git format-patch -D', so they will not apply without
> manually removing those files.
> 
> For anything else, I'd keep the removal patches in my asm-generic tree
> and will send a pull request for 4.17 along with the actual arch removal.
> 
>Arnd
> 
> Arnd Bergmann
>   edac: remove tile driver
>   net: tile: remove ethernet drivers
>   net: adi: remove blackfin ethernet drivers
>   net: 8390: remove m32r specific bits
>   net: remove cris etrax ethernet driver
>   net: smsc: remove m32r specific smc91x configuration
>   raid: remove tile specific raid6 implementation
>   rtc: remove tile driver
>   rtc: remove bfin driver
>   char: remove obsolete ds1302 rtc driver
>   char: remove tile-srom.c
>   char: remove blackfin OTP driver
>   pcmcia: remove m32r drivers
>   pcmcia: remove blackfin driver
>   ASoC: remove blackfin drivers
>   video/logo: remove obsolete logo files
>   fbdev: remove blackfin drivers
>   fbdev: s1d13xxxfb: remove m32r specific hacks
>   crypto: remove blackfin CRC driver
>   media: platform: remove blackfin capture driver
>   media: platform: remove m32r specific arv driver
>   cpufreq: remove blackfin driver
>   cpufreq: remove cris specific drivers
>   gpio: remove etraxfs driver
>   pinctrl: remove adi2/blackfin drivers
>   ata: remove bf54x driver
>   input: keyboard: remove bf54x driver
>   input: misc: remove blackfin rotary driver
>   mmc: remove bfin_sdh driver
>   can: remove bfin_can driver
>   watchdog: remove bfin_wdt driver
>   mtd: maps: remove bfin-async-flash driver
>   mtd: nand: remove bf5xx_nand driver

If you don't mind, I'd like to take the mtd patches through the MTD
tree. As you've probably noticed, nand code has been moved around and
it's easier for me to carry those 2 simple changes in my tree than
creating an immutable branch.

Let me know if this is a problem.

Regards,

Boris

-- 
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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