Re: [PATCH 1/2] vmalloc: use ZERO_SIZE_PTR / ZERO_OR_NULL_PTR
On Wed, Feb 29, 2012 at 8:53 AM, Dmitry Antipov wrote: > On 02/28/2012 05:30 PM, Dan Carpenter wrote: > >> Could you include that in the changelog when the final version is >> ready? > > > What changelog you're saying about? Dmitry, he means your commit log message. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 1/2] ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp
On Wed, Feb 29, 2012 at 12:48 PM, Richard Zhao wrote: > If CONFIG_SMP, cpufreq skips loops_per_jiffy update, because different > arch has different per-cpu loops_per_jiffy definition. > > Signed-off-by: Richard Zhao > Acked-by: Russell King > --- Acked-by: Santosh Shilimkar ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 2/2] cpufreq: OMAP: remove loops_per_jiffy recalculate for smp
On Wed, Feb 29, 2012 at 12:48 PM, Richard Zhao wrote: > arm registered cpufreq transition notifier to recalculate it. > > Signed-off-by: Richard Zhao > --- Thanks for the OMAP updates Acked-by: Santosh Shilimkar ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
Hi Tushar,
On 12/01/2011 06:50 AM, Tushar Behera wrote:
> The framebuffer driver needs the clock named 'lcd' as its bus
> clock but the equivalent clock on Exynos4 is named as 'fimd'.
> Hence, create a clkdev lookup entry with the name 'lcd' that
> references the 'fimd' clock.
>
> Signed-off-by: Tushar Behera
Reviewed-by: Sylwester Nawrocki
> ---
> arch/arm/mach-exynos/clock.c | 14 +-
> 1 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
> index 5d8d483..607ec28 100644
> --- a/arch/arm/mach-exynos/clock.c
> +++ b/arch/arm/mach-exynos/clock.c
> @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
> .enable = exynos4_clk_ip_cam_ctrl,
> .ctrlbit= (1 << 3),
> }, {
> - .name = "fimd",
> - .devname= "exynos4-fb.0",
> - .enable = exynos4_clk_ip_lcd0_ctrl,
> - .ctrlbit= (1 << 0),
> - }, {
> .name = "hsmmc",
> .devname= "s3c-sdhci.0",
> .parent = &clk_aclk_133.clk,
> @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
> .ctrlbit= (1 << 1),
> };
>
> +static struct clk clk_fimd0 = {
> + .name = "fimd",
> + .devname= "exynos4-fb.0",
> + .enable = exynos4_clk_ip_lcd0_ctrl,
> + .ctrlbit= (1 << 0),
> +};
> +
> struct clk *clkset_group_list[] = {
> [0] = &clk_ext_xtal_mux,
> [1] = &clk_xusbxti,
> @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
> static struct clk *clk_cdev[] = {
> &clk_pdma0,
> &clk_pdma1,
> + &clk_fimd0,
> };
>
> static struct clksrc_clk *clksrc_cdev[] = {
> @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
> CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
> CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
> CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
> + CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
> };
>
> static int xtal_rate;
Thanks,
--
Sylwester Nawrocki
Samsung Poland R&D Center
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Re: [PATCH-WIP 01/13] xen/arm: use r12 to pass the hypercall number to the hypervisor
On Tue, Feb 28, 2012 at 12:28:29PM +, Stefano Stabellini wrote: > On Tue, 28 Feb 2012, Ian Campbell wrote: > > On Tue, 2012-02-28 at 10:20 +, Dave Martin wrote: > > > On Mon, Feb 27, 2012 at 07:33:39PM +, Ian Campbell wrote: > > > > On Mon, 2012-02-27 at 18:03 +, Dave Martin wrote: > > > > > > Since we support only ARMv7+ there are "T2" and "T3" encodings > > > > > > available > > > > > > which do allow direct mov of an immediate into R12, but are 32 bit > > > > > > Thumb > > > > > > instructions. > > > > > > > > > > > > Should we use r7 instead to maximise instruction density for Thumb > > > > > > code? > > > > > > > > > > The difference seems trivial when put into context, even if you code a > > > > > special Thumb version of the code to maximise density (the Thumb-2 > > > > > code > > > > > which gets built from assembler in the kernel is very suboptimal in > > > > > size, but there simply isn't a high proportion of asm code in the > > > > > kernel > > > > > anyway.) I wouldn't consider the ARM/Thumb differences as an > > > > > important > > > > > factor when deciding on a register. > > > > > > > > OK, that's useful information. thanks. > > > > > > > > > One argument for _not_ using r12 for this purpose is that it is then > > > > > harder to put a generic "HVC" function (analogous to the "syscall" > > > > > syscall) out-of-line, since r12 could get destroyed by the call. > > > > > > > > For an out of line syscall(2) wouldn't the syscall number either be in a > > > > standard C calling convention argument register or on the stack when the > > > > function was called, since it is just a normal argument at that point? > > > > As you point out it cannot be passed in r12 (and could never be, due to > > > > the clobbering). > > > > > > > > The syscall function itself would have to move the arguments and syscall > > > > nr etc around before issuing the syscall. > > > > > > > > I think the same is true of a similar hypercall(2) > > > > > > > > > If you don't think you will ever care about putting HVC out of line > > > > > though, it may not matter. > > > > > > If you have both inline and out-of-line hypercalls, it's hard to ensure > > > that you never have to shuffle the registers in either case. > > > > Agreed. > > > > I think we want to optimise for the inline case since those are the > > majority. > > They are not just the majority, all of them are static inline at the > moment, even on x86 (where the number of hypercalls is much higher). > > So yes, we should optimize for the inline case. > > > > The only non-inline case is the special "privcmd ioctl" which is the > > mechanism that allows the Xen toolstack to make hypercalls. It's > > somewhat akin to syscall(2). By the time you get to it you will already > > have done a system call for the ioctl, pulled the arguments from the > > ioctl argument structure etc, plus such hypercalls are not really > > performance critical. > > Even the privcmd hypercall (privcmd_call) is a static inline function, > it is just that at the moment there is only one caller :) > > > > > Shuffling can be reduced but only at the expense of strange argument > > > ordering in some cases when calling from C -- the complexity is probably > > > not worth it. Linux doesn't bother for its own syscalls. > > > > > > Note that even in assembler, a branch from one section to a label in > > > another section may cause r12 to get destroyed, so you will need to be > > > careful about how you code the hypervisor trap handler. However, this > > > is not different from coding exception handlers in general, so I don't > > > know that it constitutes a conclusive argument on its own. > > > > We are happy to arrange that this doesn't occur on our trap entry paths, > > at least until the guest register state has been saved. Currently the > > hypercall dispatcher is in C and gets r12 from the on-stack saved state. > > We will likely eventually optimise the hypercall path directly in ASM > > and in that case we are happy to take steps to ensure we don't clobber > > r12 before we need it. > > Yes, I don't think this should be an issue. Fair enough. > > > My instinctive preference would therefore be for r7 (which also seems to > > > be good enough for Linux syscalls) -- but it really depends how many > > > arguments you expect to need to support. > > > > Apparently r7 is the frame pointer for gcc in thumb mode which I think > > is a good reason to avoid it. > > > > We currently have some 5 argument hypercalls and there have been > > occasional suggestions for interfaces which use 6 -- although none of > > them have come to reality. > > I don't have a very strong opinion on which register we should use, but > I would like to avoid r7 if it is already actively used by gcc. But there is no framepointer for Thumb-2 code (?) > The fact that r12 can be destroyed so easily is actually a good argument > for using it because it means it is less likely to contain
Re: [PATCH-WIP 01/13] xen/arm: use r12 to pass the hypercall number to the hypervisor
On Wed, Feb 29, 2012 at 09:56:02AM +, Ian Campbell wrote:
> On Wed, 2012-02-29 at 09:34 +, Dave Martin wrote:
> > On Tue, Feb 28, 2012 at 12:28:29PM +, Stefano Stabellini wrote:
>
> > > I don't have a very strong opinion on which register we should use, but
> > > I would like to avoid r7 if it is already actively used by gcc.
> >
> > But there is no framepointer for Thumb-2 code (?)
>
> Peter Maydell suggested there was:
> > r7 is (used by gcc as) the Thumb frame pointer; I don't know if this
> > makes it worth avoiding in this context.
>
> Sounds like it might be a gcc-ism, possibly a non-default option?
I seem to remember discussions about some cruft in gcc related to this.
gcc actually barfs at you if you try to allocate r7 to inline asm
without -fomit-frame-pointer. That use for r7 really relates to the
legacy ABI, so this may be a bug.
> Anyway, I think r12 will be fine for our purposes so the point is rather
> moot.
Yes, it sounds like it. If that r7 issue is a gcc bug, this would avoid
it.
If you leave the job of putting the right constant into r12 up to gcc,
it should generate reasonable for you without having to code it
explicitly anyway:
register int hvc_num asm("r12") = 0xDEADBEEF;
asm volatile (
"hvc0"
:: "r" (hvc_num)
)
Cheers
---Dave
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[PATCH 2/2] USB: ehci-s5p: add function for burst
Add platform specific function for EHCI burst function Signed-off-by: Sangwook Lee --- drivers/usb/host/ehci-s5p.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c index 293f741..c5eb0ce 100644 --- a/drivers/usb/host/ehci-s5p.c +++ b/drivers/usb/host/ehci-s5p.c @@ -134,6 +134,9 @@ static int __devinit s5p_ehci_probe(struct platform_device *pdev) /* cache this readonly data; minimize chip reads */ ehci->hcs_params = readl(&ehci->caps->hcs_params); + if (pdata->burst_enable) + pdata->burst_enable(pdev, hcd->regs); + ehci_reset(ehci); err = usb_add_hcd(hcd, irq, IRQF_SHARED); -- 1.7.4.1 ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH 0/2] add ehci-s5p AHB burst function
Enable burst transfer from AHB for EHCI. This fixes data transfer issue of USB Ethernet with EHCI. Without this patch, ping works and network utilities such as scp hardly works. It was tested on Origen board with the following configs. root@linaro-alip:~# lsusb -t /: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M /: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=s5p-ehci/3p, 480M |__ Port 1: Dev 2, If 0, Class=vend., Driver=MOSCHIP usb-ethernet driver, 480M Sangwook Lee (2): ARM: EXYNOS: Add EHCI AHB burst function USB: ehci-s5p: add function for burst arch/arm/mach-exynos/setup-usb-phy.c |6 ++ arch/arm/plat-samsung/devs.c |2 ++ arch/arm/plat-samsung/include/plat/ehci.h | 19 +++ drivers/usb/host/ehci-s5p.c |3 +++ 4 files changed, 30 insertions(+), 0 deletions(-) -- 1.7.4.1 ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
Enable burst transfer from AHB for EHCI.
This fixes data transfer of USB Ethernet with EHCI.
Without this patch, scp hardly works.
Signed-off-by: Sangwook Lee
---
arch/arm/mach-exynos/setup-usb-phy.c |6 ++
arch/arm/plat-samsung/devs.c |2 ++
arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
b/arch/arm/mach-exynos/setup-usb-phy.c
index 41743d2..5a20460 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
static atomic_t host_usage;
@@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int type)
return -EINVAL;
}
+
+void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem *base)
+{
+ writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
+}
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index f10768e..8fd1bd3 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1402,6 +1402,8 @@ void __init s5p_ehci_set_platdata(struct
s5p_ehci_platdata *pd)
npd->phy_init = s5p_usb_phy_init;
if (!npd->phy_exit)
npd->phy_exit = s5p_usb_phy_exit;
+ if (!npd->burst_enable)
+ npd->burst_enable = s5p_ehci_burst_enable;
}
#endif /* CONFIG_S5P_DEV_USB_EHCI */
diff --git a/arch/arm/plat-samsung/include/plat/ehci.h
b/arch/arm/plat-samsung/include/plat/ehci.h
index 5f28cae..9c866b7 100644
--- a/arch/arm/plat-samsung/include/plat/ehci.h
+++ b/arch/arm/plat-samsung/include/plat/ehci.h
@@ -14,8 +14,27 @@
struct s5p_ehci_platdata {
int (*phy_init)(struct platform_device *pdev, int type);
int (*phy_exit)(struct platform_device *pdev, int type);
+ void (*burst_enable)(struct platform_device *pdev, void __iomem *base);
};
extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
+extern void s5p_ehci_burst_enable(struct platform_device *pdev,
+ void __iomem *base);
+
+/* EHCI EXYNOS specific register */
+#define EHCI_INSNREG00 0x90
+
+/*
+ * EHCI INSNREG00 Specific fields
+ * Enable AHB master to use burst transfer from 4 to 16
+ */
+#define EHCI_INSNREG00_ENABLE_INCR16 (1 << 25)
+#define EHCI_INSNREG00_ENABLE_INCR8(1 << 24)
+#define EHCI_INSNREG00_ENABLE_INCR4(1 << 23)
+/* Force AHB master to start burst transfer only for 4,8,16 alignment */
+#define EHCI_INSNREG00_ENABLE_INCRX_ALIGN (1 << 22)
+#define EHCI_INSNREG00_ENABLE_BURST\
+ (EHCI_INSNREG00_ENABLE_INCR16 | EHCI_INSNREG00_ENABLE_INCR8 | \
+ EHCI_INSNREG00_ENABLE_INCR4 | EHCI_INSNREG00_ENABLE_INCRX_ALIGN)
#endif /* __PLAT_SAMSUNG_EHCI_H */
--
1.7.4.1
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Re: [PATCH-WIP 01/13] xen/arm: use r12 to pass the hypercall number to the hypervisor
On Wed, Feb 29, 2012 at 09:56:02AM +, Ian Campbell wrote: > On Wed, 2012-02-29 at 09:34 +, Dave Martin wrote: > > On Tue, Feb 28, 2012 at 12:28:29PM +, Stefano Stabellini wrote: > > > > I don't have a very strong opinion on which register we should use, but > > > I would like to avoid r7 if it is already actively used by gcc. > > > > But there is no framepointer for Thumb-2 code (?) > > Peter Maydell suggested there was: > > r7 is (used by gcc as) the Thumb frame pointer; I don't know if this > > makes it worth avoiding in this context. > > Sounds like it might be a gcc-ism, possibly a non-default option? > > Anyway, I think r12 will be fine for our purposes so the point is rather > moot. Just had a chat with some tools guys -- apparently, when passing register arguments to gcc inline asms there really isn't a guarantee that those variables will be in the expected registers on entry to the inline asm. If gcc reorders other function calls or other code around the inline asm (which it can do, except under certain controlled situations), then intervening code can clobber any registers in general. Or, to summarise another way, there is no way to control which register is used to pass something to an inline asm in general (often we get away with this, and there are a lot of inline asms in the kernel that assume it works, but the more you inline the more likely you are to get nasty surprises). There is no workaroud, except on some architectures where special asm constraints allow specific individual registers to be specified for operands (i386 for example). If you need a specific register, this means that you must set up that register explicitly inside the asm if you want a guarantee that the code will work: asm volatile ( "movw r12, %[hvc_num]\n\t" ... "hvc#0" :: [hvc_num] "i" (NUMBER) : "r12" ); Of course, if you need to set up more than about 5 or 6 registers in this way, the doubled register footprint means that the compiler will have to start spilling stuff to the stack. This is the kind of problem which goes away when out-of-lining the hvc wrapper behind a C function interface, since the ABI then provides guarantees about how values are mershaled into and out of that code. Notwithstanding the above, even if we do make theoretically unsound (but often true) assumptions about inline asms, ARM will be no worse than other arches in this respect. Other than serving as a reminder that inline asm is a deep can of worms, this doesn't really give us a neat solution... ---Dave ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: Organizing series and milestones based on quarters
On 28 February 2012 06:56, Zach Pfeffer wrote: > All, > > I recently reorganized my series and milestones to reflect quarters: > > https://launchpad.net/linaro-android > > I also filed milestones for the connects so that I can easily find the > sessions I had. > > Thought others may find this useful. REMINDER: status.linaro.org configuration needs to be updated to reflect the series/milestones changes: https://code.launchpad.net/~linaro-infrastructure/launchpad-work-items-tracker/linaro-config Cheers, Fathi ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
Hi Sangwook,
On 29 February 2012 18:11, Sangwook Lee wrote:
> Enable burst transfer from AHB for EHCI.
> This fixes data transfer of USB Ethernet with EHCI.
> Without this patch, scp hardly works.
>
> Signed-off-by: Sangwook Lee
> ---
> arch/arm/mach-exynos/setup-usb-phy.c | 6 ++
> arch/arm/plat-samsung/devs.c | 2 ++
> arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
> 3 files changed, 27 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
> b/arch/arm/mach-exynos/setup-usb-phy.c
> index 41743d2..5a20460 100644
> --- a/arch/arm/mach-exynos/setup-usb-phy.c
> +++ b/arch/arm/mach-exynos/setup-usb-phy.c
> @@ -18,6 +18,7 @@
> #include
> #include
> #include
> +#include
>
> static atomic_t host_usage;
>
> @@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int
> type)
>
> return -EINVAL;
> }
> +
> +void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem *base)
> +{
> + writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
> +}
This functionality can be added in ehci-s5p itself and avoid adding a
new platform callback in platform data. If this is specific to exynos,
driver data could be added in ehci-s5p to indicate platforms that need
this to be enabled.
Thanks,
Thomas.
[...]
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Cross toolchain for lucid updated
Linaro cross toolchain backport PPA [1] got updated to recent Ubuntu 12.04 versions: - gcc 4.5.3 - gcc 4.6.2 - binutils 2.22 - eglibc 2.15 - linux 3.2 I tested both compiler versions against few packages, U-Boot and Linux 2.6.32. Those packages may also work under Ubuntu 10.10 'maverick' and 11.04 'natty' but it was not tested. Users of Ubuntu 11.10 'oneiric' may install libmpfr1ldbl package [2] and then use 'lucid' repository to install cross compiler while I will prepare packages for their version of Ubuntu. Please report any problems with those backported packages in launchpad [3][4][5]. 1. https://launchpad.net/~linaro-maintainers/+archive/toolchain 2. http://packages.ubuntu.com/lucid/libmpfr1ldbl 3. https://launchpad.net/ubuntu/+source/gcc-4.5-armel-cross/+bugs 4. https://launchpad.net/ubuntu/+source/gcc-4.5-armel-cross/+bugs 5. https://launchpad.net/ubuntu/+source/armel-cross-toolchain-base/+bugs ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: 3, 2, 1....BLASTOFF
On 29 February 2012 12:33, Guruswamy, Senthilvadivu wrote: > Zach, > > On Wed, Feb 29, 2012 at 7:54 AM, Zach Pfeffer > wrote: > > The preliminary 12.03 Android plan is up. > > > > https://launchpad.net/linaro-android/+milestone/12.03 > > > > ARM A15, A7 and A15/A7 Fast Models running Android, big.LITTLE > > testing, dual SD cards, unit tests, more enablement, improved Android > > SMP, and more!!! > Its a good news that SMP to HMP work has been taken up with Android here. > I am curious to know the project details since i was trying the same > in fastmodel. > Which RTSM_EB are you using for this bring up? > FastModel comes with only RTSM_VE of A15,A7 pack which has only cores > simulated, not even uart in it. > > I am starting with fastmodel and getting Android booting on it .I am currently using RTSM_VE for A15 to start with and NFS filesystem. UART is simulated as ttyAMA0 and logs could be captured through it. The plan is to support A9, A15 and A15 + A7 combinations. Regards, > Senthil > > ___ > linaro-android mailing list > linaro-andr...@lists.linaro.org > http://lists.linaro.org/mailman/listinfo/linaro-android > ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: 3, 2, 1....BLASTOFF
On 29 February 2012 13:25, Vishal Bhoj wrote: > On 29 February 2012 12:33, Guruswamy, Senthilvadivu wrote: >> Which RTSM_EB are you using for this bring up? >> FastModel comes with only RTSM_VE of A15,A7 pack which has only cores >> simulated, not even uart in it. >> > I am starting with fastmodel and getting Android booting on it .I am > currently using RTSM_VE for A15 to start with and NFS filesystem. UART is > simulated as ttyAMA0 and logs could be captured through it. The plan is to > support A9, A15 and A15 + A7 combinations. Why do we care about the A9 Fast Model? There are two reasons not to worry about it: (1) we have A9 hardware easily available (2) the example model which is labelled as an RTSM_VE A9 isn't actually the same as the hardware VersatileExpress A9, so it isn't useful for a "start with known working code and use it to bootstrap to running on models" path. -- PMM ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: 3, 2, 1....BLASTOFF
On 29 February 2012 19:03, Peter Maydell wrote: > On 29 February 2012 13:25, Vishal Bhoj wrote: > > On 29 February 2012 12:33, Guruswamy, Senthilvadivu > wrote: > >> Which RTSM_EB are you using for this bring up? > >> FastModel comes with only RTSM_VE of A15,A7 pack which has only cores > >> simulated, not even uart in it. > >> > > I am starting with fastmodel and getting Android booting on it .I am > > currently using RTSM_VE for A15 to start with and NFS filesystem. UART is > > simulated as ttyAMA0 and logs could be captured through it. The plan is > to > > support A9, A15 and A15 + A7 combinations. > > Why do we care about the A9 Fast Model? There are two reasons not > to worry about it: (1) we have A9 hardware easily available (2) the > example model which is labelled as an RTSM_VE A9 isn't actually the > same as the hardware VersatileExpress A9, so it isn't useful for a > "start with known working code and use it to bootstrap to running on > models" path. > Supporting A9 model is not a priority .If A15,A7 models are not stable only then we would have linaro images for A9 model. > -- PMM > ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [RFC PATCH] module: debugging check for runaway kthreads
On 02/29/2012 12:43 AM, Andrew Morton wrote:
Please make the stub function a proper C function, not a macro. It
provides type checking, can prevent compile warnings and is generally
easier on the eyes.
OK
I think this should be under the kernel hacking menu, dependent on
CONFIG_DEBUG_KERNEL, in lib/Kconfig.debug.
I tried to group all module options together. Nevertheless,
I have no objections for separately grouping debugging options.
struct kthread {
int should_stop;
+#ifdef CONFIG_MODULE_KTHREAD_CHECK
+ void *fn;
+#endif
A little comment describing what this field is for would be nice.
OK
+unsigned long get_kthread_func(struct task_struct *tsk)
+{
+ struct kthread *kt;
+ unsigned long addr;
+
+ get_task_struct(tsk);
+ BUG_ON(!(tsk->flags& PF_KTHREAD));
+ kt = to_kthread(tsk);
+ barrier();
+ addr = tsk->vfork_done ? (unsigned long)kt->fn : 0UL;
+ put_task_struct(tsk);
+ return addr;
+}
gack, I hadn't noticed the kthread ab^wre^wuse of vfork_done before.
Kooky. Undocumented, too.
Hm... vfork_done of the just created kthread is NULL. When the new
kthread calls kthread(), it assigns it's private 'struct kthread' to
it's own tsk->vfork_done (IIUC, this is just a hack to avoid ugly
stuff like excessive pointer in task_struct or pointer type conversion).
So, to_kthread(tsk) is valid only if tsk->vfork_done is non-NULL,
otherwise it's just a bogus pointer. IMHO this hack should be documented
in kthread().
+#ifdef CONFIG_KALLSYMS
+static const char *get_ksymbol(struct module *mod, unsigned long addr,
+ unsigned long *size, unsigned long *offset);
+#else
+#define get_ksymbol(mod, addr, size, offset) NULL
+#endif
Can this code block be moved to after the get_ksymbol() definition so
the forward declaration is unneeded?
OK
Did we really need to use the internal get_ksymbol(), rather than an
official kallsyms interface function?
I don't see a kallsyms interface function which is able to look through
just one module. Since the module name (and struct module pointer) is
known, it looks redundant to lookup through the whole kallsyms tables.
The CONFIG_KALLSYMS=n stub should be written in C. Make it return
"" and the ?: in check_kthreads() can be done away with.
OK
+#else
+
+#define check_kthreads(mod) do { } while (0)
In C, please.
OK
Dmitry
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Re: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
Hi Jingoo
On 29/02/12 13:23, Jingoo Han wrote:
Hi, Sangwook.
I know what you want to add.
I'll send new patch which can enable EHCI burst mode.
Great !
Thanks
Sangwook
This new patch will not use platform data callback and different machine
directory
file to include EHCI INSNREG00 definitions.
Also, comment will be modified properly.
Thank you.
Best regards,
Jingoo Han.
-Original Message-
From: Sangwook Lee [mailto:sangwook@linaro.org]
Sent: Wednesday, February 29, 2012 9:41 PM
To: linux-samsung-...@vger.kernel.org; linux-...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org
Cc: ben-li...@fluff.org; gre...@suse.de; kgene@samsung.com;
st...@rowland.harvard.edu;
jg1@samsung.com; jy0922.s...@samsung.com; patc...@linaro.org;
linaro-dev@lists.linaro.org;
li...@arm.linux.org.uk; Sangwook Lee
Subject: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
Enable burst transfer from AHB for EHCI.
This fixes data transfer of USB Ethernet with EHCI.
Without this patch, scp hardly works.
Signed-off-by: Sangwook Lee
---
arch/arm/mach-exynos/setup-usb-phy.c |6 ++
arch/arm/plat-samsung/devs.c |2 ++
arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
b/arch/arm/mach-exynos/setup-usb-phy.c
index 41743d2..5a20460 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
static atomic_t host_usage;
@@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int type)
return -EINVAL;
}
+
+void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem *base)
+{
+ writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
+}
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index f10768e..8fd1bd3 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1402,6 +1402,8 @@ void __init s5p_ehci_set_platdata(struct
s5p_ehci_platdata *pd)
npd->phy_init = s5p_usb_phy_init;
if (!npd->phy_exit)
npd->phy_exit = s5p_usb_phy_exit;
+ if (!npd->burst_enable)
+ npd->burst_enable = s5p_ehci_burst_enable;
}
#endif /* CONFIG_S5P_DEV_USB_EHCI */
diff --git a/arch/arm/plat-samsung/include/plat/ehci.h
b/arch/arm/plat-samsung/include/plat/ehci.h
index 5f28cae..9c866b7 100644
--- a/arch/arm/plat-samsung/include/plat/ehci.h
+++ b/arch/arm/plat-samsung/include/plat/ehci.h
@@ -14,8 +14,27 @@
struct s5p_ehci_platdata {
int (*phy_init)(struct platform_device *pdev, int type);
int (*phy_exit)(struct platform_device *pdev, int type);
+ void (*burst_enable)(struct platform_device *pdev, void __iomem *base);
};
extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
+extern void s5p_ehci_burst_enable(struct platform_device *pdev,
+ void __iomem *base);
+
+/* EHCI EXYNOS specific register */
+#define EHCI_INSNREG00 0x90
+
+/*
+ * EHCI INSNREG00 Specific fields
+ * Enable AHB master to use burst transfer from 4 to 16
+ */
+#define EHCI_INSNREG00_ENABLE_INCR16 (1<< 25)
+#define EHCI_INSNREG00_ENABLE_INCR8(1<< 24)
+#define EHCI_INSNREG00_ENABLE_INCR4(1<< 23)
+/* Force AHB master to start burst transfer only for 4,8,16 alignment */
+#define EHCI_INSNREG00_ENABLE_INCRX_ALIGN (1<< 22)
+#define EHCI_INSNREG00_ENABLE_BURST\
+ (EHCI_INSNREG00_ENABLE_INCR16 | EHCI_INSNREG00_ENABLE_INCR8 | \
+ EHCI_INSNREG00_ENABLE_INCR4 | EHCI_INSNREG00_ENABLE_INCRX_ALIGN)
#endif /* __PLAT_SAMSUNG_EHCI_H */
--
1.7.4.1
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Re: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
On 29/02/12 13:01, Thomas Abraham wrote:
Hi Sangwook,
On 29 February 2012 18:11, Sangwook Lee wrote:
Enable burst transfer from AHB for EHCI.
This fixes data transfer of USB Ethernet with EHCI.
Without this patch, scp hardly works.
Signed-off-by: Sangwook Lee
---
arch/arm/mach-exynos/setup-usb-phy.c |6 ++
arch/arm/plat-samsung/devs.c |2 ++
arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
b/arch/arm/mach-exynos/setup-usb-phy.c
index 41743d2..5a20460 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
static atomic_t host_usage;
@@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int type)
return -EINVAL;
}
+
+void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem *base)
+{
+ writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
+}
This functionality can be added in ehci-s5p itself and avoid adding a
new platform callback in platform data. If this is specific to exynos,
driver data could be added in ehci-s5p to indicate platforms that need
this to be enabled.
it makes sense.
Thanks,
Thomas.
[...]
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Re: [PATCH-WIP 01/13] xen/arm: use r12 to pass the hypercall number to the hypervisor
On Wed, 29 Feb 2012, Dave Martin wrote: > On Wed, Feb 29, 2012 at 09:56:02AM +, Ian Campbell wrote: > > On Wed, 2012-02-29 at 09:34 +, Dave Martin wrote: > > > On Tue, Feb 28, 2012 at 12:28:29PM +, Stefano Stabellini wrote: > > > > > > I don't have a very strong opinion on which register we should use, but > > > > I would like to avoid r7 if it is already actively used by gcc. > > > > > > But there is no framepointer for Thumb-2 code (?) > > > > Peter Maydell suggested there was: > > > r7 is (used by gcc as) the Thumb frame pointer; I don't know if this > > > makes it worth avoiding in this context. > > > > Sounds like it might be a gcc-ism, possibly a non-default option? > > > > Anyway, I think r12 will be fine for our purposes so the point is rather > > moot. > > Just had a chat with some tools guys -- apparently, when passing register > arguments to gcc inline asms there really isn't a guarantee that those > variables will be in the expected registers on entry to the inline asm. > > If gcc reorders other function calls or other code around the inline asm > (which it can do, except under certain controlled situations), then > intervening code can clobber any registers in general. > > Or, to summarise another way, there is no way to control which register > is used to pass something to an inline asm in general (often we get away > with this, and there are a lot of inline asms in the kernel that assume > it works, but the more you inline the more likely you are to get nasty > surprises). There is no workaroud, except on some architectures where > special asm constraints allow specific individual registers to be > specified for operands (i386 for example). > > If you need a specific register, this means that you must set up that > register explicitly inside the asm if you want a guarantee that the > code will work: > > asm volatile ( > "movw r12, %[hvc_num]\n\t" > ... > "hvc#0" > :: [hvc_num] "i" (NUMBER) : "r12" > ); > OK, we can arrange the hypercall code to be like that. Also with your patch series it would be "_hvc" because of the .macro, right? > This is the kind of problem which goes away when out-of-lining the > hvc wrapper behind a C function interface, since the ABI then provides > guarantees about how values are mershaled into and out of that code. Do you mean implementing the entire HYPERVISOR_example_op in assembly and calling it from C? Because I guess that gcc would still be free to mess with the registers between the C function entry point and any inline assembly code. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH] module: debugging check for runaway kthreads
Debugging option CONFIG_MODULE_KTHREAD_CHECK provides a way to check
whether all kernel threads created by the module and have used module
code as a thread worker function are really exited when the module is
unloaded. The following pseudo-code contains example of an error which
is likely to be catched with this debugging check:
static struct task_struct *tsk;
static DECLARE_COMPLETION(done);
static void *func(void *unused)
{
while (!kthread_should_stop())
real_work();
complete(&done);
}
static int __init modinit(void)
{
tsk = kthread_run(func, NULL, "func");
return IS_ERR(tsk) ? PTR_ERR(tsk) : 0;
}
static void __exit modexit(void)
{
wait_for_completion(&done);
}
Reviewed-by: Andrew Morton
Signed-off-by: Dmitry Antipov
---
include/linux/kthread.h |3 ++
kernel/kthread.c| 38 +++
kernel/module.c | 51 +++
lib/Kconfig.debug |9
4 files changed, 101 insertions(+), 0 deletions(-)
diff --git a/include/linux/kthread.h b/include/linux/kthread.h
index 0714b24..202fe14 100644
--- a/include/linux/kthread.h
+++ b/include/linux/kthread.h
@@ -13,6 +13,9 @@ struct task_struct *kthread_create_on_node(int
(*threadfn)(void *data),
#define kthread_create(threadfn, data, namefmt, arg...) \
kthread_create_on_node(threadfn, data, -1, namefmt, ##arg)
+#ifdef CONFIG_MODULE_KTHREAD_CHECK
+unsigned long get_kthread_func(struct task_struct *tsk);
+#endif
/**
* kthread_run - create and wake a thread.
diff --git a/kernel/kthread.c b/kernel/kthread.c
index 3d3de63..e6f7977 100644
--- a/kernel/kthread.c
+++ b/kernel/kthread.c
@@ -38,6 +38,13 @@ struct kthread_create_info
struct kthread {
int should_stop;
+#ifdef CONFIG_MODULE_KTHREAD_CHECK
+ /*
+* Kthread worker function, i.e. first argument
+* passed to kthread_create() and kthread_run().
+*/
+ void *fn;
+#endif
void *data;
struct completion exited;
};
@@ -45,6 +52,32 @@ struct kthread {
#define to_kthread(tsk)\
container_of((tsk)->vfork_done, struct kthread, exited)
+#ifdef CONFIG_MODULE_KTHREAD_CHECK
+
+/*
+ * Assuming the task is a kernel thread, try to get it's worker
+ * function, i.e. the first argument of kthread_create()/kthread_run().
+ */
+unsigned long get_kthread_func(struct task_struct *tsk)
+{
+ struct kthread *kt;
+ unsigned long addr;
+
+ get_task_struct(tsk);
+ BUG_ON(!(tsk->flags & PF_KTHREAD));
+ kt = to_kthread(tsk);
+ barrier();
+ /*
+* Note kt is valid only if vfork_done is initialized.
+* See kthread() to check why it's so.
+*/
+ addr = tsk->vfork_done ? (unsigned long)kt->fn : 0UL;
+ put_task_struct(tsk);
+ return addr;
+}
+
+#endif /* CONFIG_MODULE_KTHREAD_CHECK */
+
/**
* kthread_should_stop - should this kthread return now?
*
@@ -106,8 +139,13 @@ static int kthread(void *_create)
int ret;
self.should_stop = 0;
+#ifdef CONFIG_MODULE_KTHREAD_CHECK
+ /* Will be used by get_kthread_func(). */
+ self.fn = threadfn;
+#endif
self.data = data;
init_completion(&self.exited);
+ /* Setup self so to_kthread() macro may be used. */
current->vfork_done = &self.exited;
/* OK, tell user we're spawned, wait for stop or wakeup */
diff --git a/kernel/module.c b/kernel/module.c
index 2c93276..7ad8a03 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -45,6 +45,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -223,6 +224,8 @@ extern const unsigned long __start___kcrctab_unused[];
extern const unsigned long __start___kcrctab_unused_gpl[];
#endif
+static void check_kthreads(struct module *mod);
+
#ifndef CONFIG_MODVERSIONS
#define symversion(base, idx) NULL
#else
@@ -831,6 +834,7 @@ SYSCALL_DEFINE2(delete_module, const char __user *,
name_user,
blocking_notifier_call_chain(&module_notify_list,
MODULE_STATE_GOING, mod);
async_synchronize_full();
+ check_kthreads(mod);
/* Store the name of the last unloaded module for diagnostic purposes */
strlcpy(last_unloaded_module, mod->name, sizeof(last_unloaded_module));
@@ -3274,8 +3278,55 @@ int module_kallsyms_on_each_symbol(int (*fn)(void *,
const char *,
}
return 0;
}
+
+#else /* not CONFIG_KALLSYMS */
+
+static inline const char *get_ksymbol(struct module *mod,
+ unsigned long addr,
+ unsigned long *size,
+ unsigned long *offset)
+{
+ return "";
+}
+
#endif /* CONFIG_KALLSYMS */
+#ifdef CONFIG_MODULE_KTHREAD_CHECK
+
+static void check_kthreads(struct module *mod)
+{
+ unsigned long flags;
+ struct task_struct *g, *p;
+
+ read_lock_
Re: [Linaro-big-little] Sample big.LITTLE model boot images
On Tue, Feb 28, 2012, Dave Martin wrote: > I've added some detailed info on the wiki about how to go about > building bootable images for the big.LITTLE components, here: > https://wiki.linaro.org/Internal/Projects/Big.Little.Switcher/ARMFastModelsHowto Could you share the model binaries within Linaro so that Linaro folks with a FastModels license or access to a licensing server just have to combine: - model binary - license - your boot wrapper - your sample kernel and rootfs to get things working? Perhaps in your home dir on people.linaro.org. (Unless you can share it publicly, in which case do put it in your ~public_html or on the wiki page! :-) -- Loïc Minier ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH v6 7/9] ARM: omap: Consolidate OMAP4 time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-omap2/cpuidle44xx.c | 21 +++--
1 files changed, 3 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c
b/arch/arm/mach-omap2/cpuidle44xx.c
index cfdbb86..9729d2e 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -62,16 +62,10 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
{
struct omap4_idle_statedata *cx =
cpuidle_get_statedata(&dev->states_usage[index]);
- struct timespec ts_preidle, ts_postidle, ts_idle;
u32 cpu1_state;
- int idle_time;
int new_state_idx;
int cpu_id = smp_processor_id();
- /* Used to keep track of the total time in idle */
- getnstimeofday(&ts_preidle);
-
- local_irq_disable();
local_fiq_disable();
/*
@@ -129,26 +123,17 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
if (index > 0)
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
- getnstimeofday(&ts_postidle);
- ts_idle = timespec_sub(ts_postidle, ts_preidle);
-
- local_irq_enable();
local_fiq_enable();
- idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
- USEC_PER_SEC;
-
- /* Update cpuidle counters */
- dev->last_residency = idle_time;
-
return index;
}
DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev);
struct cpuidle_driver omap4_idle_driver = {
- .name = "omap4_idle",
- .owner =THIS_MODULE,
+ .name = "omap4_idle",
+ .owner = THIS_MODULE,
+ .en_core_tk_irqen = 1,
};
static inline void _fill_cstate(struct cpuidle_driver *drv,
--
1.7.1
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[PATCH v6 8/9] ARM: shmobile: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-shmobile/cpuidle.c | 23 +++
1 files changed, 3 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 1b23342..47b56a9 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
static void shmobile_enter_wfi(void)
@@ -29,21 +30,8 @@ static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- ktime_t before, after;
-
- before = ktime_get();
-
- local_irq_disable();
- local_fiq_disable();
-
shmobile_cpuidle_modes[index]();
- local_irq_enable();
- local_fiq_enable();
-
- after = ktime_get();
- dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
-
return index;
}
@@ -51,13 +39,8 @@ static struct cpuidle_device shmobile_cpuidle_dev;
static struct cpuidle_driver shmobile_cpuidle_driver = {
.name = "shmobile_cpuidle",
.owner =THIS_MODULE,
- .states[0] = {
- .name = "C1",
- .desc = "WFI",
- .exit_latency = 1,
- .target_residency = 1 * 2,
- .flags = CPUIDLE_FLAG_TIME_VALID,
- },
+ .en_core_tk_irqen = 1,
+ .states[0] = CPUIDLE_ARM_WFI_STATE,
.safe_state_index = 0, /* C1 */
.state_count = 1,
};
--
1.7.1
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[PATCH v6 3/9] ARM: exynos: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-exynos/cpuidle.c | 53 ---
1 files changed, 6 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 9bf6743..75bb88b 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -34,22 +35,12 @@
#define S5P_CHECK_AFTR 0xFCBA0D10
-static int exynos4_enter_idle(struct cpuidle_device *dev,
- struct cpuidle_driver *drv,
- int index);
static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
static struct cpuidle_state exynos4_cpuidle_set[] = {
- [0] = {
- .enter = exynos4_enter_idle,
- .exit_latency = 1,
- .target_residency = 10,
- .flags = CPUIDLE_FLAG_TIME_VALID,
- .name = "C0",
- .desc = "ARM clock gating(WFI)",
- },
+ [0] = CPUIDLE_ARM_WFI_STATE,
[1] = {
.enter = exynos4_enter_lowpower,
.exit_latency = 300,
@@ -63,8 +54,9 @@ static struct cpuidle_state exynos4_cpuidle_set[] = {
static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
static struct cpuidle_driver exynos4_idle_driver = {
- .name = "exynos4_idle",
- .owner = THIS_MODULE,
+ .name = "exynos4_idle",
+ .owner = THIS_MODULE,
+ .en_core_tk_irqen = 1,
};
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
@@ -103,13 +95,8 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device
*dev,
struct cpuidle_driver *drv,
int index)
{
- struct timeval before, after;
- int idle_time;
unsigned long tmp;
- local_irq_disable();
- do_gettimeofday(&before);
-
exynos4_set_wakeupmask();
/* Set value of power down register for aftr mode */
@@ -148,34 +135,6 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device
*dev,
/* Clear wakeup state register */
__raw_writel(0x0, S5P_WAKEUP_STAT);
- do_gettimeofday(&after);
-
- local_irq_enable();
- idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
- (after.tv_usec - before.tv_usec);
-
- dev->last_residency = idle_time;
- return index;
-}
-
-static int exynos4_enter_idle(struct cpuidle_device *dev,
- struct cpuidle_driver *drv,
- int index)
-{
- struct timeval before, after;
- int idle_time;
-
- local_irq_disable();
- do_gettimeofday(&before);
-
- cpu_do_idle();
-
- do_gettimeofday(&after);
- local_irq_enable();
- idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
- (after.tv_usec - before.tv_usec);
-
- dev->last_residency = idle_time;
return index;
}
@@ -190,7 +149,7 @@ static int exynos4_enter_lowpower(struct cpuidle_device
*dev,
new_index = drv->safe_state_index;
if (new_index == 0)
- return exynos4_enter_idle(dev, drv, new_index);
+ return cpuidle_simple_enter(dev, drv, new_index);
else
return exynos4_enter_core0_aftr(dev, drv, new_index);
}
--
1.7.1
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Re: [PATCH v6 5/9] ARM: davinci: Consolidate time keeping and irq enable
On Wed, Feb 29, 2012 at 2:36 AM, Jean Pihet wrote:
> Rob,
>
> On Wed, Feb 29, 2012 at 4:11 AM, Robert Lee wrote:
>> Enable core cpuidle timekeeping and irq enabling and remove that
>> handling from this code.
>>
>> Signed-off-by: Robert Lee
>> ---
>> arch/arm/mach-davinci/cpuidle.c | 78
>> +++---
>> 1 files changed, 31 insertions(+), 47 deletions(-)
>>
>> diff --git a/arch/arm/mach-davinci/cpuidle.c
>> b/arch/arm/mach-davinci/cpuidle.c
>> index a30c7c5..6f457f1 100644
>> --- a/arch/arm/mach-davinci/cpuidle.c
>> +++ b/arch/arm/mach-davinci/cpuidle.c
> ...
>
>> @@ -30,12 +31,42 @@ struct davinci_ops {
>> u32 flags;
>> };
>>
>> +/* Actual code that puts the SoC in different idle states */
>> +static int davinci_enter_idle(struct cpuidle_device *dev,
>> + struct cpuidle_driver *drv,
>> + int index)
>> +{
>> + struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
>> + struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
>> +
>> + if (ops && ops->enter)
>> + ops->enter(ops->flags);
>> +
>> + return cpuidle_wrap_enter(dev, drv, index,
>> + cpuidle_simple_enter);
> This does not look right since ops->exit will never be called.
>
Yes, thanks. The 'return' should be 'index ='
>> +
>> + if (ops && ops->exit)
>> + ops->exit(ops->flags);
>> +
>> + return index;
>> +}
>> +
> ...
>
> Regards,
> Jean
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RE: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
Hi Tushar,
> -Original Message-
> From: linux-samsung-soc-ow...@vger.kernel.org
> [mailto:linux-samsung-soc-ow...@vger.kernel.org] On Behalf
> Of Tushar Behera
> Sent: Thursday, December 01, 2011 2:50 PM
> To: linux-samsung-...@vger.kernel.org
> Cc: kgene@samsung.com; linaro-dev@lists.linaro.org; patc...@linaro.org
> Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
>
> The framebuffer driver needs the clock named 'lcd' as its bus
> clock but the equivalent clock on Exynos4 is named as 'fimd'.
> Hence, create a clkdev lookup entry with the name 'lcd' that
> references the 'fimd' clock.
>
> Signed-off-by: Tushar Behera
Acked-by: Jingoo Han
I also tested this patch with SMDKV310 board.
It works properly.
Thank you.
> ---
> arch/arm/mach-exynos/clock.c | 14 +-
> 1 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
> index 5d8d483..607ec28 100644
> --- a/arch/arm/mach-exynos/clock.c
> +++ b/arch/arm/mach-exynos/clock.c
> @@ -489,11 +489,6 @@ static struct clk init_clocks_off[] = {
> .enable = exynos4_clk_ip_cam_ctrl,
> .ctrlbit= (1 << 3),
> }, {
> - .name = "fimd",
> - .devname= "exynos4-fb.0",
> - .enable = exynos4_clk_ip_lcd0_ctrl,
> - .ctrlbit= (1 << 0),
> - }, {
> .name = "hsmmc",
> .devname= "s3c-sdhci.0",
> .parent = &clk_aclk_133.clk,
> @@ -782,6 +777,13 @@ static struct clk clk_pdma1 = {
> .ctrlbit= (1 << 1),
> };
>
> +static struct clk clk_fimd0 = {
> + .name = "fimd",
> + .devname= "exynos4-fb.0",
> + .enable = exynos4_clk_ip_lcd0_ctrl,
> + .ctrlbit= (1 << 0),
> +};
> +
> struct clk *clkset_group_list[] = {
> [0] = &clk_ext_xtal_mux,
> [1] = &clk_xusbxti,
> @@ -1294,6 +1296,7 @@ static struct clksrc_clk *sysclks[] = {
> static struct clk *clk_cdev[] = {
> &clk_pdma0,
> &clk_pdma1,
> + &clk_fimd0,
> };
>
> static struct clksrc_clk *clksrc_cdev[] = {
> @@ -1318,6 +1321,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
> CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
> CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
> CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
> + CLKDEV_INIT("exynos4-fb.0", "lcd", &clk_fimd0),
> };
>
> static int xtal_rate;
> --
> 1.7.4.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
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Re: [PATCH-WIP 01/13] xen/arm: use r12 to pass the hypercall number to the hypervisor
On Wed, 2012-02-29 at 09:34 +, Dave Martin wrote: > On Tue, Feb 28, 2012 at 12:28:29PM +, Stefano Stabellini wrote: > > I don't have a very strong opinion on which register we should use, but > > I would like to avoid r7 if it is already actively used by gcc. > > But there is no framepointer for Thumb-2 code (?) Peter Maydell suggested there was: > r7 is (used by gcc as) the Thumb frame pointer; I don't know if this > makes it worth avoiding in this context. Sounds like it might be a gcc-ism, possibly a non-default option? Anyway, I think r12 will be fine for our purposes so the point is rather moot. Ian. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
Hi Rob, On Wed, Feb 29, 2012 at 4:11 AM, Robert Lee wrote: > Make necessary changes to implement time keeping and irq enabling > in the core cpuidle code. This will allow the removal of these > functionalities from various platform cpuidle implementations whose > timekeeping and irq enabling follows the form in this common code. > > Signed-off-by: Robert Lee > --- > arch/arm/include/asm/cpuidle.h | 14 ++ > drivers/cpuidle/cpuidle.c | 90 > > include/linux/cpuidle.h | 13 ++ > 3 files changed, 99 insertions(+), 18 deletions(-) > create mode 100644 arch/arm/include/asm/cpuidle.h > ... > diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c > index 59f4261..00b02f5 100644 > --- a/drivers/cpuidle/cpuidle.c > +++ b/drivers/cpuidle/cpuidle.c ... > @@ -110,7 +126,8 @@ int cpuidle_idle_call(void) > dev->states_usage[entered_state].time += > (unsigned long long)dev->last_residency; > dev->states_usage[entered_state].usage++; > - } > + } else > + dev->last_residency = 0; Braces are required here, according to the coding style doc. ... Regards, Jean ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH v6 4/9] ARM: kirkwood: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-kirkwood/cpuidle.c | 72 +++---
1 files changed, 21 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
index 7088180..7fd1f88 100644
--- a/arch/arm/mach-kirkwood/cpuidle.c
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -20,77 +20,47 @@
#include
#include
#include
+#include
#include
#define KIRKWOOD_MAX_STATES2
-static struct cpuidle_driver kirkwood_idle_driver = {
- .name = "kirkwood_idle",
- .owner =THIS_MODULE,
-};
-
-static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
-
/* Actual code that puts the SoC in different idle states */
static int kirkwood_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- struct timeval before, after;
- int idle_time;
-
- local_irq_disable();
- do_gettimeofday(&before);
- if (index == 0)
- /* Wait for interrupt state */
- cpu_do_idle();
- else if (index == 1) {
- /*
-* Following write will put DDR in self refresh.
-* Note that we have 256 cycles before DDR puts it
-* self in self-refresh, so the wait-for-interrupt
-* call afterwards won't get the DDR from self refresh
-* mode.
-*/
- writel(0x7, DDR_OPERATION_BASE);
- cpu_do_idle();
- }
- do_gettimeofday(&after);
- local_irq_enable();
- idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
- (after.tv_usec - before.tv_usec);
-
- /* Update last residency */
- dev->last_residency = idle_time;
+ writel(0x7, DDR_OPERATION_BASE);
+ cpu_do_idle();
return index;
}
+static struct cpuidle_driver kirkwood_idle_driver = {
+ .name = "kirkwood_idle",
+ .owner = THIS_MODULE,
+ .en_core_tk_irqen = 1,
+ .states[0] = CPUIDLE_ARM_WFI_STATE,
+ .states[1] = {
+ .enter = kirkwood_enter_idle,
+ .exit_latency = 10,
+ .target_residency = 10,
+ .flags = CPUIDLE_FLAG_TIME_VALID,
+ .name = "DDR SR",
+ .desc = "WFI and DDR Self Refresh",
+ },
+ .state_count = KIRKWOOD_MAX_STATES,
+};
+
+static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
+
/* Initialize CPU idle by registering the idle states */
static int kirkwood_init_cpuidle(void)
{
struct cpuidle_device *device;
- struct cpuidle_driver *driver = &kirkwood_idle_driver;
device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
device->state_count = KIRKWOOD_MAX_STATES;
- driver->state_count = KIRKWOOD_MAX_STATES;
-
- /* Wait for interrupt state */
- driver->states[0].enter = kirkwood_enter_idle;
- driver->states[0].exit_latency = 1;
- driver->states[0].target_residency = 1;
- driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
- strcpy(driver->states[0].name, "WFI");
- strcpy(driver->states[0].desc, "Wait for interrupt");
-
- /* Wait for interrupt and DDR self refresh state */
- driver->states[1].enter = kirkwood_enter_idle;
- driver->states[1].exit_latency = 10;
- driver->states[1].target_residency = 1;
- driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
- strcpy(driver->states[1].name, "DDR SR");
- strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
cpuidle_register_driver(&kirkwood_idle_driver);
if (cpuidle_register_device(device)) {
--
1.7.1
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[PATCH v6 0/9] Consolidate cpuidle functionality
This patch series moves various functionality duplicated in platform cpuidle drivers to the core cpuidle driver. Also, the platform irq disabling was removed as it appears that all calls into cpuidle_call_idle will have already called local_irq_disable(). NOTE to Maintainers: Platform code changes are not required due to patch 1/9 but please review and push these platform changes as possible to allow this consolidation to occur. Based on 3.3-rc5 plus recent exynos cpuidle patch (affect exynos cpuidle only): http://www.spinics.net/lists/linux-samsung-soc/msg09467.html v5 submission can be found here: http://www.spinics.net/lists/arm-kernel/msg161596.html Changes since v5: * Fixed mindless bug in CONFIG_ARCH_HAS_RELAX code in drivers/cpuidle/cpuidle.c * Removed inline from wrapper function (thanks Mike Turquette and Rob Herring) * Add zeroing out of last_residency if error value is returned (thanks Mike) * Made drivers/cpuidle/cpuidle.c more intelligently handle en_core_tk_irqen flag allowing removal of the if (en_core_tk_irqen) in cpuidle_idle_call (thanks Daniel Lezcano) * Moved CPUIDLE_ARM_WFI_STATE macro to arch/arm/include/asm/cpuidle.h (thanks Jean Pihet) * Cleaned up some comments and a stray change (thanks Jean) v4 submission can be found here: http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/082742.html Changes since v4: * Added common cpu_do_idle function to core cpuidle * Added time keep irq en wrapper to core cpuidle * Removed pre/post enter * Re-added platforms that can use new common code. v3 submission can be found here: http://www.spinics.net/lists/arm-kernel/msg156751.html Changes since v3: * Removed drivers/cpuidle/common.c ** Removed the initialization helper functions ** Removed the wrapper used to consolidate time keeping and irq enable/disable * Add time keeping and local_irq_disable handling in cpuidle_call_idle(). * Made necessary modifications to a few platforms that required the most changes ** Note on omap3: changed structure of omap3_idle_drvdata and added per_next_state and per_saved_state vars to accomodate new framework. v2 submission can be found here: http://comments.gmane.org/gmane.linux.ports.arm.kernel/144199 Changes since v2: * Made various code organization and style changes as suggested in v1 review. * Removed at91 use of common code. A separate effort is underway to clean at91 code and the author has offered to convert to common interface as part of those changes (if this common interface is accepted in time). * Made platform cpuidle_driver objects __initdata and dynamically added one persistent instance of this object in common code. * Removed imx5 pm usage of gpc_dvfs clock as it is no longer needed after being enabled during clock initialization. * Re-organized patches. v1 submission can be found here: http://comments.gmane.org/gmane.linux.ports.arm.kernel/142791 Changes since v1: * Common interface moved to drivers/cpuidle and made non arch-specific. * Made various fixes and suggested additions to the common cpuidle code from v1 review. * Added callback for filling in driver_data field as needed. * Modified the various platforms with these changes. Robert Lee (9): cpuidle: Add common time keeping and irq enabling ARM: at91: Consolidate time keeping and irq enable ARM: exynos: Consolidate time keeping and irq enable ARM: kirkwood: Consolidate time keeping and irq enable ARM: davinci: Consolidate time keeping and irq enable ARM: omap: Consolidate OMAP3 time keeping and irq enable ARM: omap: Consolidate OMAP4 time keeping and irq enable ARM: shmobile: Consolidate time keeping and irq enable SH: shmobile: Consolidate time keeping and irq enable arch/arm/include/asm/cpuidle.h| 14 + arch/arm/mach-at91/cpuidle.c | 67 + arch/arm/mach-davinci/cpuidle.c | 78 +++- arch/arm/mach-exynos/cpuidle.c| 53 ++- arch/arm/mach-kirkwood/cpuidle.c | 72 -- arch/arm/mach-omap2/cpuidle34xx.c | 42 ++- arch/arm/mach-omap2/cpuidle44xx.c | 21 +--- arch/arm/mach-shmobile/cpuidle.c | 23 +--- arch/sh/kernel/cpu/shmobile/cpuidle.c | 10 +--- drivers/cpuidle/cpuidle.c | 90 ++--- include/linux/cpuidle.h | 13 + 11 files changed, 207 insertions(+), 276 deletions(-) create mode 100644 arch/arm/include/asm/cpuidle.h ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH v6 2/9] ARM: at91: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-at91/cpuidle.c | 67 +++---
1 files changed, 24 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index a851e6c..324f802 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -17,9 +17,10 @@
#include
#include
#include
-#include
#include
#include
+#include
+#include
#include "pm.h"
@@ -27,66 +28,46 @@
static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
-static struct cpuidle_driver at91_idle_driver = {
- .name = "at91_idle",
- .owner =THIS_MODULE,
-};
-
/* Actual code that puts the SoC in different idle states */
static int at91_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
- struct timeval before, after;
- int idle_time;
u32 saved_lpr;
- local_irq_disable();
- do_gettimeofday(&before);
- if (index == 0)
- /* Wait for interrupt state */
- cpu_do_idle();
- else if (index == 1) {
- asm("b 1f; .align 5; 1:");
- asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
- saved_lpr = sdram_selfrefresh_enable();
- cpu_do_idle();
- sdram_selfrefresh_disable(saved_lpr);
- }
- do_gettimeofday(&after);
- local_irq_enable();
- idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
- (after.tv_usec - before.tv_usec);
+ __asm__("b 1f; .align 5; 1:\n"
+ " mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
+
+ saved_lpr = sdram_selfrefresh_enable();
+ cpu_do_idle();
+ sdram_selfrefresh_disable(saved_lpr);
- dev->last_residency = idle_time;
return index;
}
+static struct cpuidle_driver at91_idle_driver = {
+ .name = "at91_idle",
+ .owner = THIS_MODULE,
+ .en_core_tk_irqen = 1,
+ .states[0] = CPUIDLE_ARM_WFI_STATE,
+ .states[1] = {
+ .enter = at91_enter_idle,
+ .exit_latency = 10,
+ .target_residency = 10,
+ .flags = CPUIDLE_FLAG_TIME_VALID,
+ .name = "RAM_SR",
+ .desc = "WFI and DDR Self Refresh",
+ },
+ .state_count = AT91_MAX_STATES,
+};
+
/* Initialize CPU idle by registering the idle states */
static int at91_init_cpuidle(void)
{
struct cpuidle_device *device;
- struct cpuidle_driver *driver = &at91_idle_driver;
device = &per_cpu(at91_cpuidle_device, smp_processor_id());
device->state_count = AT91_MAX_STATES;
- driver->state_count = AT91_MAX_STATES;
-
- /* Wait for interrupt state */
- driver->states[0].enter = at91_enter_idle;
- driver->states[0].exit_latency = 1;
- driver->states[0].target_residency = 1;
- driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
- strcpy(driver->states[0].name, "WFI");
- strcpy(driver->states[0].desc, "Wait for interrupt");
-
- /* Wait for interrupt and RAM self refresh state */
- driver->states[1].enter = at91_enter_idle;
- driver->states[1].exit_latency = 10;
- driver->states[1].target_residency = 1;
- driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
- strcpy(driver->states[1].name, "RAM_SR");
- strcpy(driver->states[1].desc, "WFI and RAM Self Refresh");
cpuidle_register_driver(&at91_idle_driver);
--
1.7.1
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Re: [PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
Hi Rob,
On 02/29/2012 08:41 AM, Robert Lee wrote:
> Make necessary changes to implement time keeping and irq enabling
> in the core cpuidle code. This will allow the removal of these
> functionalities from various platform cpuidle implementations whose
> timekeeping and irq enabling follows the form in this common code.
>
> Signed-off-by: Robert Lee
> ---
> arch/arm/include/asm/cpuidle.h | 14 ++
> drivers/cpuidle/cpuidle.c | 90
>
> include/linux/cpuidle.h| 13 ++
> 3 files changed, 99 insertions(+), 18 deletions(-)
> create mode 100644 arch/arm/include/asm/cpuidle.h
>
> diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
> new file mode 100644
> index 000..1d2075b
> --- /dev/null
> +++ b/arch/arm/include/asm/cpuidle.h
> @@ -0,0 +1,14 @@
> +#ifndef __ASM_ARM_CPUIDLE_H
> +#define __ASM_ARM_CPUIDLE_H
> +
> +/* Common ARM WFI state */
> +#define CPUIDLE_ARM_WFI_STATE {\
> + .enter = cpuidle_simple_enter,\
> + .exit_latency = 1,\
> + .target_residency = 1,\
> + .flags = CPUIDLE_FLAG_TIME_VALID,\
> + .name = "WFI",\
> + .desc = "ARM core clock gating (WFI)",\
> +}
> +
> +#endif
> diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
> index 59f4261..00b02f5 100644
> --- a/drivers/cpuidle/cpuidle.c
> +++ b/drivers/cpuidle/cpuidle.c
> @@ -18,6 +18,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #include "cpuidle.h"
> @@ -53,6 +54,24 @@ static void cpuidle_kick_cpus(void) {}
>
> static int __cpuidle_register_device(struct cpuidle_device *dev);
>
> +static inline int cpuidle_enter(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv, int index)
> +{
> + struct cpuidle_state *target_state = &drv->states[index];
> + return target_state->enter(dev, drv, index);
> +}
> +
> +static inline int cpuidle_enter_tk(struct cpuidle_device *dev,
> +struct cpuidle_driver *drv, int index)
> +{
> + return cpuidle_wrap_enter(dev, drv, index, cpuidle_enter);
> +}
> +
> +typedef int (*cpuidle_enter_t)(struct cpuidle_device *dev,
> +struct cpuidle_driver *drv, int index);
> +
> +static cpuidle_enter_t cpuidle_enter_ops;
> +
> /**
> * cpuidle_idle_call - the main idle loop
> *
> @@ -63,7 +82,6 @@ int cpuidle_idle_call(void)
> {
> struct cpuidle_device *dev = __this_cpu_read(cpuidle_devices);
> struct cpuidle_driver *drv = cpuidle_get_driver();
> - struct cpuidle_state *target_state;
> int next_state, entered_state;
>
> if (off)
> @@ -92,12 +110,10 @@ int cpuidle_idle_call(void)
> return 0;
> }
>
> - target_state = &drv->states[next_state];
> -
> trace_power_start(POWER_CSTATE, next_state, dev->cpu);
> trace_cpu_idle(next_state, dev->cpu);
>
> - entered_state = target_state->enter(dev, drv, next_state);
> + entered_state = cpuidle_enter_ops(dev, drv, next_state);
>
> trace_power_end(dev->cpu);
> trace_cpu_idle(PWR_EVENT_EXIT, dev->cpu);
> @@ -110,7 +126,8 @@ int cpuidle_idle_call(void)
> dev->states_usage[entered_state].time +=
> (unsigned long long)dev->last_residency;
> dev->states_usage[entered_state].usage++;
> - }
> + } else
> + dev->last_residency = 0;
>
> /* give the governor an opportunity to reflect on the outcome */
> if (cpuidle_curr_governor->reflect)
> @@ -164,20 +181,29 @@ void cpuidle_resume_and_unlock(void)
>
> EXPORT_SYMBOL_GPL(cpuidle_resume_and_unlock);
>
> -#ifdef CONFIG_ARCH_HAS_CPU_RELAX
> -static int poll_idle(struct cpuidle_device *dev,
> - struct cpuidle_driver *drv, int index)
> +/**
> + * cpuidle_wrap_enter - performs timekeeping and irqen around enter function
> + * @dev: pointer to a valid cpuidle_device object
> + * @drv: pointer to a valid cpuidle_driver object
> + * @index: index of the target cpuidle state.
> + */
> +int cpuidle_wrap_enter(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv, int index,
> + int (*enter)(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv, int index))
> {
> - ktime_t t1, t2;
> + ktime_t time_start, time_end;
> s64 diff;
>
> - t1 = ktime_get();
> + time_start = ktime_get();
> +
> + index = enter(dev, drv, index);
> +
> + time_end = ktime_get();
> +
> local_irq_enable();
> - while (!need_resched())
> - cpu_relax();
>
> - t2 = ktime_get();
> - diff = ktime_to_us(ktime_sub(t2, t1));
> + diff = ktime_to_us(ktime_sub(time_end, time_start));
> if (diff > INT_MAX)
> diff = INT_MAX;
>
> @@ -186,6 +212,31 @@ static int poll_idle(struct cpui
Re: [PATCH v6 0/9] Consolidate cpuidle functionality
Rob, On Wed, Feb 29, 2012 at 4:11 AM, Robert Lee wrote: > This patch series moves various functionality duplicated in platform > cpuidle drivers to the core cpuidle driver. Also, the platform irq > disabling was removed as it appears that all calls into > cpuidle_call_idle will have already called local_irq_disable(). > > NOTE to Maintainers: Platform code changes are not required due to patch 1/9 > but please review and push these platform changes as possible to allow > this consolidation to occur. > > Based on 3.3-rc5 plus recent exynos cpuidle patch (affect exynos cpuidle > only): > http://www.spinics.net/lists/linux-samsung-soc/msg09467.html > > v5 submission can be found here: > http://www.spinics.net/lists/arm-kernel/msg161596.html > Changes since v5: > * Fixed mindless bug in CONFIG_ARCH_HAS_RELAX code in > drivers/cpuidle/cpuidle.c > * Removed inline from wrapper function (thanks Mike Turquette and Rob Herring) > * Add zeroing out of last_residency if error value is returned (thanks Mike) > * Made drivers/cpuidle/cpuidle.c more intelligently handle en_core_tk_irqen > flag allowing removal of the if (en_core_tk_irqen) in cpuidle_idle_call > (thanks > Daniel Lezcano) > * Moved CPUIDLE_ARM_WFI_STATE macro to arch/arm/include/asm/cpuidle.h (thanks > Jean Pihet) > * Cleaned up some comments and a stray change (thanks Jean) Except the comments I sent to the list, this version looks good: Acked-by: Jean Pihet Tested OK using cpuidle in RETention and OFF modes on Beagleboard (OMAP3530 ES2.1): Tested-by: Jean Pihet Thanks & regards, Jean ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
Make necessary changes to implement time keeping and irq enabling
in the core cpuidle code. This will allow the removal of these
functionalities from various platform cpuidle implementations whose
timekeeping and irq enabling follows the form in this common code.
Signed-off-by: Robert Lee
---
arch/arm/include/asm/cpuidle.h | 14 ++
drivers/cpuidle/cpuidle.c | 90
include/linux/cpuidle.h| 13 ++
3 files changed, 99 insertions(+), 18 deletions(-)
create mode 100644 arch/arm/include/asm/cpuidle.h
diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
new file mode 100644
index 000..1d2075b
--- /dev/null
+++ b/arch/arm/include/asm/cpuidle.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_ARM_CPUIDLE_H
+#define __ASM_ARM_CPUIDLE_H
+
+/* Common ARM WFI state */
+#define CPUIDLE_ARM_WFI_STATE {\
+ .enter = cpuidle_simple_enter,\
+ .exit_latency = 1,\
+ .target_residency = 1,\
+ .flags = CPUIDLE_FLAG_TIME_VALID,\
+ .name = "WFI",\
+ .desc = "ARM core clock gating (WFI)",\
+}
+
+#endif
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 59f4261..00b02f5 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include "cpuidle.h"
@@ -53,6 +54,24 @@ static void cpuidle_kick_cpus(void) {}
static int __cpuidle_register_device(struct cpuidle_device *dev);
+static inline int cpuidle_enter(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index)
+{
+ struct cpuidle_state *target_state = &drv->states[index];
+ return target_state->enter(dev, drv, index);
+}
+
+static inline int cpuidle_enter_tk(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index)
+{
+ return cpuidle_wrap_enter(dev, drv, index, cpuidle_enter);
+}
+
+typedef int (*cpuidle_enter_t)(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index);
+
+static cpuidle_enter_t cpuidle_enter_ops;
+
/**
* cpuidle_idle_call - the main idle loop
*
@@ -63,7 +82,6 @@ int cpuidle_idle_call(void)
{
struct cpuidle_device *dev = __this_cpu_read(cpuidle_devices);
struct cpuidle_driver *drv = cpuidle_get_driver();
- struct cpuidle_state *target_state;
int next_state, entered_state;
if (off)
@@ -92,12 +110,10 @@ int cpuidle_idle_call(void)
return 0;
}
- target_state = &drv->states[next_state];
-
trace_power_start(POWER_CSTATE, next_state, dev->cpu);
trace_cpu_idle(next_state, dev->cpu);
- entered_state = target_state->enter(dev, drv, next_state);
+ entered_state = cpuidle_enter_ops(dev, drv, next_state);
trace_power_end(dev->cpu);
trace_cpu_idle(PWR_EVENT_EXIT, dev->cpu);
@@ -110,7 +126,8 @@ int cpuidle_idle_call(void)
dev->states_usage[entered_state].time +=
(unsigned long long)dev->last_residency;
dev->states_usage[entered_state].usage++;
- }
+ } else
+ dev->last_residency = 0;
/* give the governor an opportunity to reflect on the outcome */
if (cpuidle_curr_governor->reflect)
@@ -164,20 +181,29 @@ void cpuidle_resume_and_unlock(void)
EXPORT_SYMBOL_GPL(cpuidle_resume_and_unlock);
-#ifdef CONFIG_ARCH_HAS_CPU_RELAX
-static int poll_idle(struct cpuidle_device *dev,
- struct cpuidle_driver *drv, int index)
+/**
+ * cpuidle_wrap_enter - performs timekeeping and irqen around enter function
+ * @dev: pointer to a valid cpuidle_device object
+ * @drv: pointer to a valid cpuidle_driver object
+ * @index: index of the target cpuidle state.
+ */
+int cpuidle_wrap_enter(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index,
+ int (*enter)(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index))
{
- ktime_t t1, t2;
+ ktime_t time_start, time_end;
s64 diff;
- t1 = ktime_get();
+ time_start = ktime_get();
+
+ index = enter(dev, drv, index);
+
+ time_end = ktime_get();
+
local_irq_enable();
- while (!need_resched())
- cpu_relax();
- t2 = ktime_get();
- diff = ktime_to_us(ktime_sub(t2, t1));
+ diff = ktime_to_us(ktime_sub(time_end, time_start));
if (diff > INT_MAX)
diff = INT_MAX;
@@ -186,6 +212,31 @@ static int poll_idle(struct cpuidle_device *dev,
return index;
}
+int cpuidle_simple_enter(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index)
+{
+ cpu_do_idle();
+
+ return index;
+}
+
+#ifdef CONFI
Re: [PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
Hello Deepthi,
On Wed, Feb 29, 2012 at 5:13 AM, Deepthi Dharwar
wrote:
> Hi Rob,
>
>
> On 02/29/2012 08:41 AM, Robert Lee wrote:
>
>> Make necessary changes to implement time keeping and irq enabling
>> in the core cpuidle code. This will allow the removal of these
>> functionalities from various platform cpuidle implementations whose
>> timekeeping and irq enabling follows the form in this common code.
>>
>> Signed-off-by: Robert Lee
>> ---
>> arch/arm/include/asm/cpuidle.h | 14 ++
>> drivers/cpuidle/cpuidle.c | 90
>>
>> include/linux/cpuidle.h | 13 ++
>> 3 files changed, 99 insertions(+), 18 deletions(-)
>> create mode 100644 arch/arm/include/asm/cpuidle.h
>>
>> diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
>> new file mode 100644
>> index 000..1d2075b
>> --- /dev/null
>> +++ b/arch/arm/include/asm/cpuidle.h
>> @@ -0,0 +1,14 @@
>> +#ifndef __ASM_ARM_CPUIDLE_H
>> +#define __ASM_ARM_CPUIDLE_H
>> +
>> +/* Common ARM WFI state */
>> +#define CPUIDLE_ARM_WFI_STATE {\
>> + .enter = cpuidle_simple_enter,\
>> + .exit_latency = 1,\
>> + .target_residency = 1,\
>> + .flags = CPUIDLE_FLAG_TIME_VALID,\
>> + .name = "WFI",\
>> + .desc = "ARM core clock gating (WFI)",\
>> +}
>> +
>> +#endif
>> diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
>> index 59f4261..00b02f5 100644
>> --- a/drivers/cpuidle/cpuidle.c
>> +++ b/drivers/cpuidle/cpuidle.c
>> @@ -18,6 +18,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>>
>> #include "cpuidle.h"
>> @@ -53,6 +54,24 @@ static void cpuidle_kick_cpus(void) {}
>>
>> static int __cpuidle_register_device(struct cpuidle_device *dev);
>>
>> +static inline int cpuidle_enter(struct cpuidle_device *dev,
>> + struct cpuidle_driver *drv, int index)
>> +{
>> + struct cpuidle_state *target_state = &drv->states[index];
>> + return target_state->enter(dev, drv, index);
>> +}
>> +
>> +static inline int cpuidle_enter_tk(struct cpuidle_device *dev,
>> + struct cpuidle_driver *drv, int index)
>> +{
>> + return cpuidle_wrap_enter(dev, drv, index, cpuidle_enter);
>> +}
>> +
>> +typedef int (*cpuidle_enter_t)(struct cpuidle_device *dev,
>> + struct cpuidle_driver *drv, int index);
>> +
>> +static cpuidle_enter_t cpuidle_enter_ops;
>> +
>> /**
>> * cpuidle_idle_call - the main idle loop
>> *
>> @@ -63,7 +82,6 @@ int cpuidle_idle_call(void)
>> {
>> struct cpuidle_device *dev = __this_cpu_read(cpuidle_devices);
>> struct cpuidle_driver *drv = cpuidle_get_driver();
>> - struct cpuidle_state *target_state;
>> int next_state, entered_state;
>>
>> if (off)
>> @@ -92,12 +110,10 @@ int cpuidle_idle_call(void)
>> return 0;
>> }
>>
>> - target_state = &drv->states[next_state];
>> -
>> trace_power_start(POWER_CSTATE, next_state, dev->cpu);
>> trace_cpu_idle(next_state, dev->cpu);
>>
>> - entered_state = target_state->enter(dev, drv, next_state);
>> + entered_state = cpuidle_enter_ops(dev, drv, next_state);
>>
>> trace_power_end(dev->cpu);
>> trace_cpu_idle(PWR_EVENT_EXIT, dev->cpu);
>> @@ -110,7 +126,8 @@ int cpuidle_idle_call(void)
>> dev->states_usage[entered_state].time +=
>> (unsigned long long)dev->last_residency;
>> dev->states_usage[entered_state].usage++;
>> - }
>> + } else
>> + dev->last_residency = 0;
>>
>> /* give the governor an opportunity to reflect on the outcome */
>> if (cpuidle_curr_governor->reflect)
>> @@ -164,20 +181,29 @@ void cpuidle_resume_and_unlock(void)
>>
>> EXPORT_SYMBOL_GPL(cpuidle_resume_and_unlock);
>>
>> -#ifdef CONFIG_ARCH_HAS_CPU_RELAX
>> -static int poll_idle(struct cpuidle_device *dev,
>> - struct cpuidle_driver *drv, int index)
>> +/**
>> + * cpuidle_wrap_enter - performs timekeeping and irqen around enter function
>> + * @dev: pointer to a valid cpuidle_device object
>> + * @drv: pointer to a valid cpuidle_driver object
>> + * @index: index of the target cpuidle state.
>> + */
>> +int cpuidle_wrap_enter(struct cpuidle_device *dev,
>> + struct cpuidle_driver *drv, int index,
>> + int (*enter)(struct cpuidle_device *dev,
>> + struct cpuidle_driver *drv, int index))
>> {
>> - ktime_t t1, t2;
>> + ktime_t time_start, time_end;
>> s64 diff;
>>
>> - t1 = ktime_get();
>> + time_start = ktime_get();
>> +
>> + index = enter(dev, drv, index);
>> +
>> + time_end = ktime_get();
>> +
>> local_irq_enable();
>> - while (!need_resched())
>> - cpu_relax();
>>
>> - t2 = ktime_get();
>> - diff = ktime_t
Re: [PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
On Wed, Feb 29, 2012 at 2:30 AM, Jean Pihet wrote: > Hi Rob, > > On Wed, Feb 29, 2012 at 4:11 AM, Robert Lee wrote: >> Make necessary changes to implement time keeping and irq enabling >> in the core cpuidle code. This will allow the removal of these >> functionalities from various platform cpuidle implementations whose >> timekeeping and irq enabling follows the form in this common code. >> >> Signed-off-by: Robert Lee >> --- >> arch/arm/include/asm/cpuidle.h | 14 ++ >> drivers/cpuidle/cpuidle.c | 90 >> >> include/linux/cpuidle.h | 13 ++ >> 3 files changed, 99 insertions(+), 18 deletions(-) >> create mode 100644 arch/arm/include/asm/cpuidle.h >> > ... > >> diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c >> index 59f4261..00b02f5 100644 >> --- a/drivers/cpuidle/cpuidle.c >> +++ b/drivers/cpuidle/cpuidle.c > ... > >> @@ -110,7 +126,8 @@ int cpuidle_idle_call(void) >> dev->states_usage[entered_state].time += >> (unsigned long long)dev->last_residency; >> dev->states_usage[entered_state].usage++; >> - } >> + } else >> + dev->last_residency = 0; > Braces are required here, according to the coding style doc. Thanks. > > ... > > Regards, > Jean ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH v6 5/9] ARM: davinci: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-davinci/cpuidle.c | 78 +++---
1 files changed, 31 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index a30c7c5..6f457f1 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include
@@ -30,12 +31,42 @@ struct davinci_ops {
u32 flags;
};
+/* Actual code that puts the SoC in different idle states */
+static int davinci_enter_idle(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv,
+ int index)
+{
+ struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
+ struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
+
+ if (ops && ops->enter)
+ ops->enter(ops->flags);
+
+ return cpuidle_wrap_enter(dev, drv, index,
+ cpuidle_simple_enter);
+
+ if (ops && ops->exit)
+ ops->exit(ops->flags);
+
+ return index;
+}
+
/* fields in davinci_ops.flags */
#define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDNBIT(0)
static struct cpuidle_driver davinci_idle_driver = {
.name = "cpuidle-davinci",
.owner = THIS_MODULE,
+ .states[0] = CPUIDLE_ARM_WFI_STATE,
+ .states[1] = {
+ .enter = davinci_enter_idle,
+ .exit_latency = 10,
+ .target_residency = 10,
+ .flags = CPUIDLE_FLAG_TIME_VALID,
+ .name = "DDR SR",
+ .desc = "WFI and DDR Self Refresh",
+ },
+ .state_count = DAVINCI_CPUIDLE_MAX_STATES,
};
static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
@@ -77,41 +108,10 @@ static struct davinci_ops
davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
},
};
-/* Actual code that puts the SoC in different idle states */
-static int davinci_enter_idle(struct cpuidle_device *dev,
- struct cpuidle_driver *drv,
- int index)
-{
- struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
- struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
- struct timeval before, after;
- int idle_time;
-
- local_irq_disable();
- do_gettimeofday(&before);
-
- if (ops && ops->enter)
- ops->enter(ops->flags);
- /* Wait for interrupt state */
- cpu_do_idle();
- if (ops && ops->exit)
- ops->exit(ops->flags);
-
- do_gettimeofday(&after);
- local_irq_enable();
- idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
- (after.tv_usec - before.tv_usec);
-
- dev->last_residency = idle_time;
-
- return index;
-}
-
static int __init davinci_cpuidle_probe(struct platform_device *pdev)
{
int ret;
struct cpuidle_device *device;
- struct cpuidle_driver *driver = &davinci_idle_driver;
struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
@@ -123,27 +123,11 @@ static int __init davinci_cpuidle_probe(struct
platform_device *pdev)
ddr2_reg_base = pdata->ddr2_ctlr_base;
- /* Wait for interrupt state */
- driver->states[0].enter = davinci_enter_idle;
- driver->states[0].exit_latency = 1;
- driver->states[0].target_residency = 1;
- driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
- strcpy(driver->states[0].name, "WFI");
- strcpy(driver->states[0].desc, "Wait for interrupt");
-
- /* Wait for interrupt and DDR self refresh state */
- driver->states[1].enter = davinci_enter_idle;
- driver->states[1].exit_latency = 10;
- driver->states[1].target_residency = 1;
- driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
- strcpy(driver->states[1].name, "DDR SR");
- strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
if (pdata->ddr2_pdown)
davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);
device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
- driver->state_count = DAVINCI_CPUIDLE_MAX_STATES;
ret = cpuidle_register_driver(&davinci_idle_driver);
if (ret) {
--
1.7.1
___
linaro-dev mailing list
linaro-dev@lists.linaro.org
http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH v6 3/9] ARM: exynos: Consolidate time keeping and irq enable
Hi,
I verified this patch on exynos4 based origen board.
Tested-by: Amit Daniel
Thanks,
Amit D
On 29 February 2012 08:41, Robert Lee wrote:
> Enable core cpuidle timekeeping and irq enabling and remove that
> handling from this code.
>
> Signed-off-by: Robert Lee
> ---
> arch/arm/mach-exynos/cpuidle.c | 53 ---
> 1 files changed, 6 insertions(+), 47 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
> index 9bf6743..75bb88b 100644
> --- a/arch/arm/mach-exynos/cpuidle.c
> +++ b/arch/arm/mach-exynos/cpuidle.c
> @@ -20,6 +20,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -34,22 +35,12 @@
>
> #define S5P_CHECK_AFTR 0xFCBA0D10
>
> -static int exynos4_enter_idle(struct cpuidle_device *dev,
> - struct cpuidle_driver *drv,
> - int index);
> static int exynos4_enter_lowpower(struct cpuidle_device *dev,
> struct cpuidle_driver *drv,
> int index);
>
> static struct cpuidle_state exynos4_cpuidle_set[] = {
> - [0] = {
> - .enter = exynos4_enter_idle,
> - .exit_latency = 1,
> - .target_residency = 10,
> - .flags = CPUIDLE_FLAG_TIME_VALID,
> - .name = "C0",
> - .desc = "ARM clock gating(WFI)",
> - },
> + [0] = CPUIDLE_ARM_WFI_STATE,
> [1] = {
> .enter = exynos4_enter_lowpower,
> .exit_latency = 300,
> @@ -63,8 +54,9 @@ static struct cpuidle_state exynos4_cpuidle_set[] = {
> static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
>
> static struct cpuidle_driver exynos4_idle_driver = {
> - .name = "exynos4_idle",
> - .owner = THIS_MODULE,
> + .name = "exynos4_idle",
> + .owner = THIS_MODULE,
> + .en_core_tk_irqen = 1,
> };
>
> /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
> @@ -103,13 +95,8 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device
> *dev,
> struct cpuidle_driver *drv,
> int index)
> {
> - struct timeval before, after;
> - int idle_time;
> unsigned long tmp;
>
> - local_irq_disable();
> - do_gettimeofday(&before);
> -
> exynos4_set_wakeupmask();
>
> /* Set value of power down register for aftr mode */
> @@ -148,34 +135,6 @@ static int exynos4_enter_core0_aftr(struct
> cpuidle_device *dev,
> /* Clear wakeup state register */
> __raw_writel(0x0, S5P_WAKEUP_STAT);
>
> - do_gettimeofday(&after);
> -
> - local_irq_enable();
> - idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
> - (after.tv_usec - before.tv_usec);
> -
> - dev->last_residency = idle_time;
> - return index;
> -}
> -
> -static int exynos4_enter_idle(struct cpuidle_device *dev,
> - struct cpuidle_driver *drv,
> - int index)
> -{
> - struct timeval before, after;
> - int idle_time;
> -
> - local_irq_disable();
> - do_gettimeofday(&before);
> -
> - cpu_do_idle();
> -
> - do_gettimeofday(&after);
> - local_irq_enable();
> - idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
> - (after.tv_usec - before.tv_usec);
> -
> - dev->last_residency = idle_time;
> return index;
> }
>
> @@ -190,7 +149,7 @@ static int exynos4_enter_lowpower(struct cpuidle_device
> *dev,
> new_index = drv->safe_state_index;
>
> if (new_index == 0)
> - return exynos4_enter_idle(dev, drv, new_index);
> + return cpuidle_simple_enter(dev, drv, new_index);
> else
> return exynos4_enter_core0_aftr(dev, drv, new_index);
> }
> --
> 1.7.1
>
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[PATCH v6 6/9] ARM: omap: Consolidate OMAP3 time keeping and irq enable
Use core cpuidle timekeeping and irqen wrapper and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/arm/mach-omap2/cpuidle34xx.c | 42 +++--
1 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 464cffd..5358664 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -87,29 +87,14 @@ static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
return 0;
}
-/**
- * omap3_enter_idle - Programs OMAP3 to enter the specified state
- * @dev: cpuidle device
- * @drv: cpuidle driver
- * @index: the index of state to be entered
- *
- * Called from the CPUidle framework to program the device to the
- * specified target state selected by the governor.
- */
-static int omap3_enter_idle(struct cpuidle_device *dev,
+static int __omap3_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
struct omap3_idle_statedata *cx =
cpuidle_get_statedata(&dev->states_usage[index]);
- struct timespec ts_preidle, ts_postidle, ts_idle;
u32 mpu_state = cx->mpu_state, core_state = cx->core_state;
- int idle_time;
-
- /* Used to keep track of the total time in idle */
- getnstimeofday(&ts_preidle);
- local_irq_disable();
local_fiq_disable();
pwrdm_set_next_pwrst(mpu_pd, mpu_state);
@@ -148,22 +133,29 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
}
return_sleep_time:
- getnstimeofday(&ts_postidle);
- ts_idle = timespec_sub(ts_postidle, ts_preidle);
- local_irq_enable();
local_fiq_enable();
- idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
- USEC_PER_SEC;
-
- /* Update cpuidle counters */
- dev->last_residency = idle_time;
-
return index;
}
/**
+ * omap3_enter_idle - Programs OMAP3 to enter the specified state
+ * @dev: cpuidle device
+ * @drv: cpuidle driver
+ * @index: the index of state to be entered
+ *
+ * Called from the CPUidle framework to program the device to the
+ * specified target state selected by the governor.
+ */
+static inline int omap3_enter_idle(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv,
+ int index)
+{
+ return cpuidle_wrap_enter(dev, drv, index, __omap3_enter_idle);
+}
+
+/**
* next_valid_state - Find next valid C-state
* @dev: cpuidle device
* @drv: cpuidle driver
--
1.7.1
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Re: [PATCH 1/2] vmalloc: use ZERO_SIZE_PTR / ZERO_OR_NULL_PTR
On Wed, Feb 29, 2012 at 10:53:13AM +0400, Dmitry Antipov wrote: > On 02/28/2012 05:30 PM, Dan Carpenter wrote: > > >Could you include that in the changelog when the final version is > >ready? > > What changelog you're saying about? > The commit message to this patch. Right now it just says "fix vmalloc" but it doesn't say what the bug is or why the new version is better. You and Rusty know the reasons already but we should write them down in the changelog so other people can follow along as well. regards, dan carpenter signature.asc Description: Digital signature ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH 2/2] USB: ehci-s5p: add DMA burst support
DMA burst support is added to improve performance in EHCI data
transfer. The USB EHCI controller on Exynos SoCs can use INCR16,
INCR8, and INCR4 mode. These modes of INSNREG00 register should
be set in order to enable DMA burst transfer. This feature is
also related to AHB spec.
Signed-off-by: Jingoo Han
Cc: Sangwook Lee
---
drivers/usb/host/ehci-s5p.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
index 293f741..465861b 100644
--- a/drivers/usb/host/ehci-s5p.c
+++ b/drivers/usb/host/ehci-s5p.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
struct s5p_ehci_hcd {
struct device *dev;
@@ -128,6 +129,9 @@ static int __devinit s5p_ehci_probe(struct platform_device
*pdev)
ehci->regs = hcd->regs +
HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
+ /* DMA burst Enable */
+ writel(EHCI_ENABLE_DMA_INCR, EHCI_INSNREG00(hcd->regs));
+
dbg_hcs_params(ehci, "reset");
dbg_hcc_params(ehci, "reset");
@@ -234,6 +238,9 @@ static int s5p_ehci_resume(struct device *dev)
if (pdata && pdata->phy_init)
pdata->phy_init(pdev, S5P_USB_PHY_HOST);
+ /* DMA burst Enable */
+ writel(EHCI_ENABLE_DMA_INCR, EHCI_INSNREG00(hcd->regs));
+
if (time_before(jiffies, ehci->next_statechange))
msleep(100);
--
1.7.1
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Re: [PATCH v6 5/9] ARM: davinci: Consolidate time keeping and irq enable
Rob,
On Wed, Feb 29, 2012 at 4:11 AM, Robert Lee wrote:
> Enable core cpuidle timekeeping and irq enabling and remove that
> handling from this code.
>
> Signed-off-by: Robert Lee
> ---
> arch/arm/mach-davinci/cpuidle.c | 78 +++---
> 1 files changed, 31 insertions(+), 47 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
> index a30c7c5..6f457f1 100644
> --- a/arch/arm/mach-davinci/cpuidle.c
> +++ b/arch/arm/mach-davinci/cpuidle.c
...
> @@ -30,12 +31,42 @@ struct davinci_ops {
> u32 flags;
> };
>
> +/* Actual code that puts the SoC in different idle states */
> +static int davinci_enter_idle(struct cpuidle_device *dev,
> + struct cpuidle_driver *drv,
> + int index)
> +{
> + struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
> + struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
> +
> + if (ops && ops->enter)
> + ops->enter(ops->flags);
> +
> + return cpuidle_wrap_enter(dev, drv, index,
> + cpuidle_simple_enter);
This does not look right since ops->exit will never be called.
> +
> + if (ops && ops->exit)
> + ops->exit(ops->flags);
> +
> + return index;
> +}
> +
...
Regards,
Jean
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[PATCH v6 9/9] SH: shmobile: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: Robert Lee
---
arch/sh/kernel/cpu/shmobile/cpuidle.c | 10 +++---
1 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c
b/arch/sh/kernel/cpu/shmobile/cpuidle.c
index 6d62eb4..1ddc876 100644
--- a/arch/sh/kernel/cpu/shmobile/cpuidle.c
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -29,7 +29,6 @@ static int cpuidle_sleep_enter(struct cpuidle_device *dev,
int index)
{
unsigned long allowed_mode = SUSP_SH_SLEEP;
- ktime_t before, after;
int requested_state = index;
int allowed_state;
int k;
@@ -47,19 +46,16 @@ static int cpuidle_sleep_enter(struct cpuidle_device *dev,
*/
k = min_t(int, allowed_state, requested_state);
- before = ktime_get();
sh_mobile_call_standby(cpuidle_mode[k]);
- after = ktime_get();
-
- dev->last_residency = (int)ktime_to_ns(ktime_sub(after, before)) >> 10;
return k;
}
static struct cpuidle_device cpuidle_dev;
static struct cpuidle_driver cpuidle_driver = {
- .name = "sh_idle",
- .owner =THIS_MODULE,
+ .name = "sh_idle",
+ .owner = THIS_MODULE,
+ .en_core_tk_irqen = 1,
};
void sh_mobile_setup_cpuidle(void)
--
1.7.1
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Re: [PATCH-WIP 01/13] xen/arm: use r12 to pass the hypercall number to the hypervisor
On Wed, 2012-02-29 at 12:58 +, Dave Martin wrote: > On Wed, Feb 29, 2012 at 09:56:02AM +, Ian Campbell wrote: > > On Wed, 2012-02-29 at 09:34 +, Dave Martin wrote: > > > On Tue, Feb 28, 2012 at 12:28:29PM +, Stefano Stabellini wrote: > > > > > > I don't have a very strong opinion on which register we should use, but > > > > I would like to avoid r7 if it is already actively used by gcc. > > > > > > But there is no framepointer for Thumb-2 code (?) > > > > Peter Maydell suggested there was: > > > r7 is (used by gcc as) the Thumb frame pointer; I don't know if this > > > makes it worth avoiding in this context. > > > > Sounds like it might be a gcc-ism, possibly a non-default option? > > > > Anyway, I think r12 will be fine for our purposes so the point is rather > > moot. > > Just had a chat with some tools guys -- apparently, when passing register > arguments to gcc inline asms there really isn't a guarantee that those > variables will be in the expected registers on entry to the inline asm. > > If gcc reorders other function calls or other code around the inline asm > (which it can do, except under certain controlled situations), then > intervening code can clobber any registers in general. > > Or, to summarise another way, there is no way to control which register > is used to pass something to an inline asm in general (often we get away > with this, and there are a lot of inline asms in the kernel that assume > it works, but the more you inline the more likely you are to get nasty > surprises). There is no workaroud, except on some architectures where > special asm constraints allow specific individual registers to be > specified for operands (i386 for example). I had assumed I just couldn't find the right syntax. Useful to know that I couldn't find it because it doesn't exist! > If you need a specific register, this means that you must set up that > register explicitly inside the asm if you want a guarantee that the > code will work: > > asm volatile ( > "movw r12, %[hvc_num]\n\t" Is gcc (or gas?) smart enough to optimise this away if it turns out that %[hvc_num] == r12? > ... > "hvc#0" > :: [hvc_num] "i" (NUMBER) : "r12" > ); > > Of course, if you need to set up more than about 5 or 6 registers in > this way, the doubled register footprint means that the compiler will > have to start spilling stuff to the stack. > > > This is the kind of problem which goes away when out-of-lining the > hvc wrapper behind a C function interface, since the ABI then provides > guarantees about how values are mershaled into and out of that code. I don't think anything would stop gcc from clobbering an argument register right on function entry (e..g it might move r0 to r8 and clobber r0, for whatever reason), so that they are no longer where you expect them to be when you hit the asm. Unlikely perhaps but no more so than the other issues you've raised? Or did you mean out-of-line as in "written in a .S file" as well as out of line? > Notwithstanding the above, even if we do make theoretically unsound > (but often true) assumptions about inline asms, ARM will be no worse > than other arches in this respect. This is true. > Other than serving as a reminder that inline asm is a deep can of > worms, this doesn't really give us a neat solution... How are system calls implemented on the userspace side? I confess I don't know what the ARM syscall ABI looks like -- is it all registers or is some of it on the stack? It sounds like the solution ought to be pretty similar though. Ian. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
[PATCH 1/2] ARM: EXYNOS: Add USB HOST register definitions
This patch adds USB HOST register definitions. The definition for EHCI INSNREG00 regiser and corresponding bit field definitions are added. Signed-off-by: Jingoo Han --- arch/arm/mach-exynos/include/mach/regs-usb-host.h | 23 + 1 files changed, 23 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-exynos/include/mach/regs-usb-host.h diff --git a/arch/arm/mach-exynos/include/mach/regs-usb-host.h b/arch/arm/mach-exynos/include/mach/regs-usb-host.h new file mode 100644 index 000..1a60f27 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/regs-usb-host.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2012 Samsung Electronics Co.Ltd + * http://www.samsung.com + * + * EXYNOS - USB HOST register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __REGS_USB_HOST_H +#define __REGS_USB_HOST_H __FILE__ + +#define EHCI_INSNREG00(base) (base + 0x90) +#define EHCI_ENA_INCR16(0x1 << 25) +#define EHCI_ENA_INCR8 (0x1 << 24) +#define EHCI_ENA_INCR4 (0x1 << 23) +#define EHCI_ENA_INCRX_ALIGN (0x1 << 22) +#define EHCI_ENABLE_DMA_INCR (EHCI_ENA_INCR16 | EHCI_ENA_INCR8| \ +EHCI_ENA_INCR4 | EHCI_ENA_INCRX_ALIGN) + +#endif /* __REGS_USB_HOST_H */ -- 1.7.1 ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [RFC PATCH] module: debugging check for runaway kthreads
On Tue, 28 Feb 2012 13:04:23 +0400
Dmitry Antipov wrote:
> Debugging option CONFIG_MODULE_KTHREAD_CHECK provides a way to check
> whether all kernel threads created by the module and have used module
> code as a thread worker function are really exited when the module is
> unloaded. The following pseudo-code contains example of an error which
> is likely to be catched with this debugging check:
>
> static struct task_struct *tsk;
> static DECLARE_COMPLETION(done);
>
> static void *func(void *unused)
> {
> while (!kthread_should_stop())
> real_work();
> complete(&done);
> }
>
> static int __init modinit(void)
> {
> tsk = kthread_run(func, NULL, "func");
> return IS_ERR(tsk) ? PTR_ERR(tsk) : 0;
> }
>
> static void __exit modexit(void)
> {
> wait_for_completion(&done);
> }
Might be a little bit useful. But I don't recall us having this bug in
quite a long time.
> index 0714b24..33897c3 100644
> --- a/include/linux/kthread.h
> +++ b/include/linux/kthread.h
> @@ -13,6 +13,11 @@ struct task_struct *kthread_create_on_node(int
> (*threadfn)(void *data),
> #define kthread_create(threadfn, data, namefmt, arg...) \
> kthread_create_on_node(threadfn, data, -1, namefmt, ##arg)
>
> +#ifdef CONFIG_MODULE_KTHREAD_CHECK
> +unsigned long get_kthread_func(struct task_struct *tsk);
> +#else
> +#define get_kthread_func(tsk, addr, mod) (0)
> +#endif
This won't compile if CONFIG_MODULE_KTHREAD_CHECK=n.
Please make the stub function a proper C function, not a macro. It
provides type checking, can prevent compile warnings and is generally
easier on the eyes.
> --- a/init/Kconfig
> +++ b/init/Kconfig
> @@ -1397,6 +1397,15 @@ config MODULE_FORCE_UNLOAD
> rmmod). This is mainly for kernel developers and desperate users.
> If unsure, say N.
>
> +config MODULE_KTHREAD_CHECK
> + bool "Check for runaway kernel threads at module unload"
> + depends on MODULE_UNLOAD && EXPERIMENTAL && DEBUG_KERNEL
> + help
> + This option allows you to check whether all kernel threads created
> + by the module and have used module code as a thread worker function
> + are really exited when the module is unloaded. This is mainly for
> + module developers. If insure, say N.
I think this should be under the kernel hacking menu, dependent on
CONFIG_DEBUG_KERNEL, in lib/Kconfig.debug.
> config MODVERSIONS
> bool "Module versioning support"
> help
> diff --git a/kernel/kthread.c b/kernel/kthread.c
> index 3d3de63..5c53817 100644
> --- a/kernel/kthread.c
> +++ b/kernel/kthread.c
> @@ -38,6 +38,9 @@ struct kthread_create_info
>
> struct kthread {
> int should_stop;
> +#ifdef CONFIG_MODULE_KTHREAD_CHECK
> + void *fn;
> +#endif
A little comment describing what this field is for would be nice.
> void *data;
> struct completion exited;
> };
> @@ -45,6 +48,24 @@ struct kthread {
> #define to_kthread(tsk) \
> container_of((tsk)->vfork_done, struct kthread, exited)
>
> +#ifdef CONFIG_MODULE_KTHREAD_CHECK
> +
> +unsigned long get_kthread_func(struct task_struct *tsk)
> +{
> + struct kthread *kt;
> + unsigned long addr;
> +
> + get_task_struct(tsk);
> + BUG_ON(!(tsk->flags & PF_KTHREAD));
> + kt = to_kthread(tsk);
> + barrier();
> + addr = tsk->vfork_done ? (unsigned long)kt->fn : 0UL;
> + put_task_struct(tsk);
> + return addr;
> +}
gack, I hadn't noticed the kthread ab^wre^wuse of vfork_done before.
Kooky. Undocumented, too.
> +#endif /* CONFIG_MODULE_KTHREAD_CHECK */
> +
> /**
> * kthread_should_stop - should this kthread return now?
> *
> @@ -106,6 +127,9 @@ static int kthread(void *_create)
> int ret;
>
> self.should_stop = 0;
> +#ifdef CONFIG_MODULE_KTHREAD_CHECK
> + self.fn = threadfn;
> +#endif
> self.data = data;
> init_completion(&self.exited);
> current->vfork_done = &self.exited;
> diff --git a/kernel/module.c b/kernel/module.c
> index 2c93276..fe6637b 100644
> --- a/kernel/module.c
> +++ b/kernel/module.c
> @@ -45,6 +45,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -764,6 +765,49 @@ static void wait_for_zero_refcount(struct module *mod)
> mutex_lock(&module_mutex);
> }
>
> +#ifdef CONFIG_KALLSYMS
> +static const char *get_ksymbol(struct module *mod, unsigned long addr,
> +unsigned long *size, unsigned long *offset);
> +#else
> +#define get_ksymbol(mod, addr, size, offset) NULL
> +#endif
Can this code block be moved to after the get_ksymbol() definition so
the forward declaration is unneeded?
Did we really need to use the internal get_ksymbol(), rather than an
official kallsyms interface function?
The CONFIG_KALLSYMS=n stub should be written in C. Make it return
"" and the ?: in check_kthreads() can be done away with.
> +#ifdef CONFIG_MODULE_KTHREAD_CHECK
> +
> +static void check_kthreads(struct module
RE: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
Hi,
> -Original Message-
> From: Thomas Abraham [mailto:thomas.abra...@linaro.org]
> Sent: Wednesday, February 29, 2012 10:02 PM
> To: Sangwook Lee
> Cc: linux-samsung-...@vger.kernel.org; linux-...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org;
> ben-li...@fluff.org; gre...@suse.de; kgene@samsung.com;
> st...@rowland.harvard.edu;
> jg1@samsung.com; jy0922.s...@samsung.com; patc...@linaro.org;
> linaro-dev@lists.linaro.org;
> li...@arm.linux.org.uk
> Subject: Re: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
>
> Hi Sangwook,
>
> On 29 February 2012 18:11, Sangwook Lee wrote:
> > Enable burst transfer from AHB for EHCI.
> > This fixes data transfer of USB Ethernet with EHCI.
> > Without this patch, scp hardly works.
> >
> > Signed-off-by: Sangwook Lee
> > ---
> > arch/arm/mach-exynos/setup-usb-phy.c | 6 ++
> > arch/arm/plat-samsung/devs.c | 2 ++
> > arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
> > 3 files changed, 27 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
> > b/arch/arm/mach-exynos/setup-usb-phy.c
> > index 41743d2..5a20460 100644
> > --- a/arch/arm/mach-exynos/setup-usb-phy.c
> > +++ b/arch/arm/mach-exynos/setup-usb-phy.c
> > @@ -18,6 +18,7 @@
> > #include
> > #include
> > #include
> > +#include
> >
> > static atomic_t host_usage;
> >
> > @@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int
> > type)
> >
> > return -EINVAL;
> > }
> > +
> > +void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem
> > *base)
> > +{
> > + writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
> > +}
>
> This functionality can be added in ehci-s5p itself and avoid adding a
> new platform callback in platform data. If this is specific to exynos,
> driver data could be added in ehci-s5p to indicate platforms that need
> this to be enabled.
I agree with Thomas's opinion.
Sangwook, please don't call s5p_ehci_burst_enable using platform callback.
It can be added to ehci-s5p itself.
>
> Thanks,
> Thomas.
>
> [...]
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RE: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
Hi, Sangwook.
I know what you want to add.
I'll send new patch which can enable EHCI burst mode.
This new patch will not use platform data callback and different machine
directory
file to include EHCI INSNREG00 definitions.
Also, comment will be modified properly.
Thank you.
Best regards,
Jingoo Han.
> -Original Message-
> From: Sangwook Lee [mailto:sangwook@linaro.org]
> Sent: Wednesday, February 29, 2012 9:41 PM
> To: linux-samsung-...@vger.kernel.org; linux-...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org
> Cc: ben-li...@fluff.org; gre...@suse.de; kgene@samsung.com;
> st...@rowland.harvard.edu;
> jg1@samsung.com; jy0922.s...@samsung.com; patc...@linaro.org;
> linaro-dev@lists.linaro.org;
> li...@arm.linux.org.uk; Sangwook Lee
> Subject: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
>
> Enable burst transfer from AHB for EHCI.
> This fixes data transfer of USB Ethernet with EHCI.
> Without this patch, scp hardly works.
>
> Signed-off-by: Sangwook Lee
> ---
> arch/arm/mach-exynos/setup-usb-phy.c |6 ++
> arch/arm/plat-samsung/devs.c |2 ++
> arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
> 3 files changed, 27 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
> b/arch/arm/mach-exynos/setup-usb-phy.c
> index 41743d2..5a20460 100644
> --- a/arch/arm/mach-exynos/setup-usb-phy.c
> +++ b/arch/arm/mach-exynos/setup-usb-phy.c
> @@ -18,6 +18,7 @@
> #include
> #include
> #include
> +#include
>
> static atomic_t host_usage;
>
> @@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int
> type)
>
> return -EINVAL;
> }
> +
> +void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem *base)
> +{
> + writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
> +}
> diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
> index f10768e..8fd1bd3 100644
> --- a/arch/arm/plat-samsung/devs.c
> +++ b/arch/arm/plat-samsung/devs.c
> @@ -1402,6 +1402,8 @@ void __init s5p_ehci_set_platdata(struct
> s5p_ehci_platdata *pd)
> npd->phy_init = s5p_usb_phy_init;
> if (!npd->phy_exit)
> npd->phy_exit = s5p_usb_phy_exit;
> + if (!npd->burst_enable)
> + npd->burst_enable = s5p_ehci_burst_enable;
> }
> #endif /* CONFIG_S5P_DEV_USB_EHCI */
>
> diff --git a/arch/arm/plat-samsung/include/plat/ehci.h
> b/arch/arm/plat-samsung/include/plat/ehci.h
> index 5f28cae..9c866b7 100644
> --- a/arch/arm/plat-samsung/include/plat/ehci.h
> +++ b/arch/arm/plat-samsung/include/plat/ehci.h
> @@ -14,8 +14,27 @@
> struct s5p_ehci_platdata {
> int (*phy_init)(struct platform_device *pdev, int type);
> int (*phy_exit)(struct platform_device *pdev, int type);
> + void (*burst_enable)(struct platform_device *pdev, void __iomem *base);
> };
>
> extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
> +extern void s5p_ehci_burst_enable(struct platform_device *pdev,
> + void __iomem *base);
> +
> +/* EHCI EXYNOS specific register */
> +#define EHCI_INSNREG00 0x90
> +
> +/*
> + * EHCI INSNREG00 Specific fields
> + * Enable AHB master to use burst transfer from 4 to 16
> + */
> +#define EHCI_INSNREG00_ENABLE_INCR16 (1 << 25)
> +#define EHCI_INSNREG00_ENABLE_INCR8 (1 << 24)
> +#define EHCI_INSNREG00_ENABLE_INCR4 (1 << 23)
> +/* Force AHB master to start burst transfer only for 4,8,16 alignment */
> +#define EHCI_INSNREG00_ENABLE_INCRX_ALIGN (1 << 22)
> +#define EHCI_INSNREG00_ENABLE_BURST \
> + (EHCI_INSNREG00_ENABLE_INCR16 | EHCI_INSNREG00_ENABLE_INCR8 | \
> + EHCI_INSNREG00_ENABLE_INCR4 | EHCI_INSNREG00_ENABLE_INCRX_ALIGN)
>
> #endif /* __PLAT_SAMSUNG_EHCI_H */
> --
> 1.7.4.1
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Is LatencyTOP dead?
Are there any efforts going on LatencyTOP? Is it dead? Is it canceled in favor of another similar project? Dmitry ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Rant about binary blobs on #img
Come one and all to change the world -- Zach Pfeffer Android Platform Team Lead, Linaro Platform Teams Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: Rant about binary blobs on #img
+++ Zach Pfeffer [2012-02-29 11:38 -0600]: > Come one and all to change the world Difficult without some clue as to what '#img' might be or where it might be found. IRC channel? twitter hashtag? some website I've never heard of? Something else? Wookey -- Principal hats: Linaro, Emdebian, Wookware, Balloonboard, ARM http://wookware.org/ ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: Rant about binary blobs on #img
On 29 February 2012 11:42, Wookey wrote: > +++ Zach Pfeffer [2012-02-29 11:38 -0600]: >> Come one and all to change the world > > Difficult without some clue as to what '#img' might be or where it might > be found. IRC channel? twitter hashtag? some website I've never heard > of? Something else? Sorry Wookie. Its on #img on irc.freenode.net. > Wookey > -- > Principal hats: Linaro, Emdebian, Wookware, Balloonboard, ARM > http://wookware.org/ > > ___ > linaro-dev mailing list > linaro-dev@lists.linaro.org > http://lists.linaro.org/mailman/listinfo/linaro-dev -- Zach Pfeffer Android Platform Team Lead, Linaro Platform Teams Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 0/2] change lpj in arm smp common code
Richard Zhao writes: > The two patches were originally in [PATCH V6 0/7] add a generic cpufreq > driver. > I seperated them and hope they can go to upstream earlier. > > Richard Zhao (2): > ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp > cpufreq: OMAP: remove loops_per_jiffy recalculate for smp The first one should go into Russell's patch system. Once he queues that, I can queue the OMAP one for the CPUfreq maintainer. Kevin ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Java jogl and jogamp acceleration
I'm not sure who needs to know about this - maybe you all do already, but Xerces Ranby showed me (at FOSDEM) some cool stuff with jogl giving java stuff access to OPenGL ES hardware acceleration. His demo on an AC100 sped java games up by a factor of lots so instead of visibly slow screen redraws you got a useful frame rate of 15fps or so, turning them from useless to playable. Blog post here with destructions and links: http://labb.zafena.se/?p=532 Compatibility matrix here shows that it works with Tegra2 in AC100, and trimslice, SGX540 in panda and SGX530 in N9. It seems to be a fairly trivial matter of telling openjdk to use jogl and then 'stuff goes fast'. If we aren't doing this already in our images we probably should be. Just posting so that whoever worries about graphics and java and stuff knows about this. Wookey -- Principal hats: Linaro, Emdebian, Wookware, Balloonboard, ARM http://wookware.org/ ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
Robert Lee writes:
> Make necessary changes to implement time keeping and irq enabling
> in the core cpuidle code. This will allow the removal of these
> functionalities from various platform cpuidle implementations whose
> timekeeping and irq enabling follows the form in this common code.
>
> Signed-off-by: Robert Lee
> ---
> arch/arm/include/asm/cpuidle.h | 14 ++
> drivers/cpuidle/cpuidle.c | 90
>
> include/linux/cpuidle.h| 13 ++
> 3 files changed, 99 insertions(+), 18 deletions(-)
> create mode 100644 arch/arm/include/asm/cpuidle.h
>
> diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
> new file mode 100644
> index 000..1d2075b
> --- /dev/null
> +++ b/arch/arm/include/asm/cpuidle.h
> @@ -0,0 +1,14 @@
> +#ifndef __ASM_ARM_CPUIDLE_H
> +#define __ASM_ARM_CPUIDLE_H
> +
> +/* Common ARM WFI state */
> +#define CPUIDLE_ARM_WFI_STATE {\
> + .enter = cpuidle_simple_enter,\
> + .exit_latency = 1,\
> + .target_residency = 1,\
> + .flags = CPUIDLE_FLAG_TIME_VALID,\
> + .name = "WFI",\
> + .desc = "ARM core clock gating (WFI)",\
> +}
nit: just name this ARM WFI. Clock gating is platform specific, and
"core" has platform-specific meanings, so in order to keep this truly
generic, I think hat ARM WFI is the best name.
Kevin
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Re: [PATCH 0/4] twl-regulator DT adaptation and updates to add new regulators
On Tue, Feb 28, 2012 at 03:09:09PM +0530, Rajendra Nayak wrote: > Hi Mark, > > Here is a consolidated series which adds DT support for twl regulator > driver and adds support for VDD1/2/3 regulator and support for > fixed LDO V1V8 and V2V1. The patches are based on -next and tested > on omap3 beagle and omap4 panda boards. Applied all, thanks. Please do try to use subject lines consistent with the subsystem. signature.asc Description: Digital signature ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH v6 1/9] cpuidle: Add common time keeping and irq enabling
On Wed, Feb 29, 2012 at 12:43 PM, Kevin Hilman wrote:
> Robert Lee writes:
>
>> Make necessary changes to implement time keeping and irq enabling
>> in the core cpuidle code. This will allow the removal of these
>> functionalities from various platform cpuidle implementations whose
>> timekeeping and irq enabling follows the form in this common code.
>>
>> Signed-off-by: Robert Lee
>> ---
>> arch/arm/include/asm/cpuidle.h | 14 ++
>> drivers/cpuidle/cpuidle.c | 90
>>
>> include/linux/cpuidle.h | 13 ++
>> 3 files changed, 99 insertions(+), 18 deletions(-)
>> create mode 100644 arch/arm/include/asm/cpuidle.h
>>
>> diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
>> new file mode 100644
>> index 000..1d2075b
>> --- /dev/null
>> +++ b/arch/arm/include/asm/cpuidle.h
>> @@ -0,0 +1,14 @@
>> +#ifndef __ASM_ARM_CPUIDLE_H
>> +#define __ASM_ARM_CPUIDLE_H
>> +
>> +/* Common ARM WFI state */
>> +#define CPUIDLE_ARM_WFI_STATE {\
>> + .enter = cpuidle_simple_enter,\
>> + .exit_latency = 1,\
>> + .target_residency = 1,\
>> + .flags = CPUIDLE_FLAG_TIME_VALID,\
>> + .name = "WFI",\
>> + .desc = "ARM core clock gating (WFI)",\
>> +}
>
> nit: just name this ARM WFI. Clock gating is platform specific, and
> "core" has platform-specific meanings, so in order to keep this truly
> generic, I think hat ARM WFI is the best name.
>
Agree. I'll make that change.
> Kevin
>
>
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Re: [PATCH 1/2] ARM: EXYNOS: Add EHCI AHB burst function
On 02/29/2012 06:31 PM, Thomas Abraham wrote:
> Hi Sangwook,
>
> On 29 February 2012 18:11, Sangwook Lee wrote:
>> Enable burst transfer from AHB for EHCI.
>> This fixes data transfer of USB Ethernet with EHCI.
>> Without this patch, scp hardly works.
>>
>> Signed-off-by: Sangwook Lee
>> ---
>> arch/arm/mach-exynos/setup-usb-phy.c |6 ++
>> arch/arm/plat-samsung/devs.c |2 ++
>> arch/arm/plat-samsung/include/plat/ehci.h | 19 +++
>> 3 files changed, 27 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/setup-usb-phy.c
>> b/arch/arm/mach-exynos/setup-usb-phy.c
>> index 41743d2..5a20460 100644
>> --- a/arch/arm/mach-exynos/setup-usb-phy.c
>> +++ b/arch/arm/mach-exynos/setup-usb-phy.c
>> @@ -18,6 +18,7 @@
>> #include
>> #include
>> #include
>> +#include
>>
>> static atomic_t host_usage;
>>
>> @@ -149,3 +150,8 @@ int s5p_usb_phy_exit(struct platform_device *pdev, int
>> type)
>>
>>return -EINVAL;
>> }
>> +
>> +void s5p_ehci_burst_enable(struct platform_device *pdev, void __iomem *base)
>> +{
>> + writel(EHCI_INSNREG00_ENABLE_BURST, base + EHCI_INSNREG00);
>> +}
>
> This functionality can be added in ehci-s5p itself and avoid adding a
> new platform callback in platform data. If this is specific to exynos,
> driver data could be added in ehci-s5p to indicate platforms that need
> this to be enabled.
>
Am I right in assuming that ehci-s5p driver can also be used for
mach-s5pv210?
The related bit-fields are reserved in S5PV210. So, won't it cause any
side-effects?
> Thanks,
> Thomas.
>
> [...]
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
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Re: [PATCH 1/2] ARM: EXYNOS: Add USB HOST register definitions
On 02/29/2012 08:09 PM, Jingoo Han wrote: > This patch adds USB HOST register definitions. The definition for > EHCI INSNREG00 regiser and corresponding bit field definitions are > added. > > Signed-off-by: Jingoo Han > --- > arch/arm/mach-exynos/include/mach/regs-usb-host.h | 23 > + > 1 files changed, 23 insertions(+), 0 deletions(-) > create mode 100644 arch/arm/mach-exynos/include/mach/regs-usb-host.h > > diff --git a/arch/arm/mach-exynos/include/mach/regs-usb-host.h > b/arch/arm/mach-exynos/include/mach/regs-usb-host.h > new file mode 100644 > index 000..1a60f27 > --- /dev/null > +++ b/arch/arm/mach-exynos/include/mach/regs-usb-host.h > @@ -0,0 +1,23 @@ > +/* > + * Copyright (C) 2012 Samsung Electronics Co.Ltd > + * http://www.samsung.com > + * > + * EXYNOS - USB HOST register definitions > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#ifndef __REGS_USB_HOST_H > +#define __REGS_USB_HOST_H __FILE__ > + > +#define EHCI_INSNREG00(base) (base + 0x90) > +#define EHCI_ENA_INCR16 (0x1 << 25) > +#define EHCI_ENA_INCR8 (0x1 << 24) > +#define EHCI_ENA_INCR4 (0x1 << 23) > +#define EHCI_ENA_INCRX_ALIGN (0x1 << 22) > +#define EHCI_ENABLE_DMA_INCR (EHCI_ENA_INCR16 | EHCI_ENA_INCR8| \ > + EHCI_ENA_INCR4 | EHCI_ENA_INCRX_ALIGN) > + As per the definition of bit-fields in other registers, it would be good to prepend the complete register name before the bit-field defines. EHCI_INSNREG00_ENA_INCR16 ... Considering the similarity of this patchset with the earlier patchset from Sangwook, IMO, it would be appropriate to give him due credit in both these patches. > +#endif /* __REGS_USB_HOST_H */ -- Tushar Behera ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
RE: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
Jingoo Han wrote: > > Hi Tushar, > (please don't top-post) > > -Original Message- > > From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung-soc- > ow...@vger.kernel.org] On Behalf > > Of Tushar Behera > > Sent: Thursday, December 01, 2011 2:50 PM > > To: linux-samsung-...@vger.kernel.org > > Cc: kgene@samsung.com; linaro-dev@lists.linaro.org; > patc...@linaro.org > > Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock > > > > The framebuffer driver needs the clock named 'lcd' as its bus > > clock but the equivalent clock on Exynos4 is named as 'fimd'. > > Hence, create a clkdev lookup entry with the name 'lcd' that > > references the 'fimd' clock. > > > > Signed-off-by: Tushar Behera > > Acked-by: Jingoo Han > OK, I will apply this with Sylwester's 'reviewed-by' I looked at before. BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are still needed now, could you please re-send? Maybe I missed. Thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
Hi Kukjin, On 03/01/2012 09:36 AM, Kukjin Kim wrote: > Jingoo Han wrote: >> >> Hi Tushar, >> > > (please don't top-post) > >>> -Original Message- >>> From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung-soc- >> ow...@vger.kernel.org] On Behalf >>> Of Tushar Behera >>> Sent: Thursday, December 01, 2011 2:50 PM >>> To: linux-samsung-...@vger.kernel.org >>> Cc: kgene@samsung.com; linaro-dev@lists.linaro.org; >> patc...@linaro.org >>> Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock >>> >>> The framebuffer driver needs the clock named 'lcd' as its bus >>> clock but the equivalent clock on Exynos4 is named as 'fimd'. >>> Hence, create a clkdev lookup entry with the name 'lcd' that >>> references the 'fimd' clock. >>> >>> Signed-off-by: Tushar Behera >> >> Acked-by: Jingoo Han >> > > OK, I will apply this with Sylwester's 'reviewed-by' I looked at before. > Thanks. Do you want me rebase this patch on your latest for-next and resend? > BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are still > needed now, could you please re-send? Maybe I missed. > "[PATCH 1/3] ARM: EXYNOS: Increase DMA pool allocator size for framebuffer" - It should be dropped. "[PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen board" - It has already been applied. > Thanks. > > Best regards, > Kgene. > -- > Kukjin Kim , Senior Engineer, > SW Solution Development Team, Samsung Electronics Co., Ltd. > -- Tushar Behera ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
RE: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd clock
Tushar Behera wrote: > > Hi Kukjin, > Tushar, please don't top-post. > On 03/01/2012 09:36 AM, Kukjin Kim wrote: > > Jingoo Han wrote: > >> > >> Hi Tushar, > >> > > > > (please don't top-post) > > > >>> -Original Message- > >>> From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung- > soc- > >> ow...@vger.kernel.org] On Behalf > >>> Of Tushar Behera > >>> Sent: Thursday, December 01, 2011 2:50 PM > >>> To: linux-samsung-...@vger.kernel.org > >>> Cc: kgene@samsung.com; linaro-dev@lists.linaro.org; > >> patc...@linaro.org > >>> Subject: [PATCH 2/3] ARM: EXYNOS: Add clkdev lookup entry for lcd > clock > >>> > >>> The framebuffer driver needs the clock named 'lcd' as its bus > >>> clock but the equivalent clock on Exynos4 is named as 'fimd'. > >>> Hence, create a clkdev lookup entry with the name 'lcd' that > >>> references the 'fimd' clock. > >>> > >>> Signed-off-by: Tushar Behera > >> > >> Acked-by: Jingoo Han > >> > > > > OK, I will apply this with Sylwester's 'reviewed-by' I looked at before. > > > Thanks. Do you want me rebase this patch on your latest for-next and > resend? > Thanks but I can do it. > > BTW, Tushar, what's the [1/3] and [3/3] in this series? If they are > still > > needed now, could you please re-send? Maybe I missed. > > > "[PATCH 1/3] ARM: EXYNOS: Increase DMA pool allocator size for > framebuffer" > - It should be dropped. > > "[PATCH 3/3] ARM: EXYNOS: Invert VCLK polarity for framebuffer on Origen > board" > - It has already been applied. OK, thanks. Best regards, Kgene. -- Kukjin Kim , Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Re: [PATCH 0/4] twl-regulator DT adaptation and updates to add new regulators
On Thursday 01 March 2012 04:48 AM, Mark Brown wrote: On Tue, Feb 28, 2012 at 03:09:09PM +0530, Rajendra Nayak wrote: Hi Mark, Here is a consolidated series which adds DT support for twl regulator driver and adds support for VDD1/2/3 regulator and support for fixed LDO V1V8 and V2V1. The patches are based on -next and tested on omap3 beagle and omap4 panda boards. Applied all, thanks. Please do try to use subject lines consistent with the subsystem. Thanks Mark, will remember to keep the subject lines consistent hence forth. ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
Anybody trying to get Linaro running on AuraSlate tablet?
Hello, (Pardon if this is out-of-scope for linaro-dev mailing list ) Is there anybody trying to get Linaro to run on "cheap" AuraSlate (http://www.auraslate.com/) tablet? If you are would be nice to collaborate... This is the only affordable ARM tablet that I have found with bootrom so I am trying to figure out how one gets started running Linaro on brand new hardware... Any specific page I should look at on https://wiki.linaro.org? Regards, -Subodh Nijsure (NOT affiliated with AuraSlate in any way) ___ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
