Re: [Intel-wired-lan] [PATCH net-next v10 0/4] fix the DMA API misuse problem for page_pool
On Wed, 26 Feb 2025 19:03:35 +0800 Yunsheng Lin wrote: > This patchset fix the dma API misuse problem as below: > Networking driver with page_pool support may hand over page > still with dma mapping to network stack and try to reuse that > page after network stack is done with it and passes it back > to page_pool to avoid the penalty of dma mapping/unmapping. > With all the caching in the network stack, some pages may be > held in the network stack without returning to the page_pool > soon enough, and with VF disable causing the driver unbound, > the page_pool does not stop the driver from doing it's > unbounding work, instead page_pool uses workqueue to check > if there is some pages coming back from the network stack > periodically, if there is any, it will do the dma unmmapping > related cleanup work. Does not build :( Always do an allmodconfig build when working on subsystem-wide interfaces.. -- pw-bot: cr
[Intel-wired-lan] [tnguy-next-queue:dev-queue] BUILD SUCCESS 35a24e73c80b5582d74341af1e6ce310d209587b
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git dev-queue branch HEAD: 35a24e73c80b5582d74341af1e6ce310d209587b net: e1000e: convert to ndo_hwtstamp_get() and ndo_hwtstamp_set() elapsed time: 1449m configs tested: 62 configs skipped: 1 The following configs have been built successfully. More configs may be tested in the coming days. tested configs: alpha allyesconfiggcc-14.2.0 arc randconfig-001-20250227gcc-13.2.0 arc randconfig-002-20250227gcc-13.2.0 arm randconfig-001-20250227gcc-14.2.0 arm randconfig-002-20250227clang-17 arm randconfig-003-20250227gcc-14.2.0 arm randconfig-004-20250227clang-21 arm64randconfig-001-20250227gcc-14.2.0 arm64randconfig-002-20250227clang-19 arm64randconfig-003-20250227gcc-14.2.0 arm64randconfig-004-20250227gcc-14.2.0 csky randconfig-001-20250227gcc-14.2.0 csky randconfig-002-20250227gcc-14.2.0 hexagon allmodconfigclang-21 hexagon allyesconfigclang-18 hexagon randconfig-001-20250227clang-14 hexagon randconfig-002-20250227clang-16 i386 buildonly-randconfig-001-20250227gcc-12 i386 buildonly-randconfig-002-20250227gcc-11 i386 buildonly-randconfig-003-20250227clang-19 i386 buildonly-randconfig-004-20250227gcc-12 i386 buildonly-randconfig-005-20250227gcc-11 i386 buildonly-randconfig-006-20250227clang-19 loongarchrandconfig-001-20250227gcc-14.2.0 loongarchrandconfig-002-20250227gcc-14.2.0 nios2randconfig-001-20250227gcc-14.2.0 nios2randconfig-002-20250227gcc-14.2.0 parisc randconfig-001-20250227gcc-14.2.0 parisc randconfig-002-20250227gcc-14.2.0 powerpc randconfig-001-20250227clang-19 powerpc randconfig-002-20250227gcc-14.2.0 powerpc randconfig-003-20250227clang-19 powerpc64randconfig-001-20250227clang-17 powerpc64randconfig-002-20250227clang-21 powerpc64randconfig-003-20250227gcc-14.2.0 riscvrandconfig-001-20250227gcc-14.2.0 riscvrandconfig-002-20250227gcc-14.2.0 s390allmodconfigclang-19 s390allyesconfiggcc-14.2.0 s390 randconfig-001-20250227clang-18 s390 randconfig-002-20250227gcc-14.2.0 sh allmodconfiggcc-14.2.0 sh allyesconfiggcc-14.2.0 sh randconfig-001-20250227gcc-14.2.0 sh randconfig-002-20250227gcc-14.2.0 sparc allmodconfiggcc-14.2.0 sparcrandconfig-001-20250227gcc-14.2.0 sparcrandconfig-002-20250227gcc-14.2.0 sparc64 randconfig-001-20250227gcc-14.2.0 sparc64 randconfig-002-20250227gcc-14.2.0 um allmodconfigclang-21 um allyesconfiggcc-12 um randconfig-001-20250227clang-17 um randconfig-002-20250227gcc-12 x86_64 buildonly-randconfig-001-20250227clang-19 x86_64 buildonly-randconfig-002-20250227clang-19 x86_64 buildonly-randconfig-003-20250227gcc-12 x86_64 buildonly-randconfig-004-20250227gcc-12 x86_64 buildonly-randconfig-005-20250227clang-19 x86_64 buildonly-randconfig-006-20250227gcc-12 xtensa randconfig-001-20250227gcc-14.2.0 xtensa randconfig-002-20250227gcc-14.2.0 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
Re: [Intel-wired-lan] [PATCH iwl-net v1] ice: fix lane number calculation
On Tue, Feb 25, 2025 at 09:50:21AM +, Simon Horman wrote:
> On Fri, Feb 21, 2025 at 10:39:49AM +0100, Grzegorz Nitka wrote:
> > E82X adapters do not have sequential IDs, lane number is PF ID.
> >
> > Add check for ICE_MAC_GENERIC and skip checking port options.
>
> This I see.
Sorry, this was part of an earlier draft. Please ignore.
>
> >
> > Also, adjust logical port number for specific E825 device with external
> > PHY support (PCI device id 0x579F). For this particular device,
> > with 2x25G (PHY0) and 2x10G (PHY1) port configuration, modification of
> > pf_id -> lane_number mapping is required. PF IDs on the 2nd PHY start
> > from 4 in such scenario. Otherwise, the lane number cannot be
> > determined correctly, leading to PTP init errors during PF initialization.
> >
> > Fixes: 258f5f9058159 ("ice: Add correct PHY lane assignment")
> > Co-developed-by: Karol Kolacinski
> > Signed-off-by: Karol Kolacinski
> > Signed-off-by: Grzegorz Nitka
> > Reviewed-by: Przemek Kitszel
> > Reviewed-by: Milena Olech
>
> Reviewed-by: Simon Horman
I only meant to send this part :)
Re: [Intel-wired-lan] [PATCH iwl-net v2] ice: fix fwlog after driver reinit
On Tue, Feb 25, 2025 at 02:40:10PM +0100, Martyna Szapar-Mudlaw wrote:
> Fix an issue when firmware logging stops after devlink reload action
> driver_reinit or driver reset. After the driver reinits and resumes
> operations, it must re-request event notifications from the firmware
> as a part of its recofiguration.
> Fix it by restoring fw logging when it was previously registered
> before these events.
>
> Restoring fw logging in these cases was faultily removed with new
> debugfs fw logging implementation.
>
> Failure to init fw logging is not a critical error so it is safely
> ignored. Information log in case of failure are handled by
> ice_fwlog_register function.
>
> Fixes: 73671c3162c8 ("ice: enable FW logging")
> Reviewed-by: Przemek Kitszel
> Signed-off-by: Martyna Szapar-Mudlaw
Reviewed-by: Simon Horman
Re: [Intel-wired-lan] [PATCH iwl-next v1] idpf: assign extracted ptype to struct libeth_rqe_info field
Hi Mateusz,
kernel test robot noticed the following build warnings:
[auto build test WARNING on tnguy-next-queue/dev-queue]
url:
https://github.com/intel-lab-lkp/linux/commits/Mateusz-Polchlopek/idpf-assign-extracted-ptype-to-struct-libeth_rqe_info-field/20250227-214755
base: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git
dev-queue
patch link:
https://lore.kernel.org/r/20250227123837.547053-1-mateusz.polchlopek%40intel.com
patch subject: [Intel-wired-lan] [PATCH iwl-next v1] idpf: assign extracted
ptype to struct libeth_rqe_info field
config: s390-allyesconfig
(https://download.01.org/0day-ci/archive/20250228/202502280724.aep7vgsr-...@intel.com/config)
compiler: s390-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20250228/202502280724.aep7vgsr-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202502280724.aep7vgsr-...@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c:946: warning: Excess
>> function parameter 'ptype' description in 'idpf_rx_singleq_extract_fields'
vim +946 drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c
a5ab9ee0df0be8 Joshua Hay 2023-08-07 933
a5ab9ee0df0be8 Joshua Hay 2023-08-07 934 /**
a5ab9ee0df0be8 Joshua Hay 2023-08-07 935 *
idpf_rx_singleq_extract_fields - Extract fields from the Rx descriptor
a5ab9ee0df0be8 Joshua Hay 2023-08-07 936 * @rx_q: Rx descriptor queue
a5ab9ee0df0be8 Joshua Hay 2023-08-07 937 * @rx_desc: the descriptor
to process
a5ab9ee0df0be8 Joshua Hay 2023-08-07 938 * @fields: storage for
extracted values
ce5cf4af7ceb6c Mateusz Polchlopek 2024-11-06 939 * @ptype: pointer that will
store packet type
a5ab9ee0df0be8 Joshua Hay 2023-08-07 940 *
a5ab9ee0df0be8 Joshua Hay 2023-08-07 941 */
e4891e4687c8dd Alexander Lobakin 2024-06-20 942 static void
e4891e4687c8dd Alexander Lobakin 2024-06-20 943
idpf_rx_singleq_extract_fields(const struct idpf_rx_queue *rx_q,
e4891e4687c8dd Alexander Lobakin 2024-06-20 944
const union virtchnl2_rx_desc *rx_desc,
45cbbcb40f4efc Mateusz Polchlopek 2025-02-27 945
struct libeth_rqe_info *fields)
a5ab9ee0df0be8 Joshua Hay 2023-08-07 @946 {
a5ab9ee0df0be8 Joshua Hay 2023-08-07 947 if (rx_q->rxdids ==
VIRTCHNL2_RXDID_1_32B_BASE_M)
45cbbcb40f4efc Mateusz Polchlopek 2025-02-27 948
idpf_rx_singleq_extract_base_fields(rx_desc, fields);
a5ab9ee0df0be8 Joshua Hay 2023-08-07 949 else
45cbbcb40f4efc Mateusz Polchlopek 2025-02-27 950
idpf_rx_singleq_extract_flex_fields(rx_desc, fields);
a5ab9ee0df0be8 Joshua Hay 2023-08-07 951 }
a5ab9ee0df0be8 Joshua Hay 2023-08-07 952
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
[Intel-wired-lan] [PATCH iwl-next v1] ice: add E830 Earliest TxTime First Offload support
E830 supports Earliest TxTime First (ETF) hardware offload, which is
configured via the ETF Qdisc (see tc-etf(8)). ETF introduces a new Tx flow
mechanism that utilizes a timestamp ring (tstamp_ring) alongside the
standard Tx ring. This timestamp ring is used to indicate when hardware
will transmit a packet.
The allocation and initialization of the timestamp ring occur when the
feature is enabled via tc-etf. Since the timestamp ring and Tx ring are
tightly coupled, both must be configured simultaneously.
To support ETF, the following flags are introduced:
- ICE_F_TXTIME: Device feature flag set for E830 NICs, indicating ETF
support.
- ICE_FLAG_TXTIME: PF-level flag indicating whether ETF is enabled on any
Tx queue. It is checked during ring allocation to determine if timestamp
rings should be allocated and is also referenced when modifying queue
count via ethtool -G.
- ICE_TX_FLAGS_TXTIME: Per-ring flag set when ETF is enabled and cleared
when disabled for a specific Tx queue. It helps determine ETF status
when transmitting timestamped packets and is used by ice_is_txtime_ena()
to check if ETF is enabled on any Tx queue.
Due to a hardware issue that can result in a malicious driver detection
event, additional timestamp descriptors are required when wrapping the
timestamp ring. Up to 64 additional timestamp descriptors are reserved,
reducing the available Tx descriptors.
To accommodate this, ICE_MAX_NUM_DESC_BY_MAC is introduced, defining:
- E830: Maximum Tx descriptor length of 8096 (8K - 32 - 64 for timestamp
fetch descriptors).
- E810 and E82X: Maximum Tx descriptor length of 8160 (8K - 32) .
Reviewed-by: Aleksandr Loktionov
Co-developed-by: Alice Michael
Signed-off-by: Alice Michael
Signed-off-by: Paul Greenwalt
---
drivers/net/ethernet/intel/ice/ice.h | 9 +-
.../net/ethernet/intel/ice/ice_adminq_cmd.h | 53 +
drivers/net/ethernet/intel/ice/ice_base.c | 210 +++---
drivers/net/ethernet/intel/ice/ice_base.h | 1 +
drivers/net/ethernet/intel/ice/ice_common.c | 125 +++
drivers/net/ethernet/intel/ice/ice_common.h | 10 +
drivers/net/ethernet/intel/ice/ice_ethtool.c | 61 -
.../net/ethernet/intel/ice/ice_hw_autogen.h | 3 +
.../net/ethernet/intel/ice/ice_lan_tx_rx.h| 42
drivers/net/ethernet/intel/ice/ice_lib.c | 45 +++-
drivers/net/ethernet/intel/ice/ice_main.c | 174 ++-
drivers/net/ethernet/intel/ice/ice_txrx.c | 129 ++-
drivers/net/ethernet/intel/ice/ice_txrx.h | 4 +
drivers/net/ethernet/intel/ice/ice_txrx_lib.h | 14 ++
drivers/net/ethernet/intel/ice/ice_virtchnl.c | 2 +-
15 files changed, 829 insertions(+), 53 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice.h
b/drivers/net/ethernet/intel/ice/ice.h
index 7200d6042590..b45981225e05 100644
--- a/drivers/net/ethernet/intel/ice/ice.h
+++ b/drivers/net/ethernet/intel/ice/ice.h
@@ -83,7 +83,11 @@
#define ICE_BAR0 0
#define ICE_REQ_DESC_MULTIPLE 32
#define ICE_MIN_NUM_DESC 64
-#define ICE_MAX_NUM_DESC 8160
+#define ICE_MAX_NUM_DESC_E810 8160
+#define ICE_MAX_NUM_DESC_E830 8096
+#define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \
+ICE_MAX_NUM_DESC_E830 : \
+ICE_MAX_NUM_DESC_E810)
#define ICE_DFLT_MIN_RX_DESC 512
#define ICE_DFLT_NUM_TX_DESC 256
#define ICE_DFLT_NUM_RX_DESC 2048
@@ -201,6 +205,7 @@ enum ice_feature {
ICE_F_SMA_CTRL,
ICE_F_CGU,
ICE_F_GNSS,
+ ICE_F_TXTIME,
ICE_F_GCS,
ICE_F_ROCE_LAG,
ICE_F_SRIOV_LAG,
@@ -332,6 +337,7 @@ struct ice_vsi {
struct ice_pf *back; /* back pointer to PF */
struct ice_rx_ring **rx_rings; /* Rx ring array */
struct ice_tx_ring **tx_rings; /* Tx ring array */
+ struct ice_tx_ring **tstamp_rings; /* Time stamp ring array */
struct ice_q_vector **q_vectors; /* q_vector array */
irqreturn_t (*irq_handler)(int irq, void *data);
@@ -518,6 +524,7 @@ enum ice_pf_flags {
ICE_FLAG_MTU_CHANGED,
ICE_FLAG_GNSS, /* GNSS successfully initialized */
ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */
+ ICE_FLAG_TXTIME,
ICE_PF_FLAGS_NBITS /* must be last */
};
diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
index bdee499f991a..2eaa4ab8e791 100644
--- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
@@ -15,9 +15,11 @@
#define ICE_RXQ_CTX_SIZE_DWORDS8
#define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32))
#define ICE_TXQ_CTX_SZ 22
+#define ICE_TXTIME_CTX_SZ 25
typedef struct __packed { u8 buf[ICE_RXQ_CTX_SZ]; } ice_rxq_ctx_buf_t;
typedef struct __pa
Re: [Intel-wired-lan] [PATCH] e1000e: Link flap workaround option for false IRP events
Hi Andrew,
On Wed, Feb 26, 2025, at 5:52 PM, Andrew Lunn wrote:
> On Wed, Feb 26, 2025 at 02:44:12PM -0500, Mark Pearson wrote:
>> Issue is seen on some Lenovo desktop workstations where there
>> is a false IRP event which triggers a link flap.
>> Condition is rare and only seen on networks where link speed
>> may differ along the path between nodes (e.g 10M/100M)
>>
>> Intel are not able to determine root cause but provided a
>> workaround that does fix the issue. Tested extensively at Lenovo.
>>
>> Adding a module option to enable this workaround for users
>> who are impacted by this issue.
>
> Why is a module option needed? Does the workaround itself introduce
> issues? Please describe those issues?
>
> In general, module options are not liked. So please include in the
> commit message why a module option is the only option.
>
Understood.
The reason for the module option is I'm playing it safe, as Intel couldn't
determine root cause.
The aim of the patch is to keep the effect to a minimum whilst allowing users
who are impacted to turn on the workaround, if they are encountering the issue.
Issue details:
We have seen the issue when running high level traffic on a network involving
at least two nodes and also having two different network speeds are need. For
example:
[Lenovo WS] <---1G link---> Network switch <---100M link--->[traffic source]
The link flap can take a day or two to reproduce - it's rare.
We worked for a long time with the Intel networking team to try and root cause
the issue but unfortunately, despite being able to reproduce the issue in their
lab, they decided to not pursue the investigation. They suggested the register
read as a workaround and we confirmed it fixes the problem (setup ran for weeks
without issue - we haven't seen any side issues). Unfortunately nobody can
explain why the fix works.
I don't think the workaround should be implemented as a general case without
support from Intel.
I considered a DMI quirk, but without root cause I do worry about unknown side
effects.
There is also the possibility of the issue showing up on other platforms we
don't know of yet - and I wanted a way to be able to easily enable it if needed
(e.g be able to tell a customer - try enabling this and see if it fixes it).
A module option seemed like a good compromise, but I'm happy to consider
alternatives if there are any recommendations.
>> Signed-off-by: Mark Pearson
>> ---
>> drivers/net/ethernet/intel/e1000e/netdev.c | 19 +++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c
>> b/drivers/net/ethernet/intel/e1000e/netdev.c
>> index 286155efcedf..06774fb4b2dd 100644
>> --- a/drivers/net/ethernet/intel/e1000e/netdev.c
>> +++ b/drivers/net/ethernet/intel/e1000e/netdev.c
>> @@ -37,6 +37,10 @@ static int debug = -1;
>> module_param(debug, int, 0);
>> MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
>>
>> +static int false_irp_workaround;
>> +module_param(false_irp_workaround, int, 0);
>> +MODULE_PARM_DESC(false_irp_workaround, "Enable workaround for rare false
>> IRP event causing link flap");
>> +
>> static const struct e1000_info *e1000_info_tbl[] = {
>> [board_82571] = &e1000_82571_info,
>> [board_82572] = &e1000_82572_info,
>> @@ -1757,6 +1761,21 @@ static irqreturn_t e1000_intr_msi(int __always_unused
>> irq, void *data)
>> /* read ICR disables interrupts using IAM */
>> if (icr & E1000_ICR_LSC) {
>> hw->mac.get_link_status = true;
>> +
>> +/*
>> + * False IRP workaround
>> + * Issue seen on Lenovo P5 and P7 workstations where if there
>> + * are different link speeds in the network a false IRP event
>> + * is received, leading to a link flap.
>> + * Intel unable to determine root cause. This read prevents
>> + * the issue occurring
>> + */
>> +if (false_irp_workaround) {
>> +u16 phy_data;
>> +
>> +e1e_rphy(hw, PHY_REG(772, 26), &phy_data);
>
> Please add some #define for these magic numbers, so we have some idea
> what PHY register you are actually reading. That in itself might help
> explain how the workaround actually works.
>
I don't know what this register does I'm afraid - that's Intel knowledge and
has not been shared.
This approach, with magic numbers, is used all over the place in the driver and
related modules, presumably contributed previously by Intel engineers. Can I
push back on this request with a note that Intel would need to provide the
register definitions for their components first.
Thanks for the review. I'll give it a couple of days to see if any other
feedback, and push a v2 with updated commit description.
Mark
[Intel-wired-lan] [PATCH iwl-next v6 3/9] igc: Optimize the TX packet buffer utilization
Packet buffers (RX + TX) total 64KB. Neither RX or TX buffers can be larger than 34KB. So divide the buffer equally, 32KB for each. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 8e449904aa7d..516ef70c98e9 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -400,7 +400,8 @@ #define I225_TXPBSIZE_DEFAULT 0x0414 /* TXPBSIZE default */ #define IGC_RXPBS_CFG_TS_EN0x8000 /* Timestamp in Rx buffer */ -#define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ + /* 7KB bytes buffer for each tx queue (total 4 queues) + 4KB for BMC*/ +#define IGC_TXPBSIZE_TSN 0x041c71c7 #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ -- 2.34.1
[Intel-wired-lan] [PATCH iwl-next v6 0/9] igc: Add support for Frame Preemption feature in IGC
Introduces support for the FPE feature in the IGC driver. The patches aligns with the upstream FPE API: https://patchwork.kernel.org/project/netdevbpf/cover/20230220122343.1156614-1-vladimir.olt...@nxp.com/ https://patchwork.kernel.org/project/netdevbpf/cover/20230119122705.73054-1-vladimir.olt...@nxp.com/ It builds upon earlier work: https://patchwork.kernel.org/project/netdevbpf/cover/20220520011538.109-1-vinicius.go...@intel.com/ The patch series adds the following functionalities to the IGC driver: a) Configure FPE using `ethtool --set-mm`. b) Display FPE settings via `ethtool --show-mm`. c) View FPE statistics using `ethtool --include-statistics --show-mm'. e) Block setting preemptible tc in taprio since it is not supported yet. Existing code already blocks it in mqprio. Tested: Enabled CONFIG_PROVE_LOCKING, CONFIG_DEBUG_ATOMIC_SLEEP, CONFIG_DMA_API_DEBUG, and CONFIG_KASAN 1) selftests 2) netdev down/up cycles 3) suspend/resume cycles 4) fpe verification No bugs or unusual dmesg logs were observed. Ran 1), 2) and 3) with and without the patch series, compared dmesg and selftest logs — no differences found. Change Log: v5 -> v6: - Added Tested-by: Furong Xu for patch 1/9 (Vladimir, Furong Xu) - Updated logic in ethtool_mmsv_link_state_handle() (Vladimir, Furong Xu) - Swap sequence of function call in stmmac_set_mm() (Furong Xu) - Log an error if igc_enable_empty_addr_recv() fails (Vladimir) - Move the patch ".. Block setting preemptible traffic .." before ".. Add support to get MAC Merge data .." (Vladimir) - Move mmsv function kernel-doc from .h to .c file (Vladimir) v4 -> v5: - Remove "igc: Add support for preemptible traffic class in taprio" patch (Vladimir) - Add a new patch "igc: Block setting preemptible traffic classes in taprio" (Vladimir) - Add kernel-doc for mmsv api (Vladimir) - olininfo_status to use host byte order (Simon) - status_error should host byte type (Simon) - Some code was misplaced in the wrong patch (Vladimir) - Mix of tabs and spaces in patch description (Vladimir) - Created igc_is_pmac_enabled() to reduce code repetition (Vladimir) v3 -> v4: - Fix compilation warnings introduced by this patch series v2 -> v3: - Implement configure_tx() mmsv callback (Vladimir) - Use static_branch_inc() and static_branch_dec() (Vladimir) - Add adapter->fpe.mmsv.pmac_enabled as extra check (Vladimir) - Remove unnecessary error check in igc_fpe_init_tx_descriptor() (Vladimir) - Additional places to use FIELD_PREP() instead of manual bit manipulation (Vladimir) - IGC_TXD_POPTS_SMD_V and IGC_TXD_POPTS_SMD_R type change to enum (Vladimir) - Remove unnecessary netif_running() check in igc_fpe_xmit_frame (Vladimir) - Rate limit print in igc_fpe_send_mpacket (Vladimir) v1 -> v2: - Extract the stmmac verification logic into a common library (Vladimir) - igc to use common library for verification (Vladimir) - Fix syntax for kernel-doc to use "Return:" (Vladimir) - Use FIELD_GET instead of manual bit masking (Vladimir) - Don't assign 0 to statistics counter in igc_ethtool_get_mm_stats() (Vladimir) - Use pmac-enabled as a condition to allow MAC address value 0 (Vladimir) - Define macro register value in increasing value order (Vladimir) - Fix tx-min-frag-size handling for igc (Vladimir) - Handle link state changes with verification in igc (Vladimir) - Add static key for fast path code (Vladimir) - rx_min_frag_size get from constant (Vladimir) v1: https://patchwork.kernel.org/project/netdevbpf/cover/20241216064720.931522-1-faizal.abdul.ra...@linux.intel.com/ v2: https://patchwork.kernel.org/project/netdevbpf/cover/20250205100524.1138523-1-faizal.abdul.ra...@linux.intel.com/ v3: https://patchwork.kernel.org/project/netdevbpf/cover/20250207165649.2245320-1-faizal.abdul.ra...@linux.intel.com/ v4: https://patchwork.kernel.org/project/netdevbpf/cover/20250210070207.2615418-1-faizal.abdul.ra...@linux.intel.com/ v5: https://patchwork.kernel.org/project/netdevbpf/cover/20250220025349.3007793-1-faizal.abdul.ra...@linux.intel.com/ Faizal Rahim (8): igc: Rename xdp_get_tx_ring() for non-xdp usage igc: Optimize the TX packet buffer utilization igc: Set the RX packet buffer size for TSN mode igc: Add support for frame preemption verification igc: Add support to set tx-min-frag-size igc: Block setting preemptible traffic class in taprio igc: Add support to get MAC Merge data via ethtool igc: Add support to get frame preemption statistics via ethtool Vladimir Oltean (1): net: ethtool: mm: extract stmmac verification logic into common library drivers/net/ethernet/intel/igc/igc.h | 15 +- drivers/net/ethernet/intel/igc/igc_base.h | 1 + drivers/net/ethernet/intel/igc/igc_defines.h | 15 +- drivers/net/ethernet/intel/igc/igc_ethtool.c | 76 + drivers/net/ethernet/intel/igc/igc_main.c | 67 - drivers/net/ethernet/intel/igc/igc_regs.h | 16 + drivers/net/ethernet/intel/igc/igc_tsn.c | 193 +++- drivers/net/ethernet/intel/
[Intel-wired-lan] [PATCH iwl-next v6 1/9] net: ethtool: mm: extract stmmac verification logic into common library
From: Vladimir Oltean
It appears that stmmac is not the only hardware which requires a
software-driven verification state machine for the MAC Merge layer.
While on the one hand it's good to encourage hardware implementations,
on the other hand it's quite difficult to tolerate multiple drivers
implementing independently fairly non-trivial logic.
Extract the hardware-independent logic from stmmac into library code and
put it in ethtool. Name the state structure "mmsv" for MAC Merge
Software Verification. Let this expose an operations structure for
executing the hardware stuff: sync hardware with the tx_active boolean
(result of verification process), enable/disable the pMAC, send mPackets,
notify library of external events (reception of mPackets), as well as
link state changes.
Note that it is assumed that the external events are received in hardirq
context. If they are not, it is probably a good idea to disable hardirqs
when calling ethtool_mmsv_event_handle(), because the library does not
do so.
Also, the MM software verification process has no business with the
tx_min_frag_size, that is all the driver's to handle.
Signed-off-by: Vladimir Oltean
Co-developed-by: Choong Yong Liang
Signed-off-by: Choong Yong Liang
Co-developed-by: Faizal Rahim
Signed-off-by: Faizal Rahim
Tested-by: Choong Yong Liang
Tested-by: Furong Xu <0x1...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 16 +-
.../ethernet/stmicro/stmmac/stmmac_ethtool.c | 41 +--
.../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 174 +++
.../net/ethernet/stmicro/stmmac/stmmac_fpe.h | 5 -
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 8 +-
include/linux/ethtool.h | 73 +
net/ethtool/mm.c | 279 +-
7 files changed, 395 insertions(+), 201 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index f05cae103d83..c9cc41af258a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -147,21 +147,9 @@ struct stmmac_channel {
};
struct stmmac_fpe_cfg {
- /* Serialize access to MAC Merge state between ethtool requests
-* and link state updates.
-*/
- spinlock_t lock;
-
+ struct ethtool_mmsv mmsv;
const struct stmmac_fpe_reg *reg;
- u32 fpe_csr;/* MAC_FPE_CTRL_STS reg cache */
-
- enum ethtool_mm_verify_status status;
- struct timer_list verify_timer;
- bool verify_enabled;
- int verify_retries;
- bool pmac_enabled;
- u32 verify_time;
- bool tx_enabled;
+ u32 fpe_csr;/* MAC_FPE_CTRL_STS reg cache */
};
struct stmmac_tc_entry {
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index 918a32f8fda8..25533d6a3175 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -1210,37 +1210,17 @@ static int stmmac_get_mm(struct net_device *ndev,
struct ethtool_mm_state *state)
{
struct stmmac_priv *priv = netdev_priv(ndev);
- unsigned long flags;
u32 frag_size;
if (!stmmac_fpe_supported(priv))
return -EOPNOTSUPP;
- spin_lock_irqsave(&priv->fpe_cfg.lock, flags);
+ ethtool_mmsv_get_mm(&priv->fpe_cfg.mmsv, state);
- state->max_verify_time = STMMAC_FPE_MM_MAX_VERIFY_TIME_MS;
- state->verify_enabled = priv->fpe_cfg.verify_enabled;
- state->pmac_enabled = priv->fpe_cfg.pmac_enabled;
- state->verify_time = priv->fpe_cfg.verify_time;
- state->tx_enabled = priv->fpe_cfg.tx_enabled;
- state->verify_status = priv->fpe_cfg.status;
state->rx_min_frag_size = ETH_ZLEN;
-
- /* FPE active if common tx_enabled and
-* (verification success or disabled(forced))
-*/
- if (state->tx_enabled &&
- (state->verify_status == ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED ||
-state->verify_status == ETHTOOL_MM_VERIFY_STATUS_DISABLED))
- state->tx_active = true;
- else
- state->tx_active = false;
-
frag_size = stmmac_fpe_get_add_frag_size(priv);
state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(frag_size);
- spin_unlock_irqrestore(&priv->fpe_cfg.lock, flags);
-
return 0;
}
@@ -1248,8 +1228,6 @@ static int stmmac_set_mm(struct net_device *ndev, struct
ethtool_mm_cfg *cfg,
struct netlink_ext_ack *extack)
{
struct stmmac_priv *priv = netdev_priv(ndev);
- struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg;
- unsigned long flags;
u32 frag_size;
int err;
@@ -1258,23 +1236,8 @@ static int stmmac_set_mm(struct net_device *ndev, struct
ethtool_mm_cfg *cfg,
if (err)
return e
[Intel-wired-lan] [PATCH iwl-next v6 6/9] igc: Add support to set tx-min-frag-size
Add support to set tx-min-frag-size via set_mm callback in igc.
Increase the max limit of tx-ming-frag-size in ethtool from 252 to 256
since i225/6 value range is 64, 128, 192 and 256.
Co-developed-by: Vinicius Costa Gomes
Signed-off-by: Vinicius Costa Gomes
Signed-off-by: Faizal Rahim
---
drivers/net/ethernet/intel/igc/igc.h | 1 +
drivers/net/ethernet/intel/igc/igc_defines.h | 1 +
drivers/net/ethernet/intel/igc/igc_ethtool.c | 5 +++
drivers/net/ethernet/intel/igc/igc_tsn.c | 37 ++--
drivers/net/ethernet/intel/igc/igc_tsn.h | 2 +-
net/ethtool/mm.c | 2 +-
6 files changed, 43 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/intel/igc/igc.h
b/drivers/net/ethernet/intel/igc/igc.h
index 705bd4739e3b..2f3662143589 100644
--- a/drivers/net/ethernet/intel/igc/igc.h
+++ b/drivers/net/ethernet/intel/igc/igc.h
@@ -42,6 +42,7 @@ void igc_ethtool_set_ops(struct net_device *);
struct fpe_t {
struct ethtool_mmsv mmsv;
+ u32 tx_min_frag_size;
};
enum igc_mac_filter_type {
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h
b/drivers/net/ethernet/intel/igc/igc_defines.h
index 22db1de02964..038ee89f1e08 100644
--- a/drivers/net/ethernet/intel/igc/igc_defines.h
+++ b/drivers/net/ethernet/intel/igc/igc_defines.h
@@ -551,6 +551,7 @@
#define IGC_TQAVCTRL_PREEMPT_ENA 0x0002
#define IGC_TQAVCTRL_ENHANCED_QAV 0x0008
#define IGC_TQAVCTRL_FUTSCDDIS 0x0080
+#define IGC_TQAVCTRL_MIN_FRAG_MASK 0xC000
#define IGC_TXQCTL_QUEUE_MODE_LAUNCHT 0x0001
#define IGC_TXQCTL_STRICT_CYCLE0x0002
diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c
b/drivers/net/ethernet/intel/igc/igc_ethtool.c
index e2a14edf7552..081e24f228b2 100644
--- a/drivers/net/ethernet/intel/igc/igc_ethtool.c
+++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c
@@ -1789,6 +1789,11 @@ static int igc_ethtool_set_mm(struct net_device *netdev,
struct igc_adapter *adapter = netdev_priv(netdev);
struct fpe_t *fpe = &adapter->fpe;
+ fpe->tx_min_frag_size =
igc_fpe_get_supported_frag_size(cmd->tx_min_frag_size);
+ if (fpe->tx_min_frag_size != cmd->tx_min_frag_size)
+ NL_SET_ERR_MSG_MOD(extack,
+ "tx-min-frag-size value set is unsupported.
Rounded up to supported value (64, 128, 192, 256)");
+
if (fpe->mmsv.pmac_enabled != cmd->pmac_enabled) {
if (cmd->pmac_enabled)
static_branch_inc(&igc_fpe_enabled);
diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c
b/drivers/net/ethernet/intel/igc/igc_tsn.c
index acfff3919793..c9c70544c4c1 100644
--- a/drivers/net/ethernet/intel/igc/igc_tsn.c
+++ b/drivers/net/ethernet/intel/igc/igc_tsn.c
@@ -7,6 +7,12 @@
#include "igc_hw.h"
#include "igc_tsn.h"
+#define MIN_MULTPLIER_TX_MIN_FRAG 0
+#define MAX_MULTPLIER_TX_MIN_FRAG 3
+/* Frag size is based on the Section 8.12.2 of the SW User Manual */
+#define TX_MIN_FRAG_SIZE 64
+#define TX_MAX_FRAG_SIZE (TX_MIN_FRAG_SIZE * (MAX_MULTPLIER_TX_MIN_FRAG
+ 1))
+
DEFINE_STATIC_KEY_FALSE(igc_fpe_enabled);
static int igc_fpe_init_smd_frame(struct igc_ring *ring,
@@ -129,6 +135,7 @@ static const struct ethtool_mmsv_ops igc_mmsv_ops = {
void igc_fpe_init(struct igc_adapter *adapter)
{
+ adapter->fpe.tx_min_frag_size = TX_MIN_FRAG_SIZE;
ethtool_mmsv_init(&adapter->fpe.mmsv, adapter->netdev, &igc_mmsv_ops);
}
@@ -279,7 +286,7 @@ static int igc_tsn_disable_offload(struct igc_adapter
*adapter)
tqavctrl = rd32(IGC_TQAVCTRL);
tqavctrl &= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN |
IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS |
- IGC_TQAVCTRL_PREEMPT_ENA);
+ IGC_TQAVCTRL_PREEMPT_ENA | IGC_TQAVCTRL_MIN_FRAG_MASK);
wr32(IGC_TQAVCTRL, tqavctrl);
@@ -325,12 +332,34 @@ static void igc_tsn_set_retx_qbvfullthreshold(struct
igc_adapter *adapter)
wr32(IGC_RETX_CTL, retxctl);
}
+static u8 igc_fpe_get_frag_size_mult(const struct fpe_t *fpe)
+{
+ u8 mult = (fpe->tx_min_frag_size / TX_MIN_FRAG_SIZE) - 1;
+
+ return clamp_t(u8, mult, MIN_MULTPLIER_TX_MIN_FRAG,
+ MAX_MULTPLIER_TX_MIN_FRAG);
+}
+
+u32 igc_fpe_get_supported_frag_size(u32 frag_size)
+{
+ const u32 supported_sizes[] = {64, 128, 192, 256};
+
+ /* Find the smallest supported size that is >= frag_size */
+ for (int i = 0; i < ARRAY_SIZE(supported_sizes); i++) {
+ if (frag_size <= supported_sizes[i])
+ return supported_sizes[i];
+ }
+
+ return TX_MAX_FRAG_SIZE; /* Should not happen, value > 256 is blocked
by ethtool */
+}
+
static int igc_tsn_enable_offload(struct igc_adapter *adapter)
{
struct igc_hw *hw = &adapter->hw;
u32 tqavctrl, baset_l, baset_h;
u32 sec, nsec, cycle, rxpbs;
[Intel-wired-lan] [PATCH iwl-next v6 8/9] igc: Add support to get MAC Merge data via ethtool
Implement "ethtool --show-mm" callback for IGC.
Tested with command:
$ ethtool --show-mm enp1s0.
MAC Merge layer state for enp1s0:
pMAC enabled: on
TX enabled: on
TX active: on
TX minimum fragment size: 64
RX minimum fragment size: 60
Verify enabled: on
Verify time: 128
Max verify time: 128
Verification status: SUCCEEDED
Verified that the fields value are retrieved correctly.
Signed-off-by: Faizal Rahim
---
drivers/net/ethernet/intel/igc/igc_ethtool.c | 14 ++
drivers/net/ethernet/intel/igc/igc_tsn.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c
b/drivers/net/ethernet/intel/igc/igc_ethtool.c
index 081e24f228b2..7f0052e0d50c 100644
--- a/drivers/net/ethernet/intel/igc/igc_ethtool.c
+++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c
@@ -1782,6 +1782,19 @@ static int igc_ethtool_set_eee(struct net_device *netdev,
return 0;
}
+static int igc_ethtool_get_mm(struct net_device *netdev,
+ struct ethtool_mm_state *cmd)
+{
+ struct igc_adapter *adapter = netdev_priv(netdev);
+ struct fpe_t *fpe = &adapter->fpe;
+
+ ethtool_mmsv_get_mm(&fpe->mmsv, cmd);
+ cmd->tx_min_frag_size = fpe->tx_min_frag_size;
+ cmd->rx_min_frag_size = IGC_RX_MIN_FRAG_SIZE;
+
+ return 0;
+}
+
static int igc_ethtool_set_mm(struct net_device *netdev,
struct ethtool_mm_cfg *cmd,
struct netlink_ext_ack *extack)
@@ -2093,6 +2106,7 @@ static const struct ethtool_ops igc_ethtool_ops = {
.set_rxfh = igc_ethtool_set_rxfh,
.get_ts_info= igc_ethtool_get_ts_info,
.get_channels = igc_ethtool_get_channels,
+ .get_mm = igc_ethtool_get_mm,
.set_mm = igc_ethtool_set_mm,
.set_channels = igc_ethtool_set_channels,
.get_priv_flags = igc_ethtool_get_priv_flags,
diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h
b/drivers/net/ethernet/intel/igc/igc_tsn.h
index 7491fd65b846..14495a22f77d 100644
--- a/drivers/net/ethernet/intel/igc/igc_tsn.h
+++ b/drivers/net/ethernet/intel/igc/igc_tsn.h
@@ -4,6 +4,7 @@
#ifndef _IGC_TSN_H_
#define _IGC_TSN_H_
+#define IGC_RX_MIN_FRAG_SIZE 60
#define SMD_FRAME_SIZE 60
enum igc_txd_popts_type {
--
2.34.1
[Intel-wired-lan] [PATCH iwl-next v6 2/9] igc: Rename xdp_get_tx_ring() for non-xdp usage
Renamed xdp_get_tx_ring() function to a more generic name for use in
upcoming frame preemption patches.
Signed-off-by: Faizal Rahim
---
drivers/net/ethernet/intel/igc/igc.h | 2 +-
drivers/net/ethernet/intel/igc/igc_main.c | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/intel/igc/igc.h
b/drivers/net/ethernet/intel/igc/igc.h
index b8111ad9a9a8..22ecdac26cf4 100644
--- a/drivers/net/ethernet/intel/igc/igc.h
+++ b/drivers/net/ethernet/intel/igc/igc.h
@@ -736,7 +736,7 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapter
*adapter,
u32 location);
int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule);
void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule);
-
+struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu);
void igc_ptp_init(struct igc_adapter *adapter);
void igc_ptp_reset(struct igc_adapter *adapter);
void igc_ptp_suspend(struct igc_adapter *adapter);
diff --git a/drivers/net/ethernet/intel/igc/igc_main.c
b/drivers/net/ethernet/intel/igc/igc_main.c
index 56a35d58e7a6..44e4f925491f 100644
--- a/drivers/net/ethernet/intel/igc/igc_main.c
+++ b/drivers/net/ethernet/intel/igc/igc_main.c
@@ -2444,8 +2444,8 @@ static int igc_xdp_init_tx_descriptor(struct igc_ring
*ring,
return -ENOMEM;
}
-static struct igc_ring *igc_xdp_get_tx_ring(struct igc_adapter *adapter,
- int cpu)
+struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter,
+int cpu)
{
int index = cpu;
@@ -2469,7 +2469,7 @@ static int igc_xdp_xmit_back(struct igc_adapter *adapter,
struct xdp_buff *xdp)
if (unlikely(!xdpf))
return -EFAULT;
- ring = igc_xdp_get_tx_ring(adapter, cpu);
+ ring = igc_get_tx_ring(adapter, cpu);
nq = txring_txq(ring);
__netif_tx_lock(nq, cpu);
@@ -2546,7 +2546,7 @@ static void igc_finalize_xdp(struct igc_adapter *adapter,
int status)
struct igc_ring *ring;
if (status & IGC_XDP_TX) {
- ring = igc_xdp_get_tx_ring(adapter, cpu);
+ ring = igc_get_tx_ring(adapter, cpu);
nq = txring_txq(ring);
__netif_tx_lock(nq, cpu);
@@ -6699,7 +6699,7 @@ static int igc_xdp_xmit(struct net_device *dev, int
num_frames,
if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
return -EINVAL;
- ring = igc_xdp_get_tx_ring(adapter, cpu);
+ ring = igc_get_tx_ring(adapter, cpu);
nq = txring_txq(ring);
__netif_tx_lock(nq, cpu);
--
2.34.1
[Intel-wired-lan] [PATCH iwl-next v6 7/9] igc: Block setting preemptible traffic class in taprio
Since preemptible tc implementation is not ready yet, block it from being set in taprio. The existing code already blocks it in mqprio. Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_main.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 5a6648a12a53..e6a398dbf09b 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -6408,6 +6408,10 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter, if (!validate_schedule(adapter, qopt)) return -EINVAL; + /* preemptible isn't supported yet */ + if (qopt->mqprio.preemptible_tcs) + return -EOPNOTSUPP; + igc_ptp_read(adapter, &now); if (igc_tsn_is_taprio_activated_by_user(adapter) && -- 2.34.1
[Intel-wired-lan] [PATCH iwl-next v6 9/9] igc: Add support to get frame preemption statistics via ethtool
Implemented "ethtool --include-statistics --show-mm" callback for IGC.
Tested preemption scenario to check preemption statistics:
1) Trigger verification handshake on both boards:
$ sudo ethtool --set-mm enp1s0 pmac-enabled on
$ sudo ethtool --set-mm enp1s0 tx-enabled on
$ sudo ethtool --set-mm enp1s0 verify-enabled on
2) Set preemptible or express queue in taprio for tx board:
$ sudo tc qdisc replace dev enp1s0 parent root handle 100 taprio \
num_tc 4 map 3 2 1 0 3 3 3 3 3 3 3 3 3 3 3 3 \
queues 1@0 1@1 1@2 1@3 base-time 0 sched-entry S F 10 \
fp E E P P
3) Send large size packets on preemptible queue
4) Send small size packets on express queue to preempt packets in
preemptible queue
5) Show preemption statistics on the receiving board:
$ ethtool --include-statistics --show-mm enp1s0
MAC Merge layer state for enp1s0:
pMAC enabled: on
TX enabled: on
TX active: on
TX minimum fragment size: 64
RX minimum fragment size: 60
Verify enabled: on
Verify time: 128
Max verify time: 128
Verification status: SUCCEEDED
Statistics:
MACMergeFrameAssErrorCount: 0
MACMergeFrameSmdErrorCount: 0
MACMergeFrameAssOkCount: 511
MACMergeFragCountRx: 764
MACMergeFragCountTx: 0
MACMergeHoldCount: 0
Co-developed-by: Vinicius Costa Gomes
Signed-off-by: Vinicius Costa Gomes
Signed-off-by: Faizal Rahim
---
drivers/net/ethernet/intel/igc/igc_ethtool.c | 36
drivers/net/ethernet/intel/igc/igc_regs.h| 16 +
2 files changed, 52 insertions(+)
diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c
b/drivers/net/ethernet/intel/igc/igc_ethtool.c
index 7f0052e0d50c..97a1194399b1 100644
--- a/drivers/net/ethernet/intel/igc/igc_ethtool.c
+++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c
@@ -1819,6 +1819,41 @@ static int igc_ethtool_set_mm(struct net_device *netdev,
return igc_tsn_offload_apply(adapter);
}
+/**
+ * igc_ethtool_get_frame_ass_error - Get the frame assembly error count.
+ * @dev: Pointer to the net_device structure.
+ * Return: The count of frame assembly errors.
+ */
+static u64 igc_ethtool_get_frame_ass_error(struct net_device *dev)
+{
+ struct igc_adapter *adapter = netdev_priv(dev);
+ u32 ooo_smdc, ooo_frame_cnt, ooo_frag_cnt; /* Out of order statistics */
+ struct igc_hw *hw = &adapter->hw;
+ u32 miss_frame_frag_cnt;
+ u32 reg_value;
+
+ reg_value = rd32(IGC_PRMEXPRCNT);
+ ooo_smdc = FIELD_GET(IGC_PRMEXPRCNT_OOO_SMDC, reg_value);
+ ooo_frame_cnt = FIELD_GET(IGC_PRMEXPRCNT_OOO_FRAME_CNT, reg_value);
+ ooo_frag_cnt = FIELD_GET(IGC_PRMEXPRCNT_OOO_FRAG_CNT, reg_value);
+ miss_frame_frag_cnt = FIELD_GET(IGC_PRMEXPRCNT_MISS_FRAME_FRAG_CNT,
+ reg_value);
+
+ return ooo_smdc + ooo_frame_cnt + ooo_frag_cnt + miss_frame_frag_cnt;
+}
+
+static void igc_ethtool_get_mm_stats(struct net_device *dev,
+struct ethtool_mm_stats *stats)
+{
+ struct igc_adapter *adapter = netdev_priv(dev);
+ struct igc_hw *hw = &adapter->hw;
+
+ stats->MACMergeFrameAssErrorCount =
igc_ethtool_get_frame_ass_error(dev);
+ stats->MACMergeFrameAssOkCount = rd32(IGC_PRMPTDRCNT);
+ stats->MACMergeFragCountRx = rd32(IGC_PRMEVNTRCNT);
+ stats->MACMergeFragCountTx = rd32(IGC_PRMEVNTTCNT);
+}
+
static int igc_ethtool_get_link_ksettings(struct net_device *netdev,
struct ethtool_link_ksettings *cmd)
{
@@ -2108,6 +2143,7 @@ static const struct ethtool_ops igc_ethtool_ops = {
.get_channels = igc_ethtool_get_channels,
.get_mm = igc_ethtool_get_mm,
.set_mm = igc_ethtool_set_mm,
+ .get_mm_stats = igc_ethtool_get_mm_stats,
.set_channels = igc_ethtool_set_channels,
.get_priv_flags = igc_ethtool_get_priv_flags,
.set_priv_flags = igc_ethtool_set_priv_flags,
diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h
b/drivers/net/ethernet/intel/igc/igc_regs.h
index 12ddc5793651..41dbfb07eb2f 100644
--- a/drivers/net/ethernet/intel/igc/igc_regs.h
+++ b/drivers/net/ethernet/intel/igc/igc_regs.h
@@ -222,6 +222,22 @@
#define IGC_FTQF(_n) (0x059E0 + (4 * (_n))) /* 5-tuple Queue Fltr */
+/* Time sync registers - preemption statistics */
+#define IGC_PRMPTDRCNT 0x04284 /* Good RX Preempted Packets */
+#define IGC_PRMEVNTTCNT0x04298 /* TX Preemption event counter
*/
+#define IGC_PRMEVNTRCNT0x0429C /* RX Preemption event counter
*/
+
+ /* Preemption Exception Counter */
+#define IGC_PRMEXPRCNT 0x42A0
+/* Received out of order packets with SMD-C */
+#define IGC_PRMEXPRCNT_OOO_SMDC0x00FF
+/* Received out of order packets with SMD-C and wrong Frame CN
[Intel-wired-lan] [PATCH iwl-next v6 4/9] igc: Set the RX packet buffer size for TSN mode
In preparation for supporting frame preemption, when entering TSN mode
set the receive packet buffer to 16KB for the Express MAC, 16KB for
the Preemptible MAC and 2KB for the BMC, according to the datasheet
section 7.1.3.2.
Co-developed-by: Vinicius Costa Gomes
Signed-off-by: Vinicius Costa Gomes
Signed-off-by: Faizal Rahim
---
drivers/net/ethernet/intel/igc/igc_defines.h | 3 +++
drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++--
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h
b/drivers/net/ethernet/intel/igc/igc_defines.h
index 516ef70c98e9..b19ac6f30dac 100644
--- a/drivers/net/ethernet/intel/igc/igc_defines.h
+++ b/drivers/net/ethernet/intel/igc/igc_defines.h
@@ -402,6 +402,9 @@
/* 7KB bytes buffer for each tx queue (total 4 queues) + 4KB for BMC*/
#define IGC_TXPBSIZE_TSN 0x041c71c7
+/* 15KB for EXP + 15KB for BE + 2KB for BMC */
+#define IGC_RXPBSIZE_TSN 0xf08f
+#define IGC_RXPBSIZE_SIZE_MASK 0x0001
#define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */
#define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */
diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c
b/drivers/net/ethernet/intel/igc/igc_tsn.c
index 1e44374ca1ff..f0213cfce07d 100644
--- a/drivers/net/ethernet/intel/igc/igc_tsn.c
+++ b/drivers/net/ethernet/intel/igc/igc_tsn.c
@@ -132,13 +132,17 @@ static int igc_tsn_disable_offload(struct igc_adapter
*adapter)
{
u16 queue_per_tc[4] = { 3, 2, 1, 0 };
struct igc_hw *hw = &adapter->hw;
- u32 tqavctrl;
+ u32 tqavctrl, rxpbs;
int i;
wr32(IGC_GTXOFFSET, 0);
wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT);
wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT);
+ rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK;
+ rxpbs |= I225_RXPBSIZE_DEFAULT;
+ wr32(IGC_RXPBS, rxpbs);
+
if (igc_is_device_id_i226(hw))
igc_tsn_restore_retx_default(adapter);
@@ -194,7 +198,7 @@ static int igc_tsn_enable_offload(struct igc_adapter
*adapter)
{
struct igc_hw *hw = &adapter->hw;
u32 tqavctrl, baset_l, baset_h;
- u32 sec, nsec, cycle;
+ u32 sec, nsec, cycle, rxpbs;
ktime_t base_time, systim;
int i;
@@ -202,6 +206,11 @@ static int igc_tsn_enable_offload(struct igc_adapter
*adapter)
wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN);
wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN);
+ rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK;
+ rxpbs |= IGC_RXPBSIZE_TSN;
+
+ wr32(IGC_RXPBS, rxpbs);
+
if (igc_is_device_id_i226(hw))
igc_tsn_set_retx_qbvfullthreshold(adapter);
--
2.34.1
[Intel-wired-lan] [PATCH iwl-next v6 5/9] igc: Add support for frame preemption verification
This patch implements the "ethtool --set-mm" callback to trigger the
frame preemption verification handshake.
Uses the MAC Merge Software Verification (mmsv) mechanism in ethtool
to perform the verification handshake for igc.
The structure fpe.mmsv is set by mmsv in ethtool and should remain
read-only for the driver.
Other mmsv callbacks:
a) configure_tx() -> not used yet at this point
- igc lacks registers to configure FPE in the transmit direction, so
this API is not utilized for now. A future patch will use it to
control preemptible queue config.
b) configure_pmac() -> not used
- this callback dynamically controls pmac_enabled at runtime. For
example, mmsv calls configure_pmac() and disables pmac_enabled when
the link partner goes down, even if the user previously enabled it.
The intention is to save power but it is not feasible in igc
because it causes an endless adapter reset loop:
1) Board A and Board B complete the verification handshake. Tx mode
register for both boards are in TSN mode.
2) Board B link goes down.
On Board A:
3) mmsv calls configure_pmac() with pmac_enabled = false.
4) configure_pmac() in igc updates a new field based on pmac_enabled.
Driver uses this field in igc_tsn_new_flags() to indicate that the
user enabled/disabled FPE.
5) configure_pmac() in igc calls igc_tsn_offload_apply() to check
whether an adapter reset is needed. Calls existing logic in
igc_tsn_will_tx_mode_change() and igc_tsn_new_flags().
6) Since pmac_enabled is now disabled and no other TSN feature is
active, igc_tsn_will_tx_mode_change() evaluates to true because Tx
mode will switch from TSN to Legacy.
7) Driver resets the adapter.
8) Registers are set, and Tx mode switches to Legacy.
9) When link partner is up, steps 3–8 repeat, but this time with
pmac_enabled = true, reactivating TSN.
igc_tsn_will_tx_mode_change() evaluates to true again, since Tx
mode will switch from Legacy to TSN.
10) Driver resets the adapter.
11) Rest adapter completes, registers are set, and Tx mode switches to
TSN.
On Board B:
12) Adapter reset on Board A at step 10 causes it to detect its link
partner as down.
13) Repeats steps 3–8.
14) Once reset adapter on Board A is completed at step 11, it detects
its link partner as up.
15) Repeats steps 9–11.
- this cycle repeats indefinitely. To avoid this issue, igc only uses
mmsv.pmac_enabled to track whether FPE is enabled or disabled.
Co-developed-by: Vinicius Costa Gomes
Signed-off-by: Vinicius Costa Gomes
Co-developed-by: Choong Yong Liang
Signed-off-by: Choong Yong Liang
Signed-off-by: Faizal Rahim
---
drivers/net/ethernet/intel/igc/igc.h | 12 +-
drivers/net/ethernet/intel/igc/igc_base.h| 1 +
drivers/net/ethernet/intel/igc/igc_defines.h | 8 +-
drivers/net/ethernet/intel/igc/igc_ethtool.c | 21 +++
drivers/net/ethernet/intel/igc/igc_main.c| 53 ++-
drivers/net/ethernet/intel/igc/igc_tsn.c | 147 ++-
drivers/net/ethernet/intel/igc/igc_tsn.h | 51 +++
7 files changed, 288 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/intel/igc/igc.h
b/drivers/net/ethernet/intel/igc/igc.h
index 22ecdac26cf4..705bd4739e3b 100644
--- a/drivers/net/ethernet/intel/igc/igc.h
+++ b/drivers/net/ethernet/intel/igc/igc.h
@@ -40,6 +40,10 @@ void igc_ethtool_set_ops(struct net_device *);
#define IGC_MAX_TX_TSTAMP_REGS 4
+struct fpe_t {
+ struct ethtool_mmsv mmsv;
+};
+
enum igc_mac_filter_type {
IGC_MAC_FILTER_TYPE_DST = 0,
IGC_MAC_FILTER_TYPE_SRC
@@ -332,6 +336,8 @@ struct igc_adapter {
struct timespec64 period;
} perout[IGC_N_PEROUT];
+ struct fpe_t fpe;
+
/* LEDs */
struct mutex led_mutex;
struct igc_led_classdev *leds;
@@ -389,10 +395,11 @@ extern char igc_driver_name[];
#define IGC_FLAG_TSN_QBV_ENABLED BIT(17)
#define IGC_FLAG_TSN_QAV_ENABLED BIT(18)
#define IGC_FLAG_TSN_LEGACY_ENABLEDBIT(19)
+#define IGC_FLAG_TSN_PREEMPT_ENABLED BIT(20)
#define IGC_FLAG_TSN_ANY_ENABLED \
(IGC_FLAG_TSN_QBV_ENABLED | IGC_FLAG_TSN_QAV_ENABLED | \
-IGC_FLAG_TSN_LEGACY_ENABLED)
+IGC_FLAG_TSN_LEGACY_ENABLED | IGC_FLAG_TSN_PREEMPT_ENABLED)
#define IGC_FLAG_RSS_FIELD_IPV4_UDPBIT(6)
#define IGC_FLAG_RSS_FIELD_IPV6_UDPBIT(7)
@@ -736,7 +743,10 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapter
*adapter,
u32 location);
int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule);
void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule);
+void igc_disable_empty_addr_recv(struct igc_adapter *adapter);
+int igc_enable_empty_addr_recv(struct igc_adapter *adapter);
struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int
Re: [Intel-wired-lan] [PATCH] e1000e: Link flap workaround option for false IRP events
> The reason for the module option is I'm playing it safe, as Intel couldn't > determine root cause. > The aim of the patch is to keep the effect to a minimum whilst > allowing users who are impacted to turn on the workaround, if they > are encountering the issue. And how do such users determine this module parameter exists? You need to be a pretty savvy user to know about them, and how the set them, etc. > Issue details: > We have seen the issue when running high level traffic on a network > involving at least two nodes and also having two different network > speeds are need. For example: > [Lenovo WS] <---1G link---> Network switch <---100M link--->[traffic source] > The link flap can take a day or two to reproduce - it's rare. By flap, you mean down/up? So the network dies for a couple of seconds while autoneg happens? And this repeats at 1 to 2 day intervals? Or does the link go down, and stay down, and it needs user intervention to get the link back? Andrew
Re: [Intel-wired-lan] [PATCH] e1000e: Link flap workaround option for false IRP events
> >> + e1e_rphy(hw, PHY_REG(772, 26), &phy_data); > > > > Please add some #define for these magic numbers, so we have some idea > > what PHY register you are actually reading. That in itself might help > > explain how the workaround actually works. > > > > I don't know what this register does I'm afraid - that's Intel knowledge and > has not been shared. What PHY is it? Often it is just a COTS PHY, and the datasheet might be available. Given your setup description, pause seems like the obvious thing to check. When trying to debug this, did you look at pause settings? Knowing what this register is might also point towards pause, or something totally different. Andrew
[Intel-wired-lan] [syzbot] [intel-wired-lan?] kernel BUG in pskb_expand_head (4)
Hello, syzbot found the following issue on: HEAD commit:ac9c34d1e45a Merge tag 'for-linus' of git://git.kernel.org.. git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=10da9db058 kernel config: https://syzkaller.appspot.com/x/.config?x=b1635bf4c5557b92 dashboard link: https://syzkaller.appspot.com/bug?extid=da65c993ae113742a25f compiler: gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40 userspace arch: i386 Unfortunately, I don't have any reproducer for this issue yet. Downloadable assets: disk image (non-bootable): https://storage.googleapis.com/syzbot-assets/7feb34a89c2a/non_bootable_disk-ac9c34d1.raw.xz vmlinux: https://storage.googleapis.com/syzbot-assets/a84d67d61e80/vmlinux-ac9c34d1.xz kernel image: https://storage.googleapis.com/syzbot-assets/951486618398/bzImage-ac9c34d1.xz IMPORTANT: if you fix the issue, please add the following tag to the commit: Reported-by: syzbot+da65c993ae113742a...@syzkaller.appspotmail.com [ cut here ] kernel BUG at net/core/skbuff.c:2178! Oops: invalid opcode: [#1] PREEMPT SMP KASAN NOPTI CPU: 0 UID: 0 PID: 16371 Comm: syz.2.2764 Not tainted 6.14.0-rc4-syzkaller-00052-gac9c34d1e45a #0 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.16.3-debian-1.16.3-2~bpo12+1 04/01/2014 RIP: 0010:pskb_expand_head+0x6ce/0x1240 net/core/skbuff.c:2178 Code: 7f 05 e8 35 98 f1 f8 8b 44 24 40 8b 74 24 44 29 f0 01 83 e0 00 00 00 e9 70 ff ff ff e8 4b 5e 8f f8 90 0f 0b e8 43 5e 8f f8 90 <0f> 0b e8 3b 5e 8f f8 41 81 cd 00 00 02 00 e9 46 fb ff ff e8 2a 5e RSP: 0018:c9000d6f7160 EFLAGS: 00010246 RAX: 0008 RBX: 88806c1f9400 RCX: c900273e9000 RDX: 0008 RSI: 892a810d RDI: 0005 RBP: 88806c1f94cc R08: 0005 R09: 0001 R10: 0002 R11: 0005 R12: 0002 R13: 0820 R14: dc00 R15: FS: () GS:88802b40(0063) knlGS:f5066b40 CS: 0010 DS: 002b ES: 002b CR0: 80050033 CR2: 8000601c CR3: 5477 CR4: 00352ef0 Call Trace: __skb_pad+0x18a/0x610 net/core/skbuff.c:2466 __skb_put_padto include/linux/skbuff.h:3843 [inline] skb_put_padto include/linux/skbuff.h:3862 [inline] eth_skb_pad include/linux/etherdevice.h:656 [inline] e1000_xmit_frame+0x2d99/0x5800 drivers/net/ethernet/intel/e1000/e1000_main.c:3128 __netdev_start_xmit include/linux/netdevice.h:5151 [inline] netdev_start_xmit include/linux/netdevice.h:5160 [inline] xmit_one net/core/dev.c:3806 [inline] dev_hard_start_xmit+0x9a/0x7b0 net/core/dev.c:3822 sch_direct_xmit+0x1ae/0xc30 net/sched/sch_generic.c:343 __dev_xmit_skb net/core/dev.c:4045 [inline] __dev_queue_xmit+0x13d4/0x43e0 net/core/dev.c:4621 dev_queue_xmit include/linux/netdevice.h:3313 [inline] llc_sap_action_send_test_c+0x268/0x320 net/llc/llc_s_ac.c:144 llc_exec_sap_trans_actions net/llc/llc_sap.c:153 [inline] llc_sap_next_state net/llc/llc_sap.c:182 [inline] llc_sap_state_process+0x239/0x510 net/llc/llc_sap.c:209 llc_ui_sendmsg+0xd0d/0x14e0 net/llc/af_llc.c:993 sock_sendmsg_nosec net/socket.c:718 [inline] __sock_sendmsg net/socket.c:733 [inline] sys_sendmsg+0xaaf/0xc90 net/socket.c:2573 ___sys_sendmsg+0x135/0x1e0 net/socket.c:2627 __sys_sendmmsg+0x2fa/0x420 net/socket.c:2709 __compat_sys_sendmmsg net/compat.c:360 [inline] __do_compat_sys_sendmmsg net/compat.c:367 [inline] __se_compat_sys_sendmmsg net/compat.c:364 [inline] __ia32_compat_sys_sendmmsg+0x9d/0x100 net/compat.c:364 do_syscall_32_irqs_on arch/x86/entry/common.c:165 [inline] __do_fast_syscall_32+0x73/0x120 arch/x86/entry/common.c:386 do_fast_syscall_32+0x32/0x80 arch/x86/entry/common.c:411 entry_SYSENTER_compat_after_hwframe+0x84/0x8e RIP: 0023:0xf73de579 Code: b8 01 10 06 03 74 b4 01 10 07 03 74 b0 01 10 08 03 74 d8 01 00 00 00 00 00 00 00 00 00 00 00 00 00 51 52 55 89 e5 0f 34 cd 80 <5d> 5a 59 c3 90 90 90 90 8d b4 26 00 00 00 00 8d b4 26 00 00 00 00 RSP: 002b:f506655c EFLAGS: 0296 ORIG_RAX: 0159 RAX: ffda RBX: 0004 RCX: 8c40 RDX: 842c97f7 RSI: 8014 RDI: RBP: R08: R09: R10: R11: 0246 R12: R13: R14: R15: Modules linked in: ---[ end trace ]--- RIP: 0010:pskb_expand_head+0x6ce/0x1240 net/core/skbuff.c:2178 Code: 7f 05 e8 35 98 f1 f8 8b 44 24 40 8b 74 24 44 29 f0 01 83 e0 00 00 00 e9 70 ff ff ff e8 4b 5e 8f f8 90 0f 0b e8 43 5e 8f f8 90 <0f> 0b e8 3b 5e 8f f8 41 81 cd 00 00 02 00 e9 46 fb ff ff e8 2a 5e RSP: 0018:c9000d6f7160 EFLAGS: 00010246 RAX: 0008 RBX: 88806c1f9400 RCX: c900273e9000 RDX: 0008 RSI: 892a810d RDI: 0005 RBP: 88806c1f94cc R08: 000
[Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS e6cd82a32d9c0db0face9ba3e7781828ca5e78da
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git dev-queue branch HEAD: e6cd82a32d9c0db0face9ba3e7781828ca5e78da ixgbe: fix media type detection for E610 device elapsed time: 1448m configs tested: 68 configs skipped: 1 The following configs have been built successfully. More configs may be tested in the coming days. tested configs: alpha allyesconfiggcc-14.2.0 arc randconfig-001-20250227gcc-13.2.0 arc randconfig-002-20250227gcc-13.2.0 arm randconfig-001-20250227gcc-14.2.0 arm randconfig-002-20250227clang-17 arm randconfig-003-20250227gcc-14.2.0 arm randconfig-004-20250227clang-21 arm64randconfig-001-20250227gcc-14.2.0 arm64randconfig-002-20250227clang-19 arm64randconfig-003-20250227gcc-14.2.0 arm64randconfig-004-20250227gcc-14.2.0 csky randconfig-001-20250227gcc-14.2.0 csky randconfig-002-20250227gcc-14.2.0 hexagon allmodconfigclang-21 hexagon allyesconfigclang-18 hexagon randconfig-001-20250227clang-14 hexagon randconfig-002-20250227clang-16 i386 buildonly-randconfig-001-20250227gcc-12 i386 buildonly-randconfig-002-20250227gcc-11 i386 buildonly-randconfig-003-20250227clang-19 i386 buildonly-randconfig-004-20250227gcc-12 i386 buildonly-randconfig-005-20250227gcc-11 i386 buildonly-randconfig-006-20250227clang-19 loongarchrandconfig-001-20250227gcc-14.2.0 loongarchrandconfig-002-20250227gcc-14.2.0 nios2randconfig-001-20250227gcc-14.2.0 nios2randconfig-002-20250227gcc-14.2.0 openrisc allnoconfiggcc-14.2.0 parisc allnoconfiggcc-14.2.0 parisc randconfig-001-20250227gcc-14.2.0 parisc randconfig-002-20250227gcc-14.2.0 powerpc allnoconfiggcc-14.2.0 powerpc randconfig-001-20250227clang-19 powerpc randconfig-002-20250227gcc-14.2.0 powerpc randconfig-003-20250227clang-19 powerpc64randconfig-001-20250227clang-17 powerpc64randconfig-002-20250227clang-21 powerpc64randconfig-003-20250227gcc-14.2.0 riscvallnoconfiggcc-14.2.0 riscvrandconfig-001-20250227gcc-14.2.0 riscvrandconfig-002-20250227gcc-14.2.0 s390allmodconfigclang-19 s390 allnoconfigclang-15 s390allyesconfiggcc-14.2.0 s390 randconfig-001-20250227clang-18 s390 randconfig-002-20250227gcc-14.2.0 sh allmodconfiggcc-14.2.0 sh allyesconfiggcc-14.2.0 sh randconfig-001-20250227gcc-14.2.0 sh randconfig-002-20250227gcc-14.2.0 sparc allmodconfiggcc-14.2.0 sparcrandconfig-001-20250227gcc-14.2.0 sparcrandconfig-002-20250227gcc-14.2.0 sparc64 randconfig-001-20250227gcc-14.2.0 sparc64 randconfig-002-20250227gcc-14.2.0 um allmodconfigclang-21 um allnoconfigclang-18 um allyesconfiggcc-12 um randconfig-001-20250227clang-17 um randconfig-002-20250227gcc-12 x86_64 buildonly-randconfig-001-20250227clang-19 x86_64 buildonly-randconfig-002-20250227clang-19 x86_64 buildonly-randconfig-003-20250227gcc-12 x86_64 buildonly-randconfig-004-20250227gcc-12 x86_64 buildonly-randconfig-005-20250227clang-19 x86_64 buildonly-randconfig-006-20250227gcc-12 xtensa randconfig-001-20250227gcc-14.2.0 xtensa randconfig-002-20250227gcc-14.2.0 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
[Intel-wired-lan] [tnguy-next-queue:10GbE] BUILD SUCCESS 91c8d8e4b7a38dc099b26e14b22f814ca4e75089
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git 10GbE branch HEAD: 91c8d8e4b7a38dc099b26e14b22f814ca4e75089 enic: add dependency on Page Pool elapsed time: 1966m configs tested: 74 configs skipped: 0 The following configs have been built successfully. More configs may be tested in the coming days. tested configs: arc randconfig-001-20250227gcc-13.2.0 arc randconfig-002-20250227gcc-13.2.0 arm randconfig-001-20250227gcc-14.2.0 arm randconfig-002-20250227clang-17 arm randconfig-003-20250227gcc-14.2.0 arm randconfig-004-20250227clang-21 arm64 randconfig-001-20250227gcc-14.2.0 arm64 randconfig-002-20250227clang-19 arm64 randconfig-003-20250227gcc-14.2.0 arm64 randconfig-004-20250227gcc-14.2.0 csky randconfig-001-20250227gcc-14.2.0 csky randconfig-002-20250227gcc-14.2.0 hexagon randconfig-001-20250227clang-14 hexagon randconfig-002-20250227clang-16 i386buildonly-randconfig-001-20250227gcc-12 i386buildonly-randconfig-002-20250227gcc-11 i386buildonly-randconfig-003-20250227clang-19 i386buildonly-randconfig-004-20250227gcc-12 i386buildonly-randconfig-005-20250227gcc-11 i386buildonly-randconfig-006-20250227clang-19 i386 randconfig-011-20250227gcc-12 i386 randconfig-012-20250227gcc-12 i386 randconfig-013-20250227gcc-12 i386 randconfig-014-20250227gcc-12 i386 randconfig-015-20250227gcc-12 i386 randconfig-016-20250227gcc-12 i386 randconfig-017-20250227gcc-12 loongarch randconfig-001-20250227gcc-14.2.0 loongarch randconfig-002-20250227gcc-14.2.0 m68k allnoconfiggcc-14.2.0 microblazeallnoconfiggcc-14.2.0 mips allnoconfiggcc-14.2.0 nios2 allnoconfiggcc-14.2.0 nios2 randconfig-001-20250227gcc-14.2.0 nios2 randconfig-002-20250227gcc-14.2.0 pariscrandconfig-001-20250227gcc-14.2.0 pariscrandconfig-002-20250227gcc-14.2.0 powerpc randconfig-001-20250227clang-19 powerpc randconfig-002-20250227gcc-14.2.0 powerpc randconfig-003-20250227clang-19 powerpc64 randconfig-001-20250227clang-17 powerpc64 randconfig-002-20250227clang-21 powerpc64 randconfig-003-20250227gcc-14.2.0 riscv randconfig-001-20250227gcc-14.2.0 riscv randconfig-002-20250227gcc-14.2.0 s390 allmodconfigclang-19 s390 allyesconfiggcc-14.2.0 s390 randconfig-001-20250227clang-18 s390 randconfig-002-20250227gcc-14.2.0 sh allmodconfiggcc-14.2.0 shallnoconfiggcc-14.2.0 sh allyesconfiggcc-14.2.0 shrandconfig-001-20250227gcc-14.2.0 shrandconfig-002-20250227gcc-14.2.0 sparcallmodconfiggcc-14.2.0 sparc allnoconfiggcc-14.2.0 sparc randconfig-001-20250227gcc-14.2.0 sparc randconfig-002-20250227gcc-14.2.0 sparc64 randconfig-001-20250227gcc-14.2.0 sparc64 randconfig-002-20250227gcc-14.2.0 umrandconfig-001-20250227clang-17 umrandconfig-002-20250227gcc-12 x86_64 buildonly-randconfig-001-20250227clang-19 x86_64 buildonly-randconfig-002-20250227clang-19 x86_64 buildonly-randconfig-003-20250227clang-19 x86_64 buildonly-randconfig-003-20250227gcc-12 x86_64 buildonly-randconfig-004-20250227clang-19 x86_64 buildonly-randconfig-004-20250227gcc-12 x86_64 buildonly-randconfig-005-20250227clang-19 x86_64 buildonly-randconfig-006-20250227clang-19 x86_64 buildonly-randconfig-006-20250227gcc-12 xtensaallnoconfiggcc-14.2.0 xtensarandconfig-001-20250227gcc-14.2.0 xtensarandconfig-002-20250227gcc-14.2.0 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
Re: [Intel-wired-lan] [PATCH iwl-net v3] ixgbe: fix media type detection for E610 device
On Fri, Feb 21, 2025 at 04:49:17PM +0100, Piotr Kwapulinski wrote:
> The commit 23c0e5a16bcc ("ixgbe: Add link management support for E610
> device") introduced incorrect media type detection for E610 device. It
> reproduces when advertised speed is modified after driver reload. Clear
> the previous outdated PHY type high value.
>
> Reproduction steps:
> modprobe ixgbe
> ethtool -s eth0 advertise 0x1
> modprobe -r ixgbe
> modprobe ixgbe
> ethtool -s eth0 advertise 0x1
> Result before the fix:
> netlink error: link settings update failed
> netlink error: Invalid argument
> Result after the fix:
> No output error
>
> Fixes: 23c0e5a16bcc ("ixgbe: Add link management support for E610 device")
> Reviewed-by: Przemek Kitszel
> Reviewed-by: Paul Menzel
> Signed-off-by: Piotr Kwapulinski
Reviewed-by: Simon Horman
Re: [Intel-wired-lan] [PATCH iwl-next v2] ice: Allow 100M speed for E825C SGMII device
On Mon, Feb 24, 2025 at 09:59:24PM +0100, Grzegorz Nitka wrote:
> Add E825C 10GbE SGMII device to the list of devices supporting 100Mbit
> link mode. Without that change, 100Mbit link mode is ignored in ethtool
> interface. This change was missed while adding the support for E825C
> devices family.
>
> Testing hints (please note, for previous version, 100baseT/Full entry
> was missing):
> [root@localhost]# ethtool eth3
> Settings for eth3:
> Supported ports: [ TP ]
> Supported link modes: 100baseT/Full
> 1000baseT/Full
> 1baseT/Full
> Supported pause frame use: Symmetric
> Supports auto-negotiation: Yes
> Supported FEC modes: None
> Advertised link modes: 100baseT/Full
> 1000baseT/Full
> 1baseT/Full
> ...
>
> Fixes: f64e189442332 ("ice: introduce new E825C devices family")
> Signed-off-by: Grzegorz Nitka
> Reviewed-by: Aleksandr Loktionov
> Reviewed-by: Paul Menzel
Reviewed-by: Simon Horman
[Intel-wired-lan] [PATCH v8 iwl-next 02/10] virtchnl: add PTP virtchnl definitions
PTP capabilities are negotiated using virtchnl commands. There are two
available modes of the PTP support: direct and mailbox. When the direct
access to PTP resources is negotiated, virtchnl messages returns a set
of registers that allow read/write directly. When the mailbox access to
PTP resources is negotiated, virtchnl messages are used to access
PTP clock and to read the timestamp values.
Virtchnl API covers both modes and exposes a set of PTP capabilities.
Using virtchnl API, the driver recognizes also HW abilities - maximum
adjustment of the clock and the basic increment value.
Additionally, API allows to configure the secondary mailbox, dedicated
exclusively for PTP purposes.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
v1 -> v2: fix struct description
drivers/net/ethernet/intel/idpf/virtchnl2.h | 302
1 file changed, 302 insertions(+)
diff --git a/drivers/net/ethernet/intel/idpf/virtchnl2.h
b/drivers/net/ethernet/intel/idpf/virtchnl2.h
index 63deb120359c..44a5ee84ed60 100644
--- a/drivers/net/ethernet/intel/idpf/virtchnl2.h
+++ b/drivers/net/ethernet/intel/idpf/virtchnl2.h
@@ -68,6 +68,16 @@ enum virtchnl2_op {
VIRTCHNL2_OP_ADD_MAC_ADDR = 535,
VIRTCHNL2_OP_DEL_MAC_ADDR = 536,
VIRTCHNL2_OP_CONFIG_PROMISCUOUS_MODE= 537,
+
+ /* TimeSync opcodes */
+ VIRTCHNL2_OP_PTP_GET_CAPS = 541,
+ VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP= 542,
+ VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME = 543,
+ VIRTCHNL2_OP_PTP_GET_CROSS_TIME = 544,
+ VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME = 545,
+ VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE = 546,
+ VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME = 547,
+ VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS = 548,
};
/**
@@ -1270,4 +1280,296 @@ struct virtchnl2_promisc_info {
};
VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_promisc_info);
+/**
+ * enum virtchnl2_ptp_caps - PTP capabilities
+ * @VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME: direct access to get the time of
+ *device clock
+ * @VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB: mailbox access to get the time of
+ * device clock
+ * @VIRTCHNL2_CAP_PTP_GET_CROSS_TIME: direct access to cross timestamp
+ * @VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB: mailbox access to cross timestamp
+ * @VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME: direct access to set the time of
+ *device clock
+ * @VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB: mailbox access to set the time of
+ * device clock
+ * @VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK: direct access to adjust the time of
device
+ * clock
+ * @VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB: mailbox access to adjust the time of
+ * device clock
+ * @VIRTCHNL2_CAP_PTP_TX_TSTAMPS: direct access to the Tx timestamping
+ * @VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB: mailbox access to the Tx timestamping
+ *
+ * PF/VF negotiates a set of supported PTP capabilities with the Control Plane.
+ * There are two access methods - mailbox (_MB) and direct.
+ * PTP capabilities enables Main Timer operations: get/set/adjust Main Timer,
+ * cross timestamping and the Tx timestamping.
+ */
+enum virtchnl2_ptp_caps {
+ VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME = BIT(0),
+ VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB= BIT(1),
+ VIRTCHNL2_CAP_PTP_GET_CROSS_TIME= BIT(2),
+ VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB = BIT(3),
+ VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME = BIT(4),
+ VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB= BIT(5),
+ VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK= BIT(6),
+ VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB = BIT(7),
+ VIRTCHNL2_CAP_PTP_TX_TSTAMPS= BIT(8),
+ VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB = BIT(9),
+};
+
+/**
+ * struct virtchnl2_ptp_clk_reg_offsets - Offsets of device and PHY clocks
+ * registers.
+ * @dev_clk_ns_l: Device clock low register offset
+ * @dev_clk_ns_h: Device clock high register offset
+ * @phy_clk_ns_l: PHY clock low register offset
+ * @phy_clk_ns_h: PHY clock high register offset
+ * @cmd_sync_trigger: The command sync trigger register offset
+ * @pad: Padding for future extensions
+ */
+struct virtchnl2_ptp_clk_reg_offsets {
+ __le32 dev_clk_ns_l;
+ __le32 dev_clk_ns_h;
+ __le32 phy_clk_ns_l;
+ __le32 phy_clk_ns_h;
+ __le32 cmd_sync_trigger;
+ u8 pad[4];
+};
+VIRTCHNL2_CHECK_STRUCT_LEN(24, virtchnl2_ptp_clk_reg_offsets);
+
+/**
+ * struct virtchnl2_ptp_cross_time_reg_offsets - Offsets of the device cross
+ *
[Intel-wired-lan] [PATCH v8 iwl-next 00/10] idpf: add initial PTP support
This patch series introduces support for Precision Time Protocol (PTP) to Intel(R) Infrastructure Data Path Function (IDPF) driver. PTP feature is supported when the PTP capability is negotiated with the Control Plane (CP). IDPF creates a PTP clock and sets a set of supported functions. During the PTP initialization, IDPF requests a set of PTP capabilities and receives a writeback from the CP with the set of supported options. These options are: - get time of the PTP clock - get cross timestamp - set the time of the PTP clock - adjust the PTP clock - Tx timestamping Each feature is considered to have direct access, where the operations on PCIe BAR registers are allowed, or the mailbox access, where the virtchnl messages are used to perform any PTP action. Mailbox access means that PTP requests are sent to the CP through dedicated secondary mailbox and the CP reads/writes/modifies desired resource - PTP Clock or Tx timestamp registers. Tx timestamp capabilities are negotiated only for vports that have UPLINK_VPORT flag set by the CP. Capabilities provide information about the number of available Tx timestamp latches, their indexes and size of the Tx timestamp value. IDPF requests Tx timestamp by setting the TSYN bit and the requested timestamp index in the context descriptor for the PTP packets. When the completion tag for that packet is received, IDPF schedules a worker to read the Tx timestamp value. v7 -> v8: split Tx and Rx timestamping enablement, refactor idpf_for_each_vport v6 -> v7: remove section about Tx timestamp limitation from cover letter since it has been fixed, change preparing flow descriptor method v5 -> v6: change locking mechanism in get_ts_info, clean timestamp fields when preparing flow descriptor, add Rx filter v4 -> v5: fix spin unlock when Tx timestamp index is requested v3 -> v4: change timestamp filters dependent on Tx timestamp cap, rewrite function that extends Tx timestamp value, minor fixes v2 -> v3: fix minor issues, revert idpf_for_each_vport changes, extend idpf_ptp_set_rx_tstamp, split tstamp statistics v1 -> v2: add stats for timestamping, use ndo_hwtamp_get/set, fix minor spelling issues Milena Olech (10): idpf: add initial PTP support virtchnl: add PTP virtchnl definitions idpf: move virtchnl structures to the header file idpf: negotiate PTP capabilities and get PTP clock idpf: add mailbox access to read PTP clock time idpf: add PTP clock configuration idpf: add Tx timestamp capabilities negotiation idpf: add Tx timestamp flows idpf: add support for Rx timestamping idpf: change the method for mailbox workqueue allocation drivers/net/ethernet/intel/idpf/Kconfig | 1 + drivers/net/ethernet/intel/idpf/Makefile | 3 + drivers/net/ethernet/intel/idpf/idpf.h| 35 + .../ethernet/intel/idpf/idpf_controlq_api.h | 3 + drivers/net/ethernet/intel/idpf/idpf_dev.c| 14 + .../net/ethernet/intel/idpf/idpf_ethtool.c| 75 +- .../ethernet/intel/idpf/idpf_lan_pf_regs.h| 4 + .../net/ethernet/intel/idpf/idpf_lan_txrx.h | 13 +- drivers/net/ethernet/intel/idpf/idpf_lib.c| 47 + drivers/net/ethernet/intel/idpf/idpf_main.c | 9 +- drivers/net/ethernet/intel/idpf/idpf_ptp.c| 992 ++ drivers/net/ethernet/intel/idpf/idpf_ptp.h| 370 +++ drivers/net/ethernet/intel/idpf/idpf_txrx.c | 171 ++- drivers/net/ethernet/intel/idpf/idpf_txrx.h | 18 +- .../net/ethernet/intel/idpf/idpf_virtchnl.c | 160 ++- .../net/ethernet/intel/idpf/idpf_virtchnl.h | 84 ++ .../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 677 drivers/net/ethernet/intel/idpf/virtchnl2.h | 314 +- 18 files changed, 2887 insertions(+), 103 deletions(-) create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.c create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.h create mode 100644 drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c base-commit: 35a24e73c80b5582d74341af1e6ce310d209587b -- 2.31.1
[Intel-wired-lan] [PATCH v8 iwl-next 08/10] idpf: add Tx timestamp flows
Add functions to request Tx timestamp for the PTP packets, read the Tx
timestamp when the completion tag for that packet is being received,
extend the Tx timestamp value and set the supported timestamping modes.
Tx timestamp is requested for the PTP packets by setting a TSYN bit and
index value in the Tx context descriptor. The driver assumption is that
the Tx timestamp value is ready to be read when the completion tag is
received. Then the driver schedules delayed work and the Tx timestamp
value read is requested through virtchnl message. At the end, the Tx
timestamp value is extended to 64-bit and provided back to the skb.
Co-developed-by: Josh Hay
Signed-off-by: Josh Hay
Signed-off-by: Milena Olech
---
v7 -> v8: change the type of delta calculated when the timestamp is
extended to 64 bit based on the device clock value
v6 -> v7: change the method for preparing flow desciptor to set
tstamp fields to 0 indirectly
v5 -> v6: change locking mechanism in get_ts_info, clean timestamp
fields when preparing flow descriptor to prevent collisions with
PHY timestamping
v4 -> v5: fix the spin_unlock_bh when the Tx timestamp is requested
and the list of free latches is empty
v3 -> v4: change Tx timestamp filters based on the PTP capabilities,
use list_for_each_entry_safe when deleting list items, rewrite
function that extends Tx timestamp value to 64 bits, minor fixes
v2 -> v3: change get_timestamp_filter function name, split stats
into vport-based and tx queue-based
v1 -> v2: add timestamping stats, use ndo_hwtamp_get/ndo_hwstamp_set
drivers/net/ethernet/intel/idpf/idpf.h| 20 ++
.../net/ethernet/intel/idpf/idpf_ethtool.c| 74 +-
.../net/ethernet/intel/idpf/idpf_lan_txrx.h | 13 +-
drivers/net/ethernet/intel/idpf/idpf_lib.c| 45
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 238 +-
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 51
drivers/net/ethernet/intel/idpf/idpf_txrx.c | 141 ++-
drivers/net/ethernet/intel/idpf/idpf_txrx.h | 11 +-
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 6 +-
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 235 +
10 files changed, 819 insertions(+), 15 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index fe4d8ad75b04..d7dbf7d9c7d3 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -246,9 +246,23 @@ struct idpf_port_stats {
u64_stats_t tx_busy;
u64_stats_t tx_drops;
u64_stats_t tx_dma_map_errs;
+ u64_stats_t tx_hwtstamp_skipped;
struct virtchnl2_vport_stats vport_stats;
};
+/**
+ * struct idpf_tx_tstamp_stats - Tx timestamp statistics
+ * @tx_hwtstamp_lock: Lock to protect Tx tstamp stats
+ * @tx_hwtstamp_discarded: Number of Tx skbs discarded due to cached PHC time
+ *being too old to correctly extend timestamp
+ * @tx_hwtstamp_flushed: Number of Tx skbs flushed due to interface closed
+ */
+struct idpf_tx_tstamp_stats {
+ struct mutex tx_hwtstamp_lock;
+ u32 tx_hwtstamp_discarded;
+ u32 tx_hwtstamp_flushed;
+};
+
/**
* struct idpf_vport - Handle for netdevices and queue resources
* @num_txq: Number of allocated TX queues
@@ -293,6 +307,9 @@ struct idpf_port_stats {
* @link_up: True if link is up
* @sw_marker_wq: workqueue for marker packets
* @tx_tstamp_caps: Capabilities negotiated for Tx timestamping
+ * @tstamp_config: The Tx tstamp config
+ * @tstamp_task: Tx timestamping task
+ * @tstamp_stats: Tx timestamping statistics
*/
struct idpf_vport {
u16 num_txq;
@@ -339,6 +356,9 @@ struct idpf_vport {
wait_queue_head_t sw_marker_wq;
struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;
+ struct kernel_hwtstamp_config tstamp_config;
+ struct work_struct tstamp_task;
+ struct idpf_tx_tstamp_stats tstamp_stats;
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
index 59b1a1a09996..ec4183a609c4 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
@@ -2,6 +2,7 @@
/* Copyright (C) 2023 Intel Corporation */
#include "idpf.h"
+#include "idpf_ptp.h"
/**
* idpf_get_rxnfc - command to get RX flow classification rules
@@ -479,6 +480,9 @@ static const struct idpf_stats idpf_gstrings_port_stats[] =
{
IDPF_PORT_STAT("tx-unicast_pkts", port_stats.vport_stats.tx_unicast),
IDPF_PORT_STAT("tx-multicast_pkts",
port_stats.vport_stats.tx_multicast),
IDPF_PORT_STAT("tx-broadcast_pkts",
port_stats.vport_stats.tx_broadcast),
+ IDPF_PORT_STAT("tx-hwtstamp_skipped", port_stats.tx_hwtstamp_skipped),
+ IDPF_PORT_STAT("tx-hwtstamp_flushed", tstamp_stats.tx_hwtstamp_flushed),
+ IDPF_PORT_STAT("tx-hwtstamp_discarded",
tstamp_stats.tx_hwtstamp_discarded),
};
#define IDPF_PORT_STATS_LEN ARRAY_S
[Intel-wired-lan] [PATCH v8 iwl-next 07/10] idpf: add Tx timestamp capabilities negotiation
Tx timestamp capabilities are negotiated for the uplink Vport.
Driver receives information about the number of available Tx timestamp
latches, the size of Tx timestamp value and the set of indexes used
for Tx timestamping.
Add function to get the Tx timestamp capabilities and parse the uplink
vport flag.
Reviewed-by: Alexander Lobakin
Co-developed-by: Emil Tantilov
Signed-off-by: Emil Tantilov
Co-developed-by: Pavan Kumar Linga
Signed-off-by: Pavan Kumar Linga
Signed-off-by: Milena Olech
---
v7 -> v8: refactor idpf_for_each_vport, change a function that
checks if Tx timestamp for a given vport is enabled
v2 -> v3: revert changes in idpf_for_each_vport, fix minor issues
v1 -> v2: change the idpf_for_each_vport macro
drivers/net/ethernet/intel/idpf/idpf.h| 10 ++
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 65 +
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 95 -
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 11 ++
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 128 +-
drivers/net/ethernet/intel/idpf/virtchnl2.h | 12 +-
6 files changed, 317 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index d5d5064d313b..fe4d8ad75b04 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -292,6 +292,7 @@ struct idpf_port_stats {
* @port_stats: per port csum, header split, and other offload stats
* @link_up: True if link is up
* @sw_marker_wq: workqueue for marker packets
+ * @tx_tstamp_caps: Capabilities negotiated for Tx timestamping
*/
struct idpf_vport {
u16 num_txq;
@@ -336,6 +337,8 @@ struct idpf_vport {
bool link_up;
wait_queue_head_t sw_marker_wq;
+
+ struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;
};
/**
@@ -480,6 +483,13 @@ struct idpf_vport_config {
struct idpf_vc_xn_manager;
+#define idpf_for_each_vport(adapter, iter) \
+ for (struct idpf_vport **__##iter = &(adapter)->vports[0], \
+*iter = (adapter)->max_vports ? *__##iter : NULL; \
+iter; \
+iter = (++__##iter) < &(adapter)->vports[(adapter)->max_vports] ? \
+*__##iter : NULL)
+
/**
* struct idpf_adapter - Device data struct generated on probe
* @pdev: PCI device struct given on probe
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 54b7ccb16da0..d096a16bd262 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -62,6 +62,13 @@ void idpf_ptp_get_features_access(const struct idpf_adapter
*adapter)
ptp->adj_dev_clk_time_access = idpf_ptp_get_access(adapter,
direct,
mailbox);
+
+ /* Tx timestamping */
+ direct = VIRTCHNL2_CAP_PTP_TX_TSTAMPS;
+ mailbox = VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB;
+ ptp->tx_tstamp_access = idpf_ptp_get_access(adapter,
+ direct,
+ mailbox);
}
/**
@@ -517,6 +524,61 @@ static int idpf_ptp_create_clock(const struct idpf_adapter
*adapter)
return 0;
}
+/**
+ * idpf_ptp_release_vport_tstamp - Release the Tx timestamps trakcers for a
+ *given vport.
+ * @vport: Virtual port structure
+ *
+ * Remove the queues and delete lists that tracks Tx timestamp entries for a
+ * given vport.
+ */
+static void idpf_ptp_release_vport_tstamp(struct idpf_vport *vport)
+{
+ struct idpf_ptp_tx_tstamp *ptp_tx_tstamp, *tmp;
+ struct list_head *head;
+
+ /* Remove list with free latches */
+ spin_lock(&vport->tx_tstamp_caps->lock_free);
+
+ head = &vport->tx_tstamp_caps->latches_free;
+ list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {
+ list_del(&ptp_tx_tstamp->list_member);
+ kfree(ptp_tx_tstamp);
+ }
+
+ spin_unlock(&vport->tx_tstamp_caps->lock_free);
+
+ /* Remove list with latches in use */
+ spin_lock(&vport->tx_tstamp_caps->lock_in_use);
+
+ head = &vport->tx_tstamp_caps->latches_in_use;
+ list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {
+ list_del(&ptp_tx_tstamp->list_member);
+ kfree(ptp_tx_tstamp);
+ }
+
+ spin_unlock(&vport->tx_tstamp_caps->lock_in_use);
+
+ kfree(vport->tx_tstamp_caps);
+ vport->tx_tstamp_caps = NULL;
+}
+
+/**
+ * idpf_ptp_release_tstamp - Release the Tx timestamps trackers
+ * @adapter: Driver specific private structure
+ *
+ * Remove the queues and delete lists that tracks Tx timestamp entries.
+ */
+static void idpf_ptp_release_tstamp(struct idpf_adapter *adapter)
+{
+ idpf_for_each_vport(adapter, vport) {
+ if (!idpf_ptp_is_vpo
[Intel-wired-lan] [PATCH v8 iwl-next 06/10] idpf: add PTP clock configuration
PTP clock configuration operations - set time, adjust time and adjust
frequency are required to control the clock and maintain synchronization
process.
Extend get PTP capabilities function to request for the clock adjustments
and add functions to enable these actions using dedicated virtchnl
messages.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 191 ++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 43 +++-
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 3 +
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 142 -
4 files changed, 376 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 01e28085eb39..54b7ccb16da0 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -48,6 +48,20 @@ void idpf_ptp_get_features_access(const struct idpf_adapter
*adapter)
ptp->get_cross_tstamp_access = idpf_ptp_get_access(adapter,
direct,
mailbox);
+
+ /* Set the device clock time */
+ direct = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;
+ mailbox = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;
+ ptp->set_dev_clk_time_access = idpf_ptp_get_access(adapter,
+ direct,
+ mailbox);
+
+ /* Adjust the device clock time */
+ direct = VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK;
+ mailbox = VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB;
+ ptp->adj_dev_clk_time_access = idpf_ptp_get_access(adapter,
+ direct,
+ mailbox);
}
/**
@@ -296,6 +310,154 @@ static int idpf_ptp_gettimex64(struct ptp_clock_info
*info,
return 0;
}
+/**
+ * idpf_ptp_settime64 - Set the time of the clock
+ * @info: the driver's PTP info structure
+ * @ts: timespec64 structure that holds the new time value
+ *
+ * Set the device clock to the user input value. The conversion from timespec
+ * to ns happens in the write function.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_settime64(struct ptp_clock_info *info,
+ const struct timespec64 *ts)
+{
+ struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);
+ enum idpf_ptp_access access;
+ int err;
+ u64 ns;
+
+ access = adapter->ptp->set_dev_clk_time_access;
+ if (access != IDPF_PTP_MAILBOX)
+ return -EOPNOTSUPP;
+
+ ns = timespec64_to_ns(ts);
+
+ err = idpf_ptp_set_dev_clk_time(adapter, ns);
+ if (err) {
+ pci_err(adapter->pdev, "Failed to set the time, err: %pe\n",
ERR_PTR(err));
+ return err;
+ }
+
+ return 0;
+}
+
+/**
+ * idpf_ptp_adjtime_nonatomic - Do a non-atomic clock adjustment
+ * @info: the driver's PTP info structure
+ * @delta: Offset in nanoseconds to adjust the time by
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_adjtime_nonatomic(struct ptp_clock_info *info, s64 delta)
+{
+ struct timespec64 now, then;
+ int err;
+
+ err = idpf_ptp_gettimex64(info, &now, NULL);
+ if (err)
+ return err;
+
+ then = ns_to_timespec64(delta);
+ now = timespec64_add(now, then);
+
+ return idpf_ptp_settime64(info, &now);
+}
+
+/**
+ * idpf_ptp_adjtime - Adjust the time of the clock by the indicated delta
+ * @info: the driver's PTP info structure
+ * @delta: Offset in nanoseconds to adjust the time by
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_adjtime(struct ptp_clock_info *info, s64 delta)
+{
+ struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);
+ enum idpf_ptp_access access;
+ int err;
+
+ access = adapter->ptp->adj_dev_clk_time_access;
+ if (access != IDPF_PTP_MAILBOX)
+ return -EOPNOTSUPP;
+
+ /* Hardware only supports atomic adjustments using signed 32-bit
+* integers. For any adjustment outside this range, perform
+* a non-atomic get->adjust->set flow.
+*/
+ if (delta > S32_MAX || delta < S32_MIN)
+ return idpf_ptp_adjtime_nonatomic(info, delta);
+
+ err = idpf_ptp_adj_dev_clk_time(adapter, delta);
+ if (err) {
+ pci_err(adapter->pdev, "Failed to adjust the clock with delta
%lld err: %pe\n", delta, ERR_PTR(err));
+ return err;
+ }
+
+ return 0;
+}
+
+/**
+ * idpf_ptp_adjfine - Adjust clock increment rate
+ * @info: the driver's PTP info structure
+ * @scaled_ppm: Parts per million with 16-bit fractional field
+ *
+ * Adjust the frequency of
[Intel-wired-lan] [PATCH v8 iwl-next 04/10] idpf: negotiate PTP capabilities and get PTP clock
PTP capabilities are negotiated using virtchnl command. Add get
capabilities function, direct access to read the PTP clock time and
direct access to read the cross timestamp - system time and PTP clock
time. Set initial PTP capabilities exposed to the stack.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Tested-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
v1 -> v2: change the size of access fields in ptp struct,
remove CONFIG_PCIE_PTM dependency
drivers/net/ethernet/intel/idpf/Makefile | 2 +
drivers/net/ethernet/intel/idpf/idpf.h| 2 +
drivers/net/ethernet/intel/idpf/idpf_dev.c| 14 +
.../ethernet/intel/idpf/idpf_lan_pf_regs.h| 4 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 263 ++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 89 ++
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 95 +++
7 files changed, 469 insertions(+)
create mode 100644 drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c
diff --git a/drivers/net/ethernet/intel/idpf/Makefile
b/drivers/net/ethernet/intel/idpf/Makefile
index 1f38a9d7125c..83ac5e296382 100644
--- a/drivers/net/ethernet/intel/idpf/Makefile
+++ b/drivers/net/ethernet/intel/idpf/Makefile
@@ -17,4 +17,6 @@ idpf-y := \
idpf_vf_dev.o
idpf-$(CONFIG_IDPF_SINGLEQ)+= idpf_singleq_txrx.o
+
idpf-$(CONFIG_PTP_1588_CLOCK) += idpf_ptp.o
+idpf-$(CONFIG_PTP_1588_CLOCK) += idpf_virtchnl_ptp.o
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index 2e8b14dd9d96..d5d5064d313b 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -189,6 +189,7 @@ struct idpf_vport_max_q {
* @mb_intr_reg_init: Mailbox interrupt register initialization
* @reset_reg_init: Reset register initialization
* @trigger_reset: Trigger a reset to occur
+ * @ptp_reg_init: PTP register initialization
*/
struct idpf_reg_ops {
void (*ctlq_reg_init)(struct idpf_ctlq_create_info *cq);
@@ -197,6 +198,7 @@ struct idpf_reg_ops {
void (*reset_reg_init)(struct idpf_adapter *adapter);
void (*trigger_reset)(struct idpf_adapter *adapter,
enum idpf_flags trig_cause);
+ void (*ptp_reg_init)(const struct idpf_adapter *adapter);
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_dev.c
b/drivers/net/ethernet/intel/idpf/idpf_dev.c
index 41e4bd49402a..3fae81f1f988 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_dev.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_dev.c
@@ -4,6 +4,7 @@
#include "idpf.h"
#include "idpf_lan_pf_regs.h"
#include "idpf_virtchnl.h"
+#include "idpf_ptp.h"
#define IDPF_PF_ITR_IDX_SPACING0x4
@@ -148,6 +149,18 @@ static void idpf_trigger_reset(struct idpf_adapter
*adapter,
idpf_get_reg_addr(adapter, PFGEN_CTRL));
}
+/**
+ * idpf_ptp_reg_init - Initialize required registers
+ * @adapter: Driver specific private structure
+ *
+ * Set the bits required for enabling shtime and cmd execution
+ */
+static void idpf_ptp_reg_init(const struct idpf_adapter *adapter)
+{
+ adapter->ptp->cmd.shtime_enable_mask = PF_GLTSYN_CMD_SYNC_SHTIME_EN_M;
+ adapter->ptp->cmd.exec_cmd_mask = PF_GLTSYN_CMD_SYNC_EXEC_CMD_M;
+}
+
/**
* idpf_reg_ops_init - Initialize register API function pointers
* @adapter: Driver specific private structure
@@ -159,6 +172,7 @@ static void idpf_reg_ops_init(struct idpf_adapter *adapter)
adapter->dev_ops.reg_ops.mb_intr_reg_init = idpf_mb_intr_reg_init;
adapter->dev_ops.reg_ops.reset_reg_init = idpf_reset_reg_init;
adapter->dev_ops.reg_ops.trigger_reset = idpf_trigger_reset;
+ adapter->dev_ops.reg_ops.ptp_reg_init = idpf_ptp_reg_init;
}
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
b/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
index 24edb8a6ec2e..cc9aa2b6a14a 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
+++ b/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
@@ -53,6 +53,10 @@
#define PF_FW_ATQH_ATQH_M GENMASK(9, 0)
#define PF_FW_ATQT (PF_FW_BASE + 0x24)
+/* Timesync registers */
+#define PF_GLTSYN_CMD_SYNC_EXEC_CMD_M GENMASK(1, 0)
+#define PF_GLTSYN_CMD_SYNC_SHTIME_EN_M BIT(2)
+
/* Interrupts */
#define PF_GLINT_BASE 0x0890
#define PF_GLINT_DYN_CTL(_INT) (PF_GLINT_BASE + ((_INT) * 0x1000))
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 1ac6367f5989..12caeaf4c1a1 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -4,6 +4,258 @@
#include "idpf.h"
#include "idpf_ptp.h"
+/**
+ * idpf_ptp_get_access - Determine the access type of the PTP features
+ * @adapter: Driver specific private structure
+ * @direct: Capability that indicates the direct access
+ * @mailbox: Capability that indicates the mailbox access
+ *
+
[Intel-wired-lan] [PATCH v8 iwl-next 01/10] idpf: add initial PTP support
PTP feature is supported if the VIRTCHNL2_CAP_PTP is negotiated during the
capabilities recognition. Initial PTP support includes PTP initialization
and registration of the clock.
Reviewed-by: Alexander Lobakin
Reviewed-by: Vadim Fedorenko
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
drivers/net/ethernet/intel/idpf/Kconfig | 1 +
drivers/net/ethernet/intel/idpf/Makefile | 1 +
drivers/net/ethernet/intel/idpf/idpf.h| 3 +
drivers/net/ethernet/intel/idpf/idpf_main.c | 4 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 89 +++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 32 +++
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 9 +-
7 files changed, 138 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.c
create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.h
diff --git a/drivers/net/ethernet/intel/idpf/Kconfig
b/drivers/net/ethernet/intel/idpf/Kconfig
index 1addd663acad..2c359a8551c7 100644
--- a/drivers/net/ethernet/intel/idpf/Kconfig
+++ b/drivers/net/ethernet/intel/idpf/Kconfig
@@ -4,6 +4,7 @@
config IDPF
tristate "Intel(R) Infrastructure Data Path Function Support"
depends on PCI_MSI
+ depends on PTP_1588_CLOCK_OPTIONAL
select DIMLIB
select LIBETH
help
diff --git a/drivers/net/ethernet/intel/idpf/Makefile
b/drivers/net/ethernet/intel/idpf/Makefile
index 2ce01a0b5898..1f38a9d7125c 100644
--- a/drivers/net/ethernet/intel/idpf/Makefile
+++ b/drivers/net/ethernet/intel/idpf/Makefile
@@ -17,3 +17,4 @@ idpf-y := \
idpf_vf_dev.o
idpf-$(CONFIG_IDPF_SINGLEQ)+= idpf_singleq_txrx.o
+idpf-$(CONFIG_PTP_1588_CLOCK) += idpf_ptp.o
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index 66544faab710..2e8b14dd9d96 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -530,6 +530,7 @@ struct idpf_vc_xn_manager;
* @vector_lock: Lock to protect vector distribution
* @queue_lock: Lock to protect queue distribution
* @vc_buf_lock: Lock to protect virtchnl buffer
+ * @ptp: Storage for PTP-related data
*/
struct idpf_adapter {
struct pci_dev *pdev;
@@ -587,6 +588,8 @@ struct idpf_adapter {
struct mutex vector_lock;
struct mutex queue_lock;
struct mutex vc_buf_lock;
+
+ struct idpf_ptp *ptp;
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c
b/drivers/net/ethernet/intel/idpf/idpf_main.c
index b6c515d14cbf..60bae3081035 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_main.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_main.c
@@ -163,6 +163,10 @@ static int idpf_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
goto err_free;
}
+ err = pci_enable_ptm(pdev, NULL);
+ if (err)
+ pci_dbg(pdev, "PCIe PTM is not supported by PCIe
bus/controller\n");
+
/* set up for high or low dma */
err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
if (err) {
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
new file mode 100644
index ..1ac6367f5989
--- /dev/null
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright (C) 2024 Intel Corporation */
+
+#include "idpf.h"
+#include "idpf_ptp.h"
+
+/**
+ * idpf_ptp_create_clock - Create PTP clock device for userspace
+ * @adapter: Driver specific private structure
+ *
+ * This function creates a new PTP clock device.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_create_clock(const struct idpf_adapter *adapter)
+{
+ struct ptp_clock *clock;
+
+ /* Attempt to register the clock before enabling the hardware. */
+ clock = ptp_clock_register(&adapter->ptp->info,
+ &adapter->pdev->dev);
+ if (IS_ERR(clock)) {
+ pci_err(adapter->pdev, "PTP clock creation failed: %pe\n",
clock);
+ return PTR_ERR(clock);
+ }
+
+ adapter->ptp->clock = clock;
+
+ return 0;
+}
+
+/**
+ * idpf_ptp_init - Initialize PTP hardware clock support
+ * @adapter: Driver specific private structure
+ *
+ * Set up the device for interacting with the PTP hardware clock for all
+ * functions. Function will allocate and register a ptp_clock with the
+ * PTP_1588_CLOCK infrastructure.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int idpf_ptp_init(struct idpf_adapter *adapter)
+{
+ int err;
+
+ if (!idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_PTP)) {
+ pci_dbg(adapter->pdev, "PTP capability is not detected\n");
+ return -EOPNOTSUPP;
+ }
+
+ adapter->ptp = kzalloc(sizeof(*adapter->ptp), GFP_KERNEL);
+ if (!adapter->ptp)
+ return -ENOMEM;
+
+ /* add a back pointer to adapte
[Intel-wired-lan] [PATCH v8 iwl-next 05/10] idpf: add mailbox access to read PTP clock time
When the access to read PTP clock is specified as mailbox, the driver
needs to send virtchnl message to perform PTP actions. Message is sent
using idpf_mbq_opc_send_msg_to_peer_drv mailbox opcode, with the parameters
received during PTP capabilities negotiation.
Add functions to recognize PTP messages, move them to dedicated secondary
mailbox, read the PTP clock time and cross timestamp using mailbox
messages.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
.../ethernet/intel/idpf/idpf_controlq_api.h | 3 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 66 +++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 43 ++
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 47 +++
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 83 +++
5 files changed, 242 insertions(+)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
b/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
index e8e046ef2f0d..9642494a67d8 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
+++ b/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
@@ -123,9 +123,12 @@ struct idpf_ctlq_info {
/**
* enum idpf_mbx_opc - PF/VF mailbox commands
* @idpf_mbq_opc_send_msg_to_cp: used by PF or VF to send a message to its CP
+ * @idpf_mbq_opc_send_msg_to_peer_drv: used by PF or VF to send a message to
+ *any peer driver
*/
enum idpf_mbx_opc {
idpf_mbq_opc_send_msg_to_cp = 0x0801,
+ idpf_mbq_opc_send_msg_to_peer_drv = 0x0804,
};
/* API supported for control queue management */
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 12caeaf4c1a1..01e28085eb39 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -95,6 +95,37 @@ static u64 idpf_ptp_read_src_clk_reg_direct(struct
idpf_adapter *adapter,
return ((u64)hi << 32) | lo;
}
+/**
+ * idpf_ptp_read_src_clk_reg_mailbox - Read the main timer value through
mailbox
+ * @adapter: Driver specific private structure
+ * @sts: Optional parameter for holding a pair of system timestamps from
+ * the system clock. Will be ignored when NULL is given.
+ * @src_clk: Returned main timer value in nanoseconds unit
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_read_src_clk_reg_mailbox(struct idpf_adapter *adapter,
+struct ptp_system_timestamp *sts,
+u64 *src_clk)
+{
+ struct idpf_ptp_dev_timers clk_time;
+ int err;
+
+ /* Read the system timestamp pre PHC read */
+ ptp_read_system_prets(sts);
+
+ err = idpf_ptp_get_dev_clk_time(adapter, &clk_time);
+ if (err)
+ return err;
+
+ /* Read the system timestamp post PHC read */
+ ptp_read_system_postts(sts);
+
+ *src_clk = clk_time.dev_clk_time_ns;
+
+ return 0;
+}
+
/**
* idpf_ptp_read_src_clk_reg - Read the main timer value
* @adapter: Driver specific private structure
@@ -110,6 +141,8 @@ static int idpf_ptp_read_src_clk_reg(struct idpf_adapter
*adapter, u64 *src_clk,
switch (adapter->ptp->get_dev_clk_time_access) {
case IDPF_PTP_NONE:
return -EOPNOTSUPP;
+ case IDPF_PTP_MAILBOX:
+ return idpf_ptp_read_src_clk_reg_mailbox(adapter, sts, src_clk);
case IDPF_PTP_DIRECT:
*src_clk = idpf_ptp_read_src_clk_reg_direct(adapter, sts);
break;
@@ -146,6 +179,31 @@ static void idpf_ptp_get_sync_device_time_direct(struct
idpf_adapter *adapter,
*sys_time = ((u64)sys_time_hi << 32) | sys_time_lo;
}
+/**
+ * idpf_ptp_get_sync_device_time_mailbox - Get the cross time stamp values
+ *through mailbox
+ * @adapter: Driver specific private structure
+ * @dev_time: 64bit main timer value expressed in nanoseconds
+ * @sys_time: 64bit system time value expressed in nanoseconds
+ *
+ * Return: a pair of cross timestamp values on success, -errno otherwise.
+ */
+static int idpf_ptp_get_sync_device_time_mailbox(struct idpf_adapter *adapter,
+u64 *dev_time, u64 *sys_time)
+{
+ struct idpf_ptp_dev_timers cross_time;
+ int err;
+
+ err = idpf_ptp_get_cross_time(adapter, &cross_time);
+ if (err)
+ return err;
+
+ *dev_time = cross_time.dev_clk_time_ns;
+ *sys_time = cross_time.sys_time_ns;
+
+ return err;
+}
+
/**
* idpf_ptp_get_sync_device_time - Get the cross time stamp info
* @device: Current device time
@@ -161,10 +219,18 @@ static int idpf_ptp_get_sync_device_time(ktime_t *device,
{
struct idpf_adapter *adapter = ctx;
u64 ns_time_dev, ns_time_sys;
+ int err;
switch (adapter->ptp->get_cross_tstamp_access) {
[Intel-wired-lan] [PATCH v8 iwl-next 03/10] idpf: move virtchnl structures to the header file
Move virtchnl structures to the header file to expose them for the PTP
virtchnl file.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
v1 -> v2: fix commit message title
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 86 +--
.../net/ethernet/intel/idpf/idpf_virtchnl.h | 84 ++
2 files changed, 86 insertions(+), 84 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
index 7004289b974c..a55ff20895ed 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
@@ -7,88 +7,6 @@
#include "idpf_virtchnl.h"
#include "idpf_ptp.h"
-#define IDPF_VC_XN_MIN_TIMEOUT_MSEC2000
-#define IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC(60 * 1000)
-#define IDPF_VC_XN_IDX_M GENMASK(7, 0)
-#define IDPF_VC_XN_SALT_M GENMASK(15, 8)
-#define IDPF_VC_XN_RING_LENU8_MAX
-
-/**
- * enum idpf_vc_xn_state - Virtchnl transaction status
- * @IDPF_VC_XN_IDLE: not expecting a reply, ready to be used
- * @IDPF_VC_XN_WAITING: expecting a reply, not yet received
- * @IDPF_VC_XN_COMPLETED_SUCCESS: a reply was expected and received,
- * buffer updated
- * @IDPF_VC_XN_COMPLETED_FAILED: a reply was expected and received, but there
- * was an error, buffer not updated
- * @IDPF_VC_XN_SHUTDOWN: transaction object cannot be used, VC torn down
- * @IDPF_VC_XN_ASYNC: transaction sent asynchronously and doesn't have the
- * return context; a callback may be provided to handle
- * return
- */
-enum idpf_vc_xn_state {
- IDPF_VC_XN_IDLE = 1,
- IDPF_VC_XN_WAITING,
- IDPF_VC_XN_COMPLETED_SUCCESS,
- IDPF_VC_XN_COMPLETED_FAILED,
- IDPF_VC_XN_SHUTDOWN,
- IDPF_VC_XN_ASYNC,
-};
-
-struct idpf_vc_xn;
-/* Callback for asynchronous messages */
-typedef int (*async_vc_cb) (struct idpf_adapter *, struct idpf_vc_xn *,
- const struct idpf_ctlq_msg *);
-
-/**
- * struct idpf_vc_xn - Data structure representing virtchnl transactions
- * @completed: virtchnl event loop uses that to signal when a reply is
- *available, uses kernel completion API
- * @state: virtchnl event loop stores the data below, protected by the
- *completion's lock.
- * @reply_sz: Original size of reply, may be > reply_buf.iov_len; it will be
- * truncated on its way to the receiver thread according to
- * reply_buf.iov_len.
- * @reply: Reference to the buffer(s) where the reply data should be written
- *to. May be 0-length (then NULL address permitted) if the reply data
- *should be ignored.
- * @async_handler: if sent asynchronously, a callback can be provided to handle
- *the reply when it's received
- * @vc_op: corresponding opcode sent with this transaction
- * @idx: index used as retrieval on reply receive, used for cookie
- * @salt: changed every message to make unique, used for cookie
- */
-struct idpf_vc_xn {
- struct completion completed;
- enum idpf_vc_xn_state state;
- size_t reply_sz;
- struct kvec reply;
- async_vc_cb async_handler;
- u32 vc_op;
- u8 idx;
- u8 salt;
-};
-
-/**
- * struct idpf_vc_xn_params - Parameters for executing transaction
- * @send_buf: kvec for send buffer
- * @recv_buf: kvec for recv buffer, may be NULL, must then have zero length
- * @timeout_ms: timeout to wait for reply
- * @async: send message asynchronously, will not wait on completion
- * @async_handler: If sent asynchronously, optional callback handler. The user
- *must be careful when using async handlers as the memory for
- *the recv_buf _cannot_ be on stack if this is async.
- * @vc_op: virtchnl op to send
- */
-struct idpf_vc_xn_params {
- struct kvec send_buf;
- struct kvec recv_buf;
- int timeout_ms;
- bool async;
- async_vc_cb async_handler;
- u32 vc_op;
-};
-
/**
* struct idpf_vc_xn_manager - Manager for tracking transactions
* @ring: backing and lookup for transactions
@@ -450,8 +368,8 @@ static void idpf_vc_xn_push_free(struct idpf_vc_xn_manager
*vcxn_mngr,
* >= @recv_buf.iov_len, but we never overflow @@recv_buf_iov_base). < 0 for
* error.
*/
-static ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,
- const struct idpf_vc_xn_params *params)
+ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,
+ const struct idpf_vc_xn_params *params)
{
const struct kvec *send_buf = ¶ms->send_buf;
struct idpf_vc_xn *xn;
diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
index 83da5d8da56b..3522c1238ea2 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
+++ b/drivers/net/ethe
[Intel-wired-lan] [PATCH v8 iwl-next 09/10] idpf: add support for Rx timestamping
Add Rx timestamp function when the Rx timestamp value is read directly
from the Rx descriptor. In order to extend the Rx timestamp value to 64
bit in hot path, the PHC time is cached in the receive groups.
Add supported Rx timestamp modes.
Signed-off-by: Milena Olech
---
v7 -> v8: add a function to check if the Rx timestamp for a given vport
is enabled
v5 -> v6: add Rx filter
v2 -> v3: add disable Rx timestamp
v1 -> v2: extend commit message
.../net/ethernet/intel/idpf/idpf_ethtool.c| 1 +
drivers/net/ethernet/intel/idpf/idpf_lib.c| 6 +-
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 86 ++-
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 21 +
drivers/net/ethernet/intel/idpf/idpf_txrx.c | 30 +++
drivers/net/ethernet/intel/idpf/idpf_txrx.h | 7 +-
6 files changed, 147 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
index ec4183a609c4..7a4793749bc5 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
@@ -1333,6 +1333,7 @@ static void idpf_get_timestamp_filters(const struct
idpf_vport *vport,
SOF_TIMESTAMPING_RAW_HARDWARE;
info->tx_types = BIT(HWTSTAMP_TX_OFF);
+ info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL);
if (!vport->tx_tstamp_caps ||
vport->adapter->ptp->tx_tstamp_access == IDPF_PTP_NONE)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_lib.c
b/drivers/net/ethernet/intel/idpf/idpf_lib.c
index 73b1a4c00dc7..262132c4e3e5 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_lib.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_lib.c
@@ -2368,7 +2368,8 @@ static int idpf_hwtstamp_set(struct net_device *netdev,
idpf_vport_ctrl_lock(netdev);
vport = idpf_netdev_to_vport(netdev);
- if (!idpf_ptp_is_vport_tx_tstamp_ena(vport)) {
+ if (!idpf_ptp_is_vport_tx_tstamp_ena(vport) &&
+ !idpf_ptp_is_vport_rx_tstamp_ena(vport)) {
idpf_vport_ctrl_unlock(netdev);
return -EOPNOTSUPP;
}
@@ -2388,7 +2389,8 @@ static int idpf_hwtstamp_get(struct net_device *netdev,
idpf_vport_ctrl_lock(netdev);
vport = idpf_netdev_to_vport(netdev);
- if (!idpf_ptp_is_vport_tx_tstamp_ena(vport)) {
+ if (!idpf_ptp_is_vport_tx_tstamp_ena(vport) &&
+ !idpf_ptp_is_vport_rx_tstamp_ena(vport)) {
idpf_vport_ctrl_unlock(netdev);
return 0;
}
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index df89e5ea4803..24825a2777b9 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -317,12 +317,41 @@ static int idpf_ptp_gettimex64(struct ptp_clock_info
*info,
return 0;
}
+/**
+ * idpf_ptp_update_phctime_rxq_grp - Update the cached PHC time for a given Rx
+ * queue group.
+ * @grp: receive queue group in which Rx timestamp is enabled
+ * @split: Indicates whether the queue model is split or single queue
+ * @systime: Cached system time
+ */
+static void
+idpf_ptp_update_phctime_rxq_grp(const struct idpf_rxq_group *grp, bool split,
+ u64 systime)
+{
+ struct idpf_rx_queue *rxq;
+ u16 i;
+
+ if (!split) {
+ for (i = 0; i < grp->singleq.num_rxq; i++) {
+ rxq = grp->singleq.rxqs[i];
+ if (rxq)
+ WRITE_ONCE(rxq->cached_phc_time, systime);
+ }
+ } else {
+ for (i = 0; i < grp->splitq.num_rxq_sets; i++) {
+ rxq = &grp->splitq.rxq_sets[i]->rxq;
+ if (rxq)
+ WRITE_ONCE(rxq->cached_phc_time, systime);
+ }
+ }
+}
+
/**
* idpf_ptp_update_cached_phctime - Update the cached PHC time values
* @adapter: Driver specific private structure
*
* This function updates the system time values which are cached in the adapter
- * structure.
+ * structure and the Rx queues.
*
* This function must be called periodically to ensure that the cached value
* is never more than 2 seconds old.
@@ -345,6 +374,21 @@ static int idpf_ptp_update_cached_phctime(struct
idpf_adapter *adapter)
WRITE_ONCE(adapter->ptp->cached_phc_time, systime);
WRITE_ONCE(adapter->ptp->cached_phc_jiffies, jiffies);
+ idpf_for_each_vport(adapter, vport) {
+ bool split;
+
+ if (!vport || !vport->rxq_grps)
+ continue;
+
+ split = idpf_is_queue_model_split(vport->rxq_model);
+
+ for (u16 i = 0; i < vport->num_rxq_grp; i++) {
+ struct idpf_rxq_group *grp = &vport->rxq_grps[i];
+
+ idpf_ptp_update_phctime_rxq_grp(grp,
[Intel-wired-lan] [PATCH v8 iwl-next 10/10] idpf: change the method for mailbox workqueue allocation
Since workqueues are created per CPU, the works scheduled to this
workqueues are run on the CPU they were assigned. It may result in
overloaded CPU that is not able to handle virtchnl messages in
relatively short time. Allocating workqueue with WQ_UNBOUND and
WQ_HIGHPRI flags allows scheduler to queue virtchl messages on less loaded
CPUs, what eliminates delays.
Reviewed-by: Alexander Lobakin
Signed-off-by: Milena Olech
---
drivers/net/ethernet/intel/idpf/idpf_main.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c
b/drivers/net/ethernet/intel/idpf/idpf_main.c
index 60bae3081035..022645f4fa9c 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_main.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_main.c
@@ -198,9 +198,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
goto err_serv_wq_alloc;
}
- adapter->mbx_wq = alloc_workqueue("%s-%s-mbx",
- WQ_UNBOUND | WQ_MEM_RECLAIM, 0,
- dev_driver_string(dev),
+ adapter->mbx_wq = alloc_workqueue("%s-%s-mbx", WQ_UNBOUND | WQ_HIGHPRI,
+ 0, dev_driver_string(dev),
dev_name(dev));
if (!adapter->mbx_wq) {
dev_err(dev, "Failed to allocate mailbox workqueue\n");
--
2.31.1
[Intel-wired-lan] [PATCH iwl-next v1] idpf: assign extracted ptype to struct libeth_rqe_info field
Assign the ptype extracted from qword to the ptype field of struct
libeth_rqe_info.
Remove the now excess ptype param of idpf_rx_singleq_extract_fields(),
idpf_rx_singleq_extract_base_fields() and
idpf_rx_singleq_extract_flex_fields().
Suggested-by: Alexander Lobakin
Reviewed-by: Przemek Kitszel
Reviewed-by: Alexander Lobakin
Signed-off-by: Mateusz Polchlopek
---
.../ethernet/intel/idpf/idpf_singleq_txrx.c | 24 +--
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c
b/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c
index eae1b6f474e6..72436a582158 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c
@@ -891,7 +891,6 @@ bool idpf_rx_singleq_buf_hw_alloc_all(struct idpf_rx_queue
*rx_q,
* idpf_rx_singleq_extract_base_fields - Extract fields from the Rx descriptor
* @rx_desc: the descriptor to process
* @fields: storage for extracted values
- * @ptype: pointer that will store packet type
*
* Decode the Rx descriptor and extract relevant information including the
* size and Rx packet type.
@@ -901,21 +900,20 @@ bool idpf_rx_singleq_buf_hw_alloc_all(struct
idpf_rx_queue *rx_q,
*/
static void
idpf_rx_singleq_extract_base_fields(const union virtchnl2_rx_desc *rx_desc,
- struct libeth_rqe_info *fields, u32 *ptype)
+ struct libeth_rqe_info *fields)
{
u64 qword;
qword = le64_to_cpu(rx_desc->base_wb.qword1.status_error_ptype_len);
fields->len = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_LEN_PBUF_M, qword);
- *ptype = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_PTYPE_M, qword);
+ fields->ptype = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_PTYPE_M, qword);
}
/**
* idpf_rx_singleq_extract_flex_fields - Extract fields from the Rx descriptor
* @rx_desc: the descriptor to process
* @fields: storage for extracted values
- * @ptype: pointer that will store packet type
*
* Decode the Rx descriptor and extract relevant information including the
* size and Rx packet type.
@@ -925,12 +923,12 @@ idpf_rx_singleq_extract_base_fields(const union
virtchnl2_rx_desc *rx_desc,
*/
static void
idpf_rx_singleq_extract_flex_fields(const union virtchnl2_rx_desc *rx_desc,
- struct libeth_rqe_info *fields, u32 *ptype)
+ struct libeth_rqe_info *fields)
{
fields->len = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PKT_LEN_M,
le16_to_cpu(rx_desc->flex_nic_wb.pkt_len));
- *ptype = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PTYPE_M,
- le16_to_cpu(rx_desc->flex_nic_wb.ptype_flex_flags0));
+ fields->ptype = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PTYPE_M,
+
le16_to_cpu(rx_desc->flex_nic_wb.ptype_flex_flags0));
}
/**
@@ -944,12 +942,12 @@ idpf_rx_singleq_extract_flex_fields(const union
virtchnl2_rx_desc *rx_desc,
static void
idpf_rx_singleq_extract_fields(const struct idpf_rx_queue *rx_q,
const union virtchnl2_rx_desc *rx_desc,
- struct libeth_rqe_info *fields, u32 *ptype)
+ struct libeth_rqe_info *fields)
{
if (rx_q->rxdids == VIRTCHNL2_RXDID_1_32B_BASE_M)
- idpf_rx_singleq_extract_base_fields(rx_desc, fields, ptype);
+ idpf_rx_singleq_extract_base_fields(rx_desc, fields);
else
- idpf_rx_singleq_extract_flex_fields(rx_desc, fields, ptype);
+ idpf_rx_singleq_extract_flex_fields(rx_desc, fields);
}
/**
@@ -972,7 +970,6 @@ static int idpf_rx_singleq_clean(struct idpf_rx_queue
*rx_q, int budget)
struct libeth_rqe_info fields = { };
union virtchnl2_rx_desc *rx_desc;
struct idpf_rx_buf *rx_buf;
- u32 ptype;
/* get the Rx desc from Rx queue based on 'next_to_clean' */
rx_desc = &rx_q->rx[ntc];
@@ -993,7 +990,7 @@ static int idpf_rx_singleq_clean(struct idpf_rx_queue
*rx_q, int budget)
*/
dma_rmb();
- idpf_rx_singleq_extract_fields(rx_q, rx_desc, &fields, &ptype);
+ idpf_rx_singleq_extract_fields(rx_q, rx_desc, &fields);
rx_buf = &rx_q->rx_buf[ntc];
if (!libeth_rx_sync_for_cpu(rx_buf, fields.len))
@@ -1037,7 +1034,8 @@ static int idpf_rx_singleq_clean(struct idpf_rx_queue
*rx_q, int budget)
total_rx_bytes += skb->len;
/* protocol */
- idpf_rx_singleq_process_skb_fields(rx_q, skb, rx_desc, ptype);
+ idpf_rx_singleq_process_skb_fields(rx_q, skb, rx_desc,
+ fields.ptype);
/* send completed skb up the stack */
napi_gro_receive
