Re: [Intel-wired-lan] [PATCH net-next 7/9] i40e: Move memory allocation structures to i40e_alloc.h
On 26. 09. 23 21:57, Przemek Kitszel wrote: On 9/26/23 20:27, Ivan Vecera wrote: Structures i40e_dma_mem & i40e_virt_mem are defined i40e_osdep.h while memory allocation functions that use them are declared in i40e_alloc.h Move them to i40e_alloc.h and remove this header file dependency on i40e_osdep.h header. Due to removal of this dependency we have to include i40e_osdep.h in files that requires it. Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e_adminq.c | 1 + drivers/net/ethernet/intel/i40e/i40e_adminq.h | 2 +- drivers/net/ethernet/intel/i40e/i40e_alloc.h | 21 ++- drivers/net/ethernet/intel/i40e/i40e_common.c | 1 + drivers/net/ethernet/intel/i40e/i40e_dcb.c | 1 + drivers/net/ethernet/intel/i40e/i40e_diag.c | 1 + drivers/net/ethernet/intel/i40e/i40e_hmc.c | 1 + drivers/net/ethernet/intel/i40e/i40e_hmc.h | 2 +- .../net/ethernet/intel/i40e/i40e_lan_hmc.c | 1 + drivers/net/ethernet/intel/i40e/i40e_nvm.c | 1 + drivers/net/ethernet/intel/i40e/i40e_osdep.h | 19 - 11 files changed, 29 insertions(+), 22 deletions(-) I very much like this series, but extending i40e_osdep.h usage asks for comment 😉 - please try to reorder patches to have less dependency on it first, and afterwards do split (IOW first remove&reduce, then split what's left) (disclaimer: I have not double checked if that's possible) I will move the patch 5 after i40e_osdep split and memory allocation clean-up patches. This should simplify the changes. Thanks for comment... Ivan ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next v2 0/9] i40e: House-keeping and clean-up
The series makes some house-keeping tasks on i40e driver: Patch 1: Removes unnecessary back pointer from i40e_hw Patch 2: Moves I40E_MASK macro to i40e_register.h where is used Patch 3: Refactors I40E_MDIO_CLAUSE* to use the common macro Patch 4: Add header dependencies to Patch 5: Simplifies memory alloction functions Patch 6: Moves mem alloc structures to i40e_alloc.h Patch 7: Splits i40e_osdep.h to i40e_debug.h and i40e_io.h Patch 8: Removes circular header deps, fixes and cleans headers Patch 9: Moves DDP specific macros and structs to i40e_ddp.c Changes: v2 - Fixed kdoc comment for i40e_hw_to_pf() - Reordered patches 5 and 7-9 to make them simplier drivers/net/ethernet/intel/i40e/i40e.h| 76 +-- drivers/net/ethernet/intel/i40e/i40e_adminq.c | 8 +- drivers/net/ethernet/intel/i40e/i40e_adminq.h | 3 +- .../net/ethernet/intel/i40e/i40e_adminq_cmd.h | 2 + drivers/net/ethernet/intel/i40e/i40e_alloc.h | 24 +++--- drivers/net/ethernet/intel/i40e/i40e_client.c | 1 - drivers/net/ethernet/intel/i40e/i40e_common.c | 11 ++- drivers/net/ethernet/intel/i40e/i40e_dcb.c| 4 +- drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_ddp.c| 24 +- drivers/net/ethernet/intel/i40e/i40e_debug.h | 47 .../net/ethernet/intel/i40e/i40e_debugfs.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_diag.h | 5 +- .../net/ethernet/intel/i40e/i40e_ethtool.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_hmc.c| 16 ++-- drivers/net/ethernet/intel/i40e/i40e_hmc.h| 4 + drivers/net/ethernet/intel/i40e/i40e_io.h | 16 .../net/ethernet/intel/i40e/i40e_lan_hmc.c| 9 +-- .../net/ethernet/intel/i40e/i40e_lan_hmc.h| 2 + drivers/net/ethernet/intel/i40e/i40e_main.c | 57 -- drivers/net/ethernet/intel/i40e/i40e_nvm.c| 2 + drivers/net/ethernet/intel/i40e/i40e_osdep.h | 59 -- .../net/ethernet/intel/i40e/i40e_prototype.h | 9 ++- drivers/net/ethernet/intel/i40e/i40e_ptp.c| 3 +- .../net/ethernet/intel/i40e/i40e_register.h | 5 ++ drivers/net/ethernet/intel/i40e/i40e_txrx.c | 7 +- drivers/net/ethernet/intel/i40e/i40e_txrx.h | 1 + .../ethernet/intel/i40e/i40e_txrx_common.h| 2 + drivers/net/ethernet/intel/i40e/i40e_type.h | 59 +++--- .../ethernet/intel/i40e/i40e_virtchnl_pf.c| 2 + .../ethernet/intel/i40e/i40e_virtchnl_pf.h| 4 +- drivers/net/ethernet/intel/i40e/i40e_xsk.c| 4 - drivers/net/ethernet/intel/i40e/i40e_xsk.h| 4 + include/linux/avf/virtchnl.h | 4 + 34 files changed, 231 insertions(+), 251 deletions(-) create mode 100644 drivers/net/ethernet/intel/i40e/i40e_debug.h create mode 100644 drivers/net/ethernet/intel/i40e/i40e_io.h delete mode 100644 drivers/net/ethernet/intel/i40e/i40e_osdep.h -- 2.41.0 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next v2 1/9] i40e: Remove back pointer from i40e_hw structure
The .back field placed in i40e_hw is used to get pointer to i40e_pf instance but it is not necessary as the i40e_hw is a part of i40e_pf and containerof macro can be used to obtain the pointer to i40e_pf. Remove .back field from i40e_hw structure, introduce i40e_hw_to_pf() and i40e_hw_to_dev() helpers and use them. Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e.h | 11 ++ drivers/net/ethernet/intel/i40e/i40e_main.c | 22 ++-- drivers/net/ethernet/intel/i40e/i40e_osdep.h | 8 +++ drivers/net/ethernet/intel/i40e/i40e_type.h | 1 - 4 files changed, 31 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h index 6e310a539467..7f79d5929be6 100644 --- a/drivers/net/ethernet/intel/i40e/i40e.h +++ b/drivers/net/ethernet/intel/i40e/i40e.h @@ -1321,4 +1321,15 @@ static inline u32 i40e_is_tc_mqprio_enabled(struct i40e_pf *pf) return pf->flags & I40E_FLAG_TC_MQPRIO; } +/** + * i40e_hw_to_pf - get pf pointer from the hardware structure + * @hw: pointer to the device HW structure + **/ +static inline struct i40e_pf *i40e_hw_to_pf(struct i40e_hw *hw) +{ + return container_of(hw, struct i40e_pf, hw); +} + +struct device *i40e_hw_to_dev(struct i40e_hw *hw); + #endif /* _I40E_H_ */ diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c index 00ca2b88165c..c19d1b4cc32b 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_main.c +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c @@ -119,6 +119,17 @@ static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f, } } +/** + * i40e_hw_to_dev - get device pointer from the hardware structure + * @hw: pointer to the device HW structure + **/ +struct device *i40e_hw_to_dev(struct i40e_hw *hw) +{ + struct i40e_pf *pf = i40e_hw_to_pf(hw); + + return &pf->pdev->dev; +} + /** * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code * @hw: pointer to the HW structure @@ -129,7 +140,7 @@ static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f, int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, u64 size, u32 alignment) { - struct i40e_pf *pf = (struct i40e_pf *)hw->back; + struct i40e_pf *pf = i40e_hw_to_pf(hw); mem->size = ALIGN(size, alignment); mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa, @@ -147,7 +158,7 @@ int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, **/ int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) { - struct i40e_pf *pf = (struct i40e_pf *)hw->back; + struct i40e_pf *pf = i40e_hw_to_pf(hw); dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); mem->va = NULL; @@ -15623,10 +15634,10 @@ static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw) **/ static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw) { - struct pci_dev *pdev = ((struct i40e_pf *)hw->back)->pdev; + struct i40e_pf *pf = i40e_hw_to_pf(hw); - hw->subsystem_device_id = pdev->subsystem_device ? - pdev->subsystem_device : + hw->subsystem_device_id = pf->pdev->subsystem_device ? + pf->pdev->subsystem_device : (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX); } @@ -15696,7 +15707,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) set_bit(__I40E_DOWN, pf->state); hw = &pf->hw; - hw->back = pf; pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0), I40E_MAX_CSR_SPACE); diff --git a/drivers/net/ethernet/intel/i40e/i40e_osdep.h b/drivers/net/ethernet/intel/i40e/i40e_osdep.h index 2bd4de03dafa..997569a4ad57 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_osdep.h +++ b/drivers/net/ethernet/intel/i40e/i40e_osdep.h @@ -18,10 +18,10 @@ * actual OS primitives */ -#define hw_dbg(hw, S, A...) \ -do { \ - dev_dbg(&((struct i40e_pf *)hw->back)->pdev->dev, S, ##A); \ -} while (0) +struct i40e_hw; +struct device *i40e_hw_to_dev(struct i40e_hw *hw); + +#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A) #define wr32(a, reg, value)writel((value), ((a)->hw_addr + (reg))) #define rd32(a, reg) readl((a)->hw_addr + (reg)) diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h index 232131bedc3e..658bc8913278 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_type.h +++ b/drivers/net/ethernet/intel/i40e/i40e_type.h @@ -525,7 +525,6 @@ struct i40e_dcbx_config { /* Port hardware description */ struct i40e_hw { u8 __iomem *hw_addr; - void *back; /* subsys
[Intel-wired-lan] [PATCH net-next v2 2/9] i40e: Move I40E_MASK macro to i40e_register.h
The macro is practically used only in i40e_register.h header file except few I40E_MDIO_CLAUSE* macros that are defined in i40e_type.h Move I40E_MASK macro to i40e_register.h header, I40E_MDIO_CLAUSE* macros are refactored in subsequent patch. Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e_register.h | 3 +++ drivers/net/ethernet/intel/i40e/i40e_type.h | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h index 7339003aa17c..eebb5735772b 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_register.h +++ b/drivers/net/ethernet/intel/i40e/i40e_register.h @@ -4,6 +4,9 @@ #ifndef _I40E_REGISTER_H_ #define _I40E_REGISTER_H_ +/* I40E_MASK is a macro used on 32 bit registers */ +#define I40E_MASK(mask, shift) ((u32)(mask) << (shift)) + #define I40E_GL_ATQLEN_ATQCRIT_SHIFT 30 #define I40E_GL_ATQLEN_ATQCRIT_MASK I40E_MASK(0x1, I40E_GL_ATQLEN_ATQCRIT_SHIFT) #define I40E_PF_ARQBAH 0x00080180 /* Reset: EMPR */ diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h index 658bc8913278..60b55d66d648 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_type.h +++ b/drivers/net/ethernet/intel/i40e/i40e_type.h @@ -11,9 +11,6 @@ #include "i40e_lan_hmc.h" #include "i40e_devids.h" -/* I40E_MASK is a macro used on 32 bit registers */ -#define I40E_MASK(mask, shift) ((u32)(mask) << (shift)) - #define I40E_MAX_VSI_QP16 #define I40E_MAX_VF_VSI4 #define I40E_MAX_CHAINED_RX_BUFFERS5 -- 2.41.0 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next v2 3/9] i40e: Refactor I40E_MDIO_CLAUSE* macros
The macros I40E_MDIO_CLAUSE22* and I40E_MDIO_CLAUSE45* are using I40E_MASK together with the same values I40E_GLGEN_MSCA_STCODE_SHIFT and I40E_GLGEN_MSCA_OPCODE_SHIFT to define masks. Introduce I40E_GLGEN_MSCA_OPCODE_MASK and I40E_GLGEN_MSCA_STCODE_MASK for both shifts in i40e_register.h and use them to refactor the macros mentioned above. Signed-off-by: Ivan Vecera --- .../net/ethernet/intel/i40e/i40e_register.h | 2 ++ drivers/net/ethernet/intel/i40e/i40e_type.h | 23 +++ 2 files changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h index eebb5735772b..f408fcf23ce8 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_register.h +++ b/drivers/net/ethernet/intel/i40e/i40e_register.h @@ -205,7 +205,9 @@ #define I40E_GLGEN_MSCA_DEVADD_SHIFT 16 #define I40E_GLGEN_MSCA_PHYADD_SHIFT 21 #define I40E_GLGEN_MSCA_OPCODE_SHIFT 26 +#define I40E_GLGEN_MSCA_OPCODE_MASK(_i) I40E_MASK(_i, I40E_GLGEN_MSCA_OPCODE_SHIFT) #define I40E_GLGEN_MSCA_STCODE_SHIFT 28 +#define I40E_GLGEN_MSCA_STCODE_MASK I40E_MASK(0x1, I40E_GLGEN_MSCA_STCODE_SHIFT) #define I40E_GLGEN_MSCA_MDICMD_SHIFT 30 #define I40E_GLGEN_MSCA_MDICMD_MASK I40E_MASK(0x1, I40E_GLGEN_MSCA_MDICMD_SHIFT) #define I40E_GLGEN_MSCA_MDIINPROGEN_SHIFT 31 diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h index 60b55d66d648..63cbf7669827 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_type.h +++ b/drivers/net/ethernet/intel/i40e/i40e_type.h @@ -67,21 +67,14 @@ enum i40e_debug_mask { I40E_DEBUG_ALL = 0x }; -#define I40E_MDIO_CLAUSE22_STCODE_MASK I40E_MASK(1, \ - I40E_GLGEN_MSCA_STCODE_SHIFT) -#define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK I40E_MASK(1, \ - I40E_GLGEN_MSCA_OPCODE_SHIFT) -#define I40E_MDIO_CLAUSE22_OPCODE_READ_MASKI40E_MASK(2, \ - I40E_GLGEN_MSCA_OPCODE_SHIFT) - -#define I40E_MDIO_CLAUSE45_STCODE_MASK I40E_MASK(0, \ - I40E_GLGEN_MSCA_STCODE_SHIFT) -#define I40E_MDIO_CLAUSE45_OPCODE_ADDRESS_MASK I40E_MASK(0, \ - I40E_GLGEN_MSCA_OPCODE_SHIFT) -#define I40E_MDIO_CLAUSE45_OPCODE_WRITE_MASK I40E_MASK(1, \ - I40E_GLGEN_MSCA_OPCODE_SHIFT) -#define I40E_MDIO_CLAUSE45_OPCODE_READ_MASKI40E_MASK(3, \ - I40E_GLGEN_MSCA_OPCODE_SHIFT) +#define I40E_MDIO_CLAUSE22_STCODE_MASK I40E_GLGEN_MSCA_STCODE_MASK +#define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK I40E_GLGEN_MSCA_OPCODE_MASK(1) +#define I40E_MDIO_CLAUSE22_OPCODE_READ_MASKI40E_GLGEN_MSCA_OPCODE_MASK(2) + +#define I40E_MDIO_CLAUSE45_STCODE_MASK I40E_GLGEN_MSCA_STCODE_MASK +#define I40E_MDIO_CLAUSE45_OPCODE_ADDRESS_MASK I40E_GLGEN_MSCA_OPCODE_MASK(0) +#define I40E_MDIO_CLAUSE45_OPCODE_WRITE_MASK I40E_GLGEN_MSCA_OPCODE_MASK(1) +#define I40E_MDIO_CLAUSE45_OPCODE_READ_MASKI40E_GLGEN_MSCA_OPCODE_MASK(3) #define I40E_PHY_COM_REG_PAGE 0x1E #define I40E_PHY_LED_LINK_MODE_MASK 0xF0 -- 2.41.0 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next v2 5/9] i40e: Simplify memory allocation functions
Enum i40e_memory_type enum is unused in i40e_allocate_dma_mem() thus can be safely removed. Useless macros in i40e_alloc.h can be removed as well. Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e_adminq.c | 4 drivers/net/ethernet/intel/i40e/i40e_alloc.h | 14 - drivers/net/ethernet/intel/i40e/i40e_hmc.c| 12 --- drivers/net/ethernet/intel/i40e/i40e_main.c | 20 +-- drivers/net/ethernet/intel/i40e/i40e_osdep.h | 7 --- 5 files changed, 14 insertions(+), 43 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c index 100eb77b8dfe..e72cfe587c89 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c @@ -51,7 +51,6 @@ static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) int ret_code; ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, -i40e_mem_atq_ring, (hw->aq.num_asq_entries * sizeof(struct i40e_aq_desc)), I40E_ADMINQ_DESC_ALIGNMENT); @@ -78,7 +77,6 @@ static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) int ret_code; ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, -i40e_mem_arq_ring, (hw->aq.num_arq_entries * sizeof(struct i40e_aq_desc)), I40E_ADMINQ_DESC_ALIGNMENT); @@ -136,7 +134,6 @@ static int i40e_alloc_arq_bufs(struct i40e_hw *hw) for (i = 0; i < hw->aq.num_arq_entries; i++) { bi = &hw->aq.arq.r.arq_bi[i]; ret_code = i40e_allocate_dma_mem(hw, bi, -i40e_mem_arq_buf, hw->aq.arq_buf_size, I40E_ADMINQ_DESC_ALIGNMENT); if (ret_code) @@ -198,7 +195,6 @@ static int i40e_alloc_asq_bufs(struct i40e_hw *hw) for (i = 0; i < hw->aq.num_asq_entries; i++) { bi = &hw->aq.asq.r.asq_bi[i]; ret_code = i40e_allocate_dma_mem(hw, bi, -i40e_mem_asq_buf, hw->aq.asq_buf_size, I40E_ADMINQ_DESC_ALIGNMENT); if (ret_code) diff --git a/drivers/net/ethernet/intel/i40e/i40e_alloc.h b/drivers/net/ethernet/intel/i40e/i40e_alloc.h index a6c9a9e343d1..4b2d8da048c6 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_alloc.h +++ b/drivers/net/ethernet/intel/i40e/i40e_alloc.h @@ -6,23 +6,9 @@ struct i40e_hw; -/* Memory allocation types */ -enum i40e_memory_type { - i40e_mem_arq_buf = 0, /* ARQ indirect command buffer */ - i40e_mem_asq_buf = 1, - i40e_mem_atq_buf = 2, /* ATQ indirect command buffer */ - i40e_mem_arq_ring = 3, /* ARQ descriptor ring */ - i40e_mem_atq_ring = 4, /* ATQ descriptor ring */ - i40e_mem_pd = 5,/* Page Descriptor */ - i40e_mem_bp = 6,/* Backing Page - 4KB */ - i40e_mem_bp_jumbo = 7, /* Backing Page - > 4KB */ - i40e_mem_reserved -}; - /* prototype for functions used for dynamic memory allocation */ int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem, - enum i40e_memory_type type, u64 size, u32 alignment); int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem); diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_hmc.c index 96ee63aca7a1..7451d346ae83 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_hmc.c +++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.c @@ -22,7 +22,6 @@ int i40e_add_sd_table_entry(struct i40e_hw *hw, enum i40e_sd_entry_type type, u64 direct_mode_sz) { - enum i40e_memory_type mem_type __attribute__((unused)); struct i40e_hmc_sd_entry *sd_entry; bool dma_mem_alloc_done = false; struct i40e_dma_mem mem; @@ -43,16 +42,13 @@ int i40e_add_sd_table_entry(struct i40e_hw *hw, sd_entry = &hmc_info->sd_table.sd_entry[sd_index]; if (!sd_entry->valid) { - if (I40E_SD_TYPE_PAGED == type) { - mem_type = i40e_mem_pd; + if (type == I40E_SD_TYPE_PAGED) alloc_len = I40E_HMC_PAGED_BP_SIZE; - } else { - mem_type = i40e_mem_bp_jumbo; + else alloc_len = direct_mode_sz; - }
[Intel-wired-lan] [PATCH net-next v2 4/9] virtchnl: Add header dependencies
The uses BIT, struct_size and ETH_ALEN macros but does not include appropriate header files that defines them. Add these dependencies so this header file can be included anywhere. Signed-off-by: Ivan Vecera --- include/linux/avf/virtchnl.h | 4 1 file changed, 4 insertions(+) diff --git a/include/linux/avf/virtchnl.h b/include/linux/avf/virtchnl.h index dd71d3009771..6b3acf15be5c 100644 --- a/include/linux/avf/virtchnl.h +++ b/include/linux/avf/virtchnl.h @@ -4,6 +4,10 @@ #ifndef _VIRTCHNL_H_ #define _VIRTCHNL_H_ +#include +#include +#include + /* Description: * This header file describes the Virtual Function (VF) - Physical Function * (PF) communication protocol used by the drivers for all devices starting -- 2.41.0 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next v2 6/9] i40e: Move memory allocation structures to i40e_alloc.h
Structures i40e_dma_mem & i40e_virt_mem are defined i40e_osdep.h while memory allocation functions that use them are declared in i40e_alloc.h Move them there. Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e_adminq.h | 1 + drivers/net/ethernet/intel/i40e/i40e_alloc.h | 14 ++ drivers/net/ethernet/intel/i40e/i40e_osdep.h | 12 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.h b/drivers/net/ethernet/intel/i40e/i40e_adminq.h index 267f2e0a21ce..1c3d2bc5c3f7 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq.h +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.h @@ -4,6 +4,7 @@ #ifndef _I40E_ADMINQ_H_ #define _I40E_ADMINQ_H_ +#include "i40e_alloc.h" #include "i40e_osdep.h" #include "i40e_adminq_cmd.h" diff --git a/drivers/net/ethernet/intel/i40e/i40e_alloc.h b/drivers/net/ethernet/intel/i40e/i40e_alloc.h index 4b2d8da048c6..e0dde326255d 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_alloc.h +++ b/drivers/net/ethernet/intel/i40e/i40e_alloc.h @@ -4,8 +4,22 @@ #ifndef _I40E_ALLOC_H_ #define _I40E_ALLOC_H_ +#include + struct i40e_hw; +/* memory allocation tracking */ +struct i40e_dma_mem { + void *va; + dma_addr_t pa; + u32 size; +}; + +struct i40e_virt_mem { + void *va; + u32 size; +}; + /* prototype for functions used for dynamic memory allocation */ int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem, diff --git a/drivers/net/ethernet/intel/i40e/i40e_osdep.h b/drivers/net/ethernet/intel/i40e/i40e_osdep.h index 70cac3bb31ec..fd18895cfb56 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_osdep.h +++ b/drivers/net/ethernet/intel/i40e/i40e_osdep.h @@ -29,18 +29,6 @@ struct device *i40e_hw_to_dev(struct i40e_hw *hw); #define rd64(a, reg) readq((a)->hw_addr + (reg)) #define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT) -/* memory allocation tracking */ -struct i40e_dma_mem { - void *va; - dma_addr_t pa; - u32 size; -}; - -struct i40e_virt_mem { - void *va; - u32 size; -}; - #define i40e_debug(h, m, s, ...) \ do { \ if (((m) & (h)->debug_mask))\ -- 2.41.0 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next v2 7/9] i40e: Split i40e_osdep.h
Header i40e_osdep.h contains only IO primitives and couple of debug printing macros. Split this header file to i40e_io.h and i40e_debug.h and move i40e_debug_mask enum to i40e_debug.h Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e_adminq.h | 2 +- drivers/net/ethernet/intel/i40e/i40e_debug.h | 47 +++ drivers/net/ethernet/intel/i40e/i40e_hmc.c| 1 - drivers/net/ethernet/intel/i40e/i40e_io.h | 16 +++ .../net/ethernet/intel/i40e/i40e_lan_hmc.c| 1 - drivers/net/ethernet/intel/i40e/i40e_osdep.h | 40 .../net/ethernet/intel/i40e/i40e_prototype.h | 1 + drivers/net/ethernet/intel/i40e/i40e_type.h | 31 ++-- 8 files changed, 68 insertions(+), 71 deletions(-) create mode 100644 drivers/net/ethernet/intel/i40e/i40e_debug.h create mode 100644 drivers/net/ethernet/intel/i40e/i40e_io.h delete mode 100644 drivers/net/ethernet/intel/i40e/i40e_osdep.h diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.h b/drivers/net/ethernet/intel/i40e/i40e_adminq.h index 1c3d2bc5c3f7..80125bea80a2 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq.h +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.h @@ -4,8 +4,8 @@ #ifndef _I40E_ADMINQ_H_ #define _I40E_ADMINQ_H_ +#include #include "i40e_alloc.h" -#include "i40e_osdep.h" #include "i40e_adminq_cmd.h" #define I40E_ADMINQ_DESC(R, i) \ diff --git a/drivers/net/ethernet/intel/i40e/i40e_debug.h b/drivers/net/ethernet/intel/i40e/i40e_debug.h new file mode 100644 index ..27ebc72d8bfe --- /dev/null +++ b/drivers/net/ethernet/intel/i40e/i40e_debug.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Intel Corporation. */ + +#ifndef _I40E_DEBUG_H_ +#define _I40E_DEBUG_H_ + +#include + +/* debug masks - set these bits in hw->debug_mask to control output */ +enum i40e_debug_mask { + I40E_DEBUG_INIT = 0x0001, + I40E_DEBUG_RELEASE = 0x0002, + + I40E_DEBUG_LINK = 0x0010, + I40E_DEBUG_PHY = 0x0020, + I40E_DEBUG_HMC = 0x0040, + I40E_DEBUG_NVM = 0x0080, + I40E_DEBUG_LAN = 0x0100, + I40E_DEBUG_FLOW = 0x0200, + I40E_DEBUG_DCB = 0x0400, + I40E_DEBUG_DIAG = 0x0800, + I40E_DEBUG_FD = 0x1000, + I40E_DEBUG_PACKAGE = 0x2000, + I40E_DEBUG_IWARP= 0x00F0, + I40E_DEBUG_AQ_MESSAGE = 0x0100, + I40E_DEBUG_AQ_DESCRIPTOR= 0x0200, + I40E_DEBUG_AQ_DESC_BUFFER = 0x0400, + I40E_DEBUG_AQ_COMMAND = 0x0600, + I40E_DEBUG_AQ = 0x0F00, + + I40E_DEBUG_USER = 0xF000, + + I40E_DEBUG_ALL = 0x +}; + +struct i40e_hw; +struct device *i40e_hw_to_dev(struct i40e_hw *hw); + +#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A) + +#define i40e_debug(h, m, s, ...) \ +do { \ + if (((m) & (h)->debug_mask))\ + dev_info(i40e_hw_to_dev(hw), s, ##__VA_ARGS__); \ +} while (0) + +#endif /* _I40E_DEBUG_H_ */ diff --git a/drivers/net/ethernet/intel/i40e/i40e_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_hmc.c index 7451d346ae83..b383aea652f3 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_hmc.c +++ b/drivers/net/ethernet/intel/i40e/i40e_hmc.c @@ -2,7 +2,6 @@ /* Copyright(c) 2013 - 2018 Intel Corporation. */ #include "i40e.h" -#include "i40e_osdep.h" #include "i40e_register.h" #include "i40e_alloc.h" #include "i40e_hmc.h" diff --git a/drivers/net/ethernet/intel/i40e/i40e_io.h b/drivers/net/ethernet/intel/i40e/i40e_io.h new file mode 100644 index ..2a2ed9a1d476 --- /dev/null +++ b/drivers/net/ethernet/intel/i40e/i40e_io.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright(c) 2023 Intel Corporation. */ + +#ifndef _I40E_IO_H_ +#define _I40E_IO_H_ + +/* get readq/writeq support for 32 bit kernels, use the low-first version */ +#include + +#define wr32(a, reg, value)writel((value), ((a)->hw_addr + (reg))) +#define rd32(a, reg) readl((a)->hw_addr + (reg)) + +#define rd64(a, reg) readq((a)->hw_addr + (reg)) +#define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT) + +#endif /* _I40E_IO_H_ */ diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c index 474365bf0648..830f1de254ef 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c +++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c @@ -2,7 +2,6 @@ /* Copyright(c) 2013 - 2018 Intel Corporation. */ #include "i40e.h" -#include "i40e_osdep.h" #include "i40e_register.h" #include
[Intel-wired-lan] [PATCH net-next v2 8/9] i40e: Remove circular header dependencies and fix headers
Similarly as for ice driver [1] there are also circular header dependencies in i40e driver: i40e.h -> i40e_virtchnl_pf.h -> i40e.h Another issue is that i40e header files does not contain their own depenencies on other header files (both private and standard) so their inclusion in .c file require to add these deps in certain order to that .c file to make it compilable. Fix both issues by removal the mentioned circular dependency, by filling i40e headers with their dependencies so they can be placed anywhere in a source code. Additionally remove bunch of includes from i40e.h super header file that are not necessary and include i40e.h only in .c files that really require it. [1] 649c87c6ff52 ("ice: remove circular header dependencies on ice.h") Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e.h| 43 --- drivers/net/ethernet/intel/i40e/i40e_adminq.c | 4 +- .../net/ethernet/intel/i40e/i40e_adminq_cmd.h | 2 + drivers/net/ethernet/intel/i40e/i40e_client.c | 1 - drivers/net/ethernet/intel/i40e/i40e_common.c | 11 +++-- drivers/net/ethernet/intel/i40e/i40e_dcb.c| 4 +- drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_ddp.c| 2 +- .../net/ethernet/intel/i40e/i40e_debugfs.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_diag.h | 5 ++- .../net/ethernet/intel/i40e/i40e_ethtool.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_hmc.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_hmc.h| 4 ++ .../net/ethernet/intel/i40e/i40e_lan_hmc.c| 8 ++-- .../net/ethernet/intel/i40e/i40e_lan_hmc.h| 2 + drivers/net/ethernet/intel/i40e/i40e_main.c | 15 --- drivers/net/ethernet/intel/i40e/i40e_nvm.c| 2 + .../net/ethernet/intel/i40e/i40e_prototype.h | 5 +-- drivers/net/ethernet/intel/i40e/i40e_ptp.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 7 ++- drivers/net/ethernet/intel/i40e/i40e_txrx.h | 1 + .../ethernet/intel/i40e/i40e_txrx_common.h| 2 + drivers/net/ethernet/intel/i40e/i40e_type.h | 7 +-- .../ethernet/intel/i40e/i40e_virtchnl_pf.c| 2 + .../ethernet/intel/i40e/i40e_virtchnl_pf.h| 4 +- drivers/net/ethernet/intel/i40e/i40e_xsk.c| 4 -- drivers/net/ethernet/intel/i40e/i40e_xsk.h| 4 ++ 27 files changed, 72 insertions(+), 81 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h index 7f79d5929be6..107826c040c1 100644 --- a/drivers/net/ethernet/intel/i40e/i40e.h +++ b/drivers/net/ethernet/intel/i40e/i40e.h @@ -4,47 +4,20 @@ #ifndef _I40E_H_ #define _I40E_H_ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include -#include -#include -#include +#include #include +#include +#include +#include #include -#include -#include -#include #include -#include -#include -#include "i40e_type.h" +#include "i40e_dcb.h" +#include "i40e_debug.h" +#include "i40e_io.h" #include "i40e_prototype.h" -#include -#include -#include "i40e_virtchnl_pf.h" +#include "i40e_register.h" #include "i40e_txrx.h" -#include "i40e_dcb.h" /* Useful i40e defaults */ #define I40E_MAX_VEB 16 diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c index e72cfe587c89..9ce6e633cc2f 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq.c +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq.c @@ -1,9 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2013 - 2018 Intel Corporation. */ -#include "i40e_type.h" +#include +#include "i40e_alloc.h" #include "i40e_register.h" -#include "i40e_adminq.h" #include "i40e_prototype.h" static void i40e_resume_aq(struct i40e_hw *hw); diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h index 3357d65a906b..18a1c3b6d72c 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h @@ -4,6 +4,8 @@ #ifndef _I40E_ADMINQ_CMD_H_ #define _I40E_ADMINQ_CMD_H_ +#include + /* This header file defines the i40e Admin Queue commands and is shared between * i40e Firmware and Software. * diff --git a/drivers/net/ethernet/intel/i40e/i40e_client.c b/drivers/net/ethernet/intel/i40e/i40e_client.c index 639c5a1ca853..306758428aef 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_client.c +++ b/drivers/net/ethernet/intel/i40e/i40e_client.c @@ -6,7 +6,6 @@ #include #include "i40e.h" -#include "i40e_prototype.h" static LIST_HEAD(i40e_devices); static DEFINE_MUTEX(i40e_device_mutex); diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c index eeef20f77106..6d1042ca0317 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_com
[Intel-wired-lan] [PATCH net-next v2 9/9] i40e: Move DDP specific macros and structures to i40e_ddp.c
Move several DDP related macros and structures from i40e.h header to i40e_ddp.c where are privately used. Make static i40e_ddp_load() function that is also used only in i40e_ddp and move declaration of i40e_ddp_flash() used by i40e_ethtool.c to i40e_prototype.h Signed-off-by: Ivan Vecera --- drivers/net/ethernet/intel/i40e/i40e.h| 24 --- drivers/net/ethernet/intel/i40e/i40e_ddp.c| 22 +++-- .../net/ethernet/intel/i40e/i40e_prototype.h | 5 3 files changed, 25 insertions(+), 26 deletions(-) diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h index 107826c040c1..214744de120d 100644 --- a/drivers/net/ethernet/intel/i40e/i40e.h +++ b/drivers/net/ethernet/intel/i40e/i40e.h @@ -4,7 +4,6 @@ #ifndef _I40E_H_ #define _I40E_H_ -#include #include #include #include @@ -296,29 +295,6 @@ struct i40e_udp_port_config { u8 filter_index; }; -#define I40_DDP_FLASH_REGION 100 -#define I40E_PROFILE_INFO_SIZE 48 -#define I40E_MAX_PROFILE_NUM 16 -#define I40E_PROFILE_LIST_SIZE \ - (I40E_PROFILE_INFO_SIZE * I40E_MAX_PROFILE_NUM + 4) -#define I40E_DDP_PROFILE_PATH "intel/i40e/ddp/" -#define I40E_DDP_PROFILE_NAME_MAX 64 - -int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size, - bool is_add); -int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash); - -struct i40e_ddp_profile_list { - u32 p_count; - struct i40e_profile_info p_info[]; -}; - -struct i40e_ddp_old_profile_list { - struct list_head list; - size_t old_ddp_size; - u8 old_ddp_buf[]; -}; - /* macros related to FLX_PIT */ #define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \ I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \ diff --git a/drivers/net/ethernet/intel/i40e/i40e_ddp.c b/drivers/net/ethernet/intel/i40e/i40e_ddp.c index 21b3518c4096..6b68b6575a1d 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_ddp.c +++ b/drivers/net/ethernet/intel/i40e/i40e_ddp.c @@ -4,6 +4,24 @@ #include #include "i40e.h" +#define I40_DDP_FLASH_REGION 100 +#define I40E_PROFILE_INFO_SIZE 48 +#define I40E_MAX_PROFILE_NUM 16 +#define I40E_PROFILE_LIST_SIZE \ + (I40E_PROFILE_INFO_SIZE * I40E_MAX_PROFILE_NUM + 4) +#define I40E_DDP_PROFILE_PATH "intel/i40e/ddp/" +#define I40E_DDP_PROFILE_NAME_MAX 64 + +struct i40e_ddp_profile_list { + u32 p_count; + struct i40e_profile_info p_info[]; +}; + +struct i40e_ddp_old_profile_list { + struct list_head list; + size_t old_ddp_size; + u8 old_ddp_buf[]; +}; /** * i40e_ddp_profiles_eq - checks if DDP profiles are the equivalent @@ -261,8 +279,8 @@ static bool i40e_ddp_is_pkg_hdr_valid(struct net_device *netdev, * Checks correctness and loads DDP profile to the NIC. The function is * also used for rolling back previously loaded profile. **/ -int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size, - bool is_add) +static int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size, +bool is_add) { u8 profile_info_sec[sizeof(struct i40e_profile_section_header) + sizeof(struct i40e_profile_info)]; diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h index 2001fefa0c52..46b9a05ceb91 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h +++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h @@ -4,6 +4,7 @@ #ifndef _I40E_PROTOTYPE_H_ #define _I40E_PROTOTYPE_H_ +#include #include #include "i40e_debug.h" #include "i40e_type.h" @@ -497,4 +498,8 @@ int i40e_add_pinfo_to_list(struct i40e_hw *hw, struct i40e_profile_segment *profile, u8 *profile_info_sec, u32 track_id); + +/* i40e_ddp */ +int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash); + #endif /* _I40E_PROTOTYPE_H_ */ -- 2.41.0 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
Re: [Intel-wired-lan] [PATCH net-next v2 0/9] i40e: House-keeping and clean-up
On 9/27/23 10:31, Ivan Vecera wrote: The series makes some house-keeping tasks on i40e driver: Patch 1: Removes unnecessary back pointer from i40e_hw Patch 2: Moves I40E_MASK macro to i40e_register.h where is used Patch 3: Refactors I40E_MDIO_CLAUSE* to use the common macro Patch 4: Add header dependencies to Patch 5: Simplifies memory alloction functions Patch 6: Moves mem alloc structures to i40e_alloc.h Patch 7: Splits i40e_osdep.h to i40e_debug.h and i40e_io.h Patch 8: Removes circular header deps, fixes and cleans headers Patch 9: Moves DDP specific macros and structs to i40e_ddp.c Changes: v2 - Fixed kdoc comment for i40e_hw_to_pf() - Reordered patches 5 and 7-9 to make them simplier drivers/net/ethernet/intel/i40e/i40e.h| 76 +-- drivers/net/ethernet/intel/i40e/i40e_adminq.c | 8 +- drivers/net/ethernet/intel/i40e/i40e_adminq.h | 3 +- .../net/ethernet/intel/i40e/i40e_adminq_cmd.h | 2 + drivers/net/ethernet/intel/i40e/i40e_alloc.h | 24 +++--- drivers/net/ethernet/intel/i40e/i40e_client.c | 1 - drivers/net/ethernet/intel/i40e/i40e_common.c | 11 ++- drivers/net/ethernet/intel/i40e/i40e_dcb.c| 4 +- drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_ddp.c| 24 +- drivers/net/ethernet/intel/i40e/i40e_debug.h | 47 .../net/ethernet/intel/i40e/i40e_debugfs.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_diag.h | 5 +- .../net/ethernet/intel/i40e/i40e_ethtool.c| 3 +- drivers/net/ethernet/intel/i40e/i40e_hmc.c| 16 ++-- drivers/net/ethernet/intel/i40e/i40e_hmc.h| 4 + drivers/net/ethernet/intel/i40e/i40e_io.h | 16 .../net/ethernet/intel/i40e/i40e_lan_hmc.c| 9 +-- .../net/ethernet/intel/i40e/i40e_lan_hmc.h| 2 + drivers/net/ethernet/intel/i40e/i40e_main.c | 57 -- drivers/net/ethernet/intel/i40e/i40e_nvm.c| 2 + drivers/net/ethernet/intel/i40e/i40e_osdep.h | 59 -- .../net/ethernet/intel/i40e/i40e_prototype.h | 9 ++- drivers/net/ethernet/intel/i40e/i40e_ptp.c| 3 +- .../net/ethernet/intel/i40e/i40e_register.h | 5 ++ drivers/net/ethernet/intel/i40e/i40e_txrx.c | 7 +- drivers/net/ethernet/intel/i40e/i40e_txrx.h | 1 + .../ethernet/intel/i40e/i40e_txrx_common.h| 2 + drivers/net/ethernet/intel/i40e/i40e_type.h | 59 +++--- .../ethernet/intel/i40e/i40e_virtchnl_pf.c| 2 + .../ethernet/intel/i40e/i40e_virtchnl_pf.h| 4 +- drivers/net/ethernet/intel/i40e/i40e_xsk.c| 4 - drivers/net/ethernet/intel/i40e/i40e_xsk.h| 4 + include/linux/avf/virtchnl.h | 4 + 34 files changed, 231 insertions(+), 251 deletions(-) create mode 100644 drivers/net/ethernet/intel/i40e/i40e_debug.h create mode 100644 drivers/net/ethernet/intel/i40e/i40e_io.h delete mode 100644 drivers/net/ethernet/intel/i40e/i40e_osdep.h Thank you! Reviewed-by: Przemek Kitszel ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next 0/4] dpll: add phase-offset and phase-adjust
Improve monitoring and control over dpll devices. Allow user to receive measurement of phase difference between signals on pin and dpll (phase-offset). Allow user to receive and control adjustable value of pin's signal phase (phase-adjust). Arkadiusz Kubalewski (4): dpll: docs: add support for pin signal phase offset/adjust dpll: spec: add support for pin-dpll signal phase offset/adjust dpll: netlink/core: add support for pin-dpll signal phase offset/adjust ice: dpll: implement phase related callbacks Documentation/driver-api/dpll.rst | 53 - Documentation/netlink/specs/dpll.yaml | 33 +++- drivers/dpll/dpll_netlink.c | 99 +- drivers/dpll/dpll_nl.c| 8 +- drivers/dpll/dpll_nl.h| 2 +- drivers/net/ethernet/intel/ice/ice_dpll.c | 224 +- drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +- include/linux/dpll.h | 18 ++ include/uapi/linux/dpll.h | 8 +- 9 files changed, 443 insertions(+), 12 deletions(-) -- 2.38.1 ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH net-next 1/4] dpll: docs: add support for pin signal phase offset/adjust
Add dpll documentation on new pin's attributes: - phase-offset - measured difference between phase of signals on pin and dpll - phase-adjust - adjustable value of pin's signal phase - phase-adjust-min / phase-adjust-max - values for determining limits for phase-adjust Signed-off-by: Arkadiusz Kubalewski --- Documentation/driver-api/dpll.rst | 53 ++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst index bb52f1b8c0be..59634a3513bd 100644 --- a/Documentation/driver-api/dpll.rst +++ b/Documentation/driver-api/dpll.rst @@ -173,6 +173,47 @@ in order to configure active input of a MUX-type pin, the user needs to request desired pin state of the child pin on the parent pin, as described in the ``MUX-type pins`` chapter. +Phase offset measurement and adjustment + + +Device may provide ability to measure a phase difference between signals +on a pin and its parent dpll device. If pin-dpll phase offset measurement +is supported, it shall be provided with ``DPLL_A_PIN_PHASE_OFFSET`` +attribute for each parent dpll device. + +Device may also provide ability to adjust a signal phase on a pin. +If pin phase adjustment is supported, minimal and maximal values that pin +handle shall be provide to the user on ``DPLL_CMD_PIN_GET`` respond +with ``DPLL_A_PIN_PHASE_ADJUST_MIN`` and ``DPLL_A_PIN_PHASE_ADJUST_MAX`` +attributes. Configured phase adjust value is provided with +``DPLL_A_PIN_PHASE_ADJUST`` attribute of a pin, and value change can be +requested with the same attribute with ``DPLL_CMD_PIN_SET`` command. + + === == + ``DPLL_A_PIN_ID`` configured pin id + ``DPLL_A_PIN_PHASE_ADJUST_MIN`` attr minimum value of phase adjustment + ``DPLL_A_PIN_PHASE_ADJUST_MAX`` attr maximum value of phase adjustment + ``DPLL_A_PIN_PHASE_ADJUST`` attr configured value of phase + adjustment on parent dpll device + ``DPLL_A_PIN_PARENT_DEVICE``nested attribute for requesting + configuration on given parent dpll + device +``DPLL_A_PIN_PARENT_ID`` parent dpll device id +``DPLL_A_PIN_PHASE_OFFSET`` attr measured phase difference + between a pin and parent dpll device + === == + +All phase related values are provided in pico seconds, which represents +time differnece between signals phase. The negative value means that +phase of signal on pin is earlier in time than dpll's signal. Positive +value means that phase of signal on pin is later in time than signal of +a dpll. + +Phase adjust (also min and max) values are integers, but measured phase +offset values are fractional with 3-digit decimal places and shell be +divided with ``DPLL_PIN_PHASE_OFFSET_DIVIDER`` to get integer part and +modulo divided to get fractional part. + Configuration commands group @@ -263,6 +304,12 @@ according to attribute purpose. frequencies ``DPLL_A_PIN_ANY_FREQUENCY_MIN`` attr minimum value of frequency ``DPLL_A_PIN_ANY_FREQUENCY_MAX`` attr maximum value of frequency +``DPLL_A_PIN_PHASE_ADJUST_MIN``attr minimum value of phase + adjustment +``DPLL_A_PIN_PHASE_ADJUST_MAX``attr maximum value of phase + adjustment +``DPLL_A_PIN_PHASE_ADJUST``attr configured value of phase + adjustment on parent device ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent device the pin is connected with ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id @@ -270,8 +317,10 @@ according to attribute purpose. dpll device ``DPLL_A_PIN_STATE`` attr state of pin on the parent dpll device - ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the + ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the parent dpll device + ``DPLL_A_PIN_PHASE_OFFSET`` attr measured phase difference + between a pin and parent dpll ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin the pin is connected with ``DPLL_A_PIN_PARENT_ID`` attr parent pin id @@ -284,6 +333,8 @@ according to attribute purpose. ``DPLL_CMD_PIN_SET`` command to set pins configuration ``DPLL_A_PIN_ID`` attr unique a pin ID ``DPLL_A_PIN_FREQUENCY`` attr req
[Intel-wired-lan] [PATCH net-next 2/4] dpll: spec: add support for pin-dpll signal phase offset/adjust
Add new pin's attributes to dpll netlink spec: - phase-offset - measured difference between phase of signals on pin and dpll - phase-adjust - adjustable value of pin's signal phase - phase-adjust-min / phase-adjust-max - values for determining limits for phase-adjust Signed-off-by: Arkadiusz Kubalewski --- Documentation/netlink/specs/dpll.yaml | 33 ++- drivers/dpll/dpll_nl.c| 8 --- drivers/dpll/dpll_nl.h| 2 +- include/uapi/linux/dpll.h | 8 ++- 4 files changed, 45 insertions(+), 6 deletions(-) diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml index 8b86b28b47a6..dc057494101f 100644 --- a/Documentation/netlink/specs/dpll.yaml +++ b/Documentation/netlink/specs/dpll.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) name: dpll - +version: 2 doc: DPLL subsystem. definitions: @@ -164,6 +164,18 @@ definitions: - name: state-can-change doc: pin state can be changed + - +type: const +name: phase-offset-divider +value: 1000 +doc: | + phase offset divider allows userspace to calculate a value of + measured signal phase difference between a pin and dpll device + as a fractional value with three digit decimal precision. + Value of (DPLL_A_PHASE_OFFSET / DPLL_PHASE_OFFSET_DIVIDER) is an + integer part of a measured phase offest value. + Value of (DPLL_A_PHASE_OFFSET % DPLL_PHASE_OFFSET_DIVIDER) is a + fractional part of a measured phase offest value. attribute-sets: - @@ -272,6 +284,18 @@ attribute-sets: type: nest multi-attr: true nested-attributes: pin-parent-pin + - +name: phase-adjust-min +type: s32 + - +name: phase-adjust-max +type: s32 + - +name: phase-adjust +type: s32 + - +name: phase-offset +type: s64 - name: pin-parent-device subset-of: pin @@ -288,6 +312,9 @@ attribute-sets: - name: state type: u32 + - +name: phase-offset +type: s64 - name: pin-parent-pin subset-of: pin @@ -439,6 +466,9 @@ operations: - capabilities - parent-device - parent-pin +- phase-adjust-min +- phase-adjust-max +- phase-adjust dump: pre: dpll-lock-dumpit @@ -466,6 +496,7 @@ operations: - state - parent-device - parent-pin +- phase-adjust - name: pin-create-ntf doc: Notification about pin appearing diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c index 14064c8c783b..eaee5be7aa64 100644 --- a/drivers/dpll/dpll_nl.c +++ b/drivers/dpll/dpll_nl.c @@ -11,11 +11,12 @@ #include /* Common nested types */ -const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1] = { +const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1] = { [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), + [DPLL_A_PIN_PHASE_OFFSET] = { .type = NLA_S64, }, }; const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = { @@ -61,7 +62,7 @@ static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = }; /* DPLL_CMD_PIN_SET - do */ -static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] = { +static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PHASE_ADJUST + 1] = { [DPLL_A_PIN_ID] = { .type = NLA_U32, }, [DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, }, [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), @@ -69,6 +70,7 @@ static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), [DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy), [DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy), + [DPLL_A_PIN_PHASE_ADJUST] = { .type = NLA_S32, }, }; /* Ops table for dpll */ @@ -140,7 +142,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { .doit = dpll_nl_pin_set_doit, .post_doit = dpll_pin_post_doit, .policy = dpll_pin_set_nl_policy, - .maxattr= DPLL_A_PIN_PARENT_PIN, + .maxattr= DPLL_A_PIN_PHASE_ADJUST, .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, }, }; diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h index 1f67aaed4742..92d4c9c4f788 100644 --- a/drivers/dpll/dpll_nl.h +++ b/drivers/dpll/dpll_
[Intel-wired-lan] [PATCH net-next 3/4] dpll: netlink/core: add support for pin-dpll signal phase offset/adjust
Add callback op (get) for pin-dpll phase-offset measurment. Add callback ops (get/set) for pin signal phase adjustment. Add min and max phase adjustment values to pin proprties. Invoke get callbacks when filling up the pin details to provide user with phase related attribute values. Invoke phase-adjust set callback when phase-adjust value is provided for pin-set request. Signed-off-by: Arkadiusz Kubalewski --- drivers/dpll/dpll_netlink.c | 99 - include/linux/dpll.h| 18 +++ 2 files changed, 116 insertions(+), 1 deletion(-) diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index e20daba6896a..b48fd556e490 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -212,6 +212,53 @@ dpll_msg_add_pin_direction(struct sk_buff *msg, struct dpll_pin *pin, return 0; } +static int +dpll_msg_add_pin_phase_adjust(struct sk_buff *msg, struct dpll_pin *pin, + struct dpll_pin_ref *ref, + struct netlink_ext_ack *extack) +{ + const struct dpll_pin_ops *ops = dpll_pin_ops(ref); + struct dpll_device *dpll = ref->dpll; + s32 phase_adjust; + int ret; + + if (!ops->phase_adjust_get) + return 0; + ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin), + dpll, dpll_priv(dpll), + &phase_adjust, extack); + if (ret) + return ret; + if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST, phase_adjust)) + return -EMSGSIZE; + + return 0; +} + +static int +dpll_msg_add_phase_offset(struct sk_buff *msg, struct dpll_pin *pin, + struct dpll_pin_ref *ref, + struct netlink_ext_ack *extack) +{ + const struct dpll_pin_ops *ops = dpll_pin_ops(ref); + struct dpll_device *dpll = ref->dpll; + s64 phase_offset; + int ret; + + if (!ops->phase_offset_get) + return 0; + ret = ops->phase_offset_get(pin, dpll_pin_on_dpll_priv(dpll, pin), + dpll, dpll_priv(dpll), &phase_offset, + extack); + if (ret) + return ret; + if (nla_put_64bit(msg, DPLL_A_PIN_PHASE_OFFSET, sizeof(phase_offset), + &phase_offset, DPLL_A_PIN_PAD)) + return -EMSGSIZE; + + return 0; +} + static int dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) @@ -330,6 +377,9 @@ dpll_msg_add_pin_dplls(struct sk_buff *msg, struct dpll_pin *pin, if (ret) goto nest_cancel; ret = dpll_msg_add_pin_direction(msg, pin, ref, extack); + if (ret) + goto nest_cancel; + ret = dpll_msg_add_phase_offset(msg, pin, ref, extack); if (ret) goto nest_cancel; nla_nest_end(msg, attr); @@ -377,6 +427,15 @@ dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, if (nla_put_u32(msg, DPLL_A_PIN_CAPABILITIES, prop->capabilities)) return -EMSGSIZE; ret = dpll_msg_add_pin_freq(msg, pin, ref, extack); + if (ret) + return ret; + if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST_MIN, + prop->phase_range.min)) + return -EMSGSIZE; + if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST_MAX, + prop->phase_range.max)) + return -EMSGSIZE; + ret = dpll_msg_add_pin_phase_adjust(msg, pin, ref, extack); if (ret) return ret; if (xa_empty(&pin->parent_refs)) @@ -416,7 +475,7 @@ dpll_device_get_one(struct dpll_device *dpll, struct sk_buff *msg, if (nla_put_u32(msg, DPLL_A_TYPE, dpll->type)) return -EMSGSIZE; - return ret; + return 0; } static int @@ -705,6 +764,39 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, return 0; } +static int +dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, + struct netlink_ext_ack *extack) +{ + struct dpll_pin_ref *ref; + unsigned long i; + s32 phase_adj; + int ret; + + phase_adj = nla_get_s32(phase_adj_attr); + if (phase_adj > pin->prop->phase_range.max || + phase_adj < pin->prop->phase_range.min) { + NL_SET_ERR_MSG(extack, "phase adjust value not supported"); + return -EINVAL; + } + xa_for_each(&pin->dpll_refs, i, ref) { + const struct dpll_pin_ops *ops = dpll_pin_ops(ref); + struct dpll_device *dpll = ref->dpll; + + if (!ops->phase_adjust_set) + return -EOPNOTSU
[Intel-wired-lan] [PATCH net-next 4/4] ice: dpll: implement phase related callbacks
Implement callback op related to phase-offset measurement for input pins to provide user with measured value. Implement callback ops related to phase-adjust get and set to allow the user with control over adjustable value of phase on pin's signal. Fill pin-adjust(-min/-max) limit values on pin-properties structure. Signed-off-by: Arkadiusz Kubalewski --- drivers/net/ethernet/intel/ice/ice_dpll.c | 224 +- drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +- 2 files changed, 230 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c index 1faee9cb944d..6f7a2916f6c2 100644 --- a/drivers/net/ethernet/intel/ice/ice_dpll.c +++ b/drivers/net/ethernet/intel/ice/ice_dpll.c @@ -878,6 +878,203 @@ ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, return 0; } +/** + * ice_dpll_pin_phase_adjust_get - callback for get pin phase adjust value + * @pin: pointer to a pin + * @pin_priv: private data pointer passed on pin registration + * @dpll: registered dpll pointer + * @dpll_priv: private data pointer passed on dpll registration + * @phase_adjust: on success holds pin phase_adjust value + * @extack: error reporting + * + * Dpll subsystem callback. Handler for getting phase adjust value of a pin. + * + * Context: Acquires pf->dplls.lock + * Return: + * * 0 - success + * * negative - error + */ +static int +ice_dpll_pin_phase_adjust_get(const struct dpll_pin *pin, void *pin_priv, + const struct dpll_device *dpll, void *dpll_priv, + s32 *phase_adjust, + struct netlink_ext_ack *extack) +{ + struct ice_dpll_pin *p = pin_priv; + struct ice_pf *pf = p->pf; + + mutex_lock(&pf->dplls.lock); + *phase_adjust = p->phase_adjust; + mutex_unlock(&pf->dplls.lock); + + return 0; +} + +/** + * ice_dpll_pin_phase_adjust_set - helper for setting a pin phase adjust value + * @pin: pointer to a pin + * @pin_priv: private data pointer passed on pin registration + * @dpll: registered dpll pointer + * @dpll_priv: private data pointer passed on dpll registration + * @phase_adjust: phase_adjust to be set + * @extack: error reporting + * @type: type of a pin + * + * Helper for dpll subsystem callback. Handler for setting phase adjust value + * of a pin. + * + * Context: Acquires pf->dplls.lock + * Return: + * * 0 - success + * * negative - error + */ +static int +ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, + const struct dpll_device *dpll, void *dpll_priv, + s32 phase_adjust, + struct netlink_ext_ack *extack, + enum ice_dpll_pin_type type) +{ + struct ice_dpll_pin *p = pin_priv; + struct ice_dpll *d = dpll_priv; + struct ice_pf *pf = d->pf; + u8 flag, flags_en = 0; + int ret; + + mutex_lock(&pf->dplls.lock); + if (phase_adjust == p->phase_adjust) { + mutex_unlock(&pf->dplls.lock); + return 0; + } + switch (type) { + case ICE_DPLL_PIN_TYPE_INPUT: + flag = ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY; + if (p->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) + flags_en |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; + if (p->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN) + flags_en |= ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN; + ret = ice_aq_set_input_pin_cfg(&pf->hw, p->idx, flag, flags_en, + 0, phase_adjust); + break; + case ICE_DPLL_PIN_TYPE_OUTPUT: + flag = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_PHASE; + if (p->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_OUT_EN) + flag |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; + if (p->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) + flag |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; + ret = ice_aq_set_output_pin_cfg(&pf->hw, p->idx, flag, 0, 0, + phase_adjust); + break; + default: + ret = -EINVAL; + } + if (!ret) + p->phase_adjust = phase_adjust; + mutex_unlock(&pf->dplls.lock); + if (ret) + NL_SET_ERR_MSG_FMT(extack, + "err:%d %s failed to set pin phase_adjust:%d for pin:%u on dpll:%u\n", + ret, + ice_aq_str(pf->hw.adminq.sq_last_status), + phase_adjust, p->idx, d->dpll_idx); + + return ret; +} + +/** + * ice_dpll_input_phase_adjust_set - callback for set input pin phase adjust + * @pin: pointer to a pin + * @pin_priv: private data pointer passed on pin registrati
Re: [Intel-wired-lan] [PATCH net-next 4/4] ice: dpll: implement phase related callbacks
Hi Arkadiusz, kernel test robot noticed the following build warnings: [auto build test WARNING on net-next/main] url: https://github.com/intel-lab-lkp/linux/commits/Arkadiusz-Kubalewski/dpll-docs-add-support-for-pin-signal-phase-offset-adjust/20230927-172843 base: net-next/main patch link: https://lore.kernel.org/r/20230927092435.1565336-5-arkadiusz.kubalewski%40intel.com patch subject: [PATCH net-next 4/4] ice: dpll: implement phase related callbacks config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20230927/202309272113.rttl6e6s-...@intel.com/config) compiler: alpha-linux-gcc (GCC) 13.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230927/202309272113.rttl6e6s-...@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202309272113.rttl6e6s-...@intel.com/ All warnings (new ones prefixed by >>): >> drivers/net/ethernet/intel/ice/ice_dpll.c:1064: warning: Function parameter >> or member 'phase_offset' not described in 'ice_dpll_phase_offset_get' >> drivers/net/ethernet/intel/ice/ice_dpll.c:1064: warning: Excess function >> parameter 'phase_adjust' description in 'ice_dpll_phase_offset_get' vim +1064 drivers/net/ethernet/intel/ice/ice_dpll.c 1039 1040 #define ICE_DPLL_PHASE_OFFSET_DIVIDER 100 1041 #define ICE_DPLL_PHASE_OFFSET_FACTOR\ 1042 (DPLL_PHASE_OFFSET_DIVIDER / ICE_DPLL_PHASE_OFFSET_DIVIDER) 1043 /** 1044 * ice_dpll_phase_offset_get - callback for get dpll phase shift value 1045 * @pin: pointer to a pin 1046 * @pin_priv: private data pointer passed on pin registration 1047 * @dpll: registered dpll pointer 1048 * @dpll_priv: private data pointer passed on dpll registration 1049 * @phase_adjust: on success holds pin phase_adjust value 1050 * @extack: error reporting 1051 * 1052 * Dpll subsystem callback. Handler for getting phase shift value between 1053 * dpll's input and output. 1054 * 1055 * Context: Acquires pf->dplls.lock 1056 * Return: 1057 * * 0 - success 1058 * * negative - error 1059 */ 1060 static int 1061 ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv, 1062const struct dpll_device *dpll, void *dpll_priv, 1063s64 *phase_offset, struct netlink_ext_ack *extack) > 1064 { 1065 struct ice_dpll *d = dpll_priv; 1066 struct ice_pf *pf = d->pf; 1067 1068 mutex_lock(&pf->dplls.lock); 1069 if (d->active_input == pin) 1070 *phase_offset = d->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR; 1071 else 1072 *phase_offset = 0; 1073 mutex_unlock(&pf->dplls.lock); 1074 1075 return 0; 1076 } 1077 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH iwl-next v1] ice: read internal temperature sensor
Since 4.30 firmware exposes internal thermal sensor reading via admin queue commands. Expose those readouts via hwmon API when supported. Driver provides current reading from HW as well as device specific thresholds for thermal alarm (Warning, Critical, Fatal) events. $ sensors Output = ice-pci-b100 Adapter: PCI adapter temp1:+62.0°C (high = +95.0°C, crit = +105.0°C) (emerg = +115.0°C) Co-developed-by: Marcin Domagala Signed-off-by: Marcin Domagala Co-developed-by: Eric Joyner Signed-off-by: Eric Joyner Reviewed-by: Marcin Szycik Reviewed-by: Przemek Kitszel Signed-off-by: Konrad Knitter --- drivers/net/ethernet/intel/ice/Makefile | 1 + drivers/net/ethernet/intel/ice/ice.h | 1 + .../net/ethernet/intel/ice/ice_adminq_cmd.h | 28 drivers/net/ethernet/intel/ice/ice_common.c | 57 +++- drivers/net/ethernet/intel/ice/ice_common.h | 2 + drivers/net/ethernet/intel/ice/ice_hwmon.c| 126 ++ drivers/net/ethernet/intel/ice/ice_hwmon.h| 7 + drivers/net/ethernet/intel/ice/ice_main.c | 5 + drivers/net/ethernet/intel/ice/ice_type.h | 4 + 9 files changed, 230 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/intel/ice/ice_hwmon.c create mode 100644 drivers/net/ethernet/intel/ice/ice_hwmon.h diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile index 8757bec23fb3..b4c8f5303e57 100644 --- a/drivers/net/ethernet/intel/ice/Makefile +++ b/drivers/net/ethernet/intel/ice/Makefile @@ -36,6 +36,7 @@ ice-y := ice_main.o \ ice_repr.o \ ice_tc_lib.o \ ice_fwlog.o\ +ice_hwmon.o\ ice_debugfs.o ice-$(CONFIG_PCI_IOV) += \ ice_sriov.o \ diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index 2d5fb9bec045..5a0413e126ed 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -648,6 +648,7 @@ struct ice_pf { #define ICE_MAX_VF_AGG_NODES 32 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; struct ice_dplls dplls; + struct device *hwmon_dev; }; extern struct workqueue_struct *ice_lag_wq; diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index eb4c13b754a4..a32f96dfea28 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -117,6 +117,7 @@ struct ice_aqc_list_caps_elem { #define ICE_AQC_CAPS_NET_VER 0x004C #define ICE_AQC_CAPS_PENDING_NET_VER 0x004D #define ICE_AQC_CAPS_RDMA 0x0051 +#define ICE_AQC_CAPS_SENSOR_READING0x0067 #define ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE 0x0076 #define ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT0x0077 #define ICE_AQC_CAPS_NVM_MGMT 0x0080 @@ -1375,6 +1376,30 @@ struct ice_aqc_get_phy_rec_clk_out { __le16 node_handle; }; +/* Get sensor reading (direct 0x0632) */ +struct ice_aqc_get_sensor_reading { + u8 sensor; + u8 format; + u8 reserved[6]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Get sensor reading response (direct 0x0632) */ +struct ice_aqc_get_sensor_reading_resp { + union { + u8 raw[8]; + /* Output data for sensor 0x00, format 0x00 */ + struct { + s8 temp; + u8 temp_warning_threshold; + u8 temp_critical_threshold; + u8 temp_fatal_threshold; + u8 reserved[4]; + } s0f0; + } data; +}; + struct ice_aqc_link_topo_params { u8 lport_num; u8 lport_num_valid; @@ -2411,6 +2436,8 @@ struct ice_aq_desc { struct ice_aqc_restart_an restart_an; struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out; struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out; + struct ice_aqc_get_sensor_reading get_sensor_reading; + struct ice_aqc_get_sensor_reading_resp get_sensor_reading_resp; struct ice_aqc_gpio read_write_gpio; struct ice_aqc_sff_eeprom read_write_sff_param; struct ice_aqc_set_port_id_led set_port_id_led; @@ -2585,6 +2612,7 @@ enum ice_adminq_opc { ice_aqc_opc_set_mac_lb = 0x0620, ice_aqc_opc_set_phy_rec_clk_out = 0x0630, ice_aqc_opc_get_phy_rec_clk_out = 0x0631, + ice_aqc_opc_get_sensor_reading = 0x0632, ice_aqc_opc_get_link_topo = 0x06E0, ice_aqc_opc_read_i2c= 0x06E2, ice_aqc_
Re: [Intel-wired-lan] [PATCH iwl-next v1] ice: read internal temperature sensor
On Wed, Sep 27, 2023 at 03:38:57PM +0200, Konrad Knitter wrote: > Since 4.30 firmware exposes internal thermal sensor reading via admin > queue commands. Expose those readouts via hwmon API when supported. > > Driver provides current reading from HW as well as device specific > thresholds for thermal alarm (Warning, Critical, Fatal) events. Hi Konrad Please also Cc: the hwmon Maintainer to get his review comments. Andew ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [PATCH iwl-next, v1] ice: Fix VF-VF filter rules in switchdev mode
Any packet leaving VSI i.e VF's VSI is considered as egress traffic by HW, thus failing to match the added rule. Mark the direction for redirect rules as below: 1. VF-VF - Egress 2. Uplink-VF - Ingress 3. VF-Uplink - Egress 4. Link_Partner-Uplink - Ingress 5. Link_Partner-VF - Ingress Fixes: 0960a27bd479 ("ice: Add direction metadata") Reviewed-by: Przemek Kitszel Reviewed-by: Wojciech Drewek Signed-off-by: Aniruddha Paul --- drivers/net/ethernet/intel/ice/ice_tc_lib.c | 90 ++--- 1 file changed, 62 insertions(+), 28 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_tc_lib.c b/drivers/net/ethernet/intel/ice/ice_tc_lib.c index 37b54db91df2..0e75fc6b3c06 100644 --- a/drivers/net/ethernet/intel/ice/ice_tc_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_tc_lib.c @@ -630,32 +630,61 @@ bool ice_is_tunnel_supported(struct net_device *dev) return ice_tc_tun_get_type(dev) != TNL_LAST; } -static int -ice_eswitch_tc_parse_action(struct ice_tc_flower_fltr *fltr, - struct flow_action_entry *act) +static bool ice_tc_is_dev_uplink(struct net_device *dev) +{ + return netif_is_ice(dev) || ice_is_tunnel_supported(dev); +} + +static int ice_tc_setup_redirect_action(struct net_device *filter_dev, + struct ice_tc_flower_fltr *fltr, + struct net_device *target_dev) { struct ice_repr *repr; + fltr->action.fltr_act = ICE_FWD_TO_VSI; + + if (ice_is_port_repr_netdev(filter_dev) && + ice_is_port_repr_netdev(target_dev)) { + repr = ice_netdev_to_repr(target_dev); + + fltr->dest_vsi = repr->src_vsi; + fltr->direction = ICE_ESWITCH_FLTR_EGRESS; + } else if (ice_is_port_repr_netdev(filter_dev) && + ice_tc_is_dev_uplink(target_dev)) { + repr = ice_netdev_to_repr(filter_dev); + + fltr->dest_vsi = repr->src_vsi->back->switchdev.uplink_vsi; + fltr->direction = ICE_ESWITCH_FLTR_EGRESS; + } else if (ice_tc_is_dev_uplink(filter_dev) && + ice_is_port_repr_netdev(target_dev)) { + repr = ice_netdev_to_repr(target_dev); + + fltr->dest_vsi = repr->src_vsi; + fltr->direction = ICE_ESWITCH_FLTR_INGRESS; + } else { + NL_SET_ERR_MSG_MOD(fltr->extack, + "Unsupported netdevice in switchdev mode"); + return -EINVAL; + } + + return 0; +} + +static int ice_eswitch_tc_parse_action(struct net_device *filter_dev, + struct ice_tc_flower_fltr *fltr, + struct flow_action_entry *act) +{ + int err; + switch (act->id) { case FLOW_ACTION_DROP: fltr->action.fltr_act = ICE_DROP_PACKET; break; case FLOW_ACTION_REDIRECT: - fltr->action.fltr_act = ICE_FWD_TO_VSI; - - if (ice_is_port_repr_netdev(act->dev)) { - repr = ice_netdev_to_repr(act->dev); - - fltr->dest_vsi = repr->src_vsi; - fltr->direction = ICE_ESWITCH_FLTR_INGRESS; - } else if (netif_is_ice(act->dev) || - ice_is_tunnel_supported(act->dev)) { - fltr->direction = ICE_ESWITCH_FLTR_EGRESS; - } else { - NL_SET_ERR_MSG_MOD(fltr->extack, "Unsupported netdevice in switchdev mode"); - return -EINVAL; - } + err = ice_tc_setup_redirect_action(filter_dev, fltr, act->dev); + if (err) + return err; break; @@ -696,10 +725,6 @@ ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr) goto exit; } - /* egress traffic is always redirect to uplink */ - if (fltr->direction == ICE_ESWITCH_FLTR_EGRESS) - fltr->dest_vsi = vsi->back->switchdev.uplink_vsi; - rule_info.sw_act.fltr_act = fltr->action.fltr_act; if (fltr->action.fltr_act != ICE_DROP_PACKET) rule_info.sw_act.vsi_handle = fltr->dest_vsi->idx; @@ -713,13 +738,21 @@ ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr) rule_info.flags_info.act_valid = true; if (fltr->direction == ICE_ESWITCH_FLTR_INGRESS) { + /* Uplink to VF */ rule_info.sw_act.flag |= ICE_FLTR_RX; rule_info.sw_act.src = hw->pf_id; rule_info.flags_info.act = ICE_SINGLE_ACT_LB_ENABLE; - } else { + } else if (fltr->direction == ICE_ESWITCH_FLTR_EGRESS && + fltr->dest_vsi == vsi->back->switchdev.uplink_vsi) { + /* VF to Uplink */ rule_info.sw_act.flag |= ICE_FLTR_TX; rule_info
[Intel-wired-lan] [ANN] Upstreaming Process Change - Mandatory "reviewed-by" Tag
Dear e1000 and IWL contributors, We are implementing a crucial process change to enhance the quality and efficiency of our upstream development and upstreaming efforts. Effective immediately, every INTEL/NCIS patch posted to IWL must have at least one "Reviewed-by" tag, those are provided during e1000 review process. Any exceptions to that process must be agreed upon. By adding the "reviewed-by" tag, we can establish a clear indication that a patch has undergone careful scrutiny and has received approval from a reviewer. Key Rules: 1. Mandatory "reviewed-by" Tag: Every patch submitted to e1000 must have at least one "reviewed-by" tag from a reviewer before it is sent to IWL. This tag serves as a sign of endorsement and validates the quality of the patch. 2. Completion within 48 Hours: The review process should be completed within 48 hours after the patch appears on e1000, except for large series that may require more time. We encourage reviewers to provide timely feedback, ensuring a smooth and efficient upstreaming process. 3. Continued Tagging in Subsequent Patch Series: The "reviewed-by" tag should continue to be added to subsequent patch series for IWL. This ensures that each iteration of the patch receives the necessary reviews, even if modifications have been made. These changes aim to streamline the upstreaming process, improve code quality, and encourage collaboration among contributors. Please ensure compliance with these new guidelines. If you have any questions or need further clarification regarding this process change, please feel free to reach out to me or any of upstreaming contact points. Thank you for your understanding and commitment to maintaining the highest standards in our upstreaming process. For more detailed information please follow the link to the Wiki [1] or to presentation [2]. [1] https://wiki.ith.intel.com/pages/viewpage.action?spaceKey=LADSW&title=How+to+upstream+a+patch [2] https://intel-my.sharepoint.com/:p:/p/monika_rucinska/EQs_jci29JlKvDIW1Yb6go0BBNnUf3A_IrVFBfn63ltqmw?e=NqRqce Best regards, Monika Rucińska ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [linux-next:master] BUILD REGRESSION 18030226a48de1fbfabf4ae16aaa2695a484254f
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 18030226a48de1fbfabf4ae16aaa2695a484254f Add linux-next specific files for 20230927 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202308282000.2xnh0k6d-...@intel.com https://lore.kernel.org/oe-kbuild-all/202308301211.2hhbgs2n-...@intel.com https://lore.kernel.org/oe-kbuild-all/202308301542.li3khkjl-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309122047.cri9yjrq-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309130213.msr7x2jz-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309192154.njnpfiy5-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309192314.vbsjiim5-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309212121.cul1ptra-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309212339.hxhbu2f1-...@intel.com https://lore.kernel.org/oe-kbuild-all/202309271719.sxq960r2-...@intel.com Error/Warning: (recently discovered and may have been fixed) aarch64-linux-ld: ice_dpll.c:(.text+0x1124): undefined reference to `ice_cgu_get_pin_type' aarch64-linux-ld: ice_dpll.c:(.text+0x122c): undefined reference to `ice_cgu_get_pin_freq_supp' aarch64-linux-ld: ice_lib.c:(.text+0x85a0): undefined reference to `ice_is_cgu_present' aarch64-linux-ld: ice_lib.c:(.text+0x85d0): undefined reference to `ice_is_clock_mux_present_e810t' arc-elf-ld: xfrm_algo.c:(.text+0x46c): undefined reference to `crypto_has_aead' arch/x86/include/asm/string_32.h:150:25: warning: '__builtin_memcpy' writing 3 bytes into a region of size 0 overflows the destination [-Wstringop-overflow=] drivers/cpufreq/sti-cpufreq.c:215:50: warning: '%d' directive output may be truncated writing between 1 and 10 bytes into a region of size 2 [-Wformat-truncation=] drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3928: warning: Function parameter or member 'srf_updates' not described in 'could_mpcc_tree_change_for_active_pipes' drivers/net/ethernet/intel/ice/ice_dpll.c:1066: undefined reference to `ice_get_cgu_state' drivers/net/ethernet/intel/ice/ice_dpll.c:1666: undefined reference to `ice_cgu_get_pin_freq_supp' drivers/net/ethernet/intel/ice/ice_dpll.c:1802: undefined reference to `ice_get_cgu_rclk_pin_info' drivers/net/ethernet/intel/ice/ice_lib.c:3992: undefined reference to `ice_is_phy_rclk_present' drivers/net/ethernet/sfc/ethtool_common.c:278:32: warning: '%-24s' directive output may be truncated writing between 24 and 31 bytes into a region of size 25 [-Wformat-truncation=] drivers/net/ethernet/sfc/falcon/ethtool.c:229:32: warning: '%-24s' directive output may be truncated writing between 24 and 31 bytes into a region of size 25 [-Wformat-truncation=] drivers/net/ethernet/sfc/siena/ethtool_common.c:229:32: warning: '%-24s' directive output may be truncated writing between 24 and 31 bytes into a region of size 25 [-Wformat-truncation=] fs/bcachefs/bcachefs_format.h:215:25: warning: 'p' offset 3 in 'struct bkey' isn't aligned to 4 [-Wpacked-not-aligned] fs/bcachefs/bcachefs_format.h:217:25: warning: 'version' offset 27 in 'struct bkey' isn't aligned to 4 [-Wpacked-not-aligned] fs/proc/task_mmu.c:2105:3: error: implicit declaration of function 'pagemap_scan_backout_range'; did you mean 'pagemap_scan_push_range'? [-Werror=implicit-function-declaration] ice_dpll.c:(.text+0x1104): undefined reference to `ice_cgu_get_pin_name' ice_dpll.c:(.text+0x15b4): undefined reference to `ice_get_cgu_state' ice_dpll.c:(.text+0x2758): undefined reference to `ice_get_cgu_rclk_pin_info' ice_lib.c:(.text+0x855c): undefined reference to `ice_is_phy_rclk_present' include/linux/fortify-string.h:57:33: warning: writing 8 bytes into a region of size 0 [-Wstringop-overflow=] include/linux/fortify-string.h:65:33: warning: '__builtin_strcpy' source argument is the same as destination [-Wrestrict] include/linux/netlink.h:116:13: warning: ') out of range, only support...' directive output truncated writing 60 bytes into a region of size between 46 and 55 [-Wformat-truncation=] include/linux/netlink.h:116:13: warning: 'sfc: Unsupported: only suppo...' directive output truncated writing 104 bytes into a region of size 80 [-Wformat-truncation=] include/linux/netlink.h:116:6: warning: ') out of range, only support...' directive output truncated writing 60 bytes into a region of size between 46 and 55 [-Wformat-truncation=] include/linux/netlink.h:116:6: warning: 'sfc: Unsupported: only suppo...' directive output truncated writing 104 bytes into a region of size 80 [-Wformat-truncation=] kernel/bpf/helpers.c:1906:19: warning: no previous declaration for 'bpf_percpu_obj_new_impl' [-Wmissing-declarations] kernel/bpf/helpers.c:1942:18: warn
Re: [Intel-wired-lan] [PATCH net-next 3/4] dpll: netlink/core: add support for pin-dpll signal phase offset/adjust
On 27/09/2023 10:24, Arkadiusz Kubalewski wrote: Add callback op (get) for pin-dpll phase-offset measurment. Add callback ops (get/set) for pin signal phase adjustment. Add min and max phase adjustment values to pin proprties. Invoke get callbacks when filling up the pin details to provide user with phase related attribute values. Invoke phase-adjust set callback when phase-adjust value is provided for pin-set request. Signed-off-by: Arkadiusz Kubalewski [...] +static int +dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, + struct netlink_ext_ack *extack) +{ + struct dpll_pin_ref *ref; + unsigned long i; + s32 phase_adj; + int ret; + + phase_adj = nla_get_s32(phase_adj_attr); + if (phase_adj > pin->prop->phase_range.max || + phase_adj < pin->prop->phase_range.min) { + NL_SET_ERR_MSG(extack, "phase adjust value not supported"); + return -EINVAL; + } + xa_for_each(&pin->dpll_refs, i, ref) { + const struct dpll_pin_ops *ops = dpll_pin_ops(ref); + struct dpll_device *dpll = ref->dpll; + + if (!ops->phase_adjust_set) + return -EOPNOTSUPP; I'm thinking about this part. We can potentially have dpll devices with different expectations on phase adjustments, right? And if one of them won't be able to adjust phase (or will fail in the next line), then netlink will return EOPNOTSUPP while _some_ of the devices will be adjusted. Doesn't look great. Can we think about different way to apply the change? + ret = ops->phase_adjust_set(pin, + dpll_pin_on_dpll_priv(dpll, pin), + dpll, dpll_priv(dpll), phase_adj, + extack); + if (ret) + return ret; + } + __dpll_pin_change_ntf(pin); + + return 0; +} + ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
Re: [Intel-wired-lan] [PATCH net-next v5 0/7] introduce DEFINE_FLEX() macro
On 9/19/2023 4:10 AM, Przemek Kitszel wrote: On 9/12/23 18:16, Kees Cook wrote: On Tue, Sep 12, 2023 at 07:59:30AM -0400, Przemek Kitszel wrote: Add DEFINE_FLEX() macro, that helps on-stack allocation of structures with trailing flex array member. Expose __struct_size() macro which reads size of data allocated by DEFINE_FLEX(). Accompany new macros introduction with actual usage, in the ice driver - hence targeting for netdev tree. Obvious benefits include simpler resulting code, less heap usage, less error checking. Less obvious is the fact that compiler has more room to optimize, and as a whole, even with more stuff on the stack, we end up with overall better (smaller) report from bloat-o-meter: add/remove: 8/6 grow/shrink: 7/18 up/down: 2211/-2270 (-59) (individual results in each patch). v5: same as v4, just not RFC v4: _Static_assert() to ensure compiletime const count param v3: tidy up 1st patch v2: Kees: reusing __struct_size() instead of doubling it as a new macro Przemek Kitszel (7): overflow: add DEFINE_FLEX() for on-stack allocs ice: ice_sched_remove_elems: replace 1 elem array param by u32 ice: drop two params of ice_aq_move_sched_elems() ice: make use of DEFINE_FLEX() in ice_ddp.c ice: make use of DEFINE_FLEX() for struct ice_aqc_add_tx_qgrp ice: make use of DEFINE_FLEX() for struct ice_aqc_dis_txq_item ice: make use of DEFINE_FLEX() in ice_switch.c Looks good to me! Feel free to pick up via netdev. -Kees Thanks! Patchwork [1] says it's "Awaiting Upstream", which is the same for most of the "to: IWL" patches. That means it's delegated to Tony? netdev maintainers, As this has non-Intel changes and is marked for 'net-next', do you want to take this or prefer me to take via IWL and send as PR? Thanks, Tony By any means, minimizing "usage examples" to just ice driver makes it easy to merge via Tony's tree. [1] https://patchwork.kernel.org/project/netdevbpf/patch/20230912115937.1645707-2-przemyslaw.kits...@intel.com/ ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
[Intel-wired-lan] [tnguy-next-queue:dev-queue] BUILD SUCCESS 85b90747fa80e6b5daae9fc82240dbfff869ef1e
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git dev-queue branch HEAD: 85b90747fa80e6b5daae9fc82240dbfff869ef1e iavf: Avoid a memory allocation in iavf_print_link_message() elapsed time: 1494m configs tested: 131 configs skipped: 2 The following configs have been built successfully. More configs may be tested in the coming days. tested configs: alpha allnoconfig gcc alphaallyesconfig gcc alpha defconfig gcc arc allmodconfig gcc arc allnoconfig gcc arc allyesconfig gcc arc defconfig gcc arc randconfig-001-20230927 gcc arc randconfig-001-20230928 gcc arm allmodconfig gcc arm allnoconfig gcc arm allyesconfig gcc arm defconfig gcc arm randconfig-001-20230927 gcc arm64 allnoconfig gcc arm64 defconfig gcc csky allmodconfig gcc csky allnoconfig gcc csky allyesconfig gcc cskydefconfig gcc i386 allmodconfig gcc i386 allnoconfig gcc i386 allyesconfig gcc i386 buildonly-randconfig-001-20230927 gcc i386 buildonly-randconfig-002-20230927 gcc i386 buildonly-randconfig-003-20230927 gcc i386 buildonly-randconfig-004-20230927 gcc i386 buildonly-randconfig-005-20230927 gcc i386 buildonly-randconfig-006-20230927 gcc i386 debian-10.3 gcc i386defconfig gcc i386 randconfig-001-20230927 gcc i386 randconfig-002-20230927 gcc i386 randconfig-003-20230927 gcc i386 randconfig-004-20230927 gcc i386 randconfig-005-20230927 gcc i386 randconfig-006-20230927 gcc i386 randconfig-011-20230928 gcc i386 randconfig-012-20230928 gcc i386 randconfig-013-20230928 gcc i386 randconfig-014-20230928 gcc i386 randconfig-015-20230928 gcc i386 randconfig-016-20230928 gcc loongarchallmodconfig gcc loongarch allnoconfig gcc loongarchallyesconfig gcc loongarch defconfig gcc loongarch randconfig-001-20230927 gcc loongarch randconfig-001-20230928 gcc m68k allmodconfig gcc m68k allnoconfig gcc m68k allyesconfig gcc m68kdefconfig gcc microblaze allmodconfig gcc microblazeallnoconfig gcc microblaze allyesconfig gcc microblaze defconfig gcc mips allmodconfig gcc mips allnoconfig gcc mips allyesconfig gcc nios2allmodconfig gcc nios2 allnoconfig gcc nios2allyesconfig gcc nios2 defconfig gcc openrisc allmodconfig gcc openrisc allnoconfig gcc openrisc allyesconfig gcc openriscdefconfig gcc parisc allmodconfig gcc pariscallnoconfig gcc parisc allyesconfig gcc parisc defconfig gcc parisc64defconfig gcc powerpc allmodconfig gcc powerpc allnoconfig gcc powerpc allyesconfig gcc riscvallmodconfig gcc riscv allnoconfig gcc riscvallyesconfig gcc riscv defconfig gcc riscv randconfig-001-20230927 gcc riscv rv32_defconfig gcc s390 allmodconfig gcc s390 allnoconfig gcc s390 allyesconfig gcc s390
Re: [Intel-wired-lan] [PATCH iwl-next v1] ixgbe: Extend rx_errors calculation
> -Original Message- > From: Intel-wired-lan On Behalf Of > Jedrzej Jagielski > Sent: Tuesday, September 12, 2023 3:00 PM > To: intel-wired-...@lists.osuosl.org > Cc: Nguyen, Anthony L ; Jagielski, Jedrzej > > Subject: [Intel-wired-lan] [PATCH iwl-next v1] ixgbe: Extend rx_errors > calculation > > Currently we are only including crcerrs (CRC Error Count) and rlec (Receive > Length Error Count) in the PF netdev's rx_error counter. > There are also other causes of Rx errors that the device supports and reports > via Ethtool. Accumulate all Rx errors in the PF netdev's rx_error counter. > > Error counters added for: > Illegal Byte Error, Checksum Bad, Receive [Over/Under]size, Receive Fragment > and Receive Jabber. > > The above were added in order to align statistics with other products. > > Signed-off-by: Jedrzej Jagielski > --- > drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 11 ++- > 1 file changed, 10 insertions(+), 1 deletion(-) > rx_errors and rx_csum_offload_errors counters do not increment on receiving packets with bad checksum. ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan ___ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan