[Intel-gfx] [PATCH i-g-t] kms_cursor_crc: Test cursor size change ioctl
Now that we support cursor changes other than 64x64, a bug was found
where the size change was only applied at cursor enable time, rather
than at every update. Add a testcase for that.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 55 ++
1 file changed, 55 insertions(+)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 06625ee..1b8da26 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -54,6 +54,7 @@ typedef struct {
int left, right, top, bottom;
int screenw, screenh;
int curw, curh; /* cursor size */
+ int cursor_max_size;
igt_pipe_crc_t *pipe_crc;
} test_data_t;
@@ -272,6 +273,7 @@ static bool prepare_crtc(test_data_t *test_data,
igt_output_t *output,
test_data->screenh = mode->vdisplay;
test_data->curw = cursor_w;
test_data->curh = cursor_h;
+ test_data->cursor_max_size = cursor_w;
/* make sure cursor is disabled */
cursor_disable(test_data);
@@ -354,6 +356,56 @@ static void create_cursor_fb(data_t *data, int cur_w, int
cur_h)
igt_assert(cairo_status(cr) == 0);
}
+static void test_cursor_size(test_data_t *test_data)
+{
+ data_t *data = test_data->data;
+ igt_display_t *display = &data->display;
+ igt_pipe_crc_t *pipe_crc = test_data->pipe_crc;
+ igt_crc_t crc[10], ref_crc;
+ igt_plane_t *cursor;
+ cairo_t *cr;
+ uint32_t fb_id;
+ int i, size, cursor_max_size = test_data->cursor_max_size;
+
+ /* Create a maximum size cursor, then change the size in flight to
+* smaller ones to see that the size is applied correctly
+*/
+ fb_id = igt_create_fb(data->drm_fd, cursor_max_size, cursor_max_size,
+ DRM_FORMAT_ARGB, false, &data->fb);
+ igt_assert(fb_id);
+
+ /* Use a solid white rectangle as the cursor */
+ cr = igt_get_cairo_ctx(data->drm_fd, &data->fb);
+ igt_paint_color_alpha(cr, 0, 0, cursor_max_size, cursor_max_size, 1.0,
1.0, 1.0, 1.0);
+
+ /* Hardware test loop */
+ cursor_enable(test_data);
+ cursor = igt_output_get_plane(test_data->output, IGT_PLANE_CURSOR);
+ igt_plane_set_position(cursor, 0, 0);
+ for (i = 0, size = cursor_max_size; size >= 64; size /= 2, i++) {
+ /* Change size in flight: */
+ int ret = drmModeSetCursor(data->drm_fd,
test_data->output->config.crtc->crtc_id,
+ data->fb.gem_handle, size, size);
+ igt_assert(ret == 0);
+ igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ igt_pipe_crc_collect_crc(pipe_crc, &crc[i]);
+ }
+ cursor_disable(test_data);
+ /* Software test loop */
+ cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb);
+ for (i = 0, size = cursor_max_size; size >= 64; size /= 2, i++) {
+ /* Now render the same in software and collect crc */
+ igt_paint_color_alpha(cr, 0, 0, size, size, 1.0, 1.0, 1.0, 1.0);
+ igt_display_commit(display);
+ igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ igt_pipe_crc_collect_crc(pipe_crc, &ref_crc);
+ /* Clear screen afterwards */
+ igt_paint_color(cr, 0, 0, test_data->screenw,
test_data->screenh,
+ 0.0, 0.0, 0.0);
+ igt_assert(igt_crc_equal(&crc[i], &ref_crc));
+ }
+}
+
static void run_test_generic(data_t *data, int cursor_max_size)
{
int cursor_size;
@@ -407,6 +459,9 @@ igt_main
igt_display_init(&data.display, data.drm_fd);
}
+ igt_subtest_f("cursor-size-change")
+ run_test(&data, test_cursor_size, cursor_width, cursor_height);
+
run_test_generic(&data, cursor_width);
igt_fixture {
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t 5/7] kms_cursor_crc: Add reference software rendering
This patch first render the cursor with hardware rendering and
then with software, acquiring the CRC in both cases so they can be
properly compared. Say goodbye to crc_must_match variable.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 94baa94..021d58a 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -52,8 +52,8 @@ typedef struct {
igt_output_t *output;
enum pipe pipe;
igt_crc_t ref_crc;
- bool crc_must_match;
int left, right, top, bottom;
+ int screenw, screenh;
int curw, curh; /* cursor size */
} test_data_t;
@@ -105,23 +105,31 @@ static void do_single_test(test_data_t *test_data, int x,
int y)
data_t *data = test_data->data;
igt_display_t *display = &data->display;
igt_pipe_crc_t *pipe_crc = data->pipe_crc[test_data->pipe];
- igt_crc_t crc;
+ igt_crc_t crc, ref_crc;
igt_plane_t *cursor;
+ cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb);
printf("."); fflush(stdout);
+ /* Hardware test */
cursor_enable(test_data);
cursor = igt_output_get_plane(test_data->output, IGT_PLANE_CURSOR);
igt_plane_set_position(cursor, x, y);
igt_display_commit(display);
igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ igt_pipe_crc_collect_crc(pipe_crc, &crc);
cursor_disable(test_data);
- igt_pipe_crc_collect_crc(pipe_crc, &crc);
- if (test_data->crc_must_match)
- igt_assert(igt_crc_equal(&crc, &test_data->ref_crc));
- else
- igt_assert(!igt_crc_equal(&crc, &test_data->ref_crc));
+ /* Now render the same in software and collect crc */
+ draw_cursor(cr, x, y, test_data->curw);
+ igt_display_commit(display);
+ igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ igt_pipe_crc_collect_crc(pipe_crc, &ref_crc);
+ /* Clear screen afterwards */
+ igt_paint_color(cr, 0, 0, test_data->screenw, test_data->screenh,
+ 0.0, 0.0, 0.0);
+
+ igt_assert(igt_crc_equal(&crc, &ref_crc));
}
static void do_test(test_data_t *test_data,
@@ -184,9 +192,6 @@ static void test_crc_offscreen(test_data_t *test_data)
do_test(test_data, left - (cursor_w+512), right + (cursor_w+512), top
, bottom );
do_test(test_data, left , right , top -
(cursor_h+512), bottom + (cursor_h+512));
do_test(test_data, left - (cursor_w+512), right + (cursor_w+512), top -
(cursor_h+512), bottom + (cursor_h+512));
-
- /* go nuts */
- do_test(test_data, INT_MIN, INT_MAX, INT_MIN, INT_MAX);
}
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
@@ -232,6 +237,8 @@ static bool prepare_crtc(test_data_t *test_data,
igt_output_t *output,
test_data->right = mode->hdisplay - cursor_w;
test_data->top = 0;
test_data->bottom = mode->vdisplay - cursor_h;
+ test_data->screenw = mode->hdisplay;
+ test_data->screenh = mode->vdisplay;
test_data->curw = cursor_w;
test_data->curh = cursor_h;
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t 6/7] kms_cursor_crc: Add moving cursor test
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 16
1 file changed, 16 insertions(+)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 021d58a..1e1d348 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -194,6 +194,20 @@ static void test_crc_offscreen(test_data_t *test_data)
do_test(test_data, left - (cursor_w+512), right + (cursor_w+512), top -
(cursor_h+512), bottom + (cursor_h+512));
}
+static void test_crc_sliding(test_data_t *test_data)
+{
+ int i;
+
+ /* Make sure cursor moves smoothly and pixel-by-pixel, and that there
are
+* no alignment issues. Horizontal, vertical and diagonal test.
+*/
+ for (i = 0; i < 16; i++) {
+ do_single_test(test_data, i, 0);
+ do_single_test(test_data, 0, i);
+ do_single_test(test_data, i, i);
+ }
+}
+
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
int cursor_w, int cursor_h)
{
@@ -337,6 +351,8 @@ static void run_test_generic(data_t *data, int
cursor_max_size)
run_test(data, test_crc_onscreen, cursor_size,
cursor_size);
igt_subtest_f("cursor-%s-offscreen", c_size)
run_test(data, test_crc_offscreen, cursor_size,
cursor_size);
+ igt_subtest_f("cursor-%s-sliding", c_size)
+ run_test(data, test_crc_sliding, cursor_size,
cursor_size);
}
}
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t 7/7] kms_cursor_crc: Add random cursor placement test
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 1e1d348..d461d72 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -208,6 +208,18 @@ static void test_crc_sliding(test_data_t *test_data)
}
}
+static void test_crc_random(test_data_t *test_data)
+{
+ int i;
+
+ /* Random cursor placement */
+ for (i = 0; i < 50; i++) {
+ int x = rand() % (test_data->screenw + test_data->curw * 2) -
test_data->curw;
+ int y = rand() % (test_data->screenh + test_data->curh * 2) -
test_data->curh;
+ do_single_test(test_data, x, y);
+ }
+}
+
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
int cursor_w, int cursor_h)
{
@@ -353,6 +365,8 @@ static void run_test_generic(data_t *data, int
cursor_max_size)
run_test(data, test_crc_offscreen, cursor_size,
cursor_size);
igt_subtest_f("cursor-%s-sliding", c_size)
run_test(data, test_crc_sliding, cursor_size,
cursor_size);
+ igt_subtest_f("cursor-%s-random", c_size)
+ run_test(data, test_crc_random, cursor_size,
cursor_size);
}
}
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t 4/7] kms_cursor_crc: Separate onscreen and offscreen tests
Also remove onscreen boolean from parameter list. All test-related
data should be put into test_data from now.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 99 +-
1 file changed, 50 insertions(+), 49 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 60b50b5..94baa94 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -133,8 +133,7 @@ static void do_test(test_data_t *test_data,
do_single_test(test_data, left, bottom);
}
-static void test_crc(test_data_t *test_data,
-bool onscreen)
+static void test_crc_onscreen(test_data_t *test_data)
{
int left = test_data->left;
int right = test_data->right;
@@ -143,49 +142,51 @@ static void test_crc(test_data_t *test_data,
int cursor_w = test_data->curw;
int cursor_h = test_data->curh;
- if (onscreen) {
- /* cursor onscreen, crc should match, except when white visible
cursor is used */
- test_data->crc_must_match = false;
-
- /* fully inside */
- do_test(test_data, left, right, top, bottom);
-
- /* 2 pixels inside */
- do_test(test_data, left - (cursor_w-2), right + (cursor_w-2),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h-2), bottom + (cursor_h-2));
- do_test(test_data, left - (cursor_w-2), right + (cursor_w-2),
top - (cursor_h-2), bottom + (cursor_h-2));
-
- /* 1 pixel inside */
- do_test(test_data, left - (cursor_w-1), right + (cursor_w-1),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h-1), bottom + (cursor_h-1));
- do_test(test_data, left - (cursor_w-1), right + (cursor_w-1),
top - (cursor_h-1), bottom + (cursor_h-1));
- } else {
- /* cursor offscreen, crc should always match */
- test_data->crc_must_match = false;
-
- /* fully outside */
- do_test(test_data, left - (cursor_w), right + (cursor_w), top
, bottom );
- do_test(test_data, left , right , top -
(cursor_h), bottom + (cursor_h));
- do_test(test_data, left - (cursor_w), right + (cursor_w), top -
(cursor_h), bottom + (cursor_h));
-
- /* fully outside by 1 extra pixels */
- do_test(test_data, left - (cursor_w+1), right + (cursor_w+1),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h+1), bottom + (cursor_h+1));
- do_test(test_data, left - (cursor_w+1), right + (cursor_w+1),
top - (cursor_h+1), bottom + (cursor_h+1));
-
- /* fully outside by 2 extra pixels */
- do_test(test_data, left - (cursor_w+2), right + (cursor_w+2),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h+2), bottom + (cursor_h+2));
- do_test(test_data, left - (cursor_w+2), right + (cursor_w+2),
top - (cursor_h+2), bottom + (cursor_h+2));
-
- /* fully outside by a lot of extra pixels */
- do_test(test_data, left - (cursor_w+512), right +
(cursor_w+512), top , bottom );
- do_test(test_data, left , right
, top - (cursor_h+512), bottom + (cursor_h+512));
- do_test(test_data, left - (cursor_w+512), right +
(cursor_w+512), top - (cursor_h+512), bottom + (cursor_h+512));
-
- /* go nuts */
- do_test(test_data, INT_MIN, INT_MAX, INT_MIN, INT_MAX);
- }
+ /* fully inside */
+ do_test(test_data, left, right, top, bottom);
+
+ /* 2 pixels inside */
+ do_test(test_data, left - (cursor_w-2), right + (cursor_w-2), top
, bottom );
+ do_test(test_data, left , right , top -
(cursor_h-2), bottom + (cursor_h-2));
+ do_test(test_data, left - (cursor_w-2), right + (cursor_w-2), top -
(cursor_h-2), bottom + (cursor_h-2));
+
+ /* 1 pixel inside */
+ do_test(test_data, left - (cursor_w-1), right + (cursor_w-1), top
, bottom );
+ do_test(test_data, left , right , top -
(cursor_h-1), bottom + (cursor_h-1));
+ do_test(test_data, left - (cursor_w-1), right + (cursor_w-1), top -
(cursor_h-1), bottom + (cursor_h-1));
+}
+
+static void test_crc_offscreen(test_data_t *test_data)
+{
+ int left = test_data->left;
+ int right = test_data->right;
+ int top = test_data->top;
+ int bottom = tes
[Intel-gfx] [PATCH i-g-t 1/7] kms_cursor_crc: Remove some test cases and change cursor to color
Currently this test is quite useless, since it only checks for valid CRCs when
the correct output from a test is a completely black screen (invisible or
visible
but black cursor, or cursor is offscreen) and disables the check when anything
visible is onscreen.
This patch changes the cursor to a colorful one and removes the test cases
that become redundant because of this change. The cursor is designed to be
asymmetrical such that future tests involving rotation, mirroring, etc. produce
different CRCs and failures can be detected.
This (temporarily) disables CRC testing until the next patch which will add
software rendering of the cursor and the CRC generation.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 75 +-
1 file changed, 32 insertions(+), 43 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index fbb5d88..52281d0 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -39,19 +39,11 @@
#define DRM_CAP_CURSOR_HEIGHT 0x9
#endif
-enum cursor_type {
- WHITE_VISIBLE,
- WHITE_INVISIBLE,
- BLACK_VISIBLE,
- BLACK_INVISIBLE,
- NUM_CURSOR_TYPES,
-};
-
typedef struct {
int drm_fd;
igt_display_t display;
struct igt_fb primary_fb;
- struct igt_fb fb[NUM_CURSOR_TYPES];
+ struct igt_fb fb;
igt_pipe_crc_t **pipe_crc;
} data_t;
@@ -64,6 +56,16 @@ typedef struct {
int left, right, top, bottom;
} test_data_t;
+static void draw_cursor(cairo_t *cr, int x, int y, int w)
+{
+ w /= 2;
+ cairo_set_antialias(cr, CAIRO_ANTIALIAS_NONE);
+ /* 4 color rectangles in the corners, RGBY */
+ igt_paint_color_alpha(cr, x, y, w, w, 1.0, 0.0, 0.0, 1.0);
+ igt_paint_color_alpha(cr, x + w, y, w, w, 0.0, 1.0, 0.0, 1.0);
+ igt_paint_color_alpha(cr, x, y + w, w, w, 0.0, 0.0, 1.0, 1.0);
+ igt_paint_color_alpha(cr, x + w, y + w, w, w, 0.5, 0.5, 0.5, 1.0);
+}
static igt_pipe_crc_t *create_crc(data_t *data, enum pipe pipe)
{
@@ -104,7 +106,7 @@ static void do_test(test_data_t *test_data,
do_single_test(test_data, left, bottom);
}
-static void cursor_enable(test_data_t *test_data, enum cursor_type cursor_type)
+static void cursor_enable(test_data_t *test_data)
{
data_t *data = test_data->data;
igt_display_t *display = &data->display;
@@ -112,7 +114,7 @@ static void cursor_enable(test_data_t *test_data, enum
cursor_type cursor_type)
igt_plane_t *cursor;
cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
- igt_plane_set_fb(cursor, &data->fb[cursor_type]);
+ igt_plane_set_fb(cursor, &data->fb);
igt_display_commit(display);
}
@@ -128,7 +130,7 @@ static void cursor_disable(test_data_t *test_data)
igt_display_commit(display);
}
-static void test_crc(test_data_t *test_data, enum cursor_type cursor_type,
+static void test_crc(test_data_t *test_data,
bool onscreen, int cursor_w, int cursor_h)
{
int left = test_data->left;
@@ -136,11 +138,11 @@ static void test_crc(test_data_t *test_data, enum
cursor_type cursor_type,
int top = test_data->top;
int bottom = test_data->bottom;
- cursor_enable(test_data, cursor_type);
+ cursor_enable(test_data);
if (onscreen) {
/* cursor onscreen, crc should match, except when white visible
cursor is used */
- test_data->crc_must_match = (cursor_type != WHITE_VISIBLE);
+ test_data->crc_must_match = false;
/* fully inside */
do_test(test_data, left, right, top, bottom);
@@ -156,7 +158,7 @@ static void test_crc(test_data_t *test_data, enum
cursor_type cursor_type,
do_test(test_data, left - (cursor_w-1), right + (cursor_w-1),
top - (cursor_h-1), bottom + (cursor_h-1));
} else {
/* cursor offscreen, crc should always match */
- test_data->crc_must_match = true;
+ test_data->crc_must_match = false;
/* fully outside */
do_test(test_data, left - (cursor_w), right + (cursor_w), top
, bottom );
@@ -255,8 +257,7 @@ static void cleanup_crtc(test_data_t *test_data,
igt_output_t *output)
igt_output_set_pipe(output, PIPE_ANY);
}
-static void run_test(data_t *data, enum cursor_type cursor_type, bool onscreen,
-int cursor_w, int cursor_h)
+static void run_test(data_t *data, bool onscreen, int cursor_w, int cursor_h)
{
igt_display_t *display = &data->display;
igt_output_t *output;
@@ -280,7 +281,7 @@ static void run_test(data_t *data, enum cursor_type
cursor_type, bool onscreen,
igt_subtest_name(), pipe_name(test_data.pipe),
igt_output_name(output));
-
[Intel-gfx] [PATCH i-g-t 0/7] kms_cursor_crc enhancements
This patch series enhances the cursor test to actually be useful. The old "black transparent cursor on black background" tests are replaced with a visible cursor and the framework is changed to be more flexible and extendable. This way cursor rotation tests can be added with ease in the future. Also adds a couple more tests to the current set. Antti Koskipaa (7): kms_cursor_crc: Remove some test cases and change cursor to color kms_cursor_crc: Move cursor enable and disable calls where they belong kms_cursor_crc: Use a function pointer to call test kms_cursor_crc: Separate onscreen and offscreen tests kms_cursor_crc: Add reference software rendering kms_cursor_crc: Add moving cursor test kms_cursor_crc: Add random cursor placement test tests/kms_cursor_crc.c | 248 +++-- 1 file changed, 139 insertions(+), 109 deletions(-) -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 2/7] kms_cursor_crc: Move cursor enable and disable calls where they belong
We can't have the hw cursor enabled during software render tests.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 54 --
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 52281d0..8802da6 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -67,6 +67,30 @@ static void draw_cursor(cairo_t *cr, int x, int y, int w)
igt_paint_color_alpha(cr, x + w, y + w, w, w, 0.5, 0.5, 0.5, 1.0);
}
+static void cursor_enable(test_data_t *test_data)
+{
+ data_t *data = test_data->data;
+ igt_display_t *display = &data->display;
+ igt_output_t *output = test_data->output;
+ igt_plane_t *cursor;
+
+ cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
+ igt_plane_set_fb(cursor, &data->fb);
+ igt_display_commit(display);
+}
+
+static void cursor_disable(test_data_t *test_data)
+{
+ data_t *data = test_data->data;
+ igt_display_t *display = &data->display;
+ igt_output_t *output = test_data->output;
+ igt_plane_t *cursor;
+
+ cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
+ igt_plane_set_fb(cursor, NULL);
+ igt_display_commit(display);
+}
+
static igt_pipe_crc_t *create_crc(data_t *data, enum pipe pipe)
{
igt_pipe_crc_t *crc;
@@ -85,10 +109,12 @@ static void do_single_test(test_data_t *test_data, int x,
int y)
printf("."); fflush(stdout);
+ cursor_enable(test_data);
cursor = igt_output_get_plane(test_data->output, IGT_PLANE_CURSOR);
igt_plane_set_position(cursor, x, y);
igt_display_commit(display);
igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ cursor_disable(test_data);
igt_pipe_crc_collect_crc(pipe_crc, &crc);
if (test_data->crc_must_match)
@@ -106,30 +132,6 @@ static void do_test(test_data_t *test_data,
do_single_test(test_data, left, bottom);
}
-static void cursor_enable(test_data_t *test_data)
-{
- data_t *data = test_data->data;
- igt_display_t *display = &data->display;
- igt_output_t *output = test_data->output;
- igt_plane_t *cursor;
-
- cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
- igt_plane_set_fb(cursor, &data->fb);
- igt_display_commit(display);
-}
-
-static void cursor_disable(test_data_t *test_data)
-{
- data_t *data = test_data->data;
- igt_display_t *display = &data->display;
- igt_output_t *output = test_data->output;
- igt_plane_t *cursor;
-
- cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
- igt_plane_set_fb(cursor, NULL);
- igt_display_commit(display);
-}
-
static void test_crc(test_data_t *test_data,
bool onscreen, int cursor_w, int cursor_h)
{
@@ -138,8 +140,6 @@ static void test_crc(test_data_t *test_data,
int top = test_data->top;
int bottom = test_data->bottom;
- cursor_enable(test_data);
-
if (onscreen) {
/* cursor onscreen, crc should match, except when white visible
cursor is used */
test_data->crc_must_match = false;
@@ -183,8 +183,6 @@ static void test_crc(test_data_t *test_data,
/* go nuts */
do_test(test_data, INT_MIN, INT_MAX, INT_MIN, INT_MAX);
}
-
- cursor_disable(test_data);
}
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t 3/7] kms_cursor_crc: Use a function pointer to call test
More tests are coming, and this allows us to not repeat the boilerplate
code in run_test() for each subtest.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 8802da6..60b50b5 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -54,6 +54,7 @@ typedef struct {
igt_crc_t ref_crc;
bool crc_must_match;
int left, right, top, bottom;
+ int curw, curh; /* cursor size */
} test_data_t;
static void draw_cursor(cairo_t *cr, int x, int y, int w)
@@ -133,12 +134,14 @@ static void do_test(test_data_t *test_data,
}
static void test_crc(test_data_t *test_data,
-bool onscreen, int cursor_w, int cursor_h)
+bool onscreen)
{
int left = test_data->left;
int right = test_data->right;
int top = test_data->top;
int bottom = test_data->bottom;
+ int cursor_w = test_data->curw;
+ int cursor_h = test_data->curh;
if (onscreen) {
/* cursor onscreen, crc should match, except when white visible
cursor is used */
@@ -228,6 +231,8 @@ static bool prepare_crtc(test_data_t *test_data,
igt_output_t *output,
test_data->right = mode->hdisplay - cursor_w;
test_data->top = 0;
test_data->bottom = mode->vdisplay - cursor_h;
+ test_data->curw = cursor_w;
+ test_data->curh = cursor_h;
/* make sure cursor is disabled */
cursor_disable(test_data);
@@ -255,7 +260,7 @@ static void cleanup_crtc(test_data_t *test_data,
igt_output_t *output)
igt_output_set_pipe(output, PIPE_ANY);
}
-static void run_test(data_t *data, bool onscreen, int cursor_w, int cursor_h)
+static void run_test(data_t *data, void (*testfunc)(test_data_t *, bool), bool
onscreen, int cursor_w, int cursor_h)
{
igt_display_t *display = &data->display;
igt_output_t *output;
@@ -279,7 +284,7 @@ static void run_test(data_t *data, bool onscreen, int
cursor_w, int cursor_h)
igt_subtest_name(), pipe_name(test_data.pipe),
igt_output_name(output));
- test_crc(&test_data, onscreen, cursor_w, cursor_h);
+ testfunc(&test_data, onscreen);
fprintf(stdout, "\n%s on pipe %c, connector %s:
PASSED\n\n",
igt_subtest_name(), pipe_name(test_data.pipe),
@@ -321,9 +326,9 @@ static void run_test_generic(data_t *data, int
cursor_max_size)
/* Using created cursor FBs to test cursor support */
igt_subtest_f("cursor-%s-onscreen", c_size)
- run_test(data, true, cursor_size, cursor_size);
+ run_test(data, test_crc, true, cursor_size,
cursor_size);
igt_subtest_f("cursor-%s-offscreen", c_size)
- run_test(data, false, cursor_size, cursor_size);
+ run_test(data, test_crc, false, cursor_size,
cursor_size);
}
}
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t v2 5/8] kms_cursor_crc: Add reference software rendering
This patch first render the cursor with hardware rendering and
then with software, acquiring the CRC in both cases so they can be
properly compared. Say goodbye to crc_must_match variable.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 94baa94..85ff243 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -52,14 +52,17 @@ typedef struct {
igt_output_t *output;
enum pipe pipe;
igt_crc_t ref_crc;
- bool crc_must_match;
int left, right, top, bottom;
+ int screenw, screenh;
int curw, curh; /* cursor size */
} test_data_t;
static void draw_cursor(cairo_t *cr, int x, int y, int w)
{
w /= 2;
+ /* Cairo doesn't like to be fed numbers that are too wild */
+ if ((x < SHRT_MIN) || (x > SHRT_MAX) || (y < SHRT_MIN) || (y >
SHRT_MAX))
+ return;
cairo_set_antialias(cr, CAIRO_ANTIALIAS_NONE);
/* 4 color rectangles in the corners, RGBY */
igt_paint_color_alpha(cr, x, y, w, w, 1.0, 0.0, 0.0, 1.0);
@@ -105,23 +108,31 @@ static void do_single_test(test_data_t *test_data, int x,
int y)
data_t *data = test_data->data;
igt_display_t *display = &data->display;
igt_pipe_crc_t *pipe_crc = data->pipe_crc[test_data->pipe];
- igt_crc_t crc;
+ igt_crc_t crc, ref_crc;
igt_plane_t *cursor;
+ cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb);
printf("."); fflush(stdout);
+ /* Hardware test */
cursor_enable(test_data);
cursor = igt_output_get_plane(test_data->output, IGT_PLANE_CURSOR);
igt_plane_set_position(cursor, x, y);
igt_display_commit(display);
igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ igt_pipe_crc_collect_crc(pipe_crc, &crc);
cursor_disable(test_data);
- igt_pipe_crc_collect_crc(pipe_crc, &crc);
- if (test_data->crc_must_match)
- igt_assert(igt_crc_equal(&crc, &test_data->ref_crc));
- else
- igt_assert(!igt_crc_equal(&crc, &test_data->ref_crc));
+ /* Now render the same in software and collect crc */
+ draw_cursor(cr, x, y, test_data->curw);
+ igt_display_commit(display);
+ igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ igt_pipe_crc_collect_crc(pipe_crc, &ref_crc);
+ /* Clear screen afterwards */
+ igt_paint_color(cr, 0, 0, test_data->screenw, test_data->screenh,
+ 0.0, 0.0, 0.0);
+
+ igt_assert(igt_crc_equal(&crc, &ref_crc));
}
static void do_test(test_data_t *test_data,
@@ -232,6 +243,8 @@ static bool prepare_crtc(test_data_t *test_data,
igt_output_t *output,
test_data->right = mode->hdisplay - cursor_w;
test_data->top = 0;
test_data->bottom = mode->vdisplay - cursor_h;
+ test_data->screenw = mode->hdisplay;
+ test_data->screenh = mode->vdisplay;
test_data->curw = cursor_w;
test_data->curh = cursor_h;
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t v2 7/8] kms_cursor_crc: Add random cursor placement test
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index b2498a1..e00abf5 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -214,6 +214,18 @@ static void test_crc_sliding(test_data_t *test_data)
}
}
+static void test_crc_random(test_data_t *test_data)
+{
+ int i;
+
+ /* Random cursor placement */
+ for (i = 0; i < 50; i++) {
+ int x = rand() % (test_data->screenw + test_data->curw * 2) -
test_data->curw;
+ int y = rand() % (test_data->screenh + test_data->curh * 2) -
test_data->curh;
+ do_single_test(test_data, x, y);
+ }
+}
+
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
int cursor_w, int cursor_h)
{
@@ -359,6 +371,8 @@ static void run_test_generic(data_t *data, int
cursor_max_size)
run_test(data, test_crc_offscreen, cursor_size,
cursor_size);
igt_subtest_f("cursor-%s-sliding", c_size)
run_test(data, test_crc_sliding, cursor_size,
cursor_size);
+ igt_subtest_f("cursor-%s-random", c_size)
+ run_test(data, test_crc_random, cursor_size,
cursor_size);
}
}
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t v2 4/8] kms_cursor_crc: Separate onscreen and offscreen tests
Also remove onscreen boolean from parameter list. All test-related
data should be put into test_data from now.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 99 +-
1 file changed, 50 insertions(+), 49 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 60b50b5..94baa94 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -133,8 +133,7 @@ static void do_test(test_data_t *test_data,
do_single_test(test_data, left, bottom);
}
-static void test_crc(test_data_t *test_data,
-bool onscreen)
+static void test_crc_onscreen(test_data_t *test_data)
{
int left = test_data->left;
int right = test_data->right;
@@ -143,49 +142,51 @@ static void test_crc(test_data_t *test_data,
int cursor_w = test_data->curw;
int cursor_h = test_data->curh;
- if (onscreen) {
- /* cursor onscreen, crc should match, except when white visible
cursor is used */
- test_data->crc_must_match = false;
-
- /* fully inside */
- do_test(test_data, left, right, top, bottom);
-
- /* 2 pixels inside */
- do_test(test_data, left - (cursor_w-2), right + (cursor_w-2),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h-2), bottom + (cursor_h-2));
- do_test(test_data, left - (cursor_w-2), right + (cursor_w-2),
top - (cursor_h-2), bottom + (cursor_h-2));
-
- /* 1 pixel inside */
- do_test(test_data, left - (cursor_w-1), right + (cursor_w-1),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h-1), bottom + (cursor_h-1));
- do_test(test_data, left - (cursor_w-1), right + (cursor_w-1),
top - (cursor_h-1), bottom + (cursor_h-1));
- } else {
- /* cursor offscreen, crc should always match */
- test_data->crc_must_match = false;
-
- /* fully outside */
- do_test(test_data, left - (cursor_w), right + (cursor_w), top
, bottom );
- do_test(test_data, left , right , top -
(cursor_h), bottom + (cursor_h));
- do_test(test_data, left - (cursor_w), right + (cursor_w), top -
(cursor_h), bottom + (cursor_h));
-
- /* fully outside by 1 extra pixels */
- do_test(test_data, left - (cursor_w+1), right + (cursor_w+1),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h+1), bottom + (cursor_h+1));
- do_test(test_data, left - (cursor_w+1), right + (cursor_w+1),
top - (cursor_h+1), bottom + (cursor_h+1));
-
- /* fully outside by 2 extra pixels */
- do_test(test_data, left - (cursor_w+2), right + (cursor_w+2),
top , bottom );
- do_test(test_data, left , right ,
top - (cursor_h+2), bottom + (cursor_h+2));
- do_test(test_data, left - (cursor_w+2), right + (cursor_w+2),
top - (cursor_h+2), bottom + (cursor_h+2));
-
- /* fully outside by a lot of extra pixels */
- do_test(test_data, left - (cursor_w+512), right +
(cursor_w+512), top , bottom );
- do_test(test_data, left , right
, top - (cursor_h+512), bottom + (cursor_h+512));
- do_test(test_data, left - (cursor_w+512), right +
(cursor_w+512), top - (cursor_h+512), bottom + (cursor_h+512));
-
- /* go nuts */
- do_test(test_data, INT_MIN, INT_MAX, INT_MIN, INT_MAX);
- }
+ /* fully inside */
+ do_test(test_data, left, right, top, bottom);
+
+ /* 2 pixels inside */
+ do_test(test_data, left - (cursor_w-2), right + (cursor_w-2), top
, bottom );
+ do_test(test_data, left , right , top -
(cursor_h-2), bottom + (cursor_h-2));
+ do_test(test_data, left - (cursor_w-2), right + (cursor_w-2), top -
(cursor_h-2), bottom + (cursor_h-2));
+
+ /* 1 pixel inside */
+ do_test(test_data, left - (cursor_w-1), right + (cursor_w-1), top
, bottom );
+ do_test(test_data, left , right , top -
(cursor_h-1), bottom + (cursor_h-1));
+ do_test(test_data, left - (cursor_w-1), right + (cursor_w-1), top -
(cursor_h-1), bottom + (cursor_h-1));
+}
+
+static void test_crc_offscreen(test_data_t *test_data)
+{
+ int left = test_data->left;
+ int right = test_data->right;
+ int top = test_data->top;
+ int bottom = tes
[Intel-gfx] [PATCH i-g-t v2 2/8] kms_cursor_crc: Move cursor enable and disable calls where they belong
We can't have the hw cursor enabled during software render tests.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 54 --
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 52281d0..8802da6 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -67,6 +67,30 @@ static void draw_cursor(cairo_t *cr, int x, int y, int w)
igt_paint_color_alpha(cr, x + w, y + w, w, w, 0.5, 0.5, 0.5, 1.0);
}
+static void cursor_enable(test_data_t *test_data)
+{
+ data_t *data = test_data->data;
+ igt_display_t *display = &data->display;
+ igt_output_t *output = test_data->output;
+ igt_plane_t *cursor;
+
+ cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
+ igt_plane_set_fb(cursor, &data->fb);
+ igt_display_commit(display);
+}
+
+static void cursor_disable(test_data_t *test_data)
+{
+ data_t *data = test_data->data;
+ igt_display_t *display = &data->display;
+ igt_output_t *output = test_data->output;
+ igt_plane_t *cursor;
+
+ cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
+ igt_plane_set_fb(cursor, NULL);
+ igt_display_commit(display);
+}
+
static igt_pipe_crc_t *create_crc(data_t *data, enum pipe pipe)
{
igt_pipe_crc_t *crc;
@@ -85,10 +109,12 @@ static void do_single_test(test_data_t *test_data, int x,
int y)
printf("."); fflush(stdout);
+ cursor_enable(test_data);
cursor = igt_output_get_plane(test_data->output, IGT_PLANE_CURSOR);
igt_plane_set_position(cursor, x, y);
igt_display_commit(display);
igt_wait_for_vblank(data->drm_fd, test_data->pipe);
+ cursor_disable(test_data);
igt_pipe_crc_collect_crc(pipe_crc, &crc);
if (test_data->crc_must_match)
@@ -106,30 +132,6 @@ static void do_test(test_data_t *test_data,
do_single_test(test_data, left, bottom);
}
-static void cursor_enable(test_data_t *test_data)
-{
- data_t *data = test_data->data;
- igt_display_t *display = &data->display;
- igt_output_t *output = test_data->output;
- igt_plane_t *cursor;
-
- cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
- igt_plane_set_fb(cursor, &data->fb);
- igt_display_commit(display);
-}
-
-static void cursor_disable(test_data_t *test_data)
-{
- data_t *data = test_data->data;
- igt_display_t *display = &data->display;
- igt_output_t *output = test_data->output;
- igt_plane_t *cursor;
-
- cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
- igt_plane_set_fb(cursor, NULL);
- igt_display_commit(display);
-}
-
static void test_crc(test_data_t *test_data,
bool onscreen, int cursor_w, int cursor_h)
{
@@ -138,8 +140,6 @@ static void test_crc(test_data_t *test_data,
int top = test_data->top;
int bottom = test_data->bottom;
- cursor_enable(test_data);
-
if (onscreen) {
/* cursor onscreen, crc should match, except when white visible
cursor is used */
test_data->crc_must_match = false;
@@ -183,8 +183,6 @@ static void test_crc(test_data_t *test_data,
/* go nuts */
do_test(test_data, INT_MIN, INT_MAX, INT_MIN, INT_MAX);
}
-
- cursor_disable(test_data);
}
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t v2 8/8] kms_cursor_crc: Add background picture
This gives the cursor something to be on, instead of just a black
background. Slows the test down only one second over six minutes.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index e00abf5..589b164 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -115,6 +115,7 @@ static void do_single_test(test_data_t *test_data, int x,
int y)
printf("."); fflush(stdout);
/* Hardware test */
+ igt_paint_test_pattern(cr, test_data->screenw, test_data->screenh);
cursor_enable(test_data);
cursor = igt_output_get_plane(test_data->output, IGT_PLANE_CURSOR);
igt_plane_set_position(cursor, x, y);
--
1.8.3.2
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[Intel-gfx] [PATCH i-g-t v2 0/8] kms_cursor_crc enhancements
This patch series enhances the cursor test to actually be useful. The old "black transparent cursor on black background" tests are replaced with a visible cursor and the framework is changed to be more flexible and extendable. This way cursor rotation tests can be added with ease in the future. Also adds a couple more tests to the current set. v2: - reinstate "go nuts" -test - Add background picture for better test coverage Antti Koskipaa (8): kms_cursor_crc: Remove some test cases and change cursor to color kms_cursor_crc: Move cursor enable and disable calls where they belong kms_cursor_crc: Use a function pointer to call test kms_cursor_crc: Separate onscreen and offscreen tests kms_cursor_crc: Add reference software rendering kms_cursor_crc: Add moving cursor test kms_cursor_crc: Add random cursor placement test kms_cursor_crc: Add background picture tests/kms_cursor_crc.c | 255 - 1 file changed, 146 insertions(+), 109 deletions(-) -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2 3/8] kms_cursor_crc: Use a function pointer to call test
More tests are coming, and this allows us to not repeat the boilerplate
code in run_test() for each subtest.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 8802da6..60b50b5 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -54,6 +54,7 @@ typedef struct {
igt_crc_t ref_crc;
bool crc_must_match;
int left, right, top, bottom;
+ int curw, curh; /* cursor size */
} test_data_t;
static void draw_cursor(cairo_t *cr, int x, int y, int w)
@@ -133,12 +134,14 @@ static void do_test(test_data_t *test_data,
}
static void test_crc(test_data_t *test_data,
-bool onscreen, int cursor_w, int cursor_h)
+bool onscreen)
{
int left = test_data->left;
int right = test_data->right;
int top = test_data->top;
int bottom = test_data->bottom;
+ int cursor_w = test_data->curw;
+ int cursor_h = test_data->curh;
if (onscreen) {
/* cursor onscreen, crc should match, except when white visible
cursor is used */
@@ -228,6 +231,8 @@ static bool prepare_crtc(test_data_t *test_data,
igt_output_t *output,
test_data->right = mode->hdisplay - cursor_w;
test_data->top = 0;
test_data->bottom = mode->vdisplay - cursor_h;
+ test_data->curw = cursor_w;
+ test_data->curh = cursor_h;
/* make sure cursor is disabled */
cursor_disable(test_data);
@@ -255,7 +260,7 @@ static void cleanup_crtc(test_data_t *test_data,
igt_output_t *output)
igt_output_set_pipe(output, PIPE_ANY);
}
-static void run_test(data_t *data, bool onscreen, int cursor_w, int cursor_h)
+static void run_test(data_t *data, void (*testfunc)(test_data_t *, bool), bool
onscreen, int cursor_w, int cursor_h)
{
igt_display_t *display = &data->display;
igt_output_t *output;
@@ -279,7 +284,7 @@ static void run_test(data_t *data, bool onscreen, int
cursor_w, int cursor_h)
igt_subtest_name(), pipe_name(test_data.pipe),
igt_output_name(output));
- test_crc(&test_data, onscreen, cursor_w, cursor_h);
+ testfunc(&test_data, onscreen);
fprintf(stdout, "\n%s on pipe %c, connector %s:
PASSED\n\n",
igt_subtest_name(), pipe_name(test_data.pipe),
@@ -321,9 +326,9 @@ static void run_test_generic(data_t *data, int
cursor_max_size)
/* Using created cursor FBs to test cursor support */
igt_subtest_f("cursor-%s-onscreen", c_size)
- run_test(data, true, cursor_size, cursor_size);
+ run_test(data, test_crc, true, cursor_size,
cursor_size);
igt_subtest_f("cursor-%s-offscreen", c_size)
- run_test(data, false, cursor_size, cursor_size);
+ run_test(data, test_crc, false, cursor_size,
cursor_size);
}
}
--
1.8.3.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2 1/8] kms_cursor_crc: Remove some test cases and change cursor to color
Currently this test is quite useless, since it only checks for valid CRCs when
the correct output from a test is a completely black screen (invisible or
visible
but black cursor, or cursor is offscreen) and disables the check when anything
visible is onscreen.
This patch changes the cursor to a colorful one and removes the test cases
that become redundant because of this change. The cursor is designed to be
asymmetrical such that future tests involving rotation, mirroring, etc. produce
different CRCs and failures can be detected.
This (temporarily) disables CRC testing until the next patch which will add
software rendering of the cursor and the CRC generation.
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 75 +-
1 file changed, 32 insertions(+), 43 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index fbb5d88..52281d0 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -39,19 +39,11 @@
#define DRM_CAP_CURSOR_HEIGHT 0x9
#endif
-enum cursor_type {
- WHITE_VISIBLE,
- WHITE_INVISIBLE,
- BLACK_VISIBLE,
- BLACK_INVISIBLE,
- NUM_CURSOR_TYPES,
-};
-
typedef struct {
int drm_fd;
igt_display_t display;
struct igt_fb primary_fb;
- struct igt_fb fb[NUM_CURSOR_TYPES];
+ struct igt_fb fb;
igt_pipe_crc_t **pipe_crc;
} data_t;
@@ -64,6 +56,16 @@ typedef struct {
int left, right, top, bottom;
} test_data_t;
+static void draw_cursor(cairo_t *cr, int x, int y, int w)
+{
+ w /= 2;
+ cairo_set_antialias(cr, CAIRO_ANTIALIAS_NONE);
+ /* 4 color rectangles in the corners, RGBY */
+ igt_paint_color_alpha(cr, x, y, w, w, 1.0, 0.0, 0.0, 1.0);
+ igt_paint_color_alpha(cr, x + w, y, w, w, 0.0, 1.0, 0.0, 1.0);
+ igt_paint_color_alpha(cr, x, y + w, w, w, 0.0, 0.0, 1.0, 1.0);
+ igt_paint_color_alpha(cr, x + w, y + w, w, w, 0.5, 0.5, 0.5, 1.0);
+}
static igt_pipe_crc_t *create_crc(data_t *data, enum pipe pipe)
{
@@ -104,7 +106,7 @@ static void do_test(test_data_t *test_data,
do_single_test(test_data, left, bottom);
}
-static void cursor_enable(test_data_t *test_data, enum cursor_type cursor_type)
+static void cursor_enable(test_data_t *test_data)
{
data_t *data = test_data->data;
igt_display_t *display = &data->display;
@@ -112,7 +114,7 @@ static void cursor_enable(test_data_t *test_data, enum
cursor_type cursor_type)
igt_plane_t *cursor;
cursor = igt_output_get_plane(output, IGT_PLANE_CURSOR);
- igt_plane_set_fb(cursor, &data->fb[cursor_type]);
+ igt_plane_set_fb(cursor, &data->fb);
igt_display_commit(display);
}
@@ -128,7 +130,7 @@ static void cursor_disable(test_data_t *test_data)
igt_display_commit(display);
}
-static void test_crc(test_data_t *test_data, enum cursor_type cursor_type,
+static void test_crc(test_data_t *test_data,
bool onscreen, int cursor_w, int cursor_h)
{
int left = test_data->left;
@@ -136,11 +138,11 @@ static void test_crc(test_data_t *test_data, enum
cursor_type cursor_type,
int top = test_data->top;
int bottom = test_data->bottom;
- cursor_enable(test_data, cursor_type);
+ cursor_enable(test_data);
if (onscreen) {
/* cursor onscreen, crc should match, except when white visible
cursor is used */
- test_data->crc_must_match = (cursor_type != WHITE_VISIBLE);
+ test_data->crc_must_match = false;
/* fully inside */
do_test(test_data, left, right, top, bottom);
@@ -156,7 +158,7 @@ static void test_crc(test_data_t *test_data, enum
cursor_type cursor_type,
do_test(test_data, left - (cursor_w-1), right + (cursor_w-1),
top - (cursor_h-1), bottom + (cursor_h-1));
} else {
/* cursor offscreen, crc should always match */
- test_data->crc_must_match = true;
+ test_data->crc_must_match = false;
/* fully outside */
do_test(test_data, left - (cursor_w), right + (cursor_w), top
, bottom );
@@ -255,8 +257,7 @@ static void cleanup_crtc(test_data_t *test_data,
igt_output_t *output)
igt_output_set_pipe(output, PIPE_ANY);
}
-static void run_test(data_t *data, enum cursor_type cursor_type, bool onscreen,
-int cursor_w, int cursor_h)
+static void run_test(data_t *data, bool onscreen, int cursor_w, int cursor_h)
{
igt_display_t *display = &data->display;
igt_output_t *output;
@@ -280,7 +281,7 @@ static void run_test(data_t *data, enum cursor_type
cursor_type, bool onscreen,
igt_subtest_name(), pipe_name(test_data.pipe),
igt_output_name(output));
-
[Intel-gfx] [PATCH i-g-t v2 6/8] kms_cursor_crc: Add moving cursor test
Signed-off-by: Antti Koskipaa
---
tests/kms_cursor_crc.c | 16
1 file changed, 16 insertions(+)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 85ff243..b2498a1 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
@@ -200,6 +200,20 @@ static void test_crc_offscreen(test_data_t *test_data)
do_test(test_data, INT_MIN, INT_MAX, INT_MIN, INT_MAX);
}
+static void test_crc_sliding(test_data_t *test_data)
+{
+ int i;
+
+ /* Make sure cursor moves smoothly and pixel-by-pixel, and that there
are
+* no alignment issues. Horizontal, vertical and diagonal test.
+*/
+ for (i = 0; i < 16; i++) {
+ do_single_test(test_data, i, 0);
+ do_single_test(test_data, 0, i);
+ do_single_test(test_data, i, i);
+ }
+}
+
static bool prepare_crtc(test_data_t *test_data, igt_output_t *output,
int cursor_w, int cursor_h)
{
@@ -343,6 +357,8 @@ static void run_test_generic(data_t *data, int
cursor_max_size)
run_test(data, test_crc_onscreen, cursor_size,
cursor_size);
igt_subtest_f("cursor-%s-offscreen", c_size)
run_test(data, test_crc_offscreen, cursor_size,
cursor_size);
+ igt_subtest_f("cursor-%s-sliding", c_size)
+ run_test(data, test_crc_sliding, cursor_size,
cursor_size);
}
}
--
1.8.3.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC v2] drm/i915: Clean up display pipe register accesses
v2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SandyBridge and VLV/BYT.
I left the UMS cruft untouched.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 56 +++
drivers/gpu/drm/i915/i915_drv.h | 9 +++-
drivers/gpu/drm/i915/i915_reg.h | 99 ++---
3 files changed, 127 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 24d58b0..95e17a2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -161,16 +161,48 @@ extern int intel_agp_enabled;
static int intel_agp_enabled;
#endif
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET },
+
+#define GEN7_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET },
+
+#define VLV_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET+VLV_DISPLAY_BASE, \
+ PIPE_B_OFFSET+VLV_DISPLAY_BASE }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET+VLV_DISPLAY_BASE, \
+ TRANSCODER_B_OFFSET+VLV_DISPLAY_BASE, \
+ TRANSCODER_C_OFFSET+VLV_DISPLAY_BASE, \
+ TRANSCODER_EDP_OFFSET+VLV_DISPLAY_BASE }, \
+ .dpll_offsets = { DPLL_A_OFFSET+VLV_DISPLAY_BASE, \
+ DPLL_B_OFFSET+VLV_DISPLAY_BASE }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET+VLV_DISPLAY_BASE, \
+DPLL_B_MD_OFFSET+VLV_DISPLAY_BASE }, \
+ .palette_offsets = { PALETTE_A_OFFSET+VLV_DISPLAY_BASE, \
+PALETTE_B_OFFSET+VLV_DISPLAY_BASE },
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i85x_info = {
@@ -178,18 +210,21 @@ static const struct intel_device_info intel_i85x_info = {
.cursor_needs_physical = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -197,11 +232,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.has_overlay = 1, .overlay_needs_physical = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -209,6 +246,7 @@ static const struct intel_device_info intel_i945gm_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965g_info = {
@@ -216,6 +254,7 @@ static const struct
[Intel-gfx] [PATCH] drm/i915: Clean up display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
PATCHv1: Fixed offsets for VLV, proper eDP handling
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB and HSW w/eDP.
I left the UMS cruft untouched.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 44 +
drivers/gpu/drm/i915/i915_drv.h | 11 ++-
drivers/gpu/drm/i915/i915_reg.h | 191 +++-
3 files changed, 164 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 62c0f16..3ac2ad2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -157,16 +157,35 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, \
+ TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }, \
+ .trans_ddi_func_offsets = { TRANS_DDI_FUNC_CTL_A, \
+ TRANS_DDI_FUNC_CTL_B, \
+ TRANS_DDI_FUNC_CTL_C, \
+ TRANS_DDI_FUNC_CTL_EDP }, \
+ .trans_msa_misc_offsets = { TRANSA_MSA_MISC, TRANSB_MSA_MISC, \
+ TRANSC_MSA_MISC, TRANS_EDP_MSA_MISC },
+
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i85x_info = {
@@ -175,18 +194,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -195,11 +217,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -208,6 +232,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965g_info = {
@@ -215,6 +240,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965gm_info = {
@@ -223,6 +249,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g33_info = {
@@ -230,12 +257,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g45_info = {
.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
.has_pipe_cxsr
[Intel-gfx] [PATCH v2] drm/i915: Clean up display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
v1: Fixed offsets for VLV, proper eDP handling
v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros.
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB and HSW w/eDP.
I left the UMS cruft untouched.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 44
drivers/gpu/drm/i915/i915_drv.h | 11 +-
drivers/gpu/drm/i915/i915_reg.h | 229 ++--
3 files changed, 183 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 62c0f16..3ac2ad2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -157,16 +157,35 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, \
+ TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }, \
+ .trans_ddi_func_offsets = { TRANS_DDI_FUNC_CTL_A, \
+ TRANS_DDI_FUNC_CTL_B, \
+ TRANS_DDI_FUNC_CTL_C, \
+ TRANS_DDI_FUNC_CTL_EDP }, \
+ .trans_msa_misc_offsets = { TRANSA_MSA_MISC, TRANSB_MSA_MISC, \
+ TRANSC_MSA_MISC, TRANS_EDP_MSA_MISC },
+
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i85x_info = {
@@ -175,18 +194,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -195,11 +217,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -208,6 +232,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965g_info = {
@@ -215,6 +240,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965gm_info = {
@@ -223,6 +249,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g33_info = {
@@ -230,12 +257,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g45_info = {
.gen = 4, .is_g4x = 1
[Intel-gfx] [PATCH v3] drm/i915: Clean up display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
v1: Fixed offsets for VLV, proper eDP handling
v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros.
v3: Added EDP pipe comment, removed redundant offset arrays for
MSA_MISC and DDI_FUNC_CTL.
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB and HSW w/eDP.
I left the UMS cruft untouched.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 37 +++
drivers/gpu/drm/i915/i915_drv.h | 9 +-
drivers/gpu/drm/i915/i915_reg.h | 235 +++-
3 files changed, 180 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 82c4605..c1ee80d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -154,16 +154,28 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, \
+ TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }, \
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i85x_info = {
@@ -172,18 +184,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -192,11 +207,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -205,6 +222,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965g_info = {
@@ -212,6 +230,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965gm_info = {
@@ -220,6 +239,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g33_info = {
@@ -227,12 +247,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g45_info = {
.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
.has_pipe_cxsr = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_gm45_info = {
@@ -241,18 +263,21 @@ static const struct intel_device_info intel_gm45_info
[Intel-gfx] [PATCH] drm/i915: Clean up display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
PATCHv1: Fixed offsets for VLV
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SandyBridge and Valleyview
I left the UMS cruft untouched.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 36 +++
drivers/gpu/drm/i915/i915_drv.h | 9 +++-
drivers/gpu/drm/i915/i915_reg.h | 98 +
3 files changed, 114 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 23f8217..4e64f0b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -156,16 +156,27 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET },
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i85x_info = {
@@ -174,18 +185,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -194,11 +208,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -207,6 +223,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965g_info = {
@@ -214,6 +231,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965gm_info = {
@@ -222,6 +240,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g33_info = {
@@ -229,12 +248,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g45_info = {
.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
.has_pipe_cxsr = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_gm45_info = {
@@ -243,18 +264,21 @@ static const struct intel_device_info intel_gm45_info = {
.has_pipe_cxsr = 1, .has_hotplug = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING | BSD_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info
[Intel-gfx] [PATCH v4] drm/i915: Reorganize display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
v1: Fixed offsets for VLV, proper eDP handling
v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros.
v3: Added EDP pipe comment, removed redundant offset arrays for
MSA_MISC and DDI_FUNC_CTL.
v4: Rename patch and report object size increase.
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB and HSW w/eDP.
I left the UMS cruft untouched.
Size differences:
textdata bss dec hex filename
5984314342 56 602829 932cd i915.ko (old)
6017594342 56 606157 93fcd i915.ko (new)
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 37 +++
drivers/gpu/drm/i915/i915_drv.h | 9 +-
drivers/gpu/drm/i915/i915_reg.h | 235 +++-
3 files changed, 180 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 82c4605..c1ee80d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -154,16 +154,28 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, \
+ TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }, \
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i85x_info = {
@@ -172,18 +184,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -192,11 +207,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -205,6 +222,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965g_info = {
@@ -212,6 +230,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_i965gm_info = {
@@ -220,6 +239,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g33_info = {
@@ -227,12 +247,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS
};
static const struct intel_device_info intel_g45_info = {
.gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
.has_pipe_cxsr = 1, .has_hotplug = 1
[Intel-gfx] [PATCH v5] drm/i915: Reorganize display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
v1: Fixed offsets for VLV, proper eDP handling
v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros.
v3: Added EDP pipe comment, removed redundant offset arrays for
MSA_MISC and DDI_FUNC_CTL.
v4: Rename patch and report object size increase.
v5: Change location of commas, add PIPE_EDP into enum pipe
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB and HSW w/eDP.
I left the UMS cruft untouched.
Size differences:
textdata bss dec hex filename
5984314342 56 602829 932cd i915.ko (old)
6017274342 56 606125 93fad i915.ko (new)
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 37 +++
drivers/gpu/drm/i915/i915_drv.h | 10 +-
drivers/gpu/drm/i915/i915_reg.h | 235 +++-
3 files changed, 181 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 82c4605..429ba50 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -154,16 +154,28 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, PIPE_C_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, \
+ TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i85x_info = {
@@ -172,18 +184,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -192,11 +207,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -205,6 +222,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i965g_info = {
@@ -212,6 +230,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i965gm_info = {
@@ -220,6 +239,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_g33_info = {
@@ -227,12 +247,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_g45_info = {
.gen = 4, .is_g4x = 1, .need_gfx_hws
[Intel-gfx] [PATCH v6] drm/i915: Reorganize display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
v1: Fixed offsets for VLV, proper eDP handling
v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros.
v3: Added EDP pipe comment, removed redundant offset arrays for
MSA_MISC and DDI_FUNC_CTL.
v4: Rename patch and report object size increase.
v5: Change location of commas, add PIPE_EDP into enum pipe
v6: Insert PIPE_EDP_OFFSET into pipe offset array
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB and HSW w/eDP.
I left the UMS cruft untouched.
Size differences:
textdata bss dec hex filename
5984314342 56 602829 932cd i915.ko (old)
6017274342 56 606125 93fad i915.ko (new)
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 37 +++
drivers/gpu/drm/i915/i915_drv.h | 10 +-
drivers/gpu/drm/i915/i915_reg.h | 235 +++-
3 files changed, 181 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 82c4605..2d84429 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -154,16 +154,28 @@ MODULE_PARM_DESC(prefault_disable,
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \
+ PIPE_C_OFFSET, PIPE_EDP_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i85x_info = {
@@ -172,18 +184,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -192,11 +207,13 @@ static const struct intel_device_info intel_i915gm_info =
{
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -205,6 +222,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i965g_info = {
@@ -212,6 +230,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i965gm_info = {
@@ -220,6 +239,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_g33_info = {
@@ -227,12 +247,14 @@ static const struct intel_device_info intel_g33_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct
[Intel-gfx] [PATCH v7] drm/i915: Reorganize display pipe register accesses
RFCv2: Reorganize array indexing so that full offsets can be used as
is. It makes grepping for registers in i915_reg.h much easier. Also
move offset arrays to intel_device_info.
v1: Fixed offsets for VLV, proper eDP handling
v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros.
v3: Added EDP pipe comment, removed redundant offset arrays for
MSA_MISC and DDI_FUNC_CTL.
v4: Rename patch and report object size increase.
v5: Change location of commas, add PIPE_EDP into enum pipe
v6: Insert PIPE_EDP_OFFSET into pipe offset array
v7: Set I915_MAX_PIPES back to 3, change more registers accessors
to use the new macros, get rid of _PIPE_INC and add dev_priv
as a parameter where required by the new macros.
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SNB, VLV, IVB, Gen2 and HSW w/eDP.
I left the UMS cruft untouched.
Size differences:
textdata bss dec hex filename
5964314634 56 601121 92c21 i915.ko (new)
5931994634 56 597889 91f81 i915.ko (old)
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.c | 37 +
drivers/gpu/drm/i915/i915_drv.h | 12 +-
drivers/gpu/drm/i915/i915_reg.h | 284 +-
drivers/gpu/drm/i915/intel_hdmi.c | 6 +-
4 files changed, 210 insertions(+), 129 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a071748..05072cf 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -40,16 +40,28 @@
static struct drm_driver driver;
+#define GEN_DEFAULT_PIPEOFFSETS \
+ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \
+ PIPE_C_OFFSET, PIPE_EDP_OFFSET }, \
+ .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
+ TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET }, \
+ .dpll_offsets = { DPLL_A_OFFSET, DPLL_B_OFFSET }, \
+ .dpll_md_offsets = { DPLL_A_MD_OFFSET, DPLL_B_MD_OFFSET }, \
+ .palette_offsets = { PALETTE_A_OFFSET, PALETTE_B_OFFSET }
+
+
static const struct intel_device_info intel_i830_info = {
.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_845g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i85x_info = {
@@ -58,18 +70,21 @@ static const struct intel_device_info intel_i85x_info = {
.has_overlay = 1, .overlay_needs_physical = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i865g_info = {
.gen = 2, .num_pipes = 1,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i915g_info = {
.gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i915gm_info = {
.gen = 3, .is_mobile = 1, .num_pipes = 2,
@@ -78,11 +93,13 @@ static const struct intel_device_info intel_i915gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i945g_info = {
.gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
.has_overlay = 1, .overlay_needs_physical = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i945gm_info = {
.gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
@@ -91,6 +108,7 @@ static const struct intel_device_info intel_i945gm_info = {
.supports_tv = 1,
.has_fbc = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i965g_info = {
@@ -98,6 +116,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_hotplug = 1,
.has_overlay = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_i965gm_info = {
@@ -106,6 +125,7 @@ static const struct intel_device_info intel_i965gm_info = {
.has_overlay = 1,
.supports_tv = 1,
.ring_mask = RENDER_RING,
+ GEN_DEFAULT_PIPEOFFSETS,
};
static const struct intel_device_info intel_g33_info = {
@@ -113,12 +133,14 @@ static const struct intel_device_info
[Intel-gfx] [RFC] drm/i915: Clean up display pipe register accesses
Upcoming hardware will not have the various display pipe register
ranges evenly spaced in memory. Change register address calculations
into array lookups.
Tested on SandyBridge.
I left the UMS cruft untouched.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/dvo_ns2501.c | 6 ++--
drivers/gpu/drm/i915/i915_dma.c | 16 +++
drivers/gpu/drm/i915/i915_drv.h | 10 ++-
drivers/gpu/drm/i915/i915_reg.h | 59 +++
4 files changed, 69 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c
b/drivers/gpu/drm/i915/dvo_ns2501.c
index c4a255b..ce6a11b 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -99,12 +99,12 @@ static void enable_dvo(struct intel_dvo_device *dvo)
DRM_DEBUG_KMS("%s: Trying to re-enable the DVO\n", __FUNCTION__);
ns->dvoc = I915_READ(DVO_C);
- ns->pll_a = I915_READ(_DPLL_A);
+ ns->pll_a = I915_READ(DPLL(0));
ns->srcdim = I915_READ(DVOC_SRCDIM);
ns->fw_blc = I915_READ(FW_BLC);
I915_WRITE(DVOC, 0x10004084);
- I915_WRITE(_DPLL_A, 0xd082);
+ I915_WRITE(DPLL(0), 0xd082);
I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768
I915_WRITE(FW_BLC, 0x1080304);
@@ -125,7 +125,7 @@ static void restore_dvo(struct intel_dvo_device *dvo)
struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv);
I915_WRITE(DVOC, ns->dvoc);
- I915_WRITE(_DPLL_A, ns->pll_a);
+ I915_WRITE(DPLL(0), ns->pll_a);
I915_WRITE(DVOC_SRCDIM, ns->srcdim);
I915_WRITE(FW_BLC, ns->fw_blc);
}
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 0cab2d0..64fbfbb1 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1465,6 +1465,7 @@ int i915_driver_load(struct drm_device *dev, unsigned
long flags)
struct drm_i915_private *dev_priv;
struct intel_device_info *info;
int ret = 0, mmio_bar, mmio_size;
+ u32 mmio;
uint32_t aperture_size;
info = (struct intel_device_info *) flags;
@@ -1484,6 +1485,21 @@ int i915_driver_load(struct drm_device *dev, unsigned
long flags)
dev_priv->dev = dev;
dev_priv->info = info;
+ /* Set addresses for various pipe registers */
+ mmio = dev_priv->info->display_mmio_offset;
+ dev_priv->pipe_offsets[0] = mmio + PIPE_A_OFFSET;
+ dev_priv->pipe_offsets[1] = mmio + PIPE_B_OFFSET;
+ dev_priv->trans_offsets[0] = mmio + TRANSCODER_A_OFFSET;
+ dev_priv->trans_offsets[1] = mmio + TRANSCODER_B_OFFSET;
+ dev_priv->trans_offsets[2] = mmio + TRANSCODER_C_OFFSET;
+ dev_priv->trans_offsets[3] = mmio + TRANSCODER_EDP_OFFSET;
+ dev_priv->dpll_offsets[0] = mmio + DPLL_A_OFFSET;
+ dev_priv->dpll_offsets[1] = mmio + DPLL_B_OFFSET;
+ dev_priv->dpll_md_offsets[0] = mmio + DPLL_A_MD_OFFSET;
+ dev_priv->dpll_md_offsets[1] = mmio + DPLL_B_MD_OFFSET;
+ dev_priv->palette_offsets[0] = mmio + PALETTE_A_OFFSET;
+ dev_priv->palette_offsets[1] = mmio + PALETTE_B_OFFSET;
+
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
spin_lock_init(&dev_priv->backlight.lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2c1921d..7ea469a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -65,7 +65,8 @@ enum transcoder {
TRANSCODER_A = 0,
TRANSCODER_B,
TRANSCODER_C,
- TRANSCODER_EDP = 0xF,
+ TRANSCODER_EDP,
+ I915_MAX_TRANSCODERS
};
#define transcoder_name(t) ((t) + 'A')
@@ -1473,6 +1474,13 @@ typedef struct drm_i915_private {
struct i915_package_c8 pc8;
+ /* Register offsets for the various display pipes */
+ int pipe_offsets[I915_MAX_PIPES];
+ int trans_offsets[I915_MAX_TRANSCODERS];
+ int dpll_offsets[I915_MAX_PIPES];
+ int dpll_md_offsets[I915_MAX_PIPES];
+ int palette_offsets[I915_MAX_PIPES];
+
/* Old dri1 support infrastructure, beware the dragons ya fools entering
* here! */
struct i915_dri1_state dri1;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4d2db59..0afc9fa 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1187,6 +1187,10 @@
* Clock control & power management
*/
+#define DPLL_A_OFFSET 0x6014
+#define DPLL_B_OFFSET 0x6018
+#define DPLL(pipe) (dev_priv->dpll_offsets[pipe])
+
#define VGA0 0x6000
#define VGA1 0x6004
#define VGA_PD 0x6010
@@ -1200,7 +1204,6 @@
#define VGA1_PD_P1_MASK (0x1f << 8)
#define _DPLL_A(dev_priv->info->display_mmio_offset + 0x6014)
#define _DPLL_B(dev_priv->
[Intel-gfx] [PATCH] drm/i915: Per-DDI I_boost override
An OEM may request increased I_boost beyond the recommended values
by specifying an I_boost value to be applied to all swing entries for
a port. These override values are specified in VBT.
Issue: VIZ-5676
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/intel_bios.c | 21 +
drivers/gpu/drm/i915/intel_bios.h | 9 +
drivers/gpu/drm/i915/intel_ddi.c | 39 +++
4 files changed, 64 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 09a57a5..e17fd56 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1402,6 +1402,9 @@ struct ddi_vbt_port_info {
uint8_t supports_dvi:1;
uint8_t supports_hdmi:1;
uint8_t supports_dp:1;
+
+ uint8_t dp_boost_level;
+ uint8_t hdmi_boost_level;
};
enum psr_lines_to_wait {
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 198fc3c..06b5dc3 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -946,6 +946,17 @@ err:
memset(dev_priv->vbt.dsi.sequence, 0,
sizeof(dev_priv->vbt.dsi.sequence));
}
+static u8 translate_iboost(u8 val)
+{
+ static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
+
+ if (val >= ARRAY_SIZE(mapping)) {
+ DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d),
display may not work properly\n", val);
+ return 0;
+ }
+ return mapping[val];
+}
+
static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
const struct bdb_header *bdb)
{
@@ -1046,6 +1057,16 @@ static void parse_ddi_port(struct drm_i915_private
*dev_priv, enum port port,
hdmi_level_shift);
info->hdmi_level_shift = hdmi_level_shift;
}
+
+ /* Parse the I_boost config for SKL and above */
+ if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
+ info->dp_boost_level =
translate_iboost(child->common.iboost_level & 0xF);
+ DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
+ port_name(port), info->dp_boost_level);
+ info->hdmi_boost_level =
translate_iboost(child->common.iboost_level >> 4);
+ DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
+ port_name(port), info->hdmi_boost_level);
+ }
}
static void parse_ddi_ports(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_bios.h
b/drivers/gpu/drm/i915/intel_bios.h
index af0b476..8edd75c 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -231,6 +231,10 @@ struct old_child_dev_config {
/* This one contains field offsets that are known to be common for all BDB
* versions. Notice that the meaning of the contents contents may still change,
* but at least the offsets are consistent. */
+
+/* Definitions for flags_1 */
+#define IBOOST_ENABLE (1<<3)
+
struct common_child_dev_config {
u16 handle;
u16 device_type;
@@ -239,8 +243,13 @@ struct common_child_dev_config {
u8 not_common2[2];
u8 ddc_pin;
u16 edid_ptr;
+ u8 obsolete;
+ u8 flags_1;
+ u8 not_common3[13];
+ u8 iboost_level;
} __packed;
+
/* This field changes depending on the BDB version, so the most reliable way to
* read it is by checking the BDB version and reading the raw pointer. */
union child_device_config {
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 3abcb43..8e5e94c 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -434,6 +434,7 @@ static void intel_prepare_ddi_buffers(struct drm_device
*dev, enum port port,
{
struct drm_i915_private *dev_priv = dev->dev_private;
u32 reg;
+ u32 iboost_bit = 0;
int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
size;
int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
@@ -459,6 +460,10 @@ static void intel_prepare_ddi_buffers(struct drm_device
*dev, enum port port,
ddi_translations_hdmi =
skl_get_buf_trans_hdmi(dev, &n_hdmi_entries);
hdmi_default_entry = 8;
+ /* If we're boosting the current, set bit 31 of trans1 */
+ if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
+ dev_priv->vbt.ddi_port_info[port].dp_boost_level)
+ iboost_bit = 1<<31;
} else if (IS_BROADWELL(dev)) {
ddi_translations_fdi = bdw_ddi_translations_fdi;
[Intel-gfx] [PATCH v2] drm/i915: Per-DDI I_boost override
An OEM may request increased I_boost beyond the recommended values
by specifying an I_boost value to be applied to all swing entries for
a port. These override values are specified in VBT.
v2: rebase and remove unused iboost_bit variable
Issue: VIZ-5676
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/intel_bios.c | 21 +
drivers/gpu/drm/i915/intel_bios.h | 9 +
drivers/gpu/drm/i915/intel_ddi.c | 38 ++
4 files changed, 63 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1dbd957..6aa8083 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1410,6 +1410,9 @@ struct ddi_vbt_port_info {
uint8_t supports_dvi:1;
uint8_t supports_hdmi:1;
uint8_t supports_dp:1;
+
+ uint8_t dp_boost_level;
+ uint8_t hdmi_boost_level;
};
enum psr_lines_to_wait {
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 2ff9eb0..76e12f5 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -886,6 +886,17 @@ err:
memset(dev_priv->vbt.dsi.sequence, 0,
sizeof(dev_priv->vbt.dsi.sequence));
}
+static u8 translate_iboost(u8 val)
+{
+ static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
+
+ if (val >= ARRAY_SIZE(mapping)) {
+ DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d),
display may not work properly\n", val);
+ return 0;
+ }
+ return mapping[val];
+}
+
static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
const struct bdb_header *bdb)
{
@@ -986,6 +997,16 @@ static void parse_ddi_port(struct drm_i915_private
*dev_priv, enum port port,
hdmi_level_shift);
info->hdmi_level_shift = hdmi_level_shift;
}
+
+ /* Parse the I_boost config for SKL and above */
+ if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
+ info->dp_boost_level =
translate_iboost(child->common.iboost_level & 0xF);
+ DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
+ port_name(port), info->dp_boost_level);
+ info->hdmi_boost_level =
translate_iboost(child->common.iboost_level >> 4);
+ DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
+ port_name(port), info->hdmi_boost_level);
+ }
}
static void parse_ddi_ports(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_bios.h
b/drivers/gpu/drm/i915/intel_bios.h
index af0b476..8edd75c 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -231,6 +231,10 @@ struct old_child_dev_config {
/* This one contains field offsets that are known to be common for all BDB
* versions. Notice that the meaning of the contents contents may still change,
* but at least the offsets are consistent. */
+
+/* Definitions for flags_1 */
+#define IBOOST_ENABLE (1<<3)
+
struct common_child_dev_config {
u16 handle;
u16 device_type;
@@ -239,8 +243,13 @@ struct common_child_dev_config {
u8 not_common2[2];
u8 ddc_pin;
u16 edid_ptr;
+ u8 obsolete;
+ u8 flags_1;
+ u8 not_common3[13];
+ u8 iboost_level;
} __packed;
+
/* This field changes depending on the BDB version, so the most reliable way to
* read it is by checking the BDB version and reading the raw pointer. */
union child_device_config {
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 15fc66a..c83f15f 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -440,6 +440,7 @@ static void intel_prepare_ddi_buffers(struct drm_device
*dev, enum port port,
{
struct drm_i915_private *dev_priv = dev->dev_private;
u32 reg;
+ u32 iboost_bit = 0;
int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
size;
int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
@@ -465,6 +466,10 @@ static void intel_prepare_ddi_buffers(struct drm_device
*dev, enum port port,
ddi_translations_hdmi =
skl_get_buf_trans_hdmi(dev, &n_hdmi_entries);
hdmi_default_entry = 8;
+ /* If we're boosting the current, set bit 31 of trans1 */
+ if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
+ dev_priv->vbt.ddi_port_info[port].dp_boost_level)
+ iboost_bit = 1<<31;
} else if (IS_BROADWELL(dev)) {
ddi_
[Intel-gfx] [PATCH i-g-t 3/3] gem_memory_bandwidth: Add test
This is a benchmark for testing the GPU read and write bandwidth.
Issue: VIZ-5664
Signed-off-by: Antti Koskipaa
---
tests/.gitignore | 1 +
tests/Makefile.sources | 1 +
tests/gem_memory_bandwidth.c | 209 +++
3 files changed, 211 insertions(+)
create mode 100644 tests/gem_memory_bandwidth.c
diff --git a/tests/.gitignore b/tests/.gitignore
index dc8bb53..2ea4107 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -65,6 +65,7 @@ gem_linear_blits
gem_lut_handle
gem_madvise
gem_media_fill
+gem_memory_bandwidth
gem_mmap
gem_mmap_gtt
gem_mmap_offset_exhaustion
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 2e2e088..4429c29 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -36,6 +36,7 @@ TESTS_progs_M = \
gem_flink_race \
gem_linear_blits \
gem_madvise \
+ gem_memory_bandwidth \
gem_mmap \
gem_mmap_gtt \
gem_mmap_wc \
diff --git a/tests/gem_memory_bandwidth.c b/tests/gem_memory_bandwidth.c
new file mode 100644
index 000..a44987e
--- /dev/null
+++ b/tests/gem_memory_bandwidth.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright © 2013-2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Antti Koskip��
+ *Damien Lespiau
+ */
+
+/*
+ * We need a way to test memory bandwidth bottlenecks and understand better
+ * where they are. This test bypasses Mesa and uses the kernel GEM interface
+ * directly.
+ *
+ * Say there is a performance regression. Where is it, Mesa or kernel? Just
+ * compare the results of this test to the Mesa bandwidth results. If they are
+ * similar, the problem is in the kernel. If Mesa is much slower than this
test,
+ * the problem is in Mesa.
+ */
+
+#include "igt.h"
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "intel_bufmgr.h"
+
+IGT_TEST_DESCRIPTION("GPU memory bandwidth benchmark.");
+
+/* Each test block is 1 meg. */
+#define WIDTH 512
+#define STRIDE (WIDTH*4)
+#define HEIGHT 512
+#define SIZE (HEIGHT*STRIDE)
+/* Run this many times. 10240 = 10 gigabytes are copied. 1024 was too small,
+ * giving too much variance. */
+#define LOOPS 10240
+/* How many buffers to allocate for main memory speed testing.
+ * Must be large enough to thrash the caches.
+ */
+#define NBUFS 512
+
+#define SRC_COLOR 0x00ff
+#define DST_COLOR 0xfff0ff00
+
+typedef struct {
+ int fd;
+ uint32_t devid;
+ drm_intel_bufmgr *bufmgr;
+ struct intel_batchbuffer *batch;
+ igt_render_copyfunc_t render_copy;
+ igt_render_copyfunc_t render_read;
+ igt_render_copyfunc_t render_write;
+ uint32_t linear[WIDTH * HEIGHT];
+} data_t;
+
+static void data_init(data_t *data)
+{
+ data->fd = drm_open_driver(DRIVER_INTEL);
+ data->devid = intel_get_drm_devid(data->fd);
+
+ data->bufmgr = drm_intel_bufmgr_gem_init(data->fd, 4096);
+ igt_assert(data->bufmgr);
+
+ data->render_copy = igt_get_render_copyfunc(data->devid);
+ igt_require_f(data->render_copy,
+ "no render-copy function\n");
+ data->render_write = igt_get_render_writefunc(data->devid);
+ igt_require_f(data->render_write,
+ "no render-write function\n");
+ data->render_read = igt_get_render_readfunc(data->devid);
+ igt_require_f(data->render_read,
+ "no render-read function\n");
+
+ data->batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
+ igt_assert(data->batch);
+
+ for (int i = 0; i < WIDTH * HEIGHT; i++)
+ data->linear[i] = i;
+
+}
+
+static void
[Intel-gfx] [PATCH i-g-t 1/3] gem_render_copy: Make render_copyfunc more generic
This will allow adding more tests that use this function without excessive
copying and pasting.
Signed-off-by: Antti Koskipaa
---
lib/rendercopy_gen8.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index a7fc2c4..4a9a283 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -49,7 +49,7 @@ struct {
} viewport;
/* see shaders/ps/blit.g7a */
-static const uint32_t ps_kernel[][4] = {
+static const uint32_t ps_kernel_copy[][4] = {
#if 1
{ 0x0060005a, 0x21403ae8, 0x3ac0, 0x008d0040 },
{ 0x0060005a, 0x21603ae8, 0x3ac0, 0x008d0080 },
@@ -920,11 +920,12 @@ static void gen8_emit_primitive(struct intel_batchbuffer
*batch, uint32_t offset
#define BATCH_STATE_SPLIT 2048
-void gen8_render_copyfunc(struct intel_batchbuffer *batch,
+static void _gen8_render_func(struct intel_batchbuffer *batch,
drm_intel_context *context,
struct igt_buf *src, unsigned src_x, unsigned src_y,
unsigned width, unsigned height,
- struct igt_buf *dst, unsigned dst_x, unsigned dst_y)
+ struct igt_buf *dst, unsigned dst_x, unsigned dst_y,
+ const uint32_t ps_kernel[][4], int kernel_size)
{
struct annotations_context aub_annotations;
uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table;
@@ -944,7 +945,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
src, dst);
ps_sampler_state = gen8_create_sampler(batch, &aub_annotations);
ps_kernel_off = gen8_fill_ps(batch, &aub_annotations,
-ps_kernel, sizeof(ps_kernel));
+ps_kernel, kernel_size);
vertex_buffer = gen7_fill_vertex_buffer_data(batch, &aub_annotations,
src,
src_x, src_y,
@@ -1030,3 +1031,13 @@ void gen8_render_copyfunc(struct intel_batchbuffer
*batch,
gen6_render_flush(batch, context, batch_end);
intel_batchbuffer_reset(batch);
}
+
+void gen8_render_copyfunc(struct intel_batchbuffer *batch,
+drm_intel_context *context,
+struct igt_buf *src, unsigned src_x, unsigned
src_y,
+unsigned width, unsigned height,
+struct igt_buf *dst, unsigned dst_x, unsigned
dst_y)
+{
+ _gen8_render_func(batch, context, src, src_x, src_y, width, height,
+ dst, dst_x, dst_y, ps_kernel_copy,
sizeof(ps_kernel_copy));
+}
--
2.3.6
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 0/3] Memory bandwidth tester
This is a memory bandwidth tester based on the existing rendercopy tests
in IGT. Its purpose is to find regressions in the kernel driver and to figure
out where a bottleneck is. This test bypasses Mesa and goes directly to the
kernel.
Say there is a performance regression. Where is it, Mesa or kernel? Just
compare the results of this test to the Mesa bandwidth results. If they are
similar, the problem is in the kernel. If Mesa is much slower than this test,
the problem is in Mesa.
Equivalent GLSL for the 'write' shader:
void main() {
gl_FragColor = vec4(1.0, 0.99, 0.5, 0.1);
}
Equivalend GLSL for the 'read' shader:
void main() {
gl_FragColor = texture2D(sourcebuf, gl_TexCoord);
discard;
}
I'm not too sure about my understanding of the shaders, especially the
one that does the discard operation (ps_kernel_read). Supposedly you
just need to set the output masks to 0 in the header of the final 'send'
and set some bits in 3DSTATE_PS_EXTRA. Halt instructions not needed since
I'm not doing any complicated flow control.
Someone more knowledgeable may want to review those shaders very closely.
Coming up soon: alpha blending versions of the copy and write tests.
Antti Koskipaa (3):
gem_render_copy: Make render_copyfunc more generic
gem_render_copy: Add functions for performance testing
gem_memory_bandwidth: Add test
lib/gen8_render.h| 3 +
lib/intel_batchbuffer.c | 40 +
lib/intel_batchbuffer.h | 2 +
lib/rendercopy.h | 12 +++
lib/rendercopy_gen8.c| 68 --
shaders/ps/discard.g7a | 73 +++
shaders/ps/fill.g7a | 6 ++
tests/.gitignore | 1 +
tests/Makefile.sources | 1 +
tests/gem_memory_bandwidth.c | 209 +++
10 files changed, 408 insertions(+), 7 deletions(-)
create mode 100644 shaders/ps/discard.g7a
create mode 100644 shaders/ps/fill.g7a
create mode 100644 tests/gem_memory_bandwidth.c
--
2.3.6
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 2/3] gem_render_copy: Add functions for performance testing
gen8_render_writefunc does only constant writes to the
framebuffer, no texture reads. Used for testing write bandwidth.
gen8_render_readfunc does only reads from the sampler and
discards the result. Used for testing sampler read bandwidth.
Alpha blend tests and support for more Gens still to come.
Signed-off-by: Antti Koskipaa
---
lib/gen8_render.h | 3 ++
lib/intel_batchbuffer.c | 40 +++
lib/intel_batchbuffer.h | 2 ++
lib/rendercopy.h| 12
lib/rendercopy_gen8.c | 53 +++
shaders/ps/discard.g7a | 73 +
shaders/ps/fill.g7a | 6
7 files changed, 184 insertions(+), 5 deletions(-)
create mode 100644 shaders/ps/discard.g7a
create mode 100644 shaders/ps/fill.g7a
diff --git a/lib/gen8_render.h b/lib/gen8_render.h
index ba3f9f2..610a457 100644
--- a/lib/gen8_render.h
+++ b/lib/gen8_render.h
@@ -60,6 +60,9 @@
#define GEN8_3DSTATE_WM_DEPTH_STENCIL GEN6_3D(3, 0, 0x4e)
#define GEN8_3DSTATE_PS_EXTRA GEN6_3D(3,0, 0x4f)
# define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31)
+# define GEN8_PSX_DONT_WRITE_RT(1 << 30)
+# define GEN8_PSX_OMASK_PRESENT(1 << 29)
+# define GEN8_PSX_KILLS_PIXEL (1 << 28)
# define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8)
#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CCGEN6_3D(3, 0, 0x23)
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 692521f..e3cf622 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -748,6 +748,46 @@ igt_render_copyfunc_t igt_get_render_copyfunc(int devid)
}
/**
+ * igt_get_render_writefunc:
+ * @devid: pci device id
+ *
+ * Returns:
+ *
+ * The platform-specific render write function pointer for the device
+ * specified with @devid. Will return NULL when no render copy function is
+ * implemented.
+ */
+igt_render_copyfunc_t igt_get_render_writefunc(int devid)
+{
+ igt_render_copyfunc_t copy = NULL;
+
+ if (IS_GEN8(devid))
+ copy = gen8_render_writefunc;
+
+ return copy;
+}
+
+/**
+ * igt_get_render_readfunc:
+ * @devid: pci device id
+ *
+ * Returns:
+ *
+ * The platform-specific render read function pointer for the device
+ * specified with @devid. Will return NULL when no render copy function is
+ * implemented.
+ */
+igt_render_copyfunc_t igt_get_render_readfunc(int devid)
+{
+ igt_render_copyfunc_t copy = NULL;
+
+ if (IS_GEN8(devid))
+ copy = gen8_render_readfunc;
+
+ return copy;
+}
+
+/**
* igt_get_media_fillfunc:
* @devid: pci device id
*
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 869747d..7d8f990 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -274,6 +274,8 @@ typedef void (*igt_render_copyfunc_t)(struct
intel_batchbuffer *batch,
struct igt_buf *dst, unsigned dst_x,
unsigned dst_y);
igt_render_copyfunc_t igt_get_render_copyfunc(int devid);
+igt_render_copyfunc_t igt_get_render_writefunc(int devid);
+igt_render_copyfunc_t igt_get_render_readfunc(int devid);
/**
* igt_fillfunc_t:
diff --git a/lib/rendercopy.h b/lib/rendercopy.h
index fdc3cab..f4ec74b 100644
--- a/lib/rendercopy.h
+++ b/lib/rendercopy.h
@@ -53,3 +53,15 @@ void gen2_render_copyfunc(struct intel_batchbuffer *batch,
struct igt_buf *src, unsigned src_x, unsigned src_y,
unsigned width, unsigned height,
struct igt_buf *dst, unsigned dst_x, unsigned dst_y);
+
+void gen8_render_writefunc(struct intel_batchbuffer *batch,
+ drm_intel_context *context,
+ struct igt_buf *src, unsigned src_x, unsigned src_y,
+ unsigned width, unsigned height,
+ struct igt_buf *dst, unsigned dst_x, unsigned dst_y);
+
+void gen8_render_readfunc(struct intel_batchbuffer *batch,
+ drm_intel_context *context,
+ struct igt_buf *src, unsigned src_x, unsigned src_y,
+ unsigned width, unsigned height,
+ struct igt_buf *dst, unsigned dst_x, unsigned dst_y);
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 4a9a283..b243ed7 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -71,6 +71,28 @@ static const uint32_t ps_kernel_copy[][4] = {
#endif
};
+/* see shaders/ps/discard.g7a */
+static const uint32_t ps_kernel_read[][4] = {
+ { 0x0060005a, 0x21403ae8, 0x3ac0, 0x008d0040 },
+ { 0x0060005a, 0x21603ae8, 0x3ac0, 0x008d0080 },
+ { 0x0060005a, 0x21803ae8, 0x3ad0, 0x008d0040 },
+ { 0x0060005a, 0x21a03ae8, 0x3ad0, 0x008d0080 },
+ { 0x02800031, 0x2e4022e8, 0x0e000140, 0x08840001 }
[Intel-gfx] [PATCH i-g-t] tests/pm_backlight: Add backlight test
This is a basic sanity test of the backlight sysfs interface.
Issue: VIZ-3377
Signed-off-by: Antti Koskipaa
---
tests/.gitignore | 1 +
tests/Makefile.sources | 1 +
tests/pm_backlight.c | 144 +
3 files changed, 146 insertions(+)
create mode 100644 tests/pm_backlight.c
diff --git a/tests/.gitignore b/tests/.gitignore
index a3f3143..f816ded 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -150,6 +150,7 @@ kms_vblank
kms_crtc_background_color
kms_plane_scaling
kms_panel_fitting
+pm_backlight
pm_lpsp
pm_rc6_residency
pm_rpm
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 994c31b..d2a44e8 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -80,6 +80,7 @@ TESTS_progs_M = \
kms_crtc_background_color \
kms_plane_scaling \
kms_panel_fitting \
+ pm_backlight \
pm_lpsp \
pm_rpm \
pm_rps \
diff --git a/tests/pm_backlight.c b/tests/pm_backlight.c
new file mode 100644
index 000..eb2dcf5
--- /dev/null
+++ b/tests/pm_backlight.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Author:
+ *Antti Koskipaa
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "igt_core.h"
+
+#define TOLERANCE 5 /* percent */
+#define BACKLIGHT_PATH "/sys/class/backlight/intel_backlight"
+
+IGT_TEST_DESCRIPTION("Basic backlight sysfs test");
+
+static int backlight_read(int *result, const char *fname)
+{
+ int fd;
+ char full[PATH_MAX];
+ char dst[64];
+ int r, e;
+
+ igt_assert(snprintf(full, PATH_MAX, "%s/%s", BACKLIGHT_PATH, fname) <
PATH_MAX);
+
+ fd = open(full, O_RDONLY);
+ if (fd == -1)
+ return -errno;
+
+ r = read(fd, dst, sizeof(dst));
+ e = errno;
+ close(fd);
+
+ if (r < 0)
+ return -e;
+
+ errno = 0;
+ *result = strtol(dst, NULL, 10);
+ return errno;
+}
+
+static int backlight_write(int value, const char *fname)
+{
+ int fd;
+ char full[PATH_MAX];
+ char src[64];
+ int len;
+
+ igt_assert(snprintf(full, PATH_MAX, "%s/%s", BACKLIGHT_PATH, fname) <
PATH_MAX);
+ fd = open(full, O_WRONLY);
+ if (fd == -1)
+ return -errno;
+
+ len = snprintf(src, sizeof(src), "%i", value);
+ len = write(fd, src, len);
+ close(fd);
+
+ if (len < 0)
+ return len;
+
+ return 0;
+}
+
+static void test_and_verify(int val, int max)
+{
+ int result;
+ igt_assert(backlight_write(val, "brightness") == 0);
+ igt_assert(backlight_read(&result, "actual_brightness") == 0);
+ /* Some rounding may happen depending on hw. Just check that it's close
enough. */
+ igt_assert(result <= val + val * TOLERANCE / 100 && result >= val - val
* TOLERANCE / 100);
+}
+
+static void test_brightness(int max)
+{
+ test_and_verify(0, max);
+ test_and_verify(max, max);
+ test_and_verify(max / 2, max);
+}
+
+static void test_bad_brightness(int max)
+{
+ int val;
+ /* First write some sane value */
+ backlight_write(max / 2, "brightness");
+ /* Writing invalid values should fail and not change the value */
+ igt_assert(backlight_write(-1, "brightness") < 0);
+ backlight_read(&val, "brightness");
+ igt_assert(val == max / 2);
+ igt_assert(backlight_write(max + 1, "brightness") < 0);
+ backlight_read(&val, "brightness");
+ igt_assert(val == max / 2);
+ igt_assert(backlight_write(INT_MAX, "brightness") < 0)
[Intel-gfx] [PATCH i-g-t v2] tests/pm_backlight: Add backlight test
This is a basic sanity test of the backlight sysfs interface.
v2:
- Add jani's suggestion for immediate readback
- Remove unused parameter from test_and_verify()
- Add fade test
Issue: VIZ-3377
Signed-off-by: Antti Koskipaa
---
tests/.gitignore | 1 +
tests/Makefile.sources | 1 +
tests/pm_backlight.c | 171 +
3 files changed, 173 insertions(+)
create mode 100644 tests/pm_backlight.c
diff --git a/tests/.gitignore b/tests/.gitignore
index a3f3143..f816ded 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -150,6 +150,7 @@ kms_vblank
kms_crtc_background_color
kms_plane_scaling
kms_panel_fitting
+pm_backlight
pm_lpsp
pm_rc6_residency
pm_rpm
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 994c31b..d2a44e8 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -80,6 +80,7 @@ TESTS_progs_M = \
kms_crtc_background_color \
kms_plane_scaling \
kms_panel_fitting \
+ pm_backlight \
pm_lpsp \
pm_rpm \
pm_rps \
diff --git a/tests/pm_backlight.c b/tests/pm_backlight.c
new file mode 100644
index 000..d02336d
--- /dev/null
+++ b/tests/pm_backlight.c
@@ -0,0 +1,171 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Author:
+ *Antti Koskipaa
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "igt_core.h"
+
+#define TOLERANCE 5 /* percent */
+#define BACKLIGHT_PATH "/sys/class/backlight/intel_backlight"
+
+#define FADESTEPS 10
+#define FADESPEED 100 /* milliseconds between steps */
+
+IGT_TEST_DESCRIPTION("Basic backlight sysfs test");
+
+static int backlight_read(int *result, const char *fname)
+{
+ int fd;
+ char full[PATH_MAX];
+ char dst[64];
+ int r, e;
+
+ igt_assert(snprintf(full, PATH_MAX, "%s/%s", BACKLIGHT_PATH, fname) <
PATH_MAX);
+
+ fd = open(full, O_RDONLY);
+ if (fd == -1)
+ return -errno;
+
+ r = read(fd, dst, sizeof(dst));
+ e = errno;
+ close(fd);
+
+ if (r < 0)
+ return -e;
+
+ errno = 0;
+ *result = strtol(dst, NULL, 10);
+ return errno;
+}
+
+static int backlight_write(int value, const char *fname)
+{
+ int fd;
+ char full[PATH_MAX];
+ char src[64];
+ int len;
+
+ igt_assert(snprintf(full, PATH_MAX, "%s/%s", BACKLIGHT_PATH, fname) <
PATH_MAX);
+ fd = open(full, O_WRONLY);
+ if (fd == -1)
+ return -errno;
+
+ len = snprintf(src, sizeof(src), "%i", value);
+ len = write(fd, src, len);
+ close(fd);
+
+ if (len < 0)
+ return len;
+
+ return 0;
+}
+
+static void test_and_verify(int val)
+{
+ int result;
+
+ igt_assert(backlight_write(val, "brightness") == 0);
+ igt_assert(backlight_read(&result, "brightness") == 0);
+ /* Check that the exact value sticks */
+ igt_assert(result == val);
+
+ igt_assert(backlight_read(&result, "actual_brightness") == 0);
+ /* Some rounding may happen depending on hw. Just check that it's close
enough. */
+ igt_assert(result <= val + val * TOLERANCE / 100 && result >= val - val
* TOLERANCE / 100);
+}
+
+static void test_brightness(int max)
+{
+ test_and_verify(0);
+ test_and_verify(max);
+ test_and_verify(max / 2);
+}
+
+static void test_bad_brightness(int max)
+{
+ int val;
+ /* First write some sane value */
+ backlight_write(max / 2, "brightness");
+ /* Writing invalid values should fail and not change the value */
+ igt_assert(backlight_write(-
[Intel-gfx] [PATCH 0/2] VBT and I_boost fixes
These are required for SKL PV. I tested these on SNB and SKL. Antti Koskipaa (2): drm/i915: Allow parsing of variable size child device entries from VBT drm/i915: Per-DDI I_boost override drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/intel_bios.c | 30 -- drivers/gpu/drm/i915/intel_bios.h | 9 + drivers/gpu/drm/i915/intel_ddi.c | 38 ++ 4 files changed, 70 insertions(+), 10 deletions(-) -- 2.3.6 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915: Per-DDI I_boost override
An OEM may request increased I_boost beyond the recommended values
by specifying an I_boost value to be applied to all swing entries for
a port. These override values are specified in VBT.
v2: rebase and remove unused iboost_bit variable
Issue: VIZ-5676
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/intel_bios.c | 21 +
drivers/gpu/drm/i915/intel_bios.h | 9 +
drivers/gpu/drm/i915/intel_ddi.c | 38 ++
4 files changed, 63 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 768d1db..9a22a4d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1420,6 +1420,9 @@ struct ddi_vbt_port_info {
uint8_t supports_dvi:1;
uint8_t supports_hdmi:1;
uint8_t supports_dp:1;
+
+ uint8_t dp_boost_level;
+ uint8_t hdmi_boost_level;
};
enum psr_lines_to_wait {
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 763a636..e9ced16 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -886,6 +886,17 @@ err:
memset(dev_priv->vbt.dsi.sequence, 0,
sizeof(dev_priv->vbt.dsi.sequence));
}
+static u8 translate_iboost(u8 val)
+{
+ static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
+
+ if (val >= ARRAY_SIZE(mapping)) {
+ DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d),
display may not work properly\n", val);
+ return 0;
+ }
+ return mapping[val];
+}
+
static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
const struct bdb_header *bdb)
{
@@ -986,6 +997,16 @@ static void parse_ddi_port(struct drm_i915_private
*dev_priv, enum port port,
hdmi_level_shift);
info->hdmi_level_shift = hdmi_level_shift;
}
+
+ /* Parse the I_boost config for SKL and above */
+ if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
+ info->dp_boost_level =
translate_iboost(child->common.iboost_level & 0xF);
+ DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
+ port_name(port), info->dp_boost_level);
+ info->hdmi_boost_level =
translate_iboost(child->common.iboost_level >> 4);
+ DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
+ port_name(port), info->hdmi_boost_level);
+ }
}
static void parse_ddi_ports(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_bios.h
b/drivers/gpu/drm/i915/intel_bios.h
index af0b476..8edd75c 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -231,6 +231,10 @@ struct old_child_dev_config {
/* This one contains field offsets that are known to be common for all BDB
* versions. Notice that the meaning of the contents contents may still change,
* but at least the offsets are consistent. */
+
+/* Definitions for flags_1 */
+#define IBOOST_ENABLE (1<<3)
+
struct common_child_dev_config {
u16 handle;
u16 device_type;
@@ -239,8 +243,13 @@ struct common_child_dev_config {
u8 not_common2[2];
u8 ddc_pin;
u16 edid_ptr;
+ u8 obsolete;
+ u8 flags_1;
+ u8 not_common3[13];
+ u8 iboost_level;
} __packed;
+
/* This field changes depending on the BDB version, so the most reliable way to
* read it is by checking the BDB version and reading the raw pointer. */
union child_device_config {
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 9a40bfb..0446084 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -440,6 +440,7 @@ static void intel_prepare_ddi_buffers(struct drm_device
*dev, enum port port,
{
struct drm_i915_private *dev_priv = dev->dev_private;
u32 reg;
+ u32 iboost_bit = 0;
int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
size;
int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
@@ -466,6 +467,10 @@ static void intel_prepare_ddi_buffers(struct drm_device
*dev, enum port port,
ddi_translations_hdmi =
skl_get_buf_trans_hdmi(dev, &n_hdmi_entries);
hdmi_default_entry = 8;
+ /* If we're boosting the current, set bit 31 of trans1 */
+ if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
+ dev_priv->vbt.ddi_port_info[port].dp_boost_level)
+ iboost_bit = 1<<31;
} else if (IS_BROADWELL(dev)) {
ddi_
[Intel-gfx] [PATCH 1/2] drm/i915: Allow parsing of variable size child device entries from VBT
VBT version 196 increased the size of common_child_dev_config. The parser
code assumed that the size of this structure would not change.
So now, instead of checking for smaller size, check that the VBT entry is
not too large and memcpy only child_dev_size amount of data, leaving any
trailing entries as zero. If this is not good enough for the future,
we can always sprinkle extra version checks in there.
Signed-off-by: Antti Koskipaa
---
drivers/gpu/drm/i915/intel_bios.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 2ff9eb0..763a636 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1022,10 +1022,15 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("No general definition block is found, no devices
defined.\n");
return;
}
- if (p_defs->child_dev_size < sizeof(*p_child)) {
+ /* Historically, child_dev_size has to be at least 33 bytes in size. */
+ if (p_defs->child_dev_size < 33) {
DRM_ERROR("General definiton block child device size is too
small.\n");
return;
}
+ if (p_defs->child_dev_size > sizeof(*p_child)) {
+ DRM_ERROR("General definiton block child device size is too
large.\n");
+ return;
+ }
/* get the block size of general definitions */
block_size = get_blocksize(p_defs);
/* get the number of child device */
@@ -1070,7 +1075,7 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
child_dev_ptr = dev_priv->vbt.child_dev + count;
count++;
- memcpy(child_dev_ptr, p_child, sizeof(*p_child));
+ memcpy(child_dev_ptr, p_child, p_defs->child_dev_size);
}
return;
}
--
2.3.6
___
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