[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: Communicate display power demands to pcode (rev5)
== Series Details == Series: drm/i915/display: Communicate display power demands to pcode (rev5) URL : https://patchwork.freedesktop.org/series/115371/ State : warning == Summary == Error: dim checkpatch failed 0be68d0cac99 drm/i915/display: Communicate display power demands to pcode -:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #9: Adding new sequence with current cdclk associate with voltage value masking. -:281: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #281: FILE: drivers/gpu/drm/i915/i915_reg.h:5357: +#define DISPLAY_TO_PCODE_PIPE_COUNT(x) REG_FIELD_PREP(DISPLAY_TO_PCODE_PIPE_COUNT_MASK, (x)) total: 0 errors, 2 warnings, 0 checks, 244 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Communicate display power demands to pcode (rev5)
== Series Details ==
Series: drm/i915/display: Communicate display power demands to pcode (rev5)
URL : https://patchwork.freedesktop.org/series/115371/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13078 -> Patchwork_115371v5
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/index.html
Participating hosts (38 -> 37)
--
Additional (1): fi-kbl-soraka
Missing(2): bat-dg2-9 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_115371v5 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3
similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][3] ([i915#5334] / [i915#7872])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_lrc:
- bat-adln-1: [PASS][4] -> [INCOMPLETE][5] ([i915#4983] /
[i915#7609])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][6] ([i915#1886] / [i915#7913])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271]) +16 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-rpls-1: NOTRUN -> [SKIP][8] ([i915#7828])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-rpls-1/igt@kms_chamelium_...@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [PASS][9] -> [FAIL][10] ([i915#7932])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-rpls-1: NOTRUN -> [SKIP][11] ([i915#1845])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-rpls-1/igt@kms_pipe_crc_ba...@suspend-read-crc.html
Possible fixes
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: [ABORT][12] ([i915#6687] / [i915#7978] / [i915#8407])
-> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@migrate:
- bat-atsm-1: [DMESG-FAIL][14] ([i915#7699] / [i915#7913]) ->
[PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-atsm-1/igt@i915_selftest@l...@migrate.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-atsm-1/igt@i915_selftest@l...@migrate.html
* igt@i915_selftest@live@requests:
- {bat-mtlp-8}: [ABORT][16] ([i915#4983] / [i915#7920]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/bat-mtlp-8/igt@i915_selftest@l...@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issue
Re: [Intel-gfx] [PATCH 1/2] drm/dsc: fix drm_edp_dsc_sink_output_bpp() DPCD high byte usage
On Thu, 20 Apr 2023, "Nautiyal, Ankit K" wrote:
> LGTM.
>
> Reviewed-by: Ankit Nautiyal
Thanks for the reviews, pushed these a week+ ago.
BR,
Jani.
>
> On 4/6/2023 7:16 PM, Jani Nikula wrote:
>> The operator precedence between << and & is wrong, leading to the high
>> byte being completely ignored. For example, with the 6.4 format, 32
>> becomes 0 and 24 becomes 8. Fix it, and remove the slightly confusing
>> and unnecessary DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT macro while at it.
>>
>> Fixes: 0575650077ea ("drm/dp: DRM DP helper/macros to get DP sink DSC
>> parameters")
>> Cc: Stanislav Lisovskiy
>> Cc: Manasi Navare
>> Cc: Anusha Srivatsa
>> Cc: # v5.0+
>> Signed-off-by: Jani Nikula
>> ---
>> include/drm/display/drm_dp.h| 1 -
>> include/drm/display/drm_dp_helper.h | 5 ++---
>> 2 files changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
>> index 358db4a9f167..89d5a700b04d 100644
>> --- a/include/drm/display/drm_dp.h
>> +++ b/include/drm/display/drm_dp.h
>> @@ -286,7 +286,6 @@
>>
>> #define DP_DSC_MAX_BITS_PER_PIXEL_HI0x068 /* eDP 1.4 */
>> # define DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK (0x3 << 0)
>> -# define DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT 8
>> # define DP_DSC_MAX_BPP_DELTA_VERSION_MASK 0x06
>> # define DP_DSC_MAX_BPP_DELTA_AVAILABILITY 0x08
>>
>> diff --git a/include/drm/display/drm_dp_helper.h
>> b/include/drm/display/drm_dp_helper.h
>> index 533d3ee7fe05..86f24a759268 100644
>> --- a/include/drm/display/drm_dp_helper.h
>> +++ b/include/drm/display/drm_dp_helper.h
>> @@ -181,9 +181,8 @@ static inline u16
>> drm_edp_dsc_sink_output_bpp(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
>> {
>> return dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] |
>> -(dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] &
>> - DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK <<
>> - DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT);
>> +((dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] &
>> + DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK) << 8);
>> }
>>
>> static inline u32
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [PATCH] drm/i915/hdcp: Check if media_gt exists
Check if media_gt exits if we are using gsc cs Cc: Ankit Nautiyal Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 650232c4892b..f3956eca4ec4 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -214,7 +214,7 @@ bool intel_hdcp2_capable(struct intel_connector *connector) /* If MTL+ make sure gsc is loaded and proxy is setup */ if (intel_hdcp_gsc_cs_required(dev_priv)) - if (!intel_uc_fw_is_running(&gsc->fw)) + if (!gt || !intel_uc_fw_is_running(&gsc->fw)) return false; /* MEI/GSC interface is solid depending on which is used */ -- 2.25.1
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Communicate display power demands to pcode (rev5)
== Series Details ==
Series: drm/i915/display: Communicate display power demands to pcode (rev5)
URL : https://patchwork.freedesktop.org/series/115371/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13078_full -> Patchwork_115371v5_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (8 -> 7)
--
Missing(1): shard-rkl0
Known issues
Here are the changes found in Patchwork_115371v5_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [PASS][1] -> [FAIL][2] ([i915#2842])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl2/igt@gem_exec_fair@basic-pace-s...@rcs0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-apl1/igt@gem_exec_fair@basic-pace-s...@rcs0.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [PASS][3] -> [DMESG-FAIL][4] ([i915#5334])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl4/igt@i915_selftest@live@gt_heartbeat.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-apl6/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [PASS][5] -> [FAIL][6] ([i915#2346])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl1/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-apl4/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271]) +6 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-snb4/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0...@pipe-a-vga-1.html
Possible fixes
* igt@gem_barrier_race@remote-request@rcs0:
- {shard-rkl}:[ABORT][8] ([i915#7461] / [i915#8211]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-7/igt@gem_barrier_race@remote-requ...@rcs0.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-rkl-4/igt@gem_barrier_race@remote-requ...@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][10] ([i915#2842]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl2/igt@gem_exec_fair@basic-none-s...@rcs0.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-apl6/igt@gem_exec_fair@basic-none-s...@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- {shard-rkl}:[FAIL][12] ([i915#2842]) -> [PASS][13] +1 similar
issue
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-4/igt@gem_exec_fair@basic-n...@vecs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-rkl-3/igt@gem_exec_fair@basic-n...@vecs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][14] ([i915#2842]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-glk5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-glk9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_spin_batch@engines@rcs0:
- shard-apl: [FAIL][16] ([i915#2898]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl3/igt@gem_spin_batch@engi...@rcs0.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-apl7/igt@gem_spin_batch@engi...@rcs0.html
* igt@kms_cursor_legacy@single-bo@pipe-b:
- {shard-rkl}:[INCOMPLETE][18] ([i915#8011]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-7/igt@kms_cursor_legacy@single...@pipe-b.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-rkl-4/igt@kms_cursor_legacy@single...@pipe-b.html
* {igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2}:
- {shard-rkl}:[FAIL][20] ([i915#8292]) -> [PASS][21]
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-s...@pipe-a-hdmi-a-2.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115371v5/shard-rkl-4/igt@kms_plane_scaling@intel-max-src-s...@pipe-a-hdmi-a-2.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109315]: https://bugs.freedesktop.org/sh
Re: [Intel-gfx] [PATCH] drm/i915/rc6: throw out set() wrapper
On Fri, 21 Apr 2023, Matt Roper wrote:
> On Fri, Apr 21, 2023 at 04:59:48PM +0300, Jani Nikula wrote:
>> Remove useless indirection that's just misdirection for the readers.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Matt Roper
Thanks for the reviews, pushed to drm-intel-gt-next.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/gt/intel_rc6.c | 157 ++--
>> 1 file changed, 76 insertions(+), 81 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c
>> b/drivers/gpu/drm/i915/gt/intel_rc6.c
>> index 8f3cd68d14f8..908a3d0f2343 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
>> @@ -53,11 +53,6 @@ static struct drm_i915_private *rc6_to_i915(struct
>> intel_rc6 *rc)
>> return rc6_to_gt(rc)->i915;
>> }
>>
>> -static void set(struct intel_uncore *uncore, i915_reg_t reg, u32 val)
>> -{
>> -intel_uncore_write_fw(uncore, reg, val);
>> -}
>> -
>> static void gen11_rc6_enable(struct intel_rc6 *rc6)
>> {
>> struct intel_gt *gt = rc6_to_gt(rc6);
>> @@ -72,19 +67,19 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
>> */
>> if (!intel_uc_uses_guc_rc(>->uc)) {
>> /* 2b: Program RC6 thresholds.*/
>> -set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
>> -set(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
>> +intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 <<
>> 16 | 85);
>> +intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
>>
>> -set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 *
>> 1280ns */
>> -set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
>> +intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL,
>> 125000); /* 12500 * 1280ns */
>> +intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /*
>> 25 * 1280ns */
>> for_each_engine(engine, rc6_to_gt(rc6), id)
>> -set(uncore, RING_MAX_IDLE(engine->mmio_base), 10);
>> +intel_uncore_write_fw(uncore,
>> RING_MAX_IDLE(engine->mmio_base), 10);
>>
>> -set(uncore, GUC_MAX_IDLE_COUNT, 0xA);
>> +intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA);
>>
>> -set(uncore, GEN6_RC_SLEEP, 0);
>> +intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);
>>
>> -set(uncore, GEN6_RC6_THRESHOLD, 5); /* 50/125ms per EI */
>> +intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 5); /*
>> 50/125ms per EI */
>> }
>>
>> /*
>> @@ -105,8 +100,8 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
>> * Broadwell+, To be conservative, we want to factor in a context
>> * switch on top (due to ksoftirqd).
>> */
>> -set(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);
>> -set(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);
>> +intel_uncore_write_fw(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);
>> +intel_uncore_write_fw(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);
>>
>> /* 3a: Enable RC6
>> *
>> @@ -141,7 +136,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
>>VDN_MFX_POWERGATE_ENABLE(i));
>> }
>>
>> -set(uncore, GEN9_PG_ENABLE, pg_enable);
>> +intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, pg_enable);
>> }
>>
>> static void gen9_rc6_enable(struct intel_rc6 *rc6)
>> @@ -152,26 +147,26 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
>>
>> /* 2b: Program RC6 thresholds.*/
>> if (GRAPHICS_VER(rc6_to_i915(rc6)) >= 11) {
>> -set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
>> -set(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
>> +intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 <<
>> 16 | 85);
>> +intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
>> } else if (IS_SKYLAKE(rc6_to_i915(rc6))) {
>> /*
>> * WaRsDoubleRc6WrlWithCoarsePowerGating:skl Doubling WRL only
>> * when CPG is enabled
>> */
>> -set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);
>> +intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 108 <<
>> 16);
>> } else {
>> -set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);
>> +intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 <<
>> 16);
>> }
>>
>> -set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
>> -set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
>> +intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /*
>> 12500 * 1280ns */
>> +intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 *
>> 1280ns */
>> for_each_engine(engine, rc6_to_gt(rc6), id)
>> -set(uncore, RING_MAX_IDLE(engine->mmio_base), 10);
>> +intel_uncore_write_fw(uncore, RIN
Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: update the QGV point frequency calculations
On Fri, 28 Apr 2023, "Govindapillai, Vinod" wrote: > On Thu, 2023-04-27 at 18:04 +0300, Ville Syrjälä wrote: >> On Thu, Apr 27, 2023 at 06:00:10PM +0300, Vinod Govindapillai wrote: >> > > From MTL onwwards, pcode locks the QGV point based on peak BW of >> > the intended QGV point passed by the driver. So the peak BW >> > calculation must match the value expected by the pcode. Update >> > the calculations as per the Bspec. >> > >> > Bspec: 64636 >> > >> > Signed-off-by: Vinod Govindapillai >> > --- >> > drivers/gpu/drm/i915/display/intel_bw.c | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c >> > b/drivers/gpu/drm/i915/display/intel_bw.c >> > index ab405c48ca3a..25ae4e5834d3 100644 >> > --- a/drivers/gpu/drm/i915/display/intel_bw.c >> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c >> > @@ -182,7 +182,7 @@ static int mtl_read_qgv_point_info(struct >> > drm_i915_private *dev_priv, >> > val2 = intel_uncore_read(&dev_priv->uncore, >> > MTL_MEM_SS_INFO_QGV_POINT_HIGH(point)); >> > dclk = REG_FIELD_GET(MTL_DCLK_MASK, val); >> > - sp->dclk = DIV_ROUND_UP((16667 * dclk), 1000); >> > + sp->dclk = (16667 * dclk + 500) / 1000; >> >> Don't hand roll rounding. > > Hi Ville, > > I did not understand what you meant by this. > > This is as per the Bspec 64636. I am assuming, probably this is what pcode > expects to get it > compared with its internal reference qclk peak Bw. I will clarify with Art. > > And there is another requirement to get rid of div_round_up() of these BW > calculations. Will address > them separately. The point is, no matter whether you need to round up or down or nearest, you need to use the DIV_ROUND_* helpers for that, not duplicate the logic here. No matter what bspec says. BR, Jani. > > BR > Vinod >> >> > sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val); >> > sp->t_rcd = REG_FIELD_GET(MTL_TRCD_MASK, val); >> > >> > -- >> > 2.34.1 >> > -- Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH v3 7/8] drm/i915/mtl: Add support for PM DEMAND
On Thu, 27 Apr 2023, Vinod Govindapillai wrote:
> From: Mika Kahola
>
> Display14 introduces a new way to instruct the PUnit with
> power and bandwidth requirements of DE. Add the functionality
> to program the registers and handle waits using interrupts.
> The current wait time for timeouts is programmed for 10 msecs to
> factor in the worst case scenarios. Changes made to use REG_BIT
> for a register that we touched(GEN8_DE_MISC_IER _MMIO).
>
> Wa_14016740474 is added which applies to Xe_LPD+ display
>
> v2: checkpatch warning fixes, simplify program pmdemand part
>
> v3: update to dbufs and pipes values to pmdemand register(stan)
> Removed the macro usage in update_pmdemand_values()
>
> Bspec: 66451, 64636, 64602, 64603
> Cc: Matt Atwood
> Cc: Matt Roper
> Cc: Lucas De Marchi
> Cc: Gustavo Sousa
> Signed-off-by: José Roberto de Souza
> Signed-off-by: Radhakrishna Sripada
> Signed-off-by: Gustavo Sousa
> Signed-off-by: Mika Kahola
> Signed-off-by: Vinod Govindapillai
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 7 +
> .../gpu/drm/i915/display/intel_display_core.h | 6 +
> .../drm/i915/display/intel_display_driver.c | 7 +
> .../drm/i915/display/intel_display_power.c| 8 +
> drivers/gpu/drm/i915/display/intel_pmdemand.c | 455 ++
> drivers/gpu/drm/i915/display/intel_pmdemand.h | 24 +
> drivers/gpu/drm/i915/i915_irq.c | 21 +-
> drivers/gpu/drm/i915/i915_reg.h | 36 +-
> 9 files changed, 562 insertions(+), 5 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_pmdemand.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_pmdemand.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 9af76e376ca9..eb899fa86e51 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -281,7 +281,8 @@ i915-y += \
> display/i9xx_wm.o \
> display/skl_scaler.o \
> display/skl_universal_plane.o \
> - display/skl_watermark.o
> + display/skl_watermark.o \
> + display/intel_pmdemand.o
Comment near the top of the file:
# Please keep these build lists sorted!
BR,
Jani.
> i915-$(CONFIG_ACPI) += \
> display/intel_acpi.o \
> display/intel_opregion.o
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index bf391a6cd8d6..f98e235fadc6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -99,6 +99,7 @@
> #include "intel_pcode.h"
> #include "intel_pipe_crc.h"
> #include "intel_plane_initial.h"
> +#include "intel_pmdemand.h"
> #include "intel_pps.h"
> #include "intel_psr.h"
> #include "intel_sdvo.h"
> @@ -6306,6 +6307,10 @@ int intel_atomic_check(struct drm_device *dev,
> return ret;
> }
>
> + ret = intel_pmdemand_atomic_check(state);
> + if (ret)
> + goto fail;
> +
> ret = intel_atomic_check_crtcs(state);
> if (ret)
> goto fail;
> @@ -6960,6 +6965,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> }
>
> intel_sagv_pre_plane_update(state);
> + intel_pmdemand_pre_plane_update(state);
>
> /* Complete the events for pipes that have now been disabled */
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> @@ -7070,6 +7076,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> intel_verify_planes(state);
>
> intel_sagv_post_plane_update(state);
> + intel_pmdemand_post_plane_update(state);
>
> drm_atomic_helper_commit_hw_done(&state->base);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 9f66d734edf6..9471a052aa57 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -345,6 +345,12 @@ struct intel_display {
> struct intel_global_obj obj;
> } dbuf;
>
> + struct {
> + wait_queue_head_t waitqueue;
> + struct mutex lock;
> + struct intel_global_obj obj;
> + } pmdemand;
> +
> struct {
> /*
>* dkl.phy_lock protects against concurrent access of the
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
> b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 60ce10fc7205..79853d8c3240 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -47,6 +47,7 @@
> #include "intel_opregion.h"
> #include "intel_overlay.h"
> #include "intel_plane_initial.h"
> +#include "intel_pmdemand.h"
> #include "intel_pps.h"
> #include "intel_quirks.h"
> #include "intel_vga.h"
> @@ -211,6 +212,8 @@ int i
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: Check if media_gt exists
== Series Details == Series: drm/i915/hdcp: Check if media_gt exists URL : https://patchwork.freedesktop.org/series/117189/ State : success == Summary == CI Bug Log - changes from CI_DRM_13078 -> Patchwork_117189v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/index.html Participating hosts (38 -> 24) -- Missing(14): fi-kbl-7567u fi-bsw-n3050 bat-dg1-5 fi-skl-guc fi-tgl-1115g4 bat-dg2-9 fi-cfl-guc fi-snb-2520m fi-apl-guc fi-hsw-4770 fi-kbl-x1275 fi-kbl-8809g fi-bsw-nick bat-mtlp-6 Known issues Here are the changes found in Patchwork_117189v1 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live@migrate: - bat-dg2-11: [PASS][1] -> [DMESG-FAIL][2] ([i915#7699] / [i915#7913]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-dg2-11/igt@i915_selftest@l...@migrate.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/bat-dg2-11/igt@i915_selftest@l...@migrate.html * igt@i915_selftest@live@requests: - bat-rpls-1: [PASS][3] -> [ABORT][4] ([i915#4983] / [i915#7911] / [i915#7920]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-rpls-1/igt@i915_selftest@l...@requests.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/bat-rpls-1/igt@i915_selftest@l...@requests.html Possible fixes * igt@i915_selftest@live@migrate: - bat-atsm-1: [DMESG-FAIL][5] ([i915#7699] / [i915#7913]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/bat-atsm-1/igt@i915_selftest@l...@migrate.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/bat-atsm-1/igt@i915_selftest@l...@migrate.html [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699 [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920 Build changes - * Linux: CI_DRM_13078 -> Patchwork_117189v1 CI-20190529: 20190529 CI_DRM_13078: 59c67d4cf8b737c0c25649091a1a22809d6a06f8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_117189v1: 59c67d4cf8b737c0c25649091a1a22809d6a06f8 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 8fa12430b147 drm/i915/hdcp: Check if media_gt exists == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/index.html
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hdcp: Check if media_gt exists
== Series Details ==
Series: drm/i915/hdcp: Check if media_gt exists
URL : https://patchwork.freedesktop.org/series/117189/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13078_full -> Patchwork_117189v1_full
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/index.html
Participating hosts (8 -> 7)
--
Missing(1): shard-rkl0
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_117189v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- {shard-tglu}: [SKIP][1] ([i915#3555]) -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-tglu-8/igt@kms_cursor_...@cursor-offscreen-max-size.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-tglu-6/igt@kms_cursor_...@cursor-offscreen-max-size.html
Known issues
Here are the changes found in Patchwork_117189v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [PASS][3] -> [FAIL][4] ([i915#2842])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl2/igt@gem_exec_fair@basic-pace-s...@rcs0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-apl3/igt@gem_exec_fair@basic-pace-s...@rcs0.html
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#2842])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-glk4/igt@gem_exec_fair@basic-pace-s...@rcs0.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-glk4/igt@gem_exec_fair@basic-pace-s...@rcs0.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-glk: [PASS][7] -> [DMESG-FAIL][8] ([i915#5334])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-glk6/igt@i915_selftest@live@gt_heartbeat.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-glk1/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [PASS][9] -> [FAIL][10] ([i915#2346])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl1/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-apl7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][11] ([fdo#109271]) +42 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-snb5/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0...@pipe-a-vga-1.html
Possible fixes
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- {shard-rkl}:[FAIL][12] ([i915#7742]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
* igt@gem_barrier_race@remote-request@rcs0:
- {shard-rkl}:[ABORT][14] ([i915#7461] / [i915#8211]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-7/igt@gem_barrier_race@remote-requ...@rcs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-rkl-2/igt@gem_barrier_race@remote-requ...@rcs0.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-rkl}:[FAIL][16] ([i915#6268]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-rkl-7/igt@gem_ctx_e...@basic-nohangcheck.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-rkl-3/igt@gem_ctx_e...@basic-nohangcheck.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][18] ([i915#2842]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-apl2/igt@gem_exec_fair@basic-none-s...@rcs0.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-apl4/igt@gem_exec_fair@basic-none-s...@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][20] ([i915#2842]) -> [PASS][21]
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13078/shard-glk5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v1/shard-glk9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_spin_batch@engines@rcs0:
- s
Re: [Intel-gfx] [PATCH v4 9/9] vfio/pci: Allow passing zero-length fd array in VFIO_DEVICE_PCI_HOT_RESET
> From: Alex Williamson
> Sent: Friday, April 28, 2023 5:55 AM
>
> On Wed, 26 Apr 2023 07:54:19 -0700
> Yi Liu wrote:
>
> > This is the way user to invoke hot-reset for the devices opened by cdev
> > interface. User should check the flag VFIO_PCI_HOT_RESET_FLAG_RESETTABLE
> > in the output of VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl before doing
> > hot-reset for cdev devices.
> >
> > Suggested-by: Jason Gunthorpe
> > Signed-off-by: Jason Gunthorpe
> > Reviewed-by: Jason Gunthorpe
> > Tested-by: Yanting Jiang
> > Signed-off-by: Yi Liu
> > ---
> > drivers/vfio/pci/vfio_pci_core.c | 66 +++-
> > include/uapi/linux/vfio.h| 22 +++
> > 2 files changed, 79 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_core.c
> > b/drivers/vfio/pci/vfio_pci_core.c
> > index 43858d471447..f70e3b948b16 100644
> > --- a/drivers/vfio/pci/vfio_pci_core.c
> > +++ b/drivers/vfio/pci/vfio_pci_core.c
> > @@ -180,7 +180,8 @@ static void vfio_pci_probe_mmaps(struct
> > vfio_pci_core_device
> *vdev)
> > struct vfio_pci_group_info;
> > static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
> > static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
> > - struct vfio_pci_group_info *groups);
> > + struct vfio_pci_group_info *groups,
> > + struct iommufd_ctx *iommufd_ctx);
> >
> > /*
> > * INTx masking requires the ability to disable INTx signaling via
> > PCI_COMMAND
> > @@ -1364,8 +1365,7 @@ vfio_pci_ioctl_pci_hot_reset_groups(struct
> vfio_pci_core_device *vdev,
> > if (ret)
> > return ret;
> >
> > - /* Somewhere between 1 and count is OK */
> > - if (!array_count || array_count > count)
> > + if (array_count > count)
> > return -EINVAL;
>
> Doesn't this need a || vfio_device_cdev_opened(vdev) test as well?
> It's invalid to pass fds for a cdev device. Presumably it would fail
> later collecting group fds as well, but might as well enforce the
> semantics early.
Yes, it is.
>
> >
> > group_fds = kcalloc(array_count, sizeof(*group_fds), GFP_KERNEL);
> > @@ -1414,7 +1414,7 @@ vfio_pci_ioctl_pci_hot_reset_groups(struct
> vfio_pci_core_device *vdev,
> > info.count = array_count;
> > info.files = files;
> >
> > - ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info);
> > + ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info, NULL);
> >
> > hot_reset_release:
> > for (file_idx--; file_idx >= 0; file_idx--)
> > @@ -1429,6 +1429,7 @@ static int vfio_pci_ioctl_pci_hot_reset(struct
> vfio_pci_core_device *vdev,
> > {
> > unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count);
> > struct vfio_pci_hot_reset hdr;
> > + struct iommufd_ctx *iommufd;
> > bool slot = false;
> >
> > if (copy_from_user(&hdr, arg, minsz))
> > @@ -1443,7 +1444,12 @@ static int vfio_pci_ioctl_pci_hot_reset(struct
> vfio_pci_core_device *vdev,
> > else if (pci_probe_reset_bus(vdev->pdev->bus))
> > return -ENODEV;
> >
> > - return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, slot, arg);
> > + if (hdr.count)
> > + return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count,
> > slot, arg);
> > +
> > + iommufd = vfio_iommufd_physical_ictx(&vdev->vdev);
> > +
> > + return vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, NULL, iommufd);
>
> Why did we need to store iommufd in a variable?
will remove it.
> > }
> >
> > static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,
> > @@ -2415,6 +2421,9 @@ static bool vfio_dev_in_groups(struct
> > vfio_pci_core_device
> *vdev,
> > {
> > unsigned int i;
> >
> > + if (!groups)
> > + return false;
> > +
> > for (i = 0; i < groups->count; i++)
> > if (vfio_file_has_dev(groups->files[i], &vdev->vdev))
> > return true;
> > @@ -2488,13 +2497,38 @@ static int vfio_pci_dev_set_pm_runtime_get(struct
> vfio_device_set *dev_set)
> > return ret;
> > }
> >
> > +static bool vfio_dev_in_iommufd_ctx(struct vfio_pci_core_device *vdev,
> > + struct iommufd_ctx *iommufd_ctx)
> > +{
> > + struct iommufd_ctx *iommufd = vfio_iommufd_physical_ictx(&vdev->vdev);
> > + struct iommu_group *iommu_group;
> > +
> > + if (!iommufd_ctx)
> > + return false;
> > +
> > + if (iommufd == iommufd_ctx)
> > + return true;
> > +
> > + iommu_group = iommu_group_get(vdev->vdev.dev);
> > + if (!iommu_group)
> > + return false;
> > +
> > + /*
> > +* Try to check if any device within iommu_group is bound with
> > +* the input iommufd_ctx.
> > +*/
> > + return vfio_devset_iommufd_has_group(vdev->vdev.dev_set,
> > +iommufd_ctx, iommu_group);
> > +}
>
> This last test makes this not do what the function name suggests it
> does
Re: [Intel-gfx] 6.1.23: 0fc6fea41c71 breaks GPD Pocket 3 modeset
On Sat, Apr 29, 2023 at 09:55:45PM +0200, Kurt Garloff wrote: > Hi Ville, > > While > 0fc6fea41c71 drm/i915: Disable DC states for all commits > (cherry picked from commit 41b4c7fe72b6105a4b49395eea9aa40cef94288d) > does look correct to me, it does break modesetting on the GPD Pocket 3, > a i7-1195G7 laptop. I run the kernel with > fbcon=rotate:1 video=DSI-1:panel_orientation=right_side_up \ > mem_sleep_default=s2idle > No special i915 parameters. > Hardware is described here: > https://wiki.archlinux.org/title/GPD_Pocket_3 > > I disected this patch which was merged (backported) for 6.1.23. > I currently run 6.1.26 with it reverted. > > Without reverting it, when fbcon is switched to show the splash > screen (GPD logo with Ubuntu added in on working kernels), the > screen remains black (backlight on, but nothing displayed) and > nothing happens any more. Please file a bug at https://gitlab.freedesktop.org/drm/intel/issues/new Boot both kernels (revert vs. no revert), passing 'drm.debug=0xe log_buf_len=4M' to the kernel cmdline, and attach the resulting dmesg from each to the bug. Also would be good if you try to reproduce on the latest drm-tip (git://anongit.freedesktop.org/drm-tip drm-tip) as well. -- Ville Syrjälä Intel
Re: [Intel-gfx] [PATCHv3] drm/i915/display/dp: 128/132b LT requirement
On Tue, 25 Apr 2023, Arun R Murthy wrote:
> For 128b/132b LT prior to LT DPTX should set power state, DP channel
> coding and then link rate.
>
> v2: added separate function to avoid code duplication(Jani N)
> v3: DP2.1 section 3.5.2.16 is ordered, 3.5.1.2 is unordered and hence
> discarding
>
> Signed-off-by: Arun R Murthy
Thanks for the patch, pushed to drm-intel-next.
BR,
Jani.
> ---
> .../drm/i915/display/intel_dp_link_training.c | 56 +--
> 1 file changed, 38 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 6aa4ae5e7ebe..27eb41499d7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -637,6 +637,37 @@ static bool intel_dp_link_max_vswing_reached(struct
> intel_dp *intel_dp,
> return true;
> }
>
> +static void
> +intel_dp_update_downspread_ctrl(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state)
> +{
> + u8 link_config[2];
> +
> + link_config[0] = crtc_state->vrr.flipline ? DP_MSA_TIMING_PAR_IGNORE_EN
> : 0;
> + link_config[1] = intel_dp_is_uhbr(crtc_state) ?
> + DP_SET_ANSI_128B132B : DP_SET_ANSI_8B10B;
> + drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
> +}
> +
> +static void
> +intel_dp_update_link_bw_set(struct intel_dp *intel_dp,
> + const struct intel_crtc_state *crtc_state,
> + u8 link_bw, u8 rate_select)
> +{
> + u8 link_config[2];
> +
> + /* Write the link configuration data */
> + link_config[0] = link_bw;
> + link_config[1] = crtc_state->lane_count;
> + if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
> + link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
> + drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2);
> + /* eDP 1.4 rate select method. */
> + if (!link_bw)
> + drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET,
> + &rate_select, 1);
> +}
> +
> /*
> * Prepare link training by configuring the link parameters. On DDI platforms
> * also enable the port here.
> @@ -647,7 +678,6 @@ intel_dp_prepare_link_train(struct intel_dp *intel_dp,
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> - u8 link_config[2];
> u8 link_bw, rate_select;
>
> if (intel_dp->prepare_link_retrain)
> @@ -686,23 +716,13 @@ intel_dp_prepare_link_train(struct intel_dp *intel_dp,
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s] Using LINK_RATE_SET value %02x\n",
> encoder->base.base.id, encoder->base.name,
> rate_select);
> -
> - /* Write the link configuration data */
> - link_config[0] = link_bw;
> - link_config[1] = crtc_state->lane_count;
> - if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
> - link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
> - drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2);
> -
> - /* eDP 1.4 rate select method. */
> - if (!link_bw)
> - drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET,
> - &rate_select, 1);
> -
> - link_config[0] = crtc_state->vrr.flipline ? DP_MSA_TIMING_PAR_IGNORE_EN
> : 0;
> - link_config[1] = intel_dp_is_uhbr(crtc_state) ?
> - DP_SET_ANSI_128B132B : DP_SET_ANSI_8B10B;
> - drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
> + /*
> + * Spec DP2.1 Section 3.5.2.16
> + * Prior to LT DPTX should set 128b/132b DP Channel coding and then set
> link rate
> + */
> + intel_dp_update_downspread_ctrl(intel_dp, crtc_state);
> + intel_dp_update_link_bw_set(intel_dp, crtc_state, link_bw,
> + rate_select);
>
> return true;
> }
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [PATCH 01/11] drm/dp_mst: Fix fractional DSC bpp handling
From: Ville Syrjälä
The current code does '(bpp << 4) / 16' in the MST PBN
calculation, but that is just the same as 'bpp' so the
DSC codepath achieves absolutely nothing. Fix it up so that
the fractional part of the bpp value is actually used instead
of truncated away. 64*1006 has enough zero lsbs that we can
just shift that down in the dividend and thus still manage
to stick to a 32bit divisor.
And while touching this, let's just make the whole thing more
straightforward by making the passed in bpp value .4 binary
fixed point always, instead of having to pass in different
things based on whether DSC is enabled or not.
Cc: Manasi Navare
Cc: Lyude Paul
Cc: Harry Wentland
Cc: David Francis
Cc: Mikita Lipski
Cc: Alex Deucher
Fixes: dc48529fb14e ("drm/dp_mst: Add PBN calculation for DSC modes")
Signed-off-by: Ville Syrjälä
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 +--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +--
.../gpu/drm/tests/drm_dp_mst_helper_test.c| 2 +-
include/drm/display/drm_dp_mst_helper.h | 2 +-
7 files changed, 12 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6cacb76f389e..7d58f08a5444 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6763,7 +6763,7 @@ static int dm_encoder_helper_atomic_check(struct
drm_encoder *encoder,
max_bpc);
bpp = convert_dc_color_depth_into_bpc(color_depth) * 3;
clock = adjusted_mode->clock;
- dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp,
false);
+ dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp
<< 4);
}
dm_new_connector_state->vcpi_slots =
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 994ba426ca66..eb4b666e50e8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -1515,7 +1515,7 @@ enum dc_status dm_dp_mst_is_port_support_mode(
} else {
/* check if mode could be supported within full_pbn */
bpp =
convert_dc_color_depth_into_bpc(stream->timing.display_color_depth) * 3;
- pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10,
bpp, false);
+ pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10,
bpp << 4);
if (pbn > aconnector->mst_output_port->full_pbn)
return DC_FAIL_BANDWIDTH_VALIDATE;
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 38dab76ae69e..cd4c4f22c903 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -4619,13 +4619,12 @@ EXPORT_SYMBOL(drm_dp_check_act_status);
/**
* drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
- * @clock: dot clock for the mode
- * @bpp: bpp for the mode.
- * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel
+ * @clock: dot clock
+ * @bpp: bpp as .4 binary fixed point
*
* This uses the formula in the spec to calculate the PBN value for a mode.
*/
-int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
+int drm_dp_calc_pbn_mode(int clock, int bpp)
{
/*
* margin 5300ppm + 300ppm ~ 0.6% as per spec, factor is 1.006
@@ -4636,18 +4635,9 @@ int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
* peak_kbps *= (1006/1000)
* peak_kbps *= (64/54)
* peak_kbps *= 8convert to bytes
-*
-* If the bpp is in units of 1/16, further divide by 16. Put this
-* factor in the numerator rather than the denominator to avoid
-* integer overflow
*/
-
- if (dsc)
- return DIV_ROUND_UP_ULL(mul_u32_u32(clock * (bpp / 16), 64 *
1006),
- 8 * 54 * 1000 * 1000);
-
- return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006),
- 8 * 54 * 1000 * 1000);
+ return DIV_ROUND_UP_ULL(mul_u32_u32(clock * bpp, 64 * 1006 >> 4),
+ 1000 * 8 * 54 * 1000);
}
EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 2c49d9ab86a2..44c15d6faac4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -109,8 +109,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encode
[Intel-gfx] [PATCH 00/11] drm/i915: MST+DSC nukage and state stuff
From: Ville Syrjälä The big one here is removal of the defunct i915 MST DSC code. That one clearly needs a lot more love, and the big issue there (FEC) probably can't be done in a way that can be easily backported. So IMO we just need to nuke the whole MST+DSC thing for now, or else we'll end up with impossible to debug bug reports. The rest is mainly improvements around state readout/check/dumping. Ville Syrjälä (11): drm/dp_mst: Fix fractional DSC bpp handling drm/i915/mst: Remove broken MST DSC support drm/i915/mst: Read out FEC state drm/i915: Fix FEC pipe A vs. DDI A mixup drm/i915: Check lane count when determining FEC support drm/i915: Fix FEC state dump drm/i915: Split some long lines drm/i915: Introduce crtc_state->enhanced_framing drm/i915: Stop spamming the logs with PLL state drm/i915: Drop some redundant eDP checks drm/i915: Reduce combo PHY log spam .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +- drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 +- drivers/gpu/drm/i915/display/g4x_dp.c | 10 +- .../gpu/drm/i915/display/intel_combo_phy.c| 17 +- drivers/gpu/drm/i915/display/intel_crt.c | 2 + .../drm/i915/display/intel_crtc_state_dump.c | 3 + drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-- drivers/gpu/drm/i915/display/intel_display.c | 1 + .../drm/i915/display/intel_display_types.h| 2 + drivers/gpu/drm/i915/display/intel_dp.c | 29 +-- .../drm/i915/display/intel_dp_link_training.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 181 +- drivers/gpu/drm/i915/display/intel_fdi.c | 9 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +- .../gpu/drm/tests/drm_dp_mst_helper_test.c| 2 +- include/drm/display/drm_dp_mst_helper.h | 2 +- 17 files changed, 80 insertions(+), 236 deletions(-) -- 2.39.2
[Intel-gfx] [PATCH 03/11] drm/i915/mst: Read out FEC state
From: Ville Syrjälä The MST codepath is missing FEC readout. Add it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 55f36d9d509c..41cfa28166e4 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3763,6 +3763,11 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder, &pipe_config->dp_m_n); + if (DISPLAY_VER(dev_priv) >= 11) + pipe_config->fec_enable = + intel_de_read(dev_priv, + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; + pipe_config->infoframes.enable |= intel_hdmi_infoframes_enabled(encoder, pipe_config); break; -- 2.39.2
[Intel-gfx] [PATCH 02/11] drm/i915/mst: Remove broken MST DSC support
From: Ville Syrjälä
The MST DSC code has a myriad of issues:
- Platform checks are wrong (MST+DSC is TGL+ only IIRC)
- Return values of .mode_valid_ctx() are wrong
- .mode_valid_ctx() assumes bigjoiner might be used, but ther rest
of the code doesn't agree
- compressed bpp calculations don't make sense
- FEC handling needs to consider the entire link as opposed to just
the single stream. Currently FEC would only get enabled if the
first enabled stream is compressed. Also I'm not seeing anything
that would account for the FEC overhead in any bandwidth calculations
- PPS SDP is only handled for the first stream via the dig_port
hooks, other streams will not be transmittitng any PPS SDPs
- PPS SDP readout is missing (also missing for SST!)
- VDSC readout is missing (also missing for SST!)
The FEC issues is really the big one since we have no way currently
to apply such link wide configuration constraints. Changing that is
going to require a much bigger rework of the higher level modeset
.compute_config() logic. We will also need such a rework to properly
distribute the available bandwidth across all the streams on the
same link (which is a must to eg. enable deep color).
Cc: sta...@vger.kernel.org
Cc: Vinod Govindapillai
Cc: Stanislav Lisovskiy
Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 176 +---
1 file changed, 5 insertions(+), 171 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 44c15d6faac4..d762f37fafb5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -72,8 +72,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
int min_bpp,
struct link_config_limits
*limits,
struct drm_connector_state
*conn_state,
- int step,
- bool dsc)
+ int step)
{
struct drm_atomic_state *state = crtc_state->uapi.state;
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
@@ -104,7 +103,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
- ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode,
crtc_state, dsc);
+ ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode,
crtc_state, false);
if (ret)
continue;
@@ -136,11 +135,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
intel_encoder *encoder,
drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
slots);
} else {
- if (!dsc)
- crtc_state->pipe_bpp = bpp;
- else
- crtc_state->dsc.compressed_bpp = bpp;
- drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp %d dsc
%d\n", slots, bpp, dsc);
+ crtc_state->pipe_bpp = bpp;
+ drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp %d\n",
slots, bpp);
}
return slots;
@@ -157,7 +153,7 @@ static int intel_dp_mst_compute_link_config(struct
intel_encoder *encoder,
slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state,
limits->max_bpp,
limits->min_bpp, limits,
-conn_state, 2 * 3, false);
+conn_state, 2 * 3);
if (slots < 0)
return slots;
@@ -173,99 +169,6 @@ static int intel_dp_mst_compute_link_config(struct
intel_encoder *encoder,
return 0;
}
-static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
- struct intel_crtc_state
*crtc_state,
- struct drm_connector_state
*conn_state,
- struct link_config_limits
*limits)
-{
- struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
- struct intel_dp *intel_dp = &intel_mst->primary->dp;
- struct intel_connector *connector =
- to_intel_connector(conn_state->connector);
- struct drm_i915_private *i915 = to_i915(connector->base.dev);
- const struct drm_display_mode *adjusted_mode =
- &crtc_state->hw.adjusted_mode;
- int slots = -EINVAL;
- int i, num_bpc;
- u8 dsc_bpc[3] = {0};
- int min_bpp, max_bpp, sink_min_bpp, sin
[Intel-gfx] [PATCH 05/11] drm/i915: Check lane count when determining FEC support
From: Ville Syrjälä
ICL doesn't support FEC with a x1 DP link. Make sure
we don't try to enable FEC in such cases.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index b27b4fb71ed7..9ac199444155 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1218,7 +1218,8 @@ static bool intel_dp_source_supports_fec(struct intel_dp
*intel_dp,
if (DISPLAY_VER(dev_priv) >= 12)
return true;
- if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A)
+ if (DISPLAY_VER(dev_priv) == 11 &&
+ encoder->port != PORT_A && pipe_config->lane_count != 1)
return true;
return false;
@@ -1234,7 +1235,7 @@ static bool intel_dp_supports_fec(struct intel_dp
*intel_dp,
static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) &&
!crtc_state->fec_enable)
+ if (!intel_dp_is_edp(intel_dp) && !crtc_state->fec_enable)
return false;
return intel_dsc_source_support(crtc_state) &&
@@ -1580,15 +1581,6 @@ int intel_dp_dsc_compute_config(struct intel_dp
*intel_dp,
int pipe_bpp;
int ret;
- pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
- intel_dp_supports_fec(intel_dp, pipe_config);
-
- if (!intel_dp_supports_dsc(intel_dp, pipe_config))
- return -EINVAL;
-
- if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
- return -EINVAL;
-
if (compute_pipe_bpp)
pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp,
conn_state->max_requested_bpc);
else
@@ -1615,6 +1607,15 @@ int intel_dp_dsc_compute_config(struct intel_dp
*intel_dp,
pipe_config->port_clock = limits->max_rate;
pipe_config->lane_count = limits->max_lane_count;
+ pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
+ intel_dp_supports_fec(intel_dp, pipe_config);
+
+ if (!intel_dp_supports_dsc(intel_dp, pipe_config))
+ return -EINVAL;
+
+ if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
+ return -EINVAL;
+
if (intel_dp_is_edp(intel_dp)) {
pipe_config->dsc.compressed_bpp =
min_t(u16,
drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,
--
2.39.2
[Intel-gfx] [PATCH 04/11] drm/i915: Fix FEC pipe A vs. DDI A mixup
From: Ville Syrjälä
On pre-TGL FEC is a port level feature, not a transcoder
level features, and it's DDI A which doesn't have it, not
trancodere A. Check for the correct thing when determining
whether FEC is supported or not.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 4361c1ac65c3..b27b4fb71ed7 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1212,13 +1212,13 @@ void intel_dp_compute_rate(struct intel_dp *intel_dp,
int port_clock,
static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
const struct intel_crtc_state
*pipe_config)
{
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- /* On TGL, FEC is supported on all Pipes */
if (DISPLAY_VER(dev_priv) >= 12)
return true;
- if (DISPLAY_VER(dev_priv) == 11 && pipe_config->cpu_transcoder !=
TRANSCODER_A)
+ if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A)
return true;
return false;
--
2.39.2
[Intel-gfx] [PATCH 06/11] drm/i915: Fix FEC state dump
From: Ville Syrjälä
Stop dumping state while reading it out. We have a proper
place for that stuff.
Signed-off-by: Ville Syrjälä
---
.../gpu/drm/i915/display/intel_crtc_state_dump.c| 2 ++
drivers/gpu/drm/i915/display/intel_ddi.c| 13 +++--
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 0cdcaa49656f..91242ffe0768 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -257,6 +257,8 @@ void intel_crtc_state_dump(const struct intel_crtc_state
*pipe_config,
intel_dump_m_n_config(pipe_config, "dp m2_n2",
pipe_config->lane_count,
&pipe_config->dp_m2_n2);
+ drm_dbg_kms(&i915->drm, "fec: %s\n",
+ str_enabled_disabled(pipe_config->fec_enable));
}
drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 41cfa28166e4..4246133950fd 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3725,17 +3725,10 @@ static void intel_ddi_read_func_ctl(struct
intel_encoder *encoder,
intel_cpu_transcoder_get_m2_n2(crtc, cpu_transcoder,
&pipe_config->dp_m2_n2);
- if (DISPLAY_VER(dev_priv) >= 11) {
- i915_reg_t dp_tp_ctl = dp_tp_ctl_reg(encoder,
pipe_config);
-
+ if (DISPLAY_VER(dev_priv) >= 11)
pipe_config->fec_enable =
- intel_de_read(dev_priv, dp_tp_ctl) &
DP_TP_CTL_FEC_ENABLE;
-
- drm_dbg_kms(&dev_priv->drm,
- "[ENCODER:%d:%s] Fec status: %u\n",
- encoder->base.base.id, encoder->base.name,
- pipe_config->fec_enable);
- }
+ intel_de_read(dev_priv,
+ dp_tp_ctl_reg(encoder,
pipe_config)) & DP_TP_CTL_FEC_ENABLE;
if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink)
pipe_config->infoframes.enable |=
--
2.39.2
[Intel-gfx] [PATCH 08/11] drm/i915: Introduce crtc_state->enhanced_framing
From: Ville Syrjälä
Track DP enhanced framing properly in the crtc state instead
of relying just on the cached DPCD everywhere, and hook it
up into the state check and dump.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/g4x_dp.c | 10 --
drivers/gpu/drm/i915/display/intel_crt.c | 2 ++
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 5 +++--
drivers/gpu/drm/i915/display/intel_ddi.c | 11 +--
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/i915/display/intel_display_types.h| 2 ++
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
7 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
b/drivers/gpu/drm/i915/display/g4x_dp.c
index 920d570f7594..534546ea7d0b 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -141,7 +141,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
intel_de_rmw(dev_priv, TRANS_DP_CTL(crtc->pipe),
TRANS_DP_ENH_FRAMING,
-drm_dp_enhanced_frame_cap(intel_dp->dpcd) ?
+pipe_config->enhanced_framing ?
TRANS_DP_ENH_FRAMING : 0);
} else {
if (IS_G4X(dev_priv) && pipe_config->limited_color_range)
@@ -153,7 +153,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
intel_dp->DP |= DP_SYNC_VS_HIGH;
intel_dp->DP |= DP_LINK_TRAIN_OFF;
- if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
+ if (pipe_config->enhanced_framing)
intel_dp->DP |= DP_ENHANCED_FRAMING;
if (IS_CHERRYVIEW(dev_priv))
@@ -351,6 +351,9 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
u32 trans_dp = intel_de_read(dev_priv,
TRANS_DP_CTL(crtc->pipe));
+ if (trans_dp & TRANS_DP_ENH_FRAMING)
+ pipe_config->enhanced_framing = true;
+
if (trans_dp & TRANS_DP_HSYNC_ACTIVE_HIGH)
flags |= DRM_MODE_FLAG_PHSYNC;
else
@@ -361,6 +364,9 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
else
flags |= DRM_MODE_FLAG_NVSYNC;
} else {
+ if (tmp & DP_ENHANCED_FRAMING)
+ pipe_config->enhanced_framing = true;
+
if (tmp & DP_SYNC_HS_HIGH)
flags |= DRM_MODE_FLAG_PHSYNC;
else
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index 13519f78cf9f..52af64aa9953 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -449,6 +449,8 @@ static int hsw_crt_compute_config(struct intel_encoder
*encoder,
/* FDI must always be 2.7 GHz */
pipe_config->port_clock = 135000 * 2;
+ pipe_config->enhanced_framing = true;
+
adjusted_mode->crtc_clock = lpt_iclkip(pipe_config);
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 91242ffe0768..14db2b481ff1 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -257,8 +257,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state
*pipe_config,
intel_dump_m_n_config(pipe_config, "dp m2_n2",
pipe_config->lane_count,
&pipe_config->dp_m2_n2);
- drm_dbg_kms(&i915->drm, "fec: %s\n",
- str_enabled_disabled(pipe_config->fec_enable));
+ drm_dbg_kms(&i915->drm, "fec: %s, enhanced framing: %s\n",
+ str_enabled_disabled(pipe_config->fec_enable),
+
str_enabled_disabled(pipe_config->enhanced_framing));
}
drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4246133950fd..51ae1aad7cc7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3434,7 +3434,7 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp
*intel_dp,
dp_tp_ctl |= DP_TP_CTL_MODE_MST;
} else {
dp_tp_ctl |= DP_TP_CTL_MODE_SST;
- if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
+ if (crtc_state->enhanced_framing)
dp_tp_ctl |= DP_TP_CTL_ENHANCED_FRAME_ENABLE;
}
intel_de_write(dev_priv, dp_tp_ctl_reg(encoder, crtc_state), dp_tp_ctl);
@@ -3491,7 +3491,7 @@ static v
[Intel-gfx] [PATCH 07/11] drm/i915: Split some long lines
From: Ville Syrjälä Split some overly long lines. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fdi.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c index 55283677c45a..19ee78ba3936 100644 --- a/drivers/gpu/drm/i915/display/intel_fdi.c +++ b/drivers/gpu/drm/i915/display/intel_fdi.c @@ -765,7 +765,10 @@ void hsw_fdi_link_train(struct intel_encoder *encoder, * WaFDIAutoLinkSetTimingOverrride:hsw */ intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A), - FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2) | FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90); + FDI_RX_PWRDN_LANE1_VAL(2) | + FDI_RX_PWRDN_LANE0_VAL(2) | + FDI_RX_TP1_TO_TP2_48 | + FDI_RX_FDI_DELAY_90); /* Enable the PCH Receiver FDI PLL */ rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | @@ -798,7 +801,9 @@ void hsw_fdi_link_train(struct intel_encoder *encoder, * achieved on the PCH side in FDI_RX_CTL, so no need to set the * port reversal bit */ intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), - DDI_BUF_CTL_ENABLE | ((crtc_state->fdi_lanes - 1) << 1) | DDI_BUF_TRANS_SELECT(i / 2)); + DDI_BUF_CTL_ENABLE | + ((crtc_state->fdi_lanes - 1) << 1) | + DDI_BUF_TRANS_SELECT(i / 2)); intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); udelay(600); -- 2.39.2
[Intel-gfx] [PATCH 09/11] drm/i915: Stop spamming the logs with PLL state
From: Ville Syrjälä
encoder->get_config() is not the place where the state
should be dumped. Get rid of the spam.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 51ae1aad7cc7..65e031ff740c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3863,11 +3863,9 @@ static void mtl_ddi_get_config(struct intel_encoder
*encoder,
crtc_state->port_clock = intel_mtl_tbt_calc_port_clock(encoder);
} else if (intel_is_c10phy(i915, phy)) {
intel_c10pll_readout_hw_state(encoder,
&crtc_state->cx0pll_state.c10);
- intel_c10pll_dump_hw_state(i915, &crtc_state->cx0pll_state.c10);
crtc_state->port_clock = intel_c10pll_calc_port_clock(encoder,
&crtc_state->cx0pll_state.c10);
} else {
intel_c20pll_readout_hw_state(encoder,
&crtc_state->cx0pll_state.c20);
- intel_c20pll_dump_hw_state(i915, &crtc_state->cx0pll_state.c20);
crtc_state->port_clock = intel_c20pll_calc_port_clock(encoder,
&crtc_state->cx0pll_state.c20);
}
--
2.39.2
[Intel-gfx] [PATCH 10/11] drm/i915: Drop some redundant eDP checks
From: Ville Syrjälä
There's no need to check for both eDP and fixed_mode when
deciding whether to do the pfit calculations or not.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9ac199444155..6bc7ff0c4320 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1044,7 +1044,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
return MODE_H_ILLEGAL;
fixed_mode = intel_panel_fixed_mode(connector, mode);
- if (intel_dp_is_edp(intel_dp) && fixed_mode) {
+ if (fixed_mode) {
status = intel_panel_mode_valid(connector, mode);
if (status != MODE_OK)
return status;
@@ -2175,7 +2175,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_audio_compute_config(encoder, pipe_config, conn_state);
fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
- if (intel_dp_is_edp(intel_dp) && fixed_mode) {
+ if (fixed_mode) {
ret = intel_panel_compute_config(connector, adjusted_mode);
if (ret)
return ret;
--
2.39.2
[Intel-gfx] [PATCH 11/11] drm/i915: Reduce combo PHY log spam
From: Ville Syrjälä
We always check whether combo PHYs need to be re-initialized
after disabling DC states, which leads to log spam. Switch things
around so that we only log something when we actually have to
re-initialized a PHY.
The log spam was exacerbated by commit 41b4c7fe72b6 ("drm/i915:
Disable DC states for all commits") since we now disable DC
states far more often.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_combo_phy.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 922a6d87b553..ee843f2b1af1 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -114,10 +114,6 @@ static bool icl_verify_procmon_ref_values(struct
drm_i915_private *dev_priv,
procmon = icl_get_procmon_ref_values(dev_priv, phy);
- drm_dbg_kms(&dev_priv->drm,
- "Combo PHY %c Voltage/Process Info : %s\n",
- phy_name(phy), procmon->name);
-
ret = check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW1(phy),
(0xff << 16) | 0xff, procmon->dw1);
ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW9(phy),
@@ -312,14 +308,17 @@ static void icl_combo_phys_init(struct drm_i915_private
*dev_priv)
enum phy phy;
for_each_combo_phy(dev_priv, phy) {
+ const struct icl_procmon *procmon;
u32 val;
- if (icl_combo_phy_verify_state(dev_priv, phy)) {
- drm_dbg(&dev_priv->drm,
- "Combo PHY %c already enabled, won't reprogram
it.\n",
- phy_name(phy));
+ if (icl_combo_phy_verify_state(dev_priv, phy))
continue;
- }
+
+ procmon = icl_get_procmon_ref_values(dev_priv, phy);
+
+ drm_dbg(&dev_priv->drm,
+ "Initializing combo PHY %c (Voltage/Process Info :
%s)\n",
+ phy_name(phy), procmon->name);
if (!has_phy_misc(dev_priv, phy))
goto skip_phy_misc;
--
2.39.2
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: MST+DSC nukage and state stuff
== Series Details == Series: drm/i915: MST+DSC nukage and state stuff URL : https://patchwork.freedesktop.org/series/117201/ State : warning == Summary == Error: dim checkpatch failed b98a8e6872f9 drm/dp_mst: Fix fractional DSC bpp handling 81bfa5ca1aa8 drm/i915/mst: Remove broken MST DSC support 7287f3ff6156 drm/i915/mst: Read out FEC state -:24: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #24: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3769: + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; total: 0 errors, 1 warnings, 0 checks, 11 lines checked 8b161765a004 drm/i915: Fix FEC pipe A vs. DDI A mixup 020a66619ead drm/i915: Check lane count when determining FEC support ce9fd402683b drm/i915: Fix FEC state dump -:48: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #48: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3731: + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; total: 0 errors, 1 warnings, 0 checks, 28 lines checked a63fb1144f6f drm/i915: Split some long lines e0509a0619cd drm/i915: Introduce crtc_state->enhanced_framing 5cbdfdb85cd6 drm/i915: Stop spamming the logs with PLL state 124fa6dba488 drm/i915: Drop some redundant eDP checks 5588b8335ec1 drm/i915: Reduce combo PHY log spam
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: MST+DSC nukage and state stuff
== Series Details == Series: drm/i915: MST+DSC nukage and state stuff URL : https://patchwork.freedesktop.org/series/117201/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: MST+DSC nukage and state stuff
== Series Details ==
Series: drm/i915: MST+DSC nukage and state stuff
URL : https://patchwork.freedesktop.org/series/117201/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13097 -> Patchwork_117201v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_117201v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_117201v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/index.html
Participating hosts (38 -> 38)
--
Additional (1): fi-kbl-soraka
Missing(1): fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_117201v1:
### IGT changes ###
Possible regressions
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-7567u: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/fi-kbl-7567u/igt@kms_chamelium_fra...@hdmi-crc-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/fi-kbl-7567u/igt@kms_chamelium_fra...@hdmi-crc-fast.html
Known issues
Here are the changes found in Patchwork_117201v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][5] ([i915#1886] / [i915#7913])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-7: [PASS][6] -> [ABORT][7] ([i915#4983])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg1-7/igt@i915_selftest@l...@hangcheck.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/bat-dg1-7/igt@i915_selftest@l...@hangcheck.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271]) +16 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html
Possible fixes
* igt@gem_exec_parallel@engines@fds:
- {bat-mtlp-8}: [ABORT][9] -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
* igt@i915_selftest@live@requests:
- {bat-mtlp-6}: [ABORT][11] ([i915#4983] / [i915#7920]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-6/igt@i915_selftest@l...@requests.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/bat-mtlp-6/igt@i915_selftest@l...@requests.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [FAIL][13] ([i915#7932]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues
[Intel-gfx] [PATCH v2] drm/i915/huc: Parse the GSC-enabled HuC binary
The new binaries that support the 2-step authentication have contain the
legacy-style binary, which we can use for loading the HuC via DMA. To
find out where this is located in the image, we need to parse the meu
manifest of the GSC binary. The manifest consist of a partition header
followed by entries, one of which contains the offset we're looking for.
Note that the DG2 GSC binary contains entries with the same names, but
it doesn't contain a full legacy binary, so we need to skip assigning
the dma offset in that case (which we can do by checking the ccs).
Also, since we're now parsing the entries, we can extract the HuC
version that way instead of using hardcoded offsets.
Note that the meu structure will be re-used for parsing the GSC binary,
so they've been added in their own header.
v2: fix structure names to match meu defines (s/CPT/CPD/), update commit
message, check ccs validity, drop old version location defines.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
---
.../drm/i915/gt/uc/intel_gsc_meu_headers.h| 74 ++
drivers/gpu/drm/i915/gt/uc/intel_huc.c| 11 +-
drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 135 ++
drivers/gpu/drm/i915/gt/uc/intel_huc_fw.h | 5 +-
drivers/gpu/drm/i915/gt/uc/intel_huc_print.h | 21 +++
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 71 +
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 -
8 files changed, 272 insertions(+), 53 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_meu_headers.h
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_huc_print.h
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_meu_headers.h
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_meu_headers.h
new file mode 100644
index ..d55a66202576
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_meu_headers.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _INTEL_GSC_MEU_H_
+#define _INTEL_GSC_MEU_H_
+
+#include
+
+/* Code partition directory (CPD) structures */
+struct intel_gsc_cpd_header_v2 {
+ u32 header_marker;
+#define INTEL_GSC_CPD_HEADER_MARKER 0x44504324
+
+ u32 num_of_entries;
+ u8 header_version;
+ u8 entry_version;
+ u8 header_length; /* in bytes */
+ u8 flags;
+ u32 partition_name;
+ u32 crc32;
+} __packed;
+
+struct intel_gsc_cpd_entry {
+ u8 name[12];
+
+ /*
+* Bits 0-24: offset from the beginning of the code partition
+* Bit 25: huffman compressed
+* Bits 26-31: reserved
+*/
+ u32 offset;
+#define INTEL_GSC_CPD_ENTRY_OFFSET_MASK GENMASK(24, 0)
+#define INTEL_GSC_CPD_ENTRY_HUFFMAN_COMP BIT(25)
+
+ /*
+* Module/Item length, in bytes. For Huffman-compressed modules, this
+* refers to the uncompressed size. For software-compressed modules,
+* this refers to the compressed size.
+*/
+ u32 length;
+
+ u8 reserved[4];
+} __packed;
+
+struct intel_gsc_meu_version {
+ u16 major;
+ u16 minor;
+ u16 hotfix;
+ u16 build;
+} __packed;
+
+struct intel_gsc_manifest_header {
+ u32 header_type; /* 0x4 for manifest type */
+ u32 header_length; /* in dwords */
+ u32 header_version;
+ u32 flags;
+ u32 vendor;
+ u32 date;
+ u32 size; /* In dwords, size of entire manifest (header + extensions) */
+ u32 header_id;
+ u32 internal_data;
+ struct intel_gsc_meu_version fw_version;
+ u32 security_version;
+ struct intel_gsc_meu_version meu_kit_version;
+ u32 meu_manifest_version;
+ u8 general_data[4];
+ u8 reserved3[56];
+ u32 modulus_size; /* in dwords */
+ u32 exponent_size; /* in dwords */
+} __packed;
+
+#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index 9721761373fb..062ff914b274 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -6,23 +6,14 @@
#include
#include "gt/intel_gt.h"
-#include "gt/intel_gt_print.h"
#include "intel_guc_reg.h"
#include "intel_huc.h"
+#include "intel_huc_print.h"
#include "i915_drv.h"
#include
#include
-#define huc_printk(_huc, _level, _fmt, ...) \
- gt_##_level(huc_to_gt(_huc), "HuC: " _fmt, ##__VA_ARGS__)
-#define huc_err(_huc, _fmt, ...) huc_printk((_huc), err, _fmt,
##__VA_ARGS__)
-#define huc_warn(_huc, _fmt, ...) huc_printk((_huc), warn, _fmt,
##__VA_ARGS__)
-#define huc_notice(_huc, _fmt, ...)huc_printk((_huc), notice, _fmt,
##__VA_ARGS__)
-#define huc_info(_huc, _fmt, ...) huc_printk((_huc), info, _fmt,
##__VA_ARGS__)
-#define huc_dbg(_huc, _fmt, ...) huc_printk((_huc), dbg, _fmt,
##__VA_ARGS__)
-#define huc_probe_error(_huc, _fmt, ...) huc_printk((_huc), probe_error, _fmt,
##__VA_ARGS__)
-
/**
* DOC: HuC
*
diff --g
[Intel-gfx] [PATCH 00/24] drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror
Fix all the remaining kernel-doc warnings, and enable -Werror for kernel-doc. Jani Nikula (24): drm/i915/gvt: fix intel_vgpu_alloc_resource() kernel-doc parameter drm/i915/vma: fix kernel-doc function name for i915_vma_size() drm/i915/utils: drop kernel-doc from __wait_for() drm/i915/vma: document struct i915_vma_resource wakeref member drm/i915/vma: fix struct i915_vma_bindinfo kernel-doc drm/i915/perf: fix i915_perf_ioctl_version() kernel-doc drm/i915/error: fix i915_capture_error_state() kernel-doc drm/i915/request: drop kernel-doc drm/i915/gem: fix i915_gem_object_lookup_rcu() kernel-doc parameter name drm/i915/gem: fix function pointer member kernel-doc drm/i915/ttm: fix i915_ttm_to_gem() kernel-doc drm/i915/engine: fix kernel-doc function name for intel_engine_cleanup_common() drm/i915/context: fix kernel-doc parameter descriptions drm/i915/gtt: fix i915_vm_resv_put() kernel-doc parameter name drm/i915/engine: hide preempt_hang selftest member from kernel-doc drm/i915/guc: add dbgfs_node member kernel-doc drm/i915/guc: drop lots of kernel-doc markers drm/i915/guc: add intel_guc_state_capture member docs for ads_null_cache and max_mmio_per_node drm/i915/active: fix kernel-doc for function parameters drm/i915/pmu: drop kernel-doc drm/i915/pxp: fix kernel-doc for member dev_link drm/i915/scatterlist: fix kernel-doc drm/i915/scatterlist: fix kernel-doc parameter documentation drm/i915: use kernel-doc -Werror when CONFIG_DRM_I915_WERROR=y drivers/gpu/drm/i915/Makefile | 4 +- drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 +- drivers/gpu/drm/i915/gem/i915_gem_region.h| 4 +- drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 1 + drivers/gpu/drm/i915/gt/intel_context.h | 6 +-- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +- drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 20 --- drivers/gpu/drm/i915/gt/uc/intel_guc.h| 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +- drivers/gpu/drm/i915/gvt/aperture_gm.c| 2 +- drivers/gpu/drm/i915/i915_active.h| 14 ++--- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- drivers/gpu/drm/i915/i915_perf.c | 1 + drivers/gpu/drm/i915/i915_pmu.h | 6 +-- drivers/gpu/drm/i915/i915_request.h | 52 +-- drivers/gpu/drm/i915/i915_scatterlist.h | 9 ++-- drivers/gpu/drm/i915/i915_utils.h | 2 +- drivers/gpu/drm/i915/i915_vma.h | 2 +- drivers/gpu/drm/i915/i915_vma_resource.h | 46 +--- drivers/gpu/drm/i915/pxp/intel_pxp_types.h| 4 +- 22 files changed, 103 insertions(+), 82 deletions(-) -- 2.39.2
[Intel-gfx] [PATCH 01/24] drm/i915/gvt: fix intel_vgpu_alloc_resource() kernel-doc parameter
drivers/gpu/drm/i915/gvt/aperture_gm.c:344: warning: Function parameter or member 'conf' not described in 'intel_vgpu_alloc_resource' drivers/gpu/drm/i915/gvt/aperture_gm.c:344: warning: Excess function parameter 'param' description in 'intel_vgpu_alloc_resource' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gvt/aperture_gm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c index 076c779f776a..eedd1865bb98 100644 --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c @@ -330,7 +330,7 @@ void intel_vgpu_reset_resource(struct intel_vgpu *vgpu) /** * intel_vgpu_alloc_resource() - allocate HW resource for a vGPU * @vgpu: vGPU - * @param: vGPU creation params + * @conf: vGPU creation params * * This function is used to allocate HW resource for a vGPU. User specifies * the resource configuration through the creation params. -- 2.39.2
[Intel-gfx] [PATCH 03/24] drm/i915/utils: drop kernel-doc from __wait_for()
The parameters aren't documented, and the file isn't included in Sphinx build anyway, so demote the kernel-doc to a regular comment. drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'OP' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'COND' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'US' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'Wmin' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'Wmax' not described in '__wait_for' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_utils.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h index 2c430c0c3bad..c61066498bf2 100644 --- a/drivers/gpu/drm/i915/i915_utils.h +++ b/drivers/gpu/drm/i915/i915_utils.h @@ -250,7 +250,7 @@ wait_remaining_ms_from_jiffies(unsigned long timestamp_jiffies, int to_wait_ms) } } -/** +/* * __wait_for - magic wait macro * * Macro to help avoid open coding check/wait/timeout patterns. Note that it's -- 2.39.2
[Intel-gfx] [PATCH 06/24] drm/i915/perf: fix i915_perf_ioctl_version() kernel-doc
drivers/gpu/drm/i915/i915_perf.c:5307: warning: Function parameter or member 'i915' not described in 'i915_perf_ioctl_version' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_perf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 050b8ae7b8e7..19d5652300ee 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -5300,6 +5300,7 @@ void i915_perf_fini(struct drm_i915_private *i915) /** * i915_perf_ioctl_version - Version of the i915-perf subsystem + * @i915: The i915 device * * This version number is used by userspace to detect available features. */ -- 2.39.2
[Intel-gfx] [PATCH 02/24] drm/i915/vma: fix kernel-doc function name for i915_vma_size()
drivers/gpu/drm/i915/i915_vma.h:145: warning: expecting prototype for i915_vma_offset(). Prototype was for i915_vma_size() instead Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_vma.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h index ed5c9d682a1b..38c8c66ed724 100644 --- a/drivers/gpu/drm/i915/i915_vma.h +++ b/drivers/gpu/drm/i915/i915_vma.h @@ -132,7 +132,7 @@ static inline u64 __i915_vma_size(const struct i915_vma *vma) } /** - * i915_vma_offset - Obtain the va range size of the vma + * i915_vma_size - Obtain the va range size of the vma * @vma: The vma * * GPU virtual address space may be allocated with padding. This -- 2.39.2
[Intel-gfx] [PATCH 08/24] drm/i915/request: drop kernel-doc
The documentation is closer to not being kernel-doc. Just drop the
kernel-doc /** indicators.
drivers/gpu/drm/i915/i915_request.h:176: warning: This comment starts with
'/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
* Request queue structure.
drivers/gpu/drm/i915/i915_request.h:477: warning: This comment starts with
'/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
* Returns true if seq1 is later than seq2.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_request.h | 52 ++---
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
index f5e1bb5e857a..0ac55b2e4223 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request.h
@@ -172,7 +172,7 @@ enum {
I915_FENCE_FLAG_COMPOSITE,
};
-/**
+/*
* Request queue structure.
*
* The request queue allows us to note sequence numbers that have been emitted
@@ -198,7 +198,7 @@ struct i915_request {
struct drm_i915_private *i915;
- /**
+ /*
* Context and ring buffer related to this request
* Contexts are refcounted, so when this request is associated with a
* context, we must increment the context's refcount, to guarantee that
@@ -251,9 +251,9 @@ struct i915_request {
};
struct llist_head execute_cb;
struct i915_sw_fence semaphore;
- /**
-* @submit_work: complete submit fence from an IRQ if needed for
-* locking hierarchy reasons.
+ /*
+* complete submit fence from an IRQ if needed for locking hierarchy
+* reasons.
*/
struct irq_work submit_work;
@@ -277,35 +277,35 @@ struct i915_request {
*/
const u32 *hwsp_seqno;
- /** Position in the ring of the start of the request */
+ /* Position in the ring of the start of the request */
u32 head;
- /** Position in the ring of the start of the user packets */
+ /* Position in the ring of the start of the user packets */
u32 infix;
- /**
+ /*
* Position in the ring of the start of the postfix.
* This is required to calculate the maximum available ring space
* without overwriting the postfix.
*/
u32 postfix;
- /** Position in the ring of the end of the whole request */
+ /* Position in the ring of the end of the whole request */
u32 tail;
- /** Position in the ring of the end of any workarounds after the tail */
+ /* Position in the ring of the end of any workarounds after the tail */
u32 wa_tail;
- /** Preallocate space in the ring for the emitting the request */
+ /* Preallocate space in the ring for the emitting the request */
u32 reserved_space;
- /** Batch buffer pointer for selftest internal use. */
+ /* Batch buffer pointer for selftest internal use. */
I915_SELFTEST_DECLARE(struct i915_vma *batch);
struct i915_vma_resource *batch_res;
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
- /**
+ /*
* Additional buffers requested by userspace to be captured upon
* a GPU hang. The vma/obj on this list are protected by their
* active reference - all objects on this list must also be
@@ -314,29 +314,29 @@ struct i915_request {
struct i915_capture_list *capture_list;
#endif
- /** Time at which this request was emitted, in jiffies. */
+ /* Time at which this request was emitted, in jiffies. */
unsigned long emitted_jiffies;
- /** timeline->request entry for this request */
+ /* timeline->request entry for this request */
struct list_head link;
- /** Watchdog support fields. */
+ /* Watchdog support fields. */
struct i915_request_watchdog {
struct llist_node link;
struct hrtimer timer;
} watchdog;
- /**
-* @guc_fence_link: Requests may need to be stalled when using GuC
-* submission waiting for certain GuC operations to complete. If that is
-* the case, stalled requests are added to a per context list of stalled
-* requests. The below list_head is the link in that list. Protected by
+ /*
+* Requests may need to be stalled when using GuC submission waiting for
+* certain GuC operations to complete. If that is the case, stalled
+* requests are added to a per context list of stalled requests. The
+* below list_head is the link in that list. Protected by
* ce->guc_state.lock.
*/
struct list_head guc_fence_link;
- /**
-* @guc_prio: Priority level while the request is in flight. Differs
+ /*
+* Priority level while the request is in flight. Differs
* from i915 sche
[Intel-gfx] [PATCH 07/24] drm/i915/error: fix i915_capture_error_state() kernel-doc
drivers/gpu/drm/i915/i915_gpu_error.c:2174: warning: Function parameter or member 'dump_flags' not described in 'i915_capture_error_state' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index f020c0086fbc..04ad30274896 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -2162,7 +2162,7 @@ void i915_error_state_store(struct i915_gpu_coredump *error) * i915_capture_error_state - capture an error record for later analysis * @gt: intel_gt which originated the hang * @engine_mask: hung engines - * + * @dump_flags: dump flags * * Should be called when an error is detected (either a hang or an error * interrupt) to capture error state from the time of the error. Fills -- 2.39.2
[Intel-gfx] [PATCH 04/24] drm/i915/vma: document struct i915_vma_resource wakeref member
drivers/gpu/drm/i915/i915_vma_resource.h:129: warning: Function parameter or
member 'wakeref' not described in 'i915_vma_resource'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_vma_resource.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_vma_resource.h
b/drivers/gpu/drm/i915/i915_vma_resource.h
index c1864e3d0b43..2053c037dbfb 100644
--- a/drivers/gpu/drm/i915/i915_vma_resource.h
+++ b/drivers/gpu/drm/i915/i915_vma_resource.h
@@ -47,6 +47,7 @@ struct i915_page_sizes {
* @chain: Pointer to struct i915_sw_fence used to await dependencies.
* @rb: Rb node for the vm's pending unbind interval tree.
* @__subtree_last: Interval tree private member.
+ * @wakeref: wakeref.
* @vm: non-refcounted pointer to the vm. This is for internal use only and
* this member is cleared after vm_resource unbind.
* @mr: The memory region of the object pointed to by the vma.
--
2.39.2
[Intel-gfx] [PATCH 09/24] drm/i915/gem: fix i915_gem_object_lookup_rcu() kernel-doc parameter name
drivers/gpu/drm/i915/gem/i915_gem_object.h:94: warning: Function parameter or member 'file' not described in 'i915_gem_object_lookup_rcu' drivers/gpu/drm/i915/gem/i915_gem_object.h:94: warning: Excess function parameter 'filp' description in 'i915_gem_object_lookup_rcu' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index 885ccde9dc3c..bc1291887d4f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -80,7 +80,7 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj); /** * i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle - * @filp: DRM file private date + * @file: DRM file private date * @handle: userspace handle * * Returns: -- 2.39.2
[Intel-gfx] [PATCH 10/24] drm/i915/gem: fix function pointer member kernel-doc
You can't document function pointer member as functions.
drivers/gpu/drm/i915/gem/i915_gem_region.h:25: warning: Incorrect use of
kernel-doc format: * process_obj - Process the current object
drivers/gpu/drm/i915/gem/i915_gem_region.h:35: warning: Function parameter or
member 'process_obj' not described in 'i915_gem_apply_to_region_ops'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_region.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.h
b/drivers/gpu/drm/i915/gem/i915_gem_region.h
index 2dfcc41c0170..8a7650b27cc2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_region.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_region.h
@@ -22,9 +22,7 @@ struct i915_gem_apply_to_region;
*/
struct i915_gem_apply_to_region_ops {
/**
-* process_obj - Process the current object
-* @apply: Embed this for private data.
-* @obj: The current object.
+* @process_obj: Process the current object
*
* Note that if this function is part of a ww transaction, and
* if returns -EDEADLK for one of the objects, it may be
--
2.39.2
[Intel-gfx] [PATCH 05/24] drm/i915/vma: fix struct i915_vma_bindinfo kernel-doc
You can't document both a sub-struct type and a struct member at the
same time. Separate them.
drivers/gpu/drm/i915/i915_vma_resource.h:91: warning: Incorrect use of
kernel-doc format: * struct i915_vma_bindinfo - Information needed for
async bind
drivers/gpu/drm/i915/i915_vma_resource.h:129: warning: Function parameter or
member 'bi' not described in 'i915_vma_resource'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_vma_resource.h | 45 ++--
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vma_resource.h
b/drivers/gpu/drm/i915/i915_vma_resource.h
index 2053c037dbfb..ca2b0f7f59bc 100644
--- a/drivers/gpu/drm/i915/i915_vma_resource.h
+++ b/drivers/gpu/drm/i915/i915_vma_resource.h
@@ -33,6 +33,27 @@ struct i915_page_sizes {
unsigned int sg;
};
+/**
+ * struct i915_vma_bindinfo - Information needed for async bind
+ * only but that can be dropped after the bind has taken place.
+ * Consider making this a separate argument to the bind_vma
+ * op, coalescing with other arguments like vm, stash, cache_level
+ * and flags
+ * @pages: The pages sg-table.
+ * @page_sizes: Page sizes of the pages.
+ * @pages_rsgt: Refcounted sg-table when delayed object destruction
+ * is supported. May be NULL.
+ * @readonly: Whether the vma should be bound read-only.
+ * @lmem: Whether the vma points to lmem.
+ */
+struct i915_vma_bindinfo {
+ struct sg_table *pages;
+ struct i915_page_sizes page_sizes;
+ struct i915_refct_sgt *pages_rsgt;
+ bool readonly:1;
+ bool lmem:1;
+};
+
/**
* struct i915_vma_resource - Snapshotted unbind information.
* @unbind_fence: Fence to mark unbinding complete. Note that this fence
@@ -89,25 +110,13 @@ struct i915_vma_resource {
intel_wakeref_t wakeref;
/**
-* struct i915_vma_bindinfo - Information needed for async bind
-* only but that can be dropped after the bind has taken place.
-* Consider making this a separate argument to the bind_vma
-* op, coalescing with other arguments like vm, stash, cache_level
-* and flags
-* @pages: The pages sg-table.
-* @page_sizes: Page sizes of the pages.
-* @pages_rsgt: Refcounted sg-table when delayed object destruction
-* is supported. May be NULL.
-* @readonly: Whether the vma should be bound read-only.
-* @lmem: Whether the vma points to lmem.
+* @bi: Information needed for async bind only but that can be dropped
+* after the bind has taken place.
+*
+* Consider making this a separate argument to the bind_vma op,
+* coalescing with other arguments like vm, stash, cache_level and flags
*/
- struct i915_vma_bindinfo {
- struct sg_table *pages;
- struct i915_page_sizes page_sizes;
- struct i915_refct_sgt *pages_rsgt;
- bool readonly:1;
- bool lmem:1;
- } bi;
+ struct i915_vma_bindinfo bi;
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
struct intel_memory_region *mr;
--
2.39.2
[Intel-gfx] [PATCH 12/24] drm/i915/engine: fix kernel-doc function name for intel_engine_cleanup_common()
drivers/gpu/drm/i915/gt/intel_engine_cs.c:1525: warning: expecting prototype for intel_engines_cleanup_common(). Prototype was for intel_engine_cleanup_common() instead Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 5c6c9a6d469c..0aff5bb13c53 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -1515,7 +1515,7 @@ int intel_engines_init(struct intel_gt *gt) } /** - * intel_engines_cleanup_common - cleans up the engine state created by + * intel_engine_cleanup_common - cleans up the engine state created by *the common initiailizers. * @engine: Engine to cleanup. * -- 2.39.2
[Intel-gfx] [PATCH 11/24] drm/i915/ttm: fix i915_ttm_to_gem() kernel-doc
drivers/gpu/drm/i915/gem/i915_gem_ttm.h:50: warning: Function parameter or member 'bo' not described in 'i915_ttm_to_gem' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h index f8f6bed1b297..70abdc3061a9 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h @@ -42,6 +42,7 @@ static inline bool i915_ttm_is_ghost_object(struct ttm_buffer_object *bo) /** * i915_ttm_to_gem - Convert a struct ttm_buffer_object to an embedding * struct drm_i915_gem_object. + * @bo: Pointer to the ttm buffer object * * Return: Pointer to the embedding struct ttm_buffer_object. */ -- 2.39.2
[Intel-gfx] [PATCH 13/24] drm/i915/context: fix kernel-doc parameter descriptions
drivers/gpu/drm/i915/gt/intel_context.h:108: warning: Function parameter or member 'ce' not described in 'intel_context_lock_pinned' drivers/gpu/drm/i915/gt/intel_context.h:123: warning: Function parameter or member 'ce' not described in 'intel_context_is_pinned' drivers/gpu/drm/i915/gt/intel_context.h:142: warning: Function parameter or member 'ce' not described in 'intel_context_unlock_pinned' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_context.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h index 48f888c3da08..6b5eae7b88bc 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.h +++ b/drivers/gpu/drm/i915/gt/intel_context.h @@ -97,7 +97,7 @@ void intel_context_bind_parent_child(struct intel_context *parent, /** * intel_context_lock_pinned - Stablises the 'pinned' status of the HW context - * @ce - the context + * @ce: the context * * Acquire a lock on the pinned status of the HW context, such that the context * can neither be bound to the GPU or unbound whilst the lock is held, i.e. @@ -111,7 +111,7 @@ static inline int intel_context_lock_pinned(struct intel_context *ce) /** * intel_context_is_pinned - Reports the 'pinned' status - * @ce - the context + * @ce: the context * * While in use by the GPU, the context, along with its ring and page * tables is pinned into memory and the GTT. @@ -133,7 +133,7 @@ static inline void intel_context_cancel_request(struct intel_context *ce, /** * intel_context_unlock_pinned - Releases the earlier locking of 'pinned' status - * @ce - the context + * @ce: the context * * Releases the lock earlier acquired by intel_context_unlock_pinned(). */ -- 2.39.2
[Intel-gfx] [PATCH 15/24] drm/i915/engine: hide preempt_hang selftest member from kernel-doc
drivers/gpu/drm/i915/gt/intel_engine_types.h:293: warning: Function parameter
or member 'preempt_hang' not described in 'intel_engine_execlists'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 960291f88fd6..e99a6fa03d45 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -289,6 +289,7 @@ struct intel_engine_execlists {
*/
u8 csb_head;
+ /* private: selftest */
I915_SELFTEST_DECLARE(struct st_preempt_hang preempt_hang;)
};
--
2.39.2
[Intel-gfx] [PATCH 14/24] drm/i915/gtt: fix i915_vm_resv_put() kernel-doc parameter name
drivers/gpu/drm/i915/gt/intel_gtt.h:515: warning: Function parameter or member
'vm' not described in 'i915_vm_resv_put'
drivers/gpu/drm/i915/gt/intel_gtt.h:515: warning: Excess function parameter
'resv' description in 'i915_vm_resv_put'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h
b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 1910683f03b4..9aff343beaa8 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -509,7 +509,7 @@ static inline void i915_vm_put(struct i915_address_space
*vm)
/**
* i915_vm_resv_put - Release a reference on the vm's reservation lock
- * @resv: Pointer to a reservation lock obtained from i915_vm_resv_get()
+ * @vm: The vm whose reservation lock reference we want to release
*/
static inline void i915_vm_resv_put(struct i915_address_space *vm)
{
--
2.39.2
[Intel-gfx] [PATCH 16/24] drm/i915/guc: add dbgfs_node member kernel-doc
drivers/gpu/drm/i915/gt/uc/intel_guc.h:274: warning: Function parameter or
member 'dbgfs_node' not described in 'intel_guc'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index e46aac1a41e6..8dc291ff0093 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -42,6 +42,7 @@ struct intel_guc {
/** @capture: the error-state-capture module's data and objects */
struct intel_guc_state_capture *capture;
+ /** @dbgfs_node: debugfs node */
struct dentry *dbgfs_node;
/** @sched_engine: Global engine used to submit requests to GuC */
--
2.39.2
[Intel-gfx] [PATCH 17/24] drm/i915/guc: drop lots of kernel-doc markers
The documentation is closer to not being kernel-doc, so just drop the
kernel-doc markers.
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter
or member 'size' not described in '__guc_capture_bufstate'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter
or member 'data' not described in '__guc_capture_bufstate'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter
or member 'rd' not described in '__guc_capture_bufstate'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter
or member 'wr' not described in '__guc_capture_bufstate'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'link' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'is_partial' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'eng_class' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'eng_inst' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'guc_id' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'lrca' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter
or member 'reginfo' not described in '__guc_capture_parsed_output'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:62: warning: wrong kernel-doc
identifier on line:
* struct guc_debug_capture_list_header / struct guc_debug_capture_list
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:80: warning: wrong kernel-doc
identifier on line:
* struct __guc_mmio_reg_descr / struct __guc_mmio_reg_descr_group
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:105: warning: wrong kernel-doc
identifier on line:
* struct guc_state_capture_header_t / struct guc_state_capture_t /
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter
or member 'is_valid' not described in '__guc_capture_ads_cache'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter
or member 'ptr' not described in '__guc_capture_ads_cache'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter
or member 'size' not described in '__guc_capture_ads_cache'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter
or member 'status' not described in '__guc_capture_ads_cache'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'marker' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'read_ptr' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'write_ptr' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'size' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'sampled_write_ptr' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'wrap_offset' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'flush_to_file' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'buffer_full_cnt' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'reserved' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'flags' not described in 'guc_log_buffer_state'
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or
member 'version' not described in 'guc_log_buffer_state'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 12 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
index 9d589c28f40f..1b6c219e1675 100644
--- a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
@@ -12,7 +12,7 @@
struct intel_guc;
struct file;
-/**
+/*
* struct __guc_capture_bufstate
*
* Book-keeping structure used to track read and write pointers
@@ -26,7 +26,7 @@ struct __guc_capture_bufstate {
u32 wr;
};
-/**
+/*
* struct __guc_capture_pars
[Intel-gfx] [PATCH 18/24] drm/i915/guc: add intel_guc_state_capture member docs for ads_null_cache and max_mmio_per_node
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:216: warning: Function parameter
or member 'ads_null_cache' not described in 'intel_guc_state_capture'
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:216: warning: Function parameter
or member 'max_mmio_per_node' not described in 'intel_guc_state_capture'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
index 1b6c219e1675..1fc0c17b1230 100644
--- a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
@@ -187,6 +187,10 @@ struct intel_guc_state_capture {
struct __guc_capture_ads_cache ads_cache[GUC_CAPTURE_LIST_INDEX_MAX]
[GUC_CAPTURE_LIST_TYPE_MAX]
[GUC_MAX_ENGINE_CLASSES];
+
+ /**
+* @ads_null_cache: ADS null cache.
+*/
void *ads_null_cache;
/**
@@ -202,6 +206,10 @@ struct intel_guc_state_capture {
struct list_head cachelist;
#define PREALLOC_NODES_MAX_COUNT (3 * GUC_MAX_ENGINE_CLASSES *
GUC_MAX_INSTANCES_PER_CLASS)
#define PREALLOC_NODES_DEFAULT_NUMREGS 64
+
+ /**
+* @max_mmio_per_node: Max MMIO per node.
+*/
int max_mmio_per_node;
/**
--
2.39.2
[Intel-gfx] [PATCH 19/24] drm/i915/active: fix kernel-doc for function parameters
drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'active' not described in '__i915_active_fence_init' drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'fence' not described in '__i915_active_fence_init' drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'fn' not described in '__i915_active_fence_init' drivers/gpu/drm/i915/i915_active.h:89: warning: Function parameter or member 'active' not described in 'i915_active_fence_set' drivers/gpu/drm/i915/i915_active.h:89: warning: Function parameter or member 'rq' not described in 'i915_active_fence_set' drivers/gpu/drm/i915/i915_active.h:102: warning: Function parameter or member 'active' not described in 'i915_active_fence_get' drivers/gpu/drm/i915/i915_active.h:122: warning: Function parameter or member 'active' not described in 'i915_active_fence_isset' Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_active.h | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_active.h b/drivers/gpu/drm/i915/i915_active.h index 7eb44132183a..77c676ecc263 100644 --- a/drivers/gpu/drm/i915/i915_active.h +++ b/drivers/gpu/drm/i915/i915_active.h @@ -49,9 +49,9 @@ void i915_active_noop(struct dma_fence *fence, struct dma_fence_cb *cb); /** * __i915_active_fence_init - prepares the activity tracker for use - * @active - the active tracker - * @fence - initial fence to track, can be NULL - * @func - a callback when then the tracker is retired (becomes idle), + * @active: the active tracker + * @fence: initial fence to track, can be NULL + * @fn: a callback when then the tracker is retired (becomes idle), * can be NULL * * i915_active_fence_init() prepares the embedded @active struct for use as @@ -77,8 +77,8 @@ __i915_active_fence_set(struct i915_active_fence *active, /** * i915_active_fence_set - updates the tracker to watch the current fence - * @active - the active tracker - * @rq - the request to watch + * @active: the active tracker + * @rq: the request to watch * * i915_active_fence_set() watches the given @rq for completion. While * that @rq is busy, the @active reports busy. When that @rq is signaled @@ -89,7 +89,7 @@ i915_active_fence_set(struct i915_active_fence *active, struct i915_request *rq); /** * i915_active_fence_get - return a reference to the active fence - * @active - the active tracker + * @active: the active tracker * * i915_active_fence_get() returns a reference to the active fence, * or NULL if the active tracker is idle. The reference is obtained under RCU, @@ -111,7 +111,7 @@ i915_active_fence_get(struct i915_active_fence *active) /** * i915_active_fence_isset - report whether the active tracker is assigned - * @active - the active tracker + * @active: the active tracker * * i915_active_fence_isset() returns true if the active tracker is currently * assigned to a fence. Due to the lazy retiring, that fence may be idle -- 2.39.2
[Intel-gfx] [PATCH 20/24] drm/i915/pmu: drop kernel-doc
The comments are closer to not being kernel-doc.
drivers/gpu/drm/i915/i915_pmu.h:21: warning: cannot understand function
prototype: 'enum i915_pmu_tracked_events '
drivers/gpu/drm/i915/i915_pmu.h:32: warning: cannot understand function
prototype: 'enum '
drivers/gpu/drm/i915/i915_pmu.h:41: warning: This comment starts with '/**',
but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* How many different events we track in the global PMU mask.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_pmu.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index 449057648f39..c30f43319a78 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -14,7 +14,7 @@
struct drm_i915_private;
-/**
+/*
* Non-engine events that we need to track enabled-disabled transition and
* current state.
*/
@@ -25,7 +25,7 @@ enum i915_pmu_tracked_events {
__I915_PMU_TRACKED_EVENT_COUNT, /* count marker */
};
-/**
+/*
* Slots used from the sampling timer (non-engine events) with some extras for
* convenience.
*/
@@ -37,7 +37,7 @@ enum {
__I915_NUM_PMU_SAMPLERS
};
-/**
+/*
* How many different events we track in the global PMU mask.
*
* It is also used to know to needed number of event reference counters.
--
2.39.2
[Intel-gfx] [PATCH 21/24] drm/i915/pxp: fix kernel-doc for member dev_link
Add /** to make it a kernel-doc.
drivers/gpu/drm/i915/pxp/intel_pxp_types.h:96: warning: Function parameter or
member 'dev_link' not described in 'intel_pxp'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/pxp/intel_pxp_types.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
b/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
index 007de49e1ea4..c445f7f2f47a 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
@@ -33,7 +33,9 @@ struct intel_pxp {
*/
struct i915_pxp_component *pxp_component;
- /* @dev_link: Enforce module relationship for power management
ordering. */
+ /**
+* @dev_link: Enforce module relationship for power management ordering.
+*/
struct device_link *dev_link;
/**
* @pxp_component_added: track if the pxp component has been added.
--
2.39.2
[Intel-gfx] [PATCH 22/24] drm/i915/scatterlist: fix kernel-doc
Can't document function pointer members as if they are functions.
drivers/gpu/drm/i915/i915_scatterlist.h:160: warning: Incorrect use of
kernel-doc format: * release() - Free the memory of the struct
i915_refct_sgt
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_scatterlist.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h
b/drivers/gpu/drm/i915/i915_scatterlist.h
index b0a1db44f895..fe9ae863f9b9 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.h
+++ b/drivers/gpu/drm/i915/i915_scatterlist.h
@@ -157,8 +157,7 @@ bool i915_sg_trim(struct sg_table *orig_st);
*/
struct i915_refct_sgt_ops {
/**
-* release() - Free the memory of the struct i915_refct_sgt
-* @ref: struct kref that is embedded in the struct i915_refct_sgt
+* @release: Free the memory of the struct i915_refct_sgt
*/
void (*release)(struct kref *ref);
};
--
2.39.2
[Intel-gfx] [PATCH 23/24] drm/i915/scatterlist: fix kernel-doc parameter documentation
drivers/gpu/drm/i915/i915_scatterlist.h:164: warning: Function parameter or
member 'release' not described in 'i915_refct_sgt_ops'
drivers/gpu/drm/i915/i915_scatterlist.h:187: warning: Function parameter or
member 'rsgt' not described in 'i915_refct_sgt_put'
drivers/gpu/drm/i915/i915_scatterlist.h:198: warning: Function parameter or
member 'rsgt' not described in 'i915_refct_sgt_get'
drivers/gpu/drm/i915/i915_scatterlist.h:214: warning: Function parameter or
member 'rsgt' not described in '__i915_refct_sgt_init'
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_scatterlist.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h
b/drivers/gpu/drm/i915/i915_scatterlist.h
index fe9ae863f9b9..5a10c1a31183 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.h
+++ b/drivers/gpu/drm/i915/i915_scatterlist.h
@@ -180,7 +180,7 @@ struct i915_refct_sgt {
/**
* i915_refct_sgt_put - Put a refcounted sg-table
- * @rsgt the struct i915_refct_sgt to put.
+ * @rsgt: the struct i915_refct_sgt to put.
*/
static inline void i915_refct_sgt_put(struct i915_refct_sgt *rsgt)
{
@@ -190,7 +190,7 @@ static inline void i915_refct_sgt_put(struct i915_refct_sgt
*rsgt)
/**
* i915_refct_sgt_get - Get a refcounted sg-table
- * @rsgt the struct i915_refct_sgt to get.
+ * @rsgt: the struct i915_refct_sgt to get.
*/
static inline struct i915_refct_sgt *
i915_refct_sgt_get(struct i915_refct_sgt *rsgt)
@@ -202,7 +202,7 @@ i915_refct_sgt_get(struct i915_refct_sgt *rsgt)
/**
* __i915_refct_sgt_init - Initialize a refcounted sg-list with a custom
* operations structure
- * @rsgt The struct i915_refct_sgt to initialize.
+ * @rsgt: The struct i915_refct_sgt to initialize.
* @size: Size in bytes of the underlying memory buffer.
* @ops: A customized operations structure in case the refcounted sg-list
* is embedded into another structure.
--
2.39.2
[Intel-gfx] [PATCH 24/24] drm/i915: use kernel-doc -Werror when CONFIG_DRM_I915_WERROR=y
With CONFIG_DRM_I915_WERROR=y, we enable kernel-doc check for both objects and headers. Now that the kernel-doc warnings have been fixed, also enable kernel-doc -Werror to fail the build on kernel-doc warnings. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 9af76e376ca9..f43734f13471 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -377,7 +377,7 @@ obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o # # Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build ifdef CONFIG_DRM_I915_WERROR -cmd_checkdoc = $(srctree)/scripts/kernel-doc -none $< +cmd_checkdoc = $(srctree)/scripts/kernel-doc -none -Werror $< endif # header test @@ -392,7 +392,7 @@ always-$(CONFIG_DRM_I915_WERROR) += \ quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@) cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \ - $(srctree)/scripts/kernel-doc -none $<; touch $@ + $(srctree)/scripts/kernel-doc -none -Werror $<; touch $@ $(obj)/%.hdrtest: $(src)/%.h FORCE $(call if_changed_dep,hdrtest) -- 2.39.2
Re: [Intel-gfx] [PATCH] drm/i915/hdcp: Check if media_gt exists
Quoting Suraj Kandpal (2023-05-02 05:36:52) >Check if media_gt exits if we are using gsc cs > >Cc: Ankit Nautiyal >Signed-off-by: Suraj Kandpal Reviewed-by: Gustavo Sousa >--- > drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c >b/drivers/gpu/drm/i915/display/intel_hdcp.c >index 650232c4892b..f3956eca4ec4 100644 >--- a/drivers/gpu/drm/i915/display/intel_hdcp.c >+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c >@@ -214,7 +214,7 @@ bool intel_hdcp2_capable(struct intel_connector *connector) > >/* If MTL+ make sure gsc is loaded and proxy is setup */ >if (intel_hdcp_gsc_cs_required(dev_priv)) >- if (!intel_uc_fw_is_running(&gsc->fw)) >+ if (!gt || !intel_uc_fw_is_running(&gsc->fw)) >return false; > >/* MEI/GSC interface is solid depending on which is used */ >-- >2.25.1 >
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: HuC loading and authentication for MTL (rev3)
== Series Details ==
Series: drm/i915: HuC loading and authentication for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/117080/
State : warning
== Summary ==
Error: dim checkpatch failed
d1701037c3e3 DO NOT REVIEW: drm/i915: Add support for MTL GSC SW Proxy
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:133: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#133:
new file mode 100644
-:138: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#138: FILE: drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c:1:
+#include "intel_gsc_proxy.h"
-:140: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use
line 1 instead
#140: FILE: drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c:3:
+// SPDX-License-Identifier: MIT
-:278: WARNING:MEMORY_BARRIER: memory barrier without comment
#278: FILE: drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c:141:
+ wmb();
-:321: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#321: FILE: drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c:184:
+
+}
total: 0 errors, 4 warnings, 1 checks, 988 lines checked
587ab7744732 drm/i915/uc: perma-pin firmwares
-:114: ERROR:SPACING: space prohibited before that close parenthesis ')'
#114: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc.h:117:
+intel_uc_ops_function(resume_mappings, resume_mappings, void, );
total: 1 errors, 0 warnings, 0 checks, 196 lines checked
11b735119b33 drm/i915/huc: Parse the GSC-enabled HuC binary
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#27:
new file mode 100644
-:275: WARNING:LINE_SPACING: Missing a blank line after declarations
#275: FILE: drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c:140:
+ u32 offset = entry_offset(entry);
+ if (offset < size && css_valid(data + offset, size -
offset))
-:436: WARNING:LINE_SPACING: Missing a blank line after declarations
#436: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:623:
+ u32 delta = uc_fw->dma_start_offset;
+ __check_ccs_header(gt, fw->data + delta, fw->size - delta,
uc_fw);
total: 0 errors, 3 warnings, 0 checks, 408 lines checked
eb2472e51764 drm/i915/huc: Load GSC-enabled HuC via DMA xfer if the fuse says so
-:56: ERROR:SPACING: space required after that ',' (ctx:VxV)
#56: FILE: drivers/gpu/drm/i915/gt/uc/intel_huc.c:321:
+ huc_err(huc," HW in legacy mode, but we have an incompatible
meu blob\n");
^
total: 1 errors, 0 warnings, 0 checks, 131 lines checked
dcffde8d400a drm/i915/huc: differentiate the 2 steps of the MTL HuC auth flow
-:49: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of
BUG() or variants
#49: FILE: drivers/gpu/drm/i915/gt/uc/intel_huc.c:128:
+ GEM_BUG_ON(intel_huc_is_authenticated(huc, INTEL_HUC_AUTH_BY_GSC));
-:300: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'base' may be better as
'(base)' to avoid precedence issues
#300: FILE: drivers/gpu/drm/i915/i915_reg.h:944:
+#define HECI_FWSTS5(base) _MMIO(base + 0xc68)
total: 0 errors, 1 warnings, 1 checks, 258 lines checked
6903ecf86175 drm/i915/mtl/huc: auth HuC via GSC
-:9: WARNING:TYPO_SPELLING: 'fuction' may be misspelled - perhaps 'function'?
#9:
The intel_huc_auth fuction is also updated to handle both authentication
^^^
-:83: WARNING:LINE_SPACING: Missing a blank line after declarations
#83: FILE: drivers/gpu/drm/i915/gt/uc/intel_huc.c:359:
+ struct i915_vma *vma = intel_guc_allocate_vma(>->uc.guc,
SZ_8K);
+ if (IS_ERR(vma)) {
-:155: ERROR:SPACING: space required before the open parenthesis '('
#155: FILE: drivers/gpu/drm/i915/gt/uc/intel_huc.c:479:
+ switch(type) {
total: 1 errors, 2 warnings, 0 checks, 328 lines checked
5921ed057ef8 drm/i915/mtl/huc: Use
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: HuC loading and authentication for MTL (rev3)
== Series Details == Series: drm/i915: HuC loading and authentication for MTL (rev3) URL : https://patchwork.freedesktop.org/series/117080/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: HuC loading and authentication for MTL (rev3)
== Series Details ==
Series: drm/i915: HuC loading and authentication for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/117080/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13097 -> Patchwork_117080v3
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_117080v3 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_117080v3, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/index.html
Participating hosts (38 -> 38)
--
Additional (1): fi-kbl-soraka
Missing(1): fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_117080v3:
### IGT changes ###
Possible regressions
* igt@dmabuf@all-tests@dma_fence:
- fi-bsw-n3050: [PASS][1] -> [ABORT][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence.html
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-n3050: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
Known issues
Here are the changes found in Patchwork_117080v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3
similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- bat-adlm-1: [PASS][8] -> [INCOMPLETE][9] ([i915#4983] /
[i915#7677])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [PASS][10] -> [ABORT][11] ([i915#4983] / [i915#7461]
/ [i915#8347] / [i915#8384])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-rpls-1/igt@i915_selftest@l...@reset.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/bat-rpls-1/igt@i915_selftest@l...@reset.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271]) +16 similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html
Possible fixes
* igt@gem_exec_parallel@engines@fds:
- {bat-mtlp-8}: [ABORT][13] -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
* igt@gem_huc_copy@huc-copy:
- {bat-mtlp-6}: [SKIP][15] ([i915#3595]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-6/igt@gem_huc_c...@huc-copy.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/bat-mtlp-6/igt@gem_huc_c...@huc-copy.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [FAIL][17] ([i915#7932]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117080v3/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm
[Intel-gfx] [PATCH v3 2/4] mei: gsc_proxy: add gsc proxy driver
From: Alexander Usyskin
Add GSC proxy driver. It to allows messaging between GSC component
on Intel graphics card and CSE device.
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
Acked-by: Greg Kroah-Hartman
---
v2: re-order includes, drop reference to "on board" card in commit
message and comments.
drivers/misc/mei/Kconfig | 2 +-
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/gsc_proxy/Kconfig | 14 ++
drivers/misc/mei/gsc_proxy/Makefile| 7 +
drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c | 208 +
5 files changed, 231 insertions(+), 1 deletion(-)
create mode 100644 drivers/misc/mei/gsc_proxy/Kconfig
create mode 100644 drivers/misc/mei/gsc_proxy/Makefile
create mode 100644 drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c
diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index d21486d69df2..37db142de413 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -62,4 +62,4 @@ config INTEL_MEI_GSC
source "drivers/misc/mei/hdcp/Kconfig"
source "drivers/misc/mei/pxp/Kconfig"
-
+source "drivers/misc/mei/gsc_proxy/Kconfig"
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index fb740d754900..14aee253ae48 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -30,3 +30,4 @@ CFLAGS_mei-trace.o = -I$(src)
obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
+obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/
diff --git a/drivers/misc/mei/gsc_proxy/Kconfig
b/drivers/misc/mei/gsc_proxy/Kconfig
new file mode 100644
index ..5f68d9f3d691
--- /dev/null
+++ b/drivers/misc/mei/gsc_proxy/Kconfig
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2022-2023, Intel Corporation. All rights reserved.
+#
+config INTEL_MEI_GSC_PROXY
+ tristate "Intel GSC Proxy services of ME Interface"
+ select INTEL_MEI_ME
+ depends on DRM_I915
+ help
+ MEI Support for GSC Proxy Services on Intel platforms.
+
+ MEI GSC proxy enables messaging between GSC service on
+ Intel graphics card and services on CSE (MEI) firmware
+ residing SoC or PCH.
+
diff --git a/drivers/misc/mei/gsc_proxy/Makefile
b/drivers/misc/mei/gsc_proxy/Makefile
new file mode 100644
index ..358847e9aaa9
--- /dev/null
+++ b/drivers/misc/mei/gsc_proxy/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (c) 2022-2023, Intel Corporation. All rights reserved.
+#
+# Makefile - GSC Proxy client driver for Intel MEI Bus Driver.
+
+obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += mei_gsc_proxy.o
diff --git a/drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c
b/drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c
new file mode 100644
index ..be52b113aea9
--- /dev/null
+++ b/drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c
@@ -0,0 +1,208 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022-2023 Intel Corporation
+ */
+
+/**
+ * DOC: MEI_GSC_PROXY Client Driver
+ *
+ * The mei_gsc_proxy driver acts as a translation layer between
+ * proxy user (I915) and ME FW by proxying messages to ME FW
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * mei_gsc_proxy_send - Sends a proxy message to ME FW.
+ * @dev: device corresponding to the mei_cl_device
+ * @buf: a message buffer to send
+ * @size: size of the message
+ * Return: bytes sent on Success, <0 on Failure
+ */
+static int mei_gsc_proxy_send(struct device *dev, const void *buf, size_t size)
+{
+ ssize_t ret;
+
+ if (!dev || !buf)
+ return -EINVAL;
+
+ ret = mei_cldev_send(to_mei_cl_device(dev), buf, size);
+ if (ret < 0)
+ dev_dbg(dev, "mei_cldev_send failed. %zd\n", ret);
+
+ return ret;
+}
+
+/**
+ * mei_gsc_proxy_recv - Receives a proxy message from ME FW.
+ * @dev: device corresponding to the mei_cl_device
+ * @buf: a message buffer to contain the received message
+ * @size: size of the buffer
+ * Return: bytes received on Success, <0 on Failure
+ */
+static int mei_gsc_proxy_recv(struct device *dev, void *buf, size_t size)
+{
+ ssize_t ret;
+
+ if (!dev || !buf)
+ return -EINVAL;
+
+ ret = mei_cldev_recv(to_mei_cl_device(dev), buf, size);
+ if (ret < 0)
+ dev_dbg(dev, "mei_cldev_recv failed. %zd\n", ret);
+
+ return ret;
+}
+
+static const struct i915_gsc_proxy_component_ops mei_gsc_proxy_ops = {
+ .owner = THIS_MODULE,
+ .send = mei_gsc_proxy_send,
+ .recv = mei_gsc_proxy_recv,
+};
+
+static int mei_component_master_bind(struct device *dev)
+{
+ struct mei_cl_device *cldev = to_mei_cl_device(dev);
+ struct i915_gsc_proxy_component *comp_master =
mei_cldev_get_drvdata(cldev);
+
+ comp_master->ops = &mei_gsc_proxy_ops;
+ comp_master->mei_dev = dev;
+ retu
[Intel-gfx] [PATCH v3 0/4] drm/i915: Add support for MTL GSC SW Proxy
On platforms where the GSC is part of GT, it needs to communicate with CSME for some of its operations. However, there is no direct HW communication channel, so the i915 and mei drivers must carry the messages back and forth between the 2 units. The protocol is fully described in the i915 patch that adds the initial support, but it basically amounts to SW blindly moving messages back and forth until the GSC tells us to stop. Implementing this features requires a new mei component to handle the mei side of things. The patches for this have already been reviewed on the char-misc ML and we already have an ack from Greg to merge them via the drm tree [1]. v2: small fixes, better docs, code cleanup v3: add extra check on proxy status after the init flow is done, address checkpatch issues [1] https://lore.kernel.org/lkml/20230208142358.1401618-1-tomas.wink...@intel.com/t/ Cc: Alan Previn Cc: Suraj Kandpal Cc: Alexander Usyskin Cc: Greg Kroah-Hartman Alexander Usyskin (2): drm/i915/mtl: Define GSC Proxy component interface mei: gsc_proxy: add gsc proxy driver Daniele Ceraolo Spurio (2): drm/i915/gsc: add initial support for GSC proxy drm/i915/gsc: add support for GSC proxy interrupt drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gt/intel_gt_irq.c| 22 +- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 + drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 10 + drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 425 ++ drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.h | 18 + drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c | 76 +++- drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.h | 17 +- .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h | 1 + drivers/misc/mei/Kconfig | 2 +- drivers/misc/mei/Makefile | 1 + drivers/misc/mei/gsc_proxy/Kconfig| 14 + drivers/misc/mei/gsc_proxy/Makefile | 7 + drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c| 208 + include/drm/i915_component.h | 3 +- include/drm/i915_gsc_proxy_mei_interface.h| 53 +++ 17 files changed, 852 insertions(+), 10 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.h create mode 100644 drivers/misc/mei/gsc_proxy/Kconfig create mode 100644 drivers/misc/mei/gsc_proxy/Makefile create mode 100644 drivers/misc/mei/gsc_proxy/mei_gsc_proxy.c create mode 100644 include/drm/i915_gsc_proxy_mei_interface.h -- 2.40.0
[Intel-gfx] [PATCH v3 1/4] drm/i915/mtl: Define GSC Proxy component interface
From: Alexander Usyskin
GSC Proxy component is used for communication between the
Intel graphics driver and MEI driver.
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
Acked-by: Greg Kroah-Hartman
---
v2: Improve documentation, remove unneeded includes
include/drm/i915_component.h | 3 +-
include/drm/i915_gsc_proxy_mei_interface.h | 53 ++
2 files changed, 55 insertions(+), 1 deletion(-)
create mode 100644 include/drm/i915_gsc_proxy_mei_interface.h
diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h
index c1e2a43d2d1e..56a84ee1c64c 100644
--- a/include/drm/i915_component.h
+++ b/include/drm/i915_component.h
@@ -29,7 +29,8 @@
enum i915_component_type {
I915_COMPONENT_AUDIO = 1,
I915_COMPONENT_HDCP,
- I915_COMPONENT_PXP
+ I915_COMPONENT_PXP,
+ I915_COMPONENT_GSC_PROXY,
};
/* MAX_PORT is the number of port
diff --git a/include/drm/i915_gsc_proxy_mei_interface.h
b/include/drm/i915_gsc_proxy_mei_interface.h
new file mode 100644
index ..9462341d3ae1
--- /dev/null
+++ b/include/drm/i915_gsc_proxy_mei_interface.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (c) 2022-2023 Intel Corporation
+ */
+
+#ifndef _I915_GSC_PROXY_MEI_INTERFACE_H_
+#define _I915_GSC_PROXY_MEI_INTERFACE_H_
+
+#include
+
+struct device;
+struct module;
+
+/**
+ * struct i915_gsc_proxy_component_ops - ops for GSC Proxy services.
+ * @owner: Module providing the ops
+ * @send: sends a proxy message from GSC FW to ME FW
+ * @recv: receives a proxy message for GSC FW from ME FW
+ */
+struct i915_gsc_proxy_component_ops {
+ struct module *owner;
+
+ /**
+* send - Sends a proxy message to ME FW.
+* @dev: device struct corresponding to the mei device
+* @buf: message buffer to send
+* @size: size of the message
+* Return: bytes sent on success, negative errno value on failure
+*/
+ int (*send)(struct device *dev, const void *buf, size_t size);
+
+ /**
+* recv - Receives a proxy message from ME FW.
+* @dev: device struct corresponding to the mei device
+* @buf: message buffer to contain the received message
+* @size: size of the buffer
+* Return: bytes received on success, negative errno value on failure
+*/
+ int (*recv)(struct device *dev, void *buf, size_t size);
+};
+
+/**
+ * struct i915_gsc_proxy_component - Used for communication between i915 and
+ * MEI drivers for GSC proxy services
+ * @mei_dev: device that provide the GSC proxy service.
+ * @ops: Ops implemented by GSC proxy driver, used by i915 driver.
+ */
+struct i915_gsc_proxy_component {
+ struct device *mei_dev;
+ const struct i915_gsc_proxy_component_ops *ops;
+};
+
+#endif /* _I915_GSC_PROXY_MEI_INTERFACE_H_ */
--
2.40.0
[Intel-gfx] [PATCH v3 3/4] drm/i915/gsc: add initial support for GSC proxy
The GSC uC needs to communicate with the CSME to perform certain
operations. Since the GSC can't perform this communication directly
on platforms where it is integrated in GT, i915 needs to transfer the
messages from GSC to CSME and back.
The proxy flow is as follow:
1 - i915 submits a request to GSC asking for the message to CSME
2 - GSC replies with the proxy header + payload for CSME
3 - i915 sends the reply from GSC as-is to CSME via the mei proxy
component
4 - CSME replies with the proxy header + payload for GSC
5 - i915 submits a request to GSC with the reply from CSME
6 - GSC replies either with a new header + payload (same as step 2,
so we restart from there) or with an end message.
After GSC load, i915 is expected to start the first proxy message chain,
while all subsequent ones will be triggered by the GSC via interrupt.
To communicate with the CSME, we use a dedicated mei component, which
means that we need to wait for it to bind before we can initialize the
proxies. This usually happens quite fast, but given that there is a
chance that we'll have to wait a few seconds the GSC work has been moved
to a dedicated WQ to not stall other processes.
v2: fix code style, includes and variable naming (Alan)
v3: add extra check for proxy status, fix includes and comments
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
Reviewed-by: Alan Previn #v2
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 10 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 385 ++
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.h | 17 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c | 49 ++-
drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.h | 14 +-
.../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h | 1 +
8 files changed, 473 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 9af76e376ca9..f2ac803e35b4 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -194,6 +194,7 @@ i915-y += \
# general-purpose microcontroller (GuC) support
i915-y += \
gt/uc/intel_gsc_fw.o \
+ gt/uc/intel_gsc_proxy.o \
gt/uc/intel_gsc_uc.o \
gt/uc/intel_gsc_uc_heci_cmd_submit.o\
gt/uc/intel_guc.o \
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index 236673c02f9a..f46eb17a7a98 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -13,6 +13,7 @@
#define GSC_FW_STATUS_REG _MMIO(0x116C40)
#define GSC_FW_CURRENT_STATE REG_GENMASK(3, 0)
#define GSC_FW_CURRENT_STATE_RESET 0
+#define GSC_FW_PROXY_STATE_NORMAL5
#define GSC_FW_INIT_COMPLETE_BIT REG_BIT(9)
static bool gsc_is_in_reset(struct intel_uncore *uncore)
@@ -23,6 +24,15 @@ static bool gsc_is_in_reset(struct intel_uncore *uncore)
GSC_FW_CURRENT_STATE_RESET;
}
+bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
+{
+ struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
+ u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
+
+ return REG_FIELD_GET(GSC_FW_CURRENT_STATE, fw_status) ==
+ GSC_FW_PROXY_STATE_NORMAL;
+}
+
bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc)
{
struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
index f4c1106bb2a9..fff8928218df 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
@@ -13,5 +13,6 @@ struct intel_uncore;
int intel_gsc_uc_fw_upload(struct intel_gsc_uc *gsc);
bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc);
+bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc);
#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
new file mode 100644
index ..0513ac8d03ec
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
@@ -0,0 +1,385 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include
+
+#include "drm/i915_component.h"
+#include "drm/i915_gsc_proxy_mei_interface.h"
+
+#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
+#include "intel_gsc_proxy.h"
+#include "intel_gsc_uc.h"
+#include "intel_gsc_uc_heci_cmd_submit.h"
+#include "i915_drv.h"
+
+/*
+ * GSC proxy:
+ * The GSC uC needs to communicate with the CSME to perform certain operations.
+ * Since the GSC can't perform this communication directly on platforms where
it
+ * is integrated in GT, i915 needs to transfer the messages from GSC to CSME
[Intel-gfx] [PATCH v3 4/4] drm/i915/gsc: add support for GSC proxy interrupt
The GSC notifies us of a proxy request via the HECI2 interrupt. The
interrupt must be enabled both in the HECI layer and in our usual gt irq
programming; for the latter, the interrupt is enabled via the same enable
register as the GSC CS, but it does have its own mask register. When the
interrupt is received, we also need to de-assert it in both layers.
The handling of the proxy request is deferred to the same worker that we
use for GSC load. New flags have been added to distinguish between the
init case and the proxy interrupt.
v2: Make sure not to set the reset bit when enabling/disabling the GSC
interrupts, fix defines (Alan)
v3: rebase on proxy status register check
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
---
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 22 ++-
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 44 +-
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c| 61 ++--
drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.h| 3 +
6 files changed, 112 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index c0f3ff4746ad..95e59ed6651d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -16,6 +16,7 @@
#include "intel_uncore.h"
#include "intel_rps.h"
#include "pxp/intel_pxp_irq.h"
+#include "uc/intel_gsc_proxy.h"
static void guc_irq_handler(struct intel_guc *guc, u16 iir)
{
@@ -82,6 +83,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8
instance,
if (instance == OTHER_GSC_INSTANCE)
return intel_gsc_irq_handler(gt, iir);
+ if (instance == OTHER_GSC_HECI_2_INSTANCE)
+ return intel_gsc_proxy_irq_handler(>->uc.gsc, iir);
+
WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n",
instance, iir);
}
@@ -101,6 +105,8 @@ static struct intel_gt *pick_gt(struct intel_gt *gt, u8
class, u8 instance)
case VIDEO_ENHANCEMENT_CLASS:
return media_gt;
case OTHER_CLASS:
+ if (instance == OTHER_GSC_HECI_2_INSTANCE)
+ return media_gt;
if (instance == OTHER_GSC_INSTANCE && HAS_ENGINE(media_gt,
GSC0))
return media_gt;
fallthrough;
@@ -257,6 +263,7 @@ void gen11_gt_irq_postinstall(struct intel_gt *gt)
u32 irqs = GT_RENDER_USER_INTERRUPT;
u32 guc_mask = intel_uc_wants_guc(>->uc) ? GUC_INTR_GUC2HOST : 0;
u32 gsc_mask = 0;
+ u32 heci_mask = 0;
u32 dmask;
u32 smask;
@@ -268,10 +275,16 @@ void gen11_gt_irq_postinstall(struct intel_gt *gt)
dmask = irqs << 16 | irqs;
smask = irqs << 16;
- if (HAS_ENGINE(gt, GSC0))
+ if (HAS_ENGINE(gt, GSC0)) {
+ /*
+* the heci2 interrupt is enabled via the same register as the
+* GSC interrupt, but it has its own mask register.
+*/
gsc_mask = irqs;
- else if (HAS_HECI_GSC(gt->i915))
+ heci_mask = GSC_IRQ_INTF(1); /* HECI2 IRQ for SW Proxy*/
+ } else if (HAS_HECI_GSC(gt->i915)) {
gsc_mask = GSC_IRQ_INTF(0) | GSC_IRQ_INTF(1);
+ }
BUILD_BUG_ON(irqs & 0x);
@@ -281,7 +294,7 @@ void gen11_gt_irq_postinstall(struct intel_gt *gt)
if (CCS_MASK(gt))
intel_uncore_write(uncore, GEN12_CCS_RSVD_INTR_ENABLE, smask);
if (gsc_mask)
- intel_uncore_write(uncore, GEN11_GUNIT_CSME_INTR_ENABLE,
gsc_mask);
+ intel_uncore_write(uncore, GEN11_GUNIT_CSME_INTR_ENABLE,
gsc_mask | heci_mask);
/* Unmask irqs on RCS, BCS, VCS and VECS engines. */
intel_uncore_write(uncore, GEN11_RCS0_RSVD_INTR_MASK, ~smask);
@@ -309,6 +322,9 @@ void gen11_gt_irq_postinstall(struct intel_gt *gt)
intel_uncore_write(uncore, GEN12_CCS2_CCS3_INTR_MASK, ~dmask);
if (gsc_mask)
intel_uncore_write(uncore, GEN11_GUNIT_CSME_INTR_MASK,
~gsc_mask);
+ if (heci_mask)
+ intel_uncore_write(uncore, GEN12_HECI2_RSVD_INTR_MASK,
+ ~REG_FIELD_PREP(ENGINE1_MASK, heci_mask));
if (guc_mask) {
/* the enable bit is common for both GTs but the masks are
separate */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index af80d2fe739b..b8a39c219b60 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1596,6 +1596,7 @@
#define GEN11_GT_INTR_DW(x)_MMIO(0x190018 + ((x) * 4))
#define GEN11_CSME (31)
+#define GEN12_HECI_2 (30)
#define GEN11_GUNIT (28)
#define GEN11_GUC
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror
== Series Details == Series: drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror URL : https://patchwork.freedesktop.org/series/117207/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror
== Series Details ==
Series: drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror
URL : https://patchwork.freedesktop.org/series/117207/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13097 -> Patchwork_117207v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/index.html
Participating hosts (38 -> 37)
--
Missing(1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_117207v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_lrc:
- bat-adln-1: [PASS][3] -> [INCOMPLETE][4] ([i915#4983] /
[i915#7609])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@requests:
- bat-rpls-1: [PASS][5] -> [ABORT][6] ([i915#4983] / [i915#7911] /
[i915#7920])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-rpls-1/igt@i915_selftest@l...@requests.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/bat-rpls-1/igt@i915_selftest@l...@requests.html
Possible fixes
* igt@gem_exec_parallel@engines@fds:
- {bat-mtlp-8}: [ABORT][7] -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
* igt@i915_selftest@live@requests:
- {bat-mtlp-6}: [ABORT][9] ([i915#4983] / [i915#7920]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-6/igt@i915_selftest@l...@requests.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/bat-mtlp-6/igt@i915_selftest@l...@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7609]: https://gitlab.freedesktop.org/drm/intel/issues/7609
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
[i915#8368]: https://gitlab.freedesktop.org/drm/intel/issues/8368
[i915#8379]: https://gitlab.freedesktop.org/drm/intel/issues/8379
Build changes
-
* Linux: CI_DRM_13097 -> Patchwork_117207v1
CI-20190529: 20190529
CI_DRM_13097: 1413856e3770380da743e274a06896acabf49e0e @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_117207v1: 1413856e3770380da743e274a06896acabf49e0e @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
ad6fdf0ba067 drm/i915: use kernel-doc -Werror when CONFIG_DRM_I915_WERROR=y
6f1d3b3d2f74 drm/i915/scatterlist: fix kernel-doc parameter documentation
0019c25445e8 drm/i915/scatterlist: fix kernel-doc
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add support for MTL GSC SW Proxy (rev3)
== Series Details == Series: drm/i915: Add support for MTL GSC SW Proxy (rev3) URL : https://patchwork.freedesktop.org/series/115806/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for MTL GSC SW Proxy (rev3)
== Series Details == Series: drm/i915: Add support for MTL GSC SW Proxy (rev3) URL : https://patchwork.freedesktop.org/series/115806/ State : warning == Summary == Error: dim checkpatch failed c1406c34bdf4 drm/i915/mtl: Define GSC Proxy component interface Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:30: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #30: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 62 lines checked 138fb7e616d5 mei: gsc_proxy: add gsc proxy driver Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:35: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #35: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 238 lines checked 907e62115557 drm/i915/gsc: add initial support for GSC proxy Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:88: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #88: new file mode 100644 -:276: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #276: FILE: drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c:184: + +} total: 0 errors, 1 warnings, 1 checks, 563 lines checked 2133527145eb drm/i915/gsc: add support for GSC proxy interrupt
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add support for MTL GSC SW Proxy (rev3)
== Series Details ==
Series: drm/i915: Add support for MTL GSC SW Proxy (rev3)
URL : https://patchwork.freedesktop.org/series/115806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13097 -> Patchwork_115806v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/index.html
Participating hosts (38 -> 38)
--
Additional (1): fi-kbl-soraka
Missing(1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_115806v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: [PASS][1] -> [ABORT][2] ([i915#6687] / [i915#7978] /
[i915#8407])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_lrc:
- bat-dg2-11: [PASS][5] -> [INCOMPLETE][6] ([i915#7609] /
[i915#7913])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@migrate:
- bat-adlp-6: [PASS][8] -> [DMESG-FAIL][9] ([i915#7699] /
[i915#7913])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-adlp-6/igt@i915_selftest@l...@migrate.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/bat-adlp-6/igt@i915_selftest@l...@migrate.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][10] ([fdo#109271]) +16 similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html
Possible fixes
* igt@gem_exec_parallel@engines@fds:
- {bat-mtlp-8}: [ABORT][11] -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [FAIL][13] ([i915#7932]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7609]: https://gitlab.freedesktop.org/drm/intel/issues/7609
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: MST+DSC nukage and state stuff (rev2)
== Series Details == Series: drm/i915: MST+DSC nukage and state stuff (rev2) URL : https://patchwork.freedesktop.org/series/117201/ State : warning == Summary == Error: dim checkpatch failed 787df893c7bf drm/dp_mst: Fix fractional DSC bpp handling 48761d3260fa drm/i915/mst: Remove broken MST DSC support 73450cd02b6a drm/i915/mst: Read out FEC state -:24: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #24: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3769: + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; total: 0 errors, 1 warnings, 0 checks, 11 lines checked 50007bdbb762 drm/i915: Fix FEC pipe A vs. DDI A mixup 01ea92f6872e drm/i915: Check lane count when determining FEC support ab38c2184256 drm/i915: Fix FEC state dump -:48: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #48: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3731: + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; total: 0 errors, 1 warnings, 0 checks, 28 lines checked a3bd69f5f3f9 drm/i915: Split some long lines 9f30735de6f9 drm/i915: Introduce crtc_state->enhanced_framing 306c9b6c8c78 drm/i915: Stop spamming the logs with PLL state d93bee0be9e3 drm/i915: Drop some redundant eDP checks cb750ff5a04c drm/i915: Reduce combo PHY log spam
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: MST+DSC nukage and state stuff (rev2)
== Series Details == Series: drm/i915: MST+DSC nukage and state stuff (rev2) URL : https://patchwork.freedesktop.org/series/117201/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: MST+DSC nukage and state stuff (rev2)
== Series Details ==
Series: drm/i915: MST+DSC nukage and state stuff (rev2)
URL : https://patchwork.freedesktop.org/series/117201/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13097 -> Patchwork_117201v2
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_117201v2 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_117201v2, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/index.html
Participating hosts (38 -> 37)
--
Missing(1): fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_117201v2:
### IGT changes ###
Possible regressions
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-7567u: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/fi-kbl-7567u/igt@kms_chamelium_fra...@hdmi-crc-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/fi-kbl-7567u/igt@kms_chamelium_fra...@hdmi-crc-fast.html
Known issues
Here are the changes found in Patchwork_117201v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@hangcheck:
- bat-dg2-11: [PASS][3] -> [ABORT][4] ([i915#7913] / [i915#7979])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-1:
- bat-dg2-8: [PASS][5] -> [FAIL][6] ([i915#7932])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-1.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-1.html
* igt@kms_pipe_crc_basic@read-crc:
- bat-dg2-11: NOTRUN -> [SKIP][7] ([i915#1845] / [i915#5354])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-dg2-11/igt@kms_pipe_crc_ba...@read-crc.html
Possible fixes
* igt@gem_exec_parallel@engines@fds:
- {bat-mtlp-8}: [ABORT][8] -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-mtlp-8/igt@gem_exec_parallel@engi...@fds.html
* igt@i915_selftest@live@requests:
- {bat-mtlp-6}: [ABORT][10] ([i915#4983] / [i915#7920]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-mtlp-6/igt@i915_selftest@l...@requests.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-mtlp-6/igt@i915_selftest@l...@requests.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: [DMESG-WARN][12] ([i915#6367]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-rpls-1/igt@i915_selftest@l...@slpc.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-rpls-1/igt@i915_selftest@l...@slpc.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [FAIL][14] ([i915#7932]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117201v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]:
Re: [Intel-gfx] [PATCH v4 2/9] vfio-iommufd: Create iommufd_access for noiommu devices
On Sat, Apr 29, 2023 at 12:07:24AM +0800, Yi Liu wrote: > > The emulated stuff is for mdev only, it should not be confused with > > no-iommu > > hmmm. I guess the confusion is due to the reuse of > vfio_iommufd_emulated_bind(). This is probabl y not a good direction > > Eg if you had a no_iommu_access value to store the access it would be > > fine and could serve as the 'this is no_iommu' flag > > So this no_iommu_access shall be created per iommufd bind, and call the > iommufd_access_create() with iommufd_access_ops. is it? If so, this is > not 100% the same with no_iommu flag as this flag is static after device > registration. Something like that, yes I don't think it is any real difference with the current flag, both are determined at the first ioctl when the iommufd is presented and both would state permanently until the fd close Jason
Re: [Intel-gfx] [PATCH v4 2/9] vfio-iommufd: Create iommufd_access for noiommu devices
On Sat, Apr 29, 2023 at 12:13:39AM +0800, Yi Liu wrote: > > Whoa, noiommu is inherently unsafe an only meant to expose the vfio > > device interface for userspace drivers that are going to do unsafe > > things regardless. Enabling noiommu to work with mdev, pin pages, or > > anything else should not be on our agenda. Userspaces relying on niommu > > get the minimum viable interface and must impose a minuscule > > incremental maintenance burden. The only reason we're spending so much > > effort on it here is to make iommufd noiommu support equivalent to > > group/container noiommu support. We should stop at that. Thanks, > > btw. I asked a question in [1] to check if we should allow attach/detach > on noiommu devices. Jason has replied it. If in future noiommu userspace > can pin page, then such userspace will need to attach/detach ioas. So I > made cdev series[2] to allow attach ioas on noiommu devices. Supporting > it from cdev day-1 may avoid probing if attach/detach is supported or > not for specific devices when adding pin page for noiommu userspace. > > But now, I think such a support will not in plan, is it? If so, will it > be better to disallow attach/detach on noiommu devices in patch [2]? > > [1] https://lore.kernel.org/kvm/zea+khh0tufst...@nvidia.com/ > [2] https://lore.kernel.org/kvm/20230426150321.454465-21-yi.l@intel.com/ If we block it then userspace has to act quite differently, I think we should keep it. My general idea to complete the no-iommu feature is to add a new IOCTL to VFIO that is 'pin iova and return dma addr' that no-iommu userspace would call instead of trying to abuse mlock and /proc/ to do it. That ioctl would use the IOAS attached to the access just like a mdev would do, so it has a real IOVA, but it is not a mdev. unmap callback just does nothing, as Alex says it is all still totally unsafe. This just allows it use the mm a little more properly and safely (eg mlock() doesn't set things like page_maybe_dma_pinned(), proc doesn't reject things like DAX and it currently doesn't make an adjustment for the PCI offset stuff..) So it would make DPDK a little more robust, portable and make the whole VFIO no-iommu feature much easier to use. To do that we need an iommufd access, an access ID and we need to link the current IOAS to the special access, like mdev, but in any mdev code paths. That creating the access ID solves the reset problem as well is a nice side effect and is the only part of this you should focus on for now.. Jason
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror
== Series Details ==
Series: drm/i915: fix kernel-doc warnings, enable kernel-doc -Werror
URL : https://patchwork.freedesktop.org/series/117207/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13097_full -> Patchwork_117207v1_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_117207v1_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_117207v1_full, please notify your bug team to allow
them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (7 -> 8)
--
Additional (1): shard-rkl0
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_117207v1_full:
### IGT changes ###
Possible regressions
* igt@perf_pmu@rc6-suspend:
- shard-apl: [PASS][1] -> [ABORT][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-apl6/igt@perf_...@rc6-suspend.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-apl6/igt@perf_...@rc6-suspend.html
Known issues
Here are the changes found in Patchwork_117207v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_barrier_race@remote-request@rcs0:
- shard-apl: [PASS][3] -> [ABORT][4] ([i915#7461] / [i915#8211] /
[i915#8234])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-apl7/igt@gem_barrier_race@remote-requ...@rcs0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-apl4/igt@gem_barrier_race@remote-requ...@rcs0.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-glk9/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271]) +37 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-glk9/igt@kms_ato...@plane-primary-overlay-mutable-zpos.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#3886]) +1
similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-glk9/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][8] -> [FAIL][9] ([i915#2346])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-glk8/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-glk4/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
*
igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271]) +37 similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-snb2/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scal...@pipe-b-vga-1.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#658])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-glk9/igt@kms_psr2...@overlay-primary-update-sf-dmg-area.html
Possible fixes
* igt@gem_ctx_isolation@preservation-s3@vcs1:
- {shard-dg1}:[DMESG-WARN][12] ([i915#4391]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-dg1-12/igt@gem_ctx_isolation@preservation...@vcs1.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-dg1-13/igt@gem_ctx_isolation@preservation...@vcs1.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- {shard-tglu}: [FAIL][14] ([i915#2842]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-tglu-5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-tglu-6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [ABORT][16] ([i915#5566]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-glk3/igt@gen9_exec_pa...@allowed-single.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117207v1/shard-glk9/igt@gen9_exec_pa...@allowed-single.html
* igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- {shard-dg1}:[FAIL][18] ([i915#3591]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-i...@vecs0.html
[19]:
https://inte
Re: [Intel-gfx] [PATCH v2 11/15] drm/i915: Initialize dkl_phy spin lock from display code path
On Tue, Apr 25, 2023 at 12:26:20PM -0700, José Roberto de Souza wrote:
> drm/i915: Initialize dkl_phy spin lock from display code path
double subject!
but I realized that this ended up in drm-intel-next like this as well
so I kept in here as well...
>
> Start moving the initialization of display locks from
> i915_driver_early_probe().
> Display locks should be initialized from display-only code paths.
>
> It was also agreed that if a variable is only used in one file, it
> should be initialized only in that file, so intel_dkl_phy_init() was
> added.
>
> v2:
> - added intel_display_locks_init()
>
> v3:
> - rebased
>
> v4:
> - dropped intel_display_locks_init()
>
> v5:
> - moved intel_dkl_phy_init() to the beginning of file
>
> Cc: intel-gfx@lists.freedesktop.org
> Cc: Rodrigo Vivi
> Cc: Ville Syrjälä
> Cc: Jani Nikula
> Cc: Maarten Lankhorst
> Reviewed-by: Lucas De Marchi
> Signed-off-by: José Roberto de Souza
> Link:
> https://patchwork.freedesktop.org/patch/msgid/20230420170558.35398-1-jose.so...@intel.com
> (cherry picked from commit bfa010f608491036327db20aad1d15e28da0189e)
> ---
> drivers/gpu/drm/i915/display/intel_display_driver.c | 2 ++
> drivers/gpu/drm/i915/display/intel_dkl_phy.c| 9 +
> drivers/gpu/drm/i915/display/intel_dkl_phy.h| 1 +
> drivers/gpu/drm/i915/i915_driver.c | 1 -
> 4 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
> b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 92c624f6d2ae7..95669ad1a7975 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -30,6 +30,7 @@
> #include "intel_display_driver.h"
> #include "intel_display_power.h"
> #include "intel_display_types.h"
> +#include "intel_dkl_phy.h"
> #include "intel_dmc.h"
> #include "intel_dp.h"
> #include "intel_dpll.h"
> @@ -177,6 +178,7 @@ void intel_display_driver_early_probe(struct
> drm_i915_private *i915)
> if (!HAS_DISPLAY(i915))
> return;
>
> + intel_dkl_phy_init(i915);
> intel_color_init_hooks(i915);
> intel_init_cdclk_hooks(i915);
> intel_audio_hooks_init(i915);
> diff --git a/drivers/gpu/drm/i915/display/intel_dkl_phy.c
> b/drivers/gpu/drm/i915/display/intel_dkl_phy.c
> index 57cc3edba0163..a001232ad445e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dkl_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_dkl_phy.c
> @@ -11,6 +11,15 @@
> #include "intel_dkl_phy.h"
> #include "intel_dkl_phy_regs.h"
>
> +/**
> + * intel_dkl_phy_init - initialize Dekel PHY
> + * @i915: i915 device instance
> + */
> +void intel_dkl_phy_init(struct drm_i915_private *i915)
> +{
> + spin_lock_init(&i915->display.dkl.phy_lock);
> +}
> +
> static void
> dkl_phy_set_hip_idx(struct drm_i915_private *i915, struct intel_dkl_phy_reg
> reg)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_dkl_phy.h
> b/drivers/gpu/drm/i915/display/intel_dkl_phy.h
> index 570ee36f9386f..5956ec3e940b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dkl_phy.h
> +++ b/drivers/gpu/drm/i915/display/intel_dkl_phy.h
> @@ -12,6 +12,7 @@
>
> struct drm_i915_private;
>
> +void intel_dkl_phy_init(struct drm_i915_private *i915);
> u32
> intel_dkl_phy_read(struct drm_i915_private *i915, struct intel_dkl_phy_reg
> reg);
> void
> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> index decaff25c36cf..a4e11a3c1842f 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -225,7 +225,6 @@ static int i915_driver_early_probe(struct
> drm_i915_private *dev_priv)
> mutex_init(&dev_priv->display.wm.wm_mutex);
> mutex_init(&dev_priv->display.pps.mutex);
> mutex_init(&dev_priv->display.hdcp.comp_mutex);
> - spin_lock_init(&dev_priv->display.dkl.phy_lock);
>
> i915_memcpy_init_early(dev_priv);
> intel_runtime_pm_init_early(&dev_priv->runtime_pm);
> --
> 2.40.0
>
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add support for MTL GSC SW Proxy (rev3)
== Series Details ==
Series: drm/i915: Add support for MTL GSC SW Proxy (rev3)
URL : https://patchwork.freedesktop.org/series/115806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13097_full -> Patchwork_115806v3_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
--
No changes in participating hosts
Known issues
Here are the changes found in Patchwork_115806v3_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-glk: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#4613])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-glk9/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [PASS][2] -> [ABORT][3] ([i915#5566])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-apl1/igt@gen9_exec_pa...@allowed-single.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-apl6/igt@gen9_exec_pa...@allowed-single.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [PASS][4] -> [DMESG-FAIL][5] ([i915#5334])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-apl3/igt@i915_selftest@live@gt_heartbeat.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-apl3/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271]) +37 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-glk9/igt@kms_ato...@plane-primary-overlay-mutable-zpos.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#3886]) +1
similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-glk9/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp1:
- shard-apl: [PASS][8] -> [FAIL][9] ([i915#79])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-apl1/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-dp1.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-apl1/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-dp1.html
*
igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271]) +38 similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-snb4/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scal...@pipe-b-vga-1.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#658])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-glk9/igt@kms_psr2...@overlay-primary-update-sf-dmg-area.html
* igt@kms_vblank@pipe-c-accuracy-idle:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#43])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-glk7/igt@kms_vbl...@pipe-c-accuracy-idle.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-glk3/igt@kms_vbl...@pipe-c-accuracy-idle.html
Possible fixes
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- {shard-rkl}:[FAIL][14] ([i915#7742]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
* igt@gem_ctx_isolation@preservation-s3@vcs1:
- {shard-dg1}:[DMESG-WARN][16] ([i915#4391]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-dg1-12/igt@gem_ctx_isolation@preservation...@vcs1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-dg1-12/igt@gem_ctx_isolation@preservation...@vcs1.html
* igt@gem_eio@reset-stress:
- {shard-dg1}:[FAIL][18] ([i915#5784]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-dg1-12/igt@gem_...@reset-stress.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-dg1-17/igt@gem_...@reset-stress.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [FAIL][20] ([i915#2842]) -> [PASS][21]
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13097/shard-apl1/igt@gem_exec_fair@basic-pace-s...@rcs0.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115806v3/shard-apl2/igt@gem_exec_fair@basic-pace-s...@rcs0.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [ABORT][22] ([i9
Re: [Intel-gfx] [RFC PATCH] x86/mm: Fix PAT bit missing from page protection modify mask
Hi,
a kind reminder on this patch, would be fantastic if anyone from
the x86 maintainers cha give it a look.
The patch has been tested thoroughly and even if it's marked as
an RFC in my opinion it can be already considered for a proper
review.
Thanks,
Andi
On Mon, Apr 24, 2023 at 02:35:24PM +0200, Janusz Krzysztofik wrote:
> Visible glitches have been observed when running graphics applications on
> Linux under Xen hypervisor. Those observations have been confirmed with
> failures from kms_pwrite_crc Intel GPU test that verifies data coherency
> of DRM frame buffer objects using hardware CRC checksums calculated by
> display controllers, exposed to userspace via debugfs. Affected
> processing paths have then been identified with new test variants that
> mmap the objects using different methods and caching modes.
>
> When running as a Xen PV guest, Linux uses Xen provided PAT configuration
> which is different from its native one. In particular, Xen specific PTE
> encoding of write-combining caching, likely used by graphics applications,
> differs from the Linux default one found among statically defined minimal
> set of supported modes. Since Xen defines PTE encoding of the WC mode as
> _PAGE_PAT, it no longer belongs to the minimal set, depends on correct
> handling of _PAGE_PAT bit, and can be mismatched with write-back caching.
>
> When a user calls mmap() for a DRM buffer object, DRM device specific
> .mmap file operation, called from mmap_region(), takes care of setting PTE
> encoding bits in a vm_page_prot field of an associated virtual memory area
> structure. Unfortunately, _PAGE_PAT bit is not preserved when the vma's
> .vm_flags are then applied to .vm_page_prot via vm_set_page_prot(). Bits
> to be preserved are determined with _PAGE_CHG_MASK symbol that doesn't
> cover _PAGE_PAT. As a consequence, WB caching is requested instead of WC
> when running under Xen (also, WP is silently changed to WT, and UC
> downgraded to UC_MINUS). When running on bare metal, WC is not affected,
> but WP and WT extra modes are unintentionally replaced with WC and UC,
> respectively.
>
> WP and WT modes, encoded with _PAGE_PAT bit set, were introduced by commit
> 281d4078bec3 ("x86: Make page cache mode a real type"). Care was taken
> to extend _PAGE_CACHE_MASK symbol with that additional bit, but that
> symbol has never been used for identification of bits preserved when
> applying page protection flags. Support for all cache modes under Xen,
> including the problematic WC mode, was then introduced by commit
> 47591df50512 ("xen: Support Xen pv-domains using PAT").
>
> Extend bitmask used by pgprot_modify() for selecting bits to be preserved
> with _PAGE_PAT bit. However, since that bit can be reused as _PAGE_PSE,
> and the _PAGE_CHG_MASK symbol, primarly used by pte_modify(), is likely
> intentionally defined with that bit not set, keep that symbol unchanged.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7648
> Fixes: 281d4078bec3 ("x86: Make page cache mode a real type")
> Signed-off-by: Janusz Krzysztofik
> Cc: sta...@vger.kernel.org # v3.19+
> ---
> arch/x86/include/asm/pgtable.h | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
> index 7425f32e52932..f797f8da2e5b6 100644
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -654,8 +654,10 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t
> newprot)
> #define pgprot_modify pgprot_modify
> static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
> {
> - pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
> - pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
> + unsigned long mask = _PAGE_CHG_MASK | _PAGE_CACHE_MASK;
> +
> + pgprotval_t preservebits = pgprot_val(oldprot) & mask;
> + pgprotval_t addbits = pgprot_val(newprot) & ~mask;
> return __pgprot(preservebits | addbits);
> }
>
> --
> 2.40.0
[Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEM_CREATE_EXTENSIONS query item
Cc: Fei Yang
Cc: Tvrtko Ursulin
Cc: Joonas Lahtinen
Cc: Daniel Vetter
Signed-off-by: Jordan Justen
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 30 ++
drivers/gpu/drm/i915/gem/i915_gem_create.h | 2 ++
drivers/gpu/drm/i915/i915_query.c | 36 ++
include/uapi/drm/i915_drm.h| 2 ++
4 files changed, 70 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index bfe1dbda4cb7..56342a352599 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -399,6 +399,36 @@ static const i915_user_extension_fn create_extensions[] = {
[I915_GEM_CREATE_EXT_PROTECTED_CONTENT] = ext_set_protected,
};
+/**
+ * Fills buffer will known create_ext extensions
+ * @buffer: buffer to fill with extensions
+ * @buffer_size: size of the buffer in bytes
+ *
+ * If @buffer_size is 0, then @buffer is not accessed, and the
+ * required buffer size is returned.
+ *
+ * If @buffer_size != 0, but not large enough, then -EINVAL is
+ * returned.
+ *
+ * If @buffer_size is large enough, then @buffer will be filled as a
+ * u64 array of extension names.
+ */
+int
+i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size)
+{
+ unsigned int i;
+
+ if (buffer_size == 0)
+ return ARRAY_SIZE(create_extensions) * sizeof(u64);
+ else if (buffer_size < (ARRAY_SIZE(create_extensions) * sizeof(u64)))
+ return -EINVAL;
+
+ for (i = 0; i < ARRAY_SIZE(create_extensions); i++)
+ ((u64*)buffer)[i] = i;
+
+ return ARRAY_SIZE(create_extensions) * sizeof(u64);
+}
+
/**
* i915_gem_create_ext_ioctl - Creates a new mm object and returns a handle to
it.
* @dev: drm device pointer
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.h
b/drivers/gpu/drm/i915/gem/i915_gem_create.h
index 9536aa906001..e7ebef308038 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.h
@@ -14,4 +14,6 @@ int i915_gem_dumb_create(struct drm_file *file_priv,
struct drm_device *dev,
struct drm_mode_create_dumb *args);
+int i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size);
+
#endif /* __I915_GEM_CREATE_H__ */
diff --git a/drivers/gpu/drm/i915/i915_query.c
b/drivers/gpu/drm/i915/i915_query.c
index 00871ef99792..f360f76516de 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -9,6 +9,7 @@
#include "i915_drv.h"
#include "i915_perf.h"
#include "i915_query.h"
+#include "gem/i915_gem_create.h"
#include "gt/intel_engine_user.h"
#include
@@ -551,6 +552,40 @@ static int query_hwconfig_blob(struct drm_i915_private
*i915,
return hwconfig->size;
}
+static int query_gem_create_extensions(struct drm_i915_private *i915,
+ struct drm_i915_query_item *query_item)
+{
+ void *buffer;
+ int buffer_size, fill_size;
+
+ buffer_size = i915_gem_create_ext_get_extensions(NULL, 0);
+
+ if (query_item->length == 0)
+ return buffer_size;
+
+ if (query_item->length < buffer_size)
+ return -EINVAL;
+
+ buffer = kzalloc(buffer_size, GFP_KERNEL);
+ if (!buffer)
+ return -ENOMEM;
+
+ fill_size = i915_gem_create_ext_get_extensions(buffer, buffer_size);
+ if (fill_size != buffer_size) {
+ kfree(buffer);
+ return -EINVAL;
+ }
+
+ if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
+buffer, buffer_size)) {
+ kfree(buffer);
+ return -EFAULT;
+ }
+
+ kfree(buffer);
+ return buffer_size;
+}
+
static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
struct drm_i915_query_item *query_item)
= {
query_topology_info,
@@ -559,6 +594,7 @@ static int (* const i915_query_funcs[])(struct
drm_i915_private *dev_priv,
query_memregion_info,
query_hwconfig_blob,
query_geometry_subslices,
+ query_gem_create_extensions,
};
int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index dba7c5a5b25e..46be28ee3795 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -2963,6 +2963,7 @@ struct drm_i915_query_item {
* - %DRM_I915_QUERY_MEMORY_REGIONS (see struct
drm_i915_query_memory_regions)
* - %DRM_I915_QUERY_HWCONFIG_BLOB (see `GuC HWCONFIG blob uAPI`)
* - %DRM_I915_QUERY_GEOMETRY_SUBSLICES (see struct
drm_i915_query_topology_info)
+* - %DRM_I915_QUERY_GEM_CREATE_EXTENSIONS (u64 array of known
DRM_I915_GEM_CREATE_EXT extensions)
*/
__u64 query_id;
#define DRM_I915_QUERY_TOP
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/uapi: Add DRM_I915_QUERY_GEM_CREATE_EXTENSIONS query item
== Series Details == Series: drm/i915/uapi: Add DRM_I915_QUERY_GEM_CREATE_EXTENSIONS query item URL : https://patchwork.freedesktop.org/series/117214/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh DESCEND objtool INSTALL libsubcmd_headers LD [M] drivers/gpu/drm/i915/i915.o LD [M] drivers/gpu/drm/i915/kvmgt.o HDRTEST drivers/gpu/drm/i915/gem/i915_gem_create.h In file included from : ./drivers/gpu/drm/i915/gem/i915_gem_create.h:17:54: error: unknown type name ‘size_t’ 17 | int i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size); | ^~ ./drivers/gpu/drm/i915/gem/i915_gem_create.h:1:1: note: ‘size_t’ is defined in header ‘’; did you forget to ‘#include ’? +++ |+#include 1 | /* SPDX-License-Identifier: MIT */ make[5]: *** [drivers/gpu/drm/i915/Makefile:398: drivers/gpu/drm/i915/gem/i915_gem_create.hdrtest] Error 1 make[4]: *** [scripts/Makefile.build:494: drivers/gpu/drm/i915] Error 2 make[3]: *** [scripts/Makefile.build:494: drivers/gpu/drm] Error 2 make[2]: *** [scripts/Makefile.build:494: drivers/gpu] Error 2 make[1]: *** [scripts/Makefile.build:494: drivers] Error 2 make: *** [Makefile:2025: .] Error 2 Build failed, no error log produced
[Intel-gfx] [PATCH v3 1/6] drm/i915/guc: Decode another GuC load failure case
From: John Harrison
Explain another potential firmware failure mode and early exit the
long wait if hit.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
index bcb1129b36102..dabeaf4f245f3 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
@@ -44,6 +44,7 @@ enum intel_guc_load_status {
enum intel_bootrom_load_status {
INTEL_BOOTROM_STATUS_NO_KEY_FOUND = 0x13,
INTEL_BOOTROM_STATUS_AES_PROD_KEY_FOUND = 0x1A,
+ INTEL_BOOTROM_STATUS_PROD_KEY_CHECK_FAILURE = 0x2B,
INTEL_BOOTROM_STATUS_RSA_FAILED = 0x50,
INTEL_BOOTROM_STATUS_PAVPC_FAILED = 0x73,
INTEL_BOOTROM_STATUS_WOPCM_FAILED = 0x74,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 6fda3aec5c66a..0ff088a5e51a8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -129,6 +129,7 @@ static inline bool guc_load_done(struct intel_uncore
*uncore, u32 *status, bool
case INTEL_BOOTROM_STATUS_RC6CTXCONFIG_FAILED:
case INTEL_BOOTROM_STATUS_MPUMAP_INCORRECT:
case INTEL_BOOTROM_STATUS_EXCEPTION:
+ case INTEL_BOOTROM_STATUS_PROD_KEY_CHECK_FAILURE:
*success = false;
return true;
}
@@ -219,6 +220,11 @@ static int guc_wait_ucode(struct intel_guc *guc)
guc_info(guc, "firmware signature verification
failed\n");
ret = -ENOEXEC;
break;
+
+ case INTEL_BOOTROM_STATUS_PROD_KEY_CHECK_FAILURE:
+ guc_info(guc, "firmware production part check
failure\n");
+ ret = -ENOEXEC;
+ break;
}
switch (ukernel) {
--
2.39.1
[Intel-gfx] [PATCH v3 0/6] Improvements to uc firmare management
From: John Harrison Enhance the firmware table verification code to catch more potential errors and to generally improve the code itself. Track patch level version even on reduced version files to allow user notification of missing bug fixes. Detect another immediate failure case when loading GuC firmware. Treat more problems as fatal errors, at least for DEBUG builds. v2: Use correct patch version number, drop redundant debug print fail load on table validation error (review by Daniele / CI results). v3: Fix spelling typos, use a new bool for invalid firmware tables rather than a status enum (review feedback from Daniele). Signed-off-by: John Harrison John Harrison (6): drm/i915/guc: Decode another GuC load failure case drm/i915/guc: Print status register when waiting for GuC to load drm/i915/uc: Track patch level versions on reduced version firmware files drm/i915/uc: Enhancements to firmware table validation drm/i915/uc: Reject duplicate entries in firmware table drm/i915/uc: Make unexpected firmware versions an error in debug builds .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 12 +- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 3 + drivers/gpu/drm/i915/gt/uc/intel_uc.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 227 +++--- 5 files changed, 160 insertions(+), 84 deletions(-) -- 2.39.1
[Intel-gfx] [PATCH v3 3/6] drm/i915/uc: Track patch level versions on reduced version firmware files
From: John Harrison
When reduced version firmware files were added (matching major
component being the only strict requirement), the minor version was
still tracked and a notification reported if it was older. However,
the patch version should really be tracked as well for the same
reasons. The KMD can work without the change but if the effort has
been taken to release a new firmware with the change then there must
be a valid reason for doing so - important bug fix, security fix, etc.
And in that case it would be good to alert the user if they are
missing out on that new fix.
v2: Use correct patch version number and drop redunant debug print
(review by Daniele / CI results).
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 30 +++-
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 6b71b9febd74c..55e50bd08d7ff 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -80,14 +80,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
*/
#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \
fw_def(METEORLAKE, 0, guc_mmp(mtl, 70, 6, 5)) \
- fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \
- fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \
+ fw_def(DG2, 0, guc_maj(dg2, 70, 5, 1)) \
+ fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5, 1)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \
- fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \
+ fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5, 1)) \
fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \
fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \
- fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \
+ fw_def(DG1, 0, guc_maj(dg1, 70, 5, 1)) \
fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \
fw_def(TIGERLAKE,0, guc_mmp(tgl, 70, 1, 1)) \
fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \
@@ -141,7 +141,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
__stringify(patch_) ".bin"
/* Minor for internal driver use, not part of file name */
-#define MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_) \
+#define MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_, patch_) \
__MAKE_UC_FW_PATH_MAJOR(prefix_, "guc", major_)
#define MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \
@@ -197,9 +197,9 @@ struct __packed uc_fw_blob {
{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
.legacy = true }
-#define GUC_FW_BLOB(prefix_, major_, minor_) \
- UC_FW_BLOB_NEW(major_, minor_, 0, false, \
- MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_))
+#define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \
+ UC_FW_BLOB_NEW(major_, minor_, patch_, false, \
+ MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_, patch_))
#define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
UC_FW_BLOB_OLD(major_, minor_, patch_, \
@@ -296,6 +296,7 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct
intel_uc_fw *uc_fw)
uc_fw->file_wanted.path = blob->path;
uc_fw->file_wanted.ver.major = blob->major;
uc_fw->file_wanted.ver.minor = blob->minor;
+ uc_fw->file_wanted.ver.patch = blob->patch;
uc_fw->loaded_via_gsc = blob->loaded_via_gsc;
found = true;
break;
@@ -794,6 +795,9 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
} else {
if (uc_fw->file_selected.ver.minor <
uc_fw->file_wanted.ver.minor)
old_ver = true;
+ else if ((uc_fw->file_selected.ver.minor ==
uc_fw->file_wanted.ver.minor) &&
+(uc_fw->file_selected.ver.patch <
uc_fw->file_wanted.ver.patch))
+ old_ver = true;
}
}
@@ -801,12 +805,16 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
/* Preserve the version that was really wanted */
memcpy(&uc_fw->file_wanted, &file_ideal,
sizeof(uc_fw->file_wanted));
- gt_notice(gt, "%s firmware %s (%d.%d) is recommended, but only
%s (%d.%d) was found\n",
+ gt_notice(gt, "%s firmware %s (%d.%d.%d) is recommended, but
only %s (%d.%d.%d) was found\n",
intel_uc_fw_type_repr(uc_fw->type),
uc_fw->file_wanted.path,
- uc_fw->file_wanted.ver.major,
uc_fw->file_wanted.ver.minor,
+ uc_fw->file_wanted.ver.major,
+ uc_fw->file_wanted.ver.minor,
+ uc_fw->file_wanted.ver.patch,
[Intel-gfx] [PATCH v3 4/6] drm/i915/uc: Enhancements to firmware table validation
From: John Harrison
The validation of the firmware table was being done inside the code
for scanning the table for the next available firmware blob. Which is
unnecessary. So pull it out into a separate function that is only
called once per blob type at init time.
Also, drop the CONFIG_SELFTEST requirement and make errors terminal.
It was mentioned that potential issues with backports would not be
caught by regular pre-merge CI as that only occurs on tip not stable
branches. Making the validation unconditional and failing driver load
on detecting of a problem ensures that such backports will also be
validated correctly.
This requires adding a firmware global flag to indicate an issue with
any of the per firmware tables. This is done rather than adding a new
state enum as a new enum value would be a much more invasive change -
lots of places would need updating to support the new error state.
Note also that this change means that a table error will cause the
driver to wedge even on platforms that don't require firmware files.
This is intentional as per the above backport concern - someone doing
backports is not guaranteed to test on every platform that they may
potential affect. So forcing a failure on all platforms ensures that
the problem will be noticed and corrected immediately.
v2: Change to unconditionally fail module load on a validation error
(review feedback/discussion with Daniele).
v3: Add a new flag to track table validation errors (review
feedback/discussion with Daniele).
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c| 3 +
drivers/gpu/drm/i915/gt/uc/intel_uc.h| 1 +
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 161 +--
3 files changed, 99 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 996168312340e..1381943b8973d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -432,6 +432,9 @@ static bool uc_is_wopcm_locked(struct intel_uc *uc)
static int __uc_check_hw(struct intel_uc *uc)
{
+ if (uc->fw_table_invalid)
+ return -EIO;
+
if (!intel_uc_supports_guc(uc))
return 0;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
index 5d0f1bcc381e8..d585524d94deb 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
@@ -36,6 +36,7 @@ struct intel_uc {
struct drm_i915_gem_object *load_err_log;
bool reset_in_progress;
+ bool fw_table_invalid;
};
void intel_uc_init_early(struct intel_uc *uc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 55e50bd08d7ff..64e19688788d1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -233,20 +233,22 @@ struct fw_blobs_by_type {
u32 count;
};
+static const struct uc_fw_platform_requirement blobs_guc[] = {
+ INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, GUC_FW_BLOB_MMP)
+};
+
+static const struct uc_fw_platform_requirement blobs_huc[] = {
+ INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, HUC_FW_BLOB_MMP,
HUC_FW_BLOB_GSC)
+};
+
+static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = {
+ [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
+ [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) },
+};
+
static void
__uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
{
- static const struct uc_fw_platform_requirement blobs_guc[] = {
- INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB,
GUC_FW_BLOB_MMP)
- };
- static const struct uc_fw_platform_requirement blobs_huc[] = {
- INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB,
HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC)
- };
- static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] =
{
- [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
- [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) },
- };
- static bool verified[INTEL_UC_FW_NUM_TYPES];
const struct uc_fw_platform_requirement *fw_blobs;
enum intel_platform p = INTEL_INFO(i915)->platform;
u32 fw_count;
@@ -286,6 +288,11 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct
intel_uc_fw *uc_fw)
continue;
if (uc_fw->file_selected.path) {
+ /*
+* Continuing an earlier search after a found blob
failed to load.
+* Once the previously chosen path has been found,
clear it out
+* and let the search continue from there.
+*/
if (uc_fw->file_selected.path == blob->path)
[Intel-gfx] [PATCH v3 5/6] drm/i915/uc: Reject duplicate entries in firmware table
From: John Harrison
It was noticed that duplicate entries in the firmware table could cause
an infinite loop in the firmware loading code if that entry failed to
load. Duplicate entries are a bug anyway and so should never happen.
Ensure they don't by tweaking the table validation code to reject
duplicates.
For full m/m/p files, that can be done by simply tweaking the patch
level check to reject matching values. For reduced version entries,
the filename itself must be compared.
v2: Improve comment (review by Daniele)
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 26 +---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 64e19688788d1..010c049609102 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -319,7 +319,7 @@ static bool validate_fw_table_type(struct drm_i915_private
*i915, enum intel_uc_
{
const struct uc_fw_platform_requirement *fw_blobs;
u32 fw_count;
- int i;
+ int i, j;
if (type >= ARRAY_SIZE(blobs_all)) {
drm_err(&i915->drm, "No blob array for %s\n",
intel_uc_fw_type_repr(type));
@@ -334,6 +334,26 @@ static bool validate_fw_table_type(struct drm_i915_private
*i915, enum intel_uc_
/* make sure the list is ordered as expected */
for (i = 1; i < fw_count; i++) {
+ /* Versionless file names must be unique per platform: */
+ for (j = i + 1; j < fw_count; j++) {
+ /* Same platform? */
+ if (fw_blobs[i].p != fw_blobs[j].p)
+ continue;
+
+ if (fw_blobs[i].blob.path != fw_blobs[j].blob.path)
+ continue;
+
+ drm_err(&i915->drm, "Duplicate %s blobs: %s r%u
%s%d.%d.%d [%s] matches %s%d.%d.%d [%s]\n",
+ intel_uc_fw_type_repr(type),
+ intel_platform_name(fw_blobs[j].p),
fw_blobs[j].rev,
+ fw_blobs[j].blob.legacy ? "L" : "v",
+ fw_blobs[j].blob.major, fw_blobs[j].blob.minor,
+ fw_blobs[j].blob.patch, fw_blobs[j].blob.path,
+ fw_blobs[i].blob.legacy ? "L" : "v",
+ fw_blobs[i].blob.major, fw_blobs[i].blob.minor,
+ fw_blobs[i].blob.patch, fw_blobs[i].blob.path);
+ }
+
/* Next platform is good: */
if (fw_blobs[i].p < fw_blobs[i - 1].p)
continue;
@@ -377,8 +397,8 @@ static bool validate_fw_table_type(struct drm_i915_private
*i915, enum intel_uc_
if (fw_blobs[i].blob.minor != fw_blobs[i - 1].blob.minor)
goto bad;
- /* Patch versions must be in order: */
- if (fw_blobs[i].blob.patch <= fw_blobs[i - 1].blob.patch)
+ /* Patch versions must be in order and unique: */
+ if (fw_blobs[i].blob.patch < fw_blobs[i - 1].blob.patch)
continue;
bad:
--
2.39.1
[Intel-gfx] [PATCH v3 2/6] drm/i915/guc: Print status register when waiting for GuC to load
From: John Harrison If the GuC load is taking an excessively long time, the wait loop currently prints the GT frequency. Extend that to include the GuC status as well so we can see if the GuC is actually making progress or not. Signed-off-by: John Harrison Reviewed-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c index 0ff088a5e51a8..364d0d546ec82 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c @@ -191,8 +191,10 @@ static int guc_wait_ucode(struct intel_guc *guc) if (!ret || !success) break; - guc_dbg(guc, "load still in progress, count = %d, freq = %dMHz\n", - count, intel_rps_read_actual_frequency(&uncore->gt->rps)); + guc_dbg(guc, "load still in progress, count = %d, freq = %dMHz, status = 0x%08X [0x%02X/%02X]\n", + count, intel_rps_read_actual_frequency(&uncore->gt->rps), status, + REG_FIELD_GET(GS_BOOTROM_MASK, status), + REG_FIELD_GET(GS_UKERNEL_MASK, status)); } after = ktime_get(); delta = ktime_sub(after, before); -- 2.39.1
[Intel-gfx] [PATCH v3 6/6] drm/i915/uc: Make unexpected firmware versions an error in debug builds
From: John Harrison
If the DEBUG_GEM config option is set then escalate the 'unexpected
firmware version' message from a notice to an error. This will ensure
that the CI system treats such occurences as a failure and logs a bug
about it (or fails the pre-merge testing).
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 34 ++--
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 010c049609102..41ebd0ee0bb5e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -17,6 +17,12 @@
#include "i915_drv.h"
#include "i915_reg.h"
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
+#define UNEXPECTED gt_err
+#else
+#define UNEXPECTED gt_notice
+#endif
+
static inline struct intel_gt *
uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type)
{
@@ -833,10 +839,10 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
if (uc_fw->file_wanted.ver.major && uc_fw->file_selected.ver.major) {
/* Check the file's major version was as it claimed */
if (uc_fw->file_selected.ver.major !=
uc_fw->file_wanted.ver.major) {
- gt_notice(gt, "%s firmware %s: unexpected version:
%u.%u != %u.%u\n",
- intel_uc_fw_type_repr(uc_fw->type),
uc_fw->file_selected.path,
- uc_fw->file_selected.ver.major,
uc_fw->file_selected.ver.minor,
- uc_fw->file_wanted.ver.major,
uc_fw->file_wanted.ver.minor);
+ UNEXPECTED(gt, "%s firmware %s: unexpected version:
%u.%u != %u.%u\n",
+ intel_uc_fw_type_repr(uc_fw->type),
uc_fw->file_selected.path,
+ uc_fw->file_selected.ver.major,
uc_fw->file_selected.ver.minor,
+ uc_fw->file_wanted.ver.major,
uc_fw->file_wanted.ver.minor);
if (!intel_uc_fw_is_overridden(uc_fw)) {
err = -ENOEXEC;
goto fail;
@@ -854,16 +860,16 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
/* Preserve the version that was really wanted */
memcpy(&uc_fw->file_wanted, &file_ideal,
sizeof(uc_fw->file_wanted));
- gt_notice(gt, "%s firmware %s (%d.%d.%d) is recommended, but
only %s (%d.%d.%d) was found\n",
- intel_uc_fw_type_repr(uc_fw->type),
- uc_fw->file_wanted.path,
- uc_fw->file_wanted.ver.major,
- uc_fw->file_wanted.ver.minor,
- uc_fw->file_wanted.ver.patch,
- uc_fw->file_selected.path,
- uc_fw->file_selected.ver.major,
- uc_fw->file_selected.ver.minor,
- uc_fw->file_selected.ver.patch);
+ UNEXPECTED(gt, "%s firmware %s (%d.%d.%d) is recommended, but
only %s (%d.%d.%d) was found\n",
+ intel_uc_fw_type_repr(uc_fw->type),
+ uc_fw->file_wanted.path,
+ uc_fw->file_wanted.ver.major,
+ uc_fw->file_wanted.ver.minor,
+ uc_fw->file_wanted.ver.patch,
+ uc_fw->file_selected.path,
+ uc_fw->file_selected.ver.major,
+ uc_fw->file_selected.ver.minor,
+ uc_fw->file_selected.ver.patch);
gt_info(gt, "Consider updating your linux-firmware pkg or
downloading from %s\n",
INTEL_UC_FIRMWARE_URL);
}
--
2.39.1
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Improvements to uc firmare management (rev5)
== Series Details == Series: Improvements to uc firmare management (rev5) URL : https://patchwork.freedesktop.org/series/116517/ State : warning == Summary == Error: dim checkpatch failed ac121650f88b drm/i915/guc: Decode another GuC load failure case dfb69d74ee3f drm/i915/guc: Print status register when waiting for GuC to load 7c31ad126307 drm/i915/uc: Track patch level versions on reduced version firmware files -:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'major_' - possible side-effects? #62: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:200: +#define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ + UC_FW_BLOB_NEW(major_, minor_, patch_, false, \ + MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_, patch_)) -:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'minor_' - possible side-effects? #62: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:200: +#define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ + UC_FW_BLOB_NEW(major_, minor_, patch_, false, \ + MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_, patch_)) -:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'patch_' - possible side-effects? #62: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:200: +#define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ + UC_FW_BLOB_NEW(major_, minor_, patch_, false, \ + MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_, patch_)) total: 0 errors, 0 warnings, 3 checks, 73 lines checked d7ac412aab55 drm/i915/uc: Enhancements to firmware table validation f7f70436f73b drm/i915/uc: Reject duplicate entries in firmware table 533b68d27af4 drm/i915/uc: Make unexpected firmware versions an error in debug builds
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Improvements to uc firmare management (rev5)
== Series Details == Series: Improvements to uc firmare management (rev5) URL : https://patchwork.freedesktop.org/series/116517/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✓ Fi.CI.BAT: success for Improvements to uc firmare management (rev5)
== Series Details ==
Series: Improvements to uc firmare management (rev5)
URL : https://patchwork.freedesktop.org/series/116517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13098 -> Patchwork_116517v5
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/index.html
Participating hosts (39 -> 37)
--
Missing(2): fi-kbl-soraka fi-snb-2520m
Known issues
Here are the changes found in Patchwork_116517v5 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: [PASS][1] -> [ABORT][2] ([i915#6687] / [i915#7978] /
[i915#8407])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][3] ([i915#1845] / [i915#5354])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [PASS][4] -> [FAIL][5] ([i915#7932]) +1 similar issue
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
Possible fixes
* igt@i915_selftest@live@requests:
- {bat-mtlp-8}: [DMESG-FAIL][6] -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/bat-mtlp-8/igt@i915_selftest@l...@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#8407]: https://gitlab.freedesktop.org/drm/intel/issues/8407
Build changes
-
* Linux: CI_DRM_13098 -> Patchwork_116517v5
CI-20190529: 20190529
CI_DRM_13098: 1b2487d0f24450f2a330f44f204a22fd4e31a403 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116517v5: 1b2487d0f24450f2a330f44f204a22fd4e31a403 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
8f6807ecb4af drm/i915/uc: Make unexpected firmware versions an error in debug
builds
74063cf7046d drm/i915/uc: Reject duplicate entries in firmware table
d7a551d8b439 drm/i915/uc: Enhancements to firmware table validation
6c672cf7c741 drm/i915/uc: Track patch level versions on reduced version
firmware files
fe6f31681db6 drm/i915/guc: Print status register when waiting for GuC to load
bb117a08632b drm/i915/guc: Decode another GuC load failure case
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/index.html
[Intel-gfx] ✓ Fi.CI.IGT: success for Improvements to uc firmare management (rev5)
== Series Details ==
Series: Improvements to uc firmare management (rev5)
URL : https://patchwork.freedesktop.org/series/116517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13098_full -> Patchwork_116517v5_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_116517v5_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_big_fb@linear-32bpp-rotate-180:
- {shard-dg1}:[PASS][1] -> [DMESG-WARN][2] +2 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-dg1-13/igt@kms_big...@linear-32bpp-rotate-180.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-dg1-15/igt@kms_big...@linear-32bpp-rotate-180.html
Known issues
Here are the changes found in Patchwork_116517v5_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [PASS][3] -> [FAIL][4] ([i915#2842])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-apl3/igt@gem_exec_fair@basic-none-s...@rcs0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-apl4/igt@gem_exec_fair@basic-none-s...@rcs0.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-glk2/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271]) +39 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-glk2/igt@kms_ato...@plane-primary-overlay-mutable-zpos.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#3886]) +1
similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-glk2/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-random-ccs-data-4_tiled_dg2_rc_ccs:
- shard-apl: NOTRUN -> [SKIP][8] ([fdo#109271]) +5 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-apl7/igt@kms_ccs@pipe-d-random-ccs-data-4_tiled_dg2_rc_ccs.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-snb: NOTRUN -> [DMESG-WARN][9] ([i915#5090])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-snb1/igt@kms_flip@flip-vs-susp...@b-hdmi-a1.html
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-dp-1:
- shard-apl: NOTRUN -> [FAIL][10] ([i915#4573]) +1 similar issue
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-apl7/igt@kms_plane_alpha_blend@constant-alpha-...@pipe-c-dp-1.html
*
igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][11] ([fdo#109271]) +33 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-snb4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-...@pipe-a-vga-1.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#658])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-glk2/igt@kms_psr2...@overlay-primary-update-sf-dmg-area.html
Possible fixes
* igt@gem_barrier_race@remote-request@rcs0:
- shard-apl: [ABORT][13] ([i915#7461] / [i915#8211] / [i915#8234])
-> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-apl2/igt@gem_barrier_race@remote-requ...@rcs0.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-apl7/igt@gem_barrier_race@remote-requ...@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- {shard-rkl}:[FAIL][15] ([i915#2842]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-rkl-6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-rkl-6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_exec_whisper@basic-fds-forked-all:
- {shard-tglu}: [INCOMPLETE][17] ([i915#6755] / [i915#7392]) ->
[PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-tglu-3/igt@gem_exec_whis...@basic-fds-forked-all.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116517v5/shard-tglu-4/igt@gem_exec_whis...@basic-fds-forked-all
[Intel-gfx] [PATCH] drm/i915/hdcp: Check if media_gt exists
Check if media_gt exists if we are using gsc cs
--v2
-correct typo [Ankit]
-assign gsc variable if gt exists [Ankit]
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
Reviewed-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 650232c4892b..a7faafd1dcc5 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -205,7 +205,7 @@ bool intel_hdcp2_capable(struct intel_connector *connector)
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
struct intel_gt *gt = dev_priv->media_gt;
- struct intel_gsc_uc *gsc = >->uc.gsc;
+ struct intel_gsc_uc *gsc;
bool capable = false;
/* I915 support for HDCP2.2 */
@@ -213,9 +213,11 @@ bool intel_hdcp2_capable(struct intel_connector *connector)
return false;
/* If MTL+ make sure gsc is loaded and proxy is setup */
- if (intel_hdcp_gsc_cs_required(dev_priv))
- if (!intel_uc_fw_is_running(&gsc->fw))
+ if (intel_hdcp_gsc_cs_required(dev_priv)) {
+ gsc = gt ? >->uc.gsc : NULL;
+ if (!gsc || !intel_uc_fw_is_running(&gsc->fw))
return false;
+ }
/* MEI/GSC interface is solid depending on which is used */
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
--
2.25.1
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEM_CREATE_EXTENSIONS query item
Hi Jordan, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Jordan-Justen/drm-i915-uapi-Add-DRM_I915_QUERY_GEM_CREATE_EXTENSIONS-query-item/20230503-050014 base: git://anongit.freedesktop.org/drm/drm-tip drm-tip patch link: https://lore.kernel.org/r/20230502205744.1067094-1-jordan.l.justen%40intel.com patch subject: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEM_CREATE_EXTENSIONS query item config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20230503/202305030956.nfo16yos-...@intel.com/config) compiler: gcc-11 (Debian 11.3.0-12) 11.3.0 reproduce (this is a W=1 build): # https://github.com/intel-lab-lkp/linux/commit/1154a573531c350e27ca98fd4b4e8da7352f849e git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Jordan-Justen/drm-i915-uapi-Add-DRM_I915_QUERY_GEM_CREATE_EXTENSIONS-query-item/20230503-050014 git checkout 1154a573531c350e27ca98fd4b4e8da7352f849e # save the config file mkdir build_dir && cp config build_dir/.config make W=1 O=build_dir ARCH=i386 olddefconfig make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot | Link: https://lore.kernel.org/oe-kbuild-all/202305030956.nfo16yos-...@intel.com/ All errors (new ones prefixed by >>): In file included from : >> drivers/gpu/drm/i915/gem/i915_gem_create.h:17:54: error: unknown type name >> 'size_t' 17 | int i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size); | ^~ drivers/gpu/drm/i915/gem/i915_gem_create.h:1:1: note: 'size_t' is defined in header ''; did you forget to '#include '? +++ |+#include 1 | /* SPDX-License-Identifier: MIT */ vim +/size_t +17 drivers/gpu/drm/i915/gem/i915_gem_create.h 12 13 int i915_gem_dumb_create(struct drm_file *file_priv, 14 struct drm_device *dev, 15 struct drm_mode_create_dumb *args); 16 > 17 int i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size); 18 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: Check if media_gt exists (rev2)
== Series Details ==
Series: drm/i915/hdcp: Check if media_gt exists (rev2)
URL : https://patchwork.freedesktop.org/series/117189/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13098 -> Patchwork_117189v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/index.html
Participating hosts (39 -> 37)
--
Missing(2): fi-kbl-soraka fi-snb-2520m
Known issues
Here are the changes found in Patchwork_117189v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-rpls-1: [PASS][1] -> [ABORT][2] ([i915#7911] / [i915#7920] /
[i915#7982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/bat-rpls-1/igt@i915_selftest@l...@requests.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/bat-rpls-1/igt@i915_selftest@l...@requests.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
- bat-dg2-8: [PASS][3] -> [FAIL][4] ([i915#7932])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-1.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-1.html
Possible fixes
* igt@i915_selftest@live@slpc:
- {bat-mtlp-6}: [DMESG-WARN][5] ([i915#6367]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982
Build changes
-
* Linux: CI_DRM_13098 -> Patchwork_117189v2
CI-20190529: 20190529
CI_DRM_13098: 1b2487d0f24450f2a330f44f204a22fd4e31a403 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_117189v2: 1b2487d0f24450f2a330f44f204a22fd4e31a403 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
931b64622162 drm/i915/hdcp: Check if media_gt exists
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/index.html
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/hdcp: Check if media_gt exists (rev2)
== Series Details == Series: drm/i915/hdcp: Check if media_gt exists (rev2) URL : https://patchwork.freedesktop.org/series/117189/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13098_full -> Patchwork_117189v2_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_117189v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_117189v2_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (7 -> 7) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_117189v2_full: ### IGT changes ### Possible regressions * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-apl4/igt@gem_workarou...@suspend-resume-context.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-apl4/igt@gem_workarou...@suspend-resume-context.html * igt@kms_cursor_crc@cursor-suspend@pipe-a-vga-1: - shard-snb: NOTRUN -> [INCOMPLETE][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-snb5/igt@kms_cursor_crc@cursor-susp...@pipe-a-vga-1.html Known issues Here are the changes found in Patchwork_117189v2_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_barrier_race@remote-request@rcs0: - shard-glk: [PASS][4] -> [ABORT][5] ([i915#7461] / [i915#8211]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-glk5/igt@gem_barrier_race@remote-requ...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-glk8/igt@gem_barrier_race@remote-requ...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-glk9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-glk4/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-apl: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-apl2/igt@gem_exec_fair@basic-pace-s...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-apl1/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_lmem_swapping@parallel-random-engines: - shard-glk: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#4613]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-glk9/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@kms_atomic@plane-primary-overlay-mutable-zpos: - shard-glk: NOTRUN -> [SKIP][11] ([fdo#109271]) +36 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-glk9/igt@kms_ato...@plane-primary-overlay-mutable-zpos.html * igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc: - shard-glk: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#3886]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-glk9/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-d-random-ccs-data-4_tiled_dg2_rc_ccs: - shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271]) +5 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-apl7/igt@kms_ccs@pipe-d-random-ccs-data-4_tiled_dg2_rc_ccs.html * igt@kms_color@ctm-max@pipe-a-hdmi-a-1: - shard-snb: NOTRUN -> [SKIP][14] ([fdo#109271]) +15 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-snb1/igt@kms_color@ctm-...@pipe-a-hdmi-a-1.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-apl: [PASS][15] -> [FAIL][16] ([i915#2346]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-apl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-apl7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13098/shard-glk4/igt@kms_flip@flip-vs-expired-vbl...@b-hdmi-a2.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117189v2/shard-glk6/igt@kms_flip@flip-vs-expired-vbl...@b-hdmi-a2.html * igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-dp-1: - shard-apl:
Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEM_CREATE_EXTENSIONS query item
Hi Jordan,
This approach was specifically NACKed in the PAT index thread so please
at least mark any such series as RFC if they are intended to facilitate
further dialog on the topic.
I've still not seen any explanation why this would be needed at this specific
case for the PAT index setting feature. Repeating here: You should be able
to detect missing extension by trying to use it. Just because PXP has some
issues on that front doesn't mean we'll change the practices for all other
interfaces.
We should instead spend the time considering a better solution for PXP and
see how that can be implemented for the drm/xe driver.
Regards, Joonas
Quoting Jordan Justen (2023-05-02 23:57:44)
> Cc: Fei Yang
> Cc: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: Daniel Vetter
> Signed-off-by: Jordan Justen
> ---
> drivers/gpu/drm/i915/gem/i915_gem_create.c | 30 ++
> drivers/gpu/drm/i915/gem/i915_gem_create.h | 2 ++
> drivers/gpu/drm/i915/i915_query.c | 36 ++
> include/uapi/drm/i915_drm.h| 2 ++
> 4 files changed, 70 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
> b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> index bfe1dbda4cb7..56342a352599 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> @@ -399,6 +399,36 @@ static const i915_user_extension_fn create_extensions[]
> = {
> [I915_GEM_CREATE_EXT_PROTECTED_CONTENT] = ext_set_protected,
> };
>
> +/**
> + * Fills buffer will known create_ext extensions
> + * @buffer: buffer to fill with extensions
> + * @buffer_size: size of the buffer in bytes
> + *
> + * If @buffer_size is 0, then @buffer is not accessed, and the
> + * required buffer size is returned.
> + *
> + * If @buffer_size != 0, but not large enough, then -EINVAL is
> + * returned.
> + *
> + * If @buffer_size is large enough, then @buffer will be filled as a
> + * u64 array of extension names.
> + */
> +int
> +i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size)
> +{
> + unsigned int i;
> +
> + if (buffer_size == 0)
> + return ARRAY_SIZE(create_extensions) * sizeof(u64);
> + else if (buffer_size < (ARRAY_SIZE(create_extensions) * sizeof(u64)))
> + return -EINVAL;
> +
> + for (i = 0; i < ARRAY_SIZE(create_extensions); i++)
> + ((u64*)buffer)[i] = i;
> +
> + return ARRAY_SIZE(create_extensions) * sizeof(u64);
> +}
> +
> /**
> * i915_gem_create_ext_ioctl - Creates a new mm object and returns a handle
> to it.
> * @dev: drm device pointer
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.h
> b/drivers/gpu/drm/i915/gem/i915_gem_create.h
> index 9536aa906001..e7ebef308038 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_create.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.h
> @@ -14,4 +14,6 @@ int i915_gem_dumb_create(struct drm_file *file_priv,
> struct drm_device *dev,
> struct drm_mode_create_dumb *args);
>
> +int i915_gem_create_ext_get_extensions(void *buffer, size_t buffer_size);
> +
> #endif /* __I915_GEM_CREATE_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_query.c
> b/drivers/gpu/drm/i915/i915_query.c
> index 00871ef99792..f360f76516de 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -9,6 +9,7 @@
> #include "i915_drv.h"
> #include "i915_perf.h"
> #include "i915_query.h"
> +#include "gem/i915_gem_create.h"
> #include "gt/intel_engine_user.h"
> #include
>
> @@ -551,6 +552,40 @@ static int query_hwconfig_blob(struct drm_i915_private
> *i915,
> return hwconfig->size;
> }
>
> +static int query_gem_create_extensions(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + void *buffer;
> + int buffer_size, fill_size;
> +
> + buffer_size = i915_gem_create_ext_get_extensions(NULL, 0);
> +
> + if (query_item->length == 0)
> + return buffer_size;
> +
> + if (query_item->length < buffer_size)
> + return -EINVAL;
> +
> + buffer = kzalloc(buffer_size, GFP_KERNEL);
> + if (!buffer)
> + return -ENOMEM;
> +
> + fill_size = i915_gem_create_ext_get_extensions(buffer, buffer_size);
> + if (fill_size != buffer_size) {
> + kfree(buffer);
> + return -EINVAL;
> + }
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> +buffer, buffer_size)) {
> + kfree(buffer);
> + return -EFAULT;
> + }
> +
> + kfree(buffer);
> + return buffer_size;
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item
> *query_item) = {
> query_topology_info,
> @@ -559,6 +594,7 @@ static
