[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Stop using I915_TILING_* in client blit selftest
== Series Details == Series: drm/i915: Stop using I915_TILING_* in client blit selftest URL : https://patchwork.freedesktop.org/series/95308/ State : success == Summary == CI Bug Log - changes from CI_DRM_10670_full -> Patchwork_21212_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_21212_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][1] ([i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-apl7/igt@gem_cre...@create-massive.html * igt@gem_ctx_isolation@preservation-s3@bcs0: - shard-apl: [PASS][2] -> [DMESG-WARN][3] ([i915#180]) +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-apl1/igt@gem_ctx_isolation@preservation...@bcs0.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-apl8/igt@gem_ctx_isolation@preservation...@bcs0.html * igt@gem_exec_fair@basic-none@rcs0: - shard-kbl: [PASS][4] -> [FAIL][5] ([i915#2842]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-kbl7/igt@gem_exec_fair@basic-n...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-kbl3/igt@gem_exec_fair@basic-n...@rcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-apl: [PASS][6] -> [FAIL][7] ([i915#2842] / [i915#3468]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-apl3/igt@gem_exec_fair@basic-n...@vecs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-apl8/igt@gem_exec_fair@basic-n...@vecs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-glk9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-glk6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [PASS][12] -> [SKIP][13] ([fdo#109271]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-kbl3/igt@gem_exec_fair@basic-p...@vecs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-kbl6/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_params@no-blt: - shard-tglb: NOTRUN -> [SKIP][14] ([fdo#109283]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-tglb7/igt@gem_exec_par...@no-blt.html * igt@gem_exec_params@secure-non-master: - shard-tglb: NOTRUN -> [SKIP][15] ([fdo#112283]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-tglb8/igt@gem_exec_par...@secure-non-master.html * igt@gem_pread@exhaustion: - shard-apl: NOTRUN -> [WARN][16] ([i915#2658]) +1 similar issue [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-apl2/igt@gem_pr...@exhaustion.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3323]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-apl7/igt@gem_userptr_bl...@dmabuf-sync.html - shard-tglb: NOTRUN -> [SKIP][18] ([i915#3323]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-tglb7/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][19] ([i915#3318]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-apl2/igt@gem_userptr_bl...@vma-merge.html * igt@gen7_exec_parse@load-register-reg: - shard-tglb: NOTRUN -> [SKIP][20] ([fdo#109289]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-tglb8/igt@gen7_exec_pa...@load-register-reg.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][21] -> [FAIL][22] ([i915#454]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-iclb7/igt@i915_pm...@dc6-psr.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-iclb8/igt@i915_pm...@dc6-psr.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-tglb: NOTRUN -> [WARN][23] ([i915#2681]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21212/shard-tglb8/igt@i915_pm_rc6_reside...@rc6-fence.html * igt@i915_pm_rpm@modeset-lpsp-stress: - shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271]) +268 similar issues [24]: https://intel-gfx-ci.01.o
[Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE
When trying to bring IS_ACTIVE to linux/kconfig.h I thought it wouldn't
provide much value just encapsulating it in a boolean context. So I also
added the support for handling undefined macros as the IS_ENABLED()
counterpart. However the feedback received from Masahiro Yamada was that
it is too ugly, not providing much value. And just wrapping in a boolean
context is too dumb - we could simply open code it.
As detailed in commit babaab2f4738 ("drm/i915: Encapsulate kconfig
constant values inside boolean predicates"), the IS_ACTIVE macro was
added to workaround a compilation warning. However after checking again
our current uses of IS_ACTIVE it turned out there is only
1 case in which it would potentially trigger a warning. All the others
can simply use the shorter version, without wrapping it in any macro.
And even that single one didn't trigger any warning in gcc 10.3.
So here I'm dialing all the way back to simply removing the macro. If it
triggers warnings in future we may change the few cases to check for > 0
or != 0. Another possibility would be to use the great "not not
operator" for all positive checks, which would allow us to maintain
consistency. However let's try first the simplest form though, hopefully
we don't hit broken compilers spitting a warning:
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gem/i915_gem_context.c| 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine.h | 4 ++--
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine_types.h | 2 +-
.../gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
.../gpu/drm/i915/gt/selftest_engine_heartbeat.c| 4 ++--
drivers/gpu/drm/i915/gt/selftest_execlists.c | 14 +++---
drivers/gpu/drm/i915/i915_config.c | 2 +-
drivers/gpu/drm/i915/i915_request.c| 2 +-
drivers/gpu/drm/i915/i915_utils.h | 13 -
11 files changed, 18 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 8208fd5b72c3..be60bcf8069c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -761,7 +761,7 @@ static int intel_context_set_gem(struct intel_context *ce,
intel_engine_has_semaphores(ce->engine))
__set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
- if (IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) &&
+ if (CONFIG_DRM_I915_REQUEST_TIMEOUT &&
ctx->i915->params.request_timeout_ms) {
unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 5130e8ed9564..65fc6ff5f59d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -395,7 +395,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
/* Track the mmo associated with the fenced vma */
vma->mmo = mmo;
- if (IS_ACTIVE(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND))
+ if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
b/drivers/gpu/drm/i915/gt/intel_engine.h
index 87579affb952..6aba239a10e8 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -273,7 +273,7 @@ static inline bool intel_engine_uses_guc(const struct
intel_engine_cs *engine)
static inline bool
intel_engine_has_preempt_reset(const struct intel_engine_cs *engine)
{
- if (!IS_ACTIVE(CONFIG_DRM_I915_PREEMPT_TIMEOUT))
+ if (!CONFIG_DRM_I915_PREEMPT_TIMEOUT)
return false;
return intel_engine_has_preemption(engine);
@@ -300,7 +300,7 @@ intel_virtual_engine_has_heartbeat(const struct
intel_engine_cs *engine)
static inline bool
intel_engine_has_heartbeat(const struct intel_engine_cs *engine)
{
- if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
+ if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
return false;
if (intel_engine_is_virtual(engine))
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
index 74775ae961b2..a3698f611f45 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
@@ -207,7 +207,7 @@ static void heartbeat(struct work_struct *wrk)
void intel_engine_unpark_heartbeat(struct intel_engine_cs *engine)
{
- if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
+ if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
return;
next_heartbeat(engine);
diff --git a/drivers/gpu/drm/i915/g
Re: [Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE
On Fri, 01 Oct 2021, Lucas De Marchi wrote:
> When trying to bring IS_ACTIVE to linux/kconfig.h I thought it wouldn't
> provide much value just encapsulating it in a boolean context. So I also
> added the support for handling undefined macros as the IS_ENABLED()
> counterpart. However the feedback received from Masahiro Yamada was that
> it is too ugly, not providing much value. And just wrapping in a boolean
> context is too dumb - we could simply open code it.
>
> As detailed in commit babaab2f4738 ("drm/i915: Encapsulate kconfig
> constant values inside boolean predicates"), the IS_ACTIVE macro was
> added to workaround a compilation warning. However after checking again
> our current uses of IS_ACTIVE it turned out there is only
> 1 case in which it would potentially trigger a warning. All the others
> can simply use the shorter version, without wrapping it in any macro.
> And even that single one didn't trigger any warning in gcc 10.3.
>
> So here I'm dialing all the way back to simply removing the macro. If it
> triggers warnings in future we may change the few cases to check for > 0
> or != 0. Another possibility would be to use the great "not not
> operator" for all positive checks, which would allow us to maintain
> consistency. However let's try first the simplest form though, hopefully
> we don't hit broken compilers spitting a warning:
>
> Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c| 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_engine.h | 4 ++--
> drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 2 +-
> .../gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
> .../gpu/drm/i915/gt/selftest_engine_heartbeat.c| 4 ++--
> drivers/gpu/drm/i915/gt/selftest_execlists.c | 14 +++---
> drivers/gpu/drm/i915/i915_config.c | 2 +-
> drivers/gpu/drm/i915/i915_request.c| 2 +-
> drivers/gpu/drm/i915/i915_utils.h | 13 -
> 11 files changed, 18 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 8208fd5b72c3..be60bcf8069c 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -761,7 +761,7 @@ static int intel_context_set_gem(struct intel_context *ce,
> intel_engine_has_semaphores(ce->engine))
> __set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
>
> - if (IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) &&
> + if (CONFIG_DRM_I915_REQUEST_TIMEOUT &&
> ctx->i915->params.request_timeout_ms) {
> unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index 5130e8ed9564..65fc6ff5f59d 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -395,7 +395,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
> /* Track the mmo associated with the fenced vma */
> vma->mmo = mmo;
>
> - if (IS_ACTIVE(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND))
> + if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
> intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
>
> msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
> b/drivers/gpu/drm/i915/gt/intel_engine.h
> index 87579affb952..6aba239a10e8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine.h
> @@ -273,7 +273,7 @@ static inline bool intel_engine_uses_guc(const struct
> intel_engine_cs *engine)
> static inline bool
> intel_engine_has_preempt_reset(const struct intel_engine_cs *engine)
> {
> - if (!IS_ACTIVE(CONFIG_DRM_I915_PREEMPT_TIMEOUT))
> + if (!CONFIG_DRM_I915_PREEMPT_TIMEOUT)
> return false;
>
> return intel_engine_has_preemption(engine);
> @@ -300,7 +300,7 @@ intel_virtual_engine_has_heartbeat(const struct
> intel_engine_cs *engine)
> static inline bool
> intel_engine_has_heartbeat(const struct intel_engine_cs *engine)
> {
> - if (!IS_ACTIVE(CONFIG_DRM_I915_HEARTBEAT_INTERVAL))
> + if (!CONFIG_DRM_I915_HEARTBEAT_INTERVAL)
> return false;
>
> if (intel_engine_is_virtual(engine))
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> index 74775ae961b2..a3698f611f45 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> @@ -207,7 +207,7 @@ static void heartbeat(struct work_struct *wrk)
>
> void intel_engine_unpark_heartbeat(struct intel_
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Wait PSR2 get out of deep sleep to update pipe
== Series Details == Series: drm/i915/display: Wait PSR2 get out of deep sleep to update pipe URL : https://patchwork.freedesktop.org/series/95309/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10670_full -> Patchwork_21213_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_21213_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_21213_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_21213_full: ### IGT changes ### Possible regressions * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes: - shard-kbl: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-susp...@pipe-a-planes.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-susp...@pipe-a-planes.html Known issues Here are the changes found in Patchwork_21213_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_fair@basic-deadline: - shard-kbl: NOTRUN -> [FAIL][3] ([i915#2846]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-kbl3/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-kbl: [PASS][4] -> [FAIL][5] ([i915#2842]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-kbl3/igt@gem_exec_fair@basic-p...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-kbl2/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_params@no-blt: - shard-tglb: NOTRUN -> [SKIP][6] ([fdo#109283]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-tglb5/igt@gem_exec_par...@no-blt.html * igt@gem_pwrite@basic-exhaustion: - shard-apl: NOTRUN -> [WARN][7] ([i915#2658]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-apl3/igt@gem_pwr...@basic-exhaustion.html * igt@gem_softpin@noreloc-s3: - shard-apl: [PASS][8] -> [DMESG-WARN][9] ([i915#180]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-apl3/igt@gem_soft...@noreloc-s3.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-apl2/igt@gem_soft...@noreloc-s3.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#3323]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-apl3/igt@gem_userptr_bl...@dmabuf-sync.html - shard-tglb: NOTRUN -> [SKIP][11] ([i915#3323]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-tglb5/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-apl: NOTRUN -> [DMESG-WARN][12] ([i915#3002]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-apl6/igt@gem_userptr_bl...@input-checking.html * igt@gem_workarounds@suspend-resume: - shard-skl: NOTRUN -> [INCOMPLETE][13] ([i915#198]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-skl4/igt@gem_workarou...@suspend-resume.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][14] -> [FAIL][15] ([i915#454]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10670/shard-iclb7/igt@i915_pm...@dc6-psr.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-iclb6/igt@i915_pm...@dc6-psr.html * igt@i915_suspend@sysfs-reader: - shard-kbl: NOTRUN -> [DMESG-WARN][16] ([i915#180]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-kbl7/igt@i915_susp...@sysfs-reader.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-kbl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3777]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-kbl3/igt@kms_big...@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip: - shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#3777]) +2 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-apl3/igt@kms_big...@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-tglb: NOTRUN -> [SKIP][19] ([fdo#111615]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21213/shard-tglb5/igt@kms_big...@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@yf-tile
Re: [Intel-gfx] [PATCH v2 3/3] Move IS_CONFIG_NONZERO() to kconfig.h
On Fri, Oct 1, 2021 at 12:55 AM Lucas De Marchi
wrote:
>
> On Thu, Sep 30, 2021 at 11:01:36PM +0900, Masahiro Yamada wrote:
> >On Thu, Sep 30, 2021 at 3:34 AM Lucas De Marchi
> > wrote:
> >>
> >> The check for config value doesn't really belong to i915_utils.h - we
> >> are trying to eliminate that utils helper and share them when possible
> >> with other drivers and subsystems.
> >>
> >> Rationale for having such macro is in commit
> >> babaab2f4738 ("drm/i915: Encapsulate kconfig constant values inside
> >> boolean predicates")
> >> whereas later it is improved to not break the build if used with
> >> undefined configs. The caveat is detailed in the documentation: unlike
> >> IS_ENABLED(): it's not preprocessor-only logic so can't be used for
> >> things like `#if IS_CONFIG_NONZERO(...)`
> >>
> >> Signed-off-by: Lucas De Marchi
> >
> >
> >Hypothetical "it would be nice to have ..." is really unneeded.
> >
> > if (context && CONFIG_DRM_I915_FENCE_TIMEOUT > 0)
> > return
> >msecs_to_jiffies_timeout(CONFIG_DRM_I915_FENCE_TIMEOUT);
> >
> >
> >is enough, and much cleaner.
> >
> >
> >
> >This warning is shown only when a constant is used
> >together with '&&'.
> >
> >Most of IS_ACTIVE can go away.
> >
> >Given that, there are not many places where the IS_ACTIVE macro
> >is useful, even in the i915 driver.
> >
> >For a few sources of the warnings,
> >replacing it with != 0 or > 0 is just fine.
>
> humn... maybe. Let me do a conversion in that direction and see what is
> the outcome.
>
> My original intention was to make IS_ENABLED() even uglier to cover the
> int case, but after some tries it seems impossible to do on preprocessor
> context, so I thought maybe it would be ok as a separate one.
>
> >
> >Of course, such an ugly macro is not worth being moved to
>
> if we don't handle the undefined case and only worry about encapsulating
> it inside a boolean predicate, the macro would be very simple. Would
> that be worth having in kconfig.h maybe?
I do not think so.
#define IS_CONFIG_NONZERO(config) ((config) != 0)
seems like a stupid macro.
What is bad about writing the direct code?
if (x && CONFIG_FOO > 0)
>
>
> thanks
> Lucas De Marchi
--
Best Regards
Masahiro Yamada
Re: [Intel-gfx] [PATCH v3] drm/i915/ttm: Rework object initialization slightly
On 30/09/2021 12:32, Thomas Hellström wrote:
We may end up in i915_ttm_bo_destroy() in an error path before the
object is fully initialized. In that case it's not correct to call
__i915_gem_free_object(), because that function
a) Assumes the gem object refcount is 0, which it isn't.
b) frees the placements which are owned by the caller until the
init_object() region ops returns successfully. Fix this by providing
a lightweight cleanup function __i915_gem_object_fini() which is also
called by __i915_gem_free_object().
While doing this, also make sure we call dma_resv_fini() as part of
ordinary object destruction and not from the RCU callback that frees
the object. This will help track down bugs where the object is incorrectly
locked from an RCU lookup.
Finally, make sure the object isn't put on the region list until it's
either locked or fully initialized in order to block list processing of
partially initialized objects.
v2:
- The TTM object backend memory was freed before the gem pages were
put. Separate this functionality into __i915_gem_object_pages_fini()
and call it from the TTM delete_mem_notify() callback.
v3:
- Include i915_gem_object_free_mmaps() in __i915_gem_object_pages_fini()
to make sure we don't inadvertedly introduce a race.
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld #v1
R-b still stands.
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 43 +++---
drivers/gpu/drm/i915/gem/i915_gem_object.h | 5 +++
drivers/gpu/drm/i915/gem/i915_gem_ttm.c| 36 +++---
3 files changed, 64 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 6fb9afb65034..b88b121e244a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -89,6 +89,22 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
mutex_init(&obj->mm.get_dma_page.lock);
}
+/**
+ * i915_gem_object_fini - Clean up a GEM object initialization
+ * @obj: The gem object to cleanup
+ *
+ * This function cleans up gem object fields that are set up by
+ * drm_gem_private_object_init() and i915_gem_object_init().
+ * It's primarily intended as a helper for backends that need to
+ * clean up the gem object in separate steps.
+ */
+void __i915_gem_object_fini(struct drm_i915_gem_object *obj)
+{
+ mutex_destroy(&obj->mm.get_page.lock);
+ mutex_destroy(&obj->mm.get_dma_page.lock);
+ dma_resv_fini(&obj->base._resv);
+}
+
/**
* Mark up the object's coherency levels for a given cache_level
* @obj: #drm_i915_gem_object
@@ -174,7 +190,6 @@ void __i915_gem_free_object_rcu(struct rcu_head *head)
container_of(head, typeof(*obj), rcu);
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- dma_resv_fini(&obj->base._resv);
i915_gem_object_free(obj);
GEM_BUG_ON(!atomic_read(&i915->mm.free_count));
@@ -204,10 +219,17 @@ static void __i915_gem_object_free_mmaps(struct
drm_i915_gem_object *obj)
}
}
-void __i915_gem_free_object(struct drm_i915_gem_object *obj)
+/**
+ * __i915_gem_object_pages_fini - Clean up pages use of a gem object
+ * @obj: The gem object to clean up
+ *
+ * This function cleans up usage of the object mm.pages member. It
+ * is intended for backends that need to clean up a gem object in
+ * separate steps and needs to be called when the object is idle before
+ * the object's backing memory is freed.
+ */
+void __i915_gem_object_pages_fini(struct drm_i915_gem_object *obj)
{
- trace_i915_gem_object_destroy(obj);
-
if (!list_empty(&obj->vma.list)) {
struct i915_vma *vma;
@@ -233,11 +255,17 @@ void __i915_gem_free_object(struct drm_i915_gem_object *obj)
__i915_gem_object_free_mmaps(obj);
- GEM_BUG_ON(!list_empty(&obj->lut_list));
-
atomic_set(&obj->mm.pages_pin_count, 0);
__i915_gem_object_put_pages(obj);
GEM_BUG_ON(i915_gem_object_has_pages(obj));
+}
+
+void __i915_gem_free_object(struct drm_i915_gem_object *obj)
+{
+ trace_i915_gem_object_destroy(obj);
+
+ GEM_BUG_ON(!list_empty(&obj->lut_list));
+
bitmap_free(obj->bit_17);
if (obj->base.import_attach)
@@ -253,6 +281,8 @@ void __i915_gem_free_object(struct drm_i915_gem_object *obj)
if (obj->shares_resv_from)
i915_vm_resv_put(obj->shares_resv_from);
+
+ __i915_gem_object_fini(obj);
}
static void __i915_gem_free_objects(struct drm_i915_private *i915,
@@ -266,6 +296,7 @@ static void __i915_gem_free_objects(struct drm_i915_private
*i915,
obj->ops->delayed_free(obj);
continue;
}
+ __i915_gem_object_pages_fini(obj);
__i915_gem_free_object(obj);
/* But keep the pointer alive for RCU-protected lookups */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/
Re: [Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts
+ Daniel as reviewer and maybe merge, avoid falling through cracks at least.
On 22/09/2021 20:43, Matthew Brost wrote:
Set number of engines before attempting to create contexts so the
function free_engines can clean up properly. Also check return of
alloc_engines for NULL.
v2:
(Tvrtko)
- Send as stand alone patch
(John Harrison)
- Check for alloc_engines returning NULL
Cc: Jason Ekstrand
Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create
parameters (v5)")
Signed-off-by: Matthew Brost
Cc:
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index c2ab0e22db0a..9627c7aac6a3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -898,6 +898,11 @@ static struct i915_gem_engines *user_engines(struct
i915_gem_context *ctx,
unsigned int n;
e = alloc_engines(num_engines);
+ if (!e) {
+ return ERR_PTR(-ENOMEM);
+ }
Ideally remove the braces and respin.
+ e->num_engines = num_engines;
Theoretically you could have put it next to "e->engines[n] = ce"
assignment so the pattern is the same as in default_engines(). Kind of
makes more sense that the number is not set before anything is created,
but as it doesn't really matter since free_engines handles sparse arrays
so there is argument to have a simpler single assignment as well.
+
for (n = 0; n < num_engines; n++) {
struct intel_context *ce;
int ret;
@@ -931,7 +936,6 @@ static struct i915_gem_engines *user_engines(struct
i915_gem_context *ctx,
goto free_engines;
}
}
- e->num_engines = num_engines;
return e;
Fix looks good to me. I did not want to butt in but since more than a
week has passed without it getting noticed:
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
Re: [Intel-gfx] [PATCH 1/4] drm/i915/fdi: move fdi modeset asserts to intel_fdi.c
On Thu, 30 Sep 2021, Jani Nikula wrote:
> On Thu, 30 Sep 2021, Ville Syrjälä wrote:
>> On Thu, Sep 30, 2021 at 12:22:58PM +0300, Jani Nikula wrote:
>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c
>>> b/drivers/gpu/drm/i915/display/intel_fdi.c
>>> index af01d1fa761e..02d3294bad7b 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
>>> @@ -10,6 +10,97 @@
>>> #include "intel_fdi.h"
>>> #include "intel_sideband.h"
>>>
>>> +static void assert_fdi_tx(struct drm_i915_private *dev_priv,
>>> + enum pipe pipe, bool state)
>>> +{
>>> + bool cur_state;
>>> +
>>> + if (HAS_DDI(dev_priv)) {
>>> + /*
>>> +* DDI does not have a specific FDI_TX register.
>>> +*
>>> +* FDI is never fed from EDP transcoder
>>> +* so pipe->transcoder cast is fine here.
>>> +*/
>>> + enum transcoder cpu_transcoder = (enum transcoder)pipe;
>>> + cur_state = intel_de_read(dev_priv,
>>> TRANS_DDI_FUNC_CTL(cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE;
>>> + } else {
>>> + cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) &
>>> FDI_TX_ENABLE;
>>> + }
>>> + I915_STATE_WARN(cur_state != state,
>>> + "FDI TX state assertion failure (expected %s, current
>>> %s)\n",
>>> + onoff(state), onoff(cur_state));
>>> +}
>>> +
>>> +void assert_fdi_tx_enabled(struct drm_i915_private *i915, enum pipe pipe)
>>> +{
>>> + assert_fdi_tx(i915, pipe, true);
>>> +}
>>> +
>>> +void assert_fdi_tx_disabled(struct drm_i915_private *i915, enum pipe pipe)
>>> +{
>>> + assert_fdi_tx(i915, pipe, false);
>>> +}
>>
>> For these wrappers I could argue that static inlines would be less
>> loc overall, while still wouldn't need any extra struct definitions/etc.
>> in the header. But not performance sensitive so from that pov static
>> inline is pointless.
>
> I didn't actually check the compiler output, but I think even
> performance wise it'll probably end up being just one function call
> either way. It's just a question which side of the call the logic
> is. But agreed, doesn't really matter.
>
> Anyway, the main argument I have for avoiding static inlines is to not
> set an example to cargo cult from. They should be the exception, not the
> rule. I think both the driver and the team have grown big enough to
> require a style that promotes better structure. Because let's face it,
> people look at what's there, copy the style, and not think of all the
> subtleties.
>
>> Anyways, this approach seems fine to me. For the series
>> Reviewed-by: Ville Syrjälä
>
> Thanks,
> Jani.
And pushed.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH 6/6] drm/i915/dram: return -ENOENT instead of -1
On Thu, 30 Sep 2021, Ville Syrjälä wrote:
> On Thu, Sep 30, 2021 at 02:24:36PM +0300, Jani Nikula wrote:
>> Avoid using the incidental -EPERM.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/intel_dram.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dram.c
>> b/drivers/gpu/drm/i915/intel_dram.c
>> index 91866520c173..a506a2196de4 100644
>> --- a/drivers/gpu/drm/i915/intel_dram.c
>> +++ b/drivers/gpu/drm/i915/intel_dram.c
>> @@ -444,7 +444,7 @@ static int icl_pcode_read_mem_global_info(struct
>> drm_i915_private *dev_priv)
>> break;
>> default:
>> MISSING_CASE(val & 0xf);
>> -return -1;
>> +return -ENOENT;
>
> Everything else is -EINVAL in that file. So maybe just stick to
> that? I guess for a bunch of these maybe something different
> might make sense to indicate that it's the hw telling us nonsense
> (or the driver is actually missing some necessaty stuff).
> But boesn't really matter since it's just a bogus value.
Exceptionally fixed this while pushing.
>
> Series is
> Reviewed-by: Ville Syrjälä
Thanks, pushed.
BR,
Jani.
>
>> }
>> } else {
>> switch (val & 0xf) {
>> @@ -462,7 +462,7 @@ static int icl_pcode_read_mem_global_info(struct
>> drm_i915_private *dev_priv)
>> break;
>> default:
>> MISSING_CASE(val & 0xf);
>> -return -1;
>> +return -ENOENT;
>> }
>> }
>>
>> --
>> 2.30.2
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH] drm/i915/fdi: use -EAGAIN instead of local special return value
On Thu, 30 Sep 2021, Ville Syrjälä wrote:
> On Thu, Sep 30, 2021 at 12:32:29PM +0300, Jani Nikula wrote:
>> Using standard -EAGAIN should be perfectly fine instead of using a
>> special case value.
>
> Can't immediately spot any uses of -EAGAIN which would conflict here.
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed.
BR,
Jani.
>
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 11 +--
>> drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
>> drivers/gpu/drm/i915/display/intel_fdi.h | 1 -
>> 3 files changed, 6 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index a4453dd1bb51..db43334fb7d2 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -7717,12 +7717,7 @@ intel_modeset_pipe_config(struct intel_atomic_state
>> *state,
>> ret = intel_crtc_compute_config(to_intel_crtc(crtc), pipe_config);
>> if (ret == -EDEADLK)
>> return ret;
>> -if (ret < 0) {
>> -drm_dbg_kms(&i915->drm, "CRTC fixup failed\n");
>> -return ret;
>> -}
>> -
>> -if (ret == I915_DISPLAY_CONFIG_RETRY) {
>> +if (ret == -EAGAIN) {
>> if (drm_WARN(&i915->drm, !retry,
>> "loop in pipe configuration computation\n"))
>> return -EINVAL;
>> @@ -7731,6 +7726,10 @@ intel_modeset_pipe_config(struct intel_atomic_state
>> *state,
>> retry = false;
>> goto encoder_retry;
>> }
>> +if (ret < 0) {
>> +drm_dbg_kms(&i915->drm, "CRTC fixup failed\n");
>> +return ret;
>> +}
>>
>> /* Dithering seems to not pass-through bits correctly when it should, so
>> * only enable it on 6bpc panels and when its not a compliance
>> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c
>> b/drivers/gpu/drm/i915/display/intel_fdi.c
>> index af01d1fa761e..6b780349371c 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
>> @@ -176,7 +176,7 @@ int ilk_fdi_compute_config(struct intel_crtc *crtc,
>> }
>>
>> if (needs_recompute)
>> -return I915_DISPLAY_CONFIG_RETRY;
>> +return -EAGAIN;
>>
>> return ret;
>> }
>> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h
>> b/drivers/gpu/drm/i915/display/intel_fdi.h
>> index 61cb216a09f5..abd9f809d421 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fdi.h
>> +++ b/drivers/gpu/drm/i915/display/intel_fdi.h
>> @@ -11,7 +11,6 @@ struct intel_crtc;
>> struct intel_crtc_state;
>> struct intel_encoder;
>>
>> -#define I915_DISPLAY_CONFIG_RETRY 1
>> int intel_fdi_link_freq(struct drm_i915_private *i915,
>> const struct intel_crtc_state *pipe_config);
>> int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
>> --
>> 2.30.2
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [RFC 1/6] sched: Add nice value change notifier
Hi Peter,
On 30/09/2021 19:33, Peter Zijlstra wrote:
On Thu, Sep 30, 2021 at 06:15:47PM +0100, Tvrtko Ursulin wrote:
void set_user_nice(struct task_struct *p, long nice)
{
bool queued, running;
- int old_prio;
+ int old_prio, ret;
struct rq_flags rf;
struct rq *rq;
@@ -6913,6 +6945,9 @@ void set_user_nice(struct task_struct *p, long nice)
*/
p->sched_class->prio_changed(rq, p, old_prio);
+ ret = atomic_notifier_call_chain(&user_nice_notifier_list, nice, p);
+ WARN_ON_ONCE(ret != NOTIFY_DONE);
+
out_unlock:
task_rq_unlock(rq, p, &rf);
}
No, we're not going to call out to exported, and potentially unbounded,
functions under scheduler locks.
Agreed, that's another good point why it is even more hairy, as I have
generally alluded in the cover letter.
Do you have any immediate thoughts on possible alternatives?
Like for instance if I did a queue_work from set_user_nice and then ran
a notifier chain async from a worker? I haven't looked at yet what
repercussion would that have in terms of having to cancel the pending
workers when tasks exit. I can try and prototype that and see how it
would look.
There is of course an example ioprio which solves the runtime
adjustments via a dedicated system call. But I don't currently feel that
a third one would be a good solution. At least I don't see a case for
being able to decouple the priority of CPU and GPU and computations.
Have I opened a large can of worms? :)
Regards,
Tvrtko
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: remove IS_ACTIVE
== Series Details == Series: drm/i915: remove IS_ACTIVE URL : https://patchwork.freedesktop.org/series/95312/ State : success == Summary == CI Bug Log - changes from CI_DRM_10671 -> Patchwork_21214 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/index.html Known issues Here are the changes found in Patchwork_21214 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@query-info: - fi-tgl-1115g4: NOTRUN -> [SKIP][1] ([fdo#109315]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@amdgpu/amd_ba...@query-info.html - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-kbl-soraka/igt@amdgpu/amd_ba...@query-info.html * igt@amdgpu/amd_cs_nop@nop-gfx0: - fi-tgl-1115g4: NOTRUN -> [SKIP][3] ([fdo#109315] / [i915#2575]) +16 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@amdgpu/amd_cs_...@nop-gfx0.html * igt@gem_exec_suspend@basic-s3: - fi-tgl-1115g4: NOTRUN -> [FAIL][4] ([i915#1888]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html * igt@gem_huc_copy@huc-copy: - fi-tgl-1115g4: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@gem_huc_c...@huc-copy.html * igt@i915_pm_backlight@basic-brightness: - fi-tgl-1115g4: NOTRUN -> [SKIP][6] ([i915#1155]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@i915_pm_backli...@basic-brightness.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-tgl-1115g4: NOTRUN -> [SKIP][7] ([fdo#111827]) +8 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-tgl-1115g4: NOTRUN -> [SKIP][8] ([i915#4103]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_force_connector_basic@force-load-detect: - fi-tgl-1115g4: NOTRUN -> [SKIP][9] ([fdo#109285]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_psr@primary_mmap_gtt: - fi-tgl-1115g4: NOTRUN -> [SKIP][10] ([i915#1072]) +3 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html * igt@prime_vgem@basic-userptr: - fi-tgl-1115g4: NOTRUN -> [SKIP][11] ([i915#3301]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/fi-tgl-1115g4/igt@prime_v...@basic-userptr.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 Participating hosts (31 -> 28) -- Additional (1): fi-tgl-1115g4 Missing(4): fi-bsw-cyan bat-jsl-1 bat-dg1-6 bat-adlp-4 Build changes - * Linux: CI_DRM_10671 -> Patchwork_21214 CI-20190529: 20190529 CI_DRM_10671: 0c56a95d6dcf174353231175cb56dfbead9aa287 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6228: 22643ce4014a0b2dc52ce7916b2f657e2a7757c3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_21214: acba9196789a9bd61f33432e9ba9847b58c678d8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == acba9196789a drm/i915: remove IS_ACTIVE == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/index.html
[Intel-gfx] [PATCH v2] drm/locking: add backtrace for locking contended locks without backoff
If drm_modeset_lock() returns -EDEADLK, the caller is supposed to drop
all currently held locks using drm_modeset_backoff(). Failing to do so
will result in warnings and backtraces on the paths trying to lock a
contended lock. Add support for optionally printing the backtrace on the
path that hit the deadlock and didn't gracefully handle the situation.
For example, the patch [1] inadvertently dropped the return value check
and error return on replacing calc_watermark_data() with
intel_compute_global_watermarks(). The backtraces on the subsequent
locking paths hitting WARN_ON(ctx->contended) were unhelpful, but adding
the backtrace to the deadlock path produced this helpful printout:
<7> [98.002465] drm_modeset_lock attempting to lock a contended lock without
backoff:
drm_modeset_lock+0x107/0x130
drm_atomic_get_plane_state+0x76/0x150
skl_compute_wm+0x251d/0x2b20 [i915]
intel_atomic_check+0x1942/0x29e0 [i915]
drm_atomic_check_only+0x554/0x910
drm_atomic_nonblocking_commit+0xe/0x50
drm_mode_atomic_ioctl+0x8c2/0xab0
drm_ioctl_kernel+0xac/0x140
Add new CONFIG_DRM_DEBUG_MODESET_LOCK to enable modeset lock debugging
with stack depot and trace.
[1] https://lore.kernel.org/r/20210924114741.15940-4-jani.nik...@intel.com
v2:
- default y if DEBUG_WW_MUTEX_SLOWPATH (Daniel)
- depends on DEBUG_KERNEL
Cc: Daniel Vetter
Cc: Dave Airlie
Reviewed-by: Daniel Vetter
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/Kconfig| 15 +
drivers/gpu/drm/drm_modeset_lock.c | 49 --
include/drm/drm_modeset_lock.h | 8 +
3 files changed, 70 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 2a926d0de423..a4c020a9a0eb 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -100,6 +100,21 @@ config DRM_DEBUG_DP_MST_TOPOLOGY_REFS
This has the potential to use a lot of memory and print some very
large kernel messages. If in doubt, say "N".
+config DRM_DEBUG_MODESET_LOCK
+ bool "Enable backtrace history for lock contention"
+ depends on STACKTRACE_SUPPORT
+ depends on DEBUG_KERNEL
+ depends on EXPERT
+ select STACKDEPOT
+ default y if DEBUG_WW_MUTEX_SLOWPATH
+ help
+ Enable debug tracing of failures to gracefully handle drm modeset lock
+ contention. A history of each drm modeset lock path hitting -EDEADLK
+ will be saved until gracefully handled, and the backtrace will be
+ printed when attempting to lock a contended lock.
+
+ If in doubt, say "N".
+
config DRM_FBDEV_EMULATION
bool "Enable legacy fbdev support for your modesetting driver"
depends on DRM
diff --git a/drivers/gpu/drm/drm_modeset_lock.c
b/drivers/gpu/drm/drm_modeset_lock.c
index bf8a6e823a15..4d32b61fa1fd 100644
--- a/drivers/gpu/drm/drm_modeset_lock.c
+++ b/drivers/gpu/drm/drm_modeset_lock.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
/**
* DOC: kms locking
@@ -77,6 +78,45 @@
static DEFINE_WW_CLASS(crtc_ww_class);
+#if IS_ENABLED(CONFIG_DRM_DEBUG_MODESET_LOCK)
+static noinline depot_stack_handle_t __stack_depot_save(void)
+{
+ unsigned long entries[8];
+ unsigned int n;
+
+ n = stack_trace_save(entries, ARRAY_SIZE(entries), 1);
+
+ return stack_depot_save(entries, n, GFP_NOWAIT | __GFP_NOWARN);
+}
+
+static void __stack_depot_print(depot_stack_handle_t stack_depot)
+{
+ struct drm_printer p = drm_debug_printer("drm_modeset_lock");
+ unsigned long *entries;
+ unsigned int nr_entries;
+ char *buf;
+
+ buf = kmalloc(PAGE_SIZE, GFP_NOWAIT | __GFP_NOWARN);
+ if (!buf)
+ return;
+
+ nr_entries = stack_depot_fetch(stack_depot, &entries);
+ stack_trace_snprint(buf, PAGE_SIZE, entries, nr_entries, 2);
+
+ drm_printf(&p, "attempting to lock a contended lock without
backoff:\n%s", buf);
+
+ kfree(buf);
+}
+#else /* CONFIG_DRM_DEBUG_MODESET_LOCK */
+static depot_stack_handle_t __stack_depot_save(void)
+{
+ return 0;
+}
+static void __stack_depot_print(depot_stack_handle_t stack_depot)
+{
+}
+#endif /* CONFIG_DRM_DEBUG_MODESET_LOCK */
+
/**
* drm_modeset_lock_all - take all modeset locks
* @dev: DRM device
@@ -225,7 +265,9 @@ EXPORT_SYMBOL(drm_modeset_acquire_fini);
*/
void drm_modeset_drop_locks(struct drm_modeset_acquire_ctx *ctx)
{
- WARN_ON(ctx->contended);
+ if (WARN_ON(ctx->contended))
+ __stack_depot_print(ctx->stack_depot);
+
while (!list_empty(&ctx->locked)) {
struct drm_modeset_lock *lock;
@@ -243,7 +285,8 @@ static inline int modeset_lock(struct drm_modeset_lock
*lock,
{
int ret;
- WARN_ON(ctx->contended);
+ if (WARN_ON(ctx->contended))
+ __stack_depot_print(ctx->stack_depot);
if (ctx->trylock_only) {
lockdep_assert_held(&ctx->ww_ctx);
@@ -274,6 +317,7
Re: [Intel-gfx] [PATCH] drm/locking: add backtrace for locking contended locks without backoff
On Thu, 30 Sep 2021, Daniel Vetter wrote:
> On Wed, Sep 29, 2021 at 01:32:41AM +0300, Jani Nikula wrote:
>> If drm_modeset_lock() returns -EDEADLK, the caller is supposed to drop
>> all currently held locks using drm_modeset_backoff(). Failing to do so
>> will result in warnings and backtraces on the paths trying to lock a
>> contended lock. Add support for optionally printing the backtrace on the
>> path that hit the deadlock and didn't gracefully handle the situation.
>>
>> For example, the patch [1] inadvertently dropped the return value check
>> and error return on replacing calc_watermark_data() with
>> intel_compute_global_watermarks(). The backtraces on the subsequent
>> locking paths hitting WARN_ON(ctx->contended) were unhelpful, but adding
>> the backtrace to the deadlock path produced this helpful printout:
>>
>> <7> [98.002465] drm_modeset_lock attempting to lock a contended lock without
>> backoff:
>>drm_modeset_lock+0x107/0x130
>>drm_atomic_get_plane_state+0x76/0x150
>>skl_compute_wm+0x251d/0x2b20 [i915]
>>intel_atomic_check+0x1942/0x29e0 [i915]
>>drm_atomic_check_only+0x554/0x910
>>drm_atomic_nonblocking_commit+0xe/0x50
>>drm_mode_atomic_ioctl+0x8c2/0xab0
>>drm_ioctl_kernel+0xac/0x140
>>
>> Add new CONFIG_DRM_DEBUG_MODESET_LOCK to enable modeset lock debugging
>> with stack depot and trace.
>>
>> [1] https://lore.kernel.org/r/20210924114741.15940-4-jani.nik...@intel.com
>>
>> Cc: Daniel Vetter
>> Cc: Dave Airlie
>> Signed-off-by: Jani Nikula
>
> I wonder whether we shouldn't just enable this when lock debugging is
> enabled? Otherwise we need to make sure CI have this set or it's not very
> useful. Or at least a default y if CONFIG_DEBUG_WW_MUTEX_SLOWPATH or
> something like that.
Added the conditional default y, as well as depends on DEBUG_KERNEL.
>
> Either way:
>
> Reviewed-by: Daniel Vetter
Thanks,
Jani.
>
>> ---
>> drivers/gpu/drm/Kconfig| 13
>> drivers/gpu/drm/drm_modeset_lock.c | 49 --
>> include/drm/drm_modeset_lock.h | 8 +
>> 3 files changed, 68 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
>> index b17e231ca6f7..7334975c788b 100644
>> --- a/drivers/gpu/drm/Kconfig
>> +++ b/drivers/gpu/drm/Kconfig
>> @@ -100,6 +100,19 @@ config DRM_DEBUG_DP_MST_TOPOLOGY_REFS
>>This has the potential to use a lot of memory and print some very
>>large kernel messages. If in doubt, say "N".
>>
>> +config DRM_DEBUG_MODESET_LOCK
>> +bool "Enable backtrace history for lock contention"
>> +depends on STACKTRACE_SUPPORT
>> +select STACKDEPOT
>> +depends on EXPERT
>> +help
>> + Enable debug tracing of failures to gracefully handle drm modeset lock
>> + contention. A history of each drm modeset lock path hitting -EDEADLK
>> + will be saved until gracefully handled, and the backtrace will be
>> + printed when attempting to lock a contended lock.
>> +
>> + If in doubt, say "N".
>> +
>> config DRM_FBDEV_EMULATION
>> bool "Enable legacy fbdev support for your modesetting driver"
>> depends on DRM
>> diff --git a/drivers/gpu/drm/drm_modeset_lock.c
>> b/drivers/gpu/drm/drm_modeset_lock.c
>> index bf8a6e823a15..4d32b61fa1fd 100644
>> --- a/drivers/gpu/drm/drm_modeset_lock.c
>> +++ b/drivers/gpu/drm/drm_modeset_lock.c
>> @@ -25,6 +25,7 @@
>> #include
>> #include
>> #include
>> +#include
>>
>> /**
>> * DOC: kms locking
>> @@ -77,6 +78,45 @@
>>
>> static DEFINE_WW_CLASS(crtc_ww_class);
>>
>> +#if IS_ENABLED(CONFIG_DRM_DEBUG_MODESET_LOCK)
>> +static noinline depot_stack_handle_t __stack_depot_save(void)
>> +{
>> +unsigned long entries[8];
>> +unsigned int n;
>> +
>> +n = stack_trace_save(entries, ARRAY_SIZE(entries), 1);
>> +
>> +return stack_depot_save(entries, n, GFP_NOWAIT | __GFP_NOWARN);
>> +}
>> +
>> +static void __stack_depot_print(depot_stack_handle_t stack_depot)
>> +{
>> +struct drm_printer p = drm_debug_printer("drm_modeset_lock");
>> +unsigned long *entries;
>> +unsigned int nr_entries;
>> +char *buf;
>> +
>> +buf = kmalloc(PAGE_SIZE, GFP_NOWAIT | __GFP_NOWARN);
>> +if (!buf)
>> +return;
>> +
>> +nr_entries = stack_depot_fetch(stack_depot, &entries);
>> +stack_trace_snprint(buf, PAGE_SIZE, entries, nr_entries, 2);
>> +
>> +drm_printf(&p, "attempting to lock a contended lock without
>> backoff:\n%s", buf);
>> +
>> +kfree(buf);
>> +}
>> +#else /* CONFIG_DRM_DEBUG_MODESET_LOCK */
>> +static depot_stack_handle_t __stack_depot_save(void)
>> +{
>> +return 0;
>> +}
>> +static void __stack_depot_print(depot_stack_handle_t stack_depot)
>> +{
>> +}
>> +#endif /* CONFIG_DRM_DEBUG_MODESET_LOCK */
>> +
>> /**
>> * drm_modeset_lock_all - take all modeset locks
>> * @dev: DRM device
>> @@ -225,7 +265,9 @@ EXPORT_SYMBOL(drm_modeset_acquire_fini);
>> */
>> void drm_modeset_drop_locks(s
Re: [Intel-gfx] [RFC PATCH 2/2] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
On 2021-09-16 11:38:55 [+0200], Maarten Lankhorst wrote: > Patches look good. Thank you for looking. > For both patches: > > Reviewed-by: Maarten Lankhorst > > I've been looking at running i915 with the -rt patch series, and > noticed i915_request_submit fails with GEM_BUG_ON(!irqs_disabled()); > presumably same failure exists for i915_request_unsubmit(). > > Might be worth removing those checks as well? Seems double with > lockdep_assert_held on an irq lock anyway. yes, let me prepare something in a few. > I've also noticed the local_irq_disable/enable is removed from > intel_pipe_update_(start/end) in the rt series. It might make sense > from a -rt point of view, but that code needs to run without > interruptions, or i915 may show visual glitches or even locks up the > system. > > It should just be a set of registers hammered in, but the code might > needs to be fixed to take the mmio lock as outer lock, and become a > strict set of register read/writes only. Let me see. So Anton Lundin (Cc:) reported glitches due to _this_ patch on -RT. I have just a Sandybridge around with a i915 and it does not get near that code here. > ~Maarten Sebastian
Re: [Intel-gfx] [PATCH] drm/i915/hdmi: convert intel_hdmi_to_dev to intel_hdmi_to_i915
On Tue, 21 Sep 2021, Ville Syrjälä wrote:
> On Tue, Sep 21, 2021 at 02:02:44PM +0300, Jani Nikula wrote:
>> Prefer i915 over drm pointer.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/display/intel_hdmi.c | 16 +++-
>> 1 file changed, 7 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
>> b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> index 1bc33766ed39..1e8a87f81e8e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> @@ -53,21 +53,20 @@
>> #include "intel_panel.h"
>> #include "intel_snps_phy.h"
>>
>> -static struct drm_device *intel_hdmi_to_dev(struct intel_hdmi *intel_hdmi)
>> +static struct drm_i915_private *intel_hdmi_to_i915(struct intel_hdmi
>> *intel_hdmi)
>> {
>> -return hdmi_to_dig_port(intel_hdmi)->base.base.dev;
>> +return to_i915(hdmi_to_dig_port(intel_hdmi)->base.base.dev);
>> }
>>
>> static void
>> assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi)
>> {
>> -struct drm_device *dev = intel_hdmi_to_dev(intel_hdmi);
>> -struct drm_i915_private *dev_priv = to_i915(dev);
>> +struct drm_i915_private *dev_priv = intel_hdmi_to_i915(intel_hdmi);
>> u32 enabled_bits;
>>
>> enabled_bits = HAS_DDI(dev_priv) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE;
>>
>> -drm_WARN(dev,
>> +drm_WARN(&dev_priv->drm,
>> intel_de_read(dev_priv, intel_hdmi->hdmi_reg) & enabled_bits,
>> "HDMI port enabled, expecting disabled\n");
>> }
>> @@ -1246,7 +1245,7 @@ static void hsw_set_infoframes(struct intel_encoder
>> *encoder,
>>
>> void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool
>> enable)
>> {
>> -struct drm_i915_private *dev_priv = to_i915(intel_hdmi_to_dev(hdmi));
>> +struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);
>> struct i2c_adapter *adapter =
>> intel_gmbus_get_adapter(dev_priv, hdmi->ddc_bus);
>>
>> @@ -1830,7 +1829,7 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,
>>int clock, bool respect_downstream_limits,
>>bool has_hdmi_sink)
>> {
>> -struct drm_i915_private *dev_priv = to_i915(intel_hdmi_to_dev(hdmi));
>> +struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);
>>
>> if (clock < 25000)
>> return MODE_CLOCK_LOW;
>> @@ -1946,8 +1945,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>>struct drm_display_mode *mode)
>> {
>> struct intel_hdmi *hdmi =
>> intel_attached_hdmi(to_intel_connector(connector));
>> -struct drm_device *dev = intel_hdmi_to_dev(hdmi);
>> -struct drm_i915_private *dev_priv = to_i915(dev);
>> +struct drm_i915_private *dev_priv = intel_hdmi_to_i915(hdmi);
>> enum drm_mode_status status;
>> int clock = mode->clock;
>> int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
>> --
>> 2.30.2
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PULL] drm-misc-fixes
On Thu, Sep 30, 2021 at 12:06:21PM +0200, Maarten Lankhorst wrote: > drm-misc-fixes-2021-09-30: > drm-misc-fixes for v5.15: > - Not sure if drm-misc-fixes-2021-09-08 tag was pulled, assuming it is. > - Power management fixes for vc4. > - Compiler fix for vc4. > - Cursor fix for nouveau. > - Fix ttm buffer moves for ampere gpu's by adding minimal acceleration > support. > - Small rockchip fixes. > - Fix DT bindings indent for ili9341. > - Fix y030xx067a init sequence to not get a yellow tint. > - Kconfig fix for fb_simple vs simpledrm. > The following changes since commit 6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f: > > Linux 5.15-rc1 (2021-09-12 16:28:37 -0700) > > are available in the Git repository at: > > git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2021-09-30 > > for you to fetch changes up to fd09961dbb9ca6558d8ad318a3967c1048bdb090: > > fbdev: simplefb: fix Kconfig dependencies (2021-09-29 09:26:58 +0200) > > > drm-misc-fixes for v5.15: > - Not sure if drm-misc-fixes-2021-09-08 tag was pulled, assuming it is. > - Power management fixes for vc4. > - Compiler fix for vc4. > - Cursor fix for nouveau. > - Fix ttm buffer moves for ampere gpu's by adding minimal acceleration > support. > - Small rockchip fixes. > - Fix DT bindings indent for ili9341. > - Fix y030xx067a init sequence to not get a yellow tint. > - Kconfig fix for fb_simple vs simpledrm. I can't pull this, because it conflicts with vc4 reverts in -rc2. There's a completely busted merge resolution in drm-tip, which doesn't even compile. Please - drop all vc4 patches - rebase onto -rc3 or -rc4 if it's too late I'll do the pull to Linus this afternoon, would be good to get the other fixes in. -Daniel > > > Arnd Bergmann (1): > fbdev: simplefb: fix Kconfig dependencies > > Ben Skeggs (3): > drm/nouveau/kms/tu102-: delay enabling cursor until after assign_windows > drm/nouveau/ga102-: support ttm buffer moves via copy engine > drm/nouveau/fifo/ga102: initialise chid on return from channel creation > > Chris Morgan (1): > drm/rockchip: Update crtc fixup to account for fractional clk change > > Christophe Branchereau (1): > drm/panel: abt-y030xx067a: yellow tint fix > > Edmund Dea (1): > drm/kmb: Enable alpha blended second plane > > Jernej Skrabec (1): > drm/sun4i: dw-hdmi: Fix HDMI PHY clock setup > > Krzysztof Kozlowski (1): > dt-bindings: panel: ili9341: correct indentation > > Maarten Lankhorst (1): > Merge drm/drm-fixes into drm-misc-fixes > > Maxime Ripard (7): > drm/vc4: select PM > drm/vc4: hdmi: Make sure the controller is powered up during bind > drm/vc4: hdmi: Rework the pre_crtc_configure error handling > drm/vc4: hdmi: Split the CEC disable / enable functions in two > drm/vc4: hdmi: Make sure the device is powered with CEC > drm/vc4: hdmi: Warn if we access the controller while disabled > drm/vc4: hdmi: Remove unused struct > > Palmer Dabbelt (1): > drm/rockchip: cdn-dp-core: Fix cdn_dp_resume unused warning > > xinhui pan (1): > drm/ttm: Fix a deadlock if the target BO is not idle during swap > > .../bindings/display/panel/ilitek,ili9341.yaml | 2 +- > drivers/gpu/drm/kmb/kmb_drv.c | 8 +- > drivers/gpu/drm/kmb/kmb_drv.h | 5 + > drivers/gpu/drm/kmb/kmb_plane.c| 81 +- > drivers/gpu/drm/kmb/kmb_plane.h| 5 +- > drivers/gpu/drm/kmb/kmb_regs.h | 3 + > drivers/gpu/drm/nouveau/dispnv50/head.c| 2 +- > drivers/gpu/drm/nouveau/include/nvif/class.h | 2 + > drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h | 1 + > drivers/gpu/drm/nouveau/nouveau_bo.c | 1 + > drivers/gpu/drm/nouveau/nouveau_chan.c | 6 +- > drivers/gpu/drm/nouveau/nouveau_drm.c | 4 + > drivers/gpu/drm/nouveau/nv84_fence.c | 2 +- > drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 3 + > drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild| 1 + > drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga102.c | 311 > + > drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c| 7 +- > drivers/gpu/drm/panel/panel-abt-y030xx067a.c | 4 +- > drivers/gpu/drm/rockchip/cdn-dp-core.c | 2 +- > drivers/gpu/drm/rockchip/rockchip_drm_vop.c| 26 +- > drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 7 +- > drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 4 +- > drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 97 --- > drivers/gpu/drm/vc4/Kconfig| 1 + > drivers/gpu/drm/vc4/vc4_hdmi.c | 133 + > drivers/gpu/drm/vc4/vc4_hdmi_regs.h| 6 + > drivers/of/base.c
Re: [Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE
On Fri, 01 Oct 2021, Chris Wilson wrote:
> Quoting Lucas De Marchi (2021-10-01 08:40:41)
>> When trying to bring IS_ACTIVE to linux/kconfig.h I thought it wouldn't
>> provide much value just encapsulating it in a boolean context. So I also
>> added the support for handling undefined macros as the IS_ENABLED()
>> counterpart. However the feedback received from Masahiro Yamada was that
>> it is too ugly, not providing much value. And just wrapping in a boolean
>> context is too dumb - we could simply open code it.
>>
>> As detailed in commit babaab2f4738 ("drm/i915: Encapsulate kconfig
>> constant values inside boolean predicates"), the IS_ACTIVE macro was
>> added to workaround a compilation warning. However after checking again
>> our current uses of IS_ACTIVE it turned out there is only
>> 1 case in which it would potentially trigger a warning. All the others
>> can simply use the shorter version, without wrapping it in any macro.
>> And even that single one didn't trigger any warning in gcc 10.3.
>>
>> So here I'm dialing all the way back to simply removing the macro. If it
>> triggers warnings in future we may change the few cases to check for > 0
>> or != 0. Another possibility would be to use the great "not not
>> operator" for all positive checks, which would allow us to maintain
>> consistency. However let's try first the simplest form though, hopefully
>> we don't hit broken compilers spitting a warning:
>
> You didn't prevent the compilation warning this re-introduces.
>
> drivers/gpu/drm/i915/i915_config.c:11 i915_fence_context_timeout() warn:
> should this be a bitwise op?
> drivers/gpu/drm/i915/i915_request.c:1679 i915_request_wait() warn: should
> this be a bitwise op?
Looks like that's a Smatch warning. The immediate fix would be to just
add the != 0 in the relevant places. But this is stuff that's just going
to get broken again unless we add Smatch to CI. Most people aren't
running it on a regular basis.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [PATCH] drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers
For controlling the audio SDP split.
Bspec: 63837
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3a20a55d2512..0d2d89ea376b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9763,6 +9763,11 @@ enum {
#define AUDIO_CP_READY(trans)((1 << 1) << ((trans) * 4))
#define AUDIO_ELD_VALID(trans) ((1 << 0) << ((trans) * 4))
+#define _AUD_TCA_DP_2DOT0_CTRL 0x650bc
+#define _AUD_TCB_DP_2DOT0_CTRL 0x651bc
+#define AUD_DP_2DOT0_CTRL(trans) _MMIO_TRANS(trans,
_AUD_TCA_DP_2DOT0_CTRL, _AUD_TCB_DP_2DOT0_CTRL)
+#define AUD_ENABLE_SDP_SPLIT REG_BIT(31)
+
#define HSW_AUD_CHICKENBIT _MMIO(0x65f10)
#define SKL_AUD_CODEC_WAKE_SIGNAL(1 << 15)
--
2.30.2
[Intel-gfx] [PATCH] drm/i915/dg2: update link training for 128b/132b
The 128b/132b channel coding link training uses more straightforward TX
FFE preset values.
v2: Fix UHBR rate checks, use intel_dp_is_uhbr() helper
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++-
.../drm/i915/display/intel_dp_link_training.c | 86 +--
2 files changed, 70 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 51cd0420e00e..341fda4055ed 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1398,11 +1398,16 @@ static int translate_signal_level(struct intel_dp
*intel_dp,
static int intel_ddi_dp_level(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
- u8 train_set = intel_dp->train_set[0];
- u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
- DP_TRAIN_PRE_EMPHASIS_MASK);
+ if (intel_dp_is_uhbr(crtc_state)) {
+ /* FIXME: We'll want independent presets for each lane. */
+ return intel_dp->train_set[0] & DP_TX_FFE_PRESET_VALUE_MASK;
+ } else {
+ u8 train_set = intel_dp->train_set[0];
+ u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
+ DP_TRAIN_PRE_EMPHASIS_MASK);
- return translate_signal_level(intel_dp, signal_levels);
+ return translate_signal_level(intel_dp, signal_levels);
+ }
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 053ed9302cda..1dda3d31394e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -301,6 +301,24 @@ static u8 intel_dp_phy_preemph_max(struct intel_dp
*intel_dp,
return preemph_max;
}
+static void intel_dp_128b132b_adjust_train(struct intel_dp *intel_dp,
+ const struct intel_crtc_state
*crtc_state,
+ const u8
link_status[DP_LINK_STATUS_SIZE])
+{
+ int lane;
+ u8 tx_ffe = 0;
+
+ /*
+* FIXME: We'll want independent presets for each lane. See also
+* intel_ddi_dp_level() and intel_snps_phy_ddi_vswing_sequence().
+*/
+ for (lane = 0; lane < crtc_state->lane_count; lane++)
+ tx_ffe = max(tx_ffe,
drm_dp_get_adjust_tx_ffe_preset(link_status, lane));
+
+ for (lane = 0; lane < crtc_state->lane_count; lane++)
+ intel_dp->train_set[lane] = tx_ffe;
+}
+
void
intel_dp_get_adjust_train(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
@@ -313,6 +331,11 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
u8 voltage_max;
u8 preemph_max;
+ if (intel_dp_is_uhbr(crtc_state)) {
+ intel_dp_128b132b_adjust_train(intel_dp, crtc_state,
link_status);
+ return;
+ }
+
for (lane = 0; lane < crtc_state->lane_count; lane++) {
v = max(v, drm_dp_get_adjust_request_voltage(link_status,
lane));
p = max(p, drm_dp_get_adjust_request_pre_emphasis(link_status,
lane));
@@ -402,14 +425,21 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
u8 train_set = intel_dp->train_set[0];
char phy_name[10];
- drm_dbg_kms(&dev_priv->drm, "Using vswing level %d%s, pre-emphasis
level %d%s, at %s\n",
- train_set & DP_TRAIN_VOLTAGE_SWING_MASK,
- train_set & DP_TRAIN_MAX_SWING_REACHED ? " (max)" : "",
- (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) >>
- DP_TRAIN_PRE_EMPHASIS_SHIFT,
- train_set & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ?
- " (max)" : "",
- intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)));
+ if (intel_dp_is_uhbr(crtc_state)) {
+ /* FIXME: We'll want independent presets for each lane. */
+ drm_dbg_kms(&dev_priv->drm, "%s: Using 128b/132b TX FFE preset
%u\n",
+ intel_dp_phy_name(dp_phy, phy_name,
sizeof(phy_name)),
+ train_set & DP_TX_FFE_PRESET_VALUE_MASK);
+ } else {
+ drm_dbg_kms(&dev_priv->drm, "%s: Using 8b/10b vswing level
%d%s, pre-emphasis level %d%s\n",
+ intel_dp_phy_name(dp_phy, phy_name,
sizeof(phy_name)),
+ train_set & DP_TRAIN_VOLTAGE_SWING_MASK,
+ train_set & DP_TRAIN_MAX_SWING_REACHED ? " (max)" :
"",
+ (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) >>
+ DP_TRAIN_PRE_EMPHASIS_SHIFT,
+ train_set & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ?
+
Re: [Intel-gfx] [RFC 1/6] sched: Add nice value change notifier
On 01/10/2021 10:04, Tvrtko Ursulin wrote:
Hi Peter,
On 30/09/2021 19:33, Peter Zijlstra wrote:
On Thu, Sep 30, 2021 at 06:15:47PM +0100, Tvrtko Ursulin wrote:
void set_user_nice(struct task_struct *p, long nice)
{
bool queued, running;
- int old_prio;
+ int old_prio, ret;
struct rq_flags rf;
struct rq *rq;
@@ -6913,6 +6945,9 @@ void set_user_nice(struct task_struct *p, long
nice)
*/
p->sched_class->prio_changed(rq, p, old_prio);
+ ret = atomic_notifier_call_chain(&user_nice_notifier_list, nice,
p);
+ WARN_ON_ONCE(ret != NOTIFY_DONE);
+
out_unlock:
task_rq_unlock(rq, p, &rf);
}
No, we're not going to call out to exported, and potentially unbounded,
functions under scheduler locks.
Agreed, that's another good point why it is even more hairy, as I have
generally alluded in the cover letter.
Do you have any immediate thoughts on possible alternatives?
Like for instance if I did a queue_work from set_user_nice and then ran
a notifier chain async from a worker? I haven't looked at yet what
repercussion would that have in terms of having to cancel the pending
workers when tasks exit. I can try and prototype that and see how it
would look.
Hm or I simply move calling the notifier chain to after task_rq_unlock?
That would leave it run under the tasklist lock so probably still quite bad.
Or another option - I stash aside the tasks on a private list (adding
new list_head to trask_struct), with elevated task ref count, and run
the notifier chain outside any locked sections, at the end of the
setpriority syscall. This way only the sycall caller pays the cost of
any misbehaving notifiers in the chain. Further improvement could be per
task notifiers but that would grow the task_struct more.
Regards,
Tvrtko
There is of course an example ioprio which solves the runtime
adjustments via a dedicated system call. But I don't currently feel that
a third one would be a good solution. At least I don't see a case for
being able to decouple the priority of CPU and GPU and computations.
Have I opened a large can of worms? :)
Regards,
Tvrtko
Re: [Intel-gfx] [PATCH 17/28] drm/i915: use the new iterator in i915_gem_busy_ioctl v2
On 01/10/2021 11:05, Christian König wrote:
This makes the function much simpler since the complex
retry logic is now handled else where.
Signed-off-by: Christian König
Reviewed-by: Tvrtko Ursulin
Sorry I retract until you add the text about the increased cost of the
added atomics. I think the point is important to discuss given proposal
goes from zero atomics to num_fences * 2 (fence get/put unless I am
mistaken) atomics per busy ioctl. That makes me lean towards just
leaving this as is since it is not that complex.
Regards,
Tvrtko
---
drivers/gpu/drm/i915/gem/i915_gem_busy.c | 35 ++--
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_busy.c
b/drivers/gpu/drm/i915/gem/i915_gem_busy.c
index 6234e17259c1..dc72b36dae54 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_busy.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_busy.c
@@ -82,8 +82,8 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
{
struct drm_i915_gem_busy *args = data;
struct drm_i915_gem_object *obj;
- struct dma_resv_list *list;
- unsigned int seq;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
int err;
err = -ENOENT;
@@ -109,27 +109,20 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
* to report the overall busyness. This is what the wait-ioctl does.
*
*/
-retry:
- seq = raw_read_seqcount(&obj->base.resv->seq);
-
- /* Translate the exclusive fence to the READ *and* WRITE engine */
- args->busy = busy_check_writer(dma_resv_excl_fence(obj->base.resv));
-
- /* Translate shared fences to READ set of engines */
- list = dma_resv_shared_list(obj->base.resv);
- if (list) {
- unsigned int shared_count = list->shared_count, i;
-
- for (i = 0; i < shared_count; ++i) {
- struct dma_fence *fence =
- rcu_dereference(list->shared[i]);
-
+ args->busy = 0;
+ dma_resv_iter_begin(&cursor, obj->base.resv, true);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ if (dma_resv_iter_is_restarted(&cursor))
+ args->busy = 0;
+
+ if (dma_resv_iter_is_exclusive(&cursor))
+ /* Translate the exclusive fence to the READ *and*
WRITE engine */
+ args->busy |= busy_check_writer(fence);
+ else
+ /* Translate shared fences to READ set of engines */
args->busy |= busy_check_reader(fence);
- }
}
-
- if (args->busy && read_seqcount_retry(&obj->base.resv->seq, seq))
- goto retry;
+ dma_resv_iter_end(&cursor);
err = 0;
out:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: remove IS_ACTIVE
== Series Details == Series: drm/i915: remove IS_ACTIVE URL : https://patchwork.freedesktop.org/series/95312/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10671_full -> Patchwork_21214_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_21214_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_21214_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_21214_full: ### IGT changes ### Possible regressions * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-kbl: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-kbl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html Known issues Here are the changes found in Patchwork_21214_full that come from known issues: ### IGT changes ### Issues hit * igt@feature_discovery@display-4x: - shard-tglb: NOTRUN -> [SKIP][2] ([i915#1839]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb3/igt@feature_discov...@display-4x.html * igt@gem_ctx_persistence@smoketest: - shard-tglb: [PASS][3] -> [FAIL][4] ([i915#2896]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-tglb6/igt@gem_ctx_persiste...@smoketest.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb7/igt@gem_ctx_persiste...@smoketest.html * igt@gem_ctx_sseu@engines: - shard-tglb: NOTRUN -> [SKIP][5] ([i915#280]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb3/igt@gem_ctx_s...@engines.html * igt@gem_eio@in-flight-suspend: - shard-tglb: [PASS][6] -> [INCOMPLETE][7] ([i915#456]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-tglb3/igt@gem_...@in-flight-suspend.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb7/igt@gem_...@in-flight-suspend.html * igt@gem_eio@unwedge-stress: - shard-tglb: NOTRUN -> [TIMEOUT][8] ([i915#2369] / [i915#3063] / [i915#3648]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb6/igt@gem_...@unwedge-stress.html - shard-iclb: [PASS][9] -> [TIMEOUT][10] ([i915#2369] / [i915#2481] / [i915#3070]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-iclb3/igt@gem_...@unwedge-stress.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-iclb3/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-iclb2/igt@gem_exec_fair@basic-none-sh...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-iclb5/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][13] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-iclb1/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-tglb6/igt@gem_exec_fair@basic-p...@bcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb7/igt@gem_exec_fair@basic-p...@bcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [PASS][16] -> [FAIL][17] ([i915#2842]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-kbl7/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - shard-tglb: NOTRUN -> [SKIP][18] ([fdo#109313]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb5/igt@gem_exec_fl...@basic-batch-kernel-default-cmd.html * igt@gem_exec_params@no-bsd: - shard-tglb: NOTRUN -> [SKIP][19] ([fdo#109283]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-tglb6/igt@gem_exec_par...@no-bsd.html * igt@gem_exec_whisper@basic-queues-forked-all: - shard-glk: [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10671/shard-glk8/igt@gem_exec_whis...@basic-queues-forked-all.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21214/shard-glk7/igt@gem_exec_whis...@basic-queues-forked-all.html * igt@gem_h
Re: [Intel-gfx] [vfio:next 33/38] drivers/gpu/drm/i915/i915_pci.c:975:2: warning: missing field 'override_only' initializer
On Fri, 27 Aug 2021, Jason Gunthorpe wrote:
> On Fri, Aug 27, 2021 at 03:12:36PM +, kernel test robot wrote:
>> tree: https://github.com/awilliam/linux-vfio.git next
>> head: ea870730d83fc13a5fa2bd0e175176d7ac8a400a
>> commit: 343b7258687ecfbb363bfda8833a7cf641aac524 [33/38] PCI: Add
>> 'override_only' field to struct pci_device_id
>> config: i386-randconfig-a004-20210827 (attached as .config)
>> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project
>> 1076082a0d97bd5c16a25ee7cf3dbb6ee4b5a9fe)
>> reproduce (this is a W=1 build):
>> wget
>> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
>> ~/bin/make.cross
>> chmod +x ~/bin/make.cross
>> #
>> https://github.com/awilliam/linux-vfio/commit/343b7258687ecfbb363bfda8833a7cf641aac524
>> git remote add vfio https://github.com/awilliam/linux-vfio.git
>> git fetch --no-tags vfio next
>> git checkout 343b7258687ecfbb363bfda8833a7cf641aac524
>> # save the attached .config to linux build tree
>> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=i386
>>
>> If you fix the issue, kindly add following tag as appropriate
>> Reported-by: kernel test robot
>
> Ugh, this is due to this code:
>
> #define INTEL_VGA_DEVICE(id, info) { \
> 0x8086, id, \
> ~0, ~0, \
> 0x03, 0xff, \
> (unsigned long) info }
>
> #define INTEL_QUANTA_VGA_DEVICE(info) { \
> 0x8086, 0x16a, \
> 0x152d, 0x8990, \
> 0x03, 0xff, \
> (unsigned long) info }
>
>
> Which really should be using the normal pattern for defining these
> structs:
>
> #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
> .class = (dev_class), .class_mask = (dev_class_mask), \
> .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
> .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
>
> The warning is also not a real issue, just clang being overzealous.
Stumbled upon this old report, sorry for the delayed response.
The reason it's not using designated initializers is that the same file
gets synced to some userspace projects (at least libdrm and
igt-gpu-tools) which use the macros to initialize slightly different
structs. For example, igt uses struct pci_id_match from libpciaccess-dev
(/usr/include/pciaccess.h) and can't easily adapt to different member
names.
Anyway, we've got
subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
in drivers/gpu/drm/i915/Makefile, so I wonder why they're not respected.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH] drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers
On Fri, Oct 01, 2021 at 01:03:16PM +0300, Jani Nikula wrote:
> For controlling the audio SDP split.
>
> Bspec: 63837
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_reg.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3a20a55d2512..0d2d89ea376b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9763,6 +9763,11 @@ enum {
> #define AUDIO_CP_READY(trans) ((1 << 1) << ((trans) * 4))
> #define AUDIO_ELD_VALID(trans) ((1 << 0) << ((trans) * 4))
>
> +#define _AUD_TCA_DP_2DOT0_CTRL 0x650bc
> +#define _AUD_TCB_DP_2DOT0_CTRL 0x651bc
> +#define AUD_DP_2DOT0_CTRL(trans) _MMIO_TRANS(trans,
> _AUD_TCA_DP_2DOT0_CTRL, _AUD_TCB_DP_2DOT0_CTRL)
> +#define AUD_ENABLE_SDP_SPLITREG_BIT(31)
Don't need the other bits? Most of the do say we don't need to
program then. But the hblank guardband thing looks like maybe
we might need it in some cases?
Either way, what you have here matches my spec so
Reviewed-by: Ville Syrjälä
> +
> #define HSW_AUD_CHICKENBIT _MMIO(0x65f10)
> #define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15)
>
> --
> 2.30.2
--
Ville Syrjälä
Intel
Re: [Intel-gfx] [PATCH] drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers
On Fri, 01 Oct 2021, Ville Syrjälä wrote:
> On Fri, Oct 01, 2021 at 01:03:16PM +0300, Jani Nikula wrote:
>> For controlling the audio SDP split.
>>
>> Bspec: 63837
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 5 +
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h
>> b/drivers/gpu/drm/i915/i915_reg.h
>> index 3a20a55d2512..0d2d89ea376b 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -9763,6 +9763,11 @@ enum {
>> #define AUDIO_CP_READY(trans) ((1 << 1) << ((trans) * 4))
>> #define AUDIO_ELD_VALID(trans)((1 << 0) << ((trans) * 4))
>>
>> +#define _AUD_TCA_DP_2DOT0_CTRL 0x650bc
>> +#define _AUD_TCB_DP_2DOT0_CTRL 0x651bc
>> +#define AUD_DP_2DOT0_CTRL(trans)_MMIO_TRANS(trans,
>> _AUD_TCA_DP_2DOT0_CTRL, _AUD_TCB_DP_2DOT0_CTRL)
>> +#define AUD_ENABLE_SDP_SPLIT REG_BIT(31)
>
> Don't need the other bits? Most of the do say we don't need to
> program then. But the hblank guardband thing looks like maybe
> we might need it in some cases?
Yeah, always the battle what to include. This was a for a specific case
that's still brewing, and getting the registers defined is the low
hanging fruit.
>
> Either way, what you have here matches my spec so
> Reviewed-by: Ville Syrjälä
Thanks,
Jani.
>
>> +
>> #define HSW_AUD_CHICKENBIT _MMIO(0x65f10)
>> #define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15)
>>
>> --
>> 2.30.2
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [PATCH 23/28] drm: use new iterator in drm_gem_fence_array_add_implicit v3
Simplifying the code a bit.
v2: add missing rcu_read_lock()/unlock()
v3: switch to locked version
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_gem.c | 26 +-
1 file changed, 5 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 09c820045859..4dcdec6487bb 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -1340,31 +1340,15 @@ int drm_gem_fence_array_add_implicit(struct xarray
*fence_array,
struct drm_gem_object *obj,
bool write)
{
- int ret;
- struct dma_fence **fences;
- unsigned int i, fence_count;
-
- if (!write) {
- struct dma_fence *fence =
- dma_resv_get_excl_unlocked(obj->resv);
-
- return drm_gem_fence_array_add(fence_array, fence);
- }
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
+ int ret = 0;
- ret = dma_resv_get_fences(obj->resv, NULL,
- &fence_count, &fences);
- if (ret || !fence_count)
- return ret;
-
- for (i = 0; i < fence_count; i++) {
- ret = drm_gem_fence_array_add(fence_array, fences[i]);
+ dma_resv_for_each_fence(&cursor, obj->resv, write, fence) {
+ ret = drm_gem_fence_array_add(fence_array, fence);
if (ret)
break;
}
-
- for (; i < fence_count; i++)
- dma_fence_put(fences[i]);
- kfree(fences);
return ret;
}
EXPORT_SYMBOL(drm_gem_fence_array_add_implicit);
--
2.25.1
[Intel-gfx] Deploying new iterator interface for dma-buf
Hi guys, I've fixed up the lockdep splat in the new selftests found by the CI systems and added another path for dma_resv_poll. I know you guys are flooded, but can we get at least the first few patches committed? The patches to change the individual drivers could also be pushed later on I think. Thanks, Christian.
[Intel-gfx] [PATCH 08/28] dma-buf: use the new iterator in dma_buf_debug_show
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 61e20ae7b08b..8242b5d9baeb 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -1356,10 +1356,9 @@ static int dma_buf_debug_show(struct seq_file *s, void
*unused)
{
struct dma_buf *buf_obj;
struct dma_buf_attachment *attach_obj;
- struct dma_resv *robj;
- struct dma_resv_list *fobj;
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
- int count = 0, attach_count, shared_count, i;
+ int count = 0, attach_count;
size_t size = 0;
int ret;
@@ -1386,21 +1385,10 @@ static int dma_buf_debug_show(struct seq_file *s, void
*unused)
file_inode(buf_obj->file)->i_ino,
buf_obj->name ?: "");
- robj = buf_obj->resv;
- fence = dma_resv_excl_fence(robj);
- if (fence)
- seq_printf(s, "\tExclusive fence: %s %s %ssignalled\n",
- fence->ops->get_driver_name(fence),
- fence->ops->get_timeline_name(fence),
- dma_fence_is_signaled(fence) ? "" : "un");
-
- fobj = rcu_dereference_protected(robj->fence,
-dma_resv_held(robj));
- shared_count = fobj ? fobj->shared_count : 0;
- for (i = 0; i < shared_count; i++) {
- fence = rcu_dereference_protected(fobj->shared[i],
- dma_resv_held(robj));
- seq_printf(s, "\tShared fence: %s %s %ssignalled\n",
+ dma_resv_for_each_fence(&cursor, buf_obj->resv, true, fence) {
+ seq_printf(s, "\t%s fence: %s %s %ssignalled\n",
+ dma_resv_iter_is_exclusive(&cursor) ?
+ "Exclusive" : "Shared",
fence->ops->get_driver_name(fence),
fence->ops->get_timeline_name(fence),
dma_fence_is_signaled(fence) ? "" : "un");
--
2.25.1
[Intel-gfx] [PATCH 17/28] drm/i915: use the new iterator in i915_gem_busy_ioctl v2
This makes the function much simpler since the complex
retry logic is now handled else where.
Signed-off-by: Christian König
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_busy.c | 35 ++--
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_busy.c
b/drivers/gpu/drm/i915/gem/i915_gem_busy.c
index 6234e17259c1..dc72b36dae54 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_busy.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_busy.c
@@ -82,8 +82,8 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
{
struct drm_i915_gem_busy *args = data;
struct drm_i915_gem_object *obj;
- struct dma_resv_list *list;
- unsigned int seq;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
int err;
err = -ENOENT;
@@ -109,27 +109,20 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
* to report the overall busyness. This is what the wait-ioctl does.
*
*/
-retry:
- seq = raw_read_seqcount(&obj->base.resv->seq);
-
- /* Translate the exclusive fence to the READ *and* WRITE engine */
- args->busy = busy_check_writer(dma_resv_excl_fence(obj->base.resv));
-
- /* Translate shared fences to READ set of engines */
- list = dma_resv_shared_list(obj->base.resv);
- if (list) {
- unsigned int shared_count = list->shared_count, i;
-
- for (i = 0; i < shared_count; ++i) {
- struct dma_fence *fence =
- rcu_dereference(list->shared[i]);
-
+ args->busy = 0;
+ dma_resv_iter_begin(&cursor, obj->base.resv, true);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ if (dma_resv_iter_is_restarted(&cursor))
+ args->busy = 0;
+
+ if (dma_resv_iter_is_exclusive(&cursor))
+ /* Translate the exclusive fence to the READ *and*
WRITE engine */
+ args->busy |= busy_check_writer(fence);
+ else
+ /* Translate shared fences to READ set of engines */
args->busy |= busy_check_reader(fence);
- }
}
-
- if (args->busy && read_seqcount_retry(&obj->base.resv->seq, seq))
- goto retry;
+ dma_resv_iter_end(&cursor);
err = 0;
out:
--
2.25.1
[Intel-gfx] [PATCH 09/28] dma-buf: use the new iterator in dma_resv_poll
Simplify the code a bit.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 36 ++--
1 file changed, 6 insertions(+), 30 deletions(-)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 8242b5d9baeb..beb504a92d60 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -209,19 +209,14 @@ static void dma_buf_poll_cb(struct dma_fence *fence,
struct dma_fence_cb *cb)
dma_fence_put(fence);
}
-static bool dma_buf_poll_shared(struct dma_resv *resv,
+static bool dma_buf_poll_add_cb(struct dma_resv *resv, bool write,
struct dma_buf_poll_cb_t *dcb)
{
- struct dma_resv_list *fobj = dma_resv_shared_list(resv);
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
- int i, r;
-
- if (!fobj)
- return false;
+ int r;
- for (i = 0; i < fobj->shared_count; ++i) {
- fence = rcu_dereference_protected(fobj->shared[i],
- dma_resv_held(resv));
+ dma_resv_for_each_fence(&cursor, resv, write, fence) {
dma_fence_get(fence);
r = dma_fence_add_callback(fence, &dcb->cb, dma_buf_poll_cb);
if (!r)
@@ -232,24 +227,6 @@ static bool dma_buf_poll_shared(struct dma_resv *resv,
return false;
}
-static bool dma_buf_poll_excl(struct dma_resv *resv,
- struct dma_buf_poll_cb_t *dcb)
-{
- struct dma_fence *fence = dma_resv_excl_fence(resv);
- int r;
-
- if (!fence)
- return false;
-
- dma_fence_get(fence);
- r = dma_fence_add_callback(fence, &dcb->cb, dma_buf_poll_cb);
- if (!r)
- return true;
- dma_fence_put(fence);
-
- return false;
-}
-
static __poll_t dma_buf_poll(struct file *file, poll_table *poll)
{
struct dma_buf *dmabuf;
@@ -282,8 +259,7 @@ static __poll_t dma_buf_poll(struct file *file, poll_table
*poll)
spin_unlock_irq(&dmabuf->poll.lock);
if (events & EPOLLOUT) {
- if (!dma_buf_poll_shared(resv, dcb) &&
- !dma_buf_poll_excl(resv, dcb))
+ if (!dma_buf_poll_add_cb(resv, true, dcb))
/* No callback queued, wake up any other
waiters */
dma_buf_poll_cb(NULL, &dcb->cb);
else
@@ -303,7 +279,7 @@ static __poll_t dma_buf_poll(struct file *file, poll_table
*poll)
spin_unlock_irq(&dmabuf->poll.lock);
if (events & EPOLLIN) {
- if (!dma_buf_poll_excl(resv, dcb))
+ if (!dma_buf_poll_add_cb(resv, false, dcb))
/* No callback queued, wake up any other
waiters */
dma_buf_poll_cb(NULL, &dcb->cb);
else
--
2.25.1
[Intel-gfx] [PATCH 21/28] drm/i915: use new iterator in i915_gem_object_wait_priority
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 31 +---
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c
b/drivers/gpu/drm/i915/gem/i915_gem_wait.c
index a13193db1dba..569658c7859c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c
@@ -118,32 +118,13 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object
*obj,
unsigned int flags,
const struct i915_sched_attr *attr)
{
- struct dma_fence *excl;
-
- if (flags & I915_WAIT_ALL) {
- struct dma_fence **shared;
- unsigned int count, i;
- int ret;
-
- ret = dma_resv_get_fences(obj->base.resv, &excl, &count,
- &shared);
- if (ret)
- return ret;
-
- for (i = 0; i < count; i++) {
- i915_gem_fence_wait_priority(shared[i], attr);
- dma_fence_put(shared[i]);
- }
-
- kfree(shared);
- } else {
- excl = dma_resv_get_excl_unlocked(obj->base.resv);
- }
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
- if (excl) {
- i915_gem_fence_wait_priority(excl, attr);
- dma_fence_put(excl);
- }
+ dma_resv_iter_begin(&cursor, obj->base.resv, flags & I915_WAIT_ALL);
+ dma_resv_for_each_fence_unlocked(&cursor, fence)
+ i915_gem_fence_wait_priority(fence, attr);
+ dma_resv_iter_end(&cursor);
return 0;
}
--
2.25.1
[Intel-gfx] [PATCH 14/28] drm/msm: use new iterator in msm_gem_describe
Simplifying the code a bit. Also drop the RCU read side lock since the
object is locked anyway.
Untested since I can't get the driver to compile on !ARM.
Signed-off-by: Christian König
---
drivers/gpu/drm/msm/msm_gem.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 40a9863f5951..5bd511f07c07 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -880,7 +880,7 @@ void msm_gem_describe(struct drm_gem_object *obj, struct
seq_file *m,
{
struct msm_gem_object *msm_obj = to_msm_bo(obj);
struct dma_resv *robj = obj->resv;
- struct dma_resv_list *fobj;
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
struct msm_gem_vma *vma;
uint64_t off = drm_vma_node_start(&obj->vma_node);
@@ -955,22 +955,13 @@ void msm_gem_describe(struct drm_gem_object *obj, struct
seq_file *m,
seq_puts(m, "\n");
}
- rcu_read_lock();
- fobj = dma_resv_shared_list(robj);
- if (fobj) {
- unsigned int i, shared_count = fobj->shared_count;
-
- for (i = 0; i < shared_count; i++) {
- fence = rcu_dereference(fobj->shared[i]);
+ dma_resv_for_each_fence(&cursor, robj, true, fence) {
+ if (dma_resv_iter_is_exclusive(&cursor))
+ describe_fence(fence, "Exclusive", m);
+ else
describe_fence(fence, "Shared", m);
- }
}
- fence = dma_resv_excl_fence(robj);
- if (fence)
- describe_fence(fence, "Exclusive", m);
- rcu_read_unlock();
-
msm_gem_unlock(obj);
}
--
2.25.1
[Intel-gfx] [PATCH 27/28] drm/etnaviv: use new iterator in etnaviv_gem_describe
Instead of hand rolling the logic.
Signed-off-by: Christian König
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 31 ++-
1 file changed, 11 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
index 8f1b5af47dd6..0eeb33de2ff4 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
@@ -428,19 +428,17 @@ int etnaviv_gem_wait_bo(struct etnaviv_gpu *gpu, struct
drm_gem_object *obj,
static void etnaviv_gem_describe_fence(struct dma_fence *fence,
const char *type, struct seq_file *m)
{
- if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
- seq_printf(m, "\t%9s: %s %s seq %llu\n",
- type,
- fence->ops->get_driver_name(fence),
- fence->ops->get_timeline_name(fence),
- fence->seqno);
+ seq_printf(m, "\t%9s: %s %s seq %llu\n", type,
+ fence->ops->get_driver_name(fence),
+ fence->ops->get_timeline_name(fence),
+ fence->seqno);
}
static void etnaviv_gem_describe(struct drm_gem_object *obj, struct seq_file
*m)
{
struct etnaviv_gem_object *etnaviv_obj = to_etnaviv_bo(obj);
struct dma_resv *robj = obj->resv;
- struct dma_resv_list *fobj;
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
unsigned long off = drm_vma_node_start(&obj->vma_node);
@@ -449,21 +447,14 @@ static void etnaviv_gem_describe(struct drm_gem_object
*obj, struct seq_file *m)
obj->name, kref_read(&obj->refcount),
off, etnaviv_obj->vaddr, obj->size);
- rcu_read_lock();
- fobj = dma_resv_shared_list(robj);
- if (fobj) {
- unsigned int i, shared_count = fobj->shared_count;
-
- for (i = 0; i < shared_count; i++) {
- fence = rcu_dereference(fobj->shared[i]);
+ dma_resv_iter_begin(&cursor, robj, true);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ if (dma_resv_iter_is_exclusive(&cursor))
+ etnaviv_gem_describe_fence(fence, "Exclusive", m);
+ else
etnaviv_gem_describe_fence(fence, "Shared", m);
- }
}
-
- fence = dma_resv_excl_fence(robj);
- if (fence)
- etnaviv_gem_describe_fence(fence, "Exclusive", m);
- rcu_read_unlock();
+ dma_resv_iter_end(&cursor);
}
void etnaviv_gem_describe_objects(struct etnaviv_drm_private *priv,
--
2.25.1
[Intel-gfx] [PATCH 03/28] dma-buf: add dma_resv selftest
Just exercising a very minor subset of the functionality, but already
proven useful.
Signed-off-by: Christian König
---
drivers/dma-buf/Makefile | 3 +-
drivers/dma-buf/selftests.h | 1 +
drivers/dma-buf/st-dma-resv.c | 164 ++
3 files changed, 167 insertions(+), 1 deletion(-)
create mode 100644 drivers/dma-buf/st-dma-resv.c
diff --git a/drivers/dma-buf/Makefile b/drivers/dma-buf/Makefile
index 1ef021273a06..511805dbeb75 100644
--- a/drivers/dma-buf/Makefile
+++ b/drivers/dma-buf/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DMABUF_SYSFS_STATS) += dma-buf-sysfs-stats.o
dmabuf_selftests-y := \
selftest.o \
st-dma-fence.o \
- st-dma-fence-chain.o
+ st-dma-fence-chain.o \
+ st-dma-resv.o
obj-$(CONFIG_DMABUF_SELFTESTS) += dmabuf_selftests.o
diff --git a/drivers/dma-buf/selftests.h b/drivers/dma-buf/selftests.h
index bc8cea67bf1e..97d73aaa31da 100644
--- a/drivers/dma-buf/selftests.h
+++ b/drivers/dma-buf/selftests.h
@@ -12,3 +12,4 @@
selftest(sanitycheck, __sanitycheck__) /* keep first (igt selfcheck) */
selftest(dma_fence, dma_fence)
selftest(dma_fence_chain, dma_fence_chain)
+selftest(dma_resv, dma_resv)
diff --git a/drivers/dma-buf/st-dma-resv.c b/drivers/dma-buf/st-dma-resv.c
new file mode 100644
index ..ea44769d058d
--- /dev/null
+++ b/drivers/dma-buf/st-dma-resv.c
@@ -0,0 +1,164 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+* Copyright © 2019 Intel Corporation
+*/
+
+//#include
+//#include
+//#include
+//#include
+//#include
+
+#include
+#include
+#include
+
+#include "selftest.h"
+
+static struct spinlock fence_lock;
+
+static const char *fence_name(struct dma_fence *f)
+{
+ return "selftest";
+}
+
+static const struct dma_fence_ops fence_ops = {
+ .get_driver_name = fence_name,
+ .get_timeline_name = fence_name,
+};
+
+static struct dma_fence *alloc_fence(void)
+{
+ struct dma_fence *f;
+
+ f = kmalloc(sizeof(*f), GFP_KERNEL);
+ if (!f)
+ return NULL;
+
+ dma_fence_init(f, &fence_ops, &fence_lock, 0, 0);
+ return f;
+}
+
+static int sanitycheck(void *arg)
+{
+ struct dma_fence *f;
+
+ f = alloc_fence();
+ if (!f)
+ return -ENOMEM;
+
+ dma_fence_signal(f);
+ dma_fence_put(f);
+ return 0;
+}
+
+static int test_excl_signaling(void *arg)
+{
+ struct dma_resv resv;
+ struct dma_fence *f;
+ int err = -EINVAL;
+
+ f = alloc_fence();
+ if (!f)
+ return -ENOMEM;
+
+ dma_resv_init(&resv);
+ dma_resv_add_excl_fence(&resv, f);
+ if (dma_resv_test_signaled(&resv, false)) {
+ pr_err("Resv unexpectedly signaled\n");
+ goto err_free;
+ }
+ dma_fence_signal(f);
+ if (!dma_resv_test_signaled(&resv, false)) {
+ pr_err("Resv not reporting signaled\n");
+ goto err_free;
+ }
+ err = 0;
+err_free:
+ dma_resv_fini(&resv);
+ dma_fence_put(f);
+ return err;
+}
+
+static int test_shared_signaling(void *arg)
+{
+ struct dma_resv resv;
+ struct dma_fence *f;
+ int err;
+
+ f = alloc_fence();
+ if (!f)
+ return -ENOMEM;
+
+ dma_resv_init(&resv);
+ err = dma_resv_reserve_shared(&resv, 1);
+ if (err) {
+ pr_err("Resv shared slot allocation failed\n");
+ goto err_free;
+ }
+
+ err = -EINVAL;
+ dma_resv_add_shared_fence(&resv, f);
+ if (dma_resv_test_signaled(&resv, true)) {
+ pr_err("Resv unexpectedly signaled\n");
+ goto err_free;
+ }
+ dma_fence_signal(f);
+ if (!dma_resv_test_signaled(&resv, true)) {
+ pr_err("Resv not reporting signaled\n");
+ goto err_free;
+ }
+ err = 0;
+err_free:
+ dma_resv_fini(&resv);
+ dma_fence_put(f);
+ return err;
+}
+
+static int test_excl_for_each(void *arg)
+{
+ struct dma_resv_iter cursor;
+ struct dma_fence *f, *fence;
+ struct dma_resv resv;
+ int err;
+
+ f = alloc_fence();
+ if (!f)
+ return -ENOMEM;
+
+ dma_resv_init(&resv);
+ dma_resv_add_excl_fence(&resv, f);
+
+ err = -EINVAL;
+ dma_resv_for_each_fence(&cursor, &resv, false, fence) {
+ if (f != fence) {
+ pr_err("Unexpected fence\n");
+ goto err_free;
+ }
+ err = 0;
+ }
+ if (err) {
+ pr_err("No fence found\n");
+ goto err_free;
+ }
+ dma_fence_signal(f);
+ err = 0;
+err_free:
+ dma_resv_fini(&resv);
+ dma_fence_put(f);
+ return err;
+}
+
+int dma_resv(void)
+{
+ static const struct subtest tests[] = {
+ SUBTEST(sanitycheck),
+ SUBTEST(test_excl_signaling),
+ SUBTEST(test_shar
[Intel-gfx] [PATCH 22/28] drm/i915: use new cursor in intel_prepare_plane_fb
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/i915/display/intel_display.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 134a6acbd8fb..d32137a84694 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11290,6 +11290,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
i915_gem_object_flush_frontbuffer(obj, ORIGIN_DIRTYFB);
if (!new_plane_state->uapi.fence) { /* implicit fencing */
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
ret = i915_sw_fence_await_reservation(&state->commit_ready,
@@ -11300,12 +11301,12 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
if (ret < 0)
goto unpin_fb;
- fence = dma_resv_get_excl_unlocked(obj->base.resv);
- if (fence) {
+ dma_resv_iter_begin(&cursor, obj->base.resv, false);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
add_rps_boost_after_vblank(new_plane_state->hw.crtc,
fence);
- dma_fence_put(fence);
}
+ dma_resv_iter_end(&cursor);
} else {
add_rps_boost_after_vblank(new_plane_state->hw.crtc,
new_plane_state->uapi.fence);
--
2.25.1
[Intel-gfx] [PATCH 25/28] drm/nouveau: use the new iterator in nouveau_fence_sync
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/nouveau_fence.c | 48 +++--
1 file changed, 12 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c
b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 05d0b3eb3690..26f9299df881 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -339,14 +339,15 @@ nouveau_fence_wait(struct nouveau_fence *fence, bool
lazy, bool intr)
}
int
-nouveau_fence_sync(struct nouveau_bo *nvbo, struct nouveau_channel *chan, bool
exclusive, bool intr)
+nouveau_fence_sync(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
+ bool exclusive, bool intr)
{
struct nouveau_fence_chan *fctx = chan->fence;
- struct dma_fence *fence;
struct dma_resv *resv = nvbo->bo.base.resv;
- struct dma_resv_list *fobj;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
struct nouveau_fence *f;
- int ret = 0, i;
+ int ret;
if (!exclusive) {
ret = dma_resv_reserve_shared(resv, 1);
@@ -355,10 +356,7 @@ nouveau_fence_sync(struct nouveau_bo *nvbo, struct
nouveau_channel *chan, bool e
return ret;
}
- fobj = dma_resv_shared_list(resv);
- fence = dma_resv_excl_fence(resv);
-
- if (fence) {
+ dma_resv_for_each_fence(&cursor, resv, exclusive, fence) {
struct nouveau_channel *prev = NULL;
bool must_wait = true;
@@ -366,41 +364,19 @@ nouveau_fence_sync(struct nouveau_bo *nvbo, struct
nouveau_channel *chan, bool e
if (f) {
rcu_read_lock();
prev = rcu_dereference(f->channel);
- if (prev && (prev == chan || fctx->sync(f, prev, chan)
== 0))
+ if (prev && (prev == chan ||
+fctx->sync(f, prev, chan) == 0))
must_wait = false;
rcu_read_unlock();
}
- if (must_wait)
+ if (must_wait) {
ret = dma_fence_wait(fence, intr);
-
- return ret;
- }
-
- if (!exclusive || !fobj)
- return ret;
-
- for (i = 0; i < fobj->shared_count && !ret; ++i) {
- struct nouveau_channel *prev = NULL;
- bool must_wait = true;
-
- fence = rcu_dereference_protected(fobj->shared[i],
- dma_resv_held(resv));
-
- f = nouveau_local_fence(fence, chan->drm);
- if (f) {
- rcu_read_lock();
- prev = rcu_dereference(f->channel);
- if (prev && (prev == chan || fctx->sync(f, prev, chan)
== 0))
- must_wait = false;
- rcu_read_unlock();
+ if (ret)
+ return ret;
}
-
- if (must_wait)
- ret = dma_fence_wait(fence, intr);
}
-
- return ret;
+ return 0;
}
void
--
2.25.1
[Intel-gfx] [PATCH 04/28] dma-buf: use new iterator in dma_resv_copy_fences
This makes the function much simpler since the complex
retry logic is now handled else where.
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/dma-buf/dma-resv.c | 84 +++---
1 file changed, 32 insertions(+), 52 deletions(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index a104197d12b5..064972c6bde2 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -478,74 +478,54 @@ EXPORT_SYMBOL_GPL(dma_resv_iter_next);
*/
int dma_resv_copy_fences(struct dma_resv *dst, struct dma_resv *src)
{
- struct dma_resv_list *src_list, *dst_list;
- struct dma_fence *old, *new;
- unsigned int i;
+ struct dma_resv_iter cursor;
+ struct dma_resv_list *list;
+ struct dma_fence *f, *excl;
dma_resv_assert_held(dst);
- rcu_read_lock();
- src_list = dma_resv_shared_list(src);
+ list = NULL;
+ excl = NULL;
-retry:
- if (src_list) {
- unsigned int shared_count = src_list->shared_count;
+ dma_resv_iter_begin(&cursor, src, true);
+ dma_resv_for_each_fence_unlocked(&cursor, f) {
- rcu_read_unlock();
+ if (dma_resv_iter_is_restarted(&cursor)) {
+ dma_resv_list_free(list);
+ dma_fence_put(excl);
- dst_list = dma_resv_list_alloc(shared_count);
- if (!dst_list)
- return -ENOMEM;
+ if (cursor.fences) {
+ unsigned int cnt = cursor.fences->shared_count;
- rcu_read_lock();
- src_list = dma_resv_shared_list(src);
- if (!src_list || src_list->shared_count > shared_count) {
- kfree(dst_list);
- goto retry;
- }
-
- dst_list->shared_count = 0;
- for (i = 0; i < src_list->shared_count; ++i) {
- struct dma_fence __rcu **dst;
- struct dma_fence *fence;
+ list = dma_resv_list_alloc(cnt);
+ if (!list) {
+ dma_resv_iter_end(&cursor);
+ return -ENOMEM;
+ }
- fence = rcu_dereference(src_list->shared[i]);
- if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
-&fence->flags))
- continue;
+ list->shared_count = 0;
- if (!dma_fence_get_rcu(fence)) {
- dma_resv_list_free(dst_list);
- src_list = dma_resv_shared_list(src);
- goto retry;
+ } else {
+ list = NULL;
}
-
- if (dma_fence_is_signaled(fence)) {
- dma_fence_put(fence);
- continue;
- }
-
- dst = &dst_list->shared[dst_list->shared_count++];
- rcu_assign_pointer(*dst, fence);
+ excl = NULL;
}
- } else {
- dst_list = NULL;
- }
- new = dma_fence_get_rcu_safe(&src->fence_excl);
- rcu_read_unlock();
-
- src_list = dma_resv_shared_list(dst);
- old = dma_resv_excl_fence(dst);
+ dma_fence_get(f);
+ if (dma_resv_iter_is_exclusive(&cursor))
+ excl = f;
+ else
+ RCU_INIT_POINTER(list->shared[list->shared_count++], f);
+ }
+ dma_resv_iter_end(&cursor);
write_seqcount_begin(&dst->seq);
- /* write_seqcount_begin provides the necessary memory barrier */
- RCU_INIT_POINTER(dst->fence_excl, new);
- RCU_INIT_POINTER(dst->fence, dst_list);
+ excl = rcu_replace_pointer(dst->fence_excl, excl, dma_resv_held(dst));
+ list = rcu_replace_pointer(dst->fence, list, dma_resv_held(dst));
write_seqcount_end(&dst->seq);
- dma_resv_list_free(src_list);
- dma_fence_put(old);
+ dma_resv_list_free(list);
+ dma_fence_put(excl);
return 0;
}
--
2.25.1
[Intel-gfx] [PATCH 11/28] drm/amdgpu: use the new iterator in amdgpu_sync_resv
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 44
1 file changed, 14 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 862eb3c1c4c5..f7d8487799b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -252,41 +252,25 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, struct
amdgpu_sync *sync,
struct dma_resv *resv, enum amdgpu_sync_mode mode,
void *owner)
{
- struct dma_resv_list *flist;
+ struct dma_resv_iter cursor;
struct dma_fence *f;
- unsigned i;
- int r = 0;
+ int r;
if (resv == NULL)
return -EINVAL;
- /* always sync to the exclusive fence */
- f = dma_resv_excl_fence(resv);
- dma_fence_chain_for_each(f, f) {
- struct dma_fence_chain *chain = to_dma_fence_chain(f);
-
- if (amdgpu_sync_test_fence(adev, mode, owner, chain ?
- chain->fence : f)) {
- r = amdgpu_sync_fence(sync, f);
- dma_fence_put(f);
- if (r)
- return r;
- break;
- }
- }
-
- flist = dma_resv_shared_list(resv);
- if (!flist)
- return 0;
-
- for (i = 0; i < flist->shared_count; ++i) {
- f = rcu_dereference_protected(flist->shared[i],
- dma_resv_held(resv));
-
- if (amdgpu_sync_test_fence(adev, mode, owner, f)) {
- r = amdgpu_sync_fence(sync, f);
- if (r)
- return r;
+ dma_resv_for_each_fence(&cursor, resv, true, f) {
+ dma_fence_chain_for_each(f, f) {
+ struct dma_fence_chain *chain = to_dma_fence_chain(f);
+
+ if (amdgpu_sync_test_fence(adev, mode, owner, chain ?
+ chain->fence : f)) {
+ r = amdgpu_sync_fence(sync, f);
+ dma_fence_put(f);
+ if (r)
+ return r;
+ break;
+ }
}
}
return 0;
--
2.25.1
[Intel-gfx] [PATCH 01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7
Abstract the complexity of iterating over all the fences
in a dma_resv object.
The new loop handles the whole RCU and retry dance and
returns only fences where we can be sure we grabbed the
right one.
v2: fix accessing the shared fences while they might be freed,
improve kerneldoc, rename _cursor to _iter, add
dma_resv_iter_is_exclusive, add dma_resv_iter_begin/end
v3: restructor the code, move rcu_read_lock()/unlock() into the
iterator, add dma_resv_iter_is_restarted()
v4: fix NULL deref when no explicit fence exists, drop superflous
rcu_read_lock()/unlock() calls.
v5: fix typos in the documentation
v6: fix coding error when excl fence is NULL
v7: one more logic fix
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c | 100 +
include/linux/dma-resv.h | 95 +++
2 files changed, 195 insertions(+)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 84fbe60629e3..3cbcf66a137e 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -323,6 +323,106 @@ void dma_resv_add_excl_fence(struct dma_resv *obj, struct
dma_fence *fence)
}
EXPORT_SYMBOL(dma_resv_add_excl_fence);
+/**
+ * dma_resv_iter_restart_unlocked - restart the unlocked iterator
+ * @cursor: The dma_resv_iter object to restart
+ *
+ * Restart the unlocked iteration by initializing the cursor object.
+ */
+static void dma_resv_iter_restart_unlocked(struct dma_resv_iter *cursor)
+{
+ cursor->seq = read_seqcount_begin(&cursor->obj->seq);
+ cursor->index = -1;
+ if (cursor->all_fences)
+ cursor->fences = dma_resv_shared_list(cursor->obj);
+ else
+ cursor->fences = NULL;
+ cursor->is_restarted = true;
+}
+
+/**
+ * dma_resv_iter_walk_unlocked - walk over fences in a dma_resv obj
+ * @cursor: cursor to record the current position
+ *
+ * Return all the fences in the dma_resv object which are not yet signaled.
+ * The returned fence has an extra local reference so will stay alive.
+ * If a concurrent modify is detected the whole iteration is started over
again.
+ */
+static void dma_resv_iter_walk_unlocked(struct dma_resv_iter *cursor)
+{
+ struct dma_resv *obj = cursor->obj;
+
+ do {
+ /* Drop the reference from the previous round */
+ dma_fence_put(cursor->fence);
+
+ if (cursor->index == -1) {
+ cursor->fence = dma_resv_excl_fence(obj);
+ cursor->index++;
+ if (!cursor->fence)
+ continue;
+
+ } else if (!cursor->fences ||
+ cursor->index >= cursor->fences->shared_count) {
+ cursor->fence = NULL;
+ break;
+
+ } else {
+ struct dma_resv_list *fences = cursor->fences;
+ unsigned int idx = cursor->index++;
+
+ cursor->fence = rcu_dereference(fences->shared[idx]);
+ }
+ cursor->fence = dma_fence_get_rcu(cursor->fence);
+ if (!cursor->fence || !dma_fence_is_signaled(cursor->fence))
+ break;
+ } while (true);
+}
+
+/**
+ * dma_resv_iter_first_unlocked - first fence in an unlocked dma_resv obj.
+ * @cursor: the cursor with the current position
+ *
+ * Returns the first fence from an unlocked dma_resv obj.
+ */
+struct dma_fence *dma_resv_iter_first_unlocked(struct dma_resv_iter *cursor)
+{
+ rcu_read_lock();
+ do {
+ dma_resv_iter_restart_unlocked(cursor);
+ dma_resv_iter_walk_unlocked(cursor);
+ } while (read_seqcount_retry(&cursor->obj->seq, cursor->seq));
+ rcu_read_unlock();
+
+ return cursor->fence;
+}
+EXPORT_SYMBOL(dma_resv_iter_first_unlocked);
+
+/**
+ * dma_resv_iter_next_unlocked - next fence in an unlocked dma_resv obj.
+ * @cursor: the cursor with the current position
+ *
+ * Returns the next fence from an unlocked dma_resv obj.
+ */
+struct dma_fence *dma_resv_iter_next_unlocked(struct dma_resv_iter *cursor)
+{
+ bool restart;
+
+ rcu_read_lock();
+ cursor->is_restarted = false;
+ restart = read_seqcount_retry(&cursor->obj->seq, cursor->seq);
+ do {
+ if (restart)
+ dma_resv_iter_restart_unlocked(cursor);
+ dma_resv_iter_walk_unlocked(cursor);
+ restart = true;
+ } while (read_seqcount_retry(&cursor->obj->seq, cursor->seq));
+ rcu_read_unlock();
+
+ return cursor->fence;
+}
+EXPORT_SYMBOL(dma_resv_iter_next_unlocked);
+
/**
* dma_resv_copy_fences - Copy all fences from src to dst.
* @dst: the destination reservation object
diff --git a/include/linux/dma-resv.h b/include/linux/dma-resv.h
index 9100dd3dc21f..5d7d28cb9008 100644
--- a/include/linux/dma-resv.h
+++ b/include/linux/dma-resv.h
@@ -1
[Intel-gfx] [PATCH 10/28] drm/ttm: use the new iterator in ttm_bo_flush_all_fences
This is probably a fix since we didn't even grabed a reference to the
fences.
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/ttm/ttm_bo.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index d62b2013c367..3934ee225c78 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -269,23 +269,15 @@ static int ttm_bo_individualize_resv(struct
ttm_buffer_object *bo)
static void ttm_bo_flush_all_fences(struct ttm_buffer_object *bo)
{
struct dma_resv *resv = &bo->base._resv;
- struct dma_resv_list *fobj;
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
- int i;
-
- rcu_read_lock();
- fobj = dma_resv_shared_list(resv);
- fence = dma_resv_excl_fence(resv);
- if (fence && !fence->ops->signaled)
- dma_fence_enable_sw_signaling(fence);
-
- for (i = 0; fobj && i < fobj->shared_count; ++i) {
- fence = rcu_dereference(fobj->shared[i]);
+ dma_resv_iter_begin(&cursor, resv, true);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
if (!fence->ops->signaled)
dma_fence_enable_sw_signaling(fence);
}
- rcu_read_unlock();
+ dma_resv_iter_end(&cursor);
}
/**
--
2.25.1
[Intel-gfx] [PATCH 13/28] drm/amdgpu: use new iterator in amdgpu_vm_prt_fini
No need to actually allocate an array of fences here.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 26 +-
1 file changed, 5 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6b15cad78de9..e42dd79ed6f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2090,30 +2090,14 @@ static void amdgpu_vm_free_mapping(struct amdgpu_device
*adev,
static void amdgpu_vm_prt_fini(struct amdgpu_device *adev, struct amdgpu_vm
*vm)
{
struct dma_resv *resv = vm->root.bo->tbo.base.resv;
- struct dma_fence *excl, **shared;
- unsigned i, shared_count;
- int r;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
- r = dma_resv_get_fences(resv, &excl, &shared_count, &shared);
- if (r) {
- /* Not enough memory to grab the fence list, as last resort
-* block for all the fences to complete.
-*/
- dma_resv_wait_timeout(resv, true, false,
- MAX_SCHEDULE_TIMEOUT);
- return;
- }
-
- /* Add a callback for each fence in the reservation object */
- amdgpu_vm_prt_get(adev);
- amdgpu_vm_add_prt_cb(adev, excl);
-
- for (i = 0; i < shared_count; ++i) {
+ dma_resv_for_each_fence(&cursor, resv, true, fence) {
+ /* Add a callback for each fence in the reservation object */
amdgpu_vm_prt_get(adev);
- amdgpu_vm_add_prt_cb(adev, shared[i]);
+ amdgpu_vm_add_prt_cb(adev, fence);
}
-
- kfree(shared);
}
/**
--
2.25.1
[Intel-gfx] [PATCH 06/28] dma-buf: use new iterator in dma_resv_wait_timeout
This makes the function much simpler since the complex
retry logic is now handled elsewhere.
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/dma-buf/dma-resv.c | 69 +-
1 file changed, 8 insertions(+), 61 deletions(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 9b494828e7ca..510e15f805bb 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -611,74 +611,21 @@ long dma_resv_wait_timeout(struct dma_resv *obj, bool
wait_all, bool intr,
unsigned long timeout)
{
long ret = timeout ? timeout : 1;
- unsigned int seq, shared_count;
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
- int i;
-
-retry:
- shared_count = 0;
- seq = read_seqcount_begin(&obj->seq);
- rcu_read_lock();
- i = -1;
-
- fence = dma_resv_excl_fence(obj);
- if (fence && !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
- if (!dma_fence_get_rcu(fence))
- goto unlock_retry;
-
- if (dma_fence_is_signaled(fence)) {
- dma_fence_put(fence);
- fence = NULL;
- }
-
- } else {
- fence = NULL;
- }
-
- if (wait_all) {
- struct dma_resv_list *fobj = dma_resv_shared_list(obj);
-
- if (fobj)
- shared_count = fobj->shared_count;
-
- for (i = 0; !fence && i < shared_count; ++i) {
- struct dma_fence *lfence;
-
- lfence = rcu_dereference(fobj->shared[i]);
- if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
-&lfence->flags))
- continue;
- if (!dma_fence_get_rcu(lfence))
- goto unlock_retry;
-
- if (dma_fence_is_signaled(lfence)) {
- dma_fence_put(lfence);
- continue;
- }
+ dma_resv_iter_begin(&cursor, obj, wait_all);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
- fence = lfence;
- break;
+ ret = dma_fence_wait_timeout(fence, intr, ret);
+ if (ret <= 0) {
+ dma_resv_iter_end(&cursor);
+ return ret;
}
}
+ dma_resv_iter_end(&cursor);
- rcu_read_unlock();
- if (fence) {
- if (read_seqcount_retry(&obj->seq, seq)) {
- dma_fence_put(fence);
- goto retry;
- }
-
- ret = dma_fence_wait_timeout(fence, intr, ret);
- dma_fence_put(fence);
- if (ret > 0 && wait_all && (i + 1 < shared_count))
- goto retry;
- }
return ret;
-
-unlock_retry:
- rcu_read_unlock();
- goto retry;
}
EXPORT_SYMBOL_GPL(dma_resv_wait_timeout);
--
2.25.1
[Intel-gfx] [PATCH 20/28] drm/i915: use new iterator in i915_gem_object_wait_reservation
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 51 +---
1 file changed, 9 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c
b/drivers/gpu/drm/i915/gem/i915_gem_wait.c
index f909aaa09d9c..a13193db1dba 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c
@@ -37,55 +37,22 @@ i915_gem_object_wait_reservation(struct dma_resv *resv,
unsigned int flags,
long timeout)
{
- struct dma_fence *excl;
- bool prune_fences = false;
-
- if (flags & I915_WAIT_ALL) {
- struct dma_fence **shared;
- unsigned int count, i;
- int ret;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
- ret = dma_resv_get_fences(resv, &excl, &count, &shared);
- if (ret)
- return ret;
-
- for (i = 0; i < count; i++) {
- timeout = i915_gem_object_wait_fence(shared[i],
-flags, timeout);
- if (timeout < 0)
- break;
-
- dma_fence_put(shared[i]);
- }
-
- for (; i < count; i++)
- dma_fence_put(shared[i]);
- kfree(shared);
-
- /*
-* If both shared fences and an exclusive fence exist,
-* then by construction the shared fences must be later
-* than the exclusive fence. If we successfully wait for
-* all the shared fences, we know that the exclusive fence
-* must all be signaled. If all the shared fences are
-* signaled, we can prune the array and recover the
-* floating references on the fences/requests.
-*/
- prune_fences = count && timeout >= 0;
- } else {
- excl = dma_resv_get_excl_unlocked(resv);
+ dma_resv_iter_begin(&cursor, resv, flags & I915_WAIT_ALL);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ timeout = i915_gem_object_wait_fence(fence, flags, timeout);
+ if (timeout < 0)
+ break;
}
-
- if (excl && timeout >= 0)
- timeout = i915_gem_object_wait_fence(excl, flags, timeout);
-
- dma_fence_put(excl);
+ dma_resv_iter_end(&cursor);
/*
* Opportunistically prune the fences iff we know they have *all* been
* signaled.
*/
- if (prune_fences)
+ if (timeout > 0)
dma_resv_prune(resv);
return timeout;
--
2.25.1
[Intel-gfx] [PATCH 24/28] drm: use new iterator in drm_gem_plane_helper_prepare_fb
Makes the handling a bit more complex, but avoids the use of
dma_resv_get_excl_unlocked().
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_gem_atomic_helper.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_atomic_helper.c
b/drivers/gpu/drm/drm_gem_atomic_helper.c
index e570398abd78..21ed930042b8 100644
--- a/drivers/gpu/drm/drm_gem_atomic_helper.c
+++ b/drivers/gpu/drm/drm_gem_atomic_helper.c
@@ -143,6 +143,7 @@
*/
int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct
drm_plane_state *state)
{
+ struct dma_resv_iter cursor;
struct drm_gem_object *obj;
struct dma_fence *fence;
@@ -150,9 +151,17 @@ int drm_gem_plane_helper_prepare_fb(struct drm_plane
*plane, struct drm_plane_st
return 0;
obj = drm_gem_fb_get_obj(state->fb, 0);
- fence = dma_resv_get_excl_unlocked(obj->resv);
- drm_atomic_set_fence_for_plane(state, fence);
+ dma_resv_iter_begin(&cursor, obj->resv, false);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ dma_fence_get(fence);
+ dma_resv_iter_end(&cursor);
+ /* TODO: We only use the first write fence here */
+ drm_atomic_set_fence_for_plane(state, fence);
+ return 0;
+ }
+ dma_resv_iter_end(&cursor);
+ drm_atomic_set_fence_for_plane(state, NULL);
return 0;
}
EXPORT_SYMBOL_GPL(drm_gem_plane_helper_prepare_fb);
--
2.25.1
[Intel-gfx] [PATCH 16/28] drm/scheduler: use new iterator in drm_sched_job_add_implicit_dependencies v2
Simplifying the code a bit.
v2: use dma_resv_for_each_fence
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/scheduler/sched_main.c | 26 ++
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 042c16b5d54a..5bc5f775abe1 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -699,30 +699,16 @@ int drm_sched_job_add_implicit_dependencies(struct
drm_sched_job *job,
struct drm_gem_object *obj,
bool write)
{
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
int ret;
- struct dma_fence **fences;
- unsigned int i, fence_count;
-
- if (!write) {
- struct dma_fence *fence = dma_resv_get_excl_unlocked(obj->resv);
-
- return drm_sched_job_add_dependency(job, fence);
- }
-
- ret = dma_resv_get_fences(obj->resv, NULL, &fence_count, &fences);
- if (ret || !fence_count)
- return ret;
- for (i = 0; i < fence_count; i++) {
- ret = drm_sched_job_add_dependency(job, fences[i]);
+ dma_resv_for_each_fence(&cursor, obj->resv, write, fence) {
+ ret = drm_sched_job_add_dependency(job, fence);
if (ret)
- break;
+ return ret;
}
-
- for (; i < fence_count; i++)
- dma_fence_put(fences[i]);
- kfree(fences);
- return ret;
+ return 0;
}
EXPORT_SYMBOL(drm_sched_job_add_implicit_dependencies);
--
2.25.1
Re: [Intel-gfx] [PATCH 17/28] drm/i915: use the new iterator in i915_gem_busy_ioctl v2
Am 01.10.21 um 12:37 schrieb Tvrtko Ursulin:
On 01/10/2021 11:05, Christian König wrote:
This makes the function much simpler since the complex
retry logic is now handled else where.
Signed-off-by: Christian König
Reviewed-by: Tvrtko Ursulin
Sorry I retract until you add the text about the increased cost of the
added atomics. I think the point is important to discuss given
proposal goes from zero atomics to num_fences * 2 (fence get/put
unless I am mistaken) atomics per busy ioctl. That makes me lean
towards just leaving this as is since it is not that complex.
I'm certainly pushing hard to remove all manual RCU dance from the
drivers, including this one.
The only option is to either have the atomics overhead (which is indeed
num_fences*2) or the locking overhead.
Regards,
Christian.
Regards,
Tvrtko
---
drivers/gpu/drm/i915/gem/i915_gem_busy.c | 35 ++--
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_busy.c
b/drivers/gpu/drm/i915/gem/i915_gem_busy.c
index 6234e17259c1..dc72b36dae54 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_busy.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_busy.c
@@ -82,8 +82,8 @@ i915_gem_busy_ioctl(struct drm_device *dev, void
*data,
{
struct drm_i915_gem_busy *args = data;
struct drm_i915_gem_object *obj;
- struct dma_resv_list *list;
- unsigned int seq;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
int err;
err = -ENOENT;
@@ -109,27 +109,20 @@ i915_gem_busy_ioctl(struct drm_device *dev,
void *data,
* to report the overall busyness. This is what the wait-ioctl
does.
*
*/
-retry:
- seq = raw_read_seqcount(&obj->base.resv->seq);
-
- /* Translate the exclusive fence to the READ *and* WRITE engine */
- args->busy =
busy_check_writer(dma_resv_excl_fence(obj->base.resv));
-
- /* Translate shared fences to READ set of engines */
- list = dma_resv_shared_list(obj->base.resv);
- if (list) {
- unsigned int shared_count = list->shared_count, i;
-
- for (i = 0; i < shared_count; ++i) {
- struct dma_fence *fence =
- rcu_dereference(list->shared[i]);
-
+ args->busy = 0;
+ dma_resv_iter_begin(&cursor, obj->base.resv, true);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ if (dma_resv_iter_is_restarted(&cursor))
+ args->busy = 0;
+
+ if (dma_resv_iter_is_exclusive(&cursor))
+ /* Translate the exclusive fence to the READ *and* WRITE
engine */
+ args->busy |= busy_check_writer(fence);
+ else
+ /* Translate shared fences to READ set of engines */
args->busy |= busy_check_reader(fence);
- }
}
-
- if (args->busy && read_seqcount_retry(&obj->base.resv->seq, seq))
- goto retry;
+ dma_resv_iter_end(&cursor);
err = 0;
out:
[Intel-gfx] [PATCH 18/28] drm/i915: use the new iterator in i915_sw_fence_await_reservation v3
Simplifying the code a bit.
v2: use dma_resv_for_each_fence instead, according to Tvrtko the lock is
held here anyway.
v3: back to using dma_resv_for_each_fence_unlocked.
Signed-off-by: Christian König
---
drivers/gpu/drm/i915/i915_sw_fence.c | 53 ++--
1 file changed, 11 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c
b/drivers/gpu/drm/i915/i915_sw_fence.c
index c589a681da77..7ea0dbf81530 100644
--- a/drivers/gpu/drm/i915/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/i915_sw_fence.c
@@ -572,56 +572,25 @@ int i915_sw_fence_await_reservation(struct i915_sw_fence
*fence,
unsigned long timeout,
gfp_t gfp)
{
- struct dma_fence *excl;
+ struct dma_resv_iter cursor;
+ struct dma_fence *f;
int ret = 0, pending;
debug_fence_assert(fence);
might_sleep_if(gfpflags_allow_blocking(gfp));
- if (write) {
- struct dma_fence **shared;
- unsigned int count, i;
-
- ret = dma_resv_get_fences(resv, &excl, &count, &shared);
- if (ret)
- return ret;
-
- for (i = 0; i < count; i++) {
- if (shared[i]->ops == exclude)
- continue;
-
- pending = i915_sw_fence_await_dma_fence(fence,
- shared[i],
- timeout,
- gfp);
- if (pending < 0) {
- ret = pending;
- break;
- }
-
- ret |= pending;
- }
-
- for (i = 0; i < count; i++)
- dma_fence_put(shared[i]);
- kfree(shared);
- } else {
- excl = dma_resv_get_excl_unlocked(resv);
- }
-
- if (ret >= 0 && excl && excl->ops != exclude) {
- pending = i915_sw_fence_await_dma_fence(fence,
- excl,
- timeout,
+ dma_resv_iter_begin(&cursor, resv, write);
+ dma_resv_for_each_fence_unlocked(&cursor, f) {
+ pending = i915_sw_fence_await_dma_fence(fence, f, timeout,
gfp);
- if (pending < 0)
+ if (pending < 0) {
ret = pending;
- else
- ret |= pending;
- }
-
- dma_fence_put(excl);
+ break;
+ }
+ ret |= pending;
+ }
+ dma_resv_iter_end(&cursor);
return ret;
}
--
2.25.1
[Intel-gfx] [PATCH 15/28] drm/radeon: use new iterator in radeon_sync_resv
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon_sync.c | 22 +++---
1 file changed, 3 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_sync.c
b/drivers/gpu/drm/radeon/radeon_sync.c
index 9257b60144c4..b991ba1bcd51 100644
--- a/drivers/gpu/drm/radeon/radeon_sync.c
+++ b/drivers/gpu/drm/radeon/radeon_sync.c
@@ -91,33 +91,17 @@ int radeon_sync_resv(struct radeon_device *rdev,
struct dma_resv *resv,
bool shared)
{
- struct dma_resv_list *flist;
- struct dma_fence *f;
+ struct dma_resv_iter cursor;
struct radeon_fence *fence;
- unsigned i;
+ struct dma_fence *f;
int r = 0;
- /* always sync to the exclusive fence */
- f = dma_resv_excl_fence(resv);
- fence = f ? to_radeon_fence(f) : NULL;
- if (fence && fence->rdev == rdev)
- radeon_sync_fence(sync, fence);
- else if (f)
- r = dma_fence_wait(f, true);
-
- flist = dma_resv_shared_list(resv);
- if (shared || !flist || r)
- return r;
-
- for (i = 0; i < flist->shared_count; ++i) {
- f = rcu_dereference_protected(flist->shared[i],
- dma_resv_held(resv));
+ dma_resv_for_each_fence(&cursor, resv, shared, f) {
fence = to_radeon_fence(f);
if (fence && fence->rdev == rdev)
radeon_sync_fence(sync, fence);
else
r = dma_fence_wait(f, true);
-
if (r)
break;
}
--
2.25.1
[Intel-gfx] [PATCH 28/28] drm/etnaviv: replace dma_resv_get_excl_unlocked
We certainly hold the reservation lock here, no need for the RCU dance.
Signed-off-by: Christian König
---
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
index 4dd7d9d541c0..7e17bc2b5df1 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
@@ -195,7 +195,7 @@ static int submit_fence_sync(struct etnaviv_gem_submit
*submit)
if (ret)
return ret;
} else {
- bo->excl = dma_resv_get_excl_unlocked(robj);
+ bo->excl = dma_fence_get(dma_resv_excl_fence(robj));
}
}
--
2.25.1
[Intel-gfx] [PATCH 02/28] dma-buf: add dma_resv_for_each_fence
A simpler version of the iterator to be used when the dma_resv object is
locked.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c | 46 ++
include/linux/dma-resv.h | 19
2 files changed, 65 insertions(+)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 3cbcf66a137e..a104197d12b5 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -423,6 +423,52 @@ struct dma_fence *dma_resv_iter_next_unlocked(struct
dma_resv_iter *cursor)
}
EXPORT_SYMBOL(dma_resv_iter_next_unlocked);
+/**
+ * dma_resv_iter_first - first fence from a locked dma_resv object
+ * @cursor: cursor to record the current position
+ *
+ * Return all the fences in the dma_resv object while holding the
+ * &dma_resv.lock.
+ */
+struct dma_fence *dma_resv_iter_first(struct dma_resv_iter *cursor)
+{
+ struct dma_fence *fence;
+
+ dma_resv_assert_held(cursor->obj);
+
+ cursor->index = -1;
+ cursor->fences = dma_resv_shared_list(cursor->obj);
+
+ fence = dma_resv_excl_fence(cursor->obj);
+ if (!fence)
+ fence = dma_resv_iter_next(cursor);
+
+ cursor->is_restarted = true;
+ return fence;
+}
+EXPORT_SYMBOL_GPL(dma_resv_iter_first);
+
+/**
+ * dma_resv_iter_next - next fence from a locked dma_resv object
+ * @cursor: cursor to record the current position
+ *
+ * Return all the fences in the dma_resv object while holding the
+ * &dma_resv.lock.
+ */
+struct dma_fence *dma_resv_iter_next(struct dma_resv_iter *cursor)
+{
+ dma_resv_assert_held(cursor->obj);
+
+ cursor->is_restarted = false;
+ if (!cursor->all_fences || !cursor->fences ||
+ ++cursor->index >= cursor->fences->shared_count)
+ return NULL;
+
+ return rcu_dereference_protected(cursor->fences->shared[cursor->index],
+dma_resv_held(cursor->obj));
+}
+EXPORT_SYMBOL_GPL(dma_resv_iter_next);
+
/**
* dma_resv_copy_fences - Copy all fences from src to dst.
* @dst: the destination reservation object
diff --git a/include/linux/dma-resv.h b/include/linux/dma-resv.h
index 5d7d28cb9008..d4b4cd43f0f1 100644
--- a/include/linux/dma-resv.h
+++ b/include/linux/dma-resv.h
@@ -179,6 +179,8 @@ struct dma_resv_iter {
struct dma_fence *dma_resv_iter_first_unlocked(struct dma_resv_iter *cursor);
struct dma_fence *dma_resv_iter_next_unlocked(struct dma_resv_iter *cursor);
+struct dma_fence *dma_resv_iter_first(struct dma_resv_iter *cursor);
+struct dma_fence *dma_resv_iter_next(struct dma_resv_iter *cursor);
/**
* dma_resv_iter_begin - initialize a dma_resv_iter object
@@ -244,6 +246,23 @@ static inline bool dma_resv_iter_is_restarted(struct
dma_resv_iter *cursor)
for (fence = dma_resv_iter_first_unlocked(cursor); \
fence; fence = dma_resv_iter_next_unlocked(cursor))
+/**
+ * dma_resv_for_each_fence - fence iterator
+ * @cursor: a struct dma_resv_iter pointer
+ * @obj: a dma_resv object pointer
+ * @all_fences: true if all fences should be returned
+ * @fence: the current fence
+ *
+ * Iterate over the fences in a struct dma_resv object while holding the
+ * &dma_resv.lock. @all_fences controls if the shared fences are returned as
+ * well. The cursor initialisation is part of the iterator and the fence stays
+ * valid as long as the lock is held.
+ */
+#define dma_resv_for_each_fence(cursor, obj, all_fences, fence)\
+ for (dma_resv_iter_begin(cursor, obj, all_fences), \
+fence = dma_resv_iter_first(cursor); fence;\
+fence = dma_resv_iter_next(cursor))
+
#define dma_resv_held(obj) lockdep_is_held(&(obj)->lock.base)
#define dma_resv_assert_held(obj) lockdep_assert_held(&(obj)->lock.base)
--
2.25.1
[Intel-gfx] [PATCH 12/28] drm/amdgpu: use new iterator in amdgpu_ttm_bo_eviction_valuable
Simplifying the code a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e8d70b6e6737..722e3c9e8882 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1345,10 +1345,9 @@ static bool amdgpu_ttm_bo_eviction_valuable(struct
ttm_buffer_object *bo,
const struct ttm_place *place)
{
unsigned long num_pages = bo->resource->num_pages;
+ struct dma_resv_iter resv_cursor;
struct amdgpu_res_cursor cursor;
- struct dma_resv_list *flist;
struct dma_fence *f;
- int i;
/* Swapout? */
if (bo->resource->mem_type == TTM_PL_SYSTEM)
@@ -1362,14 +1361,9 @@ static bool amdgpu_ttm_bo_eviction_valuable(struct
ttm_buffer_object *bo,
* If true, then return false as any KFD process needs all its BOs to
* be resident to run successfully
*/
- flist = dma_resv_shared_list(bo->base.resv);
- if (flist) {
- for (i = 0; i < flist->shared_count; ++i) {
- f = rcu_dereference_protected(flist->shared[i],
- dma_resv_held(bo->base.resv));
- if (amdkfd_fence_check_mm(f, current->mm))
- return false;
- }
+ dma_resv_for_each_fence(&resv_cursor, bo->base.resv, true, f) {
+ if (amdkfd_fence_check_mm(f, current->mm))
+ return false;
}
switch (bo->resource->mem_type) {
--
2.25.1
[Intel-gfx] [PATCH 19/28] drm/i915: use the new iterator in i915_request_await_object v2
Simplifying the code a bit.
v2: add missing rcu_read_lock()/rcu_read_unlock()
v3: use dma_resv_for_each_fence instead
Signed-off-by: Christian König
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_request.c | 34 +
1 file changed, 5 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index ce446716d092..3839712ebd23 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1509,38 +1509,14 @@ i915_request_await_object(struct i915_request *to,
struct drm_i915_gem_object *obj,
bool write)
{
- struct dma_fence *excl;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
int ret = 0;
- if (write) {
- struct dma_fence **shared;
- unsigned int count, i;
-
- ret = dma_resv_get_fences(obj->base.resv, &excl, &count,
- &shared);
+ dma_resv_for_each_fence(&cursor, obj->base.resv, write, fence) {
+ ret = i915_request_await_dma_fence(to, fence);
if (ret)
- return ret;
-
- for (i = 0; i < count; i++) {
- ret = i915_request_await_dma_fence(to, shared[i]);
- if (ret)
- break;
-
- dma_fence_put(shared[i]);
- }
-
- for (; i < count; i++)
- dma_fence_put(shared[i]);
- kfree(shared);
- } else {
- excl = dma_resv_get_excl_unlocked(obj->base.resv);
- }
-
- if (excl) {
- if (ret == 0)
- ret = i915_request_await_dma_fence(to, excl);
-
- dma_fence_put(excl);
+ break;
}
return ret;
--
2.25.1
[Intel-gfx] [PATCH 07/28] dma-buf: use new iterator in dma_resv_test_signaled
This makes the function much simpler since the complex
retry logic is now handled elsewhere.
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/dma-buf/dma-resv.c | 57 +-
1 file changed, 7 insertions(+), 50 deletions(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 510e15f805bb..324f243cb56b 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -630,22 +630,6 @@ long dma_resv_wait_timeout(struct dma_resv *obj, bool
wait_all, bool intr,
EXPORT_SYMBOL_GPL(dma_resv_wait_timeout);
-static inline int dma_resv_test_signaled_single(struct dma_fence *passed_fence)
-{
- struct dma_fence *fence, *lfence = passed_fence;
- int ret = 1;
-
- if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &lfence->flags)) {
- fence = dma_fence_get_rcu(lfence);
- if (!fence)
- return -1;
-
- ret = !!dma_fence_is_signaled(fence);
- dma_fence_put(fence);
- }
- return ret;
-}
-
/**
* dma_resv_test_signaled - Test if a reservation object's fences have been
* signaled.
@@ -662,43 +646,16 @@ static inline int dma_resv_test_signaled_single(struct
dma_fence *passed_fence)
*/
bool dma_resv_test_signaled(struct dma_resv *obj, bool test_all)
{
+ struct dma_resv_iter cursor;
struct dma_fence *fence;
- unsigned int seq;
- int ret;
-
- rcu_read_lock();
-retry:
- ret = true;
- seq = read_seqcount_begin(&obj->seq);
-
- if (test_all) {
- struct dma_resv_list *fobj = dma_resv_shared_list(obj);
- unsigned int i, shared_count;
-
- shared_count = fobj ? fobj->shared_count : 0;
- for (i = 0; i < shared_count; ++i) {
- fence = rcu_dereference(fobj->shared[i]);
- ret = dma_resv_test_signaled_single(fence);
- if (ret < 0)
- goto retry;
- else if (!ret)
- break;
- }
- }
-
- fence = dma_resv_excl_fence(obj);
- if (ret && fence) {
- ret = dma_resv_test_signaled_single(fence);
- if (ret < 0)
- goto retry;
+ dma_resv_iter_begin(&cursor, obj, test_all);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ dma_resv_iter_end(&cursor);
+ return false;
}
-
- if (read_seqcount_retry(&obj->seq, seq))
- goto retry;
-
- rcu_read_unlock();
- return ret;
+ dma_resv_iter_end(&cursor);
+ return true;
}
EXPORT_SYMBOL_GPL(dma_resv_test_signaled);
--
2.25.1
[Intel-gfx] [PATCH 05/28] dma-buf: use new iterator in dma_resv_get_fences v3
This makes the function much simpler since the complex
retry logic is now handled elsewhere.
v2: use sizeof(void*) instead
v3: fix rebase bug
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/dma-buf/dma-resv.c | 108 -
1 file changed, 35 insertions(+), 73 deletions(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 064972c6bde2..9b494828e7ca 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -535,99 +535,61 @@ EXPORT_SYMBOL(dma_resv_copy_fences);
* dma_resv_get_fences - Get an object's shared and exclusive
* fences without update side lock held
* @obj: the reservation object
- * @pfence_excl: the returned exclusive fence (or NULL)
- * @pshared_count: the number of shared fences returned
- * @pshared: the array of shared fence ptrs returned (array is krealloc'd to
+ * @fence_excl: the returned exclusive fence (or NULL)
+ * @shared_count: the number of shared fences returned
+ * @shared: the array of shared fence ptrs returned (array is krealloc'd to
* the required size, and must be freed by caller)
*
* Retrieve all fences from the reservation object. If the pointer for the
* exclusive fence is not specified the fence is put into the array of the
* shared fences as well. Returns either zero or -ENOMEM.
*/
-int dma_resv_get_fences(struct dma_resv *obj, struct dma_fence **pfence_excl,
- unsigned int *pshared_count,
- struct dma_fence ***pshared)
+int dma_resv_get_fences(struct dma_resv *obj, struct dma_fence **fence_excl,
+ unsigned int *shared_count, struct dma_fence ***shared)
{
- struct dma_fence **shared = NULL;
- struct dma_fence *fence_excl;
- unsigned int shared_count;
- int ret = 1;
-
- do {
- struct dma_resv_list *fobj;
- unsigned int i, seq;
- size_t sz = 0;
-
- shared_count = i = 0;
-
- rcu_read_lock();
- seq = read_seqcount_begin(&obj->seq);
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
- fence_excl = dma_resv_excl_fence(obj);
- if (fence_excl && !dma_fence_get_rcu(fence_excl))
- goto unlock;
+ *shared_count = 0;
+ *shared = NULL;
- fobj = dma_resv_shared_list(obj);
- if (fobj)
- sz += sizeof(*shared) * fobj->shared_max;
+ if (fence_excl)
+ *fence_excl = NULL;
- if (!pfence_excl && fence_excl)
- sz += sizeof(*shared);
+ dma_resv_iter_begin(&cursor, obj, true);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
- if (sz) {
- struct dma_fence **nshared;
+ if (dma_resv_iter_is_restarted(&cursor)) {
+ unsigned int count;
- nshared = krealloc(shared, sz,
- GFP_NOWAIT | __GFP_NOWARN);
- if (!nshared) {
- rcu_read_unlock();
+ while (*shared_count)
+ dma_fence_put((*shared)[--(*shared_count)]);
- dma_fence_put(fence_excl);
- fence_excl = NULL;
+ if (fence_excl)
+ dma_fence_put(*fence_excl);
- nshared = krealloc(shared, sz, GFP_KERNEL);
- if (nshared) {
- shared = nshared;
- continue;
- }
+ count = cursor.fences ? cursor.fences->shared_count : 0;
+ count += fence_excl ? 0 : 1;
- ret = -ENOMEM;
- break;
+ /* Eventually re-allocate the array */
+ *shared = krealloc_array(*shared, count,
+sizeof(void *),
+GFP_KERNEL);
+ if (count && !*shared) {
+ dma_resv_iter_end(&cursor);
+ return -ENOMEM;
}
- shared = nshared;
- shared_count = fobj ? fobj->shared_count : 0;
- for (i = 0; i < shared_count; ++i) {
- shared[i] = rcu_dereference(fobj->shared[i]);
- if (!dma_fence_get_rcu(shared[i]))
- break;
- }
- }
-
- if (i != shared_count || read_seqcount_retry(&obj->seq, seq)) {
- while (i--)
-
[Intel-gfx] [PATCH 26/28] drm/nouveau: use the new interator in nv50_wndw_prepare_fb
Makes the handling a bit more complex, but avoids the use of
dma_resv_get_excl_unlocked().
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/dispnv50/wndw.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c
b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
index 8d048bacd6f0..30712a681e2a 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
@@ -539,6 +539,8 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct
drm_plane_state *state)
struct nouveau_bo *nvbo;
struct nv50_head_atom *asyh;
struct nv50_wndw_ctxdma *ctxdma;
+ struct dma_resv_iter cursor;
+ struct dma_fence *fence;
int ret;
NV_ATOMIC(drm, "%s prepare: %p\n", plane->name, fb);
@@ -561,7 +563,13 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct
drm_plane_state *state)
asyw->image.handle[0] = ctxdma->object.handle;
}
- asyw->state.fence = dma_resv_get_excl_unlocked(nvbo->bo.base.resv);
+ dma_resv_iter_begin(&cursor, nvbo->bo.base.resv, false);
+ dma_resv_for_each_fence_unlocked(&cursor, fence) {
+ /* TODO: We only use the first writer here */
+ asyw->state.fence = dma_fence_get(fence);
+ break;
+ }
+ dma_resv_iter_end(&cursor);
asyw->image.offset[0] = nvbo->offset;
if (wndw->func->prepare) {
--
2.25.1
Re: [Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE
Hi Lucas,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next v5.15-rc3 next-20210922]
[cannot apply to airlied/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Lucas-De-Marchi/drm-i915-remove-IS_ACTIVE/20211001-154226
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-a015-20211001 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project
962e503cc8bc411f7523cc393acae8aae425b1c4)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/0day-ci/linux/commit/50006042f1d264599bd1be1942f9958112e15c01
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review
Lucas-De-Marchi/drm-i915-remove-IS_ACTIVE/20211001-154226
git checkout 50006042f1d264599bd1be1942f9958112e15c01
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1
ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/i915_config.c:11:14: warning: use of logical '&&' with
>> constant operand [-Wconstant-logical-operand]
if (context && CONFIG_DRM_I915_FENCE_TIMEOUT)
^ ~
drivers/gpu/drm/i915/i915_config.c:11:14: note: use '&' for a bitwise
operation
if (context && CONFIG_DRM_I915_FENCE_TIMEOUT)
^~
&
drivers/gpu/drm/i915/i915_config.c:11:14: note: remove constant to silence
this warning
if (context && CONFIG_DRM_I915_FENCE_TIMEOUT)
~^~~~
1 warning generated.
vim +11 drivers/gpu/drm/i915/i915_config.c
7
8 unsigned long
9 i915_fence_context_timeout(const struct drm_i915_private *i915, u64
context)
10 {
> 11 if (context && CONFIG_DRM_I915_FENCE_TIMEOUT)
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/locking: add backtrace for locking contended locks without backoff (rev2)
== Series Details == Series: drm/locking: add backtrace for locking contended locks without backoff (rev2) URL : https://patchwork.freedesktop.org/series/95182/ State : warning == Summary == $ dim checkpatch origin/drm-tip 28bb80fe7399 drm/locking: add backtrace for locking contended locks without backoff -:19: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #19: <7> [98.002465] drm_modeset_lock attempting to lock a contended lock without backoff: -:119: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #119: FILE: drivers/gpu/drm/drm_modeset_lock.c:115: +} +static void __stack_depot_print(depot_stack_handle_t stack_depot) total: 0 errors, 1 warnings, 1 checks, 126 lines checked
[Intel-gfx] [PATCH v2 01/10] drm/i915: Introduce has_iboost()
From: Ville Syrjälä
Suck the "do we have iboost?" platform checks into a small helper.
Cc: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 51cd0420e00e..f6429114ce7c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -92,6 +92,11 @@ static int intel_ddi_hdmi_level(struct intel_encoder
*encoder,
return level;
}
+static bool has_iboost(struct drm_i915_private *i915)
+{
+ return DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915);
+}
+
/*
* Starting with Haswell, DDI port buffers must be programmed with correct
* values in advance. This function programs the correct values for
@@ -111,7 +116,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
return;
/* If we're boosting the current, set bit 31 of trans1 */
- if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
+ if (has_iboost(dev_priv) &&
intel_bios_encoder_dp_boost_level(encoder->devdata))
iboost_bit = DDI_BUF_BALANCE_LEG_ENABLE;
@@ -145,7 +150,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
level = n_entries - 1;
/* If we're boosting the current, set bit 31 of trans1 */
- if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
+ if (has_iboost(dev_priv) &&
intel_bios_encoder_hdmi_boost_level(encoder->devdata))
iboost_bit = DDI_BUF_BALANCE_LEG_ENABLE;
@@ -1463,7 +1468,7 @@ hsw_set_signal_levels(struct intel_dp *intel_dp,
intel_dp->DP &= ~DDI_BUF_EMP_MASK;
intel_dp->DP |= signal_levels;
- if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
+ if (has_iboost(dev_priv))
skl_ddi_set_iboost(encoder, crtc_state, level);
intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
@@ -3084,7 +3089,7 @@ static void intel_enable_ddi_hdmi(struct
intel_atomic_state *state,
else
hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state, level);
- if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
+ if (has_iboost(dev_priv))
skl_ddi_set_iboost(encoder, crtc_state, level);
/* Display WA #1143: skl,kbl,cfl */
--
2.32.0
[Intel-gfx] [PATCH v2 03/10] drm/i915: Generalize .set_signal_levels()
From: Ville Syrjälä
Currently .set_signal_levels() is only used by encoders in DP mode.
For most modern platforms there is no essential difference between
DP and HDMI, and both codepaths just end up calling the same function
under the hood. Let's get remove the need for that extra indirection
by moving .set_signal_levels() into the encoder from intel_dp.
Since we already plumb the crtc_state/etc. into .set_signal_levels()
the code will do the right thing for both DP and HDMI.
HSW/BDW/SKL are the only platforms that need a bit of care on
account of having to preload the hardware buf_trans register
with the full set of values. So we must still remember to call
hsw_prepare_{dp,hdmi}_ddi_buffers() to do said preloading, and
.set_signal_levels() will just end up selecting the correct entry
for DP, and also setting up the iboost magic for both DP and HDMI.
Note that previously on HSW/BDW/SKL we did write to DDI_BUF_CTL to
select the correct entry until link training started, now that we
call .set_signal_levels() already from hsw_ddi_pre_enable_dp() that
is no longer the case. But it's all safe now that the
intel_ddi_init_dp_buf_reg() call was hoisted up and it no longer
sets up the DDI_BUF_CTL_ENABLE bit (that is still deferred until
link training).
v2: Rebase due to has_{iboost,buf_trans_select}()
Add some notes about the DDI_BUF_CTL situation on HSW/BDW/SKL (Imre)
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/g4x_dp.c | 33 +++---
drivers/gpu/drm/i915/display/intel_ddi.c | 104 --
.../drm/i915/display/intel_display_types.h| 5 +-
.../drm/i915/display/intel_dp_link_training.c | 5 +-
4 files changed, 71 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
b/drivers/gpu/drm/i915/display/g4x_dp.c
index 69a2e5ad2317..60ae2ba52006 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -808,10 +808,10 @@ static u8 intel_dp_preemph_max_3(struct intel_dp
*intel_dp)
return DP_TRAIN_PRE_EMPH_LEVEL_3;
}
-static void vlv_set_signal_levels(struct intel_dp *intel_dp,
+static void vlv_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
unsigned long demph_reg_value, preemph_reg_value,
uniqtranscale_reg_value;
u8 train_set = intel_dp->train_set[0];
@@ -894,10 +894,10 @@ static void vlv_set_signal_levels(struct intel_dp
*intel_dp,
uniqtranscale_reg_value, 0);
}
-static void chv_set_signal_levels(struct intel_dp *intel_dp,
+static void chv_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
u32 deemph_reg_value, margin_reg_value;
bool uniq_trans_scale = false;
u8 train_set = intel_dp->train_set[0];
@@ -1015,10 +1015,11 @@ static u32 g4x_signal_levels(u8 train_set)
}
static void
-g4x_set_signal_levels(struct intel_dp *intel_dp,
+g4x_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
u8 train_set = intel_dp->train_set[0];
u32 signal_levels;
@@ -1062,10 +1063,11 @@ static u32 snb_cpu_edp_signal_levels(u8 train_set)
}
static void
-snb_cpu_edp_set_signal_levels(struct intel_dp *intel_dp,
+snb_cpu_edp_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
u8 train_set = intel_dp->train_set[0];
u32 signal_levels;
@@ -1113,10 +1115,11 @@ static u32 ivb_cpu_edp_signal_levels(u8 train_set)
}
static void
-ivb_cpu_edp_set_signal_levels(struct intel_dp *intel_dp,
+ivb_cpu_edp_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
u8 train_set = intel_dp->train_set[0];
u32 signal_levels;
@@ -1359,15 +1362,15 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
dig_port->dp.set_link_train =
[Intel-gfx] [PATCH v2 06/10] drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level()
From: Ville Syrjälä
All callers of intel_ddi_level() duplicate the check+WARN
to make sure the returned level is actually present in the
appropriate buf_trans table. Let's push that stuff into
intel_ddi_level() so the callers don't have to worry about it.
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 27 ++-
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 2 --
drivers/gpu/drm/i915/display/intel_snps_phy.c | 2 --
3 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index e6dd8ca36e44..2b192694f484 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -151,8 +151,6 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
/* If we're boosting the current, set bit 31 of trans1 */
if (has_iboost(dev_priv) &&
@@ -987,8 +985,6 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
iboost = trans->entries[level].hsw.i_boost;
}
@@ -1047,8 +1043,6 @@ static void icl_ddi_combo_vswing_program(struct
intel_encoder *encoder,
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1173,8 +1167,6 @@ static void icl_mg_phy_set_signal_levels(struct
intel_encoder *encoder,
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
/* Set MG_TX_LINK_PARAMS cri_use_fs32 to 0. */
for (ln = 0; ln < 2; ln++) {
@@ -1296,8 +1288,6 @@ static void tgl_dkl_phy_set_signal_levels(struct
intel_encoder *encoder,
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
dpcnt_mask = (DKL_TX_PRESHOOT_COEFF_MASK |
DKL_TX_DE_EMPAHSIS_COEFF_MASK |
@@ -1367,10 +1357,23 @@ static int intel_ddi_dp_level(struct intel_dp *intel_dp)
int intel_ddi_level(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct intel_ddi_buf_trans *trans;
+ int level, n_entries;
+
+ trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
+ if (drm_WARN_ON_ONCE(&i915->drm, !trans))
+ return 0;
+
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return intel_ddi_hdmi_level(encoder, crtc_state);
+ level = intel_ddi_hdmi_level(encoder, crtc_state);
else
- return intel_ddi_dp_level(enc_to_intel_dp(encoder));
+ level = intel_ddi_dp_level(enc_to_intel_dp(encoder));
+
+ if (drm_WARN_ON_ONCE(&i915->drm, level >= n_entries))
+ level = n_entries - 1;
+
+ return level;
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index 4d604e4cfa5d..96650369164d 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -282,8 +282,6 @@ void bxt_ddi_phy_set_signal_levels(struct intel_encoder
*encoder,
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
bxt_port_to_phy_channel(dev_priv, encoder->port, &phy, &ch);
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c
b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index f59cc320ce9c..7a9771dbb63f 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -64
[Intel-gfx] [PATCH v2 00/10] drm/i915: DP per-lane drive settings prep work
From: Ville Syrjälä Revised set after I fixed the DDI_BUF_CTL stuff Imre pointed out. Also pushed the first s/ddi_translation/trans/ rename patch already. There are two new patches at the start of the series to refactor some platform checks into a more sensible form. Ville Syrjälä (10): drm/i915: Introduce has_iboost() drm/i915: Introduce has_buf_trans_select() drm/i915: Generalize .set_signal_levels() drm/i915: Nuke useless .set_signal_levels() wrappers drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels() drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level() drm/i915: Nuke intel_ddi_hdmi_num_entries() drm/i915: Pass the lane to intel_ddi_level() drm/i915: Prepare link training for per-lane drive settings drm/i915: Allow per-lane drive settings with LTTPRs drivers/gpu/drm/i915/display/g4x_dp.c | 33 +-- drivers/gpu/drm/i915/display/intel_ddi.c | 244 ++ drivers/gpu/drm/i915/display/intel_ddi.h | 7 +- .../drm/i915/display/intel_ddi_buf_trans.c| 20 -- .../drm/i915/display/intel_ddi_buf_trans.h| 4 - .../drm/i915/display/intel_display_types.h| 5 +- .../drm/i915/display/intel_dp_link_training.c | 83 -- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 28 +- drivers/gpu/drm/i915/display/intel_dpio_phy.h | 5 +- drivers/gpu/drm/i915/display/intel_snps_phy.c | 9 +- drivers/gpu/drm/i915/display/intel_snps_phy.h | 5 +- 11 files changed, 196 insertions(+), 247 deletions(-) -- 2.32.0
[Intel-gfx] [PATCH v2 05/10] drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels()
From: Ville Syrjälä
Convert bxt_ddi_phy_set_signal_levels() to act as the full
.set_signal_levels() hook instead of going through a pointless wrapper.
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 24 +--
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 30 +--
drivers/gpu/drm/i915/display/intel_dpio_phy.h | 5 ++--
3 files changed, 24 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index accdf456b1d0..e6dd8ca36e44 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1005,28 +1005,6 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
_skl_ddi_set_iboost(dev_priv, PORT_E, iboost);
}
-static void bxt_set_signal_levels(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- int level = intel_ddi_level(encoder, crtc_state);
- const struct intel_ddi_buf_trans *trans;
- enum port port = encoder->port;
- int n_entries;
-
- trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
- if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
- return;
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
-
- bxt_ddi_phy_set_signal_level(dev_priv, port,
-trans->entries[level].bxt.margin,
-trans->entries[level].bxt.scale,
-trans->entries[level].bxt.enable,
-trans->entries[level].bxt.deemphasis);
-}
-
static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
@@ -4580,7 +4558,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
else
encoder->set_signal_levels =
icl_mg_phy_set_signal_levels;
} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
- encoder->set_signal_levels = bxt_set_signal_levels;
+ encoder->set_signal_levels = bxt_ddi_phy_set_signal_levels;
} else {
encoder->set_signal_levels = hsw_set_signal_levels;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index 48507ed79950..4d604e4cfa5d 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -23,6 +23,8 @@
#include "display/intel_dp.h"
+#include "intel_ddi.h"
+#include "intel_ddi_buf_trans.h"
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dpio_phy.h"
@@ -266,15 +268,24 @@ void bxt_port_to_phy_channel(struct drm_i915_private
*dev_priv, enum port port,
*ch = DPIO_CH0;
}
-void bxt_ddi_phy_set_signal_level(struct drm_i915_private *dev_priv,
- enum port port, u32 margin, u32 scale,
- u32 enable, u32 deemphasis)
+void bxt_ddi_phy_set_signal_levels(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
{
- u32 val;
- enum dpio_phy phy;
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ int level = intel_ddi_level(encoder, crtc_state);
+ const struct intel_ddi_buf_trans *trans;
enum dpio_channel ch;
+ enum dpio_phy phy;
+ int n_entries;
+ u32 val;
- bxt_port_to_phy_channel(dev_priv, port, &phy, &ch);
+ trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
+ if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
+ return;
+ if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
+ level = n_entries - 1;
+
+ bxt_port_to_phy_channel(dev_priv, encoder->port, &phy, &ch);
/*
* While we write to the group register to program all lanes at once we
@@ -286,12 +297,13 @@ void bxt_ddi_phy_set_signal_level(struct drm_i915_private
*dev_priv,
val = intel_de_read(dev_priv, BXT_PORT_TX_DW2_LN0(phy, ch));
val &= ~(MARGIN_000 | UNIQ_TRANS_SCALE);
- val |= margin << MARGIN_000_SHIFT | scale << UNIQ_TRANS_SCALE_SHIFT;
+ val |= trans->entries[level].bxt.margin << MARGIN_000_SHIFT |
+ trans->entries[level].bxt.scale << UNIQ_TRANS_SCALE_SHIFT;
intel_de_write(dev_priv, BXT_PORT_TX_DW2_GRP(phy, ch), val);
val = intel_de_read(dev_priv, BXT_PORT_TX_DW3_LN0(phy, ch));
val &= ~SCALE_DCOMP_METHOD;
- if (enable)
+ if (trans->entries[level].bxt.enable)
val |= SCALE_DCOMP_METHOD;
if ((val & UNIQUE_TRANGE_EN_METHOD) && !
[Intel-gfx] [PATCH v2 04/10] drm/i915: Nuke useless .set_signal_levels() wrappers
From: Ville Syrjälä
Now that .set_signal_levels() is used for HDMI as well, we can
remove the extra level of indirection and just plug the correct
stuff straight into .set_signal_levels().
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 119 +-
drivers/gpu/drm/i915/display/intel_ddi.h | 6 +-
drivers/gpu/drm/i915/display/intel_snps_phy.c | 7 +-
drivers/gpu/drm/i915/display/intel_snps_phy.h | 5 +-
4 files changed, 39 insertions(+), 98 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index ad7fe84b6d75..accdf456b1d0 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1005,11 +1005,11 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
_skl_ddi_set_iboost(dev_priv, PORT_E, iboost);
}
-static void bxt_ddi_vswing_sequence(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int level)
+static void bxt_set_signal_levels(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ int level = intel_ddi_level(encoder, crtc_state);
const struct intel_ddi_buf_trans *trans;
enum port port = encoder->port;
int n_entries;
@@ -1057,10 +1057,10 @@ static u8 intel_ddi_dp_preemph_max(struct intel_dp
*intel_dp)
}
static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,
-const struct intel_crtc_state
*crtc_state,
-int level)
+const struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ int level = intel_ddi_level(encoder, crtc_state);
const struct intel_ddi_buf_trans *trans;
enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
int n_entries, ln;
@@ -1119,9 +1119,8 @@ static void icl_ddi_combo_vswing_program(struct
intel_encoder *encoder,
intel_de_write(dev_priv, ICL_PORT_TX_DW7_GRP(phy), val);
}
-static void icl_combo_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
- const struct intel_crtc_state
*crtc_state,
- int level)
+static void icl_combo_phy_set_signal_levels(struct intel_encoder *encoder,
+ const struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
@@ -1172,7 +1171,7 @@ static void icl_combo_phy_ddi_vswing_sequence(struct
intel_encoder *encoder,
intel_de_write(dev_priv, ICL_PORT_TX_DW5_GRP(phy), val);
/* 5. Program swing and de-emphasis */
- icl_ddi_combo_vswing_program(encoder, crtc_state, level);
+ icl_ddi_combo_vswing_program(encoder, crtc_state);
/* 6. Set training enable to trigger update */
val = intel_de_read(dev_priv, ICL_PORT_TX_DW5_LN0(phy));
@@ -1180,12 +1179,12 @@ static void icl_combo_phy_ddi_vswing_sequence(struct
intel_encoder *encoder,
intel_de_write(dev_priv, ICL_PORT_TX_DW5_GRP(phy), val);
}
-static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
- const struct intel_crtc_state
*crtc_state,
- int level)
+static void icl_mg_phy_set_signal_levels(struct intel_encoder *encoder,
+const struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port);
+ int level = intel_ddi_level(encoder, crtc_state);
const struct intel_ddi_buf_trans *trans;
int n_entries, ln;
u32 val;
@@ -1303,26 +1302,12 @@ static void icl_mg_phy_ddi_vswing_sequence(struct
intel_encoder *encoder,
}
}
-static void icl_ddi_vswing_sequence(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int level)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
-
- if (intel_phy_is_combo(dev_priv, phy))
- icl_combo_phy_ddi_vswing_sequence(encoder, crtc_state, level);
- else
- icl_mg_phy_ddi_vswing_sequence(encoder, crtc_state, level);
-}
-
-static void
-tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_stat
[Intel-gfx] [PATCH v2 09/10] drm/i915: Prepare link training for per-lane drive settings
From: Ville Syrjälä
Adjust the link training code to accommodate per-lane drive settings,
if supported by the platform. Actually enabling this will involve
some changes to each platform's .set_signal_level() implementation,
so for the moment all supported platforms will keep using the current
codepath that just uses the same drive settings for all the lanes.
v2: Fix min() vs. max() fumble
v3: Compact the debug print to a single line
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_dp_link_training.c | 78 ++-
1 file changed, 60 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 62d5c6cf60ee..6e9232126788 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -301,21 +301,33 @@ static u8 intel_dp_phy_preemph_max(struct intel_dp
*intel_dp,
return preemph_max;
}
-void
-intel_dp_get_adjust_train(struct intel_dp *intel_dp,
- const struct intel_crtc_state *crtc_state,
- enum drm_dp_phy dp_phy,
- const u8 link_status[DP_LINK_STATUS_SIZE])
+static bool has_per_lane_signal_levels(struct intel_dp *intel_dp,
+ enum drm_dp_phy dp_phy)
+{
+ return false;
+}
+
+static u8 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp,
+const struct intel_crtc_state
*crtc_state,
+enum drm_dp_phy dp_phy,
+const u8
link_status[DP_LINK_STATUS_SIZE],
+int lane)
{
u8 v = 0;
u8 p = 0;
- int lane;
u8 voltage_max;
u8 preemph_max;
- for (lane = 0; lane < crtc_state->lane_count; lane++) {
- v = max(v, drm_dp_get_adjust_request_voltage(link_status,
lane));
- p = max(p, drm_dp_get_adjust_request_pre_emphasis(link_status,
lane));
+ if (has_per_lane_signal_levels(intel_dp, dp_phy)) {
+ lane = min(lane, crtc_state->lane_count - 1);
+
+ v = drm_dp_get_adjust_request_voltage(link_status, lane);
+ p = drm_dp_get_adjust_request_pre_emphasis(link_status, lane);
+ } else {
+ for (lane = 0; lane < crtc_state->lane_count; lane++) {
+ v = max(v,
drm_dp_get_adjust_request_voltage(link_status, lane));
+ p = max(p,
drm_dp_get_adjust_request_pre_emphasis(link_status, lane));
+ }
}
preemph_max = intel_dp_phy_preemph_max(intel_dp, dp_phy);
@@ -328,8 +340,21 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
if (v >= voltage_max)
v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
+ return v | p;
+}
+
+void
+intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ enum drm_dp_phy dp_phy,
+ const u8 link_status[DP_LINK_STATUS_SIZE])
+{
+ int lane;
+
for (lane = 0; lane < 4; lane++)
- intel_dp->train_set[lane] = v | p;
+ intel_dp->train_set[lane] =
+ intel_dp_get_lane_adjust_train(intel_dp, crtc_state,
+ dp_phy, link_status,
lane);
}
static int intel_dp_training_pattern_set_reg(struct intel_dp *intel_dp,
@@ -394,22 +419,39 @@ intel_dp_program_link_training_pattern(struct intel_dp
*intel_dp,
intel_dp->set_link_train(intel_dp, crtc_state, dp_train_pat);
}
+#define TRAIN_SET_FMT "%d%s/%d%s/%d%s/%d%s"
+#define _TRAIN_SET_VSWING_ARGS(train_set) \
+ ((train_set) & DP_TRAIN_VOLTAGE_SWING_MASK) >>
DP_TRAIN_VOLTAGE_SWING_SHIFT, \
+ (train_set) & DP_TRAIN_MAX_SWING_REACHED ? "(max)" : ""
+#define TRAIN_SET_VSWING_ARGS(train_set) \
+ _TRAIN_SET_VSWING_ARGS((train_set)[0]), \
+ _TRAIN_SET_VSWING_ARGS((train_set)[1]), \
+ _TRAIN_SET_VSWING_ARGS((train_set)[2]), \
+ _TRAIN_SET_VSWING_ARGS((train_set)[3])
+#define _TRAIN_SET_PREEMPH_ARGS(train_set) \
+ ((train_set) & DP_TRAIN_PRE_EMPHASIS_MASK) >>
DP_TRAIN_PRE_EMPHASIS_SHIFT, \
+ (train_set) & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ? "(max)" : ""
+#define TRAIN_SET_PREEMPH_ARGS(train_set) \
+ _TRAIN_SET_PREEMPH_ARGS((train_set)[0]), \
+ _TRAIN_SET_PREEMPH_ARGS((train_set)[1]), \
+ _TRAIN_SET_PREEMPH_ARGS((train_set)[2]), \
+ _TRAIN_SET_PREEMPH_ARGS((train_set)[3])
+
void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state,
enum drm_dp_phy dp_phy)
{
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct
[Intel-gfx] [PATCH v2 02/10] drm/i915: Introduce has_buf_trans_select()
From: Ville Syrjälä
Add a small helper to determine if DDI_BUF_CTL uses the
DDI_BUF_TRANS_SELECT field, and whether we have the
accompanying DDI_BUF_TRANS table in the hardware.
Cc: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index f6429114ce7c..dbcf4ddd0f3b 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -92,6 +92,11 @@ static int intel_ddi_hdmi_level(struct intel_encoder
*encoder,
return level;
}
+static bool has_buf_trans_select(struct drm_i915_private *i915)
+{
+ return DISPLAY_VER(i915) < 10 && !IS_BROXTON(i915);
+}
+
static bool has_iboost(struct drm_i915_private *i915)
{
return DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915);
@@ -2640,7 +2645,8 @@ static void hsw_ddi_pre_enable_dp(struct
intel_atomic_state *state,
icl_ddi_vswing_sequence(encoder, crtc_state, level);
else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
bxt_ddi_vswing_sequence(encoder, crtc_state, level);
- else
+
+ if (has_buf_trans_select(dev_priv))
hsw_prepare_dp_ddi_buffers(encoder, crtc_state);
intel_ddi_power_up_lanes(encoder, crtc_state);
@@ -3086,7 +3092,8 @@ static void intel_enable_ddi_hdmi(struct
intel_atomic_state *state,
icl_ddi_vswing_sequence(encoder, crtc_state, level);
else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
bxt_ddi_vswing_sequence(encoder, crtc_state, level);
- else
+
+ if (has_buf_trans_select(dev_priv))
hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state, level);
if (has_iboost(dev_priv))
--
2.32.0
[Intel-gfx] [PATCH v2 10/10] drm/i915: Allow per-lane drive settings with LTTPRs
From: Ville Syrjälä
LTTPRs should support per-lane drive settings I think, and even if
they don't they should implement their own fallback logic to determine
suitable common drive settings to use for all the lanes.
v2: Actually check the correct thing
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 6e9232126788..e9e22f1b043b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -304,7 +304,7 @@ static u8 intel_dp_phy_preemph_max(struct intel_dp
*intel_dp,
static bool has_per_lane_signal_levels(struct intel_dp *intel_dp,
enum drm_dp_phy dp_phy)
{
- return false;
+ return !intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy);
}
static u8 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp,
--
2.32.0
[Intel-gfx] [PATCH v2 07/10] drm/i915: Nuke intel_ddi_hdmi_num_entries()
From: Ville Syrjälä
Since intel_ddi_level() now looks that buf_trans table there's
no point in having intel_ddi_hdmi_num_entries() around. Just
roll the necessary bits of locic into
intel_ddi_hdmi_level()/intel_ddi_level().
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 17 +---
.../drm/i915/display/intel_ddi_buf_trans.c| 20 ---
.../drm/i915/display/intel_ddi_buf_trans.h| 4
3 files changed, 5 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 2b192694f484..4e9a6f30f524 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -74,20 +74,13 @@ static const u8 index_to_dp_signal_levels[] = {
};
static int intel_ddi_hdmi_level(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+ const struct intel_ddi_buf_trans *trans)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- int n_entries, level, default_entry;
+ int level;
- n_entries = intel_ddi_hdmi_num_entries(encoder, crtc_state,
&default_entry);
- if (n_entries == 0)
- return 0;
level = intel_bios_hdmi_level_shift(encoder);
if (level < 0)
- level = default_entry;
-
- if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries))
- level = n_entries - 1;
+ level = trans->hdmi_default_entry;
return level;
}
@@ -142,7 +135,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
const struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- int level = intel_ddi_hdmi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state);
u32 iboost_bit = 0;
int n_entries;
enum port port = encoder->port;
@@ -1366,7 +1359,7 @@ int intel_ddi_level(struct intel_encoder *encoder,
return 0;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- level = intel_ddi_hdmi_level(encoder, crtc_state);
+ level = intel_ddi_hdmi_level(encoder, trans);
else
level = intel_ddi_dp_level(enc_to_intel_dp(encoder));
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 449daba7afb3..a2d39131ea53 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1617,26 +1617,6 @@ dg2_get_snps_buf_trans(struct intel_encoder *encoder,
return intel_get_buf_trans(&dg2_snps_trans, n_entries);
}
-int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int *default_entry)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- const struct intel_ddi_buf_trans *trans;
- int n_entries;
-
- trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
-
- if (drm_WARN_ON(&dev_priv->drm, !trans)) {
- *default_entry = 0;
- return 0;
- }
-
- *default_entry = trans->hdmi_default_entry;
-
- return n_entries;
-}
-
void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 94d338287f61..6cdb8e9073c7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -68,10 +68,6 @@ struct intel_ddi_buf_trans {
bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
-int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int *default_entry);
-
void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
#endif
--
2.32.0
[Intel-gfx] [PATCH v2 08/10] drm/i915: Pass the lane to intel_ddi_level()
From: Ville Syrjälä
In order to have per-lane drive settings we need intel_ddi_level()
to accept the lane as a parameter. That is, the eventual goal is to
call intel_ddi_level() once for each lane. For now we just pass in
a hardcoded 0 and use the same settings for every lane. Ie. no
change in behaviour yet.
Reviewed-by: Imre Deak
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 19 ++-
drivers/gpu/drm/i915/display/intel_ddi.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 2 +-
drivers/gpu/drm/i915/display/intel_snps_phy.c | 2 +-
4 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4e9a6f30f524..0d4cf7fa8720 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -135,7 +135,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
const struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- int level = intel_ddi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state, 0);
u32 iboost_bit = 0;
int n_entries;
enum port port = encoder->port;
@@ -1027,7 +1027,7 @@ static void icl_ddi_combo_vswing_program(struct
intel_encoder *encoder,
const struct intel_crtc_state
*crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- int level = intel_ddi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state, 0);
const struct intel_ddi_buf_trans *trans;
enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
int n_entries, ln;
@@ -1149,7 +1149,7 @@ static void icl_mg_phy_set_signal_levels(struct
intel_encoder *encoder,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port);
- int level = intel_ddi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state, 0);
const struct intel_ddi_buf_trans *trans;
int n_entries, ln;
u32 val;
@@ -1270,7 +1270,7 @@ static void tgl_dkl_phy_set_signal_levels(struct
intel_encoder *encoder,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port);
- int level = intel_ddi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state, 0);
const struct intel_ddi_buf_trans *trans;
u32 val, dpcnt_mask, dpcnt_val;
int n_entries, ln;
@@ -1338,9 +1338,9 @@ static int translate_signal_level(struct intel_dp
*intel_dp,
return 0;
}
-static int intel_ddi_dp_level(struct intel_dp *intel_dp)
+static int intel_ddi_dp_level(struct intel_dp *intel_dp, int lane)
{
- u8 train_set = intel_dp->train_set[0];
+ u8 train_set = intel_dp->train_set[lane];
u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
DP_TRAIN_PRE_EMPHASIS_MASK);
@@ -1348,7 +1348,8 @@ static int intel_ddi_dp_level(struct intel_dp *intel_dp)
}
int intel_ddi_level(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+ const struct intel_crtc_state *crtc_state,
+ int lane)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
const struct intel_ddi_buf_trans *trans;
@@ -1361,7 +1362,7 @@ int intel_ddi_level(struct intel_encoder *encoder,
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
level = intel_ddi_hdmi_level(encoder, trans);
else
- level = intel_ddi_dp_level(enc_to_intel_dp(encoder));
+ level = intel_ddi_dp_level(enc_to_intel_dp(encoder), lane);
if (drm_WARN_ON_ONCE(&i915->drm, level >= n_entries))
level = n_entries - 1;
@@ -1375,7 +1376,7 @@ hsw_set_signal_levels(struct intel_encoder *encoder,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- int level = intel_ddi_level(encoder, crtc_state);
+ int level = intel_ddi_level(encoder, crtc_state, 0);
enum port port = encoder->port;
u32 signal_levels;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
b/drivers/gpu/drm/i915/display/intel_ddi.h
index d6947c06a455..d6971717ef9c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -64,6 +64,7 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder
*intel_encoder,
bool enable, u32 hdcp_mask);
void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encod
Re: [Intel-gfx] refactor the i915 GVT support
On 9/29/21 6:55 PM, Jason Gunthorpe wrote:
> On Wed, Sep 29, 2021 at 06:27:16PM +, Wang, Zhi A wrote:
>> On 9/28/21 3:05 PM, Jason Gunthorpe wrote:
>>> On Tue, Sep 28, 2021 at 02:35:06PM +, Wang, Zhi A wrote:
>>>
Yes. I was thinking of the possibility of putting off some work later so
that we don't need to make a lot of changes. GVT-g needs to take a
snapshot of GPU registers as the initial virtual states for other vGPUs,
which requires the initialization happens at a certain early time of
initialization of i915. I was thinking maybe we can take other patches
from Christoph like "de-virtualize*" except this one because currently
we have to maintain a TEST-ONLY patch on our tree to prevent i915 built
as kernel module.
>>> How about just capture these registers in the main module/device and
>>> not try so hard to isolate it to the gvt stuff?
>> Hi Jason:
>>
>> Thanks for the idea. I am not sure i915 guys would take this idea since
>> that it's only for GVT-g, i915 doesn't use this at all. We need to take
>> a snapshot of both PCI configuration space and MMIO registers before
>> i915 driver starts to touch the HW.
> Given the code is already linked into i915 I don't see there is much
> to object to here. It can remain conditional on the kernel parameter
> as today.
>
> As a general philosophy this would all be much less strange if the
> mdev .ko is truely optional. It should be cleanly seperate from its
> base device and never request_module'd..
>
> In this case auxiliary device might be a good option, have i915 create
> one and the mdev module be loaded against it.
>
> In the mean time is there some shortcut to get this series to move
> ahead? Is patch 4 essential to the rest of the series?
>
> A really awful hack would be to push the pci_driver_register into a
> WQ so that the request_module is guarenteed to not be part of the
> module_init callchain.
Hi Jason and folks:
Thanks so much for the ideas. That sounds great and I was keeping
thinking how to make progress on this. How about we do like this: We
don't do request_module("kvmgt") in i915.ko, which resolves the circular
module dependency. We keep the code of doing snapshot of registers in
intel_gvt.c. When i915.enable_gvt=1, we do the snapshot. Then we export
functions for kvmgt.ko in intel_gvt.c to check if gvt in i915 is enabled
or not and get the snapshots.
How does that sounds? I just need to write another patch and put it on
top of Christoph's series.
Thanks,
Zhi.
>> Also I was thinking if moving gvt into kvmgt.ko is the right direction.
>> It seems the module loading system in kernel is not designed for "module
>> A loading module B, which needs symbols from module A, in the
>> initialization path of module A".
> Of course not, that is a circular module dependency, it should not be
> that way. The SW layers need to be clean and orderly - meaning the
> i915 module needs to have the minimal amount of code to support the
> mdev module.
>
> Jason
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/locking: add backtrace for locking contended locks without backoff (rev2)
== Series Details ==
Series: drm/locking: add backtrace for locking contended locks without backoff
(rev2)
URL : https://patchwork.freedesktop.org/series/95182/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10674 -> Patchwork_21215
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21215/index.html
Known issues
Here are the changes found in Patchwork_21215 that come from known issues:
### IGT changes ###
Possible fixes
* igt@i915_selftest@live@gt_heartbeat:
- {fi-tgl-dsi}: [DMESG-FAIL][1] ([i915#541]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10674/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21215/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (33 -> 28)
--
Additional (1): fi-jsl-1
Missing(6): bat-adls-5 bat-dg1-6 fi-bsw-cyan bat-adlp-4 bat-jsl-2
bat-jsl-1
Build changes
-
* Linux: CI_DRM_10674 -> Patchwork_21215
CI-20190529: 20190529
CI_DRM_10674: 3e43eef827708f7c371bc29c9756cf0808b42e3b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6228: 22643ce4014a0b2dc52ce7916b2f657e2a7757c3 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21215: 28bb80fe73993f57ae38a728187d9590a516a5fd @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
28bb80fe7399 drm/locking: add backtrace for locking contended locks without
backoff
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21215/index.html
[Intel-gfx] [bug report] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
Hello Imre Deak, This is a semi-automatic email about new static checker warnings. The patch 3e0abc7661c8: "drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P" from Sep 29, 2021, leads to the following Smatch complaint: drivers/gpu/drm/i915/display/intel_ddi.c:4028 intel_ddi_encoder_destroy() warn: variable dereferenced before check 'dig_port' (see line 4020) drivers/gpu/drm/i915/display/intel_ddi.c 4019 struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder)); 4020 enum phy phy = intel_port_to_phy(i915, dig_port->base.port); ^^^ The patch adds a new unchecked dereference. 4021 4022 intel_dp_encoder_flush_work(encoder); 4023 if (intel_phy_is_tc(i915, phy)) 4024 intel_tc_port_flush_work(dig_port); 4025 intel_display_power_flush_work(i915); 4026 4027 drm_encoder_cleanup(encoder); 4028 if (dig_port) But the existing code checked for NULL. 4029 kfree(dig_port->hdcp_port_data.streams); 4030 kfree(dig_port); regards, dan carpenter
Re: [Intel-gfx] [bug report] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
On Fri, Oct 01, 2021 at 04:25:35PM +0300, Dan Carpenter wrote: > Hello Imre Deak, > > This is a semi-automatic email about new static checker warnings. > > The patch 3e0abc7661c8: "drm/i915/tc: Fix TypeC PHY > connect/disconnect logic on ADL-P" from Sep 29, 2021, leads to the > following Smatch complaint: > > drivers/gpu/drm/i915/display/intel_ddi.c:4028 intel_ddi_encoder_destroy() > warn: variable dereferenced before check 'dig_port' (see line 4020) > > drivers/gpu/drm/i915/display/intel_ddi.c > 4019struct intel_digital_port *dig_port = > enc_to_dig_port(to_intel_encoder(encoder)); > 4020enum phy phy = intel_port_to_phy(i915, > dig_port->base.port); >^^^ > The patch adds a new unchecked dereference. > > 4021 > 4022intel_dp_encoder_flush_work(encoder); > 4023if (intel_phy_is_tc(i915, phy)) > 4024intel_tc_port_flush_work(dig_port); > 4025intel_display_power_flush_work(i915); > 4026 > 4027drm_encoder_cleanup(encoder); > 4028if (dig_port) > > But the existing code checked for NULL. That check is nonsense. Feel free to nuke it. > > 4029kfree(dig_port->hdcp_port_data.streams); > 4030kfree(dig_port); > > regards, > dan carpenter -- Ville Syrjälä Intel
Re: [Intel-gfx] [PATCH v2 01/10] drm/i915: Introduce has_iboost()
On Fri, Oct 01, 2021 at 04:00:58PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Suck the "do we have iboost?" platform checks into a small helper.
>
> Cc: Imre Deak
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 51cd0420e00e..f6429114ce7c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -92,6 +92,11 @@ static int intel_ddi_hdmi_level(struct intel_encoder
> *encoder,
> return level;
> }
>
> +static bool has_iboost(struct drm_i915_private *i915)
> +{
> + return DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915);
> +}
> +
> /*
> * Starting with Haswell, DDI port buffers must be programmed with correct
> * values in advance. This function programs the correct values for
> @@ -111,7 +116,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
> *encoder,
> return;
>
> /* If we're boosting the current, set bit 31 of trans1 */
> - if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
> + if (has_iboost(dev_priv) &&
> intel_bios_encoder_dp_boost_level(encoder->devdata))
> iboost_bit = DDI_BUF_BALANCE_LEG_ENABLE;
>
> @@ -145,7 +150,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
> intel_encoder *encoder,
> level = n_entries - 1;
>
> /* If we're boosting the current, set bit 31 of trans1 */
> - if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
> + if (has_iboost(dev_priv) &&
> intel_bios_encoder_hdmi_boost_level(encoder->devdata))
> iboost_bit = DDI_BUF_BALANCE_LEG_ENABLE;
>
> @@ -1463,7 +1468,7 @@ hsw_set_signal_levels(struct intel_dp *intel_dp,
> intel_dp->DP &= ~DDI_BUF_EMP_MASK;
> intel_dp->DP |= signal_levels;
>
> - if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
> + if (has_iboost(dev_priv))
> skl_ddi_set_iboost(encoder, crtc_state, level);
>
> intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> @@ -3084,7 +3089,7 @@ static void intel_enable_ddi_hdmi(struct
> intel_atomic_state *state,
> else
> hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state, level);
>
> - if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
> + if (has_iboost(dev_priv))
> skl_ddi_set_iboost(encoder, crtc_state, level);
>
> /* Display WA #1143: skl,kbl,cfl */
> --
> 2.32.0
>
Re: [Intel-gfx] [PATCH v2 02/10] drm/i915: Introduce has_buf_trans_select()
On Fri, Oct 01, 2021 at 04:00:59PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add a small helper to determine if DDI_BUF_CTL uses the
> DDI_BUF_TRANS_SELECT field, and whether we have the
> accompanying DDI_BUF_TRANS table in the hardware.
>
> Cc: Imre Deak
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 11 +--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index f6429114ce7c..dbcf4ddd0f3b 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -92,6 +92,11 @@ static int intel_ddi_hdmi_level(struct intel_encoder
> *encoder,
> return level;
> }
>
> +static bool has_buf_trans_select(struct drm_i915_private *i915)
> +{
> + return DISPLAY_VER(i915) < 10 && !IS_BROXTON(i915);
> +}
> +
> static bool has_iboost(struct drm_i915_private *i915)
> {
> return DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915);
> @@ -2640,7 +2645,8 @@ static void hsw_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> icl_ddi_vswing_sequence(encoder, crtc_state, level);
> else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> bxt_ddi_vswing_sequence(encoder, crtc_state, level);
> - else
> +
> + if (has_buf_trans_select(dev_priv))
> hsw_prepare_dp_ddi_buffers(encoder, crtc_state);
>
> intel_ddi_power_up_lanes(encoder, crtc_state);
> @@ -3086,7 +3092,8 @@ static void intel_enable_ddi_hdmi(struct
> intel_atomic_state *state,
> icl_ddi_vswing_sequence(encoder, crtc_state, level);
> else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> bxt_ddi_vswing_sequence(encoder, crtc_state, level);
> - else
> +
> + if (has_buf_trans_select(dev_priv))
> hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state, level);
>
> if (has_iboost(dev_priv))
> --
> 2.32.0
>
Re: [Intel-gfx] [PULL] drm-misc-fixes
On Fri, Oct 01, 2021 at 11:50:52AM +0200, Daniel Vetter wrote: > On Thu, Sep 30, 2021 at 12:06:21PM +0200, Maarten Lankhorst wrote: > > drm-misc-fixes-2021-09-30: > > drm-misc-fixes for v5.15: > > - Not sure if drm-misc-fixes-2021-09-08 tag was pulled, assuming it is. > > - Power management fixes for vc4. > > - Compiler fix for vc4. > > - Cursor fix for nouveau. > > - Fix ttm buffer moves for ampere gpu's by adding minimal acceleration > > support. > > - Small rockchip fixes. > > - Fix DT bindings indent for ili9341. > > - Fix y030xx067a init sequence to not get a yellow tint. > > - Kconfig fix for fb_simple vs simpledrm. > > The following changes since commit 6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f: > > > > Linux 5.15-rc1 (2021-09-12 16:28:37 -0700) > > > > are available in the Git repository at: > > > > git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2021-09-30 > > > > for you to fetch changes up to fd09961dbb9ca6558d8ad318a3967c1048bdb090: > > > > fbdev: simplefb: fix Kconfig dependencies (2021-09-29 09:26:58 +0200) > > > > > > drm-misc-fixes for v5.15: > > - Not sure if drm-misc-fixes-2021-09-08 tag was pulled, assuming it is. Dave said he won't pull it and just cherry-picked the ttm fix, and asked for a rebase of the remaining bits. > > - Power management fixes for vc4. > > - Compiler fix for vc4. > > - Cursor fix for nouveau. > > - Fix ttm buffer moves for ampere gpu's by adding minimal acceleration > > support. > > - Small rockchip fixes. > > - Fix DT bindings indent for ili9341. > > - Fix y030xx067a init sequence to not get a yellow tint. > > - Kconfig fix for fb_simple vs simpledrm. > > I can't pull this, because it conflicts with vc4 reverts in -rc2. There's > a completely busted merge resolution in drm-tip, which doesn't even > compile. > > Please > - drop all vc4 patches > - rebase onto -rc3 or -rc4 if it's too late > > I'll do the pull to Linus this afternoon, would be good to get the other > fixes in. I didn't see anything, so I guess it's going to be rebase onto -rc4 next week. Please don't fumble this for another week, the kmb fix is almost a month old by now because it keeps falling through cracks. drm-misc is supposed to be worry-free, not "where is my drm-misc-fixes" pull request land ... -Daniel > -Daniel > > > > > > > Arnd Bergmann (1): > > fbdev: simplefb: fix Kconfig dependencies > > > > Ben Skeggs (3): > > drm/nouveau/kms/tu102-: delay enabling cursor until after > > assign_windows > > drm/nouveau/ga102-: support ttm buffer moves via copy engine > > drm/nouveau/fifo/ga102: initialise chid on return from channel > > creation > > > > Chris Morgan (1): > > drm/rockchip: Update crtc fixup to account for fractional clk change > > > > Christophe Branchereau (1): > > drm/panel: abt-y030xx067a: yellow tint fix > > > > Edmund Dea (1): > > drm/kmb: Enable alpha blended second plane > > > > Jernej Skrabec (1): > > drm/sun4i: dw-hdmi: Fix HDMI PHY clock setup > > > > Krzysztof Kozlowski (1): > > dt-bindings: panel: ili9341: correct indentation > > > > Maarten Lankhorst (1): > > Merge drm/drm-fixes into drm-misc-fixes > > > > Maxime Ripard (7): > > drm/vc4: select PM > > drm/vc4: hdmi: Make sure the controller is powered up during bind > > drm/vc4: hdmi: Rework the pre_crtc_configure error handling > > drm/vc4: hdmi: Split the CEC disable / enable functions in two > > drm/vc4: hdmi: Make sure the device is powered with CEC > > drm/vc4: hdmi: Warn if we access the controller while disabled > > drm/vc4: hdmi: Remove unused struct > > > > Palmer Dabbelt (1): > > drm/rockchip: cdn-dp-core: Fix cdn_dp_resume unused warning > > > > xinhui pan (1): > > drm/ttm: Fix a deadlock if the target BO is not idle during swap > > > > .../bindings/display/panel/ilitek,ili9341.yaml | 2 +- > > drivers/gpu/drm/kmb/kmb_drv.c | 8 +- > > drivers/gpu/drm/kmb/kmb_drv.h | 5 + > > drivers/gpu/drm/kmb/kmb_plane.c| 81 +- > > drivers/gpu/drm/kmb/kmb_plane.h| 5 +- > > drivers/gpu/drm/kmb/kmb_regs.h | 3 + > > drivers/gpu/drm/nouveau/dispnv50/head.c| 2 +- > > drivers/gpu/drm/nouveau/include/nvif/class.h | 2 + > > drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h | 1 + > > drivers/gpu/drm/nouveau/nouveau_bo.c | 1 + > > drivers/gpu/drm/nouveau/nouveau_chan.c | 6 +- > > drivers/gpu/drm/nouveau/nouveau_drm.c | 4 + > > drivers/gpu/drm/nouveau/nv84_fence.c | 2 +- > > drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 3 + > > drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild| 1 + > > drivers/gpu/drm/nouveau/nvkm/engine
Re: [Intel-gfx] [PATCH] drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of PCI_DMA_BIDIRECTIONAL
On Thu, Sep 30, 2021 at 08:58:15PM +0200, Christophe JAILLET wrote:
> Le 30/09/2021 à 16:21, Daniel Vetter a écrit :
> > On Sat, Sep 25, 2021 at 08:46:12PM +0800, Cai Huoqing wrote:
> > > Replace direction definition PCI_DMA_BIDIRECTIONAL
> > > with DMA_BIDIRECTIONAL, because it helps to enhance readability
> > > and avoid possible inconsistency.
> > >
> > > Signed-off-by: Cai Huoqing
> >
> > Applied to drm-intel-gt-next, thanks for the patch.
> > -Daniel
>
> Hi,
> just in case, a similar patch received some (unrelated) comments a few weeks
> ago. See [1].
>
> Should it rings some bells to someone who know who knows what should be
> done.
>
> Just my 2c.
>
> [1]:
> https://lore.kernel.org/kernel-janitors/0cd61d5b-ac88-31e8-99ad-143af4804...@arm.com/
Hm yeah there's some fishy stuff in here, but it's cc'ed to intel-gfx so
should get picked up there.
-Daniel
>
> CJ
>
>
> >
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++--
> > > drivers/gpu/drm/i915/gvt/gtt.c | 17 -
> > > drivers/gpu/drm/i915/gvt/kvmgt.c| 4 ++--
> > > drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
> > > 4 files changed, 14 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> > > b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> > > index a74b72f50cc9..afb35d2e5c73 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> > > @@ -32,7 +32,7 @@ static int init_fake_lmem_bar(struct
> > > intel_memory_region *mem)
> > > mem->remap_addr = dma_map_resource(i915->drm.dev,
> > > mem->region.start,
> > > mem->fake_mappable.size,
> > > -PCI_DMA_BIDIRECTIONAL,
> > > +DMA_BIDIRECTIONAL,
> > > DMA_ATTR_FORCE_CONTIGUOUS);
> > > if (dma_mapping_error(i915->drm.dev, mem->remap_addr)) {
> > > drm_mm_remove_node(&mem->fake_mappable);
> > > @@ -62,7 +62,7 @@ static void release_fake_lmem_bar(struct
> > > intel_memory_region *mem)
> > > dma_unmap_resource(mem->i915->drm.dev,
> > > mem->remap_addr,
> > > mem->fake_mappable.size,
> > > -PCI_DMA_BIDIRECTIONAL,
> > > +DMA_BIDIRECTIONAL,
> > > DMA_ATTR_FORCE_CONTIGUOUS);
> > > }
> > > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c
> > > b/drivers/gpu/drm/i915/gvt/gtt.c
> > > index e5c2fdfc20e3..53d0cb327539 100644
> > > --- a/drivers/gpu/drm/i915/gvt/gtt.c
> > > +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> > > @@ -745,7 +745,7 @@ static void ppgtt_free_spt(struct
> > > intel_vgpu_ppgtt_spt *spt)
> > > trace_spt_free(spt->vgpu->id, spt, spt->guest_page.type);
> > > dma_unmap_page(kdev, spt->shadow_page.mfn <<
> > > I915_GTT_PAGE_SHIFT, 4096,
> > > -PCI_DMA_BIDIRECTIONAL);
> > > +DMA_BIDIRECTIONAL);
> > > radix_tree_delete(&spt->vgpu->gtt.spt_tree,
> > > spt->shadow_page.mfn);
> > > @@ -849,7 +849,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt(
> > >*/
> > > spt->shadow_page.type = type;
> > > daddr = dma_map_page(kdev, spt->shadow_page.page,
> > > - 0, 4096, PCI_DMA_BIDIRECTIONAL);
> > > + 0, 4096, DMA_BIDIRECTIONAL);
> > > if (dma_mapping_error(kdev, daddr)) {
> > > gvt_vgpu_err("fail to map dma addr\n");
> > > ret = -EINVAL;
> > > @@ -865,7 +865,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt(
> > > return spt;
> > > err_unmap_dma:
> > > - dma_unmap_page(kdev, daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
> > > + dma_unmap_page(kdev, daddr, PAGE_SIZE, DMA_BIDIRECTIONAL);
> > > err_free_spt:
> > > free_spt(spt);
> > > return ERR_PTR(ret);
> > > @@ -2409,8 +2409,7 @@ static int alloc_scratch_pages(struct intel_vgpu
> > > *vgpu,
> > > return -ENOMEM;
> > > }
> > > - daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0,
> > > - 4096, PCI_DMA_BIDIRECTIONAL);
> > > + daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0, 4096,
> > > DMA_BIDIRECTIONAL);
> > > if (dma_mapping_error(dev, daddr)) {
> > > gvt_vgpu_err("fail to dmamap scratch_pt\n");
> > > __free_page(virt_to_page(scratch_pt));
> > > @@ -2461,7 +2460,7 @@ static int release_scratch_page_tree(struct
> > > intel_vgpu *vgpu)
> > > if (vgpu->gtt.scratch_pt[i].page != NULL) {
> > > daddr =
> > > (dma_addr_t)(vgpu->gtt.scratch_pt[i].page_mfn <<
> > > I915_GTT_PAGE_SHIFT);
> > > -
Re: [Intel-gfx] [bug report] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P
On Fri, Oct 01, 2021 at 05:20:17PM +0300, Ville Syrjälä wrote: > On Fri, Oct 01, 2021 at 04:25:35PM +0300, Dan Carpenter wrote: > > Hello Imre Deak, > > > > This is a semi-automatic email about new static checker warnings. > > > > The patch 3e0abc7661c8: "drm/i915/tc: Fix TypeC PHY > > connect/disconnect logic on ADL-P" from Sep 29, 2021, leads to the > > following Smatch complaint: > > > > drivers/gpu/drm/i915/display/intel_ddi.c:4028 > > intel_ddi_encoder_destroy() > > warn: variable dereferenced before check 'dig_port' (see line 4020) > > > > drivers/gpu/drm/i915/display/intel_ddi.c > > 4019 struct intel_digital_port *dig_port = > > enc_to_dig_port(to_intel_encoder(encoder)); > > 4020 enum phy phy = intel_port_to_phy(i915, > > dig_port->base.port); > >^^^ > > The patch adds a new unchecked dereference. > > > > 4021 > > 4022 intel_dp_encoder_flush_work(encoder); > > 4023 if (intel_phy_is_tc(i915, phy)) > > 4024 intel_tc_port_flush_work(dig_port); > > 4025 intel_display_power_flush_work(i915); > > 4026 > > 4027 drm_encoder_cleanup(encoder); > > 4028 if (dig_port) > > > > But the existing code checked for NULL. > > That check is nonsense. Feel free to nuke it. Thanks! Will do. regards, dan carpenter
Re: [Intel-gfx] [PULL] drm-intel-fixes
On Thu, Sep 30, 2021 at 11:50:20AM +0300, Jani Nikula wrote: > > Hi Dave & Daniel - > > drm-intel-fixes-2021-09-30: > drm/i915 fixes for v5.15-rc4: > - Fix GVT scheduler ww lock usage > - Fix pdfdocs documentation build > - Fix request early tracepoints > - Fix an invalid warning from rps worker > > BR, > Jani. > > The following changes since commit 5816b3e6577eaa676ceb00a848f0fd65fe2adc29: > > Linux 5.15-rc3 (2021-09-26 14:08:19 -0700) > > are available in the Git repository at: > > git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2021-09-30 > > for you to fetch changes up to 4b8bcaf8a6d6ab5db51e30865def5cb694eb2966: > > drm/i915: Remove warning from the rps worker (2021-09-27 12:46:40 +0300) Merged into drm-fixes, apologies for being a bit late, I was held up in a drm-misc-fixes chaos. -Daniel > > > drm/i915 fixes for v5.15-rc4: > - Fix GVT scheduler ww lock usage > - Fix pdfdocs documentation build > - Fix request early tracepoints > - Fix an invalid warning from rps worker > > > Akira Yokosawa (1): > drm/i915/guc, docs: Fix pdfdocs build error by removing nested grid > > Jani Nikula (1): > Merge tag 'gvt-fixes-2021-09-18' of https://github.com/intel/gvt-linux > into drm-intel-fixes > > Matthew Auld (1): > drm/i915/request: fix early tracepoints > > Tejas Upadhyay (1): > drm/i915: Remove warning from the rps worker > > Zhi A Wang (1): > drm/i915/gvt: fix the usage of ww lock in gvt scheduler. > > drivers/gpu/drm/i915/gt/intel_rps.c | 2 -- > drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h | 10 +- > drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h | 10 +- > drivers/gpu/drm/i915/gvt/scheduler.c| 4 ++-- > drivers/gpu/drm/i915/i915_request.c | 11 ++- > 5 files changed, 14 insertions(+), 23 deletions(-) > > -- > Jani Nikula, Intel Open Source Graphics Center -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch
[Intel-gfx] [PATCH v3 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
From: Sean Paul Hello again, Here is v3 of the patch series. Notable changes include incorporating review feedback involving: - Changed dt-bindings to introduce new compatible string - Code changes in msm driver as suggested by Stephen & Abhinav - Fixed issues found by 0-day Thank you to the reviewers for their feedback thus far! Please take a look, Sean Link: https://patchwork.freedesktop.org/series/94623/ #v1 Link: https://patchwork.freedesktop.org/series/94713/ #v2 Sean Paul (14): drm/hdcp: Add drm_hdcp_atomic_check() drm/hdcp: Avoid changing crtc state in hdcp atomic check drm/hdcp: Update property value on content type and user changes drm/hdcp: Expand HDCP helper library for enable/disable/check drm/i915/hdcp: Consolidate HDCP setup/state cache drm/i915/hdcp: Retain hdcp_capable return codes drm/i915/hdcp: Use HDCP helpers for i915 drm/msm/dpu_kms: Re-order dpu includes drm/msm/dpu: Remove useless checks in dpu_encoder drm/msm/dpu: Remove encoder->enable() hack drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules dt-bindings: msm/dp: Add bindings for HDCP registers arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller drm/msm: Implement HDCP 1.x using the new drm HDCP helpers .../bindings/display/msm/dp-controller.yaml | 34 +- arch/arm64/boot/dts/qcom/sc7180.dtsi |6 +- drivers/gpu/drm/drm_hdcp.c| 1197 - drivers/gpu/drm/i915/display/intel_atomic.c |7 +- drivers/gpu/drm/i915/display/intel_ddi.c | 29 +- .../drm/i915/display/intel_display_debugfs.c | 11 +- .../drm/i915/display/intel_display_types.h| 58 +- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 ++--- drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +- drivers/gpu/drm/i915/display/intel_hdcp.c | 1011 +++--- drivers/gpu/drm/i915/display/intel_hdcp.h | 36 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++-- drivers/gpu/drm/msm/Makefile |1 + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 30 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h |2 - drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h |4 - drivers/gpu/drm/msm/dp/dp_debug.c | 46 +- drivers/gpu/drm/msm/dp/dp_debug.h |6 +- drivers/gpu/drm/msm/dp/dp_display.c | 49 +- drivers/gpu/drm/msm/dp/dp_display.h |5 + drivers/gpu/drm/msm/dp/dp_drm.c | 68 +- drivers/gpu/drm/msm/dp/dp_drm.h |5 + drivers/gpu/drm/msm/dp/dp_hdcp.c | 445 ++ drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 + drivers/gpu/drm/msm/dp/dp_parser.c| 23 +- drivers/gpu/drm/msm/dp/dp_parser.h|4 + drivers/gpu/drm/msm/dp/dp_reg.h | 44 +- drivers/gpu/drm/msm/msm_atomic.c | 15 + include/drm/drm_hdcp.h| 194 +++ 30 files changed, 2600 insertions(+), 1392 deletions(-) create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h -- Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 01/14] drm/hdcp: Add drm_hdcp_atomic_check()
From: Sean Paul
This patch moves the hdcp atomic check from i915 to drm_hdcp so other
drivers can use it. No functional changes, just cleaned up some of the
code when moving it over.
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-2-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-2-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-None
---
drivers/gpu/drm/drm_hdcp.c | 71 -
drivers/gpu/drm/i915/display/intel_atomic.c | 4 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 47 --
drivers/gpu/drm/i915/display/intel_hdcp.h | 3 -
include/drm/drm_hdcp.h | 3 +
5 files changed, 75 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index ca9b8f697202..522326b03e66 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -13,13 +13,14 @@
#include
#include
+#include
+#include
#include
#include
#include
#include
#include
#include
-#include
#include "drm_internal.h"
@@ -421,3 +422,71 @@ void drm_hdcp_update_content_protection(struct
drm_connector *connector,
dev->mode_config.content_protection_property);
}
EXPORT_SYMBOL(drm_hdcp_update_content_protection);
+
+/**
+ * drm_hdcp_atomic_check - Helper for drivers to call during
connector->atomic_check
+ *
+ * @state: pointer to the atomic state being checked
+ * @connector: drm_connector on which content protection state needs an update
+ *
+ * This function can be used by display drivers to perform an atomic check on
the
+ * hdcp state elements. If hdcp state has changed, this function will set
+ * mode_changed on the crtc driving the connector so it can update its hardware
+ * to match the hdcp state.
+ */
+void drm_hdcp_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *new_conn_state, *old_conn_state;
+ struct drm_crtc_state *new_crtc_state;
+ u64 old_hdcp, new_hdcp;
+
+ old_conn_state = drm_atomic_get_old_connector_state(state, connector);
+ old_hdcp = old_conn_state->content_protection;
+
+ new_conn_state = drm_atomic_get_new_connector_state(state, connector);
+ new_hdcp = new_conn_state->content_protection;
+
+ if (!new_conn_state->crtc) {
+ /*
+* If the connector is being disabled with CP enabled, mark it
+* desired so it's re-enabled when the connector is brought back
+*/
+ if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return;
+ }
+
+ new_crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_conn_state->crtc);
+ /*
+ * Fix the HDCP uapi content protection state in case of modeset.
+ * FIXME: As per HDCP content protection property uapi doc, an uevent()
+ * need to be sent if there is transition from ENABLED->DESIRED.
+ */
+ if (drm_atomic_crtc_needs_modeset(new_crtc_state) &&
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
+new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+
+ /*
+* Nothing to do if content type is unchanged and one of:
+* - state didn't change
+* - HDCP was activated since the last commit
+* - attempting to set to desired while already enabled
+*/
+ if (old_hdcp == new_hdcp ||
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) ||
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
+new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
+ if (old_conn_state->hdcp_content_type ==
+ new_conn_state->hdcp_content_type)
+ return;
+ }
+
+ new_crtc_state->mode_changed = true;
+}
+EXPORT_SYMBOL(drm_hdcp_atomic_check);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index b4e7ac51aa31..1e306e8427ec 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -32,13 +32,13 @@
#include
#include
#include
+#include
#include
#include "intel_atomic.h"
#include "intel_cdclk.h"
#include "intel_display_types.h"
#include "intel_global_state.h"
-#include "intel_hdcp.h"
#include "intel_psr.h"
#include "skl_universal_plane.h"
@@ -122,7 +122,7 @@ int intel_digital_connector_atomic_check(s
[Intel-gfx] [PATCH v3 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check
From: Sean Paul
Instead of forcing a modeset in the hdcp atomic check, simply return
true if the content protection value is changing and let the driver
decide whether a modeset is required or not.
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-3-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-3-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-None
---
drivers/gpu/drm/drm_hdcp.c | 33 +++--
drivers/gpu/drm/i915/display/intel_atomic.c | 5 ++--
include/drm/drm_hdcp.h | 2 +-
3 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index 522326b03e66..dd8fa91c51d6 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -430,11 +430,14 @@ EXPORT_SYMBOL(drm_hdcp_update_content_protection);
* @connector: drm_connector on which content protection state needs an update
*
* This function can be used by display drivers to perform an atomic check on
the
- * hdcp state elements. If hdcp state has changed, this function will set
- * mode_changed on the crtc driving the connector so it can update its hardware
- * to match the hdcp state.
+ * hdcp state elements. If hdcp state has changed in a manner which requires
the
+ * driver to enable or disable content protection, this function will return
+ * true.
+ *
+ * Returns:
+ * true if the driver must enable/disable hdcp, false otherwise
*/
-void drm_hdcp_atomic_check(struct drm_connector *connector,
+bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct drm_connector_state *new_conn_state, *old_conn_state;
@@ -452,10 +455,12 @@ void drm_hdcp_atomic_check(struct drm_connector
*connector,
* If the connector is being disabled with CP enabled, mark it
* desired so it's re-enabled when the connector is brought back
*/
- if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
new_conn_state->content_protection =
DRM_MODE_CONTENT_PROTECTION_DESIRED;
- return;
+ return true;
+ }
+ return false;
}
new_crtc_state = drm_atomic_get_new_crtc_state(state,
@@ -467,9 +472,19 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
*/
if (drm_atomic_crtc_needs_modeset(new_crtc_state) &&
(old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
-new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) {
new_conn_state->content_protection =
DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return true;
+ }
+
+ /*
+* Coming back from disable or changing CRTC with DESIRED state requires
+* that the driver try CP enable.
+*/
+ if (new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ new_conn_state->crtc != old_conn_state->crtc)
+ return true;
/*
* Nothing to do if content type is unchanged and one of:
@@ -484,9 +499,9 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
if (old_conn_state->hdcp_content_type ==
new_conn_state->hdcp_content_type)
- return;
+ return false;
}
- new_crtc_state->mode_changed = true;
+ return true;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 1e306e8427ec..c7b5470c40aa 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -122,8 +122,6 @@ int intel_digital_connector_atomic_check(struct
drm_connector *conn,
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
- drm_hdcp_atomic_check(conn, state);
-
if (!new_state->crtc)
return 0;
@@ -139,7 +137,8 @@ int intel_digital_connector_atomic_check(struct
drm_connector *conn,
new_conn_state->base.picture_aspect_ratio !=
old_conn_state->base.picture_aspect_ratio ||
new_conn_state->base.content_type !=
old_conn_state->base.content_type ||
new_conn_state->base.scaling_mode !=
old_conn_state->base.scaling_mode ||
- !drm_connector_atomic_hdr_metadata_equal(old_state, new_state))
+ !drm_connector_atomic_hdr_metadata_equal(old_state, new_state) ||
+ drm_hdcp_atomic_check(conn, state
[Intel-gfx] [PATCH v3 03/14] drm/hdcp: Update property value on content type and user changes
From: Sean Paul
This patch updates the connector's property value in 2 cases which were
previously missed:
1- Content type changes. The value should revert back to DESIRED from
ENABLED in case the driver must re-authenticate the link due to the
new content type.
2- Userspace sets value to DESIRED while ENABLED. In this case, the
value should be reset immediately to ENABLED since the link is
actively being encrypted.
To accommodate these changes, I've split up the conditionals to make
things a bit more clear (as much as one can with this mess of state).
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-4-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-4-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-Fixed indentation issue identified by 0-day
---
drivers/gpu/drm/drm_hdcp.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index dd8fa91c51d6..8c851d40cd45 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -487,21 +487,29 @@ bool drm_hdcp_atomic_check(struct drm_connector
*connector,
return true;
/*
-* Nothing to do if content type is unchanged and one of:
-* - state didn't change
+* Content type changes require an HDCP disable/enable cycle.
+*/
+ if (new_conn_state->hdcp_content_type !=
old_conn_state->hdcp_content_type) {
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return true;
+ }
+
+ /*
+* Ignore meaningless state changes:
* - HDCP was activated since the last commit
-* - attempting to set to desired while already enabled
+* - Attempting to set to desired while already enabled
*/
- if (old_hdcp == new_hdcp ||
- (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ if ((old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) ||
(old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
- if (old_conn_state->hdcp_content_type ==
- new_conn_state->hdcp_content_type)
- return false;
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_ENABLED;
+ return false;
}
- return true;
+ /* Finally, if state changes, we need action */
+ return old_hdcp != new_hdcp;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check
From: Sean Paul
This patch expands upon the HDCP helper library to manage HDCP
enable, disable, and check.
Previous to this patch, the majority of the state management and sink
interaction is tucked inside the Intel driver with the understanding
that once a new platform supported HDCP we could make good decisions
about what should be centralized. With the addition of HDCP support
for Qualcomm, it's time to migrate the protocol-specific bits of HDCP
authentication, key exchange, and link checks to the HDCP helper.
In terms of functionality, this migration is 1:1 with the Intel driver,
however things are laid out a bit differently than with intel_hdcp.c,
which is why this is a separate patch from the i915 transition to the
helper. On i915, the "shim" vtable is used to account for HDMI vs. DP
vs. DP-MST differences whereas the helper library uses a LUT to
account for the register offsets and a remote read function to route
the messages. On i915, storing the sink information in the source is
done inline whereas now we use the new drm_hdcp_helper_funcs vtable
to store and fetch information to/from source hw. Finally, instead of
calling enable/disable directly from the driver, we'll leave that
decision to the helper and by calling drm_hdcp_helper_atomic_commit()
from the driver. All told, this will centralize the protocol and state
handling in the helper, ensuring we collect all of our bugs^Wlogic
in one place.
Cc: Abhinav Kumar
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-5-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-5-s...@poorly.run
#v2
Changes in v2:
-Fixed set-but-unused variable identified by 0-day
Changes in v3:
-Fixed uninitialized variable warning identified by 0-day
---
drivers/gpu/drm/drm_hdcp.c | 1103
include/drm/drm_hdcp.h | 191 +++
2 files changed, 1294 insertions(+)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index 8c851d40cd45..2bfa07fc3fbc 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -6,15 +6,20 @@
* Ramalingam C
*/
+#include
#include
#include
#include
+#include
+#include
#include
#include
#include
+#include
#include
#include
+#include
#include
#include
#include
@@ -513,3 +518,1101 @@ bool drm_hdcp_atomic_check(struct drm_connector
*connector,
return old_hdcp != new_hdcp;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
+
+struct drm_hdcp_helper_data {
+ struct mutex mutex;
+ struct mutex *driver_mutex;
+
+ struct drm_connector *connector;
+ const struct drm_hdcp_helper_funcs *funcs;
+
+ u64 value;
+ unsigned int enabled_type;
+
+ struct delayed_work check_work;
+ struct work_struct prop_work;
+
+ struct drm_dp_aux *aux;
+ const struct drm_hdcp_hdcp1_receiver_reg_lut *hdcp1_lut;
+};
+
+struct drm_hdcp_hdcp1_receiver_reg_lut {
+ unsigned int bksv;
+ unsigned int ri;
+ unsigned int aksv;
+ unsigned int an;
+ unsigned int ainfo;
+ unsigned int v[5];
+ unsigned int bcaps;
+ unsigned int bcaps_mask_repeater_present;
+ unsigned int bstatus;
+};
+
+static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_ddc_lut = {
+ .bksv = DRM_HDCP_DDC_BKSV,
+ .ri = DRM_HDCP_DDC_RI_PRIME,
+ .aksv = DRM_HDCP_DDC_AKSV,
+ .an = DRM_HDCP_DDC_AN,
+ .ainfo = DRM_HDCP_DDC_AINFO,
+ .v = { DRM_HDCP_DDC_V_PRIME(0), DRM_HDCP_DDC_V_PRIME(1),
+ DRM_HDCP_DDC_V_PRIME(2), DRM_HDCP_DDC_V_PRIME(3),
+ DRM_HDCP_DDC_V_PRIME(4) },
+ .bcaps = DRM_HDCP_DDC_BCAPS,
+ .bcaps_mask_repeater_present = DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT,
+ .bstatus = DRM_HDCP_DDC_BSTATUS,
+};
+
+static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_dpcd_lut = {
+ .bksv = DP_AUX_HDCP_BKSV,
+ .ri = DP_AUX_HDCP_RI_PRIME,
+ .aksv = DP_AUX_HDCP_AKSV,
+ .an = DP_AUX_HDCP_AN,
+ .ainfo = DP_AUX_HDCP_AINFO,
+ .v = { DP_AUX_HDCP_V_PRIME(0), DP_AUX_HDCP_V_PRIME(1),
+ DP_AUX_HDCP_V_PRIME(2), DP_AUX_HDCP_V_PRIME(3),
+ DP_AUX_HDCP_V_PRIME(4) },
+ .bcaps = DP_AUX_HDCP_BCAPS,
+ .bcaps_mask_repeater_present = DP_BCAPS_REPEATER_PRESENT,
+
+ /*
+* For some reason the HDMI and DP HDCP specs call this register
+* definition by different names. In the HDMI spec, it's called BSTATUS,
+* but in DP it's called BINFO.
+*/
+ .bstatus = DP_AUX_HDCP_BINFO,
+};
+
+static int drm_hdcp_remote_ddc_read(struct i2c_adapter *i2c,
+ unsigned int offset, u8 *value, size_t len)
+{
+ int ret;
+ u8 start = offset & 0xff;
+ struct i2c_msg msgs[] = {
+ {
+ .addr = DRM_HDCP_DDC_ADDR,
+ .flags =
[Intel-gfx] [PATCH v3 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache
From: Sean Paul
Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-6-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-6-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-None
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++
1 file changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index feebafead046..af166baf8c71 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2167,6 +2167,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum
transcoder cpu_transcoder)
}
}
+static int
+_intel_hdcp_setup(struct intel_connector *connector,
+ const struct intel_crtc_state *pipe_config, u8 content_type)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_digital_port *dig_port =
intel_attached_dig_port(connector);
+ struct intel_hdcp *hdcp = &connector->hdcp;
+ int ret = 0;
+
+ if (!connector->encoder) {
+ drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
+ connector->base.name, connector->base.base.id);
+ return -ENODEV;
+ }
+
+ hdcp->content_type = content_type;
+
+ if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
+ hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
+ hdcp->stream_transcoder = pipe_config->cpu_transcoder;
+ } else {
+ hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
+ hdcp->stream_transcoder = INVALID_TRANSCODER;
+ }
+
+ if (DISPLAY_VER(dev_priv) >= 12)
+ dig_port->hdcp_port_data.fw_tc =
intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+
+ return ret;
+}
+
static int initialize_hdcp_port_data(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *shim)
@@ -2306,28 +2337,14 @@ int intel_hdcp_enable(struct intel_connector *connector,
if (!hdcp->shim)
return -ENOENT;
- if (!connector->encoder) {
- drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
- connector->base.name, connector->base.base.id);
- return -ENODEV;
- }
-
mutex_lock(&hdcp->mutex);
mutex_lock(&dig_port->hdcp_mutex);
drm_WARN_ON(&dev_priv->drm,
hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
- hdcp->content_type = content_type;
-
- if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
- hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
- hdcp->stream_transcoder = pipe_config->cpu_transcoder;
- } else {
- hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
- hdcp->stream_transcoder = INVALID_TRANSCODER;
- }
- if (DISPLAY_VER(dev_priv) >= 12)
- dig_port->hdcp_port_data.fw_tc =
intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+ ret = _intel_hdcp_setup(connector, pipe_config, content_type);
+ if (ret)
+ goto out;
/*
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2355,6 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
true);
}
+out:
mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 06/14] drm/i915/hdcp: Retain hdcp_capable return codes
From: Sean Paul
The shim functions return error codes, but they are discarded in
intel_hdcp.c. This patch plumbs the return codes through so they are
properly handled.
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-7-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-7-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-None
---
.../drm/i915/display/intel_display_debugfs.c | 9 +++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 51 ++-
drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +-
3 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 309d74fd86ce..88e71aeb88a2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -644,6 +644,7 @@ static void intel_panel_info(struct seq_file *m, struct
intel_panel *panel)
static void intel_hdcp_info(struct seq_file *m,
struct intel_connector *intel_connector)
{
+ int ret;
bool hdcp_cap, hdcp2_cap;
if (!intel_connector->hdcp.shim) {
@@ -651,8 +652,12 @@ static void intel_hdcp_info(struct seq_file *m,
goto out;
}
- hdcp_cap = intel_hdcp_capable(intel_connector);
- hdcp2_cap = intel_hdcp2_capable(intel_connector);
+ ret = intel_hdcp_capable(intel_connector, &hdcp_cap);
+ if (ret)
+ hdcp_cap = false;
+ ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap);
+ if (ret)
+ hdcp2_cap = false;
if (hdcp_cap)
seq_puts(m, "HDCP1.4 ");
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index af166baf8c71..59275919e7b9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -153,50 +153,49 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port
*dig_port,
}
/* Is HDCP1.4 capable on Platform and Sink */
-bool intel_hdcp_capable(struct intel_connector *connector)
+int intel_hdcp_capable(struct intel_connector *connector, bool *capable)
{
struct intel_digital_port *dig_port =
intel_attached_dig_port(connector);
const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- bool capable = false;
u8 bksv[5];
+ *capable = false;
+
if (!shim)
- return capable;
+ return 0;
- if (shim->hdcp_capable) {
- shim->hdcp_capable(dig_port, &capable);
- } else {
- if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
- capable = true;
- }
+ if (shim->hdcp_capable)
+ return shim->hdcp_capable(dig_port, capable);
+
+ if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
+ *capable = true;
- return capable;
+ return 0;
}
/* Is HDCP2.2 capable on Platform and Sink */
-bool intel_hdcp2_capable(struct intel_connector *connector)
+int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
{
struct intel_digital_port *dig_port =
intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
- bool capable = false;
+
+ *capable = false;
/* I915 support for HDCP2.2 */
if (!hdcp->hdcp2_supported)
- return false;
+ return 0;
/* MEI interface is solid */
mutex_lock(&dev_priv->hdcp_comp_mutex);
if (!dev_priv->hdcp_comp_added || !dev_priv->hdcp_master) {
mutex_unlock(&dev_priv->hdcp_comp_mutex);
- return false;
+ return 0;
}
mutex_unlock(&dev_priv->hdcp_comp_mutex);
/* Sink's capability for HDCP2.2 */
- hdcp->shim->hdcp_2_2_capable(dig_port, &capable);
-
- return capable;
+ return hdcp->shim->hdcp_2_2_capable(dig_port, capable);
}
static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
@@ -2332,6 +2331,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
struct intel_digital_port *dig_port =
intel_attached_dig_port(connector);
struct intel_hdcp *hdcp = &connector->hdcp;
unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ bool capable;
int ret = -EINVAL;
if (!hdcp->shim)
@@ -2350,21 +2350,27 @@ int intel_hdcp_enable(struct intel_connector *connector,
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
* is capable of HDCP2.2, it is preferred to use HDCP2.2.
*/
- if (intel_hdcp2_capable(connector)) {
+ ret = intel_hdcp2_capable(connector, &capable);
+ if (capable
[Intel-gfx] [PATCH v3 07/14] drm/i915/hdcp: Use HDCP helpers for i915
From: Sean Paul
Now that all of the HDCP 1.x logic has been migrated to the central HDCP
helpers, use it in the i915 driver.
The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
however there are a few helper hooks which are connector-specific and
need to be partially or fully implemented in the intel_dp_hdcp.c or
intel_hdmi.c.
We'll leave most of the HDCP 2.x code alone since we don't have another
implementation of HDCP 2.x to use as reference for what should and
should not live in the drm helpers. The helper will call the overly
general enable/disable/is_capable HDCP 2.x callbacks and leave the
interesting stuff for the driver. Once we have another HDCP 2.x
implementation, we should do a similar migration.
Acked-by: Jani Nikula
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-8-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-8-s...@poorly.run
#v2
Changes in v2:
-Fix mst helper function pointer reported by 0-day
Changes in v3:
-Add forward declaration for drm_atomic_state in intel_hdcp.h identified
by 0-day
---
drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-
.../drm/i915/display/intel_display_debugfs.c | 6 +-
.../drm/i915/display/intel_display_types.h| 58 +-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 +++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 935 +++---
drivers/gpu/drm/i915/display/intel_hdcp.h | 31 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++---
8 files changed, 418 insertions(+), 1259 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 51cd0420e00e..446544c75aa8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -26,6 +26,7 @@
*/
#include
+#include
#include "i915_drv.h"
#include "intel_audio.h"
@@ -3143,6 +3144,9 @@ static void intel_enable_ddi(struct intel_atomic_state
*state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_connector *connector =
to_intel_connector(conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
if (!crtc_state->bigjoiner_slave)
@@ -3159,12 +3163,10 @@ static void intel_enable_ddi(struct intel_atomic_state
*state,
else
intel_enable_ddi_dp(state, encoder, crtc_state, conn_state);
- /* Enable hdcp if it's desired */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED)
- intel_hdcp_enable(to_intel_connector(conn_state->connector),
- crtc_state,
- (u8)conn_state->hdcp_content_type);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static void intel_disable_ddi_dp(struct intel_atomic_state *state,
@@ -3224,7 +3226,13 @@ static void intel_disable_ddi(struct intel_atomic_state
*state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
+ struct intel_connector *connector =
to_intel_connector(old_conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
intel_disable_ddi_hdmi(state, encoder, old_crtc_state,
@@ -3254,13 +3262,18 @@ void intel_ddi_update_pipe(struct intel_atomic_state
*state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_connector *connector =
to_intel_connector(conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
!intel_encoder_is_mst(encoder))
intel_ddi_update_pipe_dp(state, encoder, crtc_state,
conn_state);
- intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector
[Intel-gfx] [PATCH v3 08/14] drm/msm/dpu_kms: Re-order dpu includes
From: Sean Paul Make includes alphabetical in dpu_kms.c Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-9-s...@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-9-s...@poorly.run #v2 Changes in v2: -None Changes in v3: -None --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index ae48f41821cf..fb0d9f781c66 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -21,14 +21,14 @@ #include "msm_gem.h" #include "disp/msm_disp_snapshot.h" -#include "dpu_kms.h" #include "dpu_core_irq.h" +#include "dpu_crtc.h" +#include "dpu_encoder.h" #include "dpu_formats.h" #include "dpu_hw_vbif.h" -#include "dpu_vbif.h" -#include "dpu_encoder.h" +#include "dpu_kms.h" #include "dpu_plane.h" -#include "dpu_crtc.h" +#include "dpu_vbif.h" #define CREATE_TRACE_POINTS #include "dpu_trace.h" -- Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder
From: Sean Paul
A couple more useless checks to remove in dpu_encoder.
Reviewed-by: Stephen Boyd
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-10-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-10-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 0e9d3fa1544b..984f8a59cb73 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1153,10 +1153,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder
*drm_enc)
struct msm_drm_private *priv;
struct drm_display_mode *cur_mode = NULL;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- }
dpu_enc = to_dpu_encoder_virt(drm_enc);
mutex_lock(&dpu_enc->enc_lock);
@@ -1203,14 +1199,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder
*drm_enc)
struct msm_drm_private *priv;
int i = 0;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- } else if (!drm_enc->dev) {
- DPU_ERROR("invalid dev\n");
- return;
- }
-
dpu_enc = to_dpu_encoder_virt(drm_enc);
DPU_DEBUG_ENC(dpu_enc, "\n");
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 10/14] drm/msm/dpu: Remove encoder->enable() hack
From: Sean Paul
encoder->commit() was being misused because there were some global
resources which needed to be tweaked in encoder->enable() which were not
accessible in dpu_encoder.c. That is no longer true and the redirect
serves no purpose any longer. So remove the indirection.
Reviewed-by: Stephen Boyd
Tested-by: Stephen Boyd
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-11-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-11-s...@poorly.run
#v2
Changes in v2:
-None
Changes in v3:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4
4 files changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 984f8a59cb73..ddc542a0d41f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2122,11 +2122,8 @@ static void dpu_encoder_frame_done_timeout(struct
timer_list *t)
static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = {
.mode_set = dpu_encoder_virt_mode_set,
.disable = dpu_encoder_virt_disable,
- .enable = dpu_kms_encoder_enable,
+ .enable = dpu_encoder_virt_enable,
.atomic_check = dpu_encoder_virt_atomic_check,
-
- /* This is called by dpu_kms_encoder_enable */
- .commit = dpu_encoder_virt_enable,
};
static const struct drm_encoder_funcs dpu_encoder_funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index fb0d9f781c66..4a0b55d145ad 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -381,28 +381,6 @@ static void dpu_kms_flush_commit(struct msm_kms *kms,
unsigned crtc_mask)
}
}
-/*
- * Override the encoder enable since we need to setup the inline rotator and do
- * some crtc magic before enabling any bridge that might be present.
- */
-void dpu_kms_encoder_enable(struct drm_encoder *encoder)
-{
- const struct drm_encoder_helper_funcs *funcs = encoder->helper_private;
- struct drm_device *dev = encoder->dev;
- struct drm_crtc *crtc;
-
- /* Forward this enable call to the commit hook */
- if (funcs && funcs->commit)
- funcs->commit(encoder);
-
- drm_for_each_crtc(crtc, dev) {
- if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder)))
- continue;
-
- trace_dpu_kms_enc_enable(DRMID(crtc));
- }
-}
-
static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
{
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 323a6bce9e64..f1ebb60dacab 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -248,8 +248,6 @@ void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms);
int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
-void dpu_kms_encoder_enable(struct drm_encoder *encoder);
-
/**
* dpu_kms_get_clk_rate() - get the clock rate
* @dpu_kms: pointer to dpu_kms structure
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 37bba57675a8..54d74341e690 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -266,10 +266,6 @@ DEFINE_EVENT(dpu_drm_obj_template,
dpu_crtc_complete_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
);
-DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
- TP_PROTO(uint32_t drm_id),
- TP_ARGS(drm_id)
-);
DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
From: Sean Paul
Audio is initialized last, it should be de-initialized first to match
the order in dp_init_sub_modules().
Reviewed-by: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-12-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-12-s...@poorly.run
#v2
Changes in v2:
-None
---
drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index fbe4c2cd52a3..19946024e235 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -714,9 +714,9 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp,
u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
- dp_audio_put(dp->audio);
}
static int dp_init_sub_modules(struct dp_display_private *dp)
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
From: Sean Paul
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring
Cc: Stephen Boyd
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-s...@poorly.run
#v2
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
---
Disclaimer: I really don't know if this is the right way to approach
this. I tried using examples from other bindings, but feedback would be
very much welcome on how I could add the optional register ranges.
.../bindings/display/msm/dp-controller.yaml | 34 ---
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 64d8d9e5e47a..a176f97b2f4c 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -17,9 +17,10 @@ properties:
compatible:
enum:
- qcom,sc7180-dp
+ - qcom,sc7180-dp-hdcp
- reg:
-maxItems: 1
+ # See compatible-specific constraints below.
+ reg: true
interrupts:
maxItems: 1
@@ -89,6 +90,29 @@ required:
- power-domains
- ports
+allOf:
+ - if:
+ properties:
+compatible:
+ contains:
+const: qcom,sc7180-dp-hdcp
+then:
+ properties:
+reg:
+ minItems: 3
+ maxItems: 3
+ items:
+- description: Registers for base DP functionality
+- description: (Optional) Registers for HDCP device key injection
+- description: (Optional) Registers for HDCP TrustZone interaction
+else:
+ properties:
+reg:
+ minItems: 1
+ maxItems: 1
+ items:
+- description: Registers for base DP functionality
+
additionalProperties: false
examples:
@@ -99,8 +123,10 @@ examples:
#include
displayport-controller@ae9 {
-compatible = "qcom,sc7180-dp";
-reg = <0xae9 0x1400>;
+compatible = "qcom,sc7180-dp-hdcp";
+reg = <0 0x0ae9 0 0x1400>,
+ <0 0x0aed1000 0 0x174>,
+ <0 0x0aee1000 0 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
From: Sean Paul
This patch adds the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller. Now that these are supported, change the
compatible string to "dp-hdcp".
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-s...@poorly.run
#v2
Changes in v3:
-Split off into a new patch containing just the dts change (Stephen)
-Add hdcp compatible string (Stephen)
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index c8921e2d6480..f2d7f3c95c1f 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3085,10 +3085,12 @@ dsi_phy: dsi-phy@ae94400 {
};
mdss_dp: displayport-controller@ae9 {
- compatible = "qcom,sc7180-dp";
+ compatible = "qcom,sc7180-dp-hdcp";
status = "disabled";
- reg = <0 0x0ae9 0 0x1400>;
+ reg = <0 0x0ae9 0 0x1400>,
+ <0 0x0aed1000 0 0x174>,
+ <0 0x0aee1000 0 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
Sean Paul, Software Engineer, Google / Chromium OS
[Intel-gfx] [PATCH v3 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
From: Sean Paul
This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
helpers.
Cc: Stephen Boyd
Cc: Abhinav Kumar
Signed-off-by: Sean Paul
Link:
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-s...@poorly.run
#v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-s...@poorly.run
#v2
Changes in v2:
-Squash [1] into this patch with the following changes (Stephen)
-Update the sc7180 dtsi file
-Remove resource names and just use index (Stephen)
Changes in v3:
-Split out the dtsi change from v2 (Stephen)
-Fix set-but-unused warning identified by 0-day
-Fix up a couple of style nits (Stephen)
-Store HDCP key directly in dp_hdcp struct (Stephen)
-Remove wmb in HDCP key initialization, move an_seed (Stephen)
-Use FIELD_PREP for bstatus/bcaps (Stephen)
-#define read_poll_timeout values (Stephen)
-Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
-Add compatible string for hdcp (Stephen)
-Rename dp_hdcp_write_* functions (Abhinav)
-Add 1us delay between An reads (Abhinav)
-Delete unused dp_hdcp_read_* functions
[1]
https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-s...@poorly.run
---
drivers/gpu/drm/msm/Makefile| 1 +
drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
drivers/gpu/drm/msm/dp/dp_display.c | 47 ++-
drivers/gpu/drm/msm/dp/dp_display.h | 5 +
drivers/gpu/drm/msm/dp/dp_drm.c | 68 -
drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
drivers/gpu/drm/msm/dp/dp_hdcp.c| 445
drivers/gpu/drm/msm/dp/dp_hdcp.h| 27 ++
drivers/gpu/drm/msm/dp/dp_parser.c | 23 +-
drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
drivers/gpu/drm/msm/dp/dp_reg.h | 44 ++-
drivers/gpu/drm/msm/msm_atomic.c| 15 +
13 files changed, 717 insertions(+), 19 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 904535eda0c4..98731fd262d6 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -109,6 +109,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
dp/dp_ctrl.o \
dp/dp_display.o \
dp/dp_drm.o \
+ dp/dp_hdcp.o \
dp/dp_hpd.o \
dp/dp_link.o \
dp/dp_panel.o \
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c
b/drivers/gpu/drm/msm/dp/dp_debug.c
index 2f6247e80e9d..25dc55b5f083 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.c
+++ b/drivers/gpu/drm/msm/dp/dp_debug.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include "dp_parser.h"
#include "dp_catalog.h"
@@ -15,6 +16,7 @@
#include "dp_ctrl.h"
#include "dp_debug.h"
#include "dp_display.h"
+#include "dp_hdcp.h"
#define DEBUG_NAME "msm_dp"
@@ -24,6 +26,7 @@ struct dp_debug_private {
struct dp_usbpd *usbpd;
struct dp_link *link;
struct dp_panel *panel;
+ struct dp_hdcp *hdcp;
struct drm_connector **connector;
struct device *dev;
struct drm_device *drm_dev;
@@ -349,6 +352,35 @@ static int dp_test_active_open(struct inode *inode,
inode->i_private);
}
+static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
+size_t len, loff_t *offp)
+{
+ char *input_buffer;
+ int ret;
+ struct dp_debug_private *debug = file->private_data;
+
+ if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
+ return -EINVAL;
+
+ if (!debug->hdcp)
+ return -ENOENT;
+
+ input_buffer = memdup_user_nul(ubuf, len);
+ if (IS_ERR(input_buffer))
+ return PTR_ERR(input_buffer);
+
+ ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
+
+ kfree(input_buffer);
+ if (ret < 0) {
+ DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
+ return ret;
+ }
+
+ *offp += len;
+ return len;
+}
+
static const struct file_operations dp_debug_fops = {
.open = simple_open,
.read = dp_debug_read_info,
@@ -363,6 +395,12 @@ static const struct file_operations test_active_fops = {
.write = dp_test_active_write
};
+static const struct file_operations dp_hdcp_key_fops = {
+ .owner = THIS_MODULE,
+ .open = simple_open,
+ .write = dp_hdcp_key_write,
+};
+
static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
{
int rc = 0;
@@ -384,6 +422,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct
drm_minor *minor)
minor->debugfs_root,
debug, &dp_test_type_fops);
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
+ debug, &dp_hdcp_key_fops);
+
debug->root = minor->debugfs_root;
return rc;
Re: [Intel-gfx] [PATCH] drm/i915/dg2: update link training for 128b/132b
On Fri, Oct 01, 2021 at 01:02:47PM +0300, Jani Nikula wrote:
> The 128b/132b channel coding link training uses more straightforward TX
> FFE preset values.
>
> v2: Fix UHBR rate checks, use intel_dp_is_uhbr() helper
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++-
> .../drm/i915/display/intel_dp_link_training.c | 86 +--
> 2 files changed, 70 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 51cd0420e00e..341fda4055ed 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1398,11 +1398,16 @@ static int translate_signal_level(struct intel_dp
> *intel_dp,
> static int intel_ddi_dp_level(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state)
> {
> - u8 train_set = intel_dp->train_set[0];
> - u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
> - DP_TRAIN_PRE_EMPHASIS_MASK);
> + if (intel_dp_is_uhbr(crtc_state)) {
> + /* FIXME: We'll want independent presets for each lane. */
> + return intel_dp->train_set[0] & DP_TX_FFE_PRESET_VALUE_MASK;
> + } else {
> + u8 train_set = intel_dp->train_set[0];
> + u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
> + DP_TRAIN_PRE_EMPHASIS_MASK);
>
> - return translate_signal_level(intel_dp, signal_levels);
> + return translate_signal_level(intel_dp, signal_levels);
> + }
> }
>
> static void
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 053ed9302cda..1dda3d31394e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -301,6 +301,24 @@ static u8 intel_dp_phy_preemph_max(struct intel_dp
> *intel_dp,
> return preemph_max;
> }
>
> +static void intel_dp_128b132b_adjust_train(struct intel_dp *intel_dp,
> +const struct intel_crtc_state
> *crtc_state,
> +const u8
> link_status[DP_LINK_STATUS_SIZE])
> +{
> + int lane;
> + u8 tx_ffe = 0;
> +
> + /*
> + * FIXME: We'll want independent presets for each lane. See also
> + * intel_ddi_dp_level() and intel_snps_phy_ddi_vswing_sequence().
> + */
Wait a few patches [1] and we can avoid the FIXMEs ;)
[1] https://patchwork.freedesktop.org/series/95122/
> + for (lane = 0; lane < crtc_state->lane_count; lane++)
> + tx_ffe = max(tx_ffe,
> drm_dp_get_adjust_tx_ffe_preset(link_status, lane));
> +
> + for (lane = 0; lane < crtc_state->lane_count; lane++)
> + intel_dp->train_set[lane] = tx_ffe;
> +}
> +
> void
> intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state,
> @@ -313,6 +331,11 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> u8 voltage_max;
> u8 preemph_max;
>
> + if (intel_dp_is_uhbr(crtc_state)) {
> + intel_dp_128b132b_adjust_train(intel_dp, crtc_state,
> link_status);
> + return;
> + }
> +
> for (lane = 0; lane < crtc_state->lane_count; lane++) {
> v = max(v, drm_dp_get_adjust_request_voltage(link_status,
> lane));
> p = max(p, drm_dp_get_adjust_request_pre_emphasis(link_status,
> lane));
> @@ -402,14 +425,21 @@ void intel_dp_set_signal_levels(struct intel_dp
> *intel_dp,
> u8 train_set = intel_dp->train_set[0];
> char phy_name[10];
>
> - drm_dbg_kms(&dev_priv->drm, "Using vswing level %d%s, pre-emphasis
> level %d%s, at %s\n",
> - train_set & DP_TRAIN_VOLTAGE_SWING_MASK,
> - train_set & DP_TRAIN_MAX_SWING_REACHED ? " (max)" : "",
> - (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) >>
> - DP_TRAIN_PRE_EMPHASIS_SHIFT,
> - train_set & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ?
> - " (max)" : "",
> - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)));
> + if (intel_dp_is_uhbr(crtc_state)) {
> + /* FIXME: We'll want independent presets for each lane. */
> + drm_dbg_kms(&dev_priv->drm, "%s: Using 128b/132b TX FFE preset
> %u\n",
> + intel_dp_phy_name(dp_phy, phy_name,
> sizeof(phy_name)),
> + train_set & DP_TX_FFE_PRESET_VALUE_MASK);
> + } else {
> + drm_dbg_kms(&dev_priv->drm, "%s: Using 8b/10b vswing level
> %d%s, pre-emphasis level %d%s\n",
> + intel_dp_phy_name(dp_phy, phy_name,
> sizeof(phy_name)),
> + train_set & DP_TRAIN_VOLTAGE_SWING_MASK,
> +
Re: [Intel-gfx] [RFC 1/6] sched: Add nice value change notifier
On Fri, Oct 01, 2021 at 11:32:16AM +0100, Tvrtko Ursulin wrote:
>
> On 01/10/2021 10:04, Tvrtko Ursulin wrote:
> >
> > Hi Peter,
> >
> > On 30/09/2021 19:33, Peter Zijlstra wrote:
> > > On Thu, Sep 30, 2021 at 06:15:47PM +0100, Tvrtko Ursulin wrote:
> > > > void set_user_nice(struct task_struct *p, long nice)
> > > > {
> > > > bool queued, running;
> > > > - int old_prio;
> > > > + int old_prio, ret;
> > > > struct rq_flags rf;
> > > > struct rq *rq;
> > > > @@ -6913,6 +6945,9 @@ void set_user_nice(struct task_struct *p,
> > > > long nice)
> > > > */
> > > > p->sched_class->prio_changed(rq, p, old_prio);
> > > > + ret = atomic_notifier_call_chain(&user_nice_notifier_list,
> > > > nice, p);
> > > > + WARN_ON_ONCE(ret != NOTIFY_DONE);
> > > > +
> > > > out_unlock:
> > > > task_rq_unlock(rq, p, &rf);
> > > > }
> > >
> > > No, we're not going to call out to exported, and potentially unbounded,
> > > functions under scheduler locks.
> >
> > Agreed, that's another good point why it is even more hairy, as I have
> > generally alluded in the cover letter.
> >
> > Do you have any immediate thoughts on possible alternatives?
> >
> > Like for instance if I did a queue_work from set_user_nice and then ran
> > a notifier chain async from a worker? I haven't looked at yet what
> > repercussion would that have in terms of having to cancel the pending
> > workers when tasks exit. I can try and prototype that and see how it
> > would look.
>
> Hm or I simply move calling the notifier chain to after task_rq_unlock? That
> would leave it run under the tasklist lock so probably still quite bad.
Hmm? That's for normalize_rt_tasks() only, right? Just don't have it
call the notifier in that special case (that's a magic sysrq thing
anyway).
Re: [Intel-gfx] [vfio:next 33/38] drivers/gpu/drm/i915/i915_pci.c:975:2: warning: missing field 'override_only' initializer
On Fri, Oct 01, 2021 at 02:04:04PM +0300, Jani Nikula wrote:
> On Fri, 27 Aug 2021, Jason Gunthorpe wrote:
> > On Fri, Aug 27, 2021 at 03:12:36PM +, kernel test robot wrote:
> >> tree: https://github.com/awilliam/linux-vfio.git next
> >> head: ea870730d83fc13a5fa2bd0e175176d7ac8a400a
> >> commit: 343b7258687ecfbb363bfda8833a7cf641aac524 [33/38] PCI: Add
> >> 'override_only' field to struct pci_device_id
> >> config: i386-randconfig-a004-20210827 (attached as .config)
> >> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project
> >> 1076082a0d97bd5c16a25ee7cf3dbb6ee4b5a9fe)
> >> reproduce (this is a W=1 build):
> >> wget
> >> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
> >> -O ~/bin/make.cross
> >> chmod +x ~/bin/make.cross
> >> #
> >> https://github.com/awilliam/linux-vfio/commit/343b7258687ecfbb363bfda8833a7cf641aac524
> >> git remote add vfio https://github.com/awilliam/linux-vfio.git
> >> git fetch --no-tags vfio next
> >> git checkout 343b7258687ecfbb363bfda8833a7cf641aac524
> >> # save the attached .config to linux build tree
> >> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross
> >> ARCH=i386
> >>
> >> If you fix the issue, kindly add following tag as appropriate
> >> Reported-by: kernel test robot
> >
> > Ugh, this is due to this code:
> >
> > #define INTEL_VGA_DEVICE(id, info) {\
> > 0x8086, id, \
> > ~0, ~0, \
> > 0x03, 0xff, \
> > (unsigned long) info }
> >
> > #define INTEL_QUANTA_VGA_DEVICE(info) { \
> > 0x8086, 0x16a, \
> > 0x152d, 0x8990, \
> > 0x03, 0xff, \
> > (unsigned long) info }
> >
> >
> > Which really should be using the normal pattern for defining these
> > structs:
> >
> > #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
> > .class = (dev_class), .class_mask = (dev_class_mask), \
> > .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
> > .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
> >
> > The warning is also not a real issue, just clang being overzealous.
>
> Stumbled upon this old report, sorry for the delayed response.
>
> The reason it's not using designated initializers is that the same file
> gets synced to some userspace projects (at least libdrm and
> igt-gpu-tools) which use the macros to initialize slightly different
> structs. For example, igt uses struct pci_id_match from libpciaccess-dev
> (/usr/include/pciaccess.h) and can't easily adapt to different member
> names.
Do it like this:
#ifdef __KERNEL__
#define INTEL_VGA_DEVICE(..)
#endif
And userspace does
#define INTEL_VGA_DEVICE(..)
#include
> Anyway, we've got
>
> subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
> subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
>
> in drivers/gpu/drm/i915/Makefile, so I wonder why they're not respected.
Disabling kernel warnings because some userspace wants to copy a
kernel header is horrific, don't do that.
Jason
Re: [Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts
On Fri, Oct 01, 2021 at 09:40:19AM +0100, Tvrtko Ursulin wrote:
>
> + Daniel as reviewer and maybe merge, avoid falling through cracks at least.
>
Ty, working on push rights myself.
> On 22/09/2021 20:43, Matthew Brost wrote:
> > Set number of engines before attempting to create contexts so the
> > function free_engines can clean up properly. Also check return of
> > alloc_engines for NULL.
> >
> > v2:
> > (Tvrtko)
> >- Send as stand alone patch
> > (John Harrison)
> >- Check for alloc_engines returning NULL
> >
> > Cc: Jason Ekstrand
> > Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create
> > parameters (v5)")
> > Signed-off-by: Matthew Brost
> > Cc:
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > index c2ab0e22db0a..9627c7aac6a3 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > @@ -898,6 +898,11 @@ static struct i915_gem_engines *user_engines(struct
> > i915_gem_context *ctx,
> > unsigned int n;
> > e = alloc_engines(num_engines);
> > + if (!e) {
> > + return ERR_PTR(-ENOMEM);
> > + }
>
> Ideally remove the braces and respin.
>
Yep, checkpatch didn't like this. Will respin.
> > + e->num_engines = num_engines;
>
> Theoretically you could have put it next to "e->engines[n] = ce" assignment
> so the pattern is the same as in default_engines(). Kind of makes more sense
> that the number is not set before anything is created, but as it doesn't
> really matter since free_engines handles sparse arrays so there is argument
> to have a simpler single assignment as well.
>
I like a single assignment, let's not overthink this.
> > +
> > for (n = 0; n < num_engines; n++) {
> > struct intel_context *ce;
> > int ret;
> > @@ -931,7 +936,6 @@ static struct i915_gem_engines *user_engines(struct
> > i915_gem_context *ctx,
> > goto free_engines;
> > }
> > }
> > - e->num_engines = num_engines;
> > return e;
> >
>
> Fix looks good to me. I did not want to butt in but since more than a week
> has passed without it getting noticed:
>
Again, ty.
Matt
> Reviewed-by: Tvrtko Ursulin
>
> Regards,
>
> Tvrtko
[Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts
Set number of engines before attempting to create contexts so the
function free_engines can clean up properly. Also check return of
alloc_engines for NULL.
v2:
(Tvrtko)
- Send as stand alone patch
(John Harrison)
- Check for alloc_engines returning NULL
v3:
(Checkpatch / Tvrtko)
- Remove braces around single line if statement
Cc: Jason Ekstrand
Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create
parameters (v5)")
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Matthew Brost
Cc:
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 8208fd5b72c3..8c7ea6e56262 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -898,6 +898,10 @@ static struct i915_gem_engines *user_engines(struct
i915_gem_context *ctx,
unsigned int n;
e = alloc_engines(num_engines);
+ if (!e)
+ return ERR_PTR(-ENOMEM);
+ e->num_engines = num_engines;
+
for (n = 0; n < num_engines; n++) {
struct intel_context *ce;
int ret;
@@ -931,7 +935,6 @@ static struct i915_gem_engines *user_engines(struct
i915_gem_context *ctx,
goto free_engines;
}
}
- e->num_engines = num_engines;
return e;
--
2.32.0
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers
== Series Details == Series: drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers URL : https://patchwork.freedesktop.org/series/95316/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2e6ff8d7426c drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers -:25: WARNING:LONG_LINE: line length of 106 exceeds 100 columns #25: FILE: drivers/gpu/drm/i915/i915_reg.h:9768: +#define AUD_DP_2DOT0_CTRL(trans) _MMIO_TRANS(trans, _AUD_TCA_DP_2DOT0_CTRL, _AUD_TCB_DP_2DOT0_CTRL) total: 0 errors, 1 warnings, 0 checks, 11 lines checked
