Re: [Intel-gfx] [PATCH i-g-t] gem_watchdog: Fix autotools build

2021-04-09 Thread Petri Latvala
On Thu, Apr 08, 2021 at 10:13:16PM +0200, Daniel Vetter wrote:
> On Thu, Apr 01, 2021 at 03:03:49PM +0300, Petri Latvala wrote:
> > On Thu, Apr 01, 2021 at 12:43:16PM +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin 
> > > 
> > > Correcting a brain malfunction while typing in Makefile.sources.
> > > 
> > > Signed-off-by: Tvrtko Ursulin 
> > 
> > Reviewed-by: Petri Latvala 
> 
> Isn't autotools now going away with Arek's series?

Yes. But this breakage happened before autotools removal landed.


-- 
Petri Latvala


> -Daniel
> 
> > 
> > 
> > > ---
> > >  tests/Makefile.sources | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > > index e992285fedc5..194df8e27dd0 100644
> > > --- a/tests/Makefile.sources
> > > +++ b/tests/Makefile.sources
> > > @@ -464,7 +464,7 @@ TESTS_progs += gem_wait
> > >  gem_wait_SOURCES = i915/gem_wait.c
> > >  
> > >  TESTS_progs += gem_watchdog
> > > -gem_exec_watchdog_SOURCES = i915/gem_watchdog.c
> > > +gem_watchdog_SOURCES = i915/gem_watchdog.c
> > >  
> > >  TESTS_progs += gem_workarounds
> > >  gem_workarounds_SOURCES = i915/gem_workarounds.c
> > > -- 
> > > 2.27.0
> > > 
> > > ___
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
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[Intel-gfx] [PULL] drm-misc-fixes

2021-04-09 Thread Maarten Lankhorst
drm-misc-fixes-2021-04-09:
drm-misc-fixes for v5.12-rc7:
- Fix use-after-free in xen.
- Reduce fifo threshold on hvs4 to fix a fifo full error.
- Disable TE support for Droid4 and N950.
- Small compiler fixes.
The following changes since commit 50891bead80bc79871528c2962d65c781c02330b:

  drm/etnaviv: User FOLL_LONGTERM in userptr (2021-03-19 20:15:48 +0100)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2021-04-09

for you to fetch changes up to eb9dfdd1ed40357b99a4201c8534c58c562e48c9:

  drm/vc4: crtc: Reduce PV fifo threshold on hvs4 (2021-04-08 14:55:02 +0200)


drm-misc-fixes for v5.12-rc7:
- Fix use-after-free in xen.
- Reduce fifo threshold on hvs4 to fix a fifo full error.
- Disable TE support for Droid4 and N950.
- Small compiler fixes.


Dom Cobley (1):
  drm/vc4: crtc: Reduce PV fifo threshold on hvs4

Lv Yunlong (1):
  gpu/xen: Fix a use after free in xen_drm_drv_init

Maxime Ripard (1):
  drm/vc4: plane: Remove redundant assignment

Sebastian Reichel (1):
  drm/panel: panel-dsi-cm: disable TE for now

Wan Jiabing (1):
  drivers: gpu: drm: xen_drm_front_drm_info is declared twice

 drivers/gpu/drm/panel/panel-dsi-cm.c | 12 +---
 drivers/gpu/drm/vc4/vc4_crtc.c   | 17 +
 drivers/gpu/drm/vc4/vc4_plane.c  |  1 -
 drivers/gpu/drm/xen/xen_drm_front.c  |  6 --
 drivers/gpu/drm/xen/xen_drm_front_conn.h |  1 -
 5 files changed, 30 insertions(+), 7 deletions(-)
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Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [RFC,1/2] tests/core_hotunplug: Add perf health check

2021-04-09 Thread Janusz Krzysztofik
On czwartek, 8 kwietnia 2021 16:50:45 CEST Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [RFC,1/2] tests/core_hotunplug: Add perf health 
> check
> URL   : https://patchwork.freedesktop.org/series/88848/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_9934_full -> IGTPW_5718_full
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with IGTPW_5718_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_5718_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/index.html
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> IGTPW_5718_full:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@core_hotunplug@hotrebind:
> - shard-tglb: NOTRUN -> [FAIL][1] +1 similar issue
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-tglb2/igt@core_hotunp...@hotrebind.html
> - shard-glk:  NOTRUN -> [FAIL][2] +1 similar issue
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-glk1/igt@core_hotunp...@hotrebind.html
> - shard-kbl:  NOTRUN -> [FAIL][3] +1 similar issue
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-kbl4/igt@core_hotunp...@hotrebind.html
> 
>   * igt@core_hotunplug@hotrebind-lateclose:
> - shard-snb:  NOTRUN -> [INCOMPLETE][4]
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-snb6/igt@core_hotunp...@hotrebind-lateclose.html
> - shard-iclb: NOTRUN -> [FAIL][5] +1 similar issue
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-iclb5/igt@core_hotunp...@hotrebind-lateclose.html
> - shard-apl:  NOTRUN -> [FAIL][6] +1 similar issue
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-apl7/igt@core_hotunp...@hotrebind-lateclose.html

Those FAILs are clear indications there is an issue with restoring device perf 
features after hot rebind on some platforms (or an issue with IGT lib ability 
to detect them), then that's not a regression, only bringing the issue into 
light.  As long as we keep hot*bind* subtests blocklisted, the issue will not 
be visible and will persist silently, I'm afraid.

Regarding the INCOMPLETE, I'm wondering how often similar system crashes on 
GPU hangs happen, if they really happen only on GPU hangs after hot rebind, 
and if that's still a good reason to keep the hot*bind* subtests blocklisted.  
Chris, can you please comment?

Thanks,
Janusz

> 
>   
> Known issues
> 
> 
>   Here are the changes found in IGTPW_5718_full that come from known issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@gem_create@create-massive:
> - shard-snb:  NOTRUN -> [DMESG-WARN][7] ([i915#3002])
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-snb7/igt@gem_cre...@create-massive.html
> 
>   * igt@gem_ctx_persistence@engines-queued:
> - shard-snb:  NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1099]) +3 
> similar issues
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-snb6/igt@gem_ctx_persiste...@engines-queued.html
> 
>   * igt@gem_ctx_sseu@invalid-args:
> - shard-tglb: NOTRUN -> [SKIP][9] ([i915#280])
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-tglb5/igt@gem_ctx_s...@invalid-args.html
> 
>   * igt@gem_exec_fair@basic-deadline:
> - shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2846])
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9934/shard-glk2/igt@gem_exec_f...@basic-deadline.html
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-glk7/igt@gem_exec_f...@basic-deadline.html
> - shard-apl:  NOTRUN -> [FAIL][12] ([i915#2846])
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-apl1/igt@gem_exec_f...@basic-deadline.html
> 
>   * igt@gem_exec_fair@basic-none-solo@rcs0:
> - shard-glk:  [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar 
> issue
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9934/shard-glk5/igt@gem_exec_fair@basic-none-s...@rcs0.html
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-glk4/igt@gem_exec_fair@basic-none-s...@rcs0.html
> 
>   * igt@gem_exec_fair@basic-none@vcs0:
> - shard-kbl:  NOTRUN -> [FAIL][15] ([i915#2842]) +1 similar issue
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5718/shard-kbl7/igt@gem_exec_fair@basic-n...@vcs0.html
> 
>   * igt@gem_exec_fair@basic-pace@bcs0:
> - shard-tglb: [PASS][16] -> [FAIL][17] ([i915#2842]) +1 similar 
> issu

[Intel-gfx] [PULL] drm-intel-fixes

2021-04-09 Thread Rodrigo Vivi
Hi Dave and Daniel,

Only one last minute fix targeting stable to fix a null dereference.

Here goes drm-intel-fixes-2021-04-09:
- Fix invalid access to ACPI _DSM objects (Takashi)

Thanks,
Rodrigo.

The following changes since commit e49d033bddf5b565044e2abe4241353959bc9120:

  Linux 5.12-rc6 (2021-04-04 14:15:36 -0700)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2021-04-09

for you to fetch changes up to b6a37a93c9ac3900987c79b726d0bb3699d8db4e:

  drm/i915: Fix invalid access to ACPI _DSM objects (2021-04-07 19:07:44 -0400)


- Fix invalid access to ACPI _DSM objects (Takashi)


Takashi Iwai (1):
  drm/i915: Fix invalid access to ACPI _DSM objects

 drivers/gpu/drm/i915/display/intel_acpi.c | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)
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[Intel-gfx] [RFC PATCH] tests/gem_userptr_blits: Check for banned mmap-offset

2021-04-09 Thread Janusz Krzysztofik
Support for mmap-offset to userptr has been obsoleted, then related
lockdep splat reported issues are not going to be resolved other than
still banning mmap-offset to userptr attempts.

Replace "mmap-offset-invalidate-*" and "readonly-mmap-unsync" subtests
which now skip with a negative "mmap-offset-banned" that fails if a
mmap-offset attempt to a userptr object doesn't return ENODEV.  Also,
remove mmap-offset to userptr dependent processing paths from other
subtest bodies and drop obsolete subtest variants.

Signed-off-by: Janusz Krzysztofik 
---
 tests/i915/gem_userptr_blits.c | 324 +++--
 1 file changed, 30 insertions(+), 294 deletions(-)

diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 7a80c0161..aad5f141b 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -70,52 +70,12 @@
 #endif
 
 static uint32_t userptr_flags;
-static bool *can_mmap;
 
 #define WIDTH 512
 #define HEIGHT 512
 
 static uint32_t linear[WIDTH*HEIGHT];
 
-static bool has_mmap(int i915, const struct mmap_offset *t)
-{
-   void *ptr, *map;
-   uint32_t handle;
-
-   handle = gem_create(i915, PAGE_SIZE);
-   map = __gem_mmap_offset(i915, handle, 0, PAGE_SIZE, PROT_WRITE,
-   t->type);
-   gem_close(i915, handle);
-   if (map) {
-   munmap(map, PAGE_SIZE);
-   } else {
-   igt_debug("no HW / kernel support for mmap-offset(%s)\n",
- t->name);
-   return false;
-   }
-   map = NULL;
-
-   igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0);
-
-   if (__gem_userptr(i915, ptr, 4096, 0,
- I915_USERPTR_UNSYNCHRONIZED, &handle))
-   goto out_ptr;
-   igt_assert(handle != 0);
-
-   map = __gem_mmap_offset(i915, handle, 0, 4096, PROT_WRITE, t->type);
-   if (map)
-   munmap(map, 4096);
-   else
-   igt_debug("mmap-offset(%s) banned, lockdep loop prevention\n",
- t->name);
-
-   gem_close(i915, handle);
-out_ptr:
-   free(ptr);
-
-   return map != NULL;
-}
-
 static void gem_userptr_test_unsynchronized(void)
 {
userptr_flags = I915_USERPTR_UNSYNCHRONIZED;
@@ -914,28 +874,13 @@ static int test_invalid_mapping(int fd, const struct 
mmap_offset *t)
 }
 
 #define PE_BUSY 0x1
-static void test_process_exit(int fd, const struct mmap_offset *mmo, int flags)
+static void test_process_exit(int fd, int flags)
 {
-   if (mmo)
-   igt_require_f(can_mmap[mmo->type],
- "HW & kernel support for LLC and mmap-offset(%s) 
over userptr\n",
- mmo->name);
-
igt_fork(child, 1) {
uint32_t handle;
 
handle = create_userptr_bo(fd, sizeof(linear));
 
-   if (mmo) {
-   uint32_t *ptr;
-
-   ptr = __gem_mmap_offset(fd, handle, 0, sizeof(linear),
-   PROT_READ | PROT_WRITE,
-   mmo->type);
-   if (ptr)
-   *ptr = 0;
-   }
-
if (flags & PE_BUSY)
igt_assert_eq(copy(fd, handle, handle), 0);
}
@@ -1064,53 +1009,30 @@ static int test_map_fixed_invalidate(int fd, uint32_t 
flags,
return 0;
 }
 
-static void test_mmap_offset_invalidate(int fd,
-   const struct mmap_offset *t,
-   unsigned int flags)
-#define MMOI_ACTIVE (1u << 0)
+static void test_mmap_offset_banned(int fd, const struct mmap_offset *t)
 {
-   igt_spin_t *spin = NULL;
-   uint32_t handle;
-   uint32_t *map;
+   struct drm_i915_gem_mmap_offset arg;
void *ptr;
 
/* check if mmap_offset type is supported by hardware, skip if not */
-   handle = gem_create(fd, PAGE_SIZE);
-   map = __gem_mmap_offset(fd, handle, 0, PAGE_SIZE,
-   PROT_READ | PROT_WRITE, t->type);
-   igt_require_f(map,
- "HW & kernel support for mmap_offset(%s)\n", t->name);
-   munmap(map, PAGE_SIZE);
-   gem_close(fd, handle);
+   memset(&arg, 0, sizeof(arg));
+   arg.flags = t->type;
+   arg.handle = gem_create(fd, PAGE_SIZE);
+   igt_skip_on_f(igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg),
+   "HW & kernel support for mmap_offset(%s)\n", 
t->name);
+   gem_close(fd, arg.handle);
 
/* create userptr object */
+   memset(&arg, 0, sizeof(arg));
+   arg.flags = t->type;
igt_assert_eq(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE), 0);
-   gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle);
+   gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &arg.handle);
 
-   /* set up mmap-offset map

[Intel-gfx] [PULL] drm-misc-next

2021-04-09 Thread Maxime Ripard
Hi Dave, Daniel,

Like you asked, here's this week drm-misc-next PR

Maxime

drm-misc-next-2021-04-09:
drm-misc-next for 5.13:

UAPI Changes:

Cross-subsystem Changes:

Core Changes:
  - bridge: Fix Kconfig dependency
  - cmdline: Refuse zero width/height mode
  - ttm: Ignore signaled move fences, ioremap buffer according to mem
 caching settins

Driver Changes:
  - Conversions to sysfs_emit
  - tegra: Don't register DP AUX channels before connectors
  - zynqmp: Fix for an out-of-bound (but within struct padding) memset
The following changes since commit 6c744983004ebc66756e582294672f8b991288d5:

  drm/bridge: anx7625: disable regulators when power off (2021-04-01 10:38:02 
+0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2021-04-09

for you to fetch changes up to e8b8b0df8694e39ea6bbbdb9e2fcfa78a61e2e42:

  drm/panel: Convert sysfs sprintf/snprintf family to sysfs_emit (2021-04-08 
20:41:38 -0400)


drm-misc-next for 5.13:

UAPI Changes:

Cross-subsystem Changes:

Core Changes:
  - bridge: Fix Kconfig dependency
  - cmdline: Refuse zero width/height mode
  - ttm: Ignore signaled move fences, ioremap buffer according to mem
 caching settins

Driver Changes:
  - Conversions to sysfs_emit
  - tegra: Don't register DP AUX channels before connectors
  - zynqmp: Fix for an out-of-bound (but within struct padding) memset


Carsten Haitzler (1):
  drm/komeda: Fix bit check to import to value of proper type

Christian König (1):
  drm/sched: add missing member documentation

Dafna Hirschfeld (1):
  drm/bridge: fix typo in Kconfig

Dan Carpenter (1):
  drm: xlnx: zynqmp: fix a memset in zynqmp_dp_train()

David Stevens (1):
  drm/syncobj: use newly allocated stub fences

Felix Kuehling (1):
  drm/ttm: Ignore signaled move fences

Guobin Huang (1):
  gma500: Use DEFINE_SPINLOCK() for spinlock

Julian Braha (1):
  drivers: gpu: drm: bridge: fix kconfig dependency on DRM_KMS_HELPER

Lyude Paul (4):
  drm/dp: Fixup kernel docs for struct drm_dp_aux
  drm/tegra: Don't register DP AUX channels before connectors
  drm/print: Fixup DRM_DEBUG_KMS_RATELIMITED()
  drm/dp_mst: Drop DRM_ERROR() on kzalloc() fail in 
drm_dp_mst_handle_up_req()

Oak Zeng (1):
  drm/ttm: ioremap buffer according to TTM mem caching setting

Tian Tao (2):
  drm/komeda: Convert sysfs sprintf/snprintf family to sysfs_emit
  drm/panel: Convert sysfs sprintf/snprintf family to sysfs_emit

Ville Syrjälä (2):
  drm: Refuse to create zero width/height cmdline modes
  drm/vblank: Do not store a new vblank timestamp in drm_vblank_restore()

Wan Jiabing (1):
  drm/drm_internal.h: Remove repeated struct declaration

Zhang Jianhua (1):
  drm/bridge: lt8912b: Add header file 

 drivers/dma-buf/dma-fence.c| 27 -
 drivers/gpu/drm/arm/display/include/malidp_utils.h |  3 --
 drivers/gpu/drm/arm/display/komeda/komeda_dev.c|  6 +--
 .../gpu/drm/arm/display/komeda/komeda_pipeline.c   | 16 +---
 .../drm/arm/display/komeda/komeda_pipeline_state.c | 19 ++
 drivers/gpu/drm/bridge/Kconfig |  3 +-
 drivers/gpu/drm/bridge/lontium-lt8912b.c   |  1 +
 drivers/gpu/drm/drm_dp_mst_topology.c  |  5 +--
 drivers/gpu/drm/drm_internal.h |  1 -
 drivers/gpu/drm/drm_modes.c|  3 ++
 drivers/gpu/drm/drm_syncobj.c  | 25 +---
 drivers/gpu/drm/drm_vblank.c   |  3 +-
 drivers/gpu/drm/gma500/power.c |  3 +-
 drivers/gpu/drm/panel/panel-tpo-td043mtea1.c   |  4 +-
 drivers/gpu/drm/tegra/dpaux.c  | 11 +++---
 drivers/gpu/drm/ttm/ttm_bo.c   |  3 +-
 drivers/gpu/drm/ttm/ttm_bo_util.c  | 14 +++
 drivers/gpu/drm/xlnx/zynqmp_dp.c   |  2 +-
 include/drm/drm_dp_helper.h| 44 +++---
 include/drm/drm_print.h| 20 ++
 include/drm/gpu_scheduler.h|  1 +
 include/linux/dma-fence.h  |  1 +
 22 files changed, 142 insertions(+), 73 deletions(-)


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Re: [Intel-gfx] [PATCH v3 08/16] drm/i915/pxp: Implement arb session teardown

2021-04-09 Thread Rodrigo Vivi
On Sun, Mar 28, 2021 at 03:57:00PM -0700, Daniele Ceraolo Spurio wrote:
> From: "Huang, Sean Z" 
> 
> Teardown is triggered when the display topology changes and no
> long meets the secure playback requirement, and hardware trashes
> all the encryption keys for display. Additionally, we want to emit a
> teardown operation to make sure we're clean on boot and resume
> 
> v2: emit in the ring, use high prio request (Chris)
> v3: better defines, stalling flush, cleaned up and renamed submission
> funcs (Chris)
> 
> Signed-off-by: Huang, Sean Z 
> Signed-off-by: Daniele Ceraolo Spurio 
> Cc: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/Makefile|   1 +
>  drivers/gpu/drm/i915/gt/intel_gpu_commands.h |  22 ++-
>  drivers/gpu/drm/i915/pxp/intel_pxp.c |   7 +-
>  drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 140 +++
>  drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h |  15 ++
>  drivers/gpu/drm/i915/pxp/intel_pxp_session.c |  29 
>  drivers/gpu/drm/i915/pxp/intel_pxp_session.h |   1 +
>  7 files changed, 211 insertions(+), 4 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
>  create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 219095d9b42c..87a6145b4ae8 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -273,6 +273,7 @@ i915-y += i915_perf.o
>  # Protected execution platform (PXP) support
>  i915-$(CONFIG_DRM_I915_PXP) += \
>   pxp/intel_pxp.o \
> + pxp/intel_pxp_cmd.o \
>   pxp/intel_pxp_session.o \
>   pxp/intel_pxp_tee.o
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h 
> b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> index 14e2ffb6c0e5..a73f46db4910 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> @@ -28,10 +28,13 @@
>  #define INSTR_26_TO_24_MASK  0x700
>  #define   INSTR_26_TO_24_SHIFT   24
>  
> +#define __INSTR(client) ((client) << INSTR_CLIENT_SHIFT)
> +
>  /*
>   * Memory interface instructions used by the kernel
>   */
> -#define MI_INSTR(opcode, flags) (((opcode) << 23) | (flags))
> +#define MI_INSTR(opcode, flags) \
> + (__INSTR(INSTR_MI_CLIENT) | (opcode) << 23 | (flags))
>  /* Many MI commands use bit 22 of the header dword for GGTT vs PPGTT */
>  #define  MI_GLOBAL_GTT(1<<22)
>  
> @@ -57,6 +60,7 @@
>  #define MI_SUSPEND_FLUSH MI_INSTR(0x0b, 0)
>  #define   MI_SUSPEND_FLUSH_EN(1<<0)
>  #define MI_SET_APPID MI_INSTR(0x0e, 0)
> +#define   MI_SET_APPID_SESSION_ID(x) ((x) << 0)
>  #define MI_OVERLAY_FLIP  MI_INSTR(0x11, 0)
>  #define   MI_OVERLAY_CONTINUE(0x0<<21)
>  #define   MI_OVERLAY_ON  (0x1<<21)
> @@ -144,6 +148,7 @@
>  #define MI_STORE_REGISTER_MEM_GEN8   MI_INSTR(0x24, 2)
>  #define   MI_SRM_LRM_GLOBAL_GTT  (1<<22)
>  #define MI_FLUSH_DW  MI_INSTR(0x26, 1) /* for GEN6 */
> +#define   MI_FLUSH_DW_PROTECTED_MEM_EN   (1<<22)
>  #define   MI_FLUSH_DW_STORE_INDEX(1<<21)
>  #define   MI_INVALIDATE_TLB  (1<<18)
>  #define   MI_FLUSH_DW_OP_STOREDW (1<<14)
> @@ -270,6 +275,19 @@
>  #define   MI_MATH_REG_ZF 0x32
>  #define   MI_MATH_REG_CF 0x33
>  
> +/*
> + * Media instructions used by the kernel
> + */
> +#define MEDIA_INSTR(pipe, op, sub_op, flags) \
> + (__INSTR(INSTR_RC_CLIENT) | (pipe) << INSTR_SUBCLIENT_SHIFT | \
> + (op) << INSTR_26_TO_24_SHIFT | (sub_op) << 16 | (flags))
> +
> +#define MFX_WAIT MEDIA_INSTR(1, 0, 0, 0)
> +#define  MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG  REG_BIT(8)
> +#define  MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG  REG_BIT(9)
> +
> +#define CRYPTO_KEY_EXCHANGE  MEDIA_INSTR(2, 6, 9, 0)
> +
>  /*
>   * Commands used only by the command parser
>   */
> @@ -326,8 +344,6 @@
>  #define GFX_OP_3DSTATE_BINDING_TABLE_EDIT_PS \
>   ((0x3<<29)|(0x3<<27)|(0x0<<24)|(0x47<<16))
>  
> -#define MFX_WAIT  ((0x3<<29)|(0x1<<27)|(0x0<<16))
> -
>  #define COLOR_BLT ((0x2<<29)|(0x40<<22))
>  #define SRC_COPY_BLT  ((0x2<<29)|(0x43<<22))
>  
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c 
> b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index e496fc4ccf0a..2a5099034946 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -94,9 +94,14 @@ void intel_pxp_fini(struct intel_pxp *pxp)
>  
>  void intel_pxp_init_hw(struct intel_pxp *pxp)
>  {
> + int ret;
> +
>   kcr_pxp_enable(pxp_to_gt(pxp));
>  
> - intel_pxp_create_arb_session(pxp);
> + /* always emit a full termination to clean the state */
> + ret = intel_pxp_terminate_arb_session_and_global(pxp);
> + if (!ret)
> + intel_pxp_create_arb_session(pxp);
>  }
>  
>  void intel_pxp_fini_hw(struct intel_pxp *pxp)
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c 
> b/drivers/gpu/drm/i915/pxp/int

Re: [Intel-gfx] [PATCH v3 09/16] drm/i915/pxp: Implement PXP irq handler

2021-04-09 Thread Rodrigo Vivi
On Sun, Mar 28, 2021 at 03:57:01PM -0700, Daniele Ceraolo Spurio wrote:
> From: "Huang, Sean Z" 
> 
> The HW will generate a teardown interrupt when session termination is
> required, which requires i915 to submit a terminating batch. Once the HW
> is done with the termination it will generate another interrupt, at
> which point it is safe to re-create the session.
> 
> Since the termination and re-creation flow is something we want to
> trigger from the driver as well, use a common work function that can be
> called both from the irq handler and from the driver set-up flows, which
> has the addded benefit of allowing us to skip any extra locks because
> the work itself serializes the operations.
> 
> v2: use struct completion instead of bool (Chris)
> v3: drop locks, clean up functions and improve comments (Chris),
> move to common work function.
> 
> Signed-off-by: Huang, Sean Z 
> Signed-off-by: Daniele Ceraolo Spurio 
> Cc: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/Makefile|  1 +
>  drivers/gpu/drm/i915/gt/intel_gt_irq.c   |  7 ++
>  drivers/gpu/drm/i915/i915_reg.h  |  1 +
>  drivers/gpu/drm/i915/pxp/intel_pxp.c | 73 ++-
>  drivers/gpu/drm/i915/pxp/intel_pxp.h |  8 ++
>  drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 97 
>  drivers/gpu/drm/i915/pxp/intel_pxp_irq.h | 32 +++
>  drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 54 ++-
>  drivers/gpu/drm/i915/pxp/intel_pxp_session.h |  5 +-
>  drivers/gpu/drm/i915/pxp/intel_pxp_tee.c |  8 +-
>  drivers/gpu/drm/i915/pxp/intel_pxp_types.h   | 10 ++
>  11 files changed, 281 insertions(+), 15 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
>  create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 87a6145b4ae8..9e6e61aca95f 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -274,6 +274,7 @@ i915-y += i915_perf.o
>  i915-$(CONFIG_DRM_I915_PXP) += \
>   pxp/intel_pxp.o \
>   pxp/intel_pxp_cmd.o \
> + pxp/intel_pxp_irq.o \
>   pxp/intel_pxp_session.o \
>   pxp/intel_pxp_tee.o
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c 
> b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index 9fc6c912a4e5..7c4ec8880b1a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -13,6 +13,7 @@
>  #include "intel_lrc_reg.h"
>  #include "intel_uncore.h"
>  #include "intel_rps.h"
> +#include "pxp/intel_pxp_irq.h"
>  
>  static void guc_irq_handler(struct intel_guc *guc, u16 iir)
>  {
> @@ -106,6 +107,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 
> instance,
>   if (instance == OTHER_GTPM_INSTANCE)
>   return gen11_rps_irq_handler(>->rps, iir);
>  
> + if (instance == OTHER_KCR_INSTANCE)
> + return intel_pxp_irq_handler(>->pxp, iir);
> +
>   WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n",
> instance, iir);
>  }
> @@ -232,6 +236,9 @@ void gen11_gt_irq_reset(struct intel_gt *gt)
>   intel_uncore_write(uncore, GEN11_GPM_WGBOXPERF_INTR_MASK,  ~0);
>   intel_uncore_write(uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
>   intel_uncore_write(uncore, GEN11_GUC_SG_INTR_MASK,  ~0);
> +
> + intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, 0);
> + intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK,  ~0);
>  }
>  
>  void gen11_gt_irq_postinstall(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cbf7a60afe54..1fe42f4a4e4b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7969,6 +7969,7 @@ enum {
>  /* irq instances for OTHER_CLASS */
>  #define OTHER_GUC_INSTANCE   0
>  #define OTHER_GTPM_INSTANCE  1
> +#define OTHER_KCR_INSTANCE   4
>  
>  #define GEN11_INTR_IDENTITY_REG(x)   _MMIO(0x190060 + ((x) * 4))
>  
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c 
> b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 2a5099034946..948b8153c8c9 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -2,7 +2,9 @@
>  /*
>   * Copyright(c) 2020 Intel Corporation.
>   */
> +#include 
>  #include "intel_pxp.h"
> +#include "intel_pxp_irq.h"
>  #include "intel_pxp_session.h"
>  #include "intel_pxp_tee.h"
>  #include "gt/intel_context.h"
> @@ -66,6 +68,16 @@ void intel_pxp_init(struct intel_pxp *pxp)
>   if (!HAS_PXP(gt->i915))
>   return;
>  
> + /*
> +  * we'll use the completion to check if there is a termination pending,
> +  * so we start it as completed and we reinit it when a termination
> +  * is triggered.
> +  */
> + init_completion(&pxp->termination);
> + complete_all(&pxp->termination);
> +
> + INIT_WORK(&pxp->session_work, intel_pxp_session_work);
> +
>   ret = create_v

[Intel-gfx] ✗ Fi.CI.BUILD: failure for tests/gem_userptr_blits: Check for banned mmap-offset

2021-04-09 Thread Patchwork
== Series Details ==

Series: tests/gem_userptr_blits: Check for banned mmap-offset
URL   : https://patchwork.freedesktop.org/series/88897/
State : failure

== Summary ==

Applying: tests/gem_userptr_blits: Check for banned mmap-offset
error: sha1 information is lacking or useless (tests/i915/gem_userptr_blits.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 tests/gem_userptr_blits: Check for banned mmap-offset
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".


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Re: [Intel-gfx] [PATCH] drm/i915/pmu: Do not report 100% RC6 if not supported

2021-04-09 Thread Tvrtko Ursulin



On 06/04/2021 12:19, Andi Shyti wrote:

Hi Tvrtko,


We use GT parked status to estimate RC6 while not in use, however if RC6
is not supported to start with that does not work very well and produces a
false 100% RC6 readout.

Fix by not advancing the estimated RC6 counter when feature is not
supported.

Signed-off-by: Tvrtko Ursulin 
Fixes: 1fe699e30113 ("drm/i915/pmu: Fix sleep under atomic in RC6 readout")
Reported-by: Eero T Tamminen 
---
  drivers/gpu/drm/i915/i915_pmu.c | 5 -
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 41651ac255fa..02fe0d22c470 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -191,7 +191,10 @@ static u64 get_rc6(struct intel_gt *gt)
 * on top of the last known real value, as the approximated RC6
 * counter value.
 */
-   val = ktime_since_raw(pmu->sleep_last);
+   if (gt->rc6.supported)
+   val = ktime_since_raw(pmu->sleep_last);
+   else
+   val = 0;


if rc6 is not supported, why are we here?


There is another flavour of this patch which indeed prevents us from 
getting here if rc6 is not enabled. (By not exposing the counter if not 
supported.)




Did you mean rc6.enabled ?


Yeah, I did not see that one initially at all! But it doesn't matter 
since this patch is not going in anyway.


Regards,

Tvrtko

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Re: [Intel-gfx] [PATCH] pwm: Rename pwm_get_state() to better reflect its semantic

2021-04-09 Thread Thierry Reding
On Tue, Apr 06, 2021 at 03:43:56PM +0200, Uwe Kleine-König wrote:
> Hello Thierry,
> 
> On Tue, Apr 06, 2021 at 01:16:31PM +0200, Thierry Reding wrote:
> > On Tue, Apr 06, 2021 at 09:30:36AM +0200, Uwe Kleine-König wrote:
> > > Given that lowlevel drivers usually cannot implement exactly what a
> > > consumer requests with pwm_apply_state() there is some rounding involved.
> > > 
> > > pwm_get_state() traditionally returned the setting that was requested most
> > > recently by the consumer (opposed to what was actually implemented in
> > > hardware in reply to the last request). To make this semantic obvious
> > > rename the function.
> > > 
> > > Signed-off-by: Uwe Kleine-König 
> > > ---
> > >  Documentation/driver-api/pwm.rst   |  6 +++-
> > >  drivers/clk/clk-pwm.c  |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_panel.c |  4 +--
> > >  drivers/input/misc/da7280.c|  2 +-
> > >  drivers/input/misc/pwm-beeper.c|  2 +-
> > >  drivers/input/misc/pwm-vibra.c |  4 +--
> > >  drivers/pwm/core.c |  4 +--
> > >  drivers/pwm/pwm-atmel-hlcdc.c  |  2 +-
> > >  drivers/pwm/pwm-atmel.c|  2 +-
> > >  drivers/pwm/pwm-imx27.c|  2 +-
> > >  drivers/pwm/pwm-rockchip.c |  2 +-
> > >  drivers/pwm/pwm-stm32-lp.c |  4 +--
> > >  drivers/pwm/pwm-sun4i.c|  2 +-
> > >  drivers/pwm/sysfs.c| 18 ++--
> > >  drivers/regulator/pwm-regulator.c  |  4 +--
> > >  drivers/video/backlight/pwm_bl.c   | 10 +++
> > >  include/linux/pwm.h| 34 ++
> > >  17 files changed, 59 insertions(+), 45 deletions(-)
> > 
> > Honestly, I don't think this is worth the churn. If you think people
> > will easily get confused by this then a better solution might be to more
> > explicitly document the pwm_get_state() function to say exactly what it
> > returns.
> 
> I'm not so optimistic that people become aware of the semantic just
> because there is documentation describing it and I strongly believe that
> a good name for functions is more important than accurate documentation.
> 
> If you don't agree, what do you think about the updated wording in
> Documentation/driver-api/pwm.rst?

Yeah, that clarifies this a bit. I can apply that hunk of the patch
separately.

> > But there's no need to make life difficult for everyone by
> > renaming this to something as cumbersome as this.
> 
> I don't expect any merge conflicts (and if still a problem occurs
> resolving should be trivial enough). So I obviously don't agree to your
> weighing.

I wasn't talking about merge conflicts but instead about the extra churn
of changing all consumers and having to type all these extra characters
for no benefit.

Thierry


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Re: [Intel-gfx] [igt-dev] [RFC PATCH] tests/gem_userptr_blits: Check for banned mmap-offset

2021-04-09 Thread Daniel Vetter
On Fri, Apr 09, 2021 at 10:57:04AM +0200, Janusz Krzysztofik wrote:
> Support for mmap-offset to userptr has been obsoleted, then related
> lockdep splat reported issues are not going to be resolved other than
> still banning mmap-offset to userptr attempts.
> 
> Replace "mmap-offset-invalidate-*" and "readonly-mmap-unsync" subtests
> which now skip with a negative "mmap-offset-banned" that fails if a
> mmap-offset attempt to a userptr object doesn't return ENODEV.  Also,
> remove mmap-offset to userptr dependent processing paths from other
> subtest bodies and drop obsolete subtest variants.
> 
> Signed-off-by: Janusz Krzysztofik 

Acked-by: Daniel Vetter 

But I think would be good if you cross-review with someone else for the
details. I think Zbyszek has a lot of patches that need review help.

Cheers, Daniel

> ---
>  tests/i915/gem_userptr_blits.c | 324 +++--
>  1 file changed, 30 insertions(+), 294 deletions(-)
> 
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index 7a80c0161..aad5f141b 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -70,52 +70,12 @@
>  #endif
>  
>  static uint32_t userptr_flags;
> -static bool *can_mmap;
>  
>  #define WIDTH 512
>  #define HEIGHT 512
>  
>  static uint32_t linear[WIDTH*HEIGHT];
>  
> -static bool has_mmap(int i915, const struct mmap_offset *t)
> -{
> - void *ptr, *map;
> - uint32_t handle;
> -
> - handle = gem_create(i915, PAGE_SIZE);
> - map = __gem_mmap_offset(i915, handle, 0, PAGE_SIZE, PROT_WRITE,
> - t->type);
> - gem_close(i915, handle);
> - if (map) {
> - munmap(map, PAGE_SIZE);
> - } else {
> - igt_debug("no HW / kernel support for mmap-offset(%s)\n",
> -   t->name);
> - return false;
> - }
> - map = NULL;
> -
> - igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0);
> -
> - if (__gem_userptr(i915, ptr, 4096, 0,
> -   I915_USERPTR_UNSYNCHRONIZED, &handle))
> - goto out_ptr;
> - igt_assert(handle != 0);
> -
> - map = __gem_mmap_offset(i915, handle, 0, 4096, PROT_WRITE, t->type);
> - if (map)
> - munmap(map, 4096);
> - else
> - igt_debug("mmap-offset(%s) banned, lockdep loop prevention\n",
> -   t->name);
> -
> - gem_close(i915, handle);
> -out_ptr:
> - free(ptr);
> -
> - return map != NULL;
> -}
> -
>  static void gem_userptr_test_unsynchronized(void)
>  {
>   userptr_flags = I915_USERPTR_UNSYNCHRONIZED;
> @@ -914,28 +874,13 @@ static int test_invalid_mapping(int fd, const struct 
> mmap_offset *t)
>  }
>  
>  #define PE_BUSY 0x1
> -static void test_process_exit(int fd, const struct mmap_offset *mmo, int 
> flags)
> +static void test_process_exit(int fd, int flags)
>  {
> - if (mmo)
> - igt_require_f(can_mmap[mmo->type],
> -   "HW & kernel support for LLC and mmap-offset(%s) 
> over userptr\n",
> -   mmo->name);
> -
>   igt_fork(child, 1) {
>   uint32_t handle;
>  
>   handle = create_userptr_bo(fd, sizeof(linear));
>  
> - if (mmo) {
> - uint32_t *ptr;
> -
> - ptr = __gem_mmap_offset(fd, handle, 0, sizeof(linear),
> - PROT_READ | PROT_WRITE,
> - mmo->type);
> - if (ptr)
> - *ptr = 0;
> - }
> -
>   if (flags & PE_BUSY)
>   igt_assert_eq(copy(fd, handle, handle), 0);
>   }
> @@ -1064,53 +1009,30 @@ static int test_map_fixed_invalidate(int fd, uint32_t 
> flags,
>   return 0;
>  }
>  
> -static void test_mmap_offset_invalidate(int fd,
> - const struct mmap_offset *t,
> - unsigned int flags)
> -#define MMOI_ACTIVE (1u << 0)
> +static void test_mmap_offset_banned(int fd, const struct mmap_offset *t)
>  {
> - igt_spin_t *spin = NULL;
> - uint32_t handle;
> - uint32_t *map;
> + struct drm_i915_gem_mmap_offset arg;
>   void *ptr;
>  
>   /* check if mmap_offset type is supported by hardware, skip if not */
> - handle = gem_create(fd, PAGE_SIZE);
> - map = __gem_mmap_offset(fd, handle, 0, PAGE_SIZE,
> - PROT_READ | PROT_WRITE, t->type);
> - igt_require_f(map,
> -   "HW & kernel support for mmap_offset(%s)\n", t->name);
> - munmap(map, PAGE_SIZE);
> - gem_close(fd, handle);
> + memset(&arg, 0, sizeof(arg));
> + arg.flags = t->type;
> + arg.handle = gem_create(fd, PAGE_SIZE);
> + igt_skip_on_f(igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg),
> + "HW & kernel support for mmap_offset(%s)\n", 
> t->na

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915: Skip display interruption setup when display is not available

2021-04-09 Thread Souza, Jose
On Thu, 2021-04-08 at 23:30 +, Patchwork wrote:
Patch Details
Series: series starting with [CI,1/3] drm/i915: Skip display interruption setup 
when display is not available
URL:https://patchwork.freedesktop.org/series/88879/
State:  success
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19905/index.html
CI Bug Log - changes from CI_DRM_9946_full -> Patchwork_19905_full
Summary

SUCCESS

No regressions found.

pushed, thanks for the review RK.

Known issues

Here are the changes found in Patchwork_19905_full that come from known issues:

IGT changes
Issues hit

  *   igt@gem_create@create-massive:

 *   shard-apl: NOTRUN -> 
DMESG-WARN
 ([i915#3002])
  *   igt@gem_ctx_isolation@preservation-s3@rcs0:

 *   shard-apl: 
PASS
 -> 
DMESG-WARN
 (i915#180) +2 similar 
issues
  *   igt@gem_ctx_persistence@legacy-engines-queued:

 *   shard-snb: NOTRUN -> 
SKIP
 (fdo#109271 / 
i915#1099) +3 similar 
issues
  *   igt@gem_ctx_persistence@many-contexts:

 *   shard-tglb: 
PASS
 -> 
FAIL
 (i915#2410)
  *   igt@gem_exec_fair@basic-deadline:

 *   shard-apl: NOTRUN -> 
FAIL
 ([i915#2846])
  *   igt@gem_exec_fair@basic-flow@rcs0:

 *   shard-tglb: 
PASS
 -> 
FAIL
 ([i915#2842]) +1 similar issue
  *   igt@gem_exec_fair@basic-pace@vcs1:

 *   shard-iclb: NOTRUN -> 
FAIL
 ([i915#2842])
  *   igt@gem_exec_fair@basic-pace@vecs0:

 *   shard-kbl: 
PASS
 -> 
FAIL
 ([i915#2842])
  *   igt@gem_exec_fair@basic-throttle@rcs0:

 *   shard-glk: 
PASS
 -> 
FAIL
 ([i915#2842])
  *   igt@gem_exec_flush@basic-wb-set-default:

 *   shard-glk: 
PASS
 -> 
INCOMPLETE
 ([i915#2944])
  *   igt@gem_exec_reloc@basic-wide-active@bcs0:

 *   shard-apl: NOTRUN -> 
FAIL
 (i915#2389) +3 similar 
issues
  *   igt@gem_exec_whisper@basic-forked:

 *   shard-glk: 
PASS
 -> 
DMESG-WARN
 (i915#118 / [i915#95]) +1 
similar issue
  *   igt@gem_huc_copy@huc-copy:

 *   shard-kbl: NOTRUN -> 
SKIP
 (fdo#109271 / 
i915#2190)
  *   igt@gem_media_vme:

 *   shard-skl: NOTRUN -> 
SKIP
 (fdo#109271) +31 similar 
issues
  *   igt@gem_ppgtt@flink-and-close-vma-leak:

 *   shard-glk: 
PASS

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Defeature PSR2 for RKL and ADL-S

2021-04-09 Thread Souza, Jose
On Fri, 2021-04-09 at 05:57 +, Patchwork wrote:
Patch Details
Series: drm/i915/display: Defeature PSR2 for RKL and ADL-S
URL:https://patchwork.freedesktop.org/series/1/
State:  failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19907/index.html
CI Bug Log - changes from CI_DRM_9948_full -> Patchwork_19907_full
Summary

FAILURE

Serious unknown changes coming with Patchwork_19907_full absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19907_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_19907_full:

IGT changes
Possible regressions

  *   igt@gem_exec_schedule@pi-ringfull@vecs0:

 *   shard-skl: 
PASS
 -> 
FAIL
  *   igt@gem_mmap_gtt@medium-copy-xy:

 *   shard-tglb: 
PASS
 -> 
INCOMPLETE

Failures are not related, pushed.
Thanks for the review Rodrigo.

Known issues

Here are the changes found in Patchwork_19907_full that come from known issues:

IGT changes
Issues hit

  *   igt@gem_create@create-massive:

 *   shard-kbl: NOTRUN -> 
DMESG-WARN
 (i915#3002)

 *   shard-apl: NOTRUN -> 
DMESG-WARN
 (i915#3002)

  *   igt@gem_ctx_isolation@preservation-s3@bcs0:

 *   shard-kbl: 
PASS
 -> 
DMESG-WARN
 (i915#180) +3 similar 
issues
  *   igt@gem_ctx_persistence@legacy-engines-mixed:

 *   shard-snb: NOTRUN -> 
SKIP
 (fdo#109271 / 
i915#1099)
  *   igt@gem_exec_fair@basic-flow@rcs0:

 *   shard-skl: NOTRUN -> 
SKIP
 (fdo#109271) +16 similar 
issues
  *   igt@gem_exec_fair@basic-none-share@rcs0:

 *   shard-iclb: 
PASS
 -> 
FAIL
 (i915#2842)

 *   shard-tglb: 
PASS
 -> 
FAIL
 (i915#2842) +1 similar 
issue

  *   igt@gem_exec_fair@basic-throttle@rcs0:

 *   shard-glk: 
PASS
 -> 
FAIL
 (i915#2842) +2 similar 
issues

 *   shard-iclb: 
PASS
 -> 
FAIL
 (i915#2849)

  *   igt@gem_exec_reloc@basic-wide-active@rcs0:

 *   shard-kbl: NOTRUN -> 
FAIL
 (i915#2389) +4 similar 
issues
  *   igt@gem_exec_whisper@basic-forked:

 *   shard-glk: 
PASS

[Intel-gfx] [PATCH] drm/i915/display/psr: Fix cppcheck warnings

2021-04-09 Thread José Roberto de Souza
Fix redundant condition, caught in cppcheck by kernel test robot.

Reported-by: kernel test robot 
Cc: Gwan-gyeong Mun 
Fixes: b64d6c51380b ("drm/i915/display: Support PSR Multiple Instances")
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 2627d0b558f3..06cb286e9a4a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1532,8 +1532,7 @@ void intel_psr_wait_for_idle(const struct 
intel_crtc_state *new_crtc_state)
u32 psr_status;
 
mutex_lock(&intel_dp->psr.lock);
-   if (!intel_dp->psr.enabled ||
-   (intel_dp->psr.enabled && intel_dp->psr.psr2_enabled)) {
+   if (!intel_dp->psr.enabled || intel_dp->psr.psr2_enabled) {
mutex_unlock(&intel_dp->psr.lock);
continue;
}
-- 
2.31.1

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[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/display/psr: Fix cppcheck warnings

2021-04-09 Thread Patchwork
== Series Details ==

Series: drm/i915/display/psr: Fix cppcheck warnings
URL   : https://patchwork.freedesktop.org/series/88918/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter 
or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
parameter 'trampoline' description in 'intel_engine_cmd_parser'


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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/psr: Fix cppcheck warnings

2021-04-09 Thread Patchwork
== Series Details ==

Series: drm/i915/display/psr: Fix cppcheck warnings
URL   : https://patchwork.freedesktop.org/series/88918/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9954 -> Patchwork_19909


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/index.html

Known issues


  Here are the changes found in Patchwork_19909 that come from known issues:

### IGT changes ###

 Possible fixes 

  * igt@gem_render_tiled_blits@basic:
- fi-tgl-y:   [DMESG-WARN][1] ([i915#402]) -> [PASS][2] +1 similar 
issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/fi-tgl-y/igt@gem_render_tiled_bl...@basic.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/fi-tgl-y/igt@gem_render_tiled_bl...@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402


Participating hosts (46 -> 39)
--

  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-bdw-gvtdvm fi-bsw-cyan 
fi-ctg-p8600 fi-icl-y fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_9954 -> Patchwork_19909

  CI-20190529: 20190529
  CI_DRM_9954: 0ac874d540c177afc45b16a304ee2eecaa858675 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6063: d3b7f74ce5df6fdea03e490b7c64f0c6bfe76f03 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19909: 319046273a8ecc496892d9633ab343a0b5f2c661 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

319046273a8e drm/i915/display/psr: Fix cppcheck warnings

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/index.html
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Re: [Intel-gfx] [PATCH 01/12] drm/i915: rename display.version to display.ver

2021-04-09 Thread Souza, Jose
On Wed, 2021-04-07 at 21:52 -0700, Lucas De Marchi wrote:
> The macro we use to check is called DISPLAY_VER(). While using this
> macro and the new ones being added in following changes I made the
> mistake multiple times when mixing both "ver" and "version". Although
> it's usually better to prefer the complete name, the shorhand
> DISPLAY_VER() / GRAPHICS_VER / MEDIA_VER are clear and cause less
> visual polution.
> 
> Another issue is when copying the variable to other places.
> "display.version" would be copied to a "display_version" variable which
> is long and would make people abbreviate as "version", or "display_ver".
> In the first case it's not always clear what version refers to, and in
> the second case it just hints it should be the name in the first place.
> 
> So, in the same way use used "gen" rather than "generation", use "ver"
> instead of "version".
> 

Reviewed-by: José Roberto de Souza 

> Signed-off-by: Lucas De Marchi 
> ---
>  drivers/gpu/drm/i915/i915_drv.h  | 2 +-
>  drivers/gpu/drm/i915/i915_pci.c  | 4 ++--
>  drivers/gpu/drm/i915/intel_device_info.h | 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 69e43bf91a15..8c62bb2abd31 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1237,7 +1237,7 @@ static inline struct drm_i915_private 
> *pdev_to_i915(struct pci_dev *pdev)
>  #define INTEL_GEN(dev_priv)  (INTEL_INFO(dev_priv)->gen)
>  #define INTEL_DEVID(dev_priv)(RUNTIME_INFO(dev_priv)->device_id)
>  
> 
> 
> 
> -#define DISPLAY_VER(i915)(INTEL_INFO(i915)->display.version)
> +#define DISPLAY_VER(i915)(INTEL_INFO(i915)->display.ver)
>  #define IS_DISPLAY_RANGE(i915, from, until) \
>   (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
>  #define IS_DISPLAY_VER(i915, v) (DISPLAY_VER(i915) == (v))
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 480553746794..ce5cbeaf036d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -36,7 +36,7 @@
>  #include "i915_selftest.h"
>  
> 
> 
> 
>  #define PLATFORM(x) .platform = (x)
> -#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1), .display.version = (x)
> +#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1), .display.ver = (x)
>  
> 
> 
> 
>  #define I845_PIPE_OFFSETS \
>   .pipe_offsets = { \
> @@ -723,7 +723,7 @@ static const struct intel_device_info bxt_info = {
>  static const struct intel_device_info glk_info = {
>   GEN9_LP_FEATURES,
>   PLATFORM(INTEL_GEMINILAKE),
> - .display.version = 10,
> + .display.ver = 10,
>   .ddb_size = 1024,
>   GLK_COLORS,
>  };
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
> b/drivers/gpu/drm/i915/intel_device_info.h
> index 2f442d418a15..b16c75927a12 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -189,7 +189,7 @@ struct intel_device_info {
>  #undef DEFINE_FLAG
>  
> 
> 
> 
>   struct {
> - u8 version;
> + u8 ver;
>  
> 
> 
> 
>  #define DEFINE_FLAG(name) u8 name:1
>   DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);

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Re: [Intel-gfx] [PATCH 02/12] drm/i915: add macros for graphics and media versions

2021-04-09 Thread Souza, Jose
On Wed, 2021-04-07 at 21:52 -0700, Lucas De Marchi wrote:
> Like it was done in
> commit 01eb15c9165e ("drm/i915: Add DISPLAY_VER() and related macros")
> add the correspondent macros for graphics and media. Going forward we
> will prefer checking the versions for the specific IPs (graphics, media
> and display) rather than grouping everything under a "gen" version.
> 
> For consistency and to make the maintenance easier, it'd be preferred
> not to mix the *GEN* macros with the new ones. For older platforms we
> can simply consider that the previous "gen" number will extend to all
> 3 IPs. Then we can start replacing its use in the driver. Right now this
> replacement is not done and only the infrastructure is put in place.
> We also leave gen and gen_mask inside struct intel_device_info while
> it's still being used throughout the code.

Reviewed-by: José Roberto de Souza 

> 
> Signed-off-by: Lucas De Marchi 
> ---
>  drivers/gpu/drm/i915/i915_drv.h  | 17 -
>  drivers/gpu/drm/i915/i915_pci.c  |  7 ++-
>  drivers/gpu/drm/i915/intel_device_info.h |  3 +++
>  3 files changed, 25 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8c62bb2abd31..97cbd019f2e9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1234,9 +1234,24 @@ static inline struct drm_i915_private 
> *pdev_to_i915(struct pci_dev *pdev)
>  #define RUNTIME_INFO(dev_priv)   (&(dev_priv)->__runtime)
>  #define DRIVER_CAPS(dev_priv)(&(dev_priv)->caps)
>  
> 
> 
> 
> -#define INTEL_GEN(dev_priv)  (INTEL_INFO(dev_priv)->gen)
>  #define INTEL_DEVID(dev_priv)(RUNTIME_INFO(dev_priv)->device_id)
>  
> 
> 
> 
> +/*
> + * Deprecated: this will be replaced by individual IP checks:
> + * GRAPHICS_VER(), MEDIA_VER and DISPLAY_VER()
> + */
> +#define INTEL_GEN(dev_priv)  (INTEL_INFO(dev_priv)->gen)
> +
> +#define GRAPHICS_VER(i915)   (INTEL_INFO(i915)->graphics_ver)
> +#define IS_GRAPHICS_RANGE(i915, from, until) \
> + (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
> +#define IS_GRAPHICS_VER(i915, v) (GRAPHICS_VER(i915) == (v))
> +
> +#define MEDIA_VER(i915)  (INTEL_INFO(i915)->media_ver)
> +#define IS_MEDIA_RANGE(i915, from, until) \
> + (MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until))
> +#define IS_MEDIA_VER(i915, v)(MEDIA_VER(i915) == (v))
> +
>  #define DISPLAY_VER(i915)(INTEL_INFO(i915)->display.ver)
>  #define IS_DISPLAY_RANGE(i915, from, until) \
>   (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index ce5cbeaf036d..97ab73276334 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -36,7 +36,12 @@
>  #include "i915_selftest.h"
>  
> 
> 
> 
>  #define PLATFORM(x) .platform = (x)
> -#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1), .display.ver = (x)
> +#define GEN(x) \
> + .gen_mask = BIT((x) - 1), \
> + .gen = (x), \
> + .graphics_ver = (x), \
> + .media_ver = (x), \
> + .display.ver = (x)
>  
> 
> 
> 
>  #define I845_PIPE_OFFSETS \
>   .pipe_offsets = { \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
> b/drivers/gpu/drm/i915/intel_device_info.h
> index b16c75927a12..405883a8cc84 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -162,6 +162,9 @@ enum intel_ppgtt_type {
>  struct intel_device_info {
>   u16 gen_mask;
>  
> 
> 
> 
> + u8 graphics_ver;
> + u8 media_ver;
> +
>   u8 gen;
>   u8 gt; /* GT number, 0 if undefined */
>   intel_engine_mask_t platform_engine_mask; /* Engines supported by the 
> HW */

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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display/psr: Fix cppcheck warnings

2021-04-09 Thread Patchwork
== Series Details ==

Series: drm/i915/display/psr: Fix cppcheck warnings
URL   : https://patchwork.freedesktop.org/series/88918/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9954_full -> Patchwork_19909_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_19909_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19909_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_19909_full:

### IGT changes ###

 Possible regressions 

  * igt@sysfs_preempt_timeout@timeout@rcs0:
- shard-skl:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/shard-skl1/igt@sysfs_preempt_timeout@time...@rcs0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-skl5/igt@sysfs_preempt_timeout@time...@rcs0.html

  
Known issues


  Here are the changes found in Patchwork_19909_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_create@create-massive:
- shard-kbl:  NOTRUN -> [DMESG-WARN][3] ([i915#3002])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-kbl1/igt@gem_cre...@create-massive.html
- shard-skl:  NOTRUN -> [DMESG-WARN][4] ([i915#3002])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-skl5/igt@gem_cre...@create-massive.html

  * igt@gem_ctx_persistence@smoketest:
- shard-snb:  NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-snb7/igt@gem_ctx_persiste...@smoketest.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl:  [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/shard-kbl3/igt@gem_exec_fair@basic-n...@vcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-kbl3/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
- shard-kbl:  [PASS][10] -> [SKIP][11] ([fdo#109271])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/shard-kbl7/igt@gem_exec_fair@basic-p...@vcs1.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-kbl6/igt@gem_exec_fair@basic-p...@vcs1.html

  * igt@gem_exec_reloc@basic-wide-active@bcs0:
- shard-skl:  NOTRUN -> [FAIL][12] ([i915#2389]) +3 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-skl8/igt@gem_exec_reloc@basic-wide-act...@bcs0.html

  * igt@gem_huc_copy@huc-copy:
- shard-skl:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#2190])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-skl5/igt@gem_huc_c...@huc-copy.html

  * igt@gem_mmap_gtt@big-copy-xy:
- shard-skl:  [PASS][14] -> [FAIL][15] ([i915#307])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/shard-skl6/igt@gem_mmap_...@big-copy-xy.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-skl5/igt@gem_mmap_...@big-copy-xy.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
- shard-iclb: [PASS][16] -> [FAIL][17] ([i915#2428])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9954/shard-iclb6/igt@gem_mmap_...@cpuset-big-copy-odd.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-iclb5/igt@gem_mmap_...@cpuset-big-copy-odd.html

  * igt@gem_userptr_blits@input-checking:
- shard-apl:  NOTRUN -> [DMESG-WARN][18] ([i915#3002])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-apl8/igt@gem_userptr_bl...@input-checking.html
- shard-snb:  NOTRUN -> [DMESG-WARN][19] ([i915#3002])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-snb7/igt@gem_userptr_bl...@input-checking.html

  * igt@gem_userptr_blits@process-exit-mmap@wb:
- shard-apl:  NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#1699]) +3 
similar issues
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19909/shard-apl8/igt@gem_userptr_blits@process-exit-m...@wb.html

  * igt@gem_userptr_blits@set-cache-level:
- shard-apl:  NOTRUN -> [FAIL][21] ([i915#3324])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Pat