[Intel-gfx] [PATCH i-g-t v2] tests/core_hotunplug: Restore i915 debugfs health check

[Janusz Krzysztofik]

Removal of igt_fork_hang_detector() from local_i915_healthcheck() by
commit 1fbd127bd4e1 ("core_hotplug: Teach the healthcheck how to check
execution status") resulted in unintentional removal of an important
though implicit test feature of detecting, reporting as failures and
recovering from potential misses of debugfs subdirs of hot rebound i915
devices.  As a consequence, unexpected failures or skips of other
unrelated but subsequently run tests have been observed on CI.

On the other hand, removal of the debugfs issue detection and subtest
failures right after hot rebinding the driver enabled the better
version of the i915 GPU health check fixed by the same commit to detect
and report other issues potentially triggered by device late close.

Restore the missing test feature by introducing an explicit i915 sysfs
health check that verifies existence of device sysfs and debugfs areas.
Also, split hotrebind/hotreplug scenarios into a pair of each, one that
performs the health check right after hot rebind/replug and delegates
the device late close step to a follow up recovery phase while the
other one checks device health only after late closing it.

v2: Give GPU health check a better chance to detect issues - run it
before sysfs health checks.

Signed-off-by: Janusz Krzysztofik 
Cc: Chris Wilson 
---
 tests/core_hotunplug.c | 61 ++
 1 file changed, 56 insertions(+), 5 deletions(-)

diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 70669c590..543161874 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -250,6 +250,7 @@ static int local_i915_healthcheck(int i915, const char 
*prefix)
};
const struct intel_execution_engine2 *engine;
int fence = -1;
+   char path[200];
 
local_debug("%s%s\n", prefix, "running i915 GPU healthcheck");
if (local_i915_is_wedged(i915))
@@ -274,6 +275,10 @@ static int local_i915_healthcheck(int i915, const char 
*prefix)
if (local_i915_is_wedged(i915))
return -EIO;
 
+   local_debug("%s%s\n", prefix, "running i915 sysfs healthcheck");
+   igt_assert(igt_sysfs_path(i915, path, sizeof(path)));
+   igt_assert(igt_debugfs_path(i915, path, sizeof(path)));
+
return 0;
 }
 
@@ -437,7 +442,7 @@ static void hotunplug_rescan(struct hotunplug *priv)
healthcheck(priv, false);
 }
 
-static void hotrebind_lateclose(struct hotunplug *priv)
+static void hotrebind(struct hotunplug *priv)
 {
igt_assert_eq(priv->fd.drm, -1);
igt_assert_eq(priv->fd.drm_hc, -1);
@@ -448,6 +453,30 @@ static void hotrebind_lateclose(struct hotunplug *priv)
driver_bind(priv, 0);
 
healthcheck(priv, false);
+}
+
+static void hotreplug(struct hotunplug *priv)
+{
+   igt_assert_eq(priv->fd.drm, -1);
+   igt_assert_eq(priv->fd.drm_hc, -1);
+   priv->fd.drm = local_drm_open_driver(false, "", " for hot replug");
+
+   device_unplug(priv, "hot ", 60);
+
+   bus_rescan(priv, 0);
+
+   healthcheck(priv, false);
+}
+
+static void hotrebind_lateclose(struct hotunplug *priv)
+{
+   igt_assert_eq(priv->fd.drm, -1);
+   igt_assert_eq(priv->fd.drm_hc, -1);
+   priv->fd.drm = local_drm_open_driver(false, "", " for hot rebind");
+
+   driver_unbind(priv, "hot ", 60);
+
+   driver_bind(priv, 0);
 
priv->fd.drm = close_device(priv->fd.drm, "late ", "unbound ");
igt_assert_eq(priv->fd.drm, -1);
@@ -465,8 +494,6 @@ static void hotreplug_lateclose(struct hotunplug *priv)
 
bus_rescan(priv, 0);
 
-   healthcheck(priv, false);
-
priv->fd.drm = close_device(priv->fd.drm, "late ", "removed ");
igt_assert_eq(priv->fd.drm, -1);
 
@@ -570,7 +597,31 @@ igt_main
post_healthcheck(&priv);
 
igt_subtest_group {
-   igt_describe("Check if the driver hot unbound from a still open 
device can be cleanly rebound, then the old instance released");
+   igt_describe("Check if the driver can be cleanly rebound to a 
device with a still open hot unbound driver instance");
+   igt_subtest("hotrebind")
+   hotrebind(&priv);
+
+   igt_fixture
+   recover(&priv);
+   }
+
+   igt_fixture
+   post_healthcheck(&priv);
+
+   igt_subtest_group {
+   igt_describe("Check if a hot unplugged and still open device 
can be cleanly restored");
+   igt_subtest("hotreplug")
+   hotreplug(&priv);
+
+   igt_fixture
+   recover(&priv);
+   }
+
+   igt_fixture
+   post_healthcheck(&priv);
+
+   igt_subtest_group {
+   igt_describe("Check if a hot unbound driver instance still open 
after hot rebind can be cleanly released");
igt_subtest("hotrebind-lateclose")
hotrebind_lateclose(&priv);
 
@@ -582,7 +633,7 @@ igt_mai

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 48/58] drivers/md: Utilize new kmap_thread()

[Coly Li]

On 2020/10/12 13:28, Ira Weiny wrote:
> On Sat, Oct 10, 2020 at 10:20:34AM +0800, Coly Li wrote:
>> On 2020/10/10 03:50, ira.we...@intel.com wrote:
>>> From: Ira Weiny 
>>>
>>> These kmap() calls are localized to a single thread.  To avoid the over
>>> head of global PKRS updates use the new kmap_thread() call.
>>>
>>
>> Hi Ira,
>>
>> There were a number of options considered.
>>
>> 1) Attempt to change all the thread local kmap() calls to kmap_atomic()
>> 2) Introduce a flags parameter to kmap() to indicate if the mapping
>> should be global or not
>> 3) Change ~20-30 call sites to 'kmap_global()' to indicate that they
>> require a global mapping of the pages
>> 4) Change ~209 call sites to 'kmap_thread()' to indicate that the
>> mapping is to be used within that thread of execution only
>>
>>
>> I copied the above information from patch 00/58 to this message. The
>> idea behind kmap_thread() is fine to me, but as you said the new api is
>> very easy to be missed in new code (even for me). I would like to be
>> supportive to option 2) introduce a flag to kmap(), then we won't forget
>> the new thread-localized kmap method, and people won't ask why a
>> _thread() function is called but no kthread created.
> 
> Thanks for the feedback.
> 
> I'm going to hold off making any changes until others weigh in.  FWIW, I kind
> of like option 2 as well.  But there is already kmap_atomic() so it seemed 
> like
> kmap_() was more in line with the current API.

I understand it now, the idea is fine to me.

Acked-by: Coly Li 

Thanks.

Coly Li
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: use opregion mailbox #5 EDID for eDP, if available

[Lee, Shawn C]

On Fri, Aug 28, 2020 at 06:19AM, Shankar Uma wrote:
>> -Original Message-
>> From: Jani Nikula 
>> Sent: Friday, August 28, 2020 11:50 AM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Nikula, Jani ; Shankar, Uma
>> 
>> Subject: [PATCH 2/2] drm/i915/dp: use opregion mailbox #5 EDID for eDP, if
>> available
>> 
>> If a panel's EDID is broken, there may be an override EDID set in the ACPI
>> OpRegion mailbox #5. Use it if available.
>
>Looks Good to me.
>Reviewed-by: Uma Shankar 
>
>> Cc: Uma Shankar 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
>>  1 file changed, 3 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index c57ac83bf563..d1307be196a2 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -8114,6 +8114,9 @@ static bool intel_edp_init_connector(struct intel_dp
>> *intel_dp,
>>  goto out_vdd_off;
>>  }
>> 
>> +/* Set up override EDID, if any, from ACPI OpRegion */
>> +intel_opregion_edid_override(intel_connector);
>> +

Customer report DUT still get EDID from eDP panel instead of mailbox #5.
After some investigations, this change can retrieve EDID from mailbox #5 
properly.
But driver still used panel's EDID to enable eDP display. This is because of 
drm_get_edid()
was executed after intel_opregion_edid_override(). drm_get_edid() return 
panel's EDID
and overwrite mailbox #5's. 

We try to move drm_get_edid() before intel_opregion_edid_override().
The test result is positive, mailbox #5 EDID will substitute for panel's.
It seems we may need some additional change for this patch. Thanks!

Best regards,
Shawn

>>  mutex_lock(&dev->mode_config.mutex);
>>  edid = drm_get_edid(connector, &intel_dp->aux.ddc);
>>  if (edid) {
>> --
>> 2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v4 0/7] Convert the intel iommu driver to the dma-iommu api

[Tvrtko Ursulin]

On 29/09/2020 01:11, Lu Baolu wrote:

Hi Tvrtko,

On 9/28/20 5:44 PM, Tvrtko Ursulin wrote:


On 27/09/2020 07:34, Lu Baolu wrote:

Hi,

The previous post of this series could be found here.

https://lore.kernel.org/linux-iommu/20200912032200.11489-1-baolu...@linux.intel.com/ 



This version introduce a new patch [4/7] to fix an issue reported here.

https://lore.kernel.org/linux-iommu/51a1baec-48d1-c0ac-181b-1fba92aa4...@linux.intel.com/ 



There aren't any other changes.

Please help to test and review.

Best regards,
baolu

Lu Baolu (3):
   iommu: Add quirk for Intel graphic devices in map_sg


Since I do have patches to fix i915 to handle this, do we want to 
co-ordinate the two and avoid having to add this quirk and then later 
remove it? Or you want to go the staged approach?


I have no preference. It depends on which patch goes first. Let the
maintainers help here.


FYI we have merged the required i915 patches to out tree last week or 
so. I *think* this means they will go into 5.11. So the i915 specific 
workaround patch will not be needed in Intel IOMMU.


Regards,

Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: use opregion mailbox #5 EDID for eDP, if available

[Jani Nikula]

On Mon, 12 Oct 2020, "Lee, Shawn C"  wrote:
> On Fri, Aug 28, 2020 at 06:19AM, Shankar Uma wrote:
>>> -Original Message-
>>> From: Jani Nikula 
>>> Sent: Friday, August 28, 2020 11:50 AM
>>> To: intel-gfx@lists.freedesktop.org
>>> Cc: Nikula, Jani ; Shankar, Uma
>>> 
>>> Subject: [PATCH 2/2] drm/i915/dp: use opregion mailbox #5 EDID for eDP, if
>>> available
>>>
>>> If a panel's EDID is broken, there may be an override EDID set in the ACPI
>>> OpRegion mailbox #5. Use it if available.
>>
>>Looks Good to me.
>>Reviewed-by: Uma Shankar 
>>
>>> Cc: Uma Shankar 
>>> Signed-off-by: Jani Nikula 
>>> ---
>>>  drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
>>>  1 file changed, 3 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>>> b/drivers/gpu/drm/i915/display/intel_dp.c
>>> index c57ac83bf563..d1307be196a2 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>> @@ -8114,6 +8114,9 @@ static bool intel_edp_init_connector(struct intel_dp
>>> *intel_dp,
>>>  goto out_vdd_off;
>>>  }
>>>
>>> +/* Set up override EDID, if any, from ACPI OpRegion */
>>> +intel_opregion_edid_override(intel_connector);
>>> +
>
> Customer report DUT still get EDID from eDP panel instead of mailbox #5.
> After some investigations, this change can retrieve EDID from mailbox #5 
> properly.
> But driver still used panel's EDID to enable eDP display. This is because of 
> drm_get_edid()
> was executed after intel_opregion_edid_override(). drm_get_edid() return 
> panel's EDID
> and overwrite mailbox #5's.

In recent kernels, drm_get_edid() respects EDID override, and calling
drm_get_edid() will return the override EDID from mailbox #5 instead of
retrieving the actual EDID.

Check the kernel version they're using and the drm_get_edid()
implementation.

BR,
Jani.


>
> We try to move drm_get_edid() before intel_opregion_edid_override().
> The test result is positive, mailbox #5 EDID will substitute for panel's.
> It seems we may need some additional change for this patch. Thanks!
>
> Best regards,
> Shawn
>
>>>  mutex_lock(&dev->mode_config.mutex);
>>>  edid = drm_get_edid(connector, &intel_dp->aux.ddc);
>>>  if (edid) {
>>> --
>>> 2.20.1

-- 
Jani Nikula, Intel Open Source Graphics Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/vgem: Replace vgem_object_funcs with the common drm shmem helper

[Chris Wilson]

Quoting Daniel Vetter (2020-10-09 17:16:06)
> On Fri, Oct 9, 2020 at 12:21 PM Chris Wilson  wrote:
> >
> > vgem is a minimalistic driver that provides shmemfs objects to
> > userspace that may then be used as an in-memory surface and transported
> > across dma-buf to other drivers. Since it's introduction,
> > drm_gem_shmem_helper now provides the same shmemfs facilities and so we
> > can trim vgem to wrap the helper.
> >
> > Signed-off-by: Chris Wilson 
> > ---
> >  drivers/gpu/drm/Kconfig |   1 +
> >  drivers/gpu/drm/vgem/vgem_drv.c | 281 ++--
> >  drivers/gpu/drm/vgem/vgem_drv.h |  11 --
> >  3 files changed, 13 insertions(+), 280 deletions(-)
> 
> Nice diffstat :-)
> 
> Reviewed-by: Daniel Vetter 

Unfortunately I had to drop the drm_gem_prime_mmap() since the existing
expectation is that we hand the faulthandler off to shmemfs so we can
release the module while the memory is exported. The other issue happens
to be for arch/x86 where just setting PAT=WC on the PTE does not flush
the cache for that page, and the CPU will preferentially use the cache.
That has caught us out more than once.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 1/2] drm: Ask whether drm_gem_get_pages() should clear the CPU cache

[Chris Wilson]

On some processors (such as arch/x86), accessing a page via a WC PAT is
bypassed if the page is physically tagged in the CPU cache, and the
access is serviced by the cache instead -- which leads to incoherency
should the physical page itself be accessed using DMA. In order to
prevent the false cache sharing of the physical pages, we need to
explicitly flush the cache lines of those pages.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/drm_gem.c   | 8 ++--
 drivers/gpu/drm/drm_gem_shmem_helper.c  | 8 +++-
 drivers/gpu/drm/etnaviv/etnaviv_gem.c   | 2 +-
 drivers/gpu/drm/gma500/gtt.c| 2 +-
 drivers/gpu/drm/msm/msm_gem.c   | 2 +-
 drivers/gpu/drm/omapdrm/omap_gem.c  | 2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 2 +-
 drivers/gpu/drm/tegra/gem.c | 2 +-
 drivers/gpu/drm/vgem/vgem_drv.c | 2 +-
 drivers/gpu/drm/vkms/vkms_gem.c | 2 +-
 drivers/gpu/drm/xen/xen_drm_front_gem.c | 2 +-
 include/drm/drm_gem.h   | 2 +-
 12 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 1da67d34e55d..1948855d69e6 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -40,6 +40,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -525,6 +526,7 @@ static void drm_gem_check_release_pagevec(struct pagevec 
*pvec)
  * drm_gem_get_pages - helper to allocate backing pages for a GEM object
  * from shmem
  * @obj: obj in question
+ * @clflush: whether to clear any CPU caches associated with the backing store
  *
  * This reads the page-array of the shmem-backing storage of the given gem
  * object. An array of pages is returned. If a page is not allocated or
@@ -546,14 +548,13 @@ static void drm_gem_check_release_pagevec(struct pagevec 
*pvec)
  * drm_gem_object_init(), but not for those initialized with
  * drm_gem_private_object_init() only.
  */
-struct page **drm_gem_get_pages(struct drm_gem_object *obj)
+struct page **drm_gem_get_pages(struct drm_gem_object *obj, bool clflush)
 {
struct address_space *mapping;
struct page *p, **pages;
struct pagevec pvec;
int i, npages;
 
-
if (WARN_ON(!obj->filp))
return ERR_PTR(-EINVAL);
 
@@ -589,6 +590,9 @@ struct page **drm_gem_get_pages(struct drm_gem_object *obj)
(page_to_pfn(p) >= 0x0010UL));
}
 
+   if (clflush)
+   drm_clflush_pages(pages, npages);
+
return pages;
 
 fail:
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c 
b/drivers/gpu/drm/drm_gem_shmem_helper.c
index fb11df7aced5..78a2eb77802b 100644
--- a/drivers/gpu/drm/drm_gem_shmem_helper.c
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -152,7 +152,13 @@ static int drm_gem_shmem_get_pages_locked(struct 
drm_gem_shmem_object *shmem)
if (shmem->pages_use_count++ > 0)
return 0;
 
-   pages = drm_gem_get_pages(obj);
+   /*
+* On some processors (such as arch/x86), accessing a page via a WC PAT
+* is bypassed if the page is physically tagged in the CPU cache, and
+* the access is serviced by the cache instead -- which leads to
+* incoherency should the physical page itself be accessed using DMA.
+*/
+   pages = drm_gem_get_pages(obj, !shmem->map_cached);
if (IS_ERR(pages)) {
DRM_DEBUG_KMS("Failed to get pages (%ld)\n", PTR_ERR(pages));
shmem->pages_use_count = 0;
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
index 67d9a2b9ea6a..d8279ea363b3 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
@@ -58,7 +58,7 @@ static void etnaviv_gem_scatterlist_unmap(struct 
etnaviv_gem_object *etnaviv_obj
 static int etnaviv_gem_shmem_get_pages(struct etnaviv_gem_object *etnaviv_obj)
 {
struct drm_device *dev = etnaviv_obj->base.dev;
-   struct page **p = drm_gem_get_pages(&etnaviv_obj->base);
+   struct page **p = drm_gem_get_pages(&etnaviv_obj->base, false);
 
if (IS_ERR(p)) {
dev_dbg(dev->dev, "could not get pages: %ld\n", PTR_ERR(p));
diff --git a/drivers/gpu/drm/gma500/gtt.c b/drivers/gpu/drm/gma500/gtt.c
index 9278bcfad1bf..ada56aec7e68 100644
--- a/drivers/gpu/drm/gma500/gtt.c
+++ b/drivers/gpu/drm/gma500/gtt.c
@@ -197,7 +197,7 @@ static int psb_gtt_attach_pages(struct gtt_range *gt)
 
WARN_ON(gt->pages);
 
-   pages = drm_gem_get_pages(>->gem);
+   pages = drm_gem_get_pages(>->gem, false);
if (IS_ERR(pages))
return PTR_ERR(pages);
 
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index c79828d31822..a7a67ef4e27e 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -102,7 +102,7 @@ static struct page **get_pages(struct drm_gem_object *obj)

[Intel-gfx] [PATCH 2/2] drm/vgem: Replace vgem_object_funcs with the common drm shmem helper

[Chris Wilson]

vgem is a minimalistic driver that provides shmemfs objects to
userspace that may then be used as an in-memory surface and transported
across dma-buf to other drivers. Since vgem's introduction,
drm_gem_shmem_helper now provides the same shmemfs facilities and so we
can trim vgem to wrap the helper.

v2: The gem prime mmap helper does not handle exchanging the vma->file,
so skip the conversion to the common prime helper and leave the patch
only converting to the common shmem helper.

Signed-off-by: Chris Wilson 
Reviewed-by: Daniel Vetter  #v1
---
 drivers/gpu/drm/Kconfig |   1 +
 drivers/gpu/drm/vgem/vgem_drv.c | 284 +++-
 drivers/gpu/drm/vgem/vgem_drv.h |  11 --
 3 files changed, 25 insertions(+), 271 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 147d61b9674e..db2ff76638cd 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -278,6 +278,7 @@ source "drivers/gpu/drm/i915/Kconfig"
 config DRM_VGEM
tristate "Virtual GEM provider"
depends on DRM
+   select DRM_GEM_SHMEM_HELPER
help
  Choose this option to get a virtual graphics memory manager,
  as used by Mesa's software renderer for enhanced performance.
diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem/vgem_drv.c
index f38dd590fa45..6811ac518509 100644
--- a/drivers/gpu/drm/vgem/vgem_drv.c
+++ b/drivers/gpu/drm/vgem/vgem_drv.c
@@ -38,6 +38,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -50,87 +51,11 @@
 #define DRIVER_MAJOR   1
 #define DRIVER_MINOR   0
 
-static const struct drm_gem_object_funcs vgem_gem_object_funcs;
-
 static struct vgem_device {
struct drm_device drm;
struct platform_device *platform;
 } *vgem_device;
 
-static void vgem_gem_free_object(struct drm_gem_object *obj)
-{
-   struct drm_vgem_gem_object *vgem_obj = to_vgem_bo(obj);
-
-   kvfree(vgem_obj->pages);
-   mutex_destroy(&vgem_obj->pages_lock);
-
-   if (obj->import_attach)
-   drm_prime_gem_destroy(obj, vgem_obj->table);
-
-   drm_gem_object_release(obj);
-   kfree(vgem_obj);
-}
-
-static vm_fault_t vgem_gem_fault(struct vm_fault *vmf)
-{
-   struct vm_area_struct *vma = vmf->vma;
-   struct drm_vgem_gem_object *obj = vma->vm_private_data;
-   /* We don't use vmf->pgoff since that has the fake offset */
-   unsigned long vaddr = vmf->address;
-   vm_fault_t ret = VM_FAULT_SIGBUS;
-   loff_t num_pages;
-   pgoff_t page_offset;
-   page_offset = (vaddr - vma->vm_start) >> PAGE_SHIFT;
-
-   num_pages = DIV_ROUND_UP(obj->base.size, PAGE_SIZE);
-
-   if (page_offset >= num_pages)
-   return VM_FAULT_SIGBUS;
-
-   mutex_lock(&obj->pages_lock);
-   if (obj->pages) {
-   get_page(obj->pages[page_offset]);
-   vmf->page = obj->pages[page_offset];
-   ret = 0;
-   }
-   mutex_unlock(&obj->pages_lock);
-   if (ret) {
-   struct page *page;
-
-   page = shmem_read_mapping_page(
-   file_inode(obj->base.filp)->i_mapping,
-   page_offset);
-   if (!IS_ERR(page)) {
-   vmf->page = page;
-   ret = 0;
-   } else switch (PTR_ERR(page)) {
-   case -ENOSPC:
-   case -ENOMEM:
-   ret = VM_FAULT_OOM;
-   break;
-   case -EBUSY:
-   ret = VM_FAULT_RETRY;
-   break;
-   case -EFAULT:
-   case -EINVAL:
-   ret = VM_FAULT_SIGBUS;
-   break;
-   default:
-   WARN_ON(PTR_ERR(page));
-   ret = VM_FAULT_SIGBUS;
-   break;
-   }
-
-   }
-   return ret;
-}
-
-static const struct vm_operations_struct vgem_gem_vm_ops = {
-   .fault = vgem_gem_fault,
-   .open = drm_gem_vm_open,
-   .close = drm_gem_vm_close,
-};
-
 static int vgem_open(struct drm_device *dev, struct drm_file *file)
 {
struct vgem_file *vfile;
@@ -159,33 +84,15 @@ static void vgem_postclose(struct drm_device *dev, struct 
drm_file *file)
kfree(vfile);
 }
 
-static struct drm_vgem_gem_object *__vgem_gem_create(struct drm_device *dev,
-   unsigned long size)
+static struct drm_gem_shmem_object *__vgem_gem_create(struct drm_device *dev,
+ unsigned long size)
 {
-   struct drm_vgem_gem_object *obj;
-   int ret;
-
-   obj = kzalloc(sizeof(*obj), GFP_KERNEL);
-   if (!obj)
-   return ERR_PTR(-ENOMEM);
-
-   obj->base.funcs = 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm: Ask whether drm_gem_get_pages() should clear the CPU cache

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm: Ask whether drm_gem_get_pages() should 
clear the CPU cache
URL   : https://patchwork.freedesktop.org/series/82569/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:257:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm: Ask whether drm_gem_get_pages() should clear the CPU cache

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm: Ask whether drm_gem_get_pages() should 
clear the CPU cache
URL   : https://patchwork.freedesktop.org/series/82569/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9128 -> Patchwork_18672


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/index.html

Known issues


  Here are the changes found in Patchwork_18672 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_module_load@reload:
- fi-bsw-kefka:   [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-bsw-kefka/igt@i915_module_l...@reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-bsw-kefka/igt@i915_module_l...@reload.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900:   [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@kms_busy@basic@flip:
- fi-kbl-x1275:   [PASS][5] -> [DMESG-WARN][6] ([i915#62] / [i915#92] / 
[i915#95]) +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-kbl-x1275/igt@kms_busy@ba...@flip.html

  * igt@vgem_basic@unload:
- fi-skl-guc: [PASS][7] -> [DMESG-WARN][8] ([i915#2203])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-skl-guc/igt@vgem_ba...@unload.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-skl-guc/igt@vgem_ba...@unload.html

  
 Possible fixes 

  * {igt@core_hotunplug@unbind-rebind}:
- fi-kbl-x1275:   [DMESG-WARN][9] ([i915#62] / [i915#92]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-kbl-x1275/igt@core_hotunp...@unbind-rebind.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-kbl-x1275/igt@core_hotunp...@unbind-rebind.html

  * igt@gem_exec_suspend@basic-s3:
- fi-snb-2600:[DMESG-WARN][11] ([i915#42]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-snb-2600/igt@gem_exec_susp...@basic-s3.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-snb-2600/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-u2:  [INCOMPLETE][13] ([i915#2557]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7500u:   [DMESG-WARN][15] ([i915#2203]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-kbl-7500u/igt@kms_chamel...@common-hpd-after-suspend.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-kbl-7500u/igt@kms_chamel...@common-hpd-after-suspend.html

  
 Warnings 

  * igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275:   [DMESG-WARN][17] ([i915#62] / [i915#92]) -> 
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html

  * igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275:   [DMESG-FAIL][19] ([i915#62]) -> [DMESG-FAIL][20] 
([i915#62] / [i915#95])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-kbl-x1275/igt@i915_pm_...@module-reload.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-x1275:   [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95]) 
-> [DMESG-WARN][22] ([i915#62] / [i915#92]) +3 similar issues
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9128/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18672/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#2557]: https://gitlab.freedesktop.org/drm/intel/issues/2557
  [i

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for rm/i915: Add support for LTTPR non-transparent link training mode (rev2)

[Imre Deak]

On Thu, Oct 08, 2020 at 08:02:09PM +, Patchwork wrote:
> == Series Details ==
> 
> Series: rm/i915: Add support for LTTPR non-transparent link training mode 
> (rev2)
> URL   : https://patchwork.freedesktop.org/series/82449/
> State : success

Thanks for the reviews, patchset is pushed to -dinq.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_9113_full -> Patchwork_18658_full
> 
> 
> Summary
> ---
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_18658_full:
> 
> ### IGT changes ###
> 
>  Suppressed 
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * {igt@gem_exec_capture@pi@vcs0}:
> - shard-skl:  NOTRUN -> [INCOMPLETE][1]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl9/igt@gem_exec_capture@p...@vcs0.html
> 
>   
> Known issues
> 
> 
>   Here are the changes found in Patchwork_18658_full that come from known 
> issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@gem_exec_suspend@basic-s0:
> - shard-iclb: [PASS][2] -> [INCOMPLETE][3] ([i915#1090] / 
> [i915#1185])
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-iclb2/igt@gem_exec_susp...@basic-s0.html
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-iclb3/igt@gem_exec_susp...@basic-s0.html
> 
>   * igt@gem_huc_copy@huc-copy:
> - shard-tglb: [PASS][4] -> [SKIP][5] ([i915#2190])
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-tglb7/igt@gem_huc_c...@huc-copy.html
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-tglb6/igt@gem_huc_c...@huc-copy.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup@wc:
> - shard-hsw:  [PASS][6] -> [FAIL][7] ([i915#1888]) +1 similar 
> issue
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@wc.html
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-...@wc.html
> 
>   * igt@i915_pm_dc@dc6-psr:
> - shard-skl:  [PASS][8] -> [FAIL][9] ([i915#454])
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@i915_pm...@dc6-psr.html
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl10/igt@i915_pm...@dc6-psr.html
> 
>   * igt@kms_cursor_legacy@cursor-vs-flip-toggle:
> - shard-hsw:  [PASS][10] -> [FAIL][11] ([i915#2370])
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-hsw2/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-hsw8/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html
> 
>   * igt@kms_draw_crc@draw-method-rgb565-render-untiled:
> - shard-skl:  [PASS][12] -> [FAIL][13] ([i915#52] / [i915#54])
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl2/igt@kms_draw_...@draw-method-rgb565-render-untiled.html
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl8/igt@kms_draw_...@draw-method-rgb565-render-untiled.html
> 
>   * igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-untiled:
> - shard-snb:  [PASS][14] -> [SKIP][15] ([fdo#109271])
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-snb4/igt@kms_draw_...@draw-method-xrgb2101010-pwrite-untiled.html
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-snb2/igt@kms_draw_...@draw-method-xrgb2101010-pwrite-untiled.html
> 
>   * igt@kms_flip@flip-vs-blocking-wf-vblank@a-dp1:
> - shard-kbl:  [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +1 
> similar issue
>[16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-kbl1/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html
>[17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-kbl6/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-dp1.html
> 
>   * igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
> - shard-skl:  [PASS][18] -> [DMESG-WARN][19] ([i915#1982]) +5 
> similar issues
>[18]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl7/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
>[19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18658/shard-skl5/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-edp1.html
> 
>   * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
> - shard-skl:  [PASS][20] -> [FAIL][21] ([i915#79])
>[20]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9113/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-edp1.html
>[21]: 
> https

[Intel-gfx] [PATCH] drm/i915: DMA map DSM [stolen memory]

[Chris Wilson]

Pass the physical address of our BIOS reserved stolen memory to the dma
mapper so we convert it into a proper dma_addr_t and track access with
the iommu.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 21 -
 drivers/gpu/drm/i915/i915_drv.h|  5 +
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 0be5e8683337..ecb4ee6ac19d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -162,6 +162,11 @@ static void i915_gem_cleanup_stolen(struct 
drm_i915_private *i915)
if (!drm_mm_initialized(&i915->mm.stolen))
return;
 
+   dma_unmap_resource(i915->drm.dev,
+  i915->dsm_dma, resource_size(&i915->dsm),
+  DMA_BIDIRECTIONAL,
+  DMA_ATTR_NO_WARN);
+
drm_mm_takedown(&i915->mm.stolen);
 }
 
@@ -489,6 +494,19 @@ static int i915_gem_init_stolen(struct drm_i915_private 
*i915)
i915->stolen_usable_size =
resource_size(&i915->dsm) - reserved_total;
 
+   i915->dsm_dma =
+   dma_map_resource(i915->drm.dev,
+i915->dsm.start, resource_size(&i915->dsm),
+DMA_BIDIRECTIONAL,
+DMA_ATTR_NO_KERNEL_MAPPING |
+DMA_ATTR_SKIP_CPU_SYNC);
+   if (dma_mapping_error(i915->drm.dev, i915->dsm_dma)) {
+   drm_err(&i915->drm,
+   "Failed to map stolen memory %pR for use with DMA\n",
+   &i915->dsm);
+   return 0; /* bail; continue to load the driver without stolen */
+   }
+
/* Basic memrange allocator for stolen space. */
drm_mm_init(&i915->mm.stolen, 0, i915->stolen_usable_size);
 
@@ -504,6 +522,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
struct scatterlist *sg;
 
GEM_BUG_ON(range_overflows(offset, size, resource_size(&i915->dsm)));
+   GEM_BUG_ON(dma_mapping_error(dev->dev, i915->dsm_dma));
 
/* We hide that we have no struct page backing our stolen object
 * by wrapping the contiguous physical allocation with a fake
@@ -523,7 +542,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
sg->offset = 0;
sg->length = size;
 
-   sg_dma_address(sg) = (dma_addr_t)i915->dsm.start + offset;
+   sg_dma_address(sg) = i915->dsm_dma + offset;
sg_dma_len(sg) = size;
 
return st;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9c2672c56cc1..44972eda7fb8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -836,6 +836,11 @@ struct drm_i915_private {
 */
struct resource dsm_reserved;
 
+   /**
+* dma-mapping of the Data Stolen Memory.
+*/
+   dma_addr_t dsm_dma;
+
/*
 * Stolen memory is segmented in hardware with different portions
 * offlimits to certain functions.
-- 
2.20.1

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/vgem: Replace vgem_object_funcs with the common drm shmem helper

[Daniel Vetter]

On Mon, Oct 12, 2020 at 12:49 PM Chris Wilson  wrote:
> Quoting Daniel Vetter (2020-10-09 17:16:06)
> > On Fri, Oct 9, 2020 at 12:21 PM Chris Wilson  
> > wrote:
> > >
> > > vgem is a minimalistic driver that provides shmemfs objects to
> > > userspace that may then be used as an in-memory surface and transported
> > > across dma-buf to other drivers. Since it's introduction,
> > > drm_gem_shmem_helper now provides the same shmemfs facilities and so we
> > > can trim vgem to wrap the helper.
> > >
> > > Signed-off-by: Chris Wilson 
> > > ---
> > >  drivers/gpu/drm/Kconfig |   1 +
> > >  drivers/gpu/drm/vgem/vgem_drv.c | 281 ++--
> > >  drivers/gpu/drm/vgem/vgem_drv.h |  11 --
> > >  3 files changed, 13 insertions(+), 280 deletions(-)
> >
> > Nice diffstat :-)
> >
> > Reviewed-by: Daniel Vetter 
>
> Unfortunately I had to drop the drm_gem_prime_mmap() since the existing
> expectation is that we hand the faulthandler off to shmemfs so we can
> release the module while the memory is exported.

That sounds like a broken igt. Once we have refcounting for
outstanding dma_fence/buf or anything else we'll block unloading of
the module (not unbinding of the driver). Which one is that?

> The other issue happens
> to be for arch/x86 where just setting PAT=WC on the PTE does not flush
> the cache for that page, and the CPU will preferentially use the cache.
> That has caught us out more than once.

Ah, the old disappointment around wc and dma-api on x86 I guess :-/
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/vgem: Replace vgem_object_funcs with the common drm shmem helper

[Chris Wilson]

Quoting Daniel Vetter (2020-10-12 14:55:07)
> On Mon, Oct 12, 2020 at 12:49 PM Chris Wilson  
> wrote:
> > Quoting Daniel Vetter (2020-10-09 17:16:06)
> > > On Fri, Oct 9, 2020 at 12:21 PM Chris Wilson  
> > > wrote:
> > > >
> > > > vgem is a minimalistic driver that provides shmemfs objects to
> > > > userspace that may then be used as an in-memory surface and transported
> > > > across dma-buf to other drivers. Since it's introduction,
> > > > drm_gem_shmem_helper now provides the same shmemfs facilities and so we
> > > > can trim vgem to wrap the helper.
> > > >
> > > > Signed-off-by: Chris Wilson 
> > > > ---
> > > >  drivers/gpu/drm/Kconfig |   1 +
> > > >  drivers/gpu/drm/vgem/vgem_drv.c | 281 ++--
> > > >  drivers/gpu/drm/vgem/vgem_drv.h |  11 --
> > > >  3 files changed, 13 insertions(+), 280 deletions(-)
> > >
> > > Nice diffstat :-)
> > >
> > > Reviewed-by: Daniel Vetter 
> >
> > Unfortunately I had to drop the drm_gem_prime_mmap() since the existing
> > expectation is that we hand the faulthandler off to shmemfs so we can
> > release the module while the memory is exported.
> 
> That sounds like a broken igt. Once we have refcounting for
> outstanding dma_fence/buf or anything else we'll block unloading of
> the module (not unbinding of the driver). Which one is that?

The dma-buf is closed; all that remains is the mmap. Then from the
perspective of the module, there is no reference back to the module
since we delegate handling of the mmap back to the owner, the shmemfs
builtin. That allows us to remove the module as its object code is no
longer required.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/ingenic: Fix bad revert

[Daniel Vetter]

On Mon, Oct 12, 2020 at 12:25:09PM +0200, Paul Cercueil wrote:
> Fix a badly reverted commit. The revert commit was cherry-picked from
> drm-misc-next to drm-misc-next-fixes, and in the process some unrelated
> code was added.
> 
> Fixes: a3fb64c00d44 "Revert "gpu/drm: ingenic: Add option to mmap GEM buffers 
> cached""
> Signed-off-by: Paul Cercueil 

Acked-by: Daniel Vetter 

And yes if you use git cherry-pick it'll do a 3 way merge, and
occasionally it's very tricky to resolve that properly. Especially when
you're not used to it.

What I tend to do to double check cerry-picks is git show both commits,
and compare the entire diff line-by-line to make sure I didn't misplace
anything.

Another trick is to use the raw patch instead of cherry-pick, since that
won't do a 3 way merge where you might get confused with other context and
fun stuff like that.

Cheers, Daniel
> ---
>  drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 16 
>  1 file changed, 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c 
> b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> index 1be1235bd546..a3d1617d7c67 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> @@ -440,20 +440,6 @@ void ingenic_drm_plane_config(struct device *dev,
>   }
>  }
>  
> -static void ingenic_drm_update_palette(struct ingenic_drm *priv,
> -const struct drm_color_lut *lut)
> -{
> - unsigned int i;
> -
> - for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); i++) {
> - u16 color = drm_color_lut_extract(lut[i].red, 5) << 11
> - | drm_color_lut_extract(lut[i].green, 6) << 5
> - | drm_color_lut_extract(lut[i].blue, 5);
> -
> - priv->dma_hwdescs->palette[i] = color;
> - }
> -}
> -
>  static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
>   struct drm_plane_state *oldstate)
>  {
> @@ -464,8 +450,6 @@ static void ingenic_drm_plane_atomic_update(struct 
> drm_plane *plane,
>   dma_addr_t addr;
>  
>   if (state && state->fb) {
> - crtc_state = state->crtc->state;
> -
>   addr = drm_fb_cma_get_gem_addr(state->fb, state, 0);
>   width = state->src_w >> 16;
>   height = state->src_h >> 16;
> -- 
> 2.28.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/vgem: Replace vgem_object_funcs with the common drm shmem helper

[Daniel Vetter]

On Mon, Oct 12, 2020 at 03:01:09PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2020-10-12 14:55:07)
> > On Mon, Oct 12, 2020 at 12:49 PM Chris Wilson  
> > wrote:
> > > Quoting Daniel Vetter (2020-10-09 17:16:06)
> > > > On Fri, Oct 9, 2020 at 12:21 PM Chris Wilson  
> > > > wrote:
> > > > >
> > > > > vgem is a minimalistic driver that provides shmemfs objects to
> > > > > userspace that may then be used as an in-memory surface and 
> > > > > transported
> > > > > across dma-buf to other drivers. Since it's introduction,
> > > > > drm_gem_shmem_helper now provides the same shmemfs facilities and so 
> > > > > we
> > > > > can trim vgem to wrap the helper.
> > > > >
> > > > > Signed-off-by: Chris Wilson 
> > > > > ---
> > > > >  drivers/gpu/drm/Kconfig |   1 +
> > > > >  drivers/gpu/drm/vgem/vgem_drv.c | 281 
> > > > > ++--
> > > > >  drivers/gpu/drm/vgem/vgem_drv.h |  11 --
> > > > >  3 files changed, 13 insertions(+), 280 deletions(-)
> > > >
> > > > Nice diffstat :-)
> > > >
> > > > Reviewed-by: Daniel Vetter 
> > >
> > > Unfortunately I had to drop the drm_gem_prime_mmap() since the existing
> > > expectation is that we hand the faulthandler off to shmemfs so we can
> > > release the module while the memory is exported.
> > 
> > That sounds like a broken igt. Once we have refcounting for
> > outstanding dma_fence/buf or anything else we'll block unloading of
> > the module (not unbinding of the driver). Which one is that?
> 
> The dma-buf is closed; all that remains is the mmap. Then from the
> perspective of the module, there is no reference back to the module
> since we delegate handling of the mmap back to the owner, the shmemfs
> builtin. That allows us to remove the module as its object code is no
> longer required.

Oh I know how that's possible, I wonder about which testcase encodes that.
Because it really shouldn't, since that's quite far away from the rough
consensus that we cobbled together on dri-devel a few months ago about how
hotunplug should work. If it's a vgem test, meh, we can change that
whenever. But if it's a generic test that falls over on vgem, then we need
to teach it better assumptions.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 10/61] drm/i915: Disable userptr pread/pwrite support.

[Maarten Lankhorst]

Op 02-10-2020 om 22:14 schreef Ruhl, Michael J:
>> -Original Message-
>> From: Intel-gfx  On Behalf Of
>> Maarten Lankhorst
>> Sent: Friday, October 2, 2020 8:59 AM
>> To: intel-gfx@lists.freedesktop.org
>> Subject: [Intel-gfx] [PATCH 10/61] drm/i915: Disable userptr pread/pwrite
>> support.
>>
>> Userptr should not need the kernel for a userspace memcpy, userspace
>> needs to call memcpy directly.
>>
>> Signed-off-by: Maarten Lankhorst 
>> ---
>> .../gpu/drm/i915/gem/i915_gem_object_types.h  |  2 ++
>> drivers/gpu/drm/i915/gem/i915_gem_userptr.c   | 20
>> +++
>> drivers/gpu/drm/i915/i915_gem.c   |  5 +
>> 3 files changed, 27 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> index 62dde3585b51..dbb6f6171165 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> @@ -57,6 +57,8 @@ struct drm_i915_gem_object_ops {
>>
>>  int (*pwrite)(struct drm_i915_gem_object *obj,
>>const struct drm_i915_gem_pwrite *arg);
>> +int (*pread)(struct drm_i915_gem_object *obj,
>> + const struct drm_i915_gem_pread *arg);
>>
>>  int (*dmabuf_export)(struct drm_i915_gem_object *obj);
>>  void (*release)(struct drm_i915_gem_object *obj);
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
>> b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
>> index 22008948be58..136a589e5d94 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
>> @@ -700,6 +700,24 @@ i915_gem_userptr_dmabuf_export(struct
>> drm_i915_gem_object *obj)
>>  return i915_gem_userptr_init__mmu_notifier(obj, 0);
>> }
>>
>> +static int
>> +i915_gem_userptr_pwrite(struct drm_i915_gem_object *obj,
>> +const struct drm_i915_gem_pwrite *args)
>> +{
>> +drm_dbg(obj->base.dev, "pwrite to userptr no longer allowed\n");
>> +
>> +return -EINVAL;
> I have seen ENOSYS used for unsupported pread/pwrite (see radeon_gem.c).
>
> I  have also seen ENOTSUPP for similar return values.
>
> Is EINVAL the correct response?

It seems for some other things we use -ENXIO, I don't think it matters in the 
end.

As long as we fail in some recognisable way, I'm fine with it. :)

I chose -EINVAL as we return the same error with r/o objects.

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: DMA map DSM [stolen memory]

[Patchwork]

== Series Details ==

Series: drm/i915: DMA map DSM [stolen memory]
URL   : https://patchwork.freedesktop.org/series/82575/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9129 -> Patchwork_18673


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_18673 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18673, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_18673:

### IGT changes ###

 Possible regressions 

  * igt@runner@aborted:
- fi-ilk-650: NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-ilk-650/igt@run...@aborted.html
- fi-pnv-d510:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-pnv-d510/igt@run...@aborted.html
- fi-skl-6600u:   NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-skl-6600u/igt@run...@aborted.html
- fi-gdg-551: NOTRUN -> [FAIL][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-gdg-551/igt@run...@aborted.html
- fi-snb-2520m:   NOTRUN -> [FAIL][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-snb-2520m/igt@run...@aborted.html
- fi-skl-lmem:NOTRUN -> [FAIL][6]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-skl-lmem/igt@run...@aborted.html
- fi-bwr-2160:NOTRUN -> [FAIL][7]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-bwr-2160/igt@run...@aborted.html
- fi-snb-2600:NOTRUN -> [FAIL][8]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-snb-2600/igt@run...@aborted.html
- fi-cml-u2:  NOTRUN -> [FAIL][9]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-cml-u2/igt@run...@aborted.html
- fi-byt-j1900:   NOTRUN -> [FAIL][10]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-byt-j1900/igt@run...@aborted.html
- fi-elk-e7500:   NOTRUN -> [FAIL][11]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-elk-e7500/igt@run...@aborted.html
- fi-cml-s:   NOTRUN -> [FAIL][12]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-cml-s/igt@run...@aborted.html
- fi-skl-guc: NOTRUN -> [FAIL][13]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-skl-guc/igt@run...@aborted.html
- fi-blb-e6850:   NOTRUN -> [FAIL][14]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-blb-e6850/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_18673 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2:  [PASS][15] -> [DMESG-WARN][16] ([i915#1982])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9129/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  
 Possible fixes 

  * igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2:  [DMESG-WARN][17] ([i915#1982]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9129/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-c:
- {fi-tgl-dsi}:   [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9129/fi-tgl-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18673/fi-tgl-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379


Participating hosts (46 -> 39)
--

  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_9129 -> Patchwork_18673

  CI-20190529: 20190529
  CI_DRM_9129: 4b6af251b88acefd229f6c81b0672343e051cf61

Re: [Intel-gfx] [PATCH] drm/vgem: Replace vgem_object_funcs with the common drm shmem helper

[Chris Wilson]

Quoting Daniel Vetter (2020-10-12 15:12:50)
> On Mon, Oct 12, 2020 at 03:01:09PM +0100, Chris Wilson wrote:
> > Quoting Daniel Vetter (2020-10-12 14:55:07)
> > > On Mon, Oct 12, 2020 at 12:49 PM Chris Wilson  
> > > wrote:
> > > > Quoting Daniel Vetter (2020-10-09 17:16:06)
> > > > > On Fri, Oct 9, 2020 at 12:21 PM Chris Wilson 
> > > > >  wrote:
> > > > > >
> > > > > > vgem is a minimalistic driver that provides shmemfs objects to
> > > > > > userspace that may then be used as an in-memory surface and 
> > > > > > transported
> > > > > > across dma-buf to other drivers. Since it's introduction,
> > > > > > drm_gem_shmem_helper now provides the same shmemfs facilities and 
> > > > > > so we
> > > > > > can trim vgem to wrap the helper.
> > > > > >
> > > > > > Signed-off-by: Chris Wilson 
> > > > > > ---
> > > > > >  drivers/gpu/drm/Kconfig |   1 +
> > > > > >  drivers/gpu/drm/vgem/vgem_drv.c | 281 
> > > > > > ++--
> > > > > >  drivers/gpu/drm/vgem/vgem_drv.h |  11 --
> > > > > >  3 files changed, 13 insertions(+), 280 deletions(-)
> > > > >
> > > > > Nice diffstat :-)
> > > > >
> > > > > Reviewed-by: Daniel Vetter 
> > > >
> > > > Unfortunately I had to drop the drm_gem_prime_mmap() since the existing
> > > > expectation is that we hand the faulthandler off to shmemfs so we can
> > > > release the module while the memory is exported.
> > > 
> > > That sounds like a broken igt. Once we have refcounting for
> > > outstanding dma_fence/buf or anything else we'll block unloading of
> > > the module (not unbinding of the driver). Which one is that?
> > 
> > The dma-buf is closed; all that remains is the mmap. Then from the
> > perspective of the module, there is no reference back to the module
> > since we delegate handling of the mmap back to the owner, the shmemfs
> > builtin. That allows us to remove the module as its object code is no
> > longer required.
> 
> Oh I know how that's possible, I wonder about which testcase encodes that.
> Because it really shouldn't, since that's quite far away from the rough
> consensus that we cobbled together on dri-devel a few months ago about how
> hotunplug should work. If it's a vgem test, meh, we can change that
> whenever. But if it's a generic test that falls over on vgem, then we need
> to teach it better assumptions.

We intentionally copied the module unload behaviour from i915.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915/psr: Configure and Program IO buffer Wake and Fast Wake

[Gwan-gyeong Mun]

As per b.spec 49274, the IO buffer Wake lines and Fast Wake lines can be
calculated based on the following formula.

 IO buffer wake lines = ROUNDUP(50us / total line time in us)
 Fast wake lines = ROUNDUP(32us / total line time in us)
 For both fields limit the minimum to 7 lines and maximum to 12 lines

It calculates IO buffer Wake and Fast Wake based on b.spec 49274 and
programs it.

Cc: José Roberto de Souza 
Cc: Lee Shawn C 
Signed-off-by: Gwan-gyeong Mun 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 67 +++-
 drivers/gpu/drm/i915/i915_drv.h  |  2 +
 drivers/gpu/drm/i915/i915_reg.h  |  4 ++
 3 files changed, 61 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 8a9d0bdde1bf..36b397acddb3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -538,19 +538,15 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
val |= intel_psr2_get_tp_time(intel_dp);
 
if (INTEL_GEN(dev_priv) >= 12) {
-   /*
-* TODO: 7 lines of IO_BUFFER_WAKE and FAST_WAKE are default
-* values from BSpec. In order to setting an optimal power
-* consumption, lower than 4k resoluition mode needs to decrese
-* IO_BUFFER_WAKE and FAST_WAKE. And higher than 4K resolution
-* mode needs to increase IO_BUFFER_WAKE and FAST_WAKE.
-*/
-   val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2;
-   val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(7);
-   val |= TGL_EDP_PSR2_FAST_WAKE(7);
+   if (dev_priv->psr.io_buffer_wake < 9 || dev_priv->psr.fast_wake 
< 9)
+   val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2;
+   else
+   val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_3;
+   val |= 
TGL_EDP_PSR2_IO_BUFFER_WAKE(dev_priv->psr.io_buffer_wake);
+   val |= TGL_EDP_PSR2_FAST_WAKE(dev_priv->psr.fast_wake);
} else if (INTEL_GEN(dev_priv) >= 9) {
-   val |= EDP_PSR2_IO_BUFFER_WAKE(7);
-   val |= EDP_PSR2_FAST_WAKE(7);
+   val |= EDP_PSR2_IO_BUFFER_WAKE(dev_priv->psr.io_buffer_wake);
+   val |= EDP_PSR2_FAST_WAKE(dev_priv->psr.fast_wake);
}
 
if (dev_priv->psr.psr2_sel_fetch_enabled) {
@@ -810,6 +806,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
int psr_setup_time;
+   u32 io_buffer_wake = EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES;
+   u32 fast_wake = EDP_PSR2_FAST_WAKE_MIN_LINES;
 
if (!CAN_PSR(dev_priv))
return;
@@ -859,6 +857,51 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
 
+   /*
+* B.Spec 49274
+* IO buffer wake lines = ROUNDUP(50us / total line time in us)
+* Fast wake lines = ROUNDUP(32us / total line time in us)
+* For both fields limit the minimum to 7 lines and maximum to 12 lines
+*/
+   io_buffer_wake = 
intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 50);
+   fast_wake = intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 
32);
+
+   if (INTEL_GEN(dev_priv) >= 12) {
+   if (io_buffer_wake < TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES ||
+   io_buffer_wake > TGL_EDP_PSR2_IO_BUFFER_WAKE_MAX_LINES) {
+   drm_dbg_kms(&dev_priv->drm,
+   "PSR condition failed: Invalid PSR2 IO 
Buffer Wake lines (%d)\n",
+   io_buffer_wake);
+   return;
+   }
+
+   if (fast_wake < TGL_EDP_PSR2_FAST_WAKE_MIN_LINES ||
+   fast_wake > TGL_EDP_PSR2_FAST_WAKE_MAX_LINES) {
+   drm_dbg_kms(&dev_priv->drm,
+   "PSR condition failed: Invalid PSR2 FAST 
Wake lines (%d)\n",
+   fast_wake);
+   return;
+   }
+   } else if (INTEL_GEN(dev_priv) >= 9) {
+   if (io_buffer_wake < EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES ||
+   io_buffer_wake > EDP_PSR2_IO_BUFFER_WAKE_MAX_LINES) {
+   drm_dbg_kms(&dev_priv->drm,
+   "PSR condition failed: Invalid PSR2 IO 
Buffer Wake lines (%d)\n",
+   io_buffer_wake);
+   return;
+   }
+
+   if (fast_wake < EDP_PSR2_FAST_WAKE_MIN_LINES ||
+   fast_wake > EDP_PSR2_FAST_WAKE_MAX_LINES) {
+   drm_dbg_kms(&dev_priv->drm,
+   "PSR condition failed: Invalid PSR2 FAST 
Wake lines (%d)\n",
+   fast_wake);
+ 

Re: [Intel-gfx] [PATCH 1/2] drm: Ask whether drm_gem_get_pages() should clear the CPU cache

[Daniel Vetter]

On Mon, Oct 12, 2020 at 11:51:30AM +0100, Chris Wilson wrote:
> On some processors (such as arch/x86), accessing a page via a WC PAT is
> bypassed if the page is physically tagged in the CPU cache, and the
> access is serviced by the cache instead -- which leads to incoherency
> should the physical page itself be accessed using DMA. In order to
> prevent the false cache sharing of the physical pages, we need to
> explicitly flush the cache lines of those pages.
> 
> Signed-off-by: Chris Wilson 

Hm I'd leave this out for now. dma-api/cache flushing, and especially on
x86 is kinda a mess. I'd just land v1 of your patch meanwhile for vgem.
-Daniel

> ---
>  drivers/gpu/drm/drm_gem.c   | 8 ++--
>  drivers/gpu/drm/drm_gem_shmem_helper.c  | 8 +++-
>  drivers/gpu/drm/etnaviv/etnaviv_gem.c   | 2 +-
>  drivers/gpu/drm/gma500/gtt.c| 2 +-
>  drivers/gpu/drm/msm/msm_gem.c   | 2 +-
>  drivers/gpu/drm/omapdrm/omap_gem.c  | 2 +-
>  drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 2 +-
>  drivers/gpu/drm/tegra/gem.c | 2 +-
>  drivers/gpu/drm/vgem/vgem_drv.c | 2 +-
>  drivers/gpu/drm/vkms/vkms_gem.c | 2 +-
>  drivers/gpu/drm/xen/xen_drm_front_gem.c | 2 +-
>  include/drm/drm_gem.h   | 2 +-
>  12 files changed, 23 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
> index 1da67d34e55d..1948855d69e6 100644
> --- a/drivers/gpu/drm/drm_gem.c
> +++ b/drivers/gpu/drm/drm_gem.c
> @@ -40,6 +40,7 @@
>  #include 
>  
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -525,6 +526,7 @@ static void drm_gem_check_release_pagevec(struct pagevec 
> *pvec)
>   * drm_gem_get_pages - helper to allocate backing pages for a GEM object
>   * from shmem
>   * @obj: obj in question
> + * @clflush: whether to clear any CPU caches associated with the backing 
> store
>   *
>   * This reads the page-array of the shmem-backing storage of the given gem
>   * object. An array of pages is returned. If a page is not allocated or
> @@ -546,14 +548,13 @@ static void drm_gem_check_release_pagevec(struct 
> pagevec *pvec)
>   * drm_gem_object_init(), but not for those initialized with
>   * drm_gem_private_object_init() only.
>   */
> -struct page **drm_gem_get_pages(struct drm_gem_object *obj)
> +struct page **drm_gem_get_pages(struct drm_gem_object *obj, bool clflush)
>  {
>   struct address_space *mapping;
>   struct page *p, **pages;
>   struct pagevec pvec;
>   int i, npages;
>  
> -
>   if (WARN_ON(!obj->filp))
>   return ERR_PTR(-EINVAL);
>  
> @@ -589,6 +590,9 @@ struct page **drm_gem_get_pages(struct drm_gem_object 
> *obj)
>   (page_to_pfn(p) >= 0x0010UL));
>   }
>  
> + if (clflush)
> + drm_clflush_pages(pages, npages);
> +
>   return pages;
>  
>  fail:
> diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c 
> b/drivers/gpu/drm/drm_gem_shmem_helper.c
> index fb11df7aced5..78a2eb77802b 100644
> --- a/drivers/gpu/drm/drm_gem_shmem_helper.c
> +++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
> @@ -152,7 +152,13 @@ static int drm_gem_shmem_get_pages_locked(struct 
> drm_gem_shmem_object *shmem)
>   if (shmem->pages_use_count++ > 0)
>   return 0;
>  
> - pages = drm_gem_get_pages(obj);
> + /*
> +  * On some processors (such as arch/x86), accessing a page via a WC PAT
> +  * is bypassed if the page is physically tagged in the CPU cache, and
> +  * the access is serviced by the cache instead -- which leads to
> +  * incoherency should the physical page itself be accessed using DMA.
> +  */
> + pages = drm_gem_get_pages(obj, !shmem->map_cached);
>   if (IS_ERR(pages)) {
>   DRM_DEBUG_KMS("Failed to get pages (%ld)\n", PTR_ERR(pages));
>   shmem->pages_use_count = 0;
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c 
> b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
> index 67d9a2b9ea6a..d8279ea363b3 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
> @@ -58,7 +58,7 @@ static void etnaviv_gem_scatterlist_unmap(struct 
> etnaviv_gem_object *etnaviv_obj
>  static int etnaviv_gem_shmem_get_pages(struct etnaviv_gem_object 
> *etnaviv_obj)
>  {
>   struct drm_device *dev = etnaviv_obj->base.dev;
> - struct page **p = drm_gem_get_pages(&etnaviv_obj->base);
> + struct page **p = drm_gem_get_pages(&etnaviv_obj->base, false);
>  
>   if (IS_ERR(p)) {
>   dev_dbg(dev->dev, "could not get pages: %ld\n", PTR_ERR(p));
> diff --git a/drivers/gpu/drm/gma500/gtt.c b/drivers/gpu/drm/gma500/gtt.c
> index 9278bcfad1bf..ada56aec7e68 100644
> --- a/drivers/gpu/drm/gma500/gtt.c
> +++ b/drivers/gpu/drm/gma500/gtt.c
> @@ -197,7 +197,7 @@ static int psb_gtt_attach_pages(struct gtt_range *gt)
>  
>   WARN_ON(gt->pages);
>  
> - pages = drm_gem_get_pag

[Intel-gfx] [PATCH v3] drm/i915/display: Add max plane width for NV12 AUX plane for Gen10+ platforms

[Aditya Swarup]

Gen 10+ and Gen11+ platforms specify different max plane width for
planar formats. Add max plane width for GLK and ICL based on
BSpec: 7666

Fixes: 372b9ffb5799 ("drm/i915: Fix skl+ max plane width")
Cc: Jani Nikula 
Cc: Matt Roper 
Cc: Ville Syrjälä 
Cc: Imre Deak 
Signed-off-by: Aditya Swarup 
---
 drivers/gpu/drm/i915/display/intel_display.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index cf1417ff54d7..59d20c351887 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4004,14 +4004,21 @@ static int skl_check_nv12_aux_surface(struct 
intel_plane_state *plane_state)
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
int uv_plane = 1;
-   int max_width = skl_max_plane_width(fb, uv_plane, rotation);
-   int max_height = 4096;
int x = plane_state->uapi.src.x1 >> 17;
int y = plane_state->uapi.src.y1 >> 17;
int w = drm_rect_width(&plane_state->uapi.src) >> 17;
int h = drm_rect_height(&plane_state->uapi.src) >> 17;
+   int max_height = 4096;
+   int max_width;
u32 offset;
 
+   if (INTEL_GEN(i915) >= 11)
+   max_width = icl_max_plane_width(fb, uv_plane, rotation);
+   else if (INTEL_GEN(i915) >= 10 || IS_GEMINILAKE(i915))
+   max_width = glk_max_plane_width(fb, uv_plane, rotation);
+   else
+   max_width = skl_max_plane_width(fb, uv_plane, rotation);
+
intel_add_fb_offsets(&x, &y, plane_state, uv_plane);
offset = intel_plane_compute_aligned_offset(&x, &y,
plane_state, uv_plane);
-- 
2.27.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2] drm/i915: DMA map DSM [stolen memory]

[Chris Wilson]

Pass the physical address of our BIOS reserved stolen memory to the dma
mapper so we convert it into a proper dma_addr_t and track access with
the iommu.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 29 +-
 drivers/gpu/drm/i915/i915_drv.h|  5 
 2 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 0be5e8683337..376b9ecd405a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -162,6 +162,12 @@ static void i915_gem_cleanup_stolen(struct 
drm_i915_private *i915)
if (!drm_mm_initialized(&i915->mm.stolen))
return;
 
+   if (i915->dsm_dma != i915->dsm.start)
+   dma_unmap_resource(i915->drm.dev,
+  i915->dsm_dma, resource_size(&i915->dsm),
+  DMA_BIDIRECTIONAL,
+  DMA_ATTR_NO_WARN);
+
drm_mm_takedown(&i915->mm.stolen);
 }
 
@@ -372,6 +378,18 @@ static void icl_get_stolen_reserved(struct 
drm_i915_private *i915,
}
 }
 
+static dma_addr_t remap_stolen(struct drm_i915_private *i915)
+{
+   if (pfn_valid(PHYS_PFN(i915->dsm.start)))
+   return (dma_addr_t)i915->dsm.start;
+
+   return dma_map_resource(i915->drm.dev,
+   i915->dsm.start, resource_size(&i915->dsm),
+   DMA_BIDIRECTIONAL,
+   DMA_ATTR_NO_KERNEL_MAPPING |
+   DMA_ATTR_SKIP_CPU_SYNC);
+}
+
 static int i915_gem_init_stolen(struct drm_i915_private *i915)
 {
struct intel_uncore *uncore = &i915->uncore;
@@ -489,6 +507,14 @@ static int i915_gem_init_stolen(struct drm_i915_private 
*i915)
i915->stolen_usable_size =
resource_size(&i915->dsm) - reserved_total;
 
+   i915->dsm_dma = remap_stolen(i915);
+   if (dma_mapping_error(i915->drm.dev, i915->dsm_dma)) {
+   drm_err(&i915->drm,
+   "Failed to map stolen memory %pR for use with DMA\n",
+   &i915->dsm);
+   return 0; /* bail; continue to load the driver without stolen */
+   }
+
/* Basic memrange allocator for stolen space. */
drm_mm_init(&i915->mm.stolen, 0, i915->stolen_usable_size);
 
@@ -504,6 +530,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
struct scatterlist *sg;
 
GEM_BUG_ON(range_overflows(offset, size, resource_size(&i915->dsm)));
+   GEM_BUG_ON(dma_mapping_error(dev->dev, i915->dsm_dma));
 
/* We hide that we have no struct page backing our stolen object
 * by wrapping the contiguous physical allocation with a fake
@@ -523,7 +550,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
sg->offset = 0;
sg->length = size;
 
-   sg_dma_address(sg) = (dma_addr_t)i915->dsm.start + offset;
+   sg_dma_address(sg) = i915->dsm_dma + offset;
sg_dma_len(sg) = size;
 
return st;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9c2672c56cc1..44972eda7fb8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -836,6 +836,11 @@ struct drm_i915_private {
 */
struct resource dsm_reserved;
 
+   /**
+* dma-mapping of the Data Stolen Memory.
+*/
+   dma_addr_t dsm_dma;
+
/*
 * Stolen memory is segmented in hardware with different portions
 * offlimits to certain functions.
-- 
2.20.1

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 27/61] drm/i915: Take obj lock around set_domain ioctl

[Maarten Lankhorst]

We need to lock the object to move it to the correct domain,
add the missing lock.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_domain.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c 
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 9adced5a6843..0c0a8579f495 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -531,6 +531,10 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void 
*data,
goto out;
}
 
+   err = i915_gem_object_lock_interruptible(obj, NULL);
+   if (err)
+   goto out;
+
/*
 * Flush and acquire obj->pages so that we are coherent through
 * direct access in memory with previous cached writes through
@@ -542,11 +546,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void 
*data,
 */
err = i915_gem_object_pin_pages(obj);
if (err)
-   goto out;
-
-   err = i915_gem_object_lock_interruptible(obj, NULL);
-   if (err)
-   goto out_unpin;
+   goto out_unlock;
 
if (read_domains & I915_GEM_DOMAIN_WC)
err = i915_gem_object_set_to_wc_domain(obj, write_domain);
@@ -558,13 +558,14 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void 
*data,
/* And bump the LRU for this access */
i915_gem_object_bump_inactive_ggtt(obj);
 
+   i915_gem_object_unpin_pages(obj);
+
+out_unlock:
i915_gem_object_unlock(obj);
 
-   if (write_domain)
+   if (!err && write_domain)
i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU);
 
-out_unpin:
-   i915_gem_object_unpin_pages(obj);
 out:
i915_gem_object_put(obj);
return err;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 26/61] drm/i915: Make __engine_unpark() compatible with ww locking.

[Maarten Lankhorst]

Take the ww lock around engine_unpark. Because of the
many many places where rpm is used, I chose the safest option
and used a trylock to opportunistically take this lock for
__engine_unpark.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c 
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index f7b2e07e2229..1ab9597a5c70 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -33,7 +33,8 @@ static int __engine_unpark(struct intel_wakeref *wf)
GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, &ce->flags));
 
/* First poison the image to verify we never fully trust it */
-   if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) && ce->state) {
+   if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) && ce->state &&
+   i915_gem_object_trylock(ce->state->obj)) {
struct drm_i915_gem_object *obj = ce->state->obj;
int type = i915_coherent_map_type(engine->i915);
void *map;
@@ -44,6 +45,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
i915_gem_object_flush_map(obj);
i915_gem_object_unpin_map(obj);
}
+   i915_gem_object_unlock(obj);
}
 
ce->ops->reset(ce);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 09/61] drm/i915: make lockdep slightly happier about execbuf.

[Maarten Lankhorst]

As soon as we install fences, we should stop allocating memory
in order to prevent any potential deadlocks.

This is required later on, when we start adding support for
dma-fence annotations.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 24 ++-
 drivers/gpu/drm/i915/i915_active.c| 20 
 drivers/gpu/drm/i915/i915_vma.c   |  8 ---
 drivers/gpu/drm/i915/i915_vma.h   |  3 +++
 4 files changed, 36 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 2fbe6fbe043a..ea2242f1b5b8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -49,11 +49,12 @@ enum {
 #define DBG_FORCE_RELOC 0 /* choose one of the above! */
 };
 
-#define __EXEC_OBJECT_HAS_PIN  BIT(31)
-#define __EXEC_OBJECT_HAS_FENCEBIT(30)
-#define __EXEC_OBJECT_NEEDS_MAPBIT(29)
-#define __EXEC_OBJECT_NEEDS_BIAS   BIT(28)
-#define __EXEC_OBJECT_INTERNAL_FLAGS   (~0u << 28) /* all of the above */
+/* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */
+#define __EXEC_OBJECT_HAS_PIN  BIT(30)
+#define __EXEC_OBJECT_HAS_FENCEBIT(29)
+#define __EXEC_OBJECT_NEEDS_MAPBIT(28)
+#define __EXEC_OBJECT_NEEDS_BIAS   BIT(27)
+#define __EXEC_OBJECT_INTERNAL_FLAGS   (~0u << 27) /* all of the above + */
 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | 
__EXEC_OBJECT_HAS_FENCE)
 
 #define __EXEC_HAS_RELOC   BIT(31)
@@ -925,6 +926,12 @@ static int eb_validate_vmas(struct i915_execbuffer *eb)
}
}
 
+   if (!(ev->flags & EXEC_OBJECT_WRITE)) {
+   err = dma_resv_reserve_shared(vma->resv, 1);
+   if (err)
+   return err;
+   }
+
GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
   eb_vma_misplaced(&eb->exec[i], vma, ev->flags));
}
@@ -2190,7 +2197,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
}
 
if (err == 0)
-   err = i915_vma_move_to_active(vma, eb->request, flags);
+   err = i915_vma_move_to_active(vma, eb->request,
+ flags | 
__EXEC_OBJECT_NO_RESERVE);
}
 
if (unlikely(err))
@@ -2442,6 +2450,10 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb,
if (err)
goto err_commit;
 
+   err = dma_resv_reserve_shared(shadow->resv, 1);
+   if (err)
+   goto err_commit;
+
/* Wait for all writes (and relocs) into the batch to complete */
err = i915_sw_fence_await_reservation(&pw->base.chain,
  pw->batch->resv, NULL, false,
diff --git a/drivers/gpu/drm/i915/i915_active.c 
b/drivers/gpu/drm/i915/i915_active.c
index b0a6522be3d1..2bf1e444dda7 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -296,18 +296,13 @@ static struct active_node *__active_lookup(struct 
i915_active *ref, u64 idx)
 static struct i915_active_fence *
 active_instance(struct i915_active *ref, u64 idx)
 {
-   struct active_node *node, *prealloc;
+   struct active_node *node;
struct rb_node **p, *parent;
 
node = __active_lookup(ref, idx);
if (likely(node))
return &node->base;
 
-   /* Preallocate a replacement, just in case */
-   prealloc = kmem_cache_alloc(global.slab_cache, GFP_KERNEL);
-   if (!prealloc)
-   return NULL;
-
spin_lock_irq(&ref->tree_lock);
GEM_BUG_ON(i915_active_is_idle(ref));
 
@@ -317,10 +312,8 @@ active_instance(struct i915_active *ref, u64 idx)
parent = *p;
 
node = rb_entry(parent, struct active_node, node);
-   if (node->timeline == idx) {
-   kmem_cache_free(global.slab_cache, prealloc);
+   if (node->timeline == idx)
goto out;
-   }
 
if (node->timeline < idx)
p = &parent->rb_right;
@@ -328,7 +321,14 @@ active_instance(struct i915_active *ref, u64 idx)
p = &parent->rb_left;
}
 
-   node = prealloc;
+   /*
+* XXX: We should preallocate this before i915_active_ref() is ever
+*  called, but we cannot call into fs_reclaim() anyway, so use 
GFP_ATOMIC.
+*/
+   node = kmem_cache_alloc(global.slab_cache, GFP_ATOMIC);
+   if (!node)
+   goto out;
+
__i915_active_fence_init(&node->base, NULL, node_retire);
node->ref = ref;
node->timeline = idx;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v2 08/61] drm/i915: Convert i915_gem_object_attach_phys() to ww locking

[Maarten Lankhorst]

Simple adding of i915_gem_object_lock, we may start to pass ww to
get_pages() in the future, but that won't be the case here;
We override shmem's get_pages() handling by calling
i915_gem_object_get_pages_phys(), no ww is needed.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_phys.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c 
b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
index 3960c1d9d415..153de6538378 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
@@ -182,7 +182,13 @@ int i915_gem_object_attach_phys(struct drm_i915_gem_object 
*obj, int align)
if (err)
return err;
 
-   mutex_lock_nested(&obj->mm.lock, I915_MM_GET_PAGES);
+   err = i915_gem_object_lock_interruptible(obj, NULL);
+   if (err)
+   return err;
+
+   err = mutex_lock_interruptible_nested(&obj->mm.lock, I915_MM_GET_PAGES);
+   if (err)
+   goto err_unlock;
 
if (unlikely(!i915_gem_object_has_struct_page(obj)))
goto out;
@@ -213,6 +219,8 @@ int i915_gem_object_attach_phys(struct drm_i915_gem_object 
*obj, int align)
 
 out:
mutex_unlock(&obj->mm.lock);
+err_unlock:
+   i915_gem_object_unlock(obj);
return err;
 }
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 10/61] drm/i915: Disable userptr pread/pwrite support.

[Maarten Lankhorst]

Userptr should not need the kernel for a userspace memcpy, userspace
needs to call memcpy directly.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  2 ++
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   | 20 +++
 drivers/gpu/drm/i915/i915_gem.c   |  5 +
 3 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index dcdff134ccc2..e84b279bfee6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -57,6 +57,8 @@ struct drm_i915_gem_object_ops {
 
int (*pwrite)(struct drm_i915_gem_object *obj,
  const struct drm_i915_gem_pwrite *arg);
+   int (*pread)(struct drm_i915_gem_object *obj,
+const struct drm_i915_gem_pread *arg);
 
int (*dmabuf_export)(struct drm_i915_gem_object *obj);
void (*release)(struct drm_i915_gem_object *obj);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 22008948be58..136a589e5d94 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -700,6 +700,24 @@ i915_gem_userptr_dmabuf_export(struct drm_i915_gem_object 
*obj)
return i915_gem_userptr_init__mmu_notifier(obj, 0);
 }
 
+static int
+i915_gem_userptr_pwrite(struct drm_i915_gem_object *obj,
+   const struct drm_i915_gem_pwrite *args)
+{
+   drm_dbg(obj->base.dev, "pwrite to userptr no longer allowed\n");
+
+   return -EINVAL;
+}
+
+static int
+i915_gem_userptr_pread(struct drm_i915_gem_object *obj,
+  const struct drm_i915_gem_pread *args)
+{
+   drm_dbg(obj->base.dev, "pread from userptr no longer allowed\n");
+
+   return -EINVAL;
+}
+
 static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = {
.name = "i915_gem_object_userptr",
.flags = I915_GEM_OBJECT_IS_SHRINKABLE |
@@ -708,6 +726,8 @@ static const struct drm_i915_gem_object_ops 
i915_gem_userptr_ops = {
.get_pages = i915_gem_userptr_get_pages,
.put_pages = i915_gem_userptr_put_pages,
.dmabuf_export = i915_gem_userptr_dmabuf_export,
+   .pwrite = i915_gem_userptr_pwrite,
+   .pread = i915_gem_userptr_pread,
.release = i915_gem_userptr_release,
 };
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 30af7e4b71ab..d349c0b796ec 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -526,6 +526,11 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
}
 
trace_i915_gem_object_pread(obj, args->offset, args->size);
+   ret = -ENODEV;
+   if (obj->ops->pread)
+   ret = obj->ops->pread(obj, args);
+   if (ret != -ENODEV)
+   goto out;
 
ret = i915_gem_object_wait(obj,
   I915_WAIT_INTERRUPTIBLE,
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 36/61] drm/i915: Add ww locking to dma-buf ops.

[Maarten Lankhorst]

vmap is using pin_pages, but needs to use ww locking,
add pin_pages_unlocked to correctly lock the mapping.

Also add ww locking to begin/end cpu access.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 60 --
 1 file changed, 33 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index 131ec53d8521..dfd483147b73 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -82,7 +82,7 @@ static int i915_gem_dmabuf_vmap(struct dma_buf *dma_buf, 
struct dma_buf_map *map
struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
void *vaddr;
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
 
@@ -124,42 +124,48 @@ static int i915_gem_begin_cpu_access(struct dma_buf 
*dma_buf, enum dma_data_dire
 {
struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
bool write = (direction == DMA_BIDIRECTIONAL || direction == 
DMA_TO_DEVICE);
+   struct i915_gem_ww_ctx ww;
int err;
 
-   err = i915_gem_object_pin_pages(obj);
-   if (err)
-   return err;
-
-   err = i915_gem_object_lock_interruptible(obj, NULL);
-   if (err)
-   goto out;
-
-   err = i915_gem_object_set_to_cpu_domain(obj, write);
-   i915_gem_object_unlock(obj);
-
-out:
-   i915_gem_object_unpin_pages(obj);
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   err = i915_gem_object_lock(obj, &ww);
+   if (!err)
+   err = i915_gem_object_pin_pages(obj);
+   if (!err) {
+   err = i915_gem_object_set_to_cpu_domain(obj, write);
+   i915_gem_object_unpin_pages(obj);
+   }
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
return err;
 }
 
 static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum 
dma_data_direction direction)
 {
struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
+   struct i915_gem_ww_ctx ww;
int err;
 
-   err = i915_gem_object_pin_pages(obj);
-   if (err)
-   return err;
-
-   err = i915_gem_object_lock_interruptible(obj, NULL);
-   if (err)
-   goto out;
-
-   err = i915_gem_object_set_to_gtt_domain(obj, false);
-   i915_gem_object_unlock(obj);
-
-out:
-   i915_gem_object_unpin_pages(obj);
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   err = i915_gem_object_lock(obj, &ww);
+   if (!err)
+   err = i915_gem_object_pin_pages(obj);
+   if (!err) {
+   err = i915_gem_object_set_to_gtt_domain(obj, false);
+   i915_gem_object_unpin_pages(obj);
+   }
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
return err;
 }
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 42/61] drm/i915/selftests: Prepare coherency tests for obj->mm.lock removal.

[Maarten Lankhorst]

Straightforward conversion, just convert a bunch of calls to
unlocked versions.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 2e439bb269d6..42aa3c5e0621 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -159,7 +159,7 @@ static int wc_set(struct context *ctx, unsigned long 
offset, u32 v)
if (err)
return err;
 
-   map = i915_gem_object_pin_map(ctx->obj, I915_MAP_WC);
+   map = i915_gem_object_pin_map_unlocked(ctx->obj, I915_MAP_WC);
if (IS_ERR(map))
return PTR_ERR(map);
 
@@ -182,7 +182,7 @@ static int wc_get(struct context *ctx, unsigned long 
offset, u32 *v)
if (err)
return err;
 
-   map = i915_gem_object_pin_map(ctx->obj, I915_MAP_WC);
+   map = i915_gem_object_pin_map_unlocked(ctx->obj, I915_MAP_WC);
if (IS_ERR(map))
return PTR_ERR(map);
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 24/61] drm/i915: Take reservation lock around i915_vma_pin.

[Maarten Lankhorst]

We previously complained when ww == NULL.

This function is now only used in selftests to pin an object,
and ww locking is now fixed.

Signed-off-by: Maarten Lankhorst 
---
 .../i915/gem/selftests/i915_gem_coherency.c   | 14 +
 drivers/gpu/drm/i915/i915_gem.c   |  6 +-
 drivers/gpu/drm/i915/i915_vma.c   |  4 +---
 drivers/gpu/drm/i915/i915_vma.h   | 20 +++
 4 files changed, 27 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 7049a6bbc03d..2e439bb269d6 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -199,16 +199,14 @@ static int gpu_set(struct context *ctx, unsigned long 
offset, u32 v)
u32 *cs;
int err;
 
+   vma = i915_gem_object_ggtt_pin(ctx->obj, NULL, 0, 0, 0);
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
+
i915_gem_object_lock(ctx->obj, NULL);
err = i915_gem_object_set_to_gtt_domain(ctx->obj, true);
if (err)
-   goto out_unlock;
-
-   vma = i915_gem_object_ggtt_pin(ctx->obj, NULL, 0, 0, 0);
-   if (IS_ERR(vma)) {
-   err = PTR_ERR(vma);
-   goto out_unlock;
-   }
+   goto out_unpin;
 
rq = intel_engine_create_kernel_request(ctx->engine);
if (IS_ERR(rq)) {
@@ -248,9 +246,7 @@ static int gpu_set(struct context *ctx, unsigned long 
offset, u32 v)
i915_request_add(rq);
 out_unpin:
i915_vma_unpin(vma);
-out_unlock:
i915_gem_object_unlock(ctx->obj);
-
return err;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d349c0b796ec..929a8f20cca4 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1036,7 +1036,11 @@ i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object 
*obj,
return ERR_PTR(ret);
}
 
-   ret = i915_vma_pin_ww(vma, ww, size, alignment, flags | PIN_GLOBAL);
+   if (ww)
+   ret = i915_vma_pin_ww(vma, ww, size, alignment, flags | 
PIN_GLOBAL);
+   else
+   ret = i915_vma_pin(vma, size, alignment, flags | PIN_GLOBAL);
+
if (ret)
return ERR_PTR(ret);
 
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index f50250c8685a..ed6cf4529d5d 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -861,9 +861,7 @@ int i915_vma_pin_ww(struct i915_vma *vma, struct 
i915_gem_ww_ctx *ww,
int err;
 
 #ifdef CONFIG_PROVE_LOCKING
-   if (debug_locks && lockdep_is_held(&vma->vm->i915->drm.struct_mutex))
-   WARN_ON(!ww);
-   if (debug_locks && ww && vma->resv)
+   if (debug_locks && !WARN_ON(!ww) && vma->resv)
assert_vma_held(vma);
 #endif
 
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 3c951d5428cf..cea6e7b8611b 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -246,10 +246,22 @@ i915_vma_pin_ww(struct i915_vma *vma, struct 
i915_gem_ww_ctx *ww,
 static inline int __must_check
 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 {
-#ifdef CONFIG_LOCKDEP
-   WARN_ON_ONCE(vma->resv && dma_resv_held(vma->resv));
-#endif
-   return i915_vma_pin_ww(vma, NULL, size, alignment, flags);
+   struct i915_gem_ww_ctx ww;
+   int err;
+
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   err = i915_gem_object_lock(vma->obj, &ww);
+   if (!err)
+   err = i915_vma_pin_ww(vma, &ww, size, alignment, flags);
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+
+   return err;
 }
 
 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 00/61] drm/i915: Remove obj->mm.lock!

[Maarten Lankhorst]

Finally there, just needs a lot of fixes!

A lot of places were calling certain calls without any object lock held,
with the removal of mm.lock we can no longer do this, and have to fix it.

Phys page handling has to be redone, as nothing protects obj->ops structure,
we have to remove swapping it, and move HAS_STRUCT_PAGE to obj->flags instead.

Userpointer locking is inverted, which we tried to get around with a workqueue.
We correct the lock ordering and try to acquire userptr pages first before 
taking
any ww locks. This is more compatible with the locking hierarchy, as we may need
to acquire mmap_sem.

The previous versione broke gem_exec_schedule@pi-shared/distinct-iova, but
now that we only unbind when required, this is now fixed.

We also have to fix some dma-work, the command parser and clflush are slightly
reworked to put all memory allocations and pinning in the preparation,
so the work could pass fence annotations.

In a few places like igt_spinner and execlists, we move some part of init to the
first pin, because we need to have the ww lock held and it makes it easier that 
way.

Finally we convert all selftests, and then remove obj->mm.lock!

Some fixes done to fix issues reported by review, and CI. Hopefully it's
completely clean now.

Test-with: 160251050446.31911.17220822522975733...@emeril.freedesktop.org

Maarten Lankhorst (60):
  drm/i915: Move cmd parser pinning to execbuffer
  drm/i915: Add missing -EDEADLK handling to execbuf pinning
  drm/i915: Do not share hwsp across contexts any more, v3.
  drm/i915: Ensure we hold the object mutex in pin correctly.
  drm/i915: Add gem object locking to madvise.
  drm/i915: Move HAS_STRUCT_PAGE to obj->flags
  drm/i915: Rework struct phys attachment handling
  drm/i915: Convert i915_gem_object_attach_phys() to ww locking
  drm/i915: make lockdep slightly happier about execbuf.
  drm/i915: Disable userptr pread/pwrite support.
  drm/i915: No longer allow exporting userptr through dma-buf
  drm/i915: Reject more ioctls for userptr
  drm/i915: Reject UNSYNCHRONIZED for userptr
  drm/i915: Fix userptr so we do not have to worry about obj->mm.lock,
v2.
  drm/i915: Flatten obj->mm.lock
  drm/i915: Pin timeline map after first timeline pin, v2.
  drm/i915: Populate logical context during first pin.
  drm/i915: Make ring submission compatible with obj->mm.lock removal,
v2.
  drm/i915: Handle ww locking in init_status_page
  drm/i915: Rework clflush to work correctly without obj->mm.lock.
  drm/i915: Pass ww ctx to intel_pin_to_display_plane
  drm/i915: Add object locking to vm_fault_cpu
  drm/i915: Move pinning to inside engine_wa_list_verify()
  drm/i915: Take reservation lock around i915_vma_pin.
  drm/i915: Make intel_init_workaround_bb more compatible with ww
locking.
  drm/i915: Make __engine_unpark() compatible with ww locking.
  drm/i915: Take obj lock around set_domain ioctl
  drm/i915: Defer pin calls in buffer pool until first use by caller.
  drm/i915: Fix pread/pwrite to work with new locking rules.
  drm/i915: Fix workarounds selftest, part 1
  drm/i915: Add igt_spinner_pin() to allow for ww locking around
spinner.
  drm/i915: Add ww locking around vm_access()
  drm/i915: Increase ww locking for perf.
  drm/i915: Lock ww in ucode objects correctly
  drm/i915: Add ww locking to dma-buf ops.
  drm/i915: Add missing ww lock in intel_dsb_prepare.
  drm/i915: Fix ww locking in shmem_create_from_object
  drm/i915: Use a single page table lock for each gtt.
  drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock
removal.
  drm/i915/selftests: Prepare client blit for obj->mm.lock removal.
  drm/i915/selftests: Prepare coherency tests for obj->mm.lock removal.
  drm/i915/selftests: Prepare context tests for obj->mm.lock removal.
  drm/i915/selftests: Prepare dma-buf tests for obj->mm.lock removal.
  drm/i915/selftests: Prepare execbuf tests for obj->mm.lock removal.
  drm/i915/selftests: Prepare mman testcases for obj->mm.lock removal.
  drm/i915/selftests: Prepare object tests for obj->mm.lock removal.
  drm/i915/selftests: Prepare object blit tests for obj->mm.lock
removal.
  drm/i915/selftests: Prepare igt_gem_utils for obj->mm.lock removal
  drm/i915/selftests: Prepare context selftest for obj->mm.lock removal
  drm/i915/selftests: Prepare hangcheck for obj->mm.lock removal
  drm/i915/selftests: Prepare execlists for obj->mm.lock removal
  drm/i915/selftests: Prepare mocs tests for obj->mm.lock removal
  drm/i915/selftests: Prepare ring submission for obj->mm.lock removal
  drm/i915/selftests: Prepare timeline tests for obj->mm.lock removal
  drm/i915/selftests: Prepare i915_request tests for obj->mm.lock
removal
  drm/i915/selftests: Prepare memory region tests for obj->mm.lock
removal
  drm/i915/selftests: Prepare cs engine tests for obj->mm.lock removal
  drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal
  drm/i915: Finally remove obj->mm.lock.
  drm/i915: Keep userpointer bindings if seq

[Intel-gfx] [PATCH v2 05/61] drm/i915: Add gem object locking to madvise.

[Maarten Lankhorst]

Doesn't need the full ww lock, only checking if pages are bound.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/i915_gem.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bb0c12975f38..30af7e4b71ab 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1071,10 +1071,14 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void 
*data,
if (!obj)
return -ENOENT;
 
-   err = mutex_lock_interruptible(&obj->mm.lock);
+   err = i915_gem_object_lock_interruptible(obj, NULL);
if (err)
goto out;
 
+   err = mutex_lock_interruptible(&obj->mm.lock);
+   if (err)
+   goto out_ww;
+
if (i915_gem_object_has_pages(obj) &&
i915_gem_object_is_tiled(obj) &&
i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
@@ -1119,6 +1123,8 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
args->retained = obj->mm.madv != __I915_MADV_PURGED;
mutex_unlock(&obj->mm.lock);
 
+out_ww:
+   i915_gem_object_unlock(obj);
 out:
i915_gem_object_put(obj);
return err;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 57/61] drm/i915/selftests: Prepare memory region tests for obj->mm.lock removal

[Maarten Lankhorst]

Use the unlocked variants for pin_map and pin_pages, and add lock
around unpinning/putting pages.

Signed-off-by: Maarten Lankhorst 
---
 .../drm/i915/selftests/intel_memory_region.c   | 18 +++---
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c 
b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
index 334b0648e253..ccd4b65a272f 100644
--- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
@@ -31,10 +31,12 @@ static void close_objects(struct intel_memory_region *mem,
struct drm_i915_gem_object *obj, *on;
 
list_for_each_entry_safe(obj, on, objects, st_link) {
+   i915_gem_object_lock(obj, NULL);
if (i915_gem_object_has_pinned_pages(obj))
i915_gem_object_unpin_pages(obj);
/* No polluting the memory region between tests */
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
list_del(&obj->st_link);
i915_gem_object_put(obj);
}
@@ -69,7 +71,7 @@ static int igt_mock_fill(void *arg)
break;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
i915_gem_object_put(obj);
break;
@@ -109,7 +111,7 @@ igt_object_create(struct intel_memory_region *mem,
if (IS_ERR(obj))
return obj;
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err)
goto put;
 
@@ -123,8 +125,10 @@ igt_object_create(struct intel_memory_region *mem,
 
 static void igt_object_release(struct drm_i915_gem_object *obj)
 {
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
list_del(&obj->st_link);
i915_gem_object_put(obj);
 }
@@ -280,7 +284,7 @@ static int igt_cpu_check(struct drm_i915_gem_object *obj, 
u32 dword, u32 val)
if (err)
return err;
 
-   ptr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   ptr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(ptr))
return PTR_ERR(ptr);
 
@@ -385,7 +389,7 @@ static int igt_lmem_create(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err)
goto out_put;
 
@@ -424,7 +428,7 @@ static int igt_lmem_write_gpu(void *arg)
goto out_file;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err)
goto out_put;
 
@@ -496,7 +500,7 @@ static int igt_lmem_write_cpu(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto out_put;
@@ -600,7 +604,7 @@ create_region_for_mapping(struct intel_memory_region *mr, 
u64 size, u32 type,
return obj;
}
 
-   addr = i915_gem_object_pin_map(obj, type);
+   addr = i915_gem_object_pin_map_unlocked(obj, type);
if (IS_ERR(addr)) {
i915_gem_object_put(obj);
if (PTR_ERR(addr) == -ENXIO)
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 29/61] drm/i915: Fix pread/pwrite to work with new locking rules.

[Maarten Lankhorst]

We are removing obj->mm.lock, and need to take the reservation lock
before we can pin pages. Move the pinning pages into the helper, and
merge gtt pwrite/pread preparation and cleanup paths.

The fence lock is also removed; it will conflict with fence annotations,
because of memory allocations done when pagefaulting inside copy_*_user.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/Makefile  |   1 -
 drivers/gpu/drm/i915/gem/i915_gem_fence.c  |  95 
 drivers/gpu/drm/i915/gem/i915_gem_object.h |   5 -
 drivers/gpu/drm/i915/i915_gem.c| 247 +++--
 4 files changed, 133 insertions(+), 215 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gem/i915_gem_fence.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e5574e506a5c..58d129b5a65a 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -134,7 +134,6 @@ gem-y += \
gem/i915_gem_dmabuf.o \
gem/i915_gem_domain.o \
gem/i915_gem_execbuffer.o \
-   gem/i915_gem_fence.o \
gem/i915_gem_internal.o \
gem/i915_gem_object.o \
gem/i915_gem_object_blt.o \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_fence.c 
b/drivers/gpu/drm/i915/gem/i915_gem_fence.c
deleted file mode 100644
index 8ab842c80f99..
--- a/drivers/gpu/drm/i915/gem/i915_gem_fence.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * SPDX-License-Identifier: MIT
- *
- * Copyright © 2019 Intel Corporation
- */
-
-#include "i915_drv.h"
-#include "i915_gem_object.h"
-
-struct stub_fence {
-   struct dma_fence dma;
-   struct i915_sw_fence chain;
-};
-
-static int __i915_sw_fence_call
-stub_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
-{
-   struct stub_fence *stub = container_of(fence, typeof(*stub), chain);
-
-   switch (state) {
-   case FENCE_COMPLETE:
-   dma_fence_signal(&stub->dma);
-   break;
-
-   case FENCE_FREE:
-   dma_fence_put(&stub->dma);
-   break;
-   }
-
-   return NOTIFY_DONE;
-}
-
-static const char *stub_driver_name(struct dma_fence *fence)
-{
-   return DRIVER_NAME;
-}
-
-static const char *stub_timeline_name(struct dma_fence *fence)
-{
-   return "object";
-}
-
-static void stub_release(struct dma_fence *fence)
-{
-   struct stub_fence *stub = container_of(fence, typeof(*stub), dma);
-
-   i915_sw_fence_fini(&stub->chain);
-
-   BUILD_BUG_ON(offsetof(typeof(*stub), dma));
-   dma_fence_free(&stub->dma);
-}
-
-static const struct dma_fence_ops stub_fence_ops = {
-   .get_driver_name = stub_driver_name,
-   .get_timeline_name = stub_timeline_name,
-   .release = stub_release,
-};
-
-struct dma_fence *
-i915_gem_object_lock_fence(struct drm_i915_gem_object *obj)
-{
-   struct stub_fence *stub;
-
-   assert_object_held(obj);
-
-   stub = kmalloc(sizeof(*stub), GFP_KERNEL);
-   if (!stub)
-   return NULL;
-
-   i915_sw_fence_init(&stub->chain, stub_notify);
-   dma_fence_init(&stub->dma, &stub_fence_ops, &stub->chain.wait.lock,
-  0, 0);
-
-   if (i915_sw_fence_await_reservation(&stub->chain,
-   obj->base.resv, NULL, true,
-   
i915_fence_timeout(to_i915(obj->base.dev)),
-   I915_FENCE_GFP) < 0)
-   goto err;
-
-   dma_resv_add_excl_fence(obj->base.resv, &stub->dma);
-
-   return &stub->dma;
-
-err:
-   stub_release(&stub->dma);
-   return NULL;
-}
-
-void i915_gem_object_unlock_fence(struct drm_i915_gem_object *obj,
- struct dma_fence *fence)
-{
-   struct stub_fence *stub = container_of(fence, typeof(*stub), dma);
-
-   i915_sw_fence_commit(&stub->chain);
-}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index d3086a59b5ad..9e87a2547b0d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -157,11 +157,6 @@ static inline void i915_gem_object_unlock(struct 
drm_i915_gem_object *obj)
dma_resv_unlock(obj->base.resv);
 }
 
-struct dma_fence *
-i915_gem_object_lock_fence(struct drm_i915_gem_object *obj);
-void i915_gem_object_unlock_fence(struct drm_i915_gem_object *obj,
- struct dma_fence *fence);
-
 static inline void
 i915_gem_object_set_readonly(struct drm_i915_gem_object *obj)
 {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 929a8f20cca4..4b5afb85efd1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -184,23 +184,38 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj,
 struct drm_i915_gem_pwrite *args,
 struct drm_file *file)
 {
-   void *vaddr = sg_page(obj->mm.pages->sgl) 

[Intel-gfx] [PATCH v2 23/61] drm/i915: Move pinning to inside engine_wa_list_verify()

[Maarten Lankhorst]

This should be done as part of the ww loop, in order to remove a
i915_vma_pin that needs ww held.

Now only i915_ggtt_pin() callers remaining.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 24 --
 .../gpu/drm/i915/gt/selftest_workarounds.c| 25 ---
 2 files changed, 32 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 78c5480c6401..42de1e05c35e 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2004,7 +2004,6 @@ create_scratch(struct i915_address_space *vm, int count)
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
unsigned int size;
-   int err;
 
size = round_up(count * sizeof(u32), PAGE_SIZE);
obj = i915_gem_object_create_internal(vm->i915, size);
@@ -2015,20 +2014,11 @@ create_scratch(struct i915_address_space *vm, int count)
 
vma = i915_vma_instance(obj, vm, NULL);
if (IS_ERR(vma)) {
-   err = PTR_ERR(vma);
-   goto err_obj;
+   i915_gem_object_put(obj);
+   return vma;
}
 
-   err = i915_vma_pin(vma, 0, 0,
-  i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);
-   if (err)
-   goto err_obj;
-
return vma;
-
-err_obj:
-   i915_gem_object_put(obj);
-   return ERR_PTR(err);
 }
 
 struct mcr_range {
@@ -2146,10 +2136,15 @@ static int engine_wa_list_verify(struct intel_context 
*ce,
if (err)
goto err_pm;
 
+   err = i915_vma_pin_ww(vma, &ww, 0, 0,
+  i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);
+   if (err)
+   goto err_unpin;
+
rq = i915_request_create(ce);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
-   goto err_unpin;
+   goto err_vma;
}
 
err = i915_request_await_object(rq, vma->obj, true);
@@ -2190,6 +2185,8 @@ static int engine_wa_list_verify(struct intel_context *ce,
 
 err_rq:
i915_request_put(rq);
+err_vma:
+   i915_vma_unpin(vma);
 err_unpin:
intel_context_unpin(ce);
 err_pm:
@@ -2200,7 +2197,6 @@ static int engine_wa_list_verify(struct intel_context *ce,
}
i915_gem_ww_ctx_fini(&ww);
intel_engine_pm_put(ce->engine);
-   i915_vma_unpin(vma);
i915_vma_put(vma);
return err;
 }
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c 
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 61a0532d0f3d..810ab026a55e 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -386,6 +386,25 @@ static struct i915_vma *create_batch(struct 
i915_address_space *vm)
return ERR_PTR(err);
 }
 
+static struct i915_vma *
+create_scratch_pinned(struct i915_address_space *vm, int count)
+{
+   struct i915_vma *vma = create_scratch(vm, count);
+   int err;
+
+   if (IS_ERR(vma))
+   return vma;
+
+   err = i915_vma_pin(vma, 0, 0,
+  i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);
+   if (err) {
+   i915_vma_put(vma);
+   return ERR_PTR(err);
+   }
+
+   return vma;
+}
+
 static u32 reg_write(u32 old, u32 new, u32 rsvd)
 {
if (rsvd == 0x) {
@@ -489,7 +508,7 @@ static int check_dirty_whitelist(struct intel_context *ce)
int err = 0, i, v;
u32 *cs, *results;
 
-   scratch = create_scratch(ce->vm, 2 * ARRAY_SIZE(values) + 1);
+   scratch = create_scratch_pinned(ce->vm, 2 * ARRAY_SIZE(values) + 1);
if (IS_ERR(scratch))
return PTR_ERR(scratch);
 
@@ -1043,7 +1062,7 @@ static int live_isolated_whitelist(void *arg)
 
vm = i915_gem_context_get_vm_rcu(c);
 
-   client[i].scratch[0] = create_scratch(vm, 1024);
+   client[i].scratch[0] = create_scratch_pinned(vm, 1024);
if (IS_ERR(client[i].scratch[0])) {
err = PTR_ERR(client[i].scratch[0]);
i915_vm_put(vm);
@@ -1051,7 +1070,7 @@ static int live_isolated_whitelist(void *arg)
goto err;
}
 
-   client[i].scratch[1] = create_scratch(vm, 1024);
+   client[i].scratch[1] = create_scratch_pinned(vm, 1024);
if (IS_ERR(client[i].scratch[1])) {
err = PTR_ERR(client[i].scratch[1]);
i915_vma_unpin_and_release(&client[i].scratch[0], 0);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 01/61] drm/i915: Move cmd parser pinning to execbuffer

[Maarten Lankhorst]

We need to get rid of allocations in the cmd parser, because it needs
to be called from a signaling context, first move all pinning to
execbuf, where we already hold all locks.

Allocate jump_whitelist in the execbuffer, and add annotations around
intel_engine_cmd_parser(), to ensure we only call the command parser
without allocating any memory, or taking any locks we're not supposed to.

Because i915_gem_object_get_page() may also allocate memory, add a
path to i915_gem_object_get_sg() that prevents memory allocations,
and walk the sg list manually. It should be similarly fast.

This has the added benefit of being able to catch all memory allocation
errors before the point of no return, and return -ENOMEM safely to the
execbuf submitter.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  74 -
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  10 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |  21 +++-
 drivers/gpu/drm/i915/gt/intel_ggtt.c  |   2 +-
 drivers/gpu/drm/i915/i915_cmd_parser.c| 104 --
 drivers/gpu/drm/i915/i915_drv.h   |   7 +-
 drivers/gpu/drm/i915/i915_memcpy.c|   2 +-
 drivers/gpu/drm/i915/i915_memcpy.h|   2 +-
 8 files changed, 142 insertions(+), 80 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 4b09bcd70cf4..63e2f16204da 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -27,6 +27,7 @@
 #include "i915_sw_fence_work.h"
 #include "i915_trace.h"
 #include "i915_user_extensions.h"
+#include "i915_memcpy.h"
 
 struct eb_vma {
struct i915_vma *vma;
@@ -2269,24 +2270,45 @@ struct eb_parse_work {
struct i915_vma *trampoline;
unsigned long batch_offset;
unsigned long batch_length;
+   unsigned long *jump_whitelist;
+   const void *batch_map;
+   void *shadow_map;
 };
 
 static int __eb_parse(struct dma_fence_work *work)
 {
struct eb_parse_work *pw = container_of(work, typeof(*pw), base);
+   int ret;
+   bool cookie;
 
-   return intel_engine_cmd_parser(pw->engine,
-  pw->batch,
-  pw->batch_offset,
-  pw->batch_length,
-  pw->shadow,
-  pw->trampoline);
+   cookie = dma_fence_begin_signalling();
+   ret = intel_engine_cmd_parser(pw->engine,
+ pw->batch,
+ pw->batch_offset,
+ pw->batch_length,
+ pw->shadow,
+ pw->jump_whitelist,
+ pw->shadow_map,
+ pw->batch_map);
+   dma_fence_end_signalling(cookie);
+
+   return ret;
 }
 
 static void __eb_parse_release(struct dma_fence_work *work)
 {
struct eb_parse_work *pw = container_of(work, typeof(*pw), base);
 
+   if (!IS_ERR_OR_NULL(pw->jump_whitelist))
+   kfree(pw->jump_whitelist);
+
+   if (pw->batch_map)
+   i915_gem_object_unpin_map(pw->batch->obj);
+   else
+   i915_gem_object_unpin_pages(pw->batch->obj);
+
+   i915_gem_object_unpin_map(pw->shadow->obj);
+
if (pw->trampoline)
i915_active_release(&pw->trampoline->active);
i915_active_release(&pw->shadow->active);
@@ -2336,6 +2358,8 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb,
 struct i915_vma *trampoline)
 {
struct eb_parse_work *pw;
+   struct drm_i915_gem_object *batch = eb->batch->vma->obj;
+   bool needs_clflush;
int err;
 
GEM_BUG_ON(overflows_type(eb->batch_start_offset, pw->batch_offset));
@@ -2359,6 +2383,34 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb,
goto err_shadow;
}
 
+   pw->shadow_map = i915_gem_object_pin_map(shadow->obj, 
I915_MAP_FORCE_WB);
+   if (IS_ERR(pw->shadow_map)) {
+   err = PTR_ERR(pw->shadow_map);
+   goto err_trampoline;
+   }
+
+   needs_clflush =
+   !(batch->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ);
+
+   pw->batch_map = ERR_PTR(-ENODEV);
+   if (needs_clflush && i915_has_memcpy_from_wc())
+   pw->batch_map = i915_gem_object_pin_map(batch, I915_MAP_WC);
+
+   if (IS_ERR(pw->batch_map)) {
+   err = i915_gem_object_pin_pages(batch);
+   if (err)
+   goto err_unmap_shadow;
+   pw->batch_map = NULL;
+   }
+
+   pw->jump_whitelist =
+   intel_engine_cmd_parser_alloc_jump_whitelist(eb->batch_len,
+  

[Intel-gfx] [PATCH v2 13/61] drm/i915: Reject UNSYNCHRONIZED for userptr

[Maarten Lankhorst]

We should not allow this any more, as it will break with the new userptr
implementation, it could still be made to work, but there's no point in
doing so.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  2 +
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  4 ++
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  2 +
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   | 64 ++-
 drivers/gpu/drm/i915/i915_drv.h   |  2 +
 5 files changed, 31 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index ea2242f1b5b8..c30fa5790a47 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1966,8 +1966,10 @@ static noinline int eb_relocate_parse_slow(struct 
i915_execbuffer *eb,
err = 0;
}
 
+#ifdef CONFIG_MMU_NOTIFIER
if (!err)
flush_workqueue(eb->i915->mm.userptr_wq);
+#endif
 
 err_relock:
i915_gem_ww_ctx_init(&eb->ww, true);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 436ff0d4951f..a3774e80aedd 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -531,7 +531,11 @@ void __i915_gem_object_invalidate_frontbuffer(struct 
drm_i915_gem_object *obj,
 static inline bool
 i915_gem_object_is_userptr(struct drm_i915_gem_object *obj)
 {
+#ifdef CONFIG_MMU_NOTIFIER
return obj->userptr.mm;
+#else
+   return false;
+#endif
 }
 
 static inline void
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index e84b279bfee6..1f729e63867c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -289,6 +289,7 @@ struct drm_i915_gem_object {
unsigned long *bit_17;
 
union {
+#ifdef CONFIG_MMU_NOTIFIER
struct i915_gem_userptr {
uintptr_t ptr;
 
@@ -296,6 +297,7 @@ struct drm_i915_gem_object {
struct i915_mmu_object *mmu_object;
struct work_struct *work;
} userptr;
+#endif
 
unsigned long scratch;
u64 encode;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 3fd63fdd7466..a2b7f6db2f1a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -15,6 +15,8 @@
 #include "i915_gem_object.h"
 #include "i915_scatterlist.h"
 
+#if defined(CONFIG_MMU_NOTIFIER)
+
 struct i915_mm_struct {
struct mm_struct *mm;
struct drm_i915_private *i915;
@@ -24,7 +26,6 @@ struct i915_mm_struct {
struct rcu_work work;
 };
 
-#if defined(CONFIG_MMU_NOTIFIER)
 #include 
 
 struct i915_mmu_notifier {
@@ -217,15 +218,11 @@ i915_mmu_notifier_find(struct i915_mm_struct *mm)
 }
 
 static int
-i915_gem_userptr_init__mmu_notifier(struct drm_i915_gem_object *obj,
-   unsigned flags)
+i915_gem_userptr_init__mmu_notifier(struct drm_i915_gem_object *obj)
 {
struct i915_mmu_notifier *mn;
struct i915_mmu_object *mo;
 
-   if (flags & I915_USERPTR_UNSYNCHRONIZED)
-   return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
-
if (GEM_WARN_ON(!obj->userptr.mm))
return -EINVAL;
 
@@ -258,38 +255,6 @@ i915_mmu_notifier_free(struct i915_mmu_notifier *mn,
kfree(mn);
 }
 
-#else
-
-static void
-__i915_gem_userptr_set_active(struct drm_i915_gem_object *obj, bool value)
-{
-}
-
-static void
-i915_gem_userptr_release__mmu_notifier(struct drm_i915_gem_object *obj)
-{
-}
-
-static int
-i915_gem_userptr_init__mmu_notifier(struct drm_i915_gem_object *obj,
-   unsigned flags)
-{
-   if ((flags & I915_USERPTR_UNSYNCHRONIZED) == 0)
-   return -ENODEV;
-
-   if (!capable(CAP_SYS_ADMIN))
-   return -EPERM;
-
-   return 0;
-}
-
-static void
-i915_mmu_notifier_free(struct i915_mmu_notifier *mn,
-  struct mm_struct *mm)
-{
-}
-
-#endif
 
 static struct i915_mm_struct *
 __i915_mm_struct_find(struct drm_i915_private *i915, struct mm_struct *real)
@@ -731,6 +696,8 @@ static const struct drm_i915_gem_object_ops 
i915_gem_userptr_ops = {
.release = i915_gem_userptr_release,
 };
 
+#endif
+
 /*
  * Creates a new mm object that wraps some normal memory from the process
  * context - user memory.
@@ -771,12 +738,12 @@ i915_gem_userptr_ioctl(struct drm_device *dev,
   void *data,
   struct drm_file *file)
 {
-   static struct lock_class_key lock_class;
+   static struct lock_class_key __maybe_unused lock_class;
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_i915_g

[Intel-gfx] [PATCH v2 03/61] drm/i915: Do not share hwsp across contexts any more, v3.

[Maarten Lankhorst]

Instead of sharing pages with breadcrumbs, give each timeline a
single page. This allows unrelated timelines not to share locks
any more during command submission.

As an additional benefit, seqno wraparound no longer requires
i915_vma_pin, which means we no longer need to worry about a
potential -EDEADLK at a point where we are ready to submit.

Changes since v1:
- Fix erroneous i915_vma_acquire that should be a i915_vma_release (ickle).
- Extra check for completion in intel_read_hwsp().
Changes since v2:
- Fix inconsistent indent in hwsp_alloc() (kbuild)

Signed-off-by: Maarten Lankhorst 
Reviewed-by: Thomas Hellström  #v1
Reported-by: kernel test robot 
---
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |   4 -
 drivers/gpu/drm/i915/gt/intel_timeline.c  | 386 +++---
 .../gpu/drm/i915/gt/intel_timeline_types.h|  15 +-
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |  11 +-
 drivers/gpu/drm/i915/i915_request.c   |   4 -
 drivers/gpu/drm/i915/i915_request.h   |  10 -
 6 files changed, 61 insertions(+), 369 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h 
b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 6d39a4a11bf3..7aff8350c364 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -39,10 +39,6 @@ struct intel_gt {
struct intel_gt_timelines {
spinlock_t lock; /* protects active_list */
struct list_head active_list;
-
-   /* Pack multiple timelines' seqnos into the same page */
-   spinlock_t hwsp_lock;
-   struct list_head hwsp_free_list;
} timelines;
 
struct intel_gt_requests {
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c 
b/drivers/gpu/drm/i915/gt/intel_timeline.c
index a2f74cefe4c3..13f3f26fc504 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -12,21 +12,7 @@
 #include "intel_ring.h"
 #include "intel_timeline.h"
 
-#define ptr_set_bit(ptr, bit) ((typeof(ptr))((unsigned long)(ptr) | BIT(bit)))
-#define ptr_test_bit(ptr, bit) ((unsigned long)(ptr) & BIT(bit))
-
-#define CACHELINE_BITS 6
-#define CACHELINE_FREE CACHELINE_BITS
-
-struct intel_timeline_hwsp {
-   struct intel_gt *gt;
-   struct intel_gt_timelines *gt_timelines;
-   struct list_head free_link;
-   struct i915_vma *vma;
-   u64 free_bitmap;
-};
-
-static struct i915_vma *__hwsp_alloc(struct intel_gt *gt)
+static struct i915_vma *hwsp_alloc(struct intel_gt *gt)
 {
struct drm_i915_private *i915 = gt->i915;
struct drm_i915_gem_object *obj;
@@ -45,174 +31,26 @@ static struct i915_vma *__hwsp_alloc(struct intel_gt *gt)
return vma;
 }
 
-static struct i915_vma *
-hwsp_alloc(struct intel_timeline *timeline, unsigned int *cacheline)
-{
-   struct intel_gt_timelines *gt = &timeline->gt->timelines;
-   struct intel_timeline_hwsp *hwsp;
-
-   BUILD_BUG_ON(BITS_PER_TYPE(u64) * CACHELINE_BYTES > PAGE_SIZE);
-
-   spin_lock_irq(>->hwsp_lock);
-
-   /* hwsp_free_list only contains HWSP that have available cachelines */
-   hwsp = list_first_entry_or_null(>->hwsp_free_list,
-   typeof(*hwsp), free_link);
-   if (!hwsp) {
-   struct i915_vma *vma;
-
-   spin_unlock_irq(>->hwsp_lock);
-
-   hwsp = kmalloc(sizeof(*hwsp), GFP_KERNEL);
-   if (!hwsp)
-   return ERR_PTR(-ENOMEM);
-
-   vma = __hwsp_alloc(timeline->gt);
-   if (IS_ERR(vma)) {
-   kfree(hwsp);
-   return vma;
-   }
-
-   GT_TRACE(timeline->gt, "new HWSP allocated\n");
-
-   vma->private = hwsp;
-   hwsp->gt = timeline->gt;
-   hwsp->vma = vma;
-   hwsp->free_bitmap = ~0ull;
-   hwsp->gt_timelines = gt;
-
-   spin_lock_irq(>->hwsp_lock);
-   list_add(&hwsp->free_link, >->hwsp_free_list);
-   }
-
-   GEM_BUG_ON(!hwsp->free_bitmap);
-   *cacheline = __ffs64(hwsp->free_bitmap);
-   hwsp->free_bitmap &= ~BIT_ULL(*cacheline);
-   if (!hwsp->free_bitmap)
-   list_del(&hwsp->free_link);
-
-   spin_unlock_irq(>->hwsp_lock);
-
-   GEM_BUG_ON(hwsp->vma->private != hwsp);
-   return hwsp->vma;
-}
-
-static void __idle_hwsp_free(struct intel_timeline_hwsp *hwsp, int cacheline)
-{
-   struct intel_gt_timelines *gt = hwsp->gt_timelines;
-   unsigned long flags;
-
-   spin_lock_irqsave(>->hwsp_lock, flags);
-
-   /* As a cacheline becomes available, publish the HWSP on the freelist */
-   if (!hwsp->free_bitmap)
-   list_add_tail(&hwsp->free_link, >->hwsp_free_list);
-
-   GEM_BUG_ON(cacheline >= BITS_PER_TYPE(hwsp->free_bitmap));
-   hwsp->free_bitmap |= BIT_ULL(cacheline);
-
-   /* And if no one is left using it, give the page b

[Intel-gfx] [PATCH v2 15/61] drm/i915: Flatten obj->mm.lock

[Maarten Lankhorst]

With userptr fixed, there is no need for all separate lockdep classes
now, and we can remove all lockdep tricks used. A trylock in the
shrinker is all we need now to flatten the locking hierarchy.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c   |  6 +---
 drivers/gpu/drm/i915/gem/i915_gem_object.h   | 20 ++--
 drivers/gpu/drm/i915/gem/i915_gem_pages.c| 34 ++--
 drivers/gpu/drm/i915/gem/i915_gem_phys.c |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 10 +++---
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c  |  2 +-
 6 files changed, 27 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 1393988bd5af..028a556ab1a5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -62,7 +62,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
  const struct drm_i915_gem_object_ops *ops,
  struct lock_class_key *key, unsigned flags)
 {
-   __mutex_init(&obj->mm.lock, ops->name ?: "obj->mm.lock", key);
+   mutex_init(&obj->mm.lock);
 
spin_lock_init(&obj->vma.lock);
INIT_LIST_HEAD(&obj->vma.list);
@@ -86,10 +86,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
mutex_init(&obj->mm.get_page.lock);
INIT_RADIX_TREE(&obj->mm.get_dma_page.radix, GFP_KERNEL | __GFP_NOWARN);
mutex_init(&obj->mm.get_dma_page.lock);
-
-   if (IS_ENABLED(CONFIG_LOCKDEP) && i915_gem_object_is_shrinkable(obj))
-   i915_gem_shrinker_taints_mutex(to_i915(obj->base.dev),
-  &obj->mm.lock);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index abcce4d285b5..b7d15a3db10e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -316,27 +316,10 @@ void __i915_gem_object_set_pages(struct 
drm_i915_gem_object *obj,
 int i915_gem_object_get_pages(struct drm_i915_gem_object *obj);
 int __i915_gem_object_get_pages(struct drm_i915_gem_object *obj);
 
-enum i915_mm_subclass { /* lockdep subclass for obj->mm.lock/struct_mutex */
-   I915_MM_NORMAL = 0,
-   /*
-* Only used by struct_mutex, when called "recursively" from
-* direct-reclaim-esque. Safe because there is only every one
-* struct_mutex in the entire system.
-*/
-   I915_MM_SHRINKER = 1,
-   /*
-* Used for obj->mm.lock when allocating pages. Safe because the object
-* isn't yet on any LRU, and therefore the shrinker can't deadlock on
-* it. As soon as the object has pages, obj->mm.lock nests within
-* fs_reclaim.
-*/
-   I915_MM_GET_PAGES = 1,
-};
-
 static inline int __must_check
 i915_gem_object_pin_pages(struct drm_i915_gem_object *obj)
 {
-   might_lock_nested(&obj->mm.lock, I915_MM_GET_PAGES);
+   might_lock(&obj->mm.lock);
 
if (atomic_inc_not_zero(&obj->mm.pages_pin_count))
return 0;
@@ -380,6 +363,7 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
 }
 
 int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
+int __i915_gem_object_put_pages_locked(struct drm_i915_gem_object *obj);
 void i915_gem_object_truncate(struct drm_i915_gem_object *obj);
 void i915_gem_object_writeback(struct drm_i915_gem_object *obj);
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index b81f253f5dc9..00ce88c609f9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -111,7 +111,7 @@ int __i915_gem_object_get_pages(struct drm_i915_gem_object 
*obj)
 {
int err;
 
-   err = mutex_lock_interruptible_nested(&obj->mm.lock, I915_MM_GET_PAGES);
+   err = mutex_lock_interruptible(&obj->mm.lock);
if (err)
return err;
 
@@ -195,21 +195,13 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object 
*obj)
return pages;
 }
 
-int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
+int __i915_gem_object_put_pages_locked(struct drm_i915_gem_object *obj)
 {
struct sg_table *pages;
-   int err;
 
if (i915_gem_object_has_pinned_pages(obj))
return -EBUSY;
 
-   /* May be called by shrinker from within get_pages() (on another bo) */
-   mutex_lock(&obj->mm.lock);
-   if (unlikely(atomic_read(&obj->mm.pages_pin_count))) {
-   err = -EBUSY;
-   goto unlock;
-   }
-
i915_gem_object_release_mmap_offset(obj);
 
/*
@@ -225,14 +217,22 @@ int __i915_gem_object_put_pages(struct 
drm_i915_gem_object *obj)
 * get_pages backends we should be better able to handle the
 * cancellation of the async task in a more uniform manner.
 */

[Intel-gfx] [PATCH v2 18/61] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2.

[Maarten Lankhorst]

We map the initial context during first pin.

This allows us to remove pin_map from state allocation, which saves
us a few retry loops. We won't need this until first pin anyway.

intel_ring_submission_setup() is also reworked slightly to do all
pinning in a single ww loop.

Changes since v1:
- Handle -EDEADLK backoff in intel_ring_submission_setup() better.
- Handle smatch errors reported by Dan and testbot.

Signed-off-by: Maarten Lankhorst 
Reported-by: kernel test robot 
Reported-by: Dan Carpenter 
---
 .../gpu/drm/i915/gt/intel_ring_submission.c   | 184 +++---
 1 file changed, 118 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c 
b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index a41b43f445b8..6b280904db43 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -478,6 +478,26 @@ static void ring_context_destroy(struct kref *ref)
intel_context_free(ce);
 }
 
+static int ring_context_init_default_state(struct intel_context *ce,
+  struct i915_gem_ww_ctx *ww)
+{
+   struct drm_i915_gem_object *obj = ce->state->obj;
+   void *vaddr;
+
+   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   shmem_read(ce->engine->default_state, 0,
+  vaddr, ce->engine->context_size);
+
+   i915_gem_object_flush_map(obj);
+   __i915_gem_object_release_map(obj);
+
+   __set_bit(CONTEXT_VALID_BIT, &ce->flags);
+   return 0;
+}
+
 static int ring_context_pre_pin(struct intel_context *ce,
struct i915_gem_ww_ctx *ww,
void **unused)
@@ -485,6 +505,13 @@ static int ring_context_pre_pin(struct intel_context *ce,
struct i915_address_space *vm;
int err = 0;
 
+   if (ce->engine->default_state &&
+   !test_bit(CONTEXT_VALID_BIT, &ce->flags)) {
+   err = ring_context_init_default_state(ce, ww);
+   if (err)
+   return err;
+   }
+
vm = vm_alias(ce->vm);
if (vm)
err = gen6_ppgtt_pin(i915_vm_to_ppgtt((vm)), ww);
@@ -540,22 +567,6 @@ alloc_context_vma(struct intel_engine_cs *engine)
if (IS_IVYBRIDGE(i915))
i915_gem_object_set_cache_coherency(obj, I915_CACHE_L3_LLC);
 
-   if (engine->default_state) {
-   void *vaddr;
-
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
-   if (IS_ERR(vaddr)) {
-   err = PTR_ERR(vaddr);
-   goto err_obj;
-   }
-
-   shmem_read(engine->default_state, 0,
-  vaddr, engine->context_size);
-
-   i915_gem_object_flush_map(obj);
-   __i915_gem_object_release_map(obj);
-   }
-
vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
@@ -587,8 +598,6 @@ static int ring_context_alloc(struct intel_context *ce)
return PTR_ERR(vma);
 
ce->state = vma;
-   if (engine->default_state)
-   __set_bit(CONTEXT_VALID_BIT, &ce->flags);
}
 
return 0;
@@ -1184,37 +1193,15 @@ static int gen7_ctx_switch_bb_setup(struct 
intel_engine_cs * const engine,
return gen7_setup_clear_gpr_bb(engine, vma);
 }
 
-static int gen7_ctx_switch_bb_init(struct intel_engine_cs *engine)
+static int gen7_ctx_switch_bb_init(struct intel_engine_cs *engine,
+  struct i915_gem_ww_ctx *ww,
+  struct i915_vma *vma)
 {
-   struct drm_i915_gem_object *obj;
-   struct i915_vma *vma;
-   int size;
int err;
 
-   size = gen7_ctx_switch_bb_setup(engine, NULL /* probe size */);
-   if (size <= 0)
-   return size;
-
-   size = ALIGN(size, PAGE_SIZE);
-   obj = i915_gem_object_create_internal(engine->i915, size);
-   if (IS_ERR(obj))
-   return PTR_ERR(obj);
-
-   vma = i915_vma_instance(obj, engine->gt->vm, NULL);
-   if (IS_ERR(vma)) {
-   err = PTR_ERR(vma);
-   goto err_obj;
-   }
-
-   vma->private = intel_context_create(engine); /* dummy residuals */
-   if (IS_ERR(vma->private)) {
-   err = PTR_ERR(vma->private);
-   goto err_obj;
-   }
-
-   err = i915_vma_pin(vma, 0, 0, PIN_USER | PIN_HIGH);
+   err = i915_vma_pin_ww(vma, ww, 0, 0, PIN_USER | PIN_HIGH);
if (err)
-   goto err_private;
+   return err;
 
err = i915_vma_sync(vma);
if (err)
@@ -1229,17 +1216,53 @@ static int gen7_ctx_switch_bb_init(struct 
intel_engine_cs *engine)
 
 err_unpin:
i915_vma_unpin(vma);
-err_private:
-   intel_context_put(

[Intel-gfx] [PATCH v2 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal.

[Maarten Lankhorst]

Straightforward conversion, just convert a bunch of calls to
unlocked versions.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/selftests/huge_pages.c   | 28 ++-
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c 
b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index a7d5f7785f32..34f248c205ca 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -568,7 +568,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
goto out_put;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err)
goto out_put;
 
@@ -632,15 +632,19 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
break;
}
 
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
i915_gem_object_put(obj);
}
 
return 0;
 
 out_unpin:
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
+   i915_gem_object_unlock(obj);
 out_put:
i915_gem_object_put(obj);
 
@@ -654,8 +658,10 @@ static void close_object_list(struct list_head *objects,
 
list_for_each_entry_safe(obj, on, objects, st_link) {
list_del(&obj->st_link);
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
i915_gem_object_put(obj);
}
 }
@@ -692,7 +698,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
break;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
i915_gem_object_put(obj);
break;
@@ -868,7 +874,7 @@ static int igt_mock_ppgtt_64K(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err)
goto out_object_put;
 
@@ -922,8 +928,10 @@ static int igt_mock_ppgtt_64K(void *arg)
}
 
i915_vma_unpin(vma);
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
i915_gem_object_put(obj);
}
}
@@ -933,7 +941,9 @@ static int igt_mock_ppgtt_64K(void *arg)
 out_vma_unpin:
i915_vma_unpin(vma);
 out_object_unpin:
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
+   i915_gem_object_unlock(obj);
 out_object_put:
i915_gem_object_put(obj);
 
@@ -1003,7 +1013,7 @@ static int __cpu_check_vmap(struct drm_i915_gem_object 
*obj, u32 dword, u32 val)
if (err)
return err;
 
-   ptr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   ptr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(ptr))
return PTR_ERR(ptr);
 
@@ -1283,7 +1293,7 @@ static int igt_ppgtt_smoke_huge(void *arg)
return err;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
if (err == -ENXIO || err == -E2BIG) {
i915_gem_object_put(obj);
@@ -1306,8 +1316,10 @@ static int igt_ppgtt_smoke_huge(void *arg)
   __func__, size, i);
}
 out_unpin:
+   i915_gem_object_lock(obj, NULL);
i915_gem_object_unpin_pages(obj);
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
 out_put:
i915_gem_object_put(obj);
 
@@ -1380,7 +1392,7 @@ static int igt_ppgtt_sanity_check(void *arg)
return err;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
i915_gem_object_put(obj);
goto out;
@@ -1394,8 +1406,10 @@ static int igt_ppgtt_sanity_check(void *arg)
 
err = igt_write_huge(ctx, obj);
 
+   i915_gem_object_lock(obj, NULL);
  

[Intel-gfx] [PATCH v2 43/61] drm/i915/selftests: Prepare context tests for obj->mm.lock removal.

[Maarten Lankhorst]

Straightforward conversion, just convert a bunch of calls to
unlocked versions.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index d3f87dc4eda3..5fef592390cb 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -1094,7 +1094,7 @@ __read_slice_count(struct intel_context *ce,
if (ret < 0)
return ret;
 
-   buf = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   buf = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(buf)) {
ret = PTR_ERR(buf);
return ret;
@@ -1511,7 +1511,7 @@ static int write_to_scratch(struct i915_gem_context *ctx,
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out;
@@ -1622,7 +1622,7 @@ static int read_from_scratch(struct i915_gem_context *ctx,
if (err)
goto out_vm;
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out;
@@ -1658,7 +1658,7 @@ static int read_from_scratch(struct i915_gem_context *ctx,
if (err)
goto out_vm;
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out;
@@ -1715,7 +1715,7 @@ static int read_from_scratch(struct i915_gem_context *ctx,
if (err)
goto out_vm;
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out_vm;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking.

[Maarten Lankhorst]

Make creation separate from pinning, in order to take the lock only
once, and pin the mapping with the lock held.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 43 ++---
 1 file changed, 33 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 39cb45ccb506..b6892b405829 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3972,7 +3972,7 @@ gen10_init_indirectctx_bb(struct intel_engine_cs *engine, 
u32 *batch)
 
 #define CTX_WA_BB_OBJ_SIZE (PAGE_SIZE)
 
-static int lrc_setup_wa_ctx(struct intel_engine_cs *engine)
+static int lrc_init_wa_ctx(struct intel_engine_cs *engine)
 {
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
@@ -3988,10 +3988,6 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs 
*engine)
goto err;
}
 
-   err = i915_ggtt_pin(vma, NULL, 0, PIN_HIGH);
-   if (err)
-   goto err;
-
engine->wa_ctx.vma = vma;
return 0;
 
@@ -4000,9 +3996,16 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs 
*engine)
return err;
 }
 
-static void lrc_destroy_wa_ctx(struct intel_engine_cs *engine)
+static void lrc_destroy_wa_ctx(struct intel_engine_cs *engine, bool unpin)
 {
-   i915_vma_unpin_and_release(&engine->wa_ctx.vma, 0);
+   if (!engine->wa_ctx.vma)
+   return;
+
+   if (unpin)
+   i915_vma_unpin(engine->wa_ctx.vma);
+
+   i915_vma_put(engine->wa_ctx.vma);
+   engine->wa_ctx.vma = NULL;
 }
 
 typedef u32 *(*wa_bb_func_t)(struct intel_engine_cs *engine, u32 *batch);
@@ -4014,6 +4017,7 @@ static int intel_init_workaround_bb(struct 
intel_engine_cs *engine)
&wa_ctx->per_ctx };
wa_bb_func_t wa_bb_fn[2];
void *batch, *batch_ptr;
+   struct i915_gem_ww_ctx ww;
unsigned int i;
int ret;
 
@@ -4041,13 +4045,21 @@ static int intel_init_workaround_bb(struct 
intel_engine_cs *engine)
return 0;
}
 
-   ret = lrc_setup_wa_ctx(engine);
+   ret = lrc_init_wa_ctx(engine);
if (ret) {
drm_dbg(&engine->i915->drm,
"Failed to setup context WA page: %d\n", ret);
return ret;
}
 
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   ret = i915_gem_object_lock(wa_ctx->vma->obj, &ww);
+   if (!ret)
+   ret = i915_ggtt_pin(wa_ctx->vma, &ww, 0, PIN_HIGH);
+   if (ret)
+   goto err;
+
batch = i915_gem_object_pin_map(wa_ctx->vma->obj, I915_MAP_WB);
 
/*
@@ -4071,8 +4083,19 @@ static int intel_init_workaround_bb(struct 
intel_engine_cs *engine)
 
__i915_gem_object_flush_map(wa_ctx->vma->obj, 0, batch_ptr - batch);
__i915_gem_object_release_map(wa_ctx->vma->obj);
+
+   if (ret)
+   i915_vma_unpin(wa_ctx->vma);
+
+err:
+   if (ret == -EDEADLK) {
+   ret = i915_gem_ww_ctx_backoff(&ww);
+   if (!ret)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
if (ret)
-   lrc_destroy_wa_ctx(engine);
+   lrc_destroy_wa_ctx(engine, false);
 
return ret;
 }
@@ -5147,7 +5170,7 @@ static void execlists_release(struct intel_engine_cs 
*engine)
execlists_shutdown(engine);
 
intel_engine_cleanup_common(engine);
-   lrc_destroy_wa_ctx(engine);
+   lrc_destroy_wa_ctx(engine, true);
 }
 
 static void
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller.

[Maarten Lankhorst]

We need to take the obj lock to pin pages, so wait until the callers
have done so, before making the object unshrinkable.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  2 +
 .../gpu/drm/i915/gem/i915_gem_object_blt.c|  6 +++
 .../gpu/drm/i915/gt/intel_gt_buffer_pool.c| 47 +--
 .../gpu/drm/i915/gt/intel_gt_buffer_pool.h|  5 ++
 .../drm/i915/gt/intel_gt_buffer_pool_types.h  |  1 +
 5 files changed, 35 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index cbb686235866..479affa975f1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1332,6 +1332,7 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
err = PTR_ERR(cmd);
goto err_pool;
}
+   intel_gt_buffer_pool_mark_used(pool);
 
batch = i915_vma_instance(pool->obj, vma->vm, NULL);
if (IS_ERR(batch)) {
@@ -2619,6 +2620,7 @@ static int eb_parse(struct i915_execbuffer *eb)
err = PTR_ERR(shadow);
goto err;
}
+   intel_gt_buffer_pool_mark_used(pool);
i915_gem_object_set_readonly(shadow->obj);
shadow->private = pool;
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index aee7ad3cc3c6..e0b873c3f46a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -54,6 +54,9 @@ struct i915_vma *intel_emit_vma_fill_blt(struct intel_context 
*ce,
if (unlikely(err))
goto out_put;
 
+   /* we pinned the pool, mark it as such */
+   intel_gt_buffer_pool_mark_used(pool);
+
cmd = i915_gem_object_pin_map(pool->obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
@@ -276,6 +279,9 @@ struct i915_vma *intel_emit_vma_copy_blt(struct 
intel_context *ce,
if (unlikely(err))
goto out_put;
 
+   /* we pinned the pool, mark it as such */
+   intel_gt_buffer_pool_mark_used(pool);
+
cmd = i915_gem_object_pin_map(pool->obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c 
b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index 104cb30e8c13..030759305196 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -98,28 +98,6 @@ static void pool_free_work(struct work_struct *wrk)
  round_jiffies_up_relative(HZ));
 }
 
-static int pool_active(struct i915_active *ref)
-{
-   struct intel_gt_buffer_pool_node *node =
-   container_of(ref, typeof(*node), active);
-   struct dma_resv *resv = node->obj->base.resv;
-   int err;
-
-   if (dma_resv_trylock(resv)) {
-   dma_resv_add_excl_fence(resv, NULL);
-   dma_resv_unlock(resv);
-   }
-
-   err = i915_gem_object_pin_pages(node->obj);
-   if (err)
-   return err;
-
-   /* Hide this pinned object from the shrinker until retired */
-   i915_gem_object_make_unshrinkable(node->obj);
-
-   return 0;
-}
-
 __i915_active_call
 static void pool_retire(struct i915_active *ref)
 {
@@ -129,10 +107,13 @@ static void pool_retire(struct i915_active *ref)
struct list_head *list = bucket_for_size(pool, node->obj->base.size);
unsigned long flags;
 
-   i915_gem_object_unpin_pages(node->obj);
+   if (node->pinned) {
+   i915_gem_object_unpin_pages(node->obj);
 
-   /* Return this object to the shrinker pool */
-   i915_gem_object_make_purgeable(node->obj);
+   /* Return this object to the shrinker pool */
+   i915_gem_object_make_purgeable(node->obj);
+   node->pinned = false;
+   }
 
GEM_BUG_ON(node->age);
spin_lock_irqsave(&pool->lock, flags);
@@ -144,6 +125,19 @@ static void pool_retire(struct i915_active *ref)
  round_jiffies_up_relative(HZ));
 }
 
+void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
+{
+   assert_object_held(node->obj);
+
+   if (node->pinned)
+   return;
+
+   __i915_gem_object_pin_pages(node->obj);
+   /* Hide this pinned object from the shrinker until retired */
+   i915_gem_object_make_unshrinkable(node->obj);
+   node->pinned = true;
+}
+
 static struct intel_gt_buffer_pool_node *
 node_create(struct intel_gt_buffer_pool *pool, size_t sz)
 {
@@ -158,7 +152,8 @@ node_create(struct intel_gt_buffer_pool *pool, size_t sz)
 
node->age = 0;
node->pool = pool;
-   i915_active_init(&node->active, pool_active, pool_retire);
+   node->pinned = false;
+   i915_active_init(&node->active, NULL, pool_retire);

[Intel-gfx] [PATCH v2 17/61] drm/i915: Populate logical context during first pin.

[Maarten Lankhorst]

This allows us to remove pin_map from state allocation, which saves
us a few retry loops. We won't need this until first pin, anyway.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_context_types.h |  13 ++-
 drivers/gpu/drm/i915/gt/intel_lrc.c   | 107 +-
 2 files changed, 62 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 552cb57a2e8c..bebf52868563 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -64,12 +64,13 @@ struct intel_context {
unsigned long flags;
 #define CONTEXT_BARRIER_BIT0
 #define CONTEXT_ALLOC_BIT  1
-#define CONTEXT_VALID_BIT  2
-#define CONTEXT_CLOSED_BIT 3
-#define CONTEXT_USE_SEMAPHORES 4
-#define CONTEXT_BANNED 5
-#define CONTEXT_FORCE_SINGLE_SUBMISSION6
-#define CONTEXT_NOPREEMPT  7
+#define CONTEXT_INIT_BIT   2
+#define CONTEXT_VALID_BIT  3
+#define CONTEXT_CLOSED_BIT 4
+#define CONTEXT_USE_SEMAPHORES 5
+#define CONTEXT_BANNED 6
+#define CONTEXT_FORCE_SINGLE_SUBMISSION7
+#define CONTEXT_NOPREEMPT  8
 
u32 *lrc_reg_state;
union {
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 287537089c77..39cb45ccb506 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3525,9 +3525,39 @@ __execlists_update_reg_state(const struct intel_context 
*ce,
}
 }
 
+static void populate_lr_context(struct intel_context *ce,
+   struct intel_engine_cs *engine,
+   void *vaddr)
+{
+   bool inhibit = true;
+   struct drm_i915_gem_object *ctx_obj = ce->state->obj;
+
+   set_redzone(vaddr, engine);
+
+   if (engine->default_state) {
+   shmem_read(engine->default_state, 0,
+  vaddr, engine->context_size);
+   __set_bit(CONTEXT_VALID_BIT, &ce->flags);
+   inhibit = false;
+   }
+
+   /* Clear the ppHWSP (inc. per-context counters) */
+   memset(vaddr, 0, PAGE_SIZE);
+
+   /*
+* The second page of the context object contains some registers which
+* must be set up prior to the first execution.
+*/
+   execlists_init_reg_state(vaddr + LRC_STATE_OFFSET,
+ce, engine, ce->ring, inhibit);
+
+   __i915_gem_object_flush_map(ctx_obj, 0, engine->context_size);
+}
+
 static int
-execlists_context_pre_pin(struct intel_context *ce,
- struct i915_gem_ww_ctx *ww, void **vaddr)
+__execlists_context_pre_pin(struct intel_context *ce,
+   struct intel_engine_cs *engine,
+   struct i915_gem_ww_ctx *ww, void **vaddr)
 {
GEM_BUG_ON(!ce->state);
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
@@ -3535,8 +3565,20 @@ execlists_context_pre_pin(struct intel_context *ce,
*vaddr = i915_gem_object_pin_map(ce->state->obj,

i915_coherent_map_type(ce->engine->i915) |
I915_MAP_OVERRIDE);
+   if (IS_ERR(*vaddr))
+   return PTR_ERR(*vaddr);
+
+   if (!__test_and_set_bit(CONTEXT_INIT_BIT, &ce->flags))
+   populate_lr_context(ce, engine, *vaddr);
+
+   return 0;
+}
 
-   return PTR_ERR_OR_ZERO(*vaddr);
+static int
+execlists_context_pre_pin(struct intel_context *ce,
+ struct i915_gem_ww_ctx *ww, void **vaddr)
+{
+   return __execlists_context_pre_pin(ce, ce->engine, ww, vaddr);
 }
 
 static int
@@ -5331,45 +5373,6 @@ static void execlists_init_reg_state(u32 *regs,
__reset_stop_ring(regs, engine);
 }
 
-static int
-populate_lr_context(struct intel_context *ce,
-   struct drm_i915_gem_object *ctx_obj,
-   struct intel_engine_cs *engine,
-   struct intel_ring *ring)
-{
-   bool inhibit = true;
-   void *vaddr;
-
-   vaddr = i915_gem_object_pin_map(ctx_obj, I915_MAP_WB);
-   if (IS_ERR(vaddr)) {
-   drm_dbg(&engine->i915->drm, "Could not map object pages!\n");
-   return PTR_ERR(vaddr);
-   }
-
-   set_redzone(vaddr, engine);
-
-   if (engine->default_state) {
-   shmem_read(engine->default_state, 0,
-  vaddr, engine->context_size);
-   __set_bit(CONTEXT_VALID_BIT, &ce->flags);
-   inhibit = false;
-   }
-
-   /* Clear the ppHWSP (inc. per-context counters) */
-   memset(vaddr, 0, PAGE_SIZE);
-
-   /*
-* The second page of the context object contains some registers which
-* must be set up prior to the first execution.
-   

[Intel-gfx] [PATCH v2 16/61] drm/i915: Pin timeline map after first timeline pin, v2.

[Maarten Lankhorst]

We're starting to require the reservation lock for pinning,
so wait until we have that.

Update the selftests to handle this correctly, and ensure pin is
called in live_hwsp_rollover_user() and mock_hwsp_freelist().

Changes since v1:
- Fix NULL + XX arithmatic, use casts. (kbuild)

Signed-off-by: Maarten Lankhorst 
Reported-by: kernel test robot 
---
 drivers/gpu/drm/i915/gt/intel_timeline.c| 37 
 drivers/gpu/drm/i915/gt/intel_timeline.h|  2 +
 drivers/gpu/drm/i915/gt/mock_engine.c   | 22 ++-
 drivers/gpu/drm/i915/gt/selftest_timeline.c | 63 +++--
 drivers/gpu/drm/i915/i915_selftest.h|  2 +
 5 files changed, 82 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c 
b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 13f3f26fc504..71e695ebc175 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -51,13 +51,27 @@ static int __timeline_active(struct i915_active *active)
return 0;
 }
 
+I915_SELFTEST_EXPORT int
+intel_timeline_pin_map(struct intel_timeline *timeline)
+{
+   struct drm_i915_gem_object *obj = timeline->hwsp_ggtt->obj;
+   void *vaddr;
+
+   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   timeline->hwsp_map = vaddr;
+   timeline->hwsp_seqno = vaddr + offset_in_page(timeline->hwsp_seqno);
+   WRITE_ONCE(*(u32 *)timeline->hwsp_seqno, 0);
+   return 0;
+}
+
 static int intel_timeline_init(struct intel_timeline *timeline,
   struct intel_gt *gt,
   struct i915_vma *hwsp,
   unsigned int offset)
 {
-   void *vaddr;
-
kref_init(&timeline->kref);
atomic_set(&timeline->pin_count, 0);
 
@@ -73,14 +87,8 @@ static int intel_timeline_init(struct intel_timeline 
*timeline,
return PTR_ERR(hwsp);
timeline->hwsp_ggtt = hwsp;
}
-
-   vaddr = i915_gem_object_pin_map(hwsp->obj, I915_MAP_WB);
-   if (IS_ERR(vaddr))
-   return PTR_ERR(vaddr);
-
-   timeline->hwsp_map = vaddr;
-   timeline->hwsp_seqno = vaddr + timeline->hwsp_offset;
-   WRITE_ONCE(*(u32 *)timeline->hwsp_seqno, 0);
+   timeline->hwsp_map = NULL;
+   timeline->hwsp_seqno = (void *)(long)timeline->hwsp_offset;
 
GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size);
 
@@ -111,7 +119,8 @@ static void intel_timeline_fini(struct intel_timeline 
*timeline)
GEM_BUG_ON(!list_empty(&timeline->requests));
GEM_BUG_ON(timeline->retire);
 
-   i915_gem_object_unpin_map(timeline->hwsp_ggtt->obj);
+   if (timeline->hwsp_map)
+   i915_gem_object_unpin_map(timeline->hwsp_ggtt->obj);
 
i915_vma_put(timeline->hwsp_ggtt);
i915_active_fini(&timeline->active);
@@ -151,6 +160,12 @@ int intel_timeline_pin(struct intel_timeline *tl, struct 
i915_gem_ww_ctx *ww)
if (atomic_add_unless(&tl->pin_count, 1, 0))
return 0;
 
+   if (!tl->hwsp_map) {
+   err = intel_timeline_pin_map(tl);
+   if (err)
+   return err;
+   }
+
err = i915_ggtt_pin(tl->hwsp_ggtt, ww, 0, PIN_HIGH);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h 
b/drivers/gpu/drm/i915/gt/intel_timeline.h
index 9882cd911d8e..1cfdc4679b62 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.h
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.h
@@ -106,4 +106,6 @@ int intel_timeline_read_hwsp(struct i915_request *from,
 void intel_gt_init_timelines(struct intel_gt *gt);
 void intel_gt_fini_timelines(struct intel_gt *gt);
 
+I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
+
 #endif
diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c 
b/drivers/gpu/drm/i915/gt/mock_engine.c
index 2f830017c51d..effbac877eec 100644
--- a/drivers/gpu/drm/i915/gt/mock_engine.c
+++ b/drivers/gpu/drm/i915/gt/mock_engine.c
@@ -32,9 +32,20 @@
 #include "mock_engine.h"
 #include "selftests/mock_request.h"
 
-static void mock_timeline_pin(struct intel_timeline *tl)
+static int mock_timeline_pin(struct intel_timeline *tl)
 {
+   int err;
+
+   if (WARN_ON(!i915_gem_object_trylock(tl->hwsp_ggtt->obj)))
+   return -EBUSY;
+
+   err = intel_timeline_pin_map(tl);
+   i915_gem_object_unlock(tl->hwsp_ggtt->obj);
+   if (err)
+   return err;
+
atomic_inc(&tl->pin_count);
+   return 0;
 }
 
 static void mock_timeline_unpin(struct intel_timeline *tl)
@@ -152,6 +163,8 @@ static void mock_context_destroy(struct kref *ref)
 
 static int mock_context_alloc(struct intel_context *ce)
 {
+   int err;
+
ce->ring = mock_ring(ce->engine);
if (!ce->ring)
return -ENOMEM;
@@ -162,7 +175,12 @@ static int mock_context_alloc(struct intel_context *ce)
   

[Intel-gfx] [PATCH v2 06/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags

[Maarten Lankhorst]

We want to remove the changing of ops structure for attaching
phys pages, so we need to kill off HAS_STRUCT_PAGE from ops->flags,
and put it in the bo.

This will remove a potential race of dereferencing the wrong obj->ops
without ww mutex held.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c   |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_internal.c |  6 +++---
 drivers/gpu/drm/i915/gem/i915_gem_lmem.c |  4 ++--
 drivers/gpu/drm/i915/gem/i915_gem_mman.c |  7 +++
 drivers/gpu/drm/i915/gem/i915_gem_object.c   |  4 +++-
 drivers/gpu/drm/i915/gem/i915_gem_object.h   |  5 +++--
 drivers/gpu/drm/i915/gem/i915_gem_object_types.h |  8 +---
 drivers/gpu/drm/i915/gem/i915_gem_pages.c|  5 ++---
 drivers/gpu/drm/i915/gem/i915_gem_phys.c |  2 ++
 drivers/gpu/drm/i915/gem/i915_gem_region.c   |  4 +---
 drivers/gpu/drm/i915/gem/i915_gem_region.h   |  3 +--
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c|  8 
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c   |  4 ++--
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c  |  6 +++---
 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c |  4 ++--
 drivers/gpu/drm/i915/gem/selftests/huge_pages.c  | 10 +-
 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c   | 11 ---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c   | 12 
 drivers/gpu/drm/i915/gvt/dmabuf.c|  2 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c|  2 +-
 drivers/gpu/drm/i915/selftests/mock_region.c |  4 ++--
 21 files changed, 62 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index 0dd477e56573..131ec53d8521 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -259,7 +259,7 @@ struct drm_gem_object *i915_gem_prime_import(struct 
drm_device *dev,
}
 
drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
-   i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops, &lock_class);
+   i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops, &lock_class, 0);
obj->base.import_attach = attach;
obj->base.resv = dma_buf->resv;
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c 
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index ad22f42541bd..21cc40897ca8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -138,8 +138,7 @@ static void i915_gem_object_put_pages_internal(struct 
drm_i915_gem_object *obj,
 
 static const struct drm_i915_gem_object_ops i915_gem_object_internal_ops = {
.name = "i915_gem_object_internal",
-   .flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE |
-I915_GEM_OBJECT_IS_SHRINKABLE,
+   .flags = I915_GEM_OBJECT_IS_SHRINKABLE,
.get_pages = i915_gem_object_get_pages_internal,
.put_pages = i915_gem_object_put_pages_internal,
 };
@@ -178,7 +177,8 @@ i915_gem_object_create_internal(struct drm_i915_private 
*i915,
return ERR_PTR(-ENOMEM);
 
drm_gem_private_object_init(&i915->drm, &obj->base, size);
-   i915_gem_object_init(obj, &i915_gem_object_internal_ops, &lock_class);
+   i915_gem_object_init(obj, &i915_gem_object_internal_ops, &lock_class,
+I915_BO_ALLOC_STRUCT_PAGE);
 
/*
 * Mark the object as volatile, such that the pages are marked as
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 932ee21e6609..e953965f8263 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -45,13 +45,13 @@ __i915_gem_lmem_object_create(struct intel_memory_region 
*mem,
return ERR_PTR(-ENOMEM);
 
drm_gem_private_object_init(&i915->drm, &obj->base, size);
-   i915_gem_object_init(obj, &i915_gem_lmem_obj_ops, &lock_class);
+   i915_gem_object_init(obj, &i915_gem_lmem_obj_ops, &lock_class, flags);
 
obj->read_domains = I915_GEM_DOMAIN_WC | I915_GEM_DOMAIN_GTT;
 
i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
 
-   i915_gem_object_init_memory_region(obj, mem, flags);
+   i915_gem_object_init_memory_region(obj, mem);
 
return obj;
 }
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 3d69e51f3e4d..5aa037ca3a41 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -251,7 +251,7 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
goto out;
 
iomap = -1;
-   if (!i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_STRUCT_PAGE)) {
+   if (!i915_gem_object_has_struct_page(obj)) {
iomap = obj->mm.region->iomap.base;
 

[Intel-gfx] [PATCH v2 49/61] drm/i915/selftests: Prepare igt_gem_utils for obj->mm.lock removal

[Maarten Lankhorst]

igt_emit_store_dw needs to use the unlocked version, as it's not
holding a lock. This fixes igt_gpu_fill_dw() which is used by
some other selftests.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c 
b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
index e21b5023ca7d..f4e85b4a347d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
+++ b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
@@ -54,7 +54,7 @@ igt_emit_store_dw(struct i915_vma *vma,
if (IS_ERR(obj))
return ERR_CAST(obj);
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto err;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning

[Maarten Lankhorst]

i915_vma_pin may fail with -EDEADLK when we start locking page tables,
so ensure we handle this correctly.

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 23 +++
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 63e2f16204da..2fbe6fbe043a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -419,13 +419,14 @@ static u64 eb_pin_flags(const struct 
drm_i915_gem_exec_object2 *entry,
return pin_flags;
 }
 
-static inline bool
+static inline int
 eb_pin_vma(struct i915_execbuffer *eb,
   const struct drm_i915_gem_exec_object2 *entry,
   struct eb_vma *ev)
 {
struct i915_vma *vma = ev->vma;
u64 pin_flags;
+   int err;
 
if (vma->node.size)
pin_flags = vma->node.start;
@@ -438,16 +439,24 @@ eb_pin_vma(struct i915_execbuffer *eb,
 
/* Attempt to reuse the current location if available */
/* TODO: Add -EDEADLK handling here */
-   if (unlikely(i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags))) {
+   err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags);
+   if (err == -EDEADLK)
+   return err;
+
+   if (unlikely(err)) {
if (entry->flags & EXEC_OBJECT_PINNED)
return false;
 
/* Failing that pick any _free_ space if suitable */
-   if (unlikely(i915_vma_pin_ww(vma, &eb->ww,
+   err = i915_vma_pin_ww(vma, &eb->ww,
 entry->pad_to_size,
 entry->alignment,
 eb_pin_flags(entry, ev->flags) |
-PIN_USER | PIN_NOEVICT)))
+PIN_USER | PIN_NOEVICT);
+   if (err == -EDEADLK)
+   return err;
+
+   if (unlikely(err))
return false;
}
 
@@ -896,7 +905,11 @@ static int eb_validate_vmas(struct i915_execbuffer *eb)
if (err)
return err;
 
-   if (eb_pin_vma(eb, entry, ev)) {
+   err = eb_pin_vma(eb, entry, ev);
+   if (err < 0)
+   return err;
+
+   if (err > 0) {
if (entry->offset != vma->node.start) {
entry->offset = vma->node.start | UPDATE;
eb->args->flags |= __EXEC_HAS_RELOC;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane

[Maarten Lankhorst]

Instead of multiple lockings, lock the object once,
and perform the ww dance around attach_phys and pin_pages.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/display/intel_display.c  | 69 ---
 drivers/gpu/drm/i915/display/intel_display.h  |  2 +-
 drivers/gpu/drm/i915/display/intel_fbdev.c|  2 +-
 drivers/gpu/drm/i915/display/intel_overlay.c  | 34 +++--
 drivers/gpu/drm/i915/gem/i915_gem_domain.c| 30 ++--
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  1 +
 drivers/gpu/drm/i915/gem/i915_gem_phys.c  | 10 +--
 .../drm/i915/gem/selftests/i915_gem_phys.c|  2 +
 8 files changed, 86 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index a7e3f61c5777..db57f093b5a9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2232,6 +2232,7 @@ static bool intel_plane_uses_fence(const struct 
intel_plane_state *plane_state)
 
 struct i915_vma *
 intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
+  bool phys_cursor,
   const struct i915_ggtt_view *view,
   bool uses_fence,
   unsigned long *out_flags)
@@ -2240,14 +2241,19 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_i915_gem_object *obj = intel_fb_obj(fb);
intel_wakeref_t wakeref;
+   struct i915_gem_ww_ctx ww;
struct i915_vma *vma;
unsigned int pinctl;
u32 alignment;
+   int ret;
 
if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj)))
return ERR_PTR(-EINVAL);
 
-   alignment = intel_surf_alignment(fb, 0);
+   if (phys_cursor)
+   alignment = intel_cursor_alignment(dev_priv);
+   else
+   alignment = intel_surf_alignment(fb, 0);
if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))
return ERR_PTR(-EINVAL);
 
@@ -2282,14 +2288,26 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
if (HAS_GMCH(dev_priv))
pinctl |= PIN_MAPPABLE;
 
-   vma = i915_gem_object_pin_to_display_plane(obj,
-  alignment, view, pinctl);
-   if (IS_ERR(vma))
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   ret = i915_gem_object_lock(obj, &ww);
+   if (!ret && phys_cursor)
+   ret = i915_gem_object_attach_phys(obj, alignment);
+   if (!ret)
+   ret = i915_gem_object_pin_pages(obj);
+   if (ret)
goto err;
 
-   if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
-   int ret;
+   if (!ret) {
+   vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
+  view, pinctl);
+   if (IS_ERR(vma)) {
+   ret = PTR_ERR(vma);
+   goto err_unpin;
+   }
+   }
 
+   if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
/*
 * Install a fence for tiled scan-out. Pre-i965 always needs a
 * fence, whereas 965+ only requires a fence if using
@@ -2310,16 +2328,28 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
ret = i915_vma_pin_fence(vma);
if (ret != 0 && INTEL_GEN(dev_priv) < 4) {
i915_gem_object_unpin_from_display_plane(vma);
-   vma = ERR_PTR(ret);
-   goto err;
+   goto err_unpin;
}
+   ret = 0;
 
-   if (ret == 0 && vma->fence)
+   if (vma->fence)
*out_flags |= PLANE_HAS_FENCE;
}
 
i915_vma_get(vma);
+
+err_unpin:
+   i915_gem_object_unpin_pages(obj);
 err:
+   if (ret == -EDEADLK) {
+   ret = i915_gem_ww_ctx_backoff(&ww);
+   if (!ret)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+   if (ret)
+   vma = ERR_PTR(ret);
+
atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
return vma;
@@ -16136,19 +16166,11 @@ static int intel_plane_pin_fb(struct 
intel_plane_state *plane_state)
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct i915_vma *vma;
+   bool phys_cursor =
+   plane->id == PLANE_CURSOR &&
+   INTEL_INFO(dev_priv)->display.cursor_needs_physical;
 
-   if (plane->id == PLANE_CURSOR &&
-   INTEL_INFO(dev_priv)->display.cursor_needs_physical) {
-   struct drm_i915_gem_object *obj = intel_fb_obj(fb);
-   const int

[Intel-gfx] [PATCH v2 48/61] drm/i915/selftests: Prepare object blit tests for obj->mm.lock removal.

[Maarten Lankhorst]

Use some unlocked versions where we're not holding the ww lock.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
index 23b6e11bbc3e..ee9496f3d11d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
@@ -262,7 +262,7 @@ static int igt_fill_blt_thread(void *arg)
goto err_flush;
}
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_put;
@@ -380,7 +380,7 @@ static int igt_copy_blt_thread(void *arg)
goto err_flush;
}
 
-   vaddr = i915_gem_object_pin_map(src, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(src, I915_MAP_WB);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_put_src;
@@ -400,7 +400,7 @@ static int igt_copy_blt_thread(void *arg)
goto err_put_src;
}
 
-   vaddr = i915_gem_object_pin_map(dst, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(dst, I915_MAP_WB);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_put_dst;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 60/61] drm/i915: Finally remove obj->mm.lock.

[Maarten Lankhorst]

With all callers and selftests fixed to use ww locking, we can now
finally remove this lock.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c|  2 -
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  5 +--
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  1 -
 drivers/gpu/drm/i915/gem/i915_gem_pages.c | 38 ---
 drivers/gpu/drm/i915/gem/i915_gem_phys.c  | 34 -
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  | 37 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.h  |  4 +-
 drivers/gpu/drm/i915/gem/i915_gem_tiling.c|  2 -
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   |  3 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |  4 +-
 drivers/gpu/drm/i915/i915_gem.c   |  8 +---
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  2 +-
 13 files changed, 53 insertions(+), 89 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 028a556ab1a5..08d806bbf48e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -62,8 +62,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
  const struct drm_i915_gem_object_ops *ops,
  struct lock_class_key *key, unsigned flags)
 {
-   mutex_init(&obj->mm.lock);
-
spin_lock_init(&obj->vma.lock);
INIT_LIST_HEAD(&obj->vma.list);
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index e7236224a29c..f6ccd05010df 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -123,7 +123,7 @@ static inline void assert_object_held_shared(struct 
drm_i915_gem_object *obj)
 */
if (IS_ENABLED(CONFIG_LOCKDEP) &&
kref_read(&obj->base.refcount) > 0)
-   lockdep_assert_held(&obj->mm.lock);
+   assert_object_held(obj);
 }
 
 static inline int __i915_gem_object_lock(struct drm_i915_gem_object *obj,
@@ -328,7 +328,7 @@ int __i915_gem_object_get_pages(struct drm_i915_gem_object 
*obj);
 static inline int __must_check
 i915_gem_object_pin_pages(struct drm_i915_gem_object *obj)
 {
-   might_lock(&obj->mm.lock);
+   assert_object_held(obj);
 
if (atomic_inc_not_zero(&obj->mm.pages_pin_count))
return 0;
@@ -374,7 +374,6 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
 }
 
 int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
-int __i915_gem_object_put_pages_locked(struct drm_i915_gem_object *obj);
 void i915_gem_object_truncate(struct drm_i915_gem_object *obj);
 void i915_gem_object_writeback(struct drm_i915_gem_object *obj);
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 0aa391f5d73c..6ba8f5abef49 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -209,7 +209,6 @@ struct drm_i915_gem_object {
 * Protects the pages and their use. Do not use directly, but
 * instead go through the pin/unpin interfaces.
 */
-   struct mutex lock;
atomic_t pages_pin_count;
atomic_t shrink_pin;
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 81b1b560ad18..55ed1b7b06ce 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -67,7 +67,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object 
*obj,
struct list_head *list;
unsigned long flags;
 
-   lockdep_assert_held(&obj->mm.lock);
+   assert_object_held(obj);
spin_lock_irqsave(&i915->mm.obj_lock, flags);
 
i915->mm.shrink_count++;
@@ -114,9 +114,7 @@ int __i915_gem_object_get_pages(struct drm_i915_gem_object 
*obj)
 {
int err;
 
-   err = mutex_lock_interruptible(&obj->mm.lock);
-   if (err)
-   return err;
+   assert_object_held(obj);
 
assert_object_held_shared(obj);
 
@@ -125,15 +123,13 @@ int __i915_gem_object_get_pages(struct 
drm_i915_gem_object *obj)
 
err = i915_gem_object_get_pages(obj);
if (err)
-   goto unlock;
+   return err;
 
smp_mb__before_atomic();
}
atomic_inc(&obj->mm.pages_pin_count);
 
-unlock:
-   mutex_unlock(&obj->mm.lock);
-   return err;
+   return 0;
 }
 
 int i915_gem_object_pin_pages_unlocked(struct drm_i915_gem_object *obj)
@@ -222,7 +218,7 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object 
*obj)
return pages;
 }
 
-int __i915_gem_object_put_pages_locked(struct drm_i915_gem_object 

[Intel-gfx] [PATCH v2 22/61] drm/i915: Add object locking to vm_fault_cpu

[Maarten Lankhorst]

Take a simple lock so we hold ww around (un)pin_pages as needed.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 5aa037ca3a41..ba8e9ef6943d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -246,6 +246,9 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
 area->vm_flags & VM_WRITE))
return VM_FAULT_SIGBUS;
 
+   if (i915_gem_object_lock_interruptible(obj, NULL))
+   return VM_FAULT_NOPAGE;
+
err = i915_gem_object_pin_pages(obj);
if (err)
goto out;
@@ -269,6 +272,7 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
i915_gem_object_unpin_pages(obj);
 
 out:
+   i915_gem_object_unlock(obj);
return i915_error_to_vmf_fault(err);
 }
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 07/61] drm/i915: Rework struct phys attachment handling

[Maarten Lankhorst]

Instead of creating a separate object type, we make changes to
the shmem type, to clear struct page backing. This will allow us to
ensure we never run into a race when we exchange obj->ops with other
function pointers.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  3 +
 drivers/gpu/drm/i915/gem/i915_gem_phys.c  | 91 ++-
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c |  8 +-
 .../drm/i915/gem/selftests/i915_gem_phys.c|  6 --
 4 files changed, 56 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 04c29ed93632..e0c1e2817bee 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -38,6 +38,9 @@ void __i915_gem_object_release_shmem(struct 
drm_i915_gem_object *obj,
 bool needs_clflush);
 
 int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, int align);
+void i915_gem_object_put_pages_phys(struct drm_i915_gem_object *obj,
+   struct sg_table *pages);
+
 
 void i915_gem_flush_free_objects(struct drm_i915_private *i915);
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c 
b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
index 3b92156b494d..3960c1d9d415 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
@@ -76,6 +76,8 @@ static int i915_gem_object_get_pages_phys(struct 
drm_i915_gem_object *obj)
 
intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
 
+   /* We're no longer struct page backed */
+   obj->flags &= ~I915_BO_ALLOC_STRUCT_PAGE;
__i915_gem_object_set_pages(obj, st, sg->length);
 
return 0;
@@ -89,7 +91,7 @@ static int i915_gem_object_get_pages_phys(struct 
drm_i915_gem_object *obj)
return -ENOMEM;
 }
 
-static void
+void
 i915_gem_object_put_pages_phys(struct drm_i915_gem_object *obj,
   struct sg_table *pages)
 {
@@ -134,83 +136,82 @@ i915_gem_object_put_pages_phys(struct drm_i915_gem_object 
*obj,
  vaddr, dma);
 }
 
-static void phys_release(struct drm_i915_gem_object *obj)
+static int i915_gem_object_shmem_to_phys(struct drm_i915_gem_object *obj)
 {
-   fput(obj->base.filp);
-}
+   struct sg_table *pages;
+   int err;
+
+   pages = __i915_gem_object_unset_pages(obj);
+
+   err = i915_gem_object_get_pages_phys(obj);
+   if (err)
+   goto err_xfer;
+
+   /* Perma-pin (until release) the physical set of pages */
+   __i915_gem_object_pin_pages(obj);
+
+   if (!IS_ERR_OR_NULL(pages))
+   i915_gem_shmem_ops.put_pages(obj, pages);
+
+   i915_gem_object_release_memory_region(obj);
+   return 0;
 
-static const struct drm_i915_gem_object_ops i915_gem_phys_ops = {
-   .name = "i915_gem_object_phys",
-   .get_pages = i915_gem_object_get_pages_phys,
-   .put_pages = i915_gem_object_put_pages_phys,
+err_xfer:
+   if (!IS_ERR_OR_NULL(pages)) {
+   unsigned int sg_page_sizes = i915_sg_page_sizes(pages->sgl);
 
-   .release = phys_release,
-};
+   __i915_gem_object_set_pages(obj, pages, sg_page_sizes);
+   }
+   return err;
+}
 
 int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, int align)
 {
-   struct sg_table *pages;
int err;
 
if (align > obj->base.size)
return -EINVAL;
 
-   if (obj->ops == &i915_gem_phys_ops)
-   return 0;
-
if (obj->ops != &i915_gem_shmem_ops)
return -EINVAL;
 
+   if (!i915_gem_object_has_struct_page(obj))
+   return 0;
+
err = i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
if (err)
return err;
 
mutex_lock_nested(&obj->mm.lock, I915_MM_GET_PAGES);
 
+   if (unlikely(!i915_gem_object_has_struct_page(obj)))
+   goto out;
+
if (obj->mm.madv != I915_MADV_WILLNEED) {
err = -EFAULT;
-   goto err_unlock;
+   goto out;
}
 
if (obj->mm.quirked) {
err = -EFAULT;
-   goto err_unlock;
+   goto out;
}
 
-   if (obj->mm.mapping) {
+   if (obj->mm.mapping || i915_gem_object_has_pinned_pages(obj)) {
err = -EBUSY;
-   goto err_unlock;
+   goto out;
}
 
-   pages = __i915_gem_object_unset_pages(obj);
-
-   obj->ops = &i915_gem_phys_ops;
-   obj->flags &= ~I915_BO_ALLOC_STRUCT_PAGE;
-
-   err = i915_gem_object_get_pages(obj);
-   if (err)
-   goto err_xfer;
-
-   /* Perma-pin (until release) the physical set of pages */
-   __i915_gem_object_pin_pages(obj);
-
-   if (!IS_ERR_OR_NULL(pages))
-   i915_gem_shmem_ops.put_pages(obj, pages);
-
-   i915_gem_object_release_mem

[Intel-gfx] [PATCH v2 39/61] drm/i915: Use a single page table lock for each gtt.

[Maarten Lankhorst]

We may create page table objects on the fly, but we may need to
wait with the ww lock held. Instead of waiting on a freed obj
lock, ensure we have the same lock for each object to keep
-EDEADLK working. This ensures that i915_vma_pin_ww can lock
the page tables when required.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_ggtt.c  |  8 +-
 drivers/gpu/drm/i915/gt/intel_gtt.c   | 38 ++-
 drivers/gpu/drm/i915/gt/intel_gtt.h   |  5 
 drivers/gpu/drm/i915/gt/intel_ppgtt.c |  3 ++-
 drivers/gpu/drm/i915/i915_vma.c   |  5 
 5 files changed, 56 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 60bd2c8ed8b0..17ecaef1834d 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -615,7 +615,9 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
if (err)
goto err_ppgtt;
 
+   i915_gem_object_lock(ppgtt->vm.scratch[0], NULL);
err = i915_vm_pin_pt_stash(&ppgtt->vm, &stash);
+   i915_gem_object_unlock(ppgtt->vm.scratch[0]);
if (err)
goto err_stash;
 
@@ -702,6 +704,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
 
mutex_unlock(&ggtt->vm.mutex);
i915_address_space_fini(&ggtt->vm);
+   dma_resv_fini(&ggtt->vm.resv);
 
arch_phys_wc_del(ggtt->mtrr);
 
@@ -1078,6 +1081,7 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct 
intel_gt *gt)
ggtt->vm.gt = gt;
ggtt->vm.i915 = i915;
ggtt->vm.dma = &i915->drm.pdev->dev;
+   dma_resv_init(&ggtt->vm.resv);
 
if (INTEL_GEN(i915) <= 5)
ret = i915_gmch_probe(ggtt);
@@ -1085,8 +1089,10 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct 
intel_gt *gt)
ret = gen6_gmch_probe(ggtt);
else
ret = gen8_gmch_probe(ggtt);
-   if (ret)
+   if (ret) {
+   dma_resv_fini(&ggtt->vm.resv);
return ret;
+   }
 
if ((ggtt->vm.total - 1) >> 32) {
drm_err(&i915->drm,
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c 
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 3f1114b58b01..567a2f875088 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -13,16 +13,36 @@
 
 struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int sz)
 {
+   struct drm_i915_gem_object *obj;
+
if (I915_SELFTEST_ONLY(should_fail(&vm->fault_attr, 1)))
i915_gem_shrink_all(vm->i915);
 
-   return i915_gem_object_create_internal(vm->i915, sz);
+   obj = i915_gem_object_create_internal(vm->i915, sz);
+   /* ensure all dma objects have the same reservation class */
+   if (!IS_ERR(obj))
+   obj->base.resv = &vm->resv;
+   return obj;
 }
 
 int pin_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
 {
int err;
 
+   i915_gem_object_lock(obj, NULL);
+   err = i915_gem_object_pin_pages(obj);
+   i915_gem_object_unlock(obj);
+   if (err)
+   return err;
+
+   i915_gem_object_make_unshrinkable(obj);
+   return 0;
+}
+
+int pin_pt_dma_locked(struct i915_address_space *vm, struct 
drm_i915_gem_object *obj)
+{
+   int err;
+
err = i915_gem_object_pin_pages(obj);
if (err)
return err;
@@ -56,6 +76,20 @@ void __i915_vm_close(struct i915_address_space *vm)
mutex_unlock(&vm->mutex);
 }
 
+/* lock the vm into the current ww, if we lock one, we lock all */
+int i915_vm_lock_objects(struct i915_address_space *vm,
+struct i915_gem_ww_ctx *ww)
+{
+   if (vm->scratch[0]->base.resv == &vm->resv) {
+   return i915_gem_object_lock(vm->scratch[0], ww);
+   } else {
+   struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+
+   /* We borrowed the scratch page from ggtt, take the top level 
object */
+   return i915_gem_object_lock(ppgtt->pd->pt.base, ww);
+   }
+}
+
 void i915_address_space_fini(struct i915_address_space *vm)
 {
drm_mm_takedown(&vm->mm);
@@ -69,6 +103,7 @@ static void __i915_vm_release(struct work_struct *work)
 
vm->cleanup(vm);
i915_address_space_fini(vm);
+   dma_resv_fini(&vm->resv);
 
kfree(vm);
 }
@@ -98,6 +133,7 @@ void i915_address_space_init(struct i915_address_space *vm, 
int subclass)
mutex_init(&vm->mutex);
lockdep_set_subclass(&vm->mutex, subclass);
i915_gem_shrinker_taints_mutex(vm->i915, &vm->mutex);
+   dma_resv_init(&vm->resv);
 
GEM_BUG_ON(!vm->total);
drm_mm_init(&vm->mm, 0, vm->total);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h 
b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 8a33940a71f3..16063b2f0119 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -238,6 +238,7 @

[Intel-gfx] [PATCH v2 04/61] drm/i915: Ensure we hold the object mutex in pin correctly.

[Maarten Lankhorst]

Currently we have a lot of places where we hold the gem object lock,
but haven't yet been converted to the ww dance. Complain loudly about
those places.

i915_vma_pin shouldn't have the obj lock held, so we can do a ww dance,
while i915_vma_pin_ww should.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_renderstate.c |  2 +-
 drivers/gpu/drm/i915/i915_vma.c | 11 ++-
 drivers/gpu/drm/i915/i915_vma.h |  3 +++
 3 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_renderstate.c 
b/drivers/gpu/drm/i915/gt/intel_renderstate.c
index ea2a77c7b469..a68e5c23a67c 100644
--- a/drivers/gpu/drm/i915/gt/intel_renderstate.c
+++ b/drivers/gpu/drm/i915/gt/intel_renderstate.c
@@ -196,7 +196,7 @@ int intel_renderstate_init(struct intel_renderstate *so,
if (err)
goto err_context;
 
-   err = i915_vma_pin(so->vma, 0, 0, PIN_GLOBAL | PIN_HIGH);
+   err = i915_vma_pin_ww(so->vma, &so->ww, 0, 0, PIN_GLOBAL | PIN_HIGH);
if (err)
goto err_context;
 
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index ffb5287e055a..4ead74c5142b 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -863,6 +863,8 @@ int i915_vma_pin_ww(struct i915_vma *vma, struct 
i915_gem_ww_ctx *ww,
 #ifdef CONFIG_PROVE_LOCKING
if (debug_locks && lockdep_is_held(&vma->vm->i915->drm.struct_mutex))
WARN_ON(!ww);
+   if (debug_locks && ww && vma->resv)
+   assert_vma_held(vma);
 #endif
 
BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
@@ -1018,8 +1020,15 @@ int i915_ggtt_pin(struct i915_vma *vma, struct 
i915_gem_ww_ctx *ww,
 
GEM_BUG_ON(!i915_vma_is_ggtt(vma));
 
+#ifdef CONFIG_LOCKDEP
+   WARN_ON(!ww && vma->resv && dma_resv_held(vma->resv));
+#endif
+
do {
-   err = i915_vma_pin_ww(vma, ww, 0, align, flags | PIN_GLOBAL);
+   if (ww)
+   err = i915_vma_pin_ww(vma, ww, 0, align, flags | 
PIN_GLOBAL);
+   else
+   err = i915_vma_pin(vma, 0, align, flags | PIN_GLOBAL);
if (err != -ENOSPC) {
if (!err) {
err = i915_vma_wait_for_bind(vma);
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 5b3a3c653454..838bbbeb11cc 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -243,6 +243,9 @@ i915_vma_pin_ww(struct i915_vma *vma, struct 
i915_gem_ww_ctx *ww,
 static inline int __must_check
 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 {
+#ifdef CONFIG_LOCKDEP
+   WARN_ON_ONCE(vma->resv && dma_resv_held(vma->resv));
+#endif
return i915_vma_pin_ww(vma, NULL, size, alignment, flags);
 }
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner.

[Maarten Lankhorst]

By default, we assume that it's called inside igt_create_request
to keep existing selftests working, but allow for manual pinning
when passing a ww context.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/selftests/igt_spinner.c | 136 ---
 drivers/gpu/drm/i915/selftests/igt_spinner.h |   5 +
 2 files changed, 95 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c 
b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index ec0ecb4e4ca6..9c461edb0b73 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -11,8 +11,6 @@
 
 int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
 {
-   unsigned int mode;
-   void *vaddr;
int err;
 
memset(spin, 0, sizeof(*spin));
@@ -23,6 +21,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct 
intel_gt *gt)
err = PTR_ERR(spin->hws);
goto err;
}
+   i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC);
 
spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->obj)) {
@@ -30,34 +29,83 @@ int igt_spinner_init(struct igt_spinner *spin, struct 
intel_gt *gt)
goto err_hws;
}
 
-   i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC);
-   vaddr = i915_gem_object_pin_map(spin->hws, I915_MAP_WB);
-   if (IS_ERR(vaddr)) {
-   err = PTR_ERR(vaddr);
-   goto err_obj;
-   }
-   spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
-
-   mode = i915_coherent_map_type(gt->i915);
-   vaddr = i915_gem_object_pin_map(spin->obj, mode);
-   if (IS_ERR(vaddr)) {
-   err = PTR_ERR(vaddr);
-   goto err_unpin_hws;
-   }
-   spin->batch = vaddr;
-
return 0;
 
-err_unpin_hws:
-   i915_gem_object_unpin_map(spin->hws);
-err_obj:
-   i915_gem_object_put(spin->obj);
 err_hws:
i915_gem_object_put(spin->hws);
 err:
return err;
 }
 
+static void *igt_spinner_pin_obj(struct intel_context *ce,
+struct i915_gem_ww_ctx *ww,
+struct drm_i915_gem_object *obj,
+unsigned int mode, struct i915_vma **vma)
+{
+   void *vaddr;
+   int ret;
+
+   *vma = i915_vma_instance(obj, ce->vm, NULL);
+   if (IS_ERR(*vma))
+   return ERR_CAST(*vma);
+
+   ret = i915_gem_object_lock(obj, ww);
+   if (ret)
+   return ERR_PTR(ret);
+
+   vaddr = i915_gem_object_pin_map(obj, mode);
+
+   if (!ww)
+   i915_gem_object_unlock(obj);
+
+   if (IS_ERR(vaddr))
+   return vaddr;
+
+   if (ww)
+   ret = i915_vma_pin_ww(*vma, ww, 0, 0, PIN_USER);
+   else
+   ret = i915_vma_pin(*vma, 0, 0, PIN_USER);
+
+   if (ret) {
+   i915_gem_object_unpin_map(obj);
+   return ERR_PTR(ret);
+   }
+
+   return vaddr;
+}
+
+int igt_spinner_pin(struct igt_spinner *spin,
+   struct intel_context *ce,
+   struct i915_gem_ww_ctx *ww)
+{
+   void *vaddr;
+
+   if (spin->ce && WARN_ON(spin->ce != ce))
+   return -ENODEV;
+   spin->ce = ce;
+
+   if (!spin->seqno) {
+   vaddr = igt_spinner_pin_obj(ce, ww, spin->hws, I915_MAP_WB, 
&spin->hws_vma);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
+   }
+
+   if (!spin->batch) {
+   unsigned int mode =
+   i915_coherent_map_type(spin->gt->i915);
+
+   vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, 
&spin->batch_vma);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   spin->batch = vaddr;
+   }
+
+   return 0;
+}
+
 static unsigned int seqno_offset(u64 fence)
 {
return offset_in_page(sizeof(u32) * fence);
@@ -102,27 +150,18 @@ igt_spinner_create_request(struct igt_spinner *spin,
if (!intel_engine_can_store_dword(ce->engine))
return ERR_PTR(-ENODEV);
 
-   vma = i915_vma_instance(spin->obj, ce->vm, NULL);
-   if (IS_ERR(vma))
-   return ERR_CAST(vma);
-
-   hws = i915_vma_instance(spin->hws, ce->vm, NULL);
-   if (IS_ERR(hws))
-   return ERR_CAST(hws);
+   if (!spin->batch) {
+   err = igt_spinner_pin(spin, ce, NULL);
+   if (err)
+   return ERR_PTR(err);
+   }
 
-   err = i915_vma_pin(vma, 0, 0, PIN_USER);
-   if (err)
-   return ERR_PTR(err);
-
-   err = i915_vma_pin(hws, 0, 0, PIN_USER);
-   if (err)
-   goto unpin_vma;
+   hws = spin->hws_vma;
+   vma = spin->batch_vma;
 
rq = intel_context_create_request(ce);
-   if (IS

[Intel-gfx] [PATCH v2 12/61] drm/i915: Reject more ioctls for userptr

[Maarten Lankhorst]

Allow set_domain to fail silently, waiting for idle should be good enough.
set_tiling and set_caching are rejected with -ENXIO, there's no valid reason
to allow it.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/display/intel_display.c | 2 +-
 drivers/gpu/drm/i915/gem/i915_gem_domain.c   | 4 +++-
 drivers/gpu/drm/i915/gem/i915_gem_object.h   | 6 ++
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c  | 3 ++-
 4 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index cf1417ff54d7..a7e3f61c5777 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17357,7 +17357,7 @@ static int intel_user_framebuffer_create_handle(struct 
drm_framebuffer *fb,
struct drm_i915_gem_object *obj = intel_fb_obj(fb);
struct drm_i915_private *i915 = to_i915(obj->base.dev);
 
-   if (obj->userptr.mm) {
+   if (i915_gem_object_is_userptr(obj)) {
drm_dbg(&i915->drm,
"attempting to use a userptr for a framebuffer, 
denied\n");
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c 
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 7c90a63c273d..43c22648b074 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -543,7 +543,9 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void 
*data,
 * considered to be outside of any cache domain.
 */
if (i915_gem_object_is_proxy(obj)) {
-   err = -ENXIO;
+   /* silently allow userptr to complete */
+   if (!i915_gem_object_is_userptr(obj))
+   err = -ENXIO;
goto out;
}
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index e0c1e2817bee..436ff0d4951f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -528,6 +528,12 @@ void __i915_gem_object_flush_frontbuffer(struct 
drm_i915_gem_object *obj,
 void __i915_gem_object_invalidate_frontbuffer(struct drm_i915_gem_object *obj,
  enum fb_op_origin origin);
 
+static inline bool
+i915_gem_object_is_userptr(struct drm_i915_gem_object *obj)
+{
+   return obj->userptr.mm;
+}
+
 static inline void
 i915_gem_object_flush_frontbuffer(struct drm_i915_gem_object *obj,
  enum fb_op_origin origin)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 9c1293c99d88..3fd63fdd7466 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -721,7 +721,8 @@ static const struct drm_i915_gem_object_ops 
i915_gem_userptr_ops = {
.name = "i915_gem_object_userptr",
.flags = I915_GEM_OBJECT_IS_SHRINKABLE |
 I915_GEM_OBJECT_NO_MMAP |
-I915_GEM_OBJECT_ASYNC_CANCEL,
+I915_GEM_OBJECT_ASYNC_CANCEL |
+I915_GEM_OBJECT_IS_PROXY,
.get_pages = i915_gem_userptr_get_pages,
.put_pages = i915_gem_userptr_put_pages,
.dmabuf_export = i915_gem_userptr_dmabuf_export,
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 11/61] drm/i915: No longer allow exporting userptr through dma-buf

[Maarten Lankhorst]

It doesn't make sense to export a memory address, we will prevent
allowing access this way to different address spaces when we
rework userptr handling, so best to explicitly disable it.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 136a589e5d94..9c1293c99d88 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -694,10 +694,9 @@ i915_gem_userptr_release(struct drm_i915_gem_object *obj)
 static int
 i915_gem_userptr_dmabuf_export(struct drm_i915_gem_object *obj)
 {
-   if (obj->userptr.mmu_object)
-   return 0;
+   drm_dbg(obj->base.dev, "Exporting userptr no longer allowed\n");
 
-   return i915_gem_userptr_init__mmu_notifier(obj, 0);
+   return -EINVAL;
 }
 
 static int
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 59/61] drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal

[Maarten Lankhorst]

We need to lock the global gtt dma_resv, use i915_vm_lock_objects
to handle this correctly. Add ww handling for this where required.

Add the object lock around unpin/put pages, and use the unlocked
versions of pin_pages and pin_map where required.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 92 ++-
 1 file changed, 67 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 2cfe99c79034..d07dd6780005 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -129,7 +129,7 @@ fake_dma_object(struct drm_i915_private *i915, u64 size)
obj->cache_level = I915_CACHE_NONE;
 
/* Preallocate the "backing storage" */
-   if (i915_gem_object_pin_pages(obj))
+   if (i915_gem_object_pin_pages_unlocked(obj))
goto err_obj;
 
i915_gem_object_unpin_pages(obj);
@@ -145,6 +145,7 @@ static int igt_ppgtt_alloc(void *arg)
 {
struct drm_i915_private *dev_priv = arg;
struct i915_ppgtt *ppgtt;
+   struct i915_gem_ww_ctx ww;
u64 size, last, limit;
int err = 0;
 
@@ -170,6 +171,12 @@ static int igt_ppgtt_alloc(void *arg)
limit = totalram_pages() << PAGE_SHIFT;
limit = min(ppgtt->vm.total, limit);
 
+   i915_gem_ww_ctx_init(&ww, false);
+retry:
+   err = i915_vm_lock_objects(&ppgtt->vm, &ww);
+   if (err)
+   goto err_ppgtt_cleanup;
+
/* Check we can allocate the entire range */
for (size = 4096; size <= limit; size <<= 2) {
struct i915_vm_pt_stash stash = {};
@@ -214,6 +221,13 @@ static int igt_ppgtt_alloc(void *arg)
}
 
 err_ppgtt_cleanup:
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+
i915_vm_put(&ppgtt->vm);
return err;
 }
@@ -275,7 +289,7 @@ static int lowlevel_hole(struct i915_address_space *vm,
 
GEM_BUG_ON(obj->base.size != BIT_ULL(size));
 
-   if (i915_gem_object_pin_pages(obj)) {
+   if (i915_gem_object_pin_pages_unlocked(obj)) {
i915_gem_object_put(obj);
kfree(order);
break;
@@ -296,20 +310,36 @@ static int lowlevel_hole(struct i915_address_space *vm,
 
if (vm->allocate_va_range) {
struct i915_vm_pt_stash stash = {};
+   struct i915_gem_ww_ctx ww;
+   int err;
+
+   i915_gem_ww_ctx_init(&ww, false);
+retry:
+   err = i915_vm_lock_objects(vm, &ww);
+   if (err)
+   goto alloc_vm_end;
 
+   err = -ENOMEM;
if (i915_vm_alloc_pt_stash(vm, &stash,
   BIT_ULL(size)))
-   break;
-
-   if (i915_vm_pin_pt_stash(vm, &stash)) {
-   i915_vm_free_pt_stash(vm, &stash);
-   break;
-   }
+   goto alloc_vm_end;
 
-   vm->allocate_va_range(vm, &stash,
- addr, BIT_ULL(size));
+   err = i915_vm_pin_pt_stash(vm, &stash);
+   if (!err)
+   vm->allocate_va_range(vm, &stash,
+ addr, 
BIT_ULL(size));
 
i915_vm_free_pt_stash(vm, &stash);
+alloc_vm_end:
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+
+   if (err)
+   break;
}
 
mock_vma->pages = obj->mm.pages;
@@ -1165,7 +1195,7 @@ static int igt_ggtt_page(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err)
goto out_free;
 
@@ -1332,7 +1362,7 @@ static int igt_gtt_reserve(void *arg)
goto out;
}
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pi

[Intel-gfx] [PATCH v2 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged

[Maarten Lankhorst]

Instead of force unbinding and rebinding every time, we try to check
if our notifier seqcount is still correct when pages are bound. This
way we only rebind userptr when we need to, and prevent stalls.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 29 ++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 96f869823844..5191e06b3d0f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -263,12 +263,35 @@ int i915_gem_object_userptr_submit_init(struct 
drm_i915_gem_object *obj)
if (ret)
return ret;
 
-   /* Make sure userptr is unbound for next attempt, so we don't use stale 
pages. */
-   ret = i915_gem_object_userptr_unbind(obj, false);
+   /* optimistically try to preserve current pages while unlocked */
+   if (i915_gem_object_has_pages(obj) &&
+   !mmu_interval_check_retry(&obj->userptr.notifier,
+ obj->userptr.notifier_seq)) {
+   ret = mutex_lock_interruptible(&i915->mm.notifier_lock);
+   if (!ret) {
+   if (obj->userptr.pvec &&
+   !mmu_interval_read_retry(&obj->userptr.notifier,
+
obj->userptr.notifier_seq)) {
+   obj->userptr.page_ref++;
+   mutex_unlock(&i915->mm.notifier_lock);
+
+   /* We can keep using the current binding, this 
is the fastpath */
+   ret = 1;
+   }
+   }
+   }
+
+   if (!ret) {
+   /* Make sure userptr is unbound for next attempt, so we don't 
use stale pages. */
+   ret = i915_gem_object_userptr_unbind(obj, false);
+   }
i915_gem_object_unlock(obj);
-   if (ret)
+   if (ret < 0)
return ret;
 
+   if (ret > 0)
+   return 0;
+
notifier_seq = mmu_interval_read_begin(&obj->userptr.notifier);
 
pvec = kvmalloc_array(num_pages, sizeof(struct page *), GFP_KERNEL);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 37/61] drm/i915: Add missing ww lock in intel_dsb_prepare.

[Maarten Lankhorst]

Because of the long lifetime of the mapping, we cannot wrap this in a
simple limited ww lock. Just use the unlocked version of pin_map,
because we'll likely release the mapping a lot later, in a different
thread.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 566fa72427b3..857126822a88 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -293,7 +293,7 @@ void intel_dsb_prepare(struct intel_crtc_state *crtc_state)
goto out;
}
 
-   buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
+   buf = i915_gem_object_pin_map_unlocked(vma->obj, I915_MAP_WC);
if (IS_ERR(buf)) {
drm_err(&i915->drm, "Command buffer creation failed\n");
i915_vma_unpin_and_release(&vma, I915_VMA_RELEASE_MAP);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 46/61] drm/i915/selftests: Prepare mman testcases for obj->mm.lock removal.

[Maarten Lankhorst]

Ensure we hold the lock around put_pages, and use the unlocked wrappers
for pinning pages and mappings.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 3ac7628f3bc4..85fff8bed08c 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -321,7 +321,7 @@ static int igt_partial_tiling(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
   nreal, obj->base.size / PAGE_SIZE, err);
@@ -458,7 +458,7 @@ static int igt_smoke_tiling(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
   nreal, obj->base.size / PAGE_SIZE, err);
@@ -797,7 +797,7 @@ static int wc_set(struct drm_i915_gem_object *obj)
 {
void *vaddr;
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
 
@@ -813,7 +813,7 @@ static int wc_check(struct drm_i915_gem_object *obj)
void *vaddr;
int err = 0;
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
 
@@ -1315,7 +1315,9 @@ static int __igt_mmap_revoke(struct drm_i915_private 
*i915,
}
 
if (type != I915_MMAP_TYPE_GTT) {
+   i915_gem_object_lock(obj, NULL);
__i915_gem_object_put_pages(obj);
+   i915_gem_object_unlock(obj);
if (i915_gem_object_has_pages(obj)) {
pr_err("Failed to put-pages object!\n");
err = -EINVAL;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 35/61] drm/i915: Lock ww in ucode objects correctly

[Maarten Lankhorst]

In the ucode functions, the calls are done before userspace runs,
when debugging using debugfs, or when creating semi-permanent mappings;
we can safely use the unlocked versions that does the ww dance for us.

Because there is no pin_pages_unlocked yet, add it as convenience function.

This removes possible lockdep splats about missing resv lock for ucode.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.h |  2 ++
 drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 20 
 drivers/gpu/drm/i915/gt/uc/intel_guc.c |  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c |  4 ++--
 drivers/gpu/drm/i915/gt/uc/intel_huc.c |  2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c   |  2 +-
 6 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index a3a701d849bf..e7236224a29c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -336,6 +336,8 @@ i915_gem_object_pin_pages(struct drm_i915_gem_object *obj)
return __i915_gem_object_get_pages(obj);
 }
 
+int i915_gem_object_pin_pages_unlocked(struct drm_i915_gem_object *obj);
+
 static inline bool
 i915_gem_object_has_pages(struct drm_i915_gem_object *obj)
 {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 429ec652c394..81b1b560ad18 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -136,6 +136,26 @@ int __i915_gem_object_get_pages(struct drm_i915_gem_object 
*obj)
return err;
 }
 
+int i915_gem_object_pin_pages_unlocked(struct drm_i915_gem_object *obj)
+{
+   struct i915_gem_ww_ctx ww;
+   int err;
+
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   err = i915_gem_object_lock(obj, &ww);
+   if (!err)
+   err = i915_gem_object_pin_pages(obj);
+
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+   return err;
+}
+
 /* Immediately discard the backing storage */
 void i915_gem_object_truncate(struct drm_i915_gem_object *obj)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index e4aaa5f29796..ecdd3b4f1a32 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -712,7 +712,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, 
u32 size,
if (IS_ERR(vma))
return PTR_ERR(vma);
 
-   vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(vma->obj, I915_MAP_WB);
if (IS_ERR(vaddr)) {
i915_vma_unpin_and_release(&vma, 0);
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 9bbe8a795cb8..8dc8678e7ab0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -335,7 +335,7 @@ static int guc_log_map(struct intel_guc_log *log)
 * buffer pages, so that we can directly get the data
 * (up-to-date) from memory.
 */
-   vaddr = i915_gem_object_pin_map(log->vma->obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(log->vma->obj, I915_MAP_WC);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
 
@@ -744,7 +744,7 @@ int intel_guc_log_dump(struct intel_guc_log *log, struct 
drm_printer *p,
if (!obj)
return 0;
 
-   map = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(map)) {
DRM_DEBUG("Failed to pin object\n");
drm_puts(p, "(log data unaccessible)\n");
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index 65eeb44b397d..2126dd81ac38 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -82,7 +82,7 @@ static int intel_huc_rsa_data_create(struct intel_huc *huc)
if (IS_ERR(vma))
return PTR_ERR(vma);
 
-   vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(vma->obj, I915_MAP_WB);
if (IS_ERR(vaddr)) {
i915_vma_unpin_and_release(&vma, 0);
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 80e8b6c3bc8c..bf4835a66ad8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -541,7 +541,7 @@ int intel_uc_fw_init(struct intel_uc_fw *uc_fw)
if (!intel_uc_fw_is_available(uc_fw))
return -ENOEXEC;
 
-   err = i915_gem_object_pi

[Intel-gfx] [PATCH v2 44/61] drm/i915/selftests: Prepare dma-buf tests for obj->mm.lock removal.

[Maarten Lankhorst]

Use pin_pages_unlocked() where we don't have a lock.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
index b6d43880b0c1..dd74bc09ec88 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
@@ -194,7 +194,7 @@ static int igt_dmabuf_import_ownership(void *arg)
 
dma_buf_put(dmabuf);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
pr_err("i915_gem_object_pin_pages failed with err=%d\n", err);
goto out_obj;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 19/61] drm/i915: Handle ww locking in init_status_page

[Maarten Lankhorst]

Try to pin to ggtt first, and use a full ww loop to handle
eviction correctly.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 37 +++
 1 file changed, 24 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 1985772152bf..66d87ce764e0 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -615,6 +615,7 @@ static void cleanup_status_page(struct intel_engine_cs 
*engine)
 }
 
 static int pin_ggtt_status_page(struct intel_engine_cs *engine,
+   struct i915_gem_ww_ctx *ww,
struct i915_vma *vma)
 {
unsigned int flags;
@@ -635,12 +636,13 @@ static int pin_ggtt_status_page(struct intel_engine_cs 
*engine,
else
flags = PIN_HIGH;
 
-   return i915_ggtt_pin(vma, NULL, 0, flags);
+   return i915_ggtt_pin(vma, ww, 0, flags);
 }
 
 static int init_status_page(struct intel_engine_cs *engine)
 {
struct drm_i915_gem_object *obj;
+   struct i915_gem_ww_ctx ww;
struct i915_vma *vma;
void *vaddr;
int ret;
@@ -664,30 +666,39 @@ static int init_status_page(struct intel_engine_cs 
*engine)
vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
-   goto err;
+   goto err_put;
}
 
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   ret = i915_gem_object_lock(obj, &ww);
+   if (!ret && !HWS_NEEDS_PHYSICAL(engine->i915))
+   ret = pin_ggtt_status_page(engine, &ww, vma);
+   if (ret)
+   goto err;
+
vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
if (IS_ERR(vaddr)) {
ret = PTR_ERR(vaddr);
-   goto err;
+   goto err_unpin;
}
 
engine->status_page.addr = memset(vaddr, 0, PAGE_SIZE);
engine->status_page.vma = vma;
 
-   if (!HWS_NEEDS_PHYSICAL(engine->i915)) {
-   ret = pin_ggtt_status_page(engine, vma);
-   if (ret)
-   goto err_unpin;
-   }
-
-   return 0;
-
 err_unpin:
-   i915_gem_object_unpin_map(obj);
+   if (ret)
+   i915_vma_unpin(vma);
 err:
-   i915_gem_object_put(obj);
+   if (ret == -EDEADLK) {
+   ret = i915_gem_ww_ctx_backoff(&ww);
+   if (!ret)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+err_put:
+   if (ret)
+   i915_gem_object_put(obj);
return ret;
 }
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 58/61] drm/i915/selftests: Prepare cs engine tests for obj->mm.lock removal

[Maarten Lankhorst]

Same as other tests, use pin_map_unlocked.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c 
b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 729c3c7b11e2..853d1f02131a 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -72,7 +72,7 @@ static struct i915_vma *create_empty_batch(struct 
intel_context *ce)
if (IS_ERR(obj))
return ERR_CAST(obj);
 
-   cs = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_put;
@@ -208,7 +208,7 @@ static struct i915_vma *create_nop_batch(struct 
intel_context *ce)
if (IS_ERR(obj))
return ERR_CAST(obj);
 
-   cs = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_put;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 41/61] drm/i915/selftests: Prepare client blit for obj->mm.lock removal.

[Maarten Lankhorst]

Straightforward conversion, just convert a bunch of calls to
unlocked versions.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index 4e36d4897ea6..cc782569765f 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
@@ -47,7 +47,7 @@ static int __igt_client_fill(struct intel_engine_cs *engine)
goto err_flush;
}
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_put;
@@ -159,7 +159,7 @@ static int prepare_blit(const struct tiled_blits *t,
u32 src_pitch, dst_pitch;
u32 cmd, *cs;
 
-   cs = i915_gem_object_pin_map(batch, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(batch, I915_MAP_WC);
if (IS_ERR(cs))
return PTR_ERR(cs);
 
@@ -379,7 +379,7 @@ static int verify_buffer(const struct tiled_blits *t,
y = i915_prandom_u32_max_state(t->height, prng);
p = y * t->width + x;
 
-   vaddr = i915_gem_object_pin_map(buf->vma->obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(buf->vma->obj, I915_MAP_WC);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
 
@@ -566,7 +566,7 @@ static int tiled_blits_prepare(struct tiled_blits *t,
int err;
int i;
 
-   map = i915_gem_object_pin_map(t->scratch.vma->obj, I915_MAP_WC);
+   map = i915_gem_object_pin_map_unlocked(t->scratch.vma->obj, 
I915_MAP_WC);
if (IS_ERR(map))
return PTR_ERR(map);
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 55/61] drm/i915/selftests: Prepare timeline tests for obj->mm.lock removal

[Maarten Lankhorst]

We can no longer call intel_timeline_pin with a null argument,
so add a ww loop that locks the backing object.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_timeline.c | 26 ++---
 1 file changed, 23 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c 
b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index 6d6092a28e6b..cd8374780f7c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -36,6 +36,26 @@ static unsigned long hwsp_cacheline(struct intel_timeline 
*tl)
return (address + offset_in_page(tl->hwsp_offset)) / CACHELINE_BYTES;
 }
 
+static int selftest_tl_pin(struct intel_timeline *tl)
+{
+   struct i915_gem_ww_ctx ww;
+   int err;
+
+   i915_gem_ww_ctx_init(&ww, false);
+retry:
+   err = i915_gem_object_lock(tl->hwsp_ggtt->obj, &ww);
+   if (!err)
+   err = intel_timeline_pin(tl, &ww);
+
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+   return err;
+}
+
 #define CACHELINES_PER_PAGE (PAGE_SIZE / CACHELINE_BYTES)
 
 struct mock_hwsp_freelist {
@@ -77,7 +97,7 @@ static int __mock_hwsp_timeline(struct mock_hwsp_freelist 
*state,
if (IS_ERR(tl))
return PTR_ERR(tl);
 
-   err = intel_timeline_pin(tl, NULL);
+   err = selftest_tl_pin(tl);
if (err) {
intel_timeline_put(tl);
return err;
@@ -463,7 +483,7 @@ checked_tl_write(struct intel_timeline *tl, struct 
intel_engine_cs *engine, u32
struct i915_request *rq;
int err;
 
-   err = intel_timeline_pin(tl, NULL);
+   err = selftest_tl_pin(tl);
if (err) {
rq = ERR_PTR(err);
goto out;
@@ -663,7 +683,7 @@ static int live_hwsp_wrap(void *arg)
if (!tl->has_initial_breadcrumb)
goto out_free;
 
-   err = intel_timeline_pin(tl, NULL);
+   err = selftest_tl_pin(tl);
if (err)
goto out_free;
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 50/61] drm/i915/selftests: Prepare context selftest for obj->mm.lock removal

[Maarten Lankhorst]

Only needs to convert a single call to the unlocked version.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_context.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c 
b/drivers/gpu/drm/i915/gt/selftest_context.c
index 1f4020e906a8..d9b0ebc938f1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -88,8 +88,8 @@ static int __live_context_size(struct intel_engine_cs *engine)
if (err)
goto err;
 
-   vaddr = i915_gem_object_pin_map(ce->state->obj,
-   i915_coherent_map_type(engine->i915));
+   vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
+
i915_coherent_map_type(engine->i915));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
intel_context_unpin(ce);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 34/61] drm/i915: Increase ww locking for perf.

[Maarten Lankhorst]

We need to lock a few more objects, some temporarily,
add ww lock where needed.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/i915_perf.c | 56 
 1 file changed, 43 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index e94976976571..281af1fdf514 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1579,7 +1579,7 @@ static int alloc_oa_buffer(struct i915_perf_stream 
*stream)
stream->oa_buffer.vma = vma;
 
stream->oa_buffer.vaddr =
-   i915_gem_object_pin_map(bo, I915_MAP_WB);
+   i915_gem_object_pin_map_unlocked(bo, I915_MAP_WB);
if (IS_ERR(stream->oa_buffer.vaddr)) {
ret = PTR_ERR(stream->oa_buffer.vaddr);
goto err_unpin;
@@ -1632,6 +1632,7 @@ static int alloc_noa_wait(struct i915_perf_stream *stream)
const u32 base = stream->engine->mmio_base;
 #define CS_GPR(x) GEN8_RING_CS_GPR(base, x)
u32 *batch, *ts0, *cs, *jump;
+   struct i915_gem_ww_ctx ww;
int ret, i;
enum {
START_TS,
@@ -1649,15 +1650,21 @@ static int alloc_noa_wait(struct i915_perf_stream 
*stream)
return PTR_ERR(bo);
}
 
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   ret = i915_gem_object_lock(bo, &ww);
+   if (ret)
+   goto out_ww;
+
/*
 * We pin in GGTT because we jump into this buffer now because
 * multiple OA config BOs will have a jump to this address and it
 * needs to be fixed during the lifetime of the i915/perf stream.
 */
-   vma = i915_gem_object_ggtt_pin(bo, NULL, 0, 0, PIN_HIGH);
+   vma = i915_gem_object_ggtt_pin_ww(bo, &ww, NULL, 0, 0, PIN_HIGH);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
-   goto err_unref;
+   goto out_ww;
}
 
batch = cs = i915_gem_object_pin_map(bo, I915_MAP_WB);
@@ -1791,12 +1798,19 @@ static int alloc_noa_wait(struct i915_perf_stream 
*stream)
__i915_gem_object_release_map(bo);
 
stream->noa_wait = vma;
-   return 0;
+   goto out_ww;
 
 err_unpin:
i915_vma_unpin_and_release(&vma, 0);
-err_unref:
-   i915_gem_object_put(bo);
+out_ww:
+   if (ret == -EDEADLK) {
+   ret = i915_gem_ww_ctx_backoff(&ww);
+   if (!ret)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+   if (ret)
+   i915_gem_object_put(bo);
return ret;
 }
 
@@ -1839,6 +1853,7 @@ alloc_oa_config_buffer(struct i915_perf_stream *stream,
 {
struct drm_i915_gem_object *obj;
struct i915_oa_config_bo *oa_bo;
+   struct i915_gem_ww_ctx ww;
size_t config_length = 0;
u32 *cs;
int err;
@@ -1859,10 +1874,16 @@ alloc_oa_config_buffer(struct i915_perf_stream *stream,
goto err_free;
}
 
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   err = i915_gem_object_lock(obj, &ww);
+   if (err)
+   goto out_ww;
+
cs = i915_gem_object_pin_map(obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
-   goto err_oa_bo;
+   goto out_ww;
}
 
cs = write_cs_mi_lri(cs,
@@ -1890,19 +1911,28 @@ alloc_oa_config_buffer(struct i915_perf_stream *stream,
   NULL);
if (IS_ERR(oa_bo->vma)) {
err = PTR_ERR(oa_bo->vma);
-   goto err_oa_bo;
+   goto out_ww;
}
 
oa_bo->oa_config = i915_oa_config_get(oa_config);
llist_add(&oa_bo->node, &stream->oa_config_bos);
 
-   return oa_bo;
+out_ww:
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
 
-err_oa_bo:
-   i915_gem_object_put(obj);
+   if (err)
+   i915_gem_object_put(obj);
 err_free:
-   kfree(oa_bo);
-   return ERR_PTR(err);
+   if (err) {
+   kfree(oa_bo);
+   return ERR_PTR(err);
+   }
+   return oa_bo;
 }
 
 static struct i915_vma *
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 47/61] drm/i915/selftests: Prepare object tests for obj->mm.lock removal.

[Maarten Lankhorst]

Convert a single pin_pages call to use the unlocked version.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
index bf853c40ec65..740ee8086a27 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
@@ -47,7 +47,7 @@ static int igt_gem_huge(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
 
-   err = i915_gem_object_pin_pages(obj);
+   err = i915_gem_object_pin_pages_unlocked(obj);
if (err) {
pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
   nreal, obj->base.size / PAGE_SIZE, err);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 31/61] drm/i915: Prepare for obj->mm.lock removal

[Maarten Lankhorst]

From: Thomas Hellström 

Stolen objects need to lock, and we may call put_pages when
refcount drops to 0, ensure all calls are handled correctly.

Idea-from: Thomas Hellström 
Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.h | 14 ++
 drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 14 --
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 10 +-
 3 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 8db84ce09d9f..a3a701d849bf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -112,6 +112,20 @@ i915_gem_object_put(struct drm_i915_gem_object *obj)
 
 #define assert_object_held(obj) dma_resv_assert_held((obj)->base.resv)
 
+/*
+ * If more than one potential simultaneous locker, assert held.
+ */
+static inline void assert_object_held_shared(struct drm_i915_gem_object *obj)
+{
+   /*
+* Note mm list lookup is protected by
+* kref_get_unless_zero().
+*/
+   if (IS_ENABLED(CONFIG_LOCKDEP) &&
+   kref_read(&obj->base.refcount) > 0)
+   lockdep_assert_held(&obj->mm.lock);
+}
+
 static inline int __i915_gem_object_lock(struct drm_i915_gem_object *obj,
 struct i915_gem_ww_ctx *ww,
 bool intr)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index ef1d5fabd077..429ec652c394 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -18,7 +18,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object 
*obj,
unsigned long supported = INTEL_INFO(i915)->page_sizes;
int i;
 
-   lockdep_assert_held(&obj->mm.lock);
+   assert_object_held_shared(obj);
 
if (i915_gem_object_is_volatile(obj))
obj->mm.madv = I915_MADV_DONTNEED;
@@ -67,6 +67,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object 
*obj,
struct list_head *list;
unsigned long flags;
 
+   lockdep_assert_held(&obj->mm.lock);
spin_lock_irqsave(&i915->mm.obj_lock, flags);
 
i915->mm.shrink_count++;
@@ -88,6 +89,8 @@ int i915_gem_object_get_pages(struct drm_i915_gem_object 
*obj)
struct drm_i915_private *i915 = to_i915(obj->base.dev);
int err;
 
+   assert_object_held_shared(obj);
+
if (unlikely(obj->mm.madv != I915_MADV_WILLNEED)) {
drm_dbg(&i915->drm,
"Attempting to obtain a purgeable object\n");
@@ -115,6 +118,8 @@ int __i915_gem_object_get_pages(struct drm_i915_gem_object 
*obj)
if (err)
return err;
 
+   assert_object_held_shared(obj);
+
if (unlikely(!i915_gem_object_has_pages(obj))) {
GEM_BUG_ON(i915_gem_object_has_pinned_pages(obj));
 
@@ -142,7 +147,7 @@ void i915_gem_object_truncate(struct drm_i915_gem_object 
*obj)
 /* Try to discard unwanted pages */
 void i915_gem_object_writeback(struct drm_i915_gem_object *obj)
 {
-   lockdep_assert_held(&obj->mm.lock);
+   assert_object_held_shared(obj);
GEM_BUG_ON(i915_gem_object_has_pages(obj));
 
if (obj->ops->writeback)
@@ -175,6 +180,8 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object 
*obj)
 {
struct sg_table *pages;
 
+   assert_object_held_shared(obj);
+
pages = fetch_and_zero(&obj->mm.pages);
if (IS_ERR_OR_NULL(pages))
return pages;
@@ -202,6 +209,9 @@ int __i915_gem_object_put_pages_locked(struct 
drm_i915_gem_object *obj)
if (i915_gem_object_has_pinned_pages(obj))
return -EBUSY;
 
+   /* May be called by shrinker from within get_pages() (on another bo) */
+   assert_object_held_shared(obj);
+
i915_gem_object_release_mmap_offset(obj);
 
/*
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 9a9242b5a99f..1fd287ce86f4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -593,11 +593,19 @@ __i915_gem_object_create_stolen(struct 
intel_memory_region *mem,
cache_level = HAS_LLC(mem->i915) ? I915_CACHE_LLC : I915_CACHE_NONE;
i915_gem_object_set_cache_coherency(obj, cache_level);
 
+   if (WARN_ON(!i915_gem_object_trylock(obj))) {
+   err = -EBUSY;
+   goto cleanup;
+   }
+
err = i915_gem_object_pin_pages(obj);
-   if (err)
+   if (err) {
+   i915_gem_object_unlock(obj);
goto cleanup;
+   }
 
i915_gem_object_init_memory_region(obj, mem);
+   i915_gem_object_unlock(obj);
 
return obj;
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-

[Intel-gfx] [PATCH v2 33/61] drm/i915: Add ww locking around vm_access()

[Maarten Lankhorst]

i915_gem_object_pin_map potentially needs a ww context, so ensure we
have one we can revoke.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 24 ++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index ba8e9ef6943d..1361eabea966 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -421,7 +421,9 @@ vm_access(struct vm_area_struct *area, unsigned long addr,
 {
struct i915_mmap_offset *mmo = area->vm_private_data;
struct drm_i915_gem_object *obj = mmo->obj;
+   struct i915_gem_ww_ctx ww;
void *vaddr;
+   int err = 0;
 
if (i915_gem_object_is_readonly(obj) && write)
return -EACCES;
@@ -430,10 +432,18 @@ vm_access(struct vm_area_struct *area, unsigned long addr,
if (addr >= obj->base.size)
return -EINVAL;
 
+   i915_gem_ww_ctx_init(&ww, true);
+retry:
+   err = i915_gem_object_lock(obj, &ww);
+   if (err)
+   goto out;
+
/* As this is primarily for debugging, let's focus on simplicity */
vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC);
-   if (IS_ERR(vaddr))
-   return PTR_ERR(vaddr);
+   if (IS_ERR(vaddr)) {
+   err = PTR_ERR(vaddr);
+   goto out;
+   }
 
if (write) {
memcpy(vaddr + addr, buf, len);
@@ -443,6 +453,16 @@ vm_access(struct vm_area_struct *area, unsigned long addr,
}
 
i915_gem_object_unpin_map(obj);
+out:
+   if (err == -EDEADLK) {
+   err = i915_gem_ww_ctx_backoff(&ww);
+   if (!err)
+   goto retry;
+   }
+   i915_gem_ww_ctx_fini(&ww);
+
+   if (err)
+   return err;
 
return len;
 }
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 14/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v2.

[Maarten Lankhorst]

Instead of doing what we do currently, which will never work with
PROVE_LOCKING, do the same as AMD does, and something similar to
relocation slowpath. When all locks are dropped, we acquire the
pages for pinning. When the locks are taken, we transfer those
pages in .get_pages() to the bo. As a final check before installing
the fences, we ensure that the mmu notifier was not called; if it is,
we return -EAGAIN to userspace to signal it has to start over.

Changes since v1:
- Unbinding is done in submit_init only. submit_begin() removed.
- MMU_NOTFIER -> MMU_NOTIFIER

Signed-off-by: Maarten Lankhorst 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  91 ++-
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  35 +-
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  10 +-
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |   2 +-
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   | 762 +-
 drivers/gpu/drm/i915/i915_drv.h   |   9 +-
 6 files changed, 328 insertions(+), 581 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index c30fa5790a47..cbb686235866 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -52,14 +52,16 @@ enum {
 /* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */
 #define __EXEC_OBJECT_HAS_PIN  BIT(30)
 #define __EXEC_OBJECT_HAS_FENCEBIT(29)
-#define __EXEC_OBJECT_NEEDS_MAPBIT(28)
-#define __EXEC_OBJECT_NEEDS_BIAS   BIT(27)
-#define __EXEC_OBJECT_INTERNAL_FLAGS   (~0u << 27) /* all of the above + */
+#define __EXEC_OBJECT_USERPTR_INIT BIT(28)
+#define __EXEC_OBJECT_NEEDS_MAPBIT(27)
+#define __EXEC_OBJECT_NEEDS_BIAS   BIT(26)
+#define __EXEC_OBJECT_INTERNAL_FLAGS   (~0u << 26) /* all of the above + */
 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | 
__EXEC_OBJECT_HAS_FENCE)
 
 #define __EXEC_HAS_RELOC   BIT(31)
 #define __EXEC_ENGINE_PINNED   BIT(30)
-#define __EXEC_INTERNAL_FLAGS  (~0u << 30)
+#define __EXEC_USERPTR_USEDBIT(29)
+#define __EXEC_INTERNAL_FLAGS  (~0u << 29)
 #define UPDATE PIN_OFFSET_FIXED
 
 #define BATCH_OFFSET_BIAS (256*1024)
@@ -865,6 +867,19 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
}
 
eb_add_vma(eb, i, batch, vma);
+
+   if (i915_gem_object_is_userptr(vma->obj)) {
+   err = i915_gem_object_userptr_submit_init(vma->obj);
+   if (err) {
+   if (i + 1 < eb->buffer_count)
+   eb->vma[i + 1].vma = NULL;
+
+   return err;
+   }
+
+   eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT;
+   eb->args->flags |= __EXEC_USERPTR_USED;
+   }
}
 
if (unlikely(eb->batch->flags & EXEC_OBJECT_WRITE)) {
@@ -962,7 +977,7 @@ eb_get_vma(const struct i915_execbuffer *eb, unsigned long 
handle)
}
 }
 
-static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
+static void eb_release_vmas(struct i915_execbuffer *eb, bool final, bool 
release_userptr)
 {
const unsigned int count = eb->buffer_count;
unsigned int i;
@@ -976,6 +991,11 @@ static void eb_release_vmas(struct i915_execbuffer *eb, 
bool final)
 
eb_unreserve_vma(ev);
 
+   if (release_userptr && ev->flags & __EXEC_OBJECT_USERPTR_INIT) {
+   ev->flags &= ~__EXEC_OBJECT_USERPTR_INIT;
+   i915_gem_object_userptr_submit_fini(vma->obj);
+   }
+
if (final)
i915_vma_put(vma);
}
@@ -1911,6 +1931,31 @@ static int eb_prefault_relocations(const struct 
i915_execbuffer *eb)
return 0;
 }
 
+static int eb_reinit_userptr(struct i915_execbuffer *eb)
+{
+   const unsigned int count = eb->buffer_count;
+   unsigned int i;
+   int ret;
+
+   if (likely(!(eb->args->flags & __EXEC_USERPTR_USED)))
+   return 0;
+
+   for (i = 0; i < count; i++) {
+   struct eb_vma *ev = &eb->vma[i];
+
+   if (!i915_gem_object_is_userptr(ev->vma->obj))
+   continue;
+
+   ret = i915_gem_object_userptr_submit_init(ev->vma->obj);
+   if (ret)
+   return ret;
+
+   ev->flags |= __EXEC_OBJECT_USERPTR_INIT;
+   }
+
+   return 0;
+}
+
 static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb,
   struct i915_request *rq)
 {
@@ -1925,7 +1970,7 @@ static noinline int eb_relocate_parse_slow(struct 
i915_execbuffer *eb,
}
 
/* We may process another execbuffer during the unlock... */
-   eb_release_vmas(eb, false);
+   eb_release_vmas(eb, false, true);
i915_gem_w

[Intel-gfx] [PATCH v2 30/61] drm/i915: Fix workarounds selftest, part 1

[Maarten Lankhorst]

pin_map needs the ww lock, so ensure we pin both before submission.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  3 +
 drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++
 .../gpu/drm/i915/gt/selftest_workarounds.c| 76 ---
 3 files changed, 64 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 9e87a2547b0d..8db84ce09d9f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -389,6 +389,9 @@ enum i915_map_type {
 void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
   enum i915_map_type type);
 
+void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object 
*obj,
+   enum i915_map_type type);
+
 void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
 unsigned long offset,
 unsigned long size);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 00ce88c609f9..ef1d5fabd077 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -409,6 +409,18 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object 
*obj,
goto out_unlock;
 }
 
+void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
+  enum i915_map_type type)
+{
+   void *ret;
+
+   i915_gem_object_lock(obj, NULL);
+   ret = i915_gem_object_pin_map(obj, type);
+   i915_gem_object_unlock(obj);
+
+   return ret;
+}
+
 void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
 unsigned long offset,
 unsigned long size)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c 
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 810ab026a55e..69da2147ed3b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -111,7 +111,7 @@ read_nonprivs(struct i915_gem_context *ctx, struct 
intel_engine_cs *engine)
 
i915_gem_object_set_cache_coherency(result, I915_CACHE_LLC);
 
-   cs = i915_gem_object_pin_map(result, I915_MAP_WB);
+   cs = i915_gem_object_pin_map_unlocked(result, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_obj;
@@ -217,7 +217,7 @@ static int check_whitelist(struct i915_gem_context *ctx,
i915_gem_object_lock(results, NULL);
intel_wedge_on_timeout(&wedge, engine->gt, HZ / 5) /* safety net! */
err = i915_gem_object_set_to_cpu_domain(results, false);
-   i915_gem_object_unlock(results);
+
if (intel_gt_is_wedged(engine->gt))
err = -EIO;
if (err)
@@ -245,6 +245,7 @@ static int check_whitelist(struct i915_gem_context *ctx,
 
i915_gem_object_unpin_map(results);
 out_put:
+   i915_gem_object_unlock(results);
i915_gem_object_put(results);
return err;
 }
@@ -520,6 +521,7 @@ static int check_dirty_whitelist(struct intel_context *ce)
 
for (i = 0; i < engine->whitelist.count; i++) {
u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
+   struct i915_gem_ww_ctx ww;
u64 addr = scratch->node.start;
struct i915_request *rq;
u32 srm, lrm, rsvd;
@@ -535,6 +537,29 @@ static int check_dirty_whitelist(struct intel_context *ce)
 
ro_reg = ro_register(reg);
 
+   i915_gem_ww_ctx_init(&ww, false);
+retry:
+   cs = NULL;
+   err = i915_gem_object_lock(scratch->obj, &ww);
+   if (!err)
+   err = i915_gem_object_lock(batch->obj, &ww);
+   if (!err)
+   err = intel_context_pin_ww(ce, &ww);
+   if (err)
+   goto out;
+
+   cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+   if (IS_ERR(cs)) {
+   err = PTR_ERR(cs);
+   goto out_ctx;
+   }
+
+   results = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB);
+   if (IS_ERR(results)) {
+   err = PTR_ERR(results);
+   goto out_unmap_batch;
+   }
+
/* Clear non priv flags */
reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
 
@@ -546,12 +571,6 @@ static int check_dirty_whitelist(struct intel_context *ce)
pr_debug("%s: Writing garbage to %x\n",
 engine->name, reg);
 
-   cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
-   if (IS_ERR(cs)) {
-   err =

[Intel-gfx] [PATCH v2 56/61] drm/i915/selftests: Prepare i915_request tests for obj->mm.lock removal

[Maarten Lankhorst]

Straightforward conversion by using unlocked versions.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/selftests/i915_request.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c 
b/drivers/gpu/drm/i915/selftests/i915_request.c
index 64bbb8288249..a677e6851573 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -619,7 +619,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private 
*i915)
if (IS_ERR(obj))
return ERR_CAST(obj);
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto err;
@@ -781,7 +781,7 @@ static struct i915_vma *recursive_batch(struct 
drm_i915_private *i915)
if (err)
goto err;
 
-   cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto err;
@@ -816,7 +816,7 @@ static int recursive_batch_resolve(struct i915_vma *batch)
 {
u32 *cmd;
 
-   cmd = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+   cmd = i915_gem_object_pin_map_unlocked(batch->obj, I915_MAP_WC);
if (IS_ERR(cmd))
return PTR_ERR(cmd);
 
@@ -1069,8 +1069,8 @@ static int live_sequential_engines(void *arg)
if (!request[idx])
break;
 
-   cmd = i915_gem_object_pin_map(request[idx]->batch->obj,
- I915_MAP_WC);
+   cmd = i915_gem_object_pin_map_unlocked(request[idx]->batch->obj,
+  I915_MAP_WC);
if (!IS_ERR(cmd)) {
*cmd = MI_BATCH_BUFFER_END;
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock.

[Maarten Lankhorst]

Pin in the caller, not in the work itself. This should also
work better for dma-fence annotations.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c 
b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
index bc0223716906..daf9284ef1f5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
@@ -27,15 +27,8 @@ static void __do_clflush(struct drm_i915_gem_object *obj)
 static int clflush_work(struct dma_fence_work *base)
 {
struct clflush *clflush = container_of(base, typeof(*clflush), base);
-   struct drm_i915_gem_object *obj = clflush->obj;
-   int err;
 
-   err = i915_gem_object_pin_pages(obj);
-   if (err)
-   return err;
-
-   __do_clflush(obj);
-   i915_gem_object_unpin_pages(obj);
+   __do_clflush(clflush->obj);
 
return 0;
 }
@@ -44,6 +37,7 @@ static void clflush_release(struct dma_fence_work *base)
 {
struct clflush *clflush = container_of(base, typeof(*clflush), base);
 
+   i915_gem_object_unpin_pages(clflush->obj);
i915_gem_object_put(clflush->obj);
 }
 
@@ -63,6 +57,11 @@ static struct clflush *clflush_work_create(struct 
drm_i915_gem_object *obj)
if (!clflush)
return NULL;
 
+   if (__i915_gem_object_get_pages(obj) < 0) {
+   kfree(clflush);
+   return NULL;
+   }
+
dma_fence_work_init(&clflush->base, &clflush_ops);
clflush->obj = i915_gem_object_get(obj); /* obj <-> clflush cycle */
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 51/61] drm/i915/selftests: Prepare hangcheck for obj->mm.lock removal

[Maarten Lankhorst]

Convert a few calls to use the unlocked versions.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c 
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index fb5ebf930ab2..e3027cebab5b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -80,15 +80,15 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
}
 
i915_gem_object_set_cache_coherency(h->hws, I915_CACHE_LLC);
-   vaddr = i915_gem_object_pin_map(h->hws, I915_MAP_WB);
+   vaddr = i915_gem_object_pin_map_unlocked(h->hws, I915_MAP_WB);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_obj;
}
h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
 
-   vaddr = i915_gem_object_pin_map(h->obj,
-   i915_coherent_map_type(gt->i915));
+   vaddr = i915_gem_object_pin_map_unlocked(h->obj,
+
i915_coherent_map_type(gt->i915));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_unpin_hws;
@@ -149,7 +149,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs 
*engine)
return ERR_CAST(obj);
}
 
-   vaddr = i915_gem_object_pin_map(obj, i915_coherent_map_type(gt->i915));
+   vaddr = i915_gem_object_pin_map_unlocked(obj, 
i915_coherent_map_type(gt->i915));
if (IS_ERR(vaddr)) {
i915_gem_object_put(obj);
i915_vm_put(vm);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 38/61] drm/i915: Fix ww locking in shmem_create_from_object

[Maarten Lankhorst]

Quick fix, just use the unlocked version.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/shmem_utils.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c 
b/drivers/gpu/drm/i915/gt/shmem_utils.c
index 43c7acbdc79d..8c8dfa41e032 100644
--- a/drivers/gpu/drm/i915/gt/shmem_utils.c
+++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
@@ -39,7 +39,7 @@ struct file *shmem_create_from_object(struct 
drm_i915_gem_object *obj)
return file;
}
 
-   ptr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+   ptr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
if (IS_ERR(ptr))
return ERR_CAST(ptr);
 
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 54/61] drm/i915/selftests: Prepare ring submission for obj->mm.lock removal

[Maarten Lankhorst]

Use unlocked versions when the ww lock is not held.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c 
b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
index 3350e7c995bc..99609271c3a7 100644
--- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
@@ -35,7 +35,7 @@ static struct i915_vma *create_wally(struct intel_engine_cs 
*engine)
return ERR_PTR(err);
}
 
-   cs = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_gem_object_put(obj);
return ERR_CAST(cs);
@@ -212,7 +212,7 @@ static int __live_ctx_switch_wa(struct intel_engine_cs 
*engine)
if (IS_ERR(bb))
return PTR_ERR(bb);
 
-   result = i915_gem_object_pin_map(bb->obj, I915_MAP_WC);
+   result = i915_gem_object_pin_map_unlocked(bb->obj, I915_MAP_WC);
if (IS_ERR(result)) {
intel_context_put(bb->private);
i915_vma_unpin_and_release(&bb, 0);
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 53/61] drm/i915/selftests: Prepare mocs tests for obj->mm.lock removal

[Maarten Lankhorst]

Use pin_map_unlocked when we're not holding locks.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c 
b/drivers/gpu/drm/i915/gt/selftest_mocs.c
index b25eba50c88e..5765c31fa80f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
@@ -105,7 +105,7 @@ static int live_mocs_init(struct live_mocs *arg, struct 
intel_gt *gt)
if (IS_ERR(arg->scratch))
return PTR_ERR(arg->scratch);
 
-   arg->vaddr = i915_gem_object_pin_map(arg->scratch->obj, I915_MAP_WB);
+   arg->vaddr = i915_gem_object_pin_map_unlocked(arg->scratch->obj, 
I915_MAP_WB);
if (IS_ERR(arg->vaddr)) {
err = PTR_ERR(arg->vaddr);
goto err_scratch;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 45/61] drm/i915/selftests: Prepare execbuf tests for obj->mm.lock removal.

[Maarten Lankhorst]

Also quite simple, a single call needs to use the unlocked version.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
index e1d50a5a1477..4df505e4c53a 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
@@ -116,7 +116,7 @@ static int igt_gpu_reloc(void *arg)
if (IS_ERR(scratch))
return PTR_ERR(scratch);
 
-   map = i915_gem_object_pin_map(scratch, I915_MAP_WC);
+   map = i915_gem_object_pin_map_unlocked(scratch, I915_MAP_WC);
if (IS_ERR(map)) {
err = PTR_ERR(map);
goto err_scratch;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 52/61] drm/i915/selftests: Prepare execlists for obj->mm.lock removal

[Maarten Lankhorst]

Convert normal functions to unlocked versions where needed.

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/selftest_lrc.c | 34 +-
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c 
b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 95d41c01d0e0..124011f6fb51 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -1007,7 +1007,7 @@ static int live_timeslice_preempt(void *arg)
goto err_obj;
}
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_obj;
@@ -1315,7 +1315,7 @@ static int live_timeslice_queue(void *arg)
goto err_obj;
}
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_obj;
@@ -1562,7 +1562,7 @@ static int live_busywait_preempt(void *arg)
goto err_ctx_lo;
}
 
-   map = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(map)) {
err = PTR_ERR(map);
goto err_obj;
@@ -2678,7 +2678,7 @@ static int create_gang(struct intel_engine_cs *engine,
if (err)
goto err_obj;
 
-   cs = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cs))
goto err_obj;
 
@@ -2960,7 +2960,7 @@ static int live_preempt_gang(void *arg)
 * it will terminate the next lowest spinner until there
 * are no more spinners and the gang is complete.
 */
-   cs = i915_gem_object_pin_map(rq->batch->obj, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(rq->batch->obj, 
I915_MAP_WC);
if (!IS_ERR(cs)) {
*cs = 0;
i915_gem_object_unpin_map(rq->batch->obj);
@@ -3025,7 +3025,7 @@ create_gpr_user(struct intel_engine_cs *engine,
return ERR_PTR(err);
}
 
-   cs = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_vma_put(vma);
return ERR_CAST(cs);
@@ -3235,7 +3235,7 @@ static int live_preempt_user(void *arg)
if (IS_ERR(global))
return PTR_ERR(global);
 
-   result = i915_gem_object_pin_map(global->obj, I915_MAP_WC);
+   result = i915_gem_object_pin_map_unlocked(global->obj, I915_MAP_WC);
if (IS_ERR(result)) {
i915_vma_unpin_and_release(&global, 0);
return PTR_ERR(result);
@@ -3628,7 +3628,7 @@ static int live_preempt_smoke(void *arg)
goto err_free;
}
 
-   cs = i915_gem_object_pin_map(smoke.batch, I915_MAP_WB);
+   cs = i915_gem_object_pin_map_unlocked(smoke.batch, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_batch;
@@ -4231,7 +4231,7 @@ static int preserved_virtual_engine(struct intel_gt *gt,
goto out_end;
}
 
-   cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB);
+   cs = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto out_end;
@@ -5259,7 +5259,7 @@ static int __live_lrc_gpr(struct intel_engine_cs *engine,
goto err_rq;
}
 
-   cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB);
+   cs = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
goto err_rq;
@@ -5553,7 +5553,7 @@ store_context(struct intel_context *ce, struct i915_vma 
*scratch)
if (IS_ERR(batch))
return batch;
 
-   cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(batch->obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_vma_put(batch);
return ERR_CAST(cs);
@@ -5717,7 +5717,7 @@ static struct i915_vma *load_context(struct intel_context 
*ce, u32 poison)
if (IS_ERR(batch))
return batch;
 
-   cs = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
+   cs = i915_gem_object_pin_map_unlocked(batch->obj, I915_MAP_WC);
if (IS_ERR(cs)) {
i915_vma_put(batch);
return ERR_CAST(cs);
@@ -5831,29 +5831,29 @@ static int compare_isolation(struct intel_engine_cs 
*engine,
u32 *defaults;
int err = 0;
 
-   A[0] = i915_gem_object_pin_map(ref[0]->obj, I915_

Re: [Intel-gfx] [PATCH v4 1/1] drm/i915/gt: Initialize reserved and unspecified MOCS indices

[Joonas Lahtinen]

Quoting Ayaz A Siddiqui (2020-07-29 13:25:39)
> In order to avoid functional breakage of mis-programmed applications that
> have grown to depend on unused MOCS entries, we are programming
> those entries to be equal to fully cached ("L3 + LLC") entry.
> 
> These reserved and unspecified entries should not be used as they may be
> changed to less performant variants with better coherency in the future
> if more entries are needed.
> 
> V2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
> programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
> with desired value.
> 
> Cc: Chris Wilson 
> Cc: Lucas De Marchi 
> Cc: Tomasz Lis 
> Cc: Matt Roper 
> Cc: Joonas Lahtinen 
> Cc: Francisco Jerez 
> Cc: Mathew Alwin 
> Cc: Mcguire Russell W 
> Cc: Spruit Neil R 
> Cc: Zhou Cheng 
> Cc: Benemelis Mike G 
> 
> Signed-off-by: Ayaz A Siddiqui 
> Reviewed-by: Lucas De Marchi 

Acked-by: Joonas Lahtinen 

Regards, Joonas

> ---
>  drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c 
> b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 632e08a4592b..f5dde723f612 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry 
> broxton_mocs_table[] = {
>L3_1_UC)
>  
>  static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
> -   /* Base - Error (Reserved for Non-Use) */
> -   MOCS_ENTRY(0, 0x0, 0x0),
> -   /* Base - Reserved */
> -   MOCS_ENTRY(1, 0x0, 0x0),
>  
> +   /* NOTE:
> +* Reserved and unspecified MOCS indices have been set to (L3 + LCC).
> +* These reserved entries should never be used, they may be changed
> +* to low performant variants with better coherency in the future if
> +* more entries are needed. We are programming index I915_MOCS_PTE(1)
> +* only, __init_mocs_table() take care to program unused index with
> +* this entry.
> +*/
> +   MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
> +  L3_3_WB),
> GEN11_MOCS_ENTRIES,
>  
> /* Implicitly enable L1 - HDC:L1 + L3 + LLC */
> @@ -265,6 +271,7 @@ static const struct drm_i915_mocs_entry tgl_mocs_table[] 
> = {
> MOCS_ENTRY(61,
>LE_1_UC | LE_TC_1_LLC,
>L3_3_WB),
> +
>  };
>  
>  static const struct drm_i915_mocs_entry icl_mocs_table[] = {
> -- 
> 2.26.2
> 
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Configure and Program IO buffer Wake and Fast Wake

[Patchwork]

== Series Details ==

Series: drm/i915/psr: Configure and Program IO buffer Wake and Fast Wake
URL   : https://patchwork.freedesktop.org/series/82581/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_9130 -> Patchwork_18674


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_18674 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18674, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_18674:

### IGT changes ###

 Possible regressions 

  * igt@kms_psr@primary_mmap_gtt:
- fi-cml-u2:  [PASS][1] -> [FAIL][2] +3 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-cml-u2/igt@kms_psr@primary_mmap_gtt.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-cml-u2/igt@kms_psr@primary_mmap_gtt.html

  * igt@kms_psr@primary_page_flip:
- fi-tgl-u2:  [PASS][3] -> [FAIL][4] +3 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-u2/igt@kms_psr@primary_page_flip.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-tgl-u2/igt@kms_psr@primary_page_flip.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-cml-s:   [PASS][5] -> [FAIL][6] +3 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-cml-s/igt@kms_psr@sprite_plane_onoff.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-cml-s/igt@kms_psr@sprite_plane_onoff.html

  
Known issues


  Here are the changes found in Patchwork_18674 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_module_load@reload:
- fi-byt-j1900:   [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) +1 similar 
issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-byt-j1900/igt@i915_module_l...@reload.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-byt-j1900/igt@i915_module_l...@reload.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka:   [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +1 
similar issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2:  [PASS][11] -> [DMESG-WARN][12] ([i915#1982])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html

  * igt@kms_psr@primary_page_flip:
- fi-skl-6600u:   [PASS][13] -> [FAIL][14] ([i915#132]) +3 similar 
issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  
 Possible fixes 

  * igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][15] ([i915#2417]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [FAIL][17] ([i915#1888]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  * igt@i915_selftest@live@coherency:
- fi-gdg-551: [DMESG-FAIL][19] ([i915#1748]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-gdg-551/igt@i915_selftest@l...@coherency.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-gdg-551/igt@i915_selftest@l...@coherency.html

  * igt@kms_flip@basic-flip-vs-dpms@a-dsi1:
- {fi-tgl-dsi}:   [DMESG-WARN][21] ([i915#1982]) -> [PASS][22] +1 
similar issue
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-d...@a-dsi1.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18674/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-d...@a-dsi1.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2:  

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add max plane width for NV12 AUX plane for Gen10+ platforms (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Add max plane width for NV12 AUX plane for Gen10+ 
platforms (rev3)
URL   : https://patchwork.freedesktop.org/series/81609/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9130 -> Patchwork_18675


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/index.html

Known issues


  Here are the changes found in Patchwork_18675 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka:   [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-u2:  [PASS][3] -> [INCOMPLETE][4] ([i915#2557])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-tgl-u2/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2:  [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +1 similar 
issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  
 Possible fixes 

  * igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][7] ([i915#2417]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [FAIL][9] ([i915#1888]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  * igt@i915_selftest@live@coherency:
- fi-gdg-551: [DMESG-FAIL][11] ([i915#1748]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-gdg-551/igt@i915_selftest@l...@coherency.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-gdg-551/igt@i915_selftest@l...@coherency.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2:  [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_flip@basic-flip-vs-dpms@a-dsi1:
- {fi-tgl-dsi}:   [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] +1 
similar issue
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-d...@a-dsi1.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-d...@a-dsi1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1748]: https://gitlab.freedesktop.org/drm/intel/issues/1748
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2417]: https://gitlab.freedesktop.org/drm/intel/issues/2417
  [i915#2557]: https://gitlab.freedesktop.org/drm/intel/issues/2557


Participating hosts (45 -> 41)
--

  Additional (3): fi-kbl-soraka fi-tgl-y fi-kbl-r 
  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_9130 -> Patchwork_18675

  CI-20190529: 20190529
  CI_DRM_9130: da13fb4f671901dbcf26437592f352579cc3b617 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5810: f78ce760920efb5015725c749f411c5724114bda @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18675: daef8ea16b4a283692c6e90d125c2822c905177f @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

daef8ea16b4a drm/i915/display: Add max plane width for NV12 AUX plane for 
Gen10+ platforms

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18675/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 22/58] fs/f2fs: Utilize new kmap_thread()

[Eric Biggers]

On Sat, Oct 10, 2020 at 01:39:54AM +0100, Matthew Wilcox wrote:
> On Fri, Oct 09, 2020 at 02:34:34PM -0700, Eric Biggers wrote:
> > On Fri, Oct 09, 2020 at 12:49:57PM -0700, ira.we...@intel.com wrote:
> > > The kmap() calls in this FS are localized to a single thread.  To avoid
> > > the over head of global PKRS updates use the new kmap_thread() call.
> > >
> > > @@ -2410,12 +2410,12 @@ static inline struct page 
> > > *f2fs_pagecache_get_page(
> > >  
> > >  static inline void f2fs_copy_page(struct page *src, struct page *dst)
> > >  {
> > > - char *src_kaddr = kmap(src);
> > > - char *dst_kaddr = kmap(dst);
> > > + char *src_kaddr = kmap_thread(src);
> > > + char *dst_kaddr = kmap_thread(dst);
> > >  
> > >   memcpy(dst_kaddr, src_kaddr, PAGE_SIZE);
> > > - kunmap(dst);
> > > - kunmap(src);
> > > + kunmap_thread(dst);
> > > + kunmap_thread(src);
> > >  }
> > 
> > Wouldn't it make more sense to switch cases like this to kmap_atomic()?
> > The pages are only mapped to do a memcpy(), then they're immediately 
> > unmapped.
> 
> Maybe you missed the earlier thread from Thomas trying to do something
> similar for rather different reasons ...
> 
> https://lore.kernel.org/lkml/20200919091751.06...@linutronix.de/

I did miss it.  I'm not subscribed to any of the mailing lists it was sent to.

Anyway, it shouldn't matter.  Patchsets should be standalone, and not require
reading random prior threads on linux-kernel to understand.

And I still don't really understand.  After this patchset, there is still code
nearly identical to the above (doing a temporary mapping just for a memcpy) that
would still be using kmap_atomic().  Is the idea that later, such code will be
converted to use kmap_thread() instead?  If not, why use one over the other?

- Eric
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/ingenic: Fix bad revert

[Paul Cercueil]

Fix a badly reverted commit. The revert commit was cherry-picked from
drm-misc-next to drm-misc-next-fixes, and in the process some unrelated
code was added.

Fixes: a3fb64c00d44 "Revert "gpu/drm: ingenic: Add option to mmap GEM buffers 
cached""
Signed-off-by: Paul Cercueil 
---
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c 
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index 1be1235bd546..a3d1617d7c67 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -440,20 +440,6 @@ void ingenic_drm_plane_config(struct device *dev,
}
 }
 
-static void ingenic_drm_update_palette(struct ingenic_drm *priv,
-  const struct drm_color_lut *lut)
-{
-   unsigned int i;
-
-   for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); i++) {
-   u16 color = drm_color_lut_extract(lut[i].red, 5) << 11
-   | drm_color_lut_extract(lut[i].green, 6) << 5
-   | drm_color_lut_extract(lut[i].blue, 5);
-
-   priv->dma_hwdescs->palette[i] = color;
-   }
-}
-
 static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
struct drm_plane_state *oldstate)
 {
@@ -464,8 +450,6 @@ static void ingenic_drm_plane_atomic_update(struct 
drm_plane *plane,
dma_addr_t addr;
 
if (state && state->fb) {
-   crtc_state = state->crtc->state;
-
addr = drm_fb_cma_get_gem_addr(state->fb, state, 0);
width = state->src_w >> 16;
height = state->src_h >> 16;
-- 
2.28.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [RFC] drm/i915/gt: reduce context clear batch size to avoid gpu hang (rev2)

[rwright]

The first version of this RFC patch caused a build error when - to my
suprise - it was automatically built.  I had presumed an RFC message
would be for comment only, and so I had pasted part of the patch,
thereby breaking whitespace.  In this version, I have directly included
the patch without pasting, so it should apply.  I also
included a drm_dbg message omitted from v1.

For several months, I've been experiencing GPU hangs when  starting
Cinnamon on an HP Pavilion Mini 300-020 if I try to run an upstream
kernel.  I reported this recently in
https://gitlab.freedesktop.org/drm/intel/-/issues/2413 where I have
attached the requested evidence including the state collected from
/sys/class/drm/card0/error and debug output from dmesg.

I got around to running a bisect to find the problem, which indicates:

  [47f8253d2b8947d79fd3196bf96c1959c0f25f20] drm/i915/gen7: Clear all EU/L3 
residual contexts

While I'm experienced in several areas of the Linux kernel, I'm really
nothing but an end user of the graphics drivers.  But the nature of that
troublesome commit suggested to me that reducing the batch size used in
the context clear operation might help this relatively low-powered
system to avoid the hang and it did!  I simply forced this system to
take the smaller batch length that is already used for non-Haswell
systems.

I'm calling this patch an RFC because this version is quick-and-dirty,
affecting only one file.  If this makes sense, I have a cleaner version
that keys off of a proper quirk, but let's discuss the idea first before
looking at that.   Maybe it doesn't need a new quirk?  Maybe there is
already something distinctive on which the decision could be made?

Signed-off-by: Randy Wright 
---
 drivers/gpu/drm/i915/gt/gen7_renderclear.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c 
b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
index d93d85cd3027..96bc09bc41f2 100644
--- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
+++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
@@ -49,7 +49,11 @@ struct batch_vals {
 static void
 batch_get_defaults(struct drm_i915_private *i915, struct batch_vals *bv)
 {
-   if (IS_HASWELL(i915)) {
+   struct pci_dev *d = i915->drm.pdev;
+   int force_reduced = (d->subsystem_vendor == PCI_VENDOR_ID_HP
+ && d->subsystem_device == 0x2b38);
+
+   if (IS_HASWELL(i915) && !force_reduced) {
bv->max_primitives = 280;
bv->max_urb_entries = MAX_URB_ENTRIES;
bv->surface_height = 16 * 16;
@@ -60,6 +64,8 @@ batch_get_defaults(struct drm_i915_private *i915, struct 
batch_vals *bv)
bv->surface_height = 16 * 8;
bv->surface_width = 32 * 16;
}
+   drm_dbg(&i915->drm, "force_reduced=%d max_primitives=%d\n",
+force_reduced, bv->max_primitives);
bv->cmd_size = bv->max_primitives * 4096;
bv->state_size = STATE_SIZE;
bv->state_start = bv->cmd_size;
-- 
2.25.1



--
Randy WrightUsmail: Hewlett Packard Enterprise
Email: rwri...@hpe.com  Servers Linux Enablement
Phone: (970) 898-0998   3404 E. Harmony Rd, Mailstop 36
Fort Collins, CO 80528-9599 
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 51/58] kernel: Utilize new kmap_thread()

[Eric W. Biederman]

ira.we...@intel.com writes:

> From: Ira Weiny 
>
> This kmap() call is localized to a single thread.  To avoid the over
> head of global PKRS updates use the new kmap_thread() call.

Acked-by: "Eric W. Biederman" 

>
> Cc: Eric Biederman 
> Signed-off-by: Ira Weiny 
> ---
>  kernel/kexec_core.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c
> index c19c0dad1ebe..272a9920c0d6 100644
> --- a/kernel/kexec_core.c
> +++ b/kernel/kexec_core.c
> @@ -815,7 +815,7 @@ static int kimage_load_normal_segment(struct kimage 
> *image,
>   if (result < 0)
>   goto out;
>  
> - ptr = kmap(page);
> + ptr = kmap_thread(page);
>   /* Start with a clear page */
>   clear_page(ptr);
>   ptr += maddr & ~PAGE_MASK;
> @@ -828,7 +828,7 @@ static int kimage_load_normal_segment(struct kimage 
> *image,
>   memcpy(ptr, kbuf, uchunk);
>   else
>   result = copy_from_user(ptr, buf, uchunk);
> - kunmap(page);
> + kunmap_thread(page);
>   if (result) {
>   result = -EFAULT;
>   goto out;
> @@ -879,7 +879,7 @@ static int kimage_load_crash_segment(struct kimage *image,
>   goto out;
>   }
>   arch_kexec_post_alloc_pages(page_address(page), 1, 0);
> - ptr = kmap(page);
> + ptr = kmap_thread(page);
>   ptr += maddr & ~PAGE_MASK;
>   mchunk = min_t(size_t, mbytes,
>   PAGE_SIZE - (maddr & ~PAGE_MASK));
> @@ -895,7 +895,7 @@ static int kimage_load_crash_segment(struct kimage *image,
>   else
>   result = copy_from_user(ptr, buf, uchunk);
>   kexec_flush_icache_page(page);
> - kunmap(page);
> + kunmap_thread(page);
>   arch_kexec_pre_free_pages(page_address(page), 1);
>   if (result) {
>   result = -EFAULT;
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree

[Paul Cercueil]

Hi Stephen,

Le lun. 12 oct. 2020 à 15:24, Stephen Rothwell  
a écrit :

Hi all,

On Thu, 8 Oct 2020 15:42:02 +1100 Stephen Rothwell 
 wrote:


 On Thu, 8 Oct 2020 14:09:03 +1100 Stephen Rothwell 
 wrote:

 >
 > After merging the drm-misc tree, today's linux-next build (x86_64
 > allmodconfig) failed like this:

 In file included from include/linux/clk.h:13,
  from drivers/gpu/drm/ingenic/ingenic-drm-drv.c:10:
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c: In function 
'ingenic_drm_update_palette':
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:35: error: 'struct 
ingenic_drm' has no member named 'dma_hwdescs'; did you mean 
'dma_hwdesc_f0'?
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

   |   ^~~
 include/linux/kernel.h:47:33: note: in definition of macro 
'ARRAY_SIZE'
47 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + 
__must_be_array(arr))

   | ^~~
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:35: error: 'struct 
ingenic_drm' has no member named 'dma_hwdescs'; did you mean 
'dma_hwdesc_f0'?
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

   |   ^~~
 include/linux/kernel.h:47:48: note: in definition of macro 
'ARRAY_SIZE'
47 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + 
__must_be_array(arr))

   |^~~
 In file included from include/linux/bits.h:22,
  from include/linux/bitops.h:5,
  from drivers/gpu/drm/ingenic/ingenic-drm.h:10,
  from drivers/gpu/drm/ingenic/ingenic-drm-drv.c:7:
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:35: error: 'struct 
ingenic_drm' has no member named 'dma_hwdescs'; did you mean 
'dma_hwdesc_f0'?
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

   |   ^~~
 include/linux/build_bug.h:16:62: note: in definition of macro 
'BUILD_BUG_ON_ZERO'
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { 
int:(-!!(e)); })))
   | 
 ^
 include/linux/compiler.h:224:46: note: in expansion of macro 
'__same_type'
   224 | #define __must_be_array(a) 
BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))

   |  ^~~
 include/linux/kernel.h:47:59: note: in expansion of macro 
'__must_be_array'
47 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + 
__must_be_array(arr))
   |   
^~~
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:18: note: in 
expansion of macro 'ARRAY_SIZE'
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

   |  ^~
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:35: error: 'struct 
ingenic_drm' has no member named 'dma_hwdescs'; did you mean 
'dma_hwdesc_f0'?
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

   |   ^~~
 include/linux/build_bug.h:16:62: note: in definition of macro 
'BUILD_BUG_ON_ZERO'
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { 
int:(-!!(e)); })))
   | 
 ^
 include/linux/compiler.h:224:46: note: in expansion of macro 
'__same_type'
   224 | #define __must_be_array(a) 
BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))

   |  ^~~
 include/linux/kernel.h:47:59: note: in expansion of macro 
'__must_be_array'
47 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + 
__must_be_array(arr))
   |   
^~~
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:18: note: in 
expansion of macro 'ARRAY_SIZE'
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

   |  ^~
 include/linux/build_bug.h:16:51: error: bit-field '' 
width not an integer constant
16 | #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { 
int:(-!!(e)); })))

   |   ^
 include/linux/compiler.h:224:28: note: in expansion of macro 
'BUILD_BUG_ON_ZERO'
   224 | #define __must_be_array(a) 
BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))

   |^
 include/linux/kernel.h:47:59: note: in expansion of macro 
'__must_be_array'
47 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + 
__must_be_array(arr))
   |   
^~~
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c:448:18: note: in 
expansion of macro 'ARRAY_SIZE'
   448 |  for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); 
i++) {

  

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 57/58] nvdimm/pmem: Stray access protection for pmem->virt_addr

[John Hubbard]

On 10/9/20 12:50 PM, ira.we...@intel.com wrote:

From: Ira Weiny 

The pmem driver uses a cached virtual address to access its memory
directly.  Because the nvdimm driver is well aware of the special
protections it has mapped memory with, we call dev_access_[en|dis]able()
around the direct pmem->virt_addr (pmem_addr) usage instead of the
unnecessary overhead of trying to get a page to kmap.

Signed-off-by: Ira Weiny 
---
  drivers/nvdimm/pmem.c | 4 
  1 file changed, 4 insertions(+)

diff --git a/drivers/nvdimm/pmem.c b/drivers/nvdimm/pmem.c
index fab29b514372..e4dc1ae990fc 100644
--- a/drivers/nvdimm/pmem.c
+++ b/drivers/nvdimm/pmem.c
@@ -148,7 +148,9 @@ static blk_status_t pmem_do_read(struct pmem_device *pmem,
if (unlikely(is_bad_pmem(&pmem->bb, sector, len)))
return BLK_STS_IOERR;
  
+	dev_access_enable(false);

rc = read_pmem(page, page_off, pmem_addr, len);
+   dev_access_disable(false);


Hi Ira!

The APIs should be tweaked to use a symbol (GLOBAL, PER_THREAD), instead of
true/false. Try reading the above and you'll see that it sounds like it's
doing the opposite of what it is ("enable_this(false)" sounds like a clumsy
API design to *disable*, right?). And there is no hint about the scope.

And it *could* be so much more readable like this:

dev_access_enable(DEV_ACCESS_THIS_THREAD);



thanks,
--
John Hubbard
NVIDIA
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 26/58] fs/zonefs: Utilize new kmap_thread()

[Damien Le Moal]

On 2020/10/10 4:52, ira.we...@intel.com wrote:
> From: Ira Weiny 
> 
> The kmap() calls in this FS are localized to a single thread.  To avoid
> the over head of global PKRS updates use the new kmap_thread() call.
> 
> Cc: Damien Le Moal 
> Cc: Naohiro Aota 
> Signed-off-by: Ira Weiny 
> ---
>  fs/zonefs/super.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/fs/zonefs/super.c b/fs/zonefs/super.c
> index 8ec7c8f109d7..2fd6c86beee1 100644
> --- a/fs/zonefs/super.c
> +++ b/fs/zonefs/super.c
> @@ -1297,7 +1297,7 @@ static int zonefs_read_super(struct super_block *sb)
>   if (ret)
>   goto free_page;
>  
> - super = kmap(page);
> + super = kmap_thread(page);
>  
>   ret = -EINVAL;
>   if (le32_to_cpu(super->s_magic) != ZONEFS_MAGIC)
> @@ -1349,7 +1349,7 @@ static int zonefs_read_super(struct super_block *sb)
>   ret = 0;
>  
>  unmap:
> - kunmap(page);
> + kunmap_thread(page);
>  free_page:
>   __free_page(page);
>  
> 

acked-by: Damien Le Moal 

-- 
Damien Le Moal
Western Digital Research
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 10/58] drivers/rdma: Utilize new kmap_thread()

[Bernard Metzler]

-ira.we...@intel.com wrote: -

>To: "Andrew Morton" , "Thomas Gleixner"
>, "Ingo Molnar" , "Borislav
>Petkov" , "Andy Lutomirski" , "Peter
>Zijlstra" 
>From: ira.we...@intel.com
>Date: 10/09/2020 09:52PM
>Cc: "Ira Weiny" , "Mike Marciniszyn"
>, "Dennis Dalessandro"
>, "Doug Ledford" ,
>"Jason Gunthorpe" , "Faisal Latif"
>, "Shiraz Saleem" ,
>"Bernard Metzler" , x...@kernel.org, "Dave Hansen"
>, "Dan Williams"
>, "Fenghua Yu" ,
>linux-...@vger.kernel.org, linux-ker...@vger.kernel.org,
>linux-nvd...@lists.01.org, linux-fsde...@vger.kernel.org,
>linux...@kvack.org, linux-kselft...@vger.kernel.org,
>linuxppc-...@lists.ozlabs.org, k...@vger.kernel.org,
>net...@vger.kernel.org, b...@vger.kernel.org,
>ke...@lists.infradead.org, linux-bca...@vger.kernel.org,
>linux-...@lists.infradead.org, de...@driverdev.osuosl.org,
>linux-...@vger.kernel.org, linux-...@vger.kernel.org,
>linux-s...@vger.kernel.org, target-de...@vger.kernel.org,
>linux-...@vger.kernel.org, ceph-de...@vger.kernel.org,
>linux-e...@vger.kernel.org, linux-...@kvack.org,
>io-ur...@vger.kernel.org, linux-er...@lists.ozlabs.org,
>linux...@lists.infradead.org, linux-ntfs-...@lists.sourceforge.net,
>reiserfs-de...@vger.kernel.org,
>linux-f2fs-de...@lists.sourceforge.net, linux-ni...@vger.kernel.org,
>cluster-de...@redhat.com, ecryp...@vger.kernel.org,
>linux-c...@vger.kernel.org, linux-bt...@vger.kernel.org,
>linux-...@lists.infradead.org, linux-r...@vger.kernel.org,
>amd-...@lists.freedesktop.org, dri-de...@lists.freedesktop.org,
>intel-gfx@lists.freedesktop.org, drbd-...@tron.linbit.com,
>linux-bl...@vger.kernel.org, xen-de...@lists.xenproject.org,
>linux-cach...@redhat.com, samba-techni...@lists.samba.org,
>intel-wired-...@lists.osuosl.org
>Subject: [EXTERNAL] [PATCH RFC PKS/PMEM 10/58] drivers/rdma: Utilize
>new kmap_thread()
>
>From: Ira Weiny 
>
>The kmap() calls in these drivers are localized to a single thread.
>To
>avoid the over head of global PKRS updates use the new kmap_thread()
>call.
>
>Cc: Mike Marciniszyn 
>Cc: Dennis Dalessandro 
>Cc: Doug Ledford 
>Cc: Jason Gunthorpe 
>Cc: Faisal Latif 
>Cc: Shiraz Saleem 
>Cc: Bernard Metzler 
>Signed-off-by: Ira Weiny 
>---
> drivers/infiniband/hw/hfi1/sdma.c  |  4 ++--
> drivers/infiniband/hw/i40iw/i40iw_cm.c | 10 +-
> drivers/infiniband/sw/siw/siw_qp_tx.c  | 14 +++---
> 3 files changed, 14 insertions(+), 14 deletions(-)
>
>diff --git a/drivers/infiniband/hw/hfi1/sdma.c
>b/drivers/infiniband/hw/hfi1/sdma.c
>index 04575c9afd61..09d206e3229a 100644
>--- a/drivers/infiniband/hw/hfi1/sdma.c
>+++ b/drivers/infiniband/hw/hfi1/sdma.c
>@@ -3130,7 +3130,7 @@ int ext_coal_sdma_tx_descs(struct hfi1_devdata
>*dd, struct sdma_txreq *tx,
>   }
> 
>   if (type == SDMA_MAP_PAGE) {
>-  kvaddr = kmap(page);
>+  kvaddr = kmap_thread(page);
>   kvaddr += offset;
>   } else if (WARN_ON(!kvaddr)) {
>   __sdma_txclean(dd, tx);
>@@ -3140,7 +3140,7 @@ int ext_coal_sdma_tx_descs(struct hfi1_devdata
>*dd, struct sdma_txreq *tx,
>   memcpy(tx->coalesce_buf + tx->coalesce_idx, kvaddr, len);
>   tx->coalesce_idx += len;
>   if (type == SDMA_MAP_PAGE)
>-  kunmap(page);
>+  kunmap_thread(page);
> 
>   /* If there is more data, return */
>   if (tx->tlen - tx->coalesce_idx)
>diff --git a/drivers/infiniband/hw/i40iw/i40iw_cm.c
>b/drivers/infiniband/hw/i40iw/i40iw_cm.c
>index a3b95805c154..122d7a5642a1 100644
>--- a/drivers/infiniband/hw/i40iw/i40iw_cm.c
>+++ b/drivers/infiniband/hw/i40iw/i40iw_cm.c
>@@ -3721,7 +3721,7 @@ int i40iw_accept(struct iw_cm_id *cm_id, struct
>iw_cm_conn_param *conn_param)
>   ibmr->device = iwpd->ibpd.device;
>   iwqp->lsmm_mr = ibmr;
>   if (iwqp->page)
>-  iwqp->sc_qp.qp_uk.sq_base = kmap(iwqp->page);
>+  iwqp->sc_qp.qp_uk.sq_base = kmap_thread(iwqp->page);
>   dev->iw_priv_qp_ops->qp_send_lsmm(&iwqp->sc_qp,
>   iwqp->ietf_mem.va,
>   (accept.size + 
> conn_param->private_data_len),
>@@ -3729,12 +3729,12 @@ int i40iw_accept(struct iw_cm_id *cm_id,
>struct iw_cm_conn_param *conn_param)
> 
>   } else {
>   if (iwqp->page)
>-  iwqp->sc_qp.qp_uk.sq_base = kmap(iwqp->page);
>+  iwqp->sc_qp.qp_uk.sq_base = kmap_thread(iwqp->page);
>   dev->iw_priv_qp_ops->qp_send_lsmm(&iwqp->sc_qp, NULL, 0, 0);
>   }
> 
>   if (iwqp->page)
>-  kunmap(iwqp->page);
>+  kunmap_thread(iwqp->page);
> 
>   iwqp->cm_id = cm_id;
>   cm_node->cm_id = cm_id;
>@@ -4102,10 +4102,10 @@ static void i40iw_cm_event_connected(struct
>i40iw_cm_event *event)
>   i40iw_cm_init_tsa_conn(iwqp, cm_node);
>   

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 22/58] fs/f2fs: Utilize new kmap_thread()

[Dave Hansen]

On 10/12/20 9:19 AM, Eric Biggers wrote:
> On Sun, Oct 11, 2020 at 11:56:35PM -0700, Ira Weiny wrote:
>>> And I still don't really understand.  After this patchset, there is still 
>>> code
>>> nearly identical to the above (doing a temporary mapping just for a memcpy) 
>>> that
>>> would still be using kmap_atomic().
>> I don't understand.  You mean there would be other call sites calling:
>>
>> kmap_atomic()
>> memcpy()
>> kunmap_atomic()
> Yes, there are tons of places that do this.  Try 'git grep -A6 kmap_atomic'
> and look for memcpy().
> 
> Hence why I'm asking what will be the "recommended" way to do this...
> kunmap_thread() or kmap_atomic()?

kmap_atomic() is always preferred over kmap()/kmap_thread().
kmap_atomic() is _much_ more lightweight since its TLB invalidation is
always CPU-local and never broadcast.

So, basically, unless you *must* sleep while the mapping is in place,
kmap_atomic() is preferred.

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DMA map DSM [stolen memory] (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: DMA map DSM [stolen memory] (rev2)
URL   : https://patchwork.freedesktop.org/series/82575/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9130 -> Patchwork_18676


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/index.html

Known issues


  Here are the changes found in Patchwork_18676 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s3:
- fi-byt-j1900:   [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-byt-j1900/igt@gem_exec_susp...@basic-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-byt-j1900/igt@gem_exec_susp...@basic-s3.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-bsw-kefka:   [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar 
issue
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  
 Possible fixes 

  * igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][5] ([i915#2417]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [FAIL][7] ([i915#1888]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  * igt@i915_selftest@live@coherency:
- fi-gdg-551: [DMESG-FAIL][9] ([i915#1748]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-gdg-551/igt@i915_selftest@l...@coherency.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-gdg-551/igt@i915_selftest@l...@coherency.html

  * igt@kms_flip@basic-flip-vs-dpms@a-dsi1:
- {fi-tgl-dsi}:   [DMESG-WARN][11] ([i915#1982]) -> [PASS][12] +1 
similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-d...@a-dsi1.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-tgl-dsi/igt@kms_flip@basic-flip-vs-d...@a-dsi1.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2:  [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] +1 
similar issue
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9130/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1748]: https://gitlab.freedesktop.org/drm/intel/issues/1748
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2417]: https://gitlab.freedesktop.org/drm/intel/issues/2417


Participating hosts (45 -> 41)
--

  Additional (3): fi-kbl-soraka fi-tgl-y fi-kbl-r 
  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_9130 -> Patchwork_18676

  CI-20190529: 20190529
  CI_DRM_9130: da13fb4f671901dbcf26437592f352579cc3b617 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5810: f78ce760920efb5015725c749f411c5724114bda @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18676: 267578f2006535de816e5919e23ae9f66c2787f1 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

267578f20065 drm/i915: DMA map DSM [stolen memory]

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18676/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH RFC PKS/PMEM 22/58] fs/f2fs: Utilize new kmap_thread()

[Matthew Wilcox]

On Mon, Oct 12, 2020 at 09:28:29AM -0700, Dave Hansen wrote:
> kmap_atomic() is always preferred over kmap()/kmap_thread().
> kmap_atomic() is _much_ more lightweight since its TLB invalidation is
> always CPU-local and never broadcast.
> 
> So, basically, unless you *must* sleep while the mapping is in place,
> kmap_atomic() is preferred.

But kmap_atomic() disables preemption, so the _ideal_ interface would map
it only locally, then on preemption make it global.  I don't even know
if that _can_ be done.  But this email makes it seem like kmap_atomic()
has no downsides.
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Remove obj->mm.lock! (rev2)
URL   : https://patchwork.freedesktop.org/series/82337/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ad5a5f0624eb drm/i915: Move cmd parser pinning to execbuffer
f524499cf8c7 drm/i915: Add missing -EDEADLK handling to execbuf pinning
-:47: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#47: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:452:
+   err = i915_vma_pin_ww(vma, &eb->ww,
 entry->pad_to_size,

total: 0 errors, 0 warnings, 1 checks, 54 lines checked
d968753cabcd drm/i915: Do not share hwsp across contexts any more, v3.
-:500: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#500: FILE: drivers/gpu/drm/i915/gt/intel_timeline.c:292:
+   if (tl && (i915_request_completed(from) ||
+   !i915_active_acquire_if_busy(&tl->active)))

total: 0 errors, 0 warnings, 1 checks, 611 lines checked
930bd5654347 drm/i915: Ensure we hold the object mutex in pin correctly.
6360b8ee9c2e drm/i915: Add gem object locking to madvise.
cfd65d6c3cad drm/i915: Move HAS_STRUCT_PAGE to obj->flags
-:106: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#106: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.c:63:
+ struct lock_class_key *key, unsigned flags)

-:129: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#129: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:27:
+ unsigned alloc_flags);

total: 0 errors, 2 warnings, 0 checks, 348 lines checked
f9fc09dae4ce drm/i915: Rework struct phys attachment handling
17d0c0aef20f drm/i915: Convert i915_gem_object_attach_phys() to ww locking
d82af28768ae drm/i915: make lockdep slightly happier about execbuf.
84b4313f5488 drm/i915: Disable userptr pread/pwrite support.
d506fc3aa2ed drm/i915: No longer allow exporting userptr through dma-buf
9f6c05f13de3 drm/i915: Reject more ioctls for userptr
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#7: 
set_tiling and set_caching are rejected with -ENXIO, there's no valid reason

total: 0 errors, 1 warnings, 0 checks, 39 lines checked
55ecb181e541 drm/i915: Reject UNSYNCHRONIZED for userptr
353f6c46c4bf drm/i915: Fix userptr so we do not have to worry about 
obj->mm.lock, v2.
-:163: ERROR:ASSIGN_IN_IF: do not use assignment in if condition
#163: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2250:
+   if (!err && (eb->args->flags & __EXEC_USERPTR_USED) &&

-:271: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#271: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:555:
+static inline int i915_gem_object_userptr_submit_init(struct 
drm_i915_gem_object *obj) { GEM_BUG_ON(1); return -ENODEV; }

-:272: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#272: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:556:
+static inline int i915_gem_object_userptr_submit_done(struct 
drm_i915_gem_object *obj) { GEM_BUG_ON(1); return -ENODEV; }

-:273: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#273: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:557:
+static inline void i915_gem_object_userptr_submit_fini(struct 
drm_i915_gem_object *obj) { GEM_BUG_ON(1); }

-:331: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use 
line 1 instead
#331: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:2:
  * SPDX-License-Identifier: MIT

-:335: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each 
line
#335: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:6:
+ *
+  * Based on amdgpu_mn, which bears the following notice:

-:336: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each 
line
#336: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:7:
+  * Based on amdgpu_mn, which bears the following notice:
+ *

-:483: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#483: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:63:
+   struct drm_i915_gem_object *obj = container_of(mni, struct 
drm_i915_gem_object, userptr.notifier);

-:1097: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#1097: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:282:
+   pinned = ret = 0;

-:1113: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1113: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:298:
+   if (mmu_interval_read_retry(&obj->userptr.notifier,
+   !obj->userptr.page_ref ? notifier_seq :

-:1234: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#1234: FILE: drivers/gpu/drm/i915/i915_drv.h:597:
+   struct mutex notifier_lock;

total: 1 errors, 7 warnings, 3 checks, 1169 lines checked
15650ee070ab drm/i915: Flatten obj->mm.lock
c30e420a9750 drm/i915: Pin timeline map after first timeline pin, v2.
-:13: WARNING:TYPO_SPELLING: 'arithmatic' ma