[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add support for HDCP 1.4 over MST (rev3)
== Series Details == Series: drm/i915: Add support for HDCP 1.4 over MST (rev3) URL : https://patchwork.freedesktop.org/series/78749/ State : success == Summary == CI Bug Log - changes from CI_DRM_8908_full -> Patchwork_18375_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18375_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@nop: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] ([i915#2277]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-iclb8/igt@gem_exec_balan...@nop.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-iclb2/igt@gem_exec_balan...@nop.html * igt@gen9_exec_parse@allowed-all: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([i915#1436] / [i915#1635] / [i915#716]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-apl3/igt@gen9_exec_pa...@allowed-all.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-apl1/igt@gen9_exec_pa...@allowed-all.html * igt@kms_big_fb@y-tiled-64bpp-rotate-0: - shard-glk: [PASS][5] -> [DMESG-FAIL][6] ([i915#118] / [i915#95]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk3/igt@kms_big...@y-tiled-64bpp-rotate-0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-glk8/igt@kms_big...@y-tiled-64bpp-rotate-0.html * igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen: - shard-apl: [PASS][7] -> [FAIL][8] ([i915#1635] / [i915#54]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-apl7/igt@kms_cursor_...@pipe-a-cursor-128x128-onscreen.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-apl2/igt@kms_cursor_...@pipe-a-cursor-128x128-onscreen.html * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge: - shard-glk: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk7/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-glk5/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy: - shard-skl: [PASS][11] -> [FAIL][12] ([i915#2346]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl2/igt@kms_cursor_leg...@flip-vs-cursor-busy-crc-legacy.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-skl7/igt@kms_cursor_leg...@flip-vs-cursor-busy-crc-legacy.html * igt@kms_flip@flip-vs-expired-vblank@c-edp1: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#79]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl4/igt@kms_flip@flip-vs-expired-vbl...@c-edp1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-skl9/igt@kms_flip@flip-vs-expired-vbl...@c-edp1.html * igt@kms_flip@flip-vs-fences@a-edp1: - shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +13 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl6/igt@kms_flip@flip-vs-fen...@a-edp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-skl6/igt@kms_flip@flip-vs-fen...@a-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +9 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl2/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-kbl7/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#2122]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl2/igt@kms_flip@plain-flip-ts-check-interrupti...@a-edp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-skl7/igt@kms_flip@plain-flip-ts-check-interrupti...@a-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl2/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-blt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-kbl1/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#1188]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl1/igt@kms_...@bpc-switch-dpms.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18375/shard-skl2/igt@kms_...@bpc-switch-dpms.h
Re: [Intel-gfx] [PATCH 1/2] drm/i915/gem: Replace reloc chain with terminator on error unwind
Quoting Pavel Machek (2020-08-19 20:33:26)
> Hi!
>
> > > > If we hit an error during construction of the reloc chain, we need to
> > > > replace the chain into the next batch with the terminator so that upon
> > > > flushing the relocations so far, we do not execute a hanging batch.
> > >
> > > Thanks for the patches. I assume this should fix problem from
> > > "5.9-rc1: graphics regression moved from -next to mainline" thread.
> > >
> > > I have applied them over current -next, and my machine seems to be
> > > working so far (but uptime is less than 30 minutes).
> > >
> > > If the machine still works tommorow, I'll assume problem is solved.
> >
> > Aye, best wait until we have to start competing with Chromium for
> > memory... The suspicion is that it was the resource allocation failure
> > path.
>
> Yep, my machines are low on memory.
>
> But ... test did not work that well. I have dead X and blinking
> screen. Machine still works reasonably well over ssh, so I guess
> that's an improvement.
Well my last remaining 32bit gen3 device is currently pushing up the
daises, so could you try removing the attempt to use WC? Something like
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 44df98d85b38..b26f7de913c3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -955,10 +955,7 @@ static u32 *__reloc_gpu_map(struct reloc_cache *cache,
{
u32 *map;
- map = i915_gem_object_pin_map(pool->obj,
- cache->has_llc ?
- I915_MAP_FORCE_WB :
- I915_MAP_FORCE_WC);
+ map = i915_gem_object_pin_map(pool->obj, I915_MAP_FORCE_WB);
on top of the previous patch. Faultinjection didn't turn up anything in
eb_relocate_vma, so we need to dig deeper.
-Chris
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[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/gem: Replace reloc chain with terminator on error unwind (rev2)
== Series Details == Series: series starting with [1/2] drm/i915/gem: Replace reloc chain with terminator on error unwind (rev2) URL : https://patchwork.freedesktop.org/series/80795/ State : failure == Summary == Applying: drm/i915/gem: Replace reloc chain with terminator on error unwind error: corrupt patch at line 15 error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/gem: Replace reloc chain with terminator on error unwind When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 2/3] kernel/trace: Add TRACING_ALLOW_PRINTK config option
trace_printk is meant as a debugging tool, and should not be
compiled into production code without specific debug Kconfig
options enabled, or source code changes, as indicated by the
warning that shows up on boot if any trace_printk is called:
** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **
** **
** trace_printk() being used. Allocating extra memory. **
** **
** This means that this is a DEBUG kernel and it is **
** unsafe for production use. **
If this option is set to n, the kernel will generate a
build-time error if trace_printk is used.
Note that the code to handle trace_printk is still present,
so this does not prevent people from compiling out-of-tree
kernel modules with the option set to =y, or BPF programs.
Signed-off-by: Nicolas Boichat
---
Changes since v2/v3:
- Rebase only, v3 didn't exist as I just split out the other
necessary patches.
- Added patch 3/3 to fix atomisp_compat_css20.c
Changes since v1:
- Use static_assert instead of __static_assert (Jason Gunthorpe)
- Fix issues that can be detected by this patch (running some
randconfig in a loop, kernel test robot, or manual inspection),
by:
- Making some debug config options that use trace_printk depend
on the new config option.
- Adding 3 patches before this one.
There is a question from Alexei whether the warning is warranted,
and it's possibly too strongly worded, but the fact is, we do
not want trace_printk to be sprinkled in kernel code by default,
unless a very specific Kconfig command is enabled (or preprocessor
macro).
There's at least 3 reasons that I can come up with:
1. trace_printk introduces some overhead.
2. If the kernel keeps adding always-enabled trace_printk, it will
be much harder for developers to make use of trace_printk for
debugging.
3. People may assume that trace_printk is for debugging only, and
may accidentally output sensitive data (theoritical at this
stage).
drivers/gpu/drm/i915/Kconfig.debug | 4 ++--
fs/f2fs/Kconfig| 1 +
include/linux/kernel.h | 17 -
kernel/trace/Kconfig | 10 ++
samples/Kconfig| 2 ++
5 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index 1cb28c20807c59d..fa30f9bdc82311f 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -84,7 +84,7 @@ config DRM_I915_ERRLOG_GEM
config DRM_I915_TRACE_GEM
bool "Insert extra ftrace output from the GEM internals"
depends on DRM_I915_DEBUG_GEM
- select TRACING
+ depends on TRACING_ALLOW_PRINTK
default n
help
Enable additional and verbose debugging output that will spam
@@ -98,7 +98,7 @@ config DRM_I915_TRACE_GEM
config DRM_I915_TRACE_GTT
bool "Insert extra ftrace output from the GTT internals"
depends on DRM_I915_DEBUG_GEM
- select TRACING
+ depends on TRACING_ALLOW_PRINTK
default n
help
Enable additional and verbose debugging output that will spam
diff --git a/fs/f2fs/Kconfig b/fs/f2fs/Kconfig
index d13c5c6a978769b..d161d96cc1b7418 100644
--- a/fs/f2fs/Kconfig
+++ b/fs/f2fs/Kconfig
@@ -80,6 +80,7 @@ config F2FS_IO_TRACE
bool "F2FS IO tracer"
depends on F2FS_FS
depends on FUNCTION_TRACER
+ depends on TRACING_ALLOW_PRINTK
help
F2FS IO trace is based on a function trace, which gathers process
information and block IO patterns in the filesystem level.
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 500def620d8f493..7cf24fa16a479ed 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -720,10 +720,15 @@ do {
\
#define trace_printk(fmt, ...) \
do { \
char ___STR[] = __stringify((__VA_ARGS__)); \
+ \
+ static_assert( \
+ IS_ENABLED(CONFIG_TRACING_ALLOW_PRINTK),\
+ "trace_printk called, please enable
CONFIG_TRACING_ALLOW_PRINTK."); \
+ \
if (sizeof(___STR) > 3) \
do_trace_printk(fmt, ##__VA_ARGS__);\
else\
- trace_puts(fmt);\
+ do_trace_puts(fmt); \
} while (0)
#define do_trace_printk(fmt, args...) \
@@ -772,6 +777,13 @@ int __trace_printk(unsigned long ip, const char *fmt, ...);
*/
#define trace_puts(str) ({
Re: [Intel-gfx] 5.9-rc1: graphics regression moved from -next to mainline
Hi!
> > I think there's been some discussion about reverting that change for
> > other reasons, but it's quite likely the culprit.
>
> Hmm. It reverts cleanly, but the end result doesn't work, because of
> other changes.
>
> Reverting all of
>
>763fedd6a216 ("drm/i915: Remove i915_gem_object_get_dirty_page()")
>7ac2d2536dfa ("drm/i915/gem: Delete unused code")
>9e0f9464e2ab ("drm/i915/gem: Async GPU relocations only")
>
> seems to at least build.
>
> Pavel, does doing those three reverts make things work for you?
Yes, it seems they make things work. (Chris asked for new patch to be
tested, so I am switching to his kernel, but it survived longer than
it usually does.)
Thanks and best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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[Intel-gfx] [PULL] drm-intel-fixes
Hi Dave & Daniel - This is a fairly ordinary looking set of i915 fixes for v5.9-rc2. Of course, the out of the ordinary is what's *not* here. This replaces the earlier pull request [1]. The dinq branch has since been split and rebased, with a new topic/drm-intel-gem-next. The fixes in this pull request come from dinq as usual. The topic branch is, alas, still in a bit of a flux, and contains some of the commits you rejected in [1], so I'm not including any of the fixes from there. I'm aware of the reported regression [2], and to me it looks like the reverts would be the right course of action. However, I don't want to postpone this pull request any longer. Hopefully we'll have it sorted by next week. [1] http://lore.kernel.org/r/20200730162652.ga90...@jlahtine-desk.ger.corp.intel.com [2] http://lore.kernel.org/r/20200817161132.GA4711@amd drm-intel-fixes-2020-08-20: drm/i915 fixes for v5.9-rc2: - GVT fixes - Fix device parameter usage for selftest mock i915 device - Fix LPSP capability debugfs NULL dereference - Fix buddy register pagemask table - Fix intel_atomic_check() non-negative return value - Fix selftests passing a random 0 into ilog2() - Fix TGL power well enable/disable ordering - Switch to PMU module refcounting BR, Jani. The following changes since commit 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5: Linux 5.9-rc1 (2020-08-16 13:04:57 -0700) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2020-08-20 for you to fetch changes up to 4a4064ad79699ee41b74c12fa4f9f960a5bf9b2d: drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells (2020-08-19 15:23:43 +0300) drm/i915 fixes for v5.9-rc2: - GVT fixes - Fix device parameter usage for selftest mock i915 device - Fix LPSP capability debugfs NULL dereference - Fix buddy register pagemask table - Fix intel_atomic_check() non-negative return value - Fix selftests passing a random 0 into ilog2() - Fix TGL power well enable/disable ordering - Switch to PMU module refcounting Chris Wilson (3): drm/i915: Provide the perf pmu.module drm/i915: Copy default modparams to mock i915_device drm/i915/display: Check for an LPSP encoder before dereferencing Colin Xu (2): drm/i915/gvt: Do not destroy ppgtt_mm during vGPU D3->D0. drm/i915/gvt: Do not reset pv_notified when vGPU transit from D3->D0 George Spelvin (1): drm/i915/selftests: Avoid passing a random 0 into ilog2 Imre Deak (1): drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells Jani Nikula (1): Merge tag 'gvt-next-fixes-2020-08-05' of https://github.com/intel/gvt-linux into drm-intel-fixes Matt Roper (1): drm/i915: Update bw_buddy pagemask table Tianjia Zhang (1): drm/i915: Fix wrong return value in intel_atomic_check() drivers/gpu/drm/i915/display/intel_display.c | 2 +- .../gpu/drm/i915/display/intel_display_debugfs.c | 7 +-- drivers/gpu/drm/i915/display/intel_display_power.c | 14 ++--- drivers/gpu/drm/i915/gvt/cfg_space.c | 24 ++ drivers/gpu/drm/i915/gvt/gtt.c | 2 +- drivers/gpu/drm/i915/gvt/gtt.h | 2 ++ drivers/gpu/drm/i915/gvt/gvt.h | 3 +++ drivers/gpu/drm/i915/gvt/vgpu.c| 20 +++--- drivers/gpu/drm/i915/i915_pmu.c| 7 ++- drivers/gpu/drm/i915/selftests/i915_buddy.c| 18 drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 +++ 11 files changed, 75 insertions(+), 27 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/gem: Prevent using pgprot_writecombine() if PAT is not supported
On Wed, 19 Aug 2020 at 21:32, Chris Wilson wrote:
>
> Let's not try and use PAT attributes for I915_MAP_WC is the CPU doesn't
> support PAT.
>
> Fixes: 6056e50033d9 ("drm/i915/gem: Support discontiguous lmem object maps")
> Signed-off-by: Chris Wilson
> Cc: # v5.6+
Reviewed-by: Matthew Auld
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Re: [Intel-gfx] [PATCH v2 14/24] drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin.
On 8/19/20 4:08 PM, Maarten Lankhorst wrote: As a preparation step for full object locking and wait/wound handling during pin and object mapping, ensure that we always pass the ww context in i915_gem_execbuffer.c to i915_vma_pin, use lockdep to ensure this happens. This also requires changing the order of eb_parse slightly, to ensure we pass ww at a point where we could still handle -EDEADLK safely. Signed-off-by: Maarten Lankhorst Reviewed-by: Thomas Hellström ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/display/tgl: Use TGL DP tables for eDP ports without low power support
== Series Details == Series: series starting with [1/3] drm/i915/display/tgl: Use TGL DP tables for eDP ports without low power support URL : https://patchwork.freedesktop.org/series/80819/ State : success == Summary == CI Bug Log - changes from CI_DRM_8908_full -> Patchwork_18377_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18377_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@bonded-early: - shard-kbl: [PASS][1] -> [FAIL][2] ([i915#2079]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl1/igt@gem_exec_balan...@bonded-early.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-kbl1/igt@gem_exec_balan...@bonded-early.html * igt@gem_exec_gttfill@all: - shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk6/igt@gem_exec_gttf...@all.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-glk8/igt@gem_exec_gttf...@all.html * igt@gem_media_fill: - shard-skl: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +9 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl8/igt@gem_media_fill.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-skl2/igt@gem_media_fill.html * igt@i915_module_load@reload-with-fault-injection: - shard-tglb: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-tglb8/igt@i915_module_l...@reload-with-fault-injection.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-tglb5/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][9] -> [FAIL][10] ([i915#454]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-iclb7/igt@i915_pm...@dc6-psr.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-iclb6/igt@i915_pm...@dc6-psr.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#180]) +7 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl1/igt@kms_cursor_...@pipe-a-cursor-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-kbl1/igt@kms_cursor_...@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([i915#300]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl3/igt@kms_cursor_...@pipe-c-cursor-suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-skl9/igt@kms_cursor_...@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#1635] / [i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-apl1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-apl7/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_flip@plain-flip-fb-recreate@a-edp1: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#2122]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl3/igt@kms_flip@plain-flip-fb-recre...@a-edp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-skl7/igt@kms_flip@plain-flip-fb-recre...@a-edp1.html * igt@kms_flip_tiling@flip-to-y-tiled: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#167]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl6/igt@kms_flip_til...@flip-to-y-tiled.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-skl5/igt@kms_flip_til...@flip-to-y-tiled.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl2/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-blt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-kbl7/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#1188]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl1/igt@kms_...@bpc-switch-dpms.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18377/shard-skl5/igt@kms_...@bpc-switch-dpms.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][25] -> [FAIL][26] ([
Re: [Intel-gfx] [PATCH v2 22/24] drm/i915: Add ww locking to vm_fault_gtt
On 8/19/20 4:09 PM, Maarten Lankhorst wrote: We want to start requiring the reservation_lock instead of obj->mm.lock for pinning objects, take the ww lock inside vm_fault_gtt as a first step towards the legacy lock removal. Signed-off-by: Maarten Lankhorst Reviewed-by: Thomas Hellström ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 23/24] drm/i915: Add ww locking to pin_to_display_plane, v2.
On 8/19/20 4:09 PM, Maarten Lankhorst wrote: Use ww locking for pin_to_display_plane for all the pinning and locking. With the locking removed from set_cache_level, we need to fix i915_gem_set_caching_ioctl to take the object reservation lock. As this is a single lock, we don't need to use the ww dance. Changes since v1: - Do not use ww locking in i915_gem_set_caching_ioctl (Thomas). Signed-off-by: Maarten Lankhorst Reviewed-by: Thomas Hellström ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 24/24] drm/i915: Do not share hwsp across contexts any more
On 8/19/20 4:09 PM, Maarten Lankhorst wrote: Instead of sharing pages with breadcrumbs, give each timeline a single page. This allows unrelated timelines not to share locks any more during command submission. As an additional benefit, seqno wraparound no longer requires i915_vma_pin, which means we no longer need to worry about a potential -EDEADLK at a point where we are ready to submit. Signed-off-by: Maarten Lankhorst Reviewed-by: Thomas Hellström ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Fix stepping WA matching
== Series Details == Series: drm/i915/tgl: Fix stepping WA matching URL : https://patchwork.freedesktop.org/series/80820/ State : success == Summary == CI Bug Log - changes from CI_DRM_8908_full -> Patchwork_18379_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18379_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][1] -> [FAIL][2] ([i915#454]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-iclb7/igt@i915_pm...@dc6-psr.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-iclb6/igt@i915_pm...@dc6-psr.html * igt@i915_query@query-topology-coherent-slice-mask: - shard-iclb: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-iclb6/igt@i915_qu...@query-topology-coherent-slice-mask.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-iclb4/igt@i915_qu...@query-topology-coherent-slice-mask.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1: - shard-hsw: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-hsw7/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@ab-vga1-hdmi-a1.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-hsw8/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@ab-vga1-hdmi-a1.html * igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ab-hdmi-a1-hdmi-a2: - shard-glk: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk7/igt@kms_flip@2x-wf_vblank-ts-check-interrupti...@ab-hdmi-a1-hdmi-a2.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-glk6/igt@kms_flip@2x-wf_vblank-ts-check-interrupti...@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1: - shard-skl: [PASS][9] -> [FAIL][10] ([i915#2122]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl6/igt@kms_flip@flip-vs-absolute-wf_vblank-interrupti...@a-edp1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-skl7/igt@kms_flip@flip-vs-absolute-wf_vblank-interrupti...@a-edp1.html * igt@kms_flip@flip-vs-fences@a-edp1: - shard-skl: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +8 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl6/igt@kms_flip@flip-vs-fen...@a-edp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-skl1/igt@kms_flip@flip-vs-fen...@a-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +7 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl2/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-kbl7/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl2/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-blt.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-kbl1/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu: - shard-tglb: [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-tglb7/igt@kms_frontbuffer_track...@fbcpsr-rgb565-draw-mmap-cpu.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-tglb1/igt@kms_frontbuffer_track...@fbcpsr-rgb565-draw-mmap-cpu.html * igt@kms_hdr@bpc-switch-suspend: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#1188]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl7/igt@kms_...@bpc-switch-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-skl7/igt@kms_...@bpc-switch-suspend.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18379/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_setmode@basic: - shard-hsw: [PASS][23] -> [FAIL][24] ([i915#31]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-hsw7/igt@kms_setm...@basic.html
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Prevent using pgprot_writecombine() if PAT is not supported
== Series Details == Series: drm/i915/gem: Prevent using pgprot_writecombine() if PAT is not supported URL : https://patchwork.freedesktop.org/series/80821/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8908_full -> Patchwork_18380_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18380_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18380_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18380_full: ### IGT changes ### Possible regressions * igt@i915_selftest@live@hangcheck: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-tglb8/igt@i915_selftest@l...@hangcheck.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-tglb7/igt@i915_selftest@l...@hangcheck.html Known issues Here are the changes found in Patchwork_18380_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox: - shard-skl: [PASS][3] -> [FAIL][4] ([i915#2374]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@vebox.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-skl5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@vebox.html * igt@gem_exec_gttfill@all: - shard-glk: [PASS][5] -> [DMESG-WARN][6] ([i915#118] / [i915#95]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk6/igt@gem_exec_gttf...@all.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-glk1/igt@gem_exec_gttf...@all.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][7] -> [FAIL][8] ([i915#454]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-iclb7/igt@i915_pm...@dc6-psr.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-iclb6/igt@i915_pm...@dc6-psr.html * igt@kms_big_fb@linear-64bpp-rotate-0: - shard-glk: [PASS][9] -> [DMESG-FAIL][10] ([i915#118] / [i915#95]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk7/igt@kms_big...@linear-64bpp-rotate-0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-glk8/igt@kms_big...@linear-64bpp-rotate-0.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-vga1-hdmi-a1: - shard-hsw: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-hsw7/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@ab-vga1-hdmi-a1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-hsw8/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@ab-vga1-hdmi-a1.html * igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#79]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vbl...@ab-hdmi-a1-hdmi-a2.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vbl...@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-fences@a-edp1: - shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +10 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl6/igt@kms_flip@flip-vs-fen...@a-edp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-skl4/igt@kms_flip@flip-vs-fen...@a-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +7 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl2/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-kbl2/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html * igt@kms_flip@plain-flip-fb-recreate@a-dp1: - shard-kbl: [PASS][19] -> [FAIL][20] ([i915#2122]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-kbl1/igt@kms_flip@plain-flip-fb-recre...@a-dp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18380/shard-kbl4/igt@kms_flip@plain-flip-fb-recre...@a-dp1.html * igt@kms_flip_tiling@flip-to-y-tiled: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#167]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8908/shard-skl6/igt@kms_flip_til...@flip-to-y-tiled.html [22]: https://intel-gfx-ci.01
[Intel-gfx] [PATCH i-g-t] i915/gem_exec_capture: Check the capture runs in isolation
Capturing the error state for one context should not impede progress of
other contexts across the system. That is we reset the engine, remove
the context from the execution queue, then capture it. Once the hanging
request has been removed, we can execute any other context instead.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tests/i915/gem_exec_capture.c | 66 +--
1 file changed, 64 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 1a53d2fb7..186bed7e2 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -195,6 +195,7 @@ static struct offset {
unsigned int size, int count,
unsigned int flags)
#define INCREMENTAL 0x1
+#define ASYNC 0x2
{
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 *obj;
@@ -303,9 +304,11 @@ static struct offset {
igt_assert(gem_bo_busy(fd, obj[0].handle));
munmap(seqno, 4096);
- igt_force_gpu_reset(fd);
+ if (!(flags & ASYNC)) {
+ igt_force_gpu_reset(fd);
+ gem_sync(fd, obj[count + 1].handle);
+ }
- gem_sync(fd, obj[count + 1].handle);
gem_close(fd, obj[count + 1].handle);
for (i = 0; i < count; i++) {
offsets[i].addr = obj[i + 1].offset;
@@ -491,6 +494,62 @@ static void many(int fd, int dir, uint64_t size, unsigned
int flags)
free(offsets);
}
+static void prioinv(int fd, int dir, unsigned ring)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = gem_create(fd, 4096),
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ .flags = ring,
+ };
+ int64_t timeout = NSEC_PER_SEC; /* 1s, feeling generous, blame debug */
+ uint64_t ram, gtt, size = 4 << 20;
+ unsigned long count;
+ int link[2], dummy;
+
+ igt_require(gem_scheduler_enabled(fd));
+ igt_require(igt_params_set(fd, "reset", "%u", -1)); /* engine resets! */
+ igt_require(gem_gpu_reset_type(fd) > 1);
+
+ gtt = gem_aperture_size(fd) / size;
+ ram = (intel_get_avail_ram_mb() << 20) / size;
+ igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
+ gtt, ram);
+
+ count = min(gtt, ram) / 4;
+ igt_require(count > 1);
+
+ intel_require_memory(count, size, CHECK_RAM);
+
+ gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+ gem_execbuf(fd, &execbuf);
+ gem_sync(fd, obj.handle);
+
+ igt_assert(pipe(link) == 0);
+ igt_fork(child, 1) {
+ fd = gem_reopen_driver(fd);
+ igt_debug("Submitting large hang + capture\n");
+ free(__captureN(fd, dir, ring, size, count, ASYNC));
+ write(link[1], &fd, sizeof(fd)); /* wake the parent up */
+ igt_force_gpu_reset(fd);
+ }
+ read(link[0], &dummy, sizeof(dummy));
+
+ igt_debug("Submitting nop\n");
+ gem_execbuf(fd, &execbuf);
+ igt_assert_eq(gem_wait(fd, obj.handle, &timeout), 0);
+ gem_close(fd, obj.handle);
+
+ igt_waitchildren();
+ close(link[0]);
+ close(link[1]);
+
+ gem_quiescent_gpu(fd);
+}
+
static void userptr(int fd, int dir)
{
uint32_t handle;
@@ -588,6 +647,9 @@ igt_main
userptr(fd, dir);
}
+ test_each_engine("pi", fd, e)
+ prioinv(fd, dir, e->flags);
+
igt_fixture {
close(dir);
igt_disallow_hang(fd, hang);
--
2.28.0
___
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[Intel-gfx] [PATCH] drm/i915: Break up error capture compression loops with cond_resched()
As the error capture will compress user buffers as directed to by the user, it can take an arbitrary amount of time and space. Break up the compression loops with a call to cond_resched(), that will allow other processes to schedule (avoiding the soft lockups) and also serve as a warning should we try to make this loop atomic in the future. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: sta...@vger.kernel.org --- drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 6a3a2ce0b394..6551ff04d5a6 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -311,6 +311,8 @@ static int compress_page(struct i915_vma_compress *c, if (zlib_deflate(zstream, Z_NO_FLUSH) != Z_OK) return -EIO; + + cond_resched(); } while (zstream->avail_in); /* Fallback to uncompressed if we increase size? */ @@ -397,6 +399,7 @@ static int compress_page(struct i915_vma_compress *c, if (!(wc && i915_memcpy_from_wc(ptr, src, PAGE_SIZE))) memcpy(ptr, src, PAGE_SIZE); dst->pages[dst->page_count++] = ptr; + cond_resched(); return 0; } -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Break up error capture compression loops with cond_resched()
== Series Details ==
Series: drm/i915: Break up error capture compression loops with cond_resched()
URL : https://patchwork.freedesktop.org/series/80861/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8910 -> Patchwork_18382
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/index.html
Known issues
Here are the changes found in Patchwork_18382 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
- fi-bsw-kefka: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_selftest@live@execlists:
- fi-icl-y: [PASS][5] -> [INCOMPLETE][6] ([i915#2276])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-icl-y/igt@i915_selftest@l...@execlists.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-icl-y/igt@i915_selftest@l...@execlists.html
Possible fixes
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][7] ([i915#1372]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][9] ([i915#2203]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [SKIP][11] ([fdo#109271]) -> [DMESG-FAIL][12]
([i915#62])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
- fi-skl-6700k2: [INCOMPLETE][13] ([i915#151] / [i915#2203]) ->
[DMESG-WARN][14] ([i915#2203])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][16] ([i915#62] / [i915#92]) +2 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +7 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2100]: https://gitlab.freedesktop.org/drm/intel/issues/2100
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
[i915#2318]: https://gitlab.freedesktop.org/drm/intel/issues/2318
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (39 -> 34)
--
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-byt-clapper
Build changes
-
* Linux: CI_DRM_8910 -> Patchwork_18382
CI-20190529: 20190529
CI_DRM_8910:
[Intel-gfx] [PATCH i-g-t v3 00/19] tests/core_hotunplug: Fixes and enhancements
Clean up the test code, add some new basic subtests, then unblock unbind test variants. One patch has been renamed, three new patches added to the series, and one more patch form a formerly submitted series with new subtests included. @Michał: Since most v2/v3 updates are trivial, I've preserved your v1/v2 Reviewd-by: except for a few patches with non-trivial changes, where I marked your R-b as v1/v2 applicable. Please have a look and confirm if you are still OK with them. @Tvrtko: Please support my attempt to remove the unbind test variants from the blocklist. @Petri, @Martin: Please give me your green lite for merging this series if you have no objections. Thanks, Janusz Janusz Krzysztofik (19): tests/core_hotunplug: Use igt_assert_fd() tests/core_hotunplug: Constify dev_bus_addr string tests/core_hotunplug: Clean up device open error handling tests/core_hotunplug: Consolidate duplicated debug messages # new tests/core_hotunplug: Assert successful device filter application tests/core_hotunplug: Maintain a single data structure instance tests/core_hotunplug: Pass errors via a data structure field tests/core_hotunplug: Handle device close errors tests/core_hotunplug: Prepare invariant data once per test run tests/core_hotunplug: Skip selectively on sysfs close errors tests/core_hotunplug: Recover from subtest failures # renamed tests/core_hotunplug: Fail subtests on device close errors tests/core_hotunplug: Let the driver time out essential sysfs operations # new tests/core_hotunplug: Process return values of sysfs operations tests/core_hotunplug: Assert expected device presence/absence tests/core_hotunplug: Explicitly ignore unused return values tests/core_hotunplug: More thorough i915 healthcheck and recovery # new tests/core_hotunplug: Add 'lateclose before restore' variants # included tests/core_hotunplug: Un-blocklist *bind* subtests tests/core_hotunplug.c | 525 ++- tests/intel-ci/blacklist.txt | 2 +- 2 files changed, 396 insertions(+), 131 deletions(-) -- 2.21.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3 01/19] tests/core_hotunplug: Use igt_assert_fd()
There is a new library helper that asserts validity of open file
descriptors. Use it instead of open coding.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index e03f3b945..7431346b1 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -57,7 +57,7 @@ static void prepare_for_unbind(struct hotunplug *priv, char
*buf, int buflen)
priv->fd.sysfs_drv = openat(priv->fd.sysfs_dev, "device/driver",
O_DIRECTORY);
- igt_assert(priv->fd.sysfs_drv >= 0);
+ igt_assert_fd(priv->fd.sysfs_drv);
len = readlinkat(priv->fd.sysfs_dev, "device", buf, buflen - 1);
buf[len] = '\0';
@@ -72,10 +72,10 @@ static void prepare(struct hotunplug *priv, char *buf, int
buflen)
{
igt_debug("opening device\n");
priv->fd.drm = __drm_open_driver(DRIVER_ANY);
- igt_assert(priv->fd.drm >= 0);
+ igt_assert_fd(priv->fd.drm);
priv->fd.sysfs_dev = igt_sysfs_open(priv->fd.drm);
- igt_assert(priv->fd.sysfs_dev >= 0);
+ igt_assert_fd(priv->fd.sysfs_dev);
if (buf) {
prepare_for_unbind(priv, buf, buflen);
@@ -83,7 +83,7 @@ static void prepare(struct hotunplug *priv, char *buf, int
buflen)
/* prepare for bus rescan */
priv->fd.sysfs_bus = openat(priv->fd.sysfs_dev,
"device/subsystem", O_DIRECTORY);
- igt_assert(priv->fd.sysfs_bus >= 0);
+ igt_assert_fd(priv->fd.sysfs_bus);
}
}
@@ -261,7 +261,7 @@ igt_main
* a device file descriptor open for exit handler use.
*/
fd_drm = __drm_open_driver(DRIVER_ANY);
- igt_assert(fd_drm >= 0);
+ igt_assert_fd(fd_drm);
if (is_i915_device(fd_drm))
igt_require_gem(fd_drm);
--
2.21.1
___
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[Intel-gfx] [PATCH i-g-t v3 03/19] tests/core_hotunplug: Clean up device open error handling
We don't use drm_driver_open() since in case of an i915 device it keeps
an extra file descriptor of the exercised device open for exit handler
use, while we would like to be able to close the device completely
before running certain test operations. Instead, we call
__drm_driver_open() and handle its result ourselves. Unlike
drm_driver_open() which skips on device open errors, we always fail or
abort the test in such case. Moreover, we don't ensure that the i915
driver is idle before starting subtests like drm_open_driver() does.
Skip instead of failing on initial device open error. Also, call
gem_quiescent_gpu() if an i915 device is detected. For subsequent
device opens, define a local helper that fails on error and use it. If
we think we need to abort the test execution on device open error, set
our failure marker first to trigger the abort from a follow up
igt_fixture section.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 34 +++---
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index a4071f51e..e576a6c6c 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -49,6 +49,21 @@ struct hotunplug {
/* Helpers */
+/**
+ * Subtests must be able to close examined devices completely. Don't
+ * use drm_open_driver() since in case of an i915 device it opens it
+ * twice and keeps a second file descriptor open for exit handler use.
+ */
+static int local_drm_open_driver(void)
+{
+ int fd_drm;
+
+ fd_drm = __drm_open_driver(DRIVER_ANY);
+ igt_assert_fd(fd_drm);
+
+ return fd_drm;
+}
+
static void prepare_for_unbind(struct hotunplug *priv, char *buf, int buflen)
{
int len;
@@ -71,8 +86,7 @@ static void prepare_for_unbind(struct hotunplug *priv, char
*buf, int buflen)
static void prepare(struct hotunplug *priv, char *buf, int buflen)
{
igt_debug("opening device\n");
- priv->fd.drm = __drm_open_driver(DRIVER_ANY);
- igt_assert_fd(priv->fd.drm);
+ priv->fd.drm = local_drm_open_driver();
priv->fd.sysfs_dev = igt_sysfs_open(priv->fd.drm);
igt_assert_fd(priv->fd.sysfs_dev);
@@ -145,8 +159,9 @@ static void healthcheck(void)
igt_devices_scan(true);
igt_debug("reopening the device\n");
- fd_drm = __drm_open_driver(DRIVER_ANY);
- igt_abort_on_f(fd_drm < 0, "Device reopen failure");
+ failure = "Device reopen failure!";
+ fd_drm = local_drm_open_driver();
+ failure = NULL;
if (is_i915_device(fd_drm)) {
failure = "GEM failure";
@@ -255,16 +270,13 @@ igt_main
igt_fixture {
int fd_drm;
- /**
-* As subtests must be able to close examined devices
-* completely, don't use drm_open_driver() as it keeps
-* a device file descriptor open for exit handler use.
-*/
fd_drm = __drm_open_driver(DRIVER_ANY);
- igt_assert_fd(fd_drm);
+ igt_skip_on_f(fd_drm < 0, "No known DRM device found\n");
- if (is_i915_device(fd_drm))
+ if (is_i915_device(fd_drm)) {
+ gem_quiescent_gpu(fd_drm);
igt_require_gem(fd_drm);
+ }
/* Make sure subtests always reopen the same device */
set_filter_from_device(fd_drm);
--
2.21.1
___
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[Intel-gfx] [PATCH i-g-t v3 10/19] tests/core_hotunplug: Skip selectively on sysfs close errors
Since we no longer open a device DRM sysfs node, only a PCI one, driver
unbind operations are no longer affected by missed or unsuccessful
sysfs file close attempts. Skip only affected subtests if that
happens.
v3: Refresh.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 849a774ff..602a91cf8 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -109,7 +109,6 @@ static void prepare(struct hotunplug *priv)
igt_assert_fd(priv->fd.sysfs_bus);
priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
- igt_assert_eq(priv->fd.sysfs_dev, -1);
}
/* Unbind the driver from the device */
@@ -139,6 +138,8 @@ static void driver_bind(struct hotunplug *priv)
/* Remove (virtually unplug) the device from its bus */
static void device_unplug(struct hotunplug *priv, const char *prefix)
{
+ igt_require(priv->fd.sysfs_dev == -1);
+
priv->fd.sysfs_dev = openat(priv->fd.sysfs_bus, priv->dev_bus_addr,
O_DIRECTORY);
igt_assert_fd(priv->fd.sysfs_dev);
@@ -194,7 +195,6 @@ static void post_healthcheck(struct hotunplug *priv)
igt_abort_on_f(priv->failure, "%s\n", priv->failure);
igt_require(priv->fd.drm == -1);
- igt_require(priv->fd.sysfs_dev == -1);
}
static void set_filter_from_device(int fd)
--
2.21.1
___
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[Intel-gfx] [PATCH i-g-t v3 02/19] tests/core_hotunplug: Constify dev_bus_addr string
Device bus address structure field is always initialized with a pointer
to a substring of the device sysfs path and never used for its
modification. Declare it as a constant string.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 7431346b1..a4071f51e 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -44,7 +44,7 @@ struct hotunplug {
int sysfs_bus;
int sysfs_drv;
} fd;
- char *dev_bus_addr;
+ const char *dev_bus_addr;
};
/* Helpers */
--
2.21.1
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[Intel-gfx] [PATCH i-g-t v3 11/19] tests/core_hotunplug: Recover from subtest failures
Subtests now forcibly call or request igt_abort on failures in order to
avoid silently leaving an exercised device in an unusable state.
However, a failure inside a subtest doesn't always mean the device is
no longer working correctly and reboot is needed. On the other hand,
if a subtest just fails without aborting, that doesn't mean in turn the
device is healthy. We should still perform a device health check
in that case before deciding on next steps.
Reuse the 'failure' structure field as a mark which is set before each
critical operation which must be followed by a successful health check
in order to avoid aborting the test is executed. Then, move health
checks not essential for subtests out of those subtest bodies, or just
copy them if essentiall, to subtest associated individual follow-up
igt_fixture sections, from where device file descriptors potentially
left open are closed, device rediscover or driver rebing operation is
run as needed, and finally the health check is run if the preceding
igt_subtest section exited with the marker set.
v2: Start each recovery phase from unconditionally closing file
descriptors potentially left open by a subtest before it entered
its critical section,
- replace igt_require() with 'if() return;' construct in recover() to
reduce noise,
- replace "subtest failure" message used as a request for healthcheck
with a more appropriate "need healthcheck" for clarity,
- rebase on current upstream master.
v3: Refresh,
- move bus_rescan() and driver_bind() function calls back from
heaalthcheck() to recover() so a pure health check can still be
called from a subtest if essential,
- move failure mark assignments back from subtests to helpers for
more adequate abort reason reporting but clean the mark only on
health check success,
- call cleanup() also from post_healthcheck() in order to close a
device file descriptor potentially left open by a failed health
check,
- reword commit message and update description.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski # v1
---
tests/core_hotunplug.c | 104 +
1 file changed, 74 insertions(+), 30 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 602a91cf8..145593683 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -69,6 +69,9 @@ static int local_drm_open_driver(const char *prefix, const
char *suffix)
static int local_close(int fd, const char *message)
{
+ if (fd < 0) /* not open - return current status */
+ return fd;
+
errno = 0;
if (igt_warn_on_f(close(fd), "%s\n", message))
return -errno; /* (never -1) */
@@ -115,24 +118,22 @@ static void prepare(struct hotunplug *priv)
static void driver_unbind(struct hotunplug *priv, const char *prefix)
{
igt_debug("%sunbinding the driver from the device\n", prefix);
+ priv->failure = "Driver unbind failure!";
- priv->failure = "Driver unbind timeout!";
- igt_set_timeout(60, priv->failure);
+ igt_set_timeout(60, "Driver unbind timeout!");
igt_sysfs_set(priv->fd.sysfs_drv, "unbind", priv->dev_bus_addr);
igt_reset_timeout();
- priv->failure = NULL;
}
/* Re-bind the driver to the device */
static void driver_bind(struct hotunplug *priv)
{
igt_debug("rebinding the driver to the device\n");
+ priv->failure = "Driver re-bind failure!";
- priv->failure = "Driver re-bind timeout!";
- igt_set_timeout(60, priv->failure);
+ igt_set_timeout(60, "Driver re-bind timeout!");
igt_sysfs_set(priv->fd.sysfs_drv, "bind", priv->dev_bus_addr);
igt_reset_timeout();
- priv->failure = NULL;
}
/* Remove (virtually unplug) the device from its bus */
@@ -145,12 +146,11 @@ static void device_unplug(struct hotunplug *priv, const
char *prefix)
igt_assert_fd(priv->fd.sysfs_dev);
igt_debug("%sunplugging the device\n", prefix);
+ priv->failure = "Device unplug failure!";
- priv->failure = "Device unplug timeout!";
- igt_set_timeout(60, priv->failure);
+ igt_set_timeout(60, "Device unplug timeout!");
igt_sysfs_set(priv->fd.sysfs_dev, "remove", "1");
igt_reset_timeout();
- priv->failure = NULL;
priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
}
@@ -159,17 +159,23 @@ static void device_unplug(struct hotunplug *priv, const
char *prefix)
static void bus_rescan(struct hotunplug *priv)
{
igt_debug("rediscovering the device\n");
+ priv->failure = "Bus rescan failure!";
- priv->failure = "Bus rescan timeout!";
- igt_set_timeout(60, priv->failure);
+ igt_set_timeout(60, "Bus rescan timeout!");
igt_sysfs_set(priv->fd.sysfs_bus, "../rescan", "1");
igt_reset_timeout();
- priv->failure = NULL;
+}
+
+static void cleanup(struct hotunplug *priv)
+{
+ priv->fd.d
[Intel-gfx] [PATCH i-g-t v3 05/19] tests/core_hotunplug: Assert successful device filter application
Return value of igt_device_filter_add() representing a number of successfully installed device filters is now ignored. Fail if not 1. Signed-off-by: Janusz Krzysztofik Reviewed-by: Michał Winiarski --- tests/core_hotunplug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c index 5093233d7..46f9ad118 100644 --- a/tests/core_hotunplug.c +++ b/tests/core_hotunplug.c @@ -193,7 +193,7 @@ static void set_filter_from_device(int fd) igt_assert(realpath(path, dst)); igt_device_filter_free_all(); - igt_device_filter_add(filter); + igt_assert_eq(igt_device_filter_add(filter), 1); } /* Subtests */ -- 2.21.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3 06/19] tests/core_hotunplug: Maintain a single data structure instance
The following changes to the test are planned:
- avoid global variables,
- skip subtest after device close errors,
- prepare invariant data only once per test run,
- move device health checks to igt_fixture sections,
- try to recover from subtest failures instead of aborting.
For that to be possible, maintain a single instance of hotunplug
structure at igt_main level and pass it down to subtests.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 56 --
1 file changed, 26 insertions(+), 30 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 46f9ad118..95d326ee9 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -198,68 +198,62 @@ static void set_filter_from_device(int fd)
/* Subtests */
-static void unbind_rebind(void)
+static void unbind_rebind(struct hotunplug *priv)
{
- struct hotunplug priv;
char buf[PATH_MAX];
- prepare(&priv, buf, sizeof(buf));
+ prepare(priv, buf, sizeof(buf));
igt_debug("closing the device\n");
- close(priv.fd.drm);
+ close(priv->fd.drm);
- driver_unbind(priv.fd.sysfs_drv, priv.dev_bus_addr, "");
+ driver_unbind(priv->fd.sysfs_drv, priv->dev_bus_addr, "");
- driver_bind(priv.fd.sysfs_drv, priv.dev_bus_addr);
+ driver_bind(priv->fd.sysfs_drv, priv->dev_bus_addr);
healthcheck();
}
-static void unplug_rescan(void)
+static void unplug_rescan(struct hotunplug *priv)
{
- struct hotunplug priv;
-
- prepare(&priv, NULL, 0);
+ prepare(priv, NULL, 0);
igt_debug("closing the device\n");
- close(priv.fd.drm);
+ close(priv->fd.drm);
- device_unplug(priv.fd.sysfs_dev, "");
+ device_unplug(priv->fd.sysfs_dev, "");
- bus_rescan(priv.fd.sysfs_bus);
+ bus_rescan(priv->fd.sysfs_bus);
healthcheck();
}
-static void hotunbind_lateclose(void)
+static void hotunbind_lateclose(struct hotunplug *priv)
{
- struct hotunplug priv;
char buf[PATH_MAX];
- prepare(&priv, buf, sizeof(buf));
+ prepare(priv, buf, sizeof(buf));
- driver_unbind(priv.fd.sysfs_drv, priv.dev_bus_addr, "hot ");
+ driver_unbind(priv->fd.sysfs_drv, priv->dev_bus_addr, "hot ");
- driver_bind(priv.fd.sysfs_drv, priv.dev_bus_addr);
+ driver_bind(priv->fd.sysfs_drv, priv->dev_bus_addr);
igt_debug("late closing the unbound device instance\n");
- close(priv.fd.drm);
+ close(priv->fd.drm);
healthcheck();
}
-static void hotunplug_lateclose(void)
+static void hotunplug_lateclose(struct hotunplug *priv)
{
- struct hotunplug priv;
-
- prepare(&priv, NULL, 0);
+ prepare(priv, NULL, 0);
- device_unplug(priv.fd.sysfs_dev, "hot ");
+ device_unplug(priv->fd.sysfs_dev, "hot ");
- bus_rescan(priv.fd.sysfs_bus);
+ bus_rescan(priv->fd.sysfs_bus);
igt_debug("late closing the removed device instance\n");
- close(priv.fd.drm);
+ close(priv->fd.drm);
healthcheck();
}
@@ -268,6 +262,8 @@ static void hotunplug_lateclose(void)
igt_main
{
+ struct hotunplug priv;
+
igt_fixture {
int fd_drm;
@@ -287,28 +283,28 @@ igt_main
igt_describe("Check if the driver can be cleanly unbound from a device
believed to be closed");
igt_subtest("unbind-rebind")
- unbind_rebind();
+ unbind_rebind(&priv);
igt_fixture
igt_abort_on_f(failure, "%s\n", failure);
igt_describe("Check if a device believed to be closed can be cleanly
unplugged");
igt_subtest("unplug-rescan")
- unplug_rescan();
+ unplug_rescan(&priv);
igt_fixture
igt_abort_on_f(failure, "%s\n", failure);
igt_describe("Check if the driver can be cleanly unbound from a still
open device, then released");
igt_subtest("hotunbind-lateclose")
- hotunbind_lateclose();
+ hotunbind_lateclose(&priv);
igt_fixture
igt_abort_on_f(failure, "%s\n", failure);
igt_describe("Check if a still open device can be cleanly unplugged,
then released");
igt_subtest("hotunplug-lateclose")
- hotunplug_lateclose();
+ hotunplug_lateclose(&priv);
igt_fixture
igt_abort_on_f(failure, "%s\n", failure);
--
2.21.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3 09/19] tests/core_hotunplug: Prepare invariant data once per test run
Each subtest now calls a prepare() helper which opens a couple of files
required by that subtest. Those files are then closed after use,
either directly from the subtest body, or indirectly from inside one of
helper functions called during the subtest execution. That approach
not only makes lifecycle of individual file descriptors difficult to
follow but also prevents us from re-running health checks on subtest
failures from follow up igt_fixture sections since we may need to retry
bus rescan or driver rebind operations.
Two of those files - device bus and driver sysfs nodes - are not
affected nor interfere with driver unbind / device unplug operations
performed by subtests. Then, there is not much sense in closing and
reopening those nodes. Open them once at the beginning of a test run,
then close them as late as on test completion.
The prepare() helper also populates a device bus address string used by
driver unbind / rebind operations. Since the bus address of an
exercised device never changes, also prepare that string only once at
the beginning of a test run. Note that it is the same as the last
component of a device filter string which is already resolved and
installed from an initial igt_fixture section of the test. Then,
initialize the device bus address field of a hotunplug structure
instance with a pointer to the respective substring of that filter
rather than resolving it again from the device sysfs node pathname.
There is one more sysfs node - a DRM device node - now opened by the
prepare() helper for subtests which perform device remove operations.
That node can't be opened only once at the beginning of a test run
because its open file descriptor is no longer usable as soon as a
driver unbind operation is performed. On the other hand, it can't be
opened easily from inside a device_remove() helper since some subtests
just don't open the device so its file descriptor used by
igt_sysfs_open() may just not be available. However, note that only a
PCI sysfs node of the device, not necessarily the DRM one, is actually
required for a successful device remove operation, and that node can be
opened easily from a bus file descriptor using a device bus address
string, both already available. Then, change the semantics of a
.fd.sysfs_dev field of the hotunplug structure from DRM to PCI device
sysfs file descriptor, then let the device_remove() helper open the
device PCI node by itself and store its file descriptor in that field.
Also, for still more easy access to the device PCI node, use a
'subsystem/devices' subnode of the PCI device as its bus sysfs location
instead of just 'subsystem', then adjust a relative path to the bus
'rescan' function accordingly.
A side benefit of using the PCI device sysfs node, not the DRM one,
while removing the device is that a future subtest may now easily
perform both driver unbind and device remove operations in a row.
v3: Refresh.
Suggested-by: Michał Winiarski
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 85 +++---
1 file changed, 31 insertions(+), 54 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index f7a54010b..849a774ff 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -86,41 +86,30 @@ static int close_sysfs(int fd_sysfs_dev)
return local_close(fd_sysfs_dev, "Device sysfs node close failed");
}
-static void prepare_for_unbind(struct hotunplug *priv, char *buf, int buflen)
+static void prepare(struct hotunplug *priv)
{
- int len;
+ const char *filter = igt_device_filter_get(0), *sysfs_path;
- igt_assert(buflen);
+ igt_assert(filter);
- priv->fd.sysfs_drv = openat(priv->fd.sysfs_dev, "device/driver",
- O_DIRECTORY);
- igt_assert_fd(priv->fd.sysfs_drv);
-
- len = readlinkat(priv->fd.sysfs_dev, "device", buf, buflen - 1);
- buf[len] = '\0';
- priv->dev_bus_addr = strrchr(buf, '/');
+ priv->dev_bus_addr = strrchr(filter, '/');
igt_assert(priv->dev_bus_addr++);
- /* sysfs_dev no longer needed */
- priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
- igt_assert_eq(priv->fd.sysfs_dev, -1);
-}
-
-static void prepare(struct hotunplug *priv, char *buf, int buflen)
-{
- priv->fd.drm = local_drm_open_driver("", " for subtest");
+ sysfs_path = strchr(filter, ':');
+ igt_assert(sysfs_path++);
- priv->fd.sysfs_dev = igt_sysfs_open(priv->fd.drm);
+ priv->fd.sysfs_dev = open(sysfs_path, O_DIRECTORY);
igt_assert_fd(priv->fd.sysfs_dev);
- if (buf) {
- prepare_for_unbind(priv, buf, buflen);
- } else {
- /* prepare for bus rescan */
- priv->fd.sysfs_bus = openat(priv->fd.sysfs_dev,
- "device/subsystem", O_DIRECTORY);
- igt_assert_fd(priv->fd.sysfs_bus);
[Intel-gfx] [PATCH i-g-t v3 04/19] tests/core_hotunplug: Consolidate duplicated debug messages
Some debug messages which designate specific test operations, or their
greater parts at least, sound always the same, no matter which subtest
they are called from. Emit them, possibly updated with subtest
specified modifiers, from inside respective helpers instead of
duplicating them in subtest bodies.
v3: Refresh and extend over new case (local_drm_open_driver),
- allow callers to specify a message suffix as well where applicable.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski # v1
---
tests/core_hotunplug.c | 39 ---
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index e576a6c6c..5093233d7 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -54,10 +54,12 @@ struct hotunplug {
* use drm_open_driver() since in case of an i915 device it opens it
* twice and keeps a second file descriptor open for exit handler use.
*/
-static int local_drm_open_driver(void)
+static int local_drm_open_driver(const char *prefix, const char *suffix)
{
int fd_drm;
+ igt_debug("%sopening device%s\n", prefix, suffix);
+
fd_drm = __drm_open_driver(DRIVER_ANY);
igt_assert_fd(fd_drm);
@@ -85,8 +87,7 @@ static void prepare_for_unbind(struct hotunplug *priv, char
*buf, int buflen)
static void prepare(struct hotunplug *priv, char *buf, int buflen)
{
- igt_debug("opening device\n");
- priv->fd.drm = local_drm_open_driver();
+ priv->fd.drm = local_drm_open_driver("", " for subtest");
priv->fd.sysfs_dev = igt_sysfs_open(priv->fd.drm);
igt_assert_fd(priv->fd.sysfs_dev);
@@ -104,8 +105,11 @@ static void prepare(struct hotunplug *priv, char *buf, int
buflen)
static const char *failure;
/* Unbind the driver from the device */
-static void driver_unbind(int fd_sysfs_drv, const char *dev_bus_addr)
+static void driver_unbind(int fd_sysfs_drv, const char *dev_bus_addr,
+ const char *prefix)
{
+ igt_debug("%sunbinding the driver from the device\n", prefix);
+
failure = "Driver unbind timeout!";
igt_set_timeout(60, failure);
igt_sysfs_set(fd_sysfs_drv, "unbind", dev_bus_addr);
@@ -118,6 +122,8 @@ static void driver_unbind(int fd_sysfs_drv, const char
*dev_bus_addr)
/* Re-bind the driver to the device */
static void driver_bind(int fd_sysfs_drv, const char *dev_bus_addr)
{
+ igt_debug("rebinding the driver to the device\n");
+
failure = "Driver re-bind timeout!";
igt_set_timeout(60, failure);
igt_sysfs_set(fd_sysfs_drv, "bind", dev_bus_addr);
@@ -128,8 +134,10 @@ static void driver_bind(int fd_sysfs_drv, const char
*dev_bus_addr)
}
/* Remove (virtually unplug) the device from its bus */
-static void device_unplug(int fd_sysfs_dev)
+static void device_unplug(int fd_sysfs_dev, const char *prefix)
{
+ igt_debug("%sunplugging the device\n", prefix);
+
failure = "Device unplug timeout!";
igt_set_timeout(60, failure);
igt_sysfs_set(fd_sysfs_dev, "device/remove", "1");
@@ -142,6 +150,8 @@ static void device_unplug(int fd_sysfs_dev)
/* Re-discover the device by rescanning its bus */
static void bus_rescan(int fd_sysfs_bus)
{
+ igt_debug("rediscovering the device\n");
+
failure = "Bus rescan timeout!";
igt_set_timeout(60, failure);
igt_sysfs_set(fd_sysfs_bus, "rescan", "1");
@@ -158,9 +168,8 @@ static void healthcheck(void)
/* device name may have changed, rebuild IGT device list */
igt_devices_scan(true);
- igt_debug("reopening the device\n");
failure = "Device reopen failure!";
- fd_drm = local_drm_open_driver();
+ fd_drm = local_drm_open_driver("re", " for healthcheck");
failure = NULL;
if (is_i915_device(fd_drm)) {
@@ -199,10 +208,8 @@ static void unbind_rebind(void)
igt_debug("closing the device\n");
close(priv.fd.drm);
- igt_debug("unbinding the driver from the device\n");
- driver_unbind(priv.fd.sysfs_drv, priv.dev_bus_addr);
+ driver_unbind(priv.fd.sysfs_drv, priv.dev_bus_addr, "");
- igt_debug("rebinding the driver to the device\n");
driver_bind(priv.fd.sysfs_drv, priv.dev_bus_addr);
healthcheck();
@@ -217,10 +224,8 @@ static void unplug_rescan(void)
igt_debug("closing the device\n");
close(priv.fd.drm);
- igt_debug("unplugging the device\n");
- device_unplug(priv.fd.sysfs_dev);
+ device_unplug(priv.fd.sysfs_dev, "");
- igt_debug("recovering the device\n");
bus_rescan(priv.fd.sysfs_bus);
healthcheck();
@@ -233,10 +238,8 @@ static void hotunbind_lateclose(void)
prepare(&priv, buf, sizeof(buf));
- igt_debug("hot unbinding the driver from the device\n");
- driver_unbind(priv.fd.sysfs_drv, priv.dev_bus_addr);
+ driver_unbind(priv.fd.sysfs_drv, priv.dev_bus_addr,
[Intel-gfx] [PATCH i-g-t v3 08/19] tests/core_hotunplug: Handle device close errors
The test now ignores device close errors. Those errors are believed to
have no influence on device health so there is no need to process them
the same way as we mostly do on errors, i.e., notify CI about a problem
via igt_abort. However, those errors may indicate issues with the test
itself. Moreover, impact of those errors on operations performed by
subtests, like driver unbind or device remove, should be perceived as
undefined. Then, we should fail as soon as a device or device sysfs
node close error occurs in a subtest and also skip subsequent subtests.
However, once a driver unbind or device unplug operation has been
attempted by a subtest, we would still like to check the device health.
When in a subtest, store results of device close operations for future
reference. Reuse file descriptor fields of the hotunplug structure for
that. Unless in between of a driver remove or device unplug operation
and a successful device health check completion, fail current test
section right after a device close error occurs, warn otherwise. If
still running, examine device file descriptor fields in subsequent
igt_fixture sections and skip on errors.
v2: Fix a typo in post_healthcheck function name.
v3: Don't fail on close error after successful health check, warn only,
- move duplicated messages to helpers.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski # v1
---
tests/core_hotunplug.c | 64 +-
1 file changed, 50 insertions(+), 14 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 4f7e89c95..f7a54010b 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -43,7 +43,7 @@ struct hotunplug {
int sysfs_dev;
int sysfs_bus;
int sysfs_drv;
- } fd;
+ } fd; /* >= 0: valid fd, == -1: closed, < -1: close failed */
const char *dev_bus_addr;
const char *failure;
};
@@ -67,6 +67,25 @@ static int local_drm_open_driver(const char *prefix, const
char *suffix)
return fd_drm;
}
+static int local_close(int fd, const char *message)
+{
+ errno = 0;
+ if (igt_warn_on_f(close(fd), "%s\n", message))
+ return -errno; /* (never -1) */
+
+ return -1; /* success - return 'closed' */
+}
+
+static int close_device(int fd_drm)
+{
+ return local_close(fd_drm, "Device close failed");
+}
+
+static int close_sysfs(int fd_sysfs_dev)
+{
+ return local_close(fd_sysfs_dev, "Device sysfs node close failed");
+}
+
static void prepare_for_unbind(struct hotunplug *priv, char *buf, int buflen)
{
int len;
@@ -83,7 +102,8 @@ static void prepare_for_unbind(struct hotunplug *priv, char
*buf, int buflen)
igt_assert(priv->dev_bus_addr++);
/* sysfs_dev no longer needed */
- close(priv->fd.sysfs_dev);
+ priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
+ igt_assert_eq(priv->fd.sysfs_dev, -1);
}
static void prepare(struct hotunplug *priv, char *buf, int buflen)
@@ -142,7 +162,7 @@ static void device_unplug(struct hotunplug *priv, const
char *prefix)
igt_reset_timeout();
priv->failure = NULL;
- close(priv->fd.sysfs_dev);
+ priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
}
/* Re-discover the device by rescanning its bus */
@@ -161,6 +181,7 @@ static void bus_rescan(struct hotunplug *priv)
static void healthcheck(struct hotunplug *priv)
{
+ /* preserve error code potentially stored before in priv->fd.drm */
int fd_drm;
/* device name may have changed, rebuild IGT device list */
@@ -176,7 +197,17 @@ static void healthcheck(struct hotunplug *priv)
priv->failure = NULL;
}
- close(fd_drm);
+ fd_drm = close_device(fd_drm);
+ if (priv->fd.drm == -1) /* store result if no error code to preserve */
+ priv->fd.drm = fd_drm;
+}
+
+static void post_healthcheck(struct hotunplug *priv)
+{
+ igt_abort_on_f(priv->failure, "%s\n", priv->failure);
+
+ igt_require(priv->fd.drm == -1);
+ igt_require(priv->fd.sysfs_dev == -1);
}
static void set_filter_from_device(int fd)
@@ -203,7 +234,8 @@ static void unbind_rebind(struct hotunplug *priv)
prepare(priv, buf, sizeof(buf));
igt_debug("closing the device\n");
- close(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
driver_unbind(priv, "");
@@ -217,7 +249,8 @@ static void unplug_rescan(struct hotunplug *priv)
prepare(priv, NULL, 0);
igt_debug("closing the device\n");
- close(priv->fd.drm);
+ priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
device_unplug(priv, "");
@@ -237,7 +270,7 @@ static void hotunbind_lateclose(struct hotunplug *priv)
driver_bind(priv);
igt_debug("late closing the unbound device instance\n")
[Intel-gfx] [PATCH i-g-t v3 15/19] tests/core_hotunplug: Assert expected device presence/absence
Don't rely on successful write to sysfs control files, assert existence / non-existence of a respective device sysfs node as well. Signed-off-by: Janusz Krzysztofik Reviewed-by: Michał Winiarski --- tests/core_hotunplug.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c index f280771ab..d30ad8525 100644 --- a/tests/core_hotunplug.c +++ b/tests/core_hotunplug.c @@ -126,6 +126,9 @@ static void driver_unbind(struct hotunplug *priv, const char *prefix, priv->dev_bus_addr), "Driver unbind failure!\n"); igt_reset_timeout(); + + igt_assert_f(faccessat(priv->fd.sysfs_drv, priv->dev_bus_addr, F_OK, 0), +"Unbound device still present\n"); } /* Re-bind the driver to the device */ @@ -139,6 +142,10 @@ static void driver_bind(struct hotunplug *priv, int timeout) priv->dev_bus_addr), "Driver re-bind failure\n!"); igt_reset_timeout(); + + igt_fail_on_f(faccessat(priv->fd.sysfs_drv, priv->dev_bus_addr, + F_OK, 0), + "Rebound device not present!\n"); } /* Remove (virtually unplug) the device from its bus */ @@ -161,6 +168,9 @@ static void device_unplug(struct hotunplug *priv, const char *prefix, priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev); igt_assert_eq(priv->fd.sysfs_dev, -1); + + igt_assert_f(faccessat(priv->fd.sysfs_bus, priv->dev_bus_addr, F_OK, 0), +"Unplugged device still present\n"); } /* Re-discover the device by rescanning its bus */ @@ -173,6 +183,10 @@ static void bus_rescan(struct hotunplug *priv, int timeout) igt_assert_f(igt_sysfs_set(priv->fd.sysfs_bus, "../rescan", "1"), "Bus rescan failure!\n"); igt_reset_timeout(); + + igt_fail_on_f(faccessat(priv->fd.sysfs_bus, priv->dev_bus_addr, + F_OK, 0), + "Fakely unplugged device not rediscovered!\n"); } static void cleanup(struct hotunplug *priv) -- 2.21.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3 18/19] tests/core_hotunplug: Add 'lateclose before restore' variants
If a GPU gets wedged during driver rebind or device re-plug for some
reason, current hotunbind/hotunplug test variants may time out before
lateclose phase, resulting in incomplete CI reports. Rename those
variants to more adequate hotrebind/hotreplug-lateclose and add new
variants under the old names focused on exercising the lateclose phase
regardless of potential rediscover/rebind issues. Moreover, add two
more variants which exercise driver rebind / device restore after late
close specifically.
v2: Rebase on upstream.
v3: Refresh,
- further rename hotunbind/hotunplug-lateclose to hotunbind-rebind
and hotunplug-rescan respectively, then add two more variants under
the old names which only exercise late close, leaving rebind /
rescan to be cared of in the post-subtest recovery phase,
- also update descriptions of unmodified subtests for consistency.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski # v2
---
tests/core_hotunplug.c | 114 +++--
1 file changed, 109 insertions(+), 5 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 277679ea1..42a13f8b5 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -360,8 +360,6 @@ static void hotunbind_lateclose(struct hotunplug *priv)
driver_unbind(priv, "hot ", 0);
- driver_bind(priv, 60);
-
igt_debug("late closing the unbound device instance\n");
priv->fd.drm = close_device(priv->fd.drm);
igt_assert_eq(priv->fd.drm, -1);
@@ -373,11 +371,69 @@ static void hotunplug_lateclose(struct hotunplug *priv)
device_unplug(priv, "hot ", 0);
- bus_rescan(priv, 60);
+ igt_debug("late closing the removed device instance\n");
+ priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
+}
+
+static void hotunbind_rebind(struct hotunplug *priv)
+{
+ priv->fd.drm = local_drm_open_driver("", " for hotrebind");
+
+ driver_unbind(priv, "hot ", 60);
+
+ igt_debug("late closing the unbound device instance\n");
+ priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
+
+ driver_bind(priv, 0);
+
+ healthcheck(priv, false);
+}
+
+static void hotunplug_rescan(struct hotunplug *priv)
+{
+ priv->fd.drm = local_drm_open_driver("", " for hotreplug");
+
+ device_unplug(priv, "hot ", 60);
+
+ igt_debug("late closing the removed device instance\n");
+ priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
+
+ bus_rescan(priv, 0);
+
+ healthcheck(priv, false);
+}
+
+static void hotrebind_lateclose(struct hotunplug *priv)
+{
+ priv->fd.drm = local_drm_open_driver("", " for hotrebind");
+
+ driver_unbind(priv, "hot ", 60);
+
+ driver_bind(priv, 0);
+
+ igt_debug("late closing the unbound device instance\n");
+ priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
+
+ healthcheck(priv, false);
+}
+
+static void hotreplug_lateclose(struct hotunplug *priv)
+{
+ priv->fd.drm = local_drm_open_driver("", " for hotreplug");
+
+ device_unplug(priv, "hot ", 60);
+
+ bus_rescan(priv, 0);
igt_debug("late closing the removed device instance\n");
priv->fd.drm = close_device(priv->fd.drm);
igt_assert_eq(priv->fd.drm, -1);
+
+ healthcheck(priv, false);
}
/* Main */
@@ -410,7 +466,7 @@ igt_main
}
igt_subtest_group {
- igt_describe("Check if the driver can be cleanly unbound from a
device believed to be closed");
+ igt_describe("Check if the driver can be cleanly unbound from a
device believed to be closed, then rebound");
igt_subtest("unbind-rebind")
unbind_rebind(&priv);
@@ -422,7 +478,7 @@ igt_main
post_healthcheck(&priv);
igt_subtest_group {
- igt_describe("Check if a device believed to be closed can be
cleanly unplugged");
+ igt_describe("Check if a device believed to be closed can be
cleanly unplugged, then restored");
igt_subtest("unplug-rescan")
unplug_rescan(&priv);
@@ -454,6 +510,54 @@ igt_main
recover(&priv);
}
+ igt_fixture
+ post_healthcheck(&priv);
+
+ igt_subtest_group {
+ igt_describe("Check if the driver can be cleanly rebound to a
device after hotunbind-lateclose");
+ igt_subtest("hotunbind-rebind")
+ hotunbind_rebind(&priv);
+
+ igt_fixture
+ recover(&priv);
+ }
+
+ igt_fixture
+ post_healthcheck(&priv);
+
+ igt_subtest_group {
+ igt_describe("Check if a device can be cleanly restored after
hotunplug-lateclose");
+ igt_subtest("hotunplug-rescan")
+
[Intel-gfx] [PATCH i-g-t v3 14/19] tests/core_hotunplug: Process return values of sysfs operations
Return values of driver bind/unbind / device remove/recover sysfs operations are now ignored. Assert their correctness. v2: Add trailing newlines missing from igt_assert messages. Signed-off-by: Janusz Krzysztofik Reviewed-by: Michał Winiarski --- tests/core_hotunplug.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c index 572c66474..f280771ab 100644 --- a/tests/core_hotunplug.c +++ b/tests/core_hotunplug.c @@ -122,7 +122,9 @@ static void driver_unbind(struct hotunplug *priv, const char *prefix, priv->failure = "Driver unbind failure!"; igt_set_timeout(timeout, "Driver unbind timeout!"); - igt_sysfs_set(priv->fd.sysfs_drv, "unbind", priv->dev_bus_addr); + igt_assert_f(igt_sysfs_set(priv->fd.sysfs_drv, "unbind", + priv->dev_bus_addr), +"Driver unbind failure!\n"); igt_reset_timeout(); } @@ -133,7 +135,9 @@ static void driver_bind(struct hotunplug *priv, int timeout) priv->failure = "Driver re-bind failure!"; igt_set_timeout(timeout, "Driver re-bind timeout!"); - igt_sysfs_set(priv->fd.sysfs_drv, "bind", priv->dev_bus_addr); + igt_assert_f(igt_sysfs_set(priv->fd.sysfs_drv, "bind", + priv->dev_bus_addr), +"Driver re-bind failure\n!"); igt_reset_timeout(); } @@ -151,7 +155,8 @@ static void device_unplug(struct hotunplug *priv, const char *prefix, priv->failure = "Device unplug failure!"; igt_set_timeout(timeout, "Device unplug timeout!"); - igt_sysfs_set(priv->fd.sysfs_dev, "remove", "1"); + igt_assert_f(igt_sysfs_set(priv->fd.sysfs_dev, "remove", "1"), +"Device unplug failure\n!"); igt_reset_timeout(); priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev); @@ -165,7 +170,8 @@ static void bus_rescan(struct hotunplug *priv, int timeout) priv->failure = "Bus rescan failure!"; igt_set_timeout(timeout, "Bus rescan timeout!"); - igt_sysfs_set(priv->fd.sysfs_bus, "../rescan", "1"); + igt_assert_f(igt_sysfs_set(priv->fd.sysfs_bus, "../rescan", "1"), + "Bus rescan failure!\n"); igt_reset_timeout(); } -- 2.21.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3 16/19] tests/core_hotunplug: Explicitly ignore unused return values
Some return values are not useful and can be ignored. Wrap those cases
inside igt_ignore_warn(), not only to make sure compilers are happy but
also to clearly document our decisions.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index d30ad8525..24beed81a 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -256,7 +256,7 @@ static void set_filter_from_device(int fd)
char path[PATH_MAX + 1];
igt_assert(igt_sysfs_path(fd, path, PATH_MAX));
- strncat(path, "/device", PATH_MAX - strlen(path));
+ igt_ignore_warn(strncat(path, "/device", PATH_MAX - strlen(path)));
igt_assert(realpath(path, dst));
igt_device_filter_free_all();
@@ -385,7 +385,7 @@ igt_main
igt_fixture {
post_healthcheck(&priv);
- close(priv.fd.sysfs_bus);
- close(priv.fd.sysfs_drv);
+ igt_ignore_warn(close(priv.fd.sysfs_bus));
+ igt_ignore_warn(close(priv.fd.sysfs_drv));
}
}
--
2.21.1
___
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[Intel-gfx] [PATCH i-g-t v3 07/19] tests/core_hotunplug: Pass errors via a data structure field
A pointer to fatal error messages can be passed around via hotunplug
structure, no need to declare it as global.
v3: Refresh.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 96 +-
1 file changed, 47 insertions(+), 49 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 95d326ee9..4f7e89c95 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -45,6 +45,7 @@ struct hotunplug {
int sysfs_drv;
} fd;
const char *dev_bus_addr;
+ const char *failure;
};
/* Helpers */
@@ -102,80 +103,77 @@ static void prepare(struct hotunplug *priv, char *buf,
int buflen)
}
}
-static const char *failure;
-
/* Unbind the driver from the device */
-static void driver_unbind(int fd_sysfs_drv, const char *dev_bus_addr,
- const char *prefix)
+static void driver_unbind(struct hotunplug *priv, const char *prefix)
{
igt_debug("%sunbinding the driver from the device\n", prefix);
- failure = "Driver unbind timeout!";
- igt_set_timeout(60, failure);
- igt_sysfs_set(fd_sysfs_drv, "unbind", dev_bus_addr);
+ priv->failure = "Driver unbind timeout!";
+ igt_set_timeout(60, priv->failure);
+ igt_sysfs_set(priv->fd.sysfs_drv, "unbind", priv->dev_bus_addr);
igt_reset_timeout();
- failure = NULL;
+ priv->failure = NULL;
- /* don't close fd_sysfs_drv, it will be used for driver rebinding */
+ /* don't close fd.sysfs_drv, it will be used for driver rebinding */
}
/* Re-bind the driver to the device */
-static void driver_bind(int fd_sysfs_drv, const char *dev_bus_addr)
+static void driver_bind(struct hotunplug *priv)
{
igt_debug("rebinding the driver to the device\n");
- failure = "Driver re-bind timeout!";
- igt_set_timeout(60, failure);
- igt_sysfs_set(fd_sysfs_drv, "bind", dev_bus_addr);
+ priv->failure = "Driver re-bind timeout!";
+ igt_set_timeout(60, priv->failure);
+ igt_sysfs_set(priv->fd.sysfs_drv, "bind", priv->dev_bus_addr);
igt_reset_timeout();
- failure = NULL;
+ priv->failure = NULL;
- close(fd_sysfs_drv);
+ close(priv->fd.sysfs_drv);
}
/* Remove (virtually unplug) the device from its bus */
-static void device_unplug(int fd_sysfs_dev, const char *prefix)
+static void device_unplug(struct hotunplug *priv, const char *prefix)
{
igt_debug("%sunplugging the device\n", prefix);
- failure = "Device unplug timeout!";
- igt_set_timeout(60, failure);
- igt_sysfs_set(fd_sysfs_dev, "device/remove", "1");
+ priv->failure = "Device unplug timeout!";
+ igt_set_timeout(60, priv->failure);
+ igt_sysfs_set(priv->fd.sysfs_dev, "device/remove", "1");
igt_reset_timeout();
- failure = NULL;
+ priv->failure = NULL;
- close(fd_sysfs_dev);
+ close(priv->fd.sysfs_dev);
}
/* Re-discover the device by rescanning its bus */
-static void bus_rescan(int fd_sysfs_bus)
+static void bus_rescan(struct hotunplug *priv)
{
igt_debug("rediscovering the device\n");
- failure = "Bus rescan timeout!";
- igt_set_timeout(60, failure);
- igt_sysfs_set(fd_sysfs_bus, "rescan", "1");
+ priv->failure = "Bus rescan timeout!";
+ igt_set_timeout(60, priv->failure);
+ igt_sysfs_set(priv->fd.sysfs_bus, "rescan", "1");
igt_reset_timeout();
- failure = NULL;
+ priv->failure = NULL;
- close(fd_sysfs_bus);
+ close(priv->fd.sysfs_bus);
}
-static void healthcheck(void)
+static void healthcheck(struct hotunplug *priv)
{
int fd_drm;
/* device name may have changed, rebuild IGT device list */
igt_devices_scan(true);
- failure = "Device reopen failure!";
+ priv->failure = "Device reopen failure!";
fd_drm = local_drm_open_driver("re", " for healthcheck");
- failure = NULL;
+ priv->failure = NULL;
if (is_i915_device(fd_drm)) {
- failure = "GEM failure";
+ priv->failure = "GEM failure";
igt_require_gem(fd_drm);
- failure = NULL;
+ priv->failure = NULL;
}
close(fd_drm);
@@ -207,11 +205,11 @@ static void unbind_rebind(struct hotunplug *priv)
igt_debug("closing the device\n");
close(priv->fd.drm);
- driver_unbind(priv->fd.sysfs_drv, priv->dev_bus_addr, "");
+ driver_unbind(priv, "");
- driver_bind(priv->fd.sysfs_drv, priv->dev_bus_addr);
+ driver_bind(priv);
- healthcheck();
+ healthcheck(priv);
}
static void unplug_rescan(struct hotunplug *priv)
@@ -221,11 +219,11 @@ static void unplug_rescan(struct hotunplug *priv)
igt_debug("closing the device\n");
close(priv->fd.drm);
- device_unplug(priv->fd.sysfs_dev, "");
+ d
[Intel-gfx] [PATCH i-g-t v3 12/19] tests/core_hotunplug: Fail subtests on device close errors
Since health checks are now run from follow-up fixture sections, it is
safe to fail subtests without the need to abort the test execution. Do
that on device close errors instead of just emitting warnings.
v3: Refresh.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Michał Winiarski
---
tests/core_hotunplug.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 145593683..e048f3a15 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -153,6 +153,7 @@ static void device_unplug(struct hotunplug *priv, const
char *prefix)
igt_reset_timeout();
priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
+ igt_assert_eq(priv->fd.sysfs_dev, -1);
}
/* Re-discover the device by rescanning its bus */
@@ -270,6 +271,7 @@ static void hotunbind_lateclose(struct hotunplug *priv)
igt_debug("late closing the unbound device instance\n");
priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
}
static void hotunplug_lateclose(struct hotunplug *priv)
@@ -282,6 +284,7 @@ static void hotunplug_lateclose(struct hotunplug *priv)
igt_debug("late closing the removed device instance\n");
priv->fd.drm = close_device(priv->fd.drm);
+ igt_assert_eq(priv->fd.drm, -1);
}
/* Main */
--
2.21.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v3 13/19] tests/core_hotunplug: Let the driver time out essential sysfs operations
The test now arms a timer before performing each driver unbind / rebind
or device unplug / bus rescan sysfs operation. Then in case of issues
we may prevent the driver from showing us if and how it can handle
them.
Don't arm the timer before sysfs operations which are essential for a
subtest.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 38 --
1 file changed, 20 insertions(+), 18 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index e048f3a15..572c66474 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -115,29 +115,31 @@ static void prepare(struct hotunplug *priv)
}
/* Unbind the driver from the device */
-static void driver_unbind(struct hotunplug *priv, const char *prefix)
+static void driver_unbind(struct hotunplug *priv, const char *prefix,
+ int timeout)
{
igt_debug("%sunbinding the driver from the device\n", prefix);
priv->failure = "Driver unbind failure!";
- igt_set_timeout(60, "Driver unbind timeout!");
+ igt_set_timeout(timeout, "Driver unbind timeout!");
igt_sysfs_set(priv->fd.sysfs_drv, "unbind", priv->dev_bus_addr);
igt_reset_timeout();
}
/* Re-bind the driver to the device */
-static void driver_bind(struct hotunplug *priv)
+static void driver_bind(struct hotunplug *priv, int timeout)
{
igt_debug("rebinding the driver to the device\n");
priv->failure = "Driver re-bind failure!";
- igt_set_timeout(60, "Driver re-bind timeout!");
+ igt_set_timeout(timeout, "Driver re-bind timeout!");
igt_sysfs_set(priv->fd.sysfs_drv, "bind", priv->dev_bus_addr);
igt_reset_timeout();
}
/* Remove (virtually unplug) the device from its bus */
-static void device_unplug(struct hotunplug *priv, const char *prefix)
+static void device_unplug(struct hotunplug *priv, const char *prefix,
+ int timeout)
{
igt_require(priv->fd.sysfs_dev == -1);
@@ -148,7 +150,7 @@ static void device_unplug(struct hotunplug *priv, const
char *prefix)
igt_debug("%sunplugging the device\n", prefix);
priv->failure = "Device unplug failure!";
- igt_set_timeout(60, "Device unplug timeout!");
+ igt_set_timeout(timeout, "Device unplug timeout!");
igt_sysfs_set(priv->fd.sysfs_dev, "remove", "1");
igt_reset_timeout();
@@ -157,12 +159,12 @@ static void device_unplug(struct hotunplug *priv, const
char *prefix)
}
/* Re-discover the device by rescanning its bus */
-static void bus_rescan(struct hotunplug *priv)
+static void bus_rescan(struct hotunplug *priv, int timeout)
{
igt_debug("rediscovering the device\n");
priv->failure = "Bus rescan failure!";
- igt_set_timeout(60, "Bus rescan timeout!");
+ igt_set_timeout(timeout, "Bus rescan timeout!");
igt_sysfs_set(priv->fd.sysfs_bus, "../rescan", "1");
igt_reset_timeout();
}
@@ -209,10 +211,10 @@ static void recover(struct hotunplug *priv)
cleanup(priv);
if (faccessat(priv->fd.sysfs_bus, priv->dev_bus_addr, F_OK, 0))
- bus_rescan(priv);
+ bus_rescan(priv, 60);
else if (faccessat(priv->fd.sysfs_drv, priv->dev_bus_addr, F_OK, 0))
- driver_bind(priv);
+ driver_bind(priv, 60);
if (priv->failure)
healthcheck(priv);
@@ -245,18 +247,18 @@ static void set_filter_from_device(int fd)
static void unbind_rebind(struct hotunplug *priv)
{
- driver_unbind(priv, "");
+ driver_unbind(priv, "", 0);
- driver_bind(priv);
+ driver_bind(priv, 0);
healthcheck(priv);
}
static void unplug_rescan(struct hotunplug *priv)
{
- device_unplug(priv, "");
+ device_unplug(priv, "", 0);
- bus_rescan(priv);
+ bus_rescan(priv, 0);
healthcheck(priv);
}
@@ -265,9 +267,9 @@ static void hotunbind_lateclose(struct hotunplug *priv)
{
priv->fd.drm = local_drm_open_driver("", " for hotunbind");
- driver_unbind(priv, "hot ");
+ driver_unbind(priv, "hot ", 0);
- driver_bind(priv);
+ driver_bind(priv, 60);
igt_debug("late closing the unbound device instance\n");
priv->fd.drm = close_device(priv->fd.drm);
@@ -278,9 +280,9 @@ static void hotunplug_lateclose(struct hotunplug *priv)
{
priv->fd.drm = local_drm_open_driver("", " for hotunplug");
- device_unplug(priv, "hot ");
+ device_unplug(priv, "hot ", 0);
- bus_rescan(priv);
+ bus_rescan(priv, 60);
igt_debug("late closing the removed device instance\n");
priv->fd.drm = close_device(priv->fd.drm);
--
2.21.1
___
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[Intel-gfx] [PATCH i-g-t v3 17/19] tests/core_hotunplug: More thorough i915 healthcheck and recovery
The test now assumes the i915 driver is able to identify potential
hardware or driver issues while rebinding to a device and indicate them
by marking the GPU wedged. Should that assumption occur wrong, the
health check phase of the test would happily succeed while potentially
leaving the device in an unusable state. That would not only give us
falsely positive test results but could also potentially affect
subsequently run applications. Then, we should examine health of the
exercised device more thoroughly and try harder to recover it from
potentially detected stalls.
We could use a gem_test_engine() library function which submits and
asserts successful execution of a NOP batch on each physical engine.
Unfortunately, on failure this function jumps out of an IGT test
section it is called from, while we would like to continue with
recovery steps, possibly not adding another level of test section group
nesting. Moreover, the function opens the device again and doesn't
close the extra file descriptor before the jump, while we care for
being able to close the exercised device completely before running
certain subtest operations. Then, reimplement the function locally
with those issues fixed and use it as an i915 healthcheck. Call it
also on test startup so operations performed by the test are never
blamed for driver or hardware issues which may potentially exist and
be possible to detect on test start.
Should the i915 GPU be found unresponsive by the health check called
from a recovery section, try harder to recover it to a usable state
with a global GPU reset.
For still more effective detection of GPU hangs, use a hang detector
provided by IGT library. However, replace the library signal handler
with our own implementation that doesn't jump out of the current IGT
test section on GPU hang so we are still able to perform the reset and
retry.
Signed-off-by: Janusz Krzysztofik
---
tests/core_hotunplug.c | 88 ++
1 file changed, 80 insertions(+), 8 deletions(-)
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index 24beed81a..277679ea1 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -23,8 +23,10 @@
#include
#include
+#include
#include
#include
+#include
#include
#include
#include
@@ -195,7 +197,71 @@ static void cleanup(struct hotunplug *priv)
priv->fd.sysfs_dev = close_sysfs(priv->fd.sysfs_dev);
}
-static void healthcheck(struct hotunplug *priv)
+static bool local_i915_is_wedged(int i915)
+{
+ int err = 0;
+
+ if (ioctl(i915, DRM_IOCTL_I915_GEM_THROTTLE))
+ err = -errno;
+ return err == -EIO;
+}
+
+static bool hang_detected;
+
+static void local_sig_abort(int sig)
+{
+ errno = 0; /* inside a signal, last errno reporting is confusing */
+ hang_detected = true;
+}
+
+static int local_i915_healthcheck(int i915)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_exec_object2 obj = { };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+ const struct intel_execution_engine2 *engine;
+
+ igt_debug("running i915 GPU healthcheck\n");
+
+ if (local_i915_is_wedged(i915))
+ return -EIO;
+
+ obj.handle = gem_create(i915, 4096);
+ gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+
+ hang_detected = false;
+ igt_fork_hang_detector(i915);
+ signal(SIGIO, local_sig_abort);
+
+ __for_each_physical_engine(i915, engine) {
+ execbuf.flags = engine->flags;
+ gem_execbuf(i915, &execbuf);
+ }
+
+ gem_sync(i915, obj.handle);
+ gem_close(i915, obj.handle);
+
+ igt_stop_hang_detector();
+ if (hang_detected)
+ return -EIO;
+
+ if (local_i915_is_wedged(i915))
+ return -EIO;
+
+ return 0;
+}
+
+static int local_i915_recover(int i915)
+{
+ igt_debug("forcing i915 GPU reset\n");
+ igt_force_gpu_reset(i915);
+ return local_i915_healthcheck(i915);
+}
+
+static void healthcheck(struct hotunplug *priv, bool recover)
{
/* preserve error code potentially stored before in priv->fd.drm */
bool closed = priv->fd.drm == -1;
@@ -210,9 +276,14 @@ static void healthcheck(struct hotunplug *priv)
priv->fd.drm = fd_drm;
if (is_i915_device(fd_drm)) {
- priv->failure = "GEM failure";
- igt_require_gem(fd_drm);
- priv->failure = NULL;
+ /* don't report library failed asserts as healthcheck failure */
+ priv->failure = "Unrecoverable test failure";
+ if (local_i915_healthcheck(fd_drm) &&
+ (!recover || local_i915_recover(fd_drm)))
+ priv->failure = "Healthcheck failure!";
+ else
+ priv->failure =
[Intel-gfx] [PATCH i-g-t v3 19/19] tests/core_hotunplug: Un-blocklist *bind* subtests
Subtests which don't remove the device, only unbind the driver from it, seem relatively safe and harmless for CI. Remove them from the CI blocklist. Signed-off-by: Janusz Krzysztofik --- tests/intel-ci/blacklist.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/intel-ci/blacklist.txt b/tests/intel-ci/blacklist.txt index f9a57cb54..25b567038 100644 --- a/tests/intel-ci/blacklist.txt +++ b/tests/intel-ci/blacklist.txt @@ -120,7 +120,7 @@ igt@perf_pmu@cpu-hotplug # Currently fails and leaves the machine in a very bad state, and # causes coverage loss for other tests. -igt@core_hotunplug@.* +igt@core_hotunplug@.*plug.* # hangs several gens of hosts, and has no immediate fix igt@device_reset@reset-bound \ No newline at end of file -- 2.21.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps()
On Wed, 2020-08-19 at 11:29 -0400, Sean Paul wrote:
> On Tue, Aug 11, 2020 at 04:04:56PM -0400, Lyude Paul wrote:
> > Since DP 1.3, it's been possible for DP receivers to specify an
> > additional set of DPCD capabilities, which can take precedence over the
> > capabilities reported at DP_DPCD_REV.
> >
> > Basically any device supporting DP is going to need to read these in an
> > identical manner, in particular nouveau, so let's go ahead and just move
> > this code out of i915 into a shared DRM DP helper that we can use in
> > other drivers.
> >
> > Signed-off-by: Lyude Paul
> > ---
> > drivers/gpu/drm/drm_dp_helper.c | 76 +
> > drivers/gpu/drm/i915/display/intel_dp.c | 60 +---
> > drivers/gpu/drm/i915/display/intel_dp.h | 1 -
> > drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
> > include/drm/drm_dp_helper.h | 3 +
> > 5 files changed, 82 insertions(+), 60 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 0ff2959c8f8e8..f9445915c6c26 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -423,6 +423,82 @@ bool drm_dp_send_real_edid_checksum(struct drm_dp_aux
> > *aux,
> > }
> > EXPORT_SYMBOL(drm_dp_send_real_edid_checksum);
> >
> > +static int drm_dp_read_extended_dpcd_caps(struct drm_dp_aux *aux,
> > + u8 dpcd[DP_RECEIVER_CAP_SIZE])
> > +{
> > + u8 dpcd_ext[6];
> > + int ret;
> > +
> > + /*
> > +* Prior to DP1.3 the bit represented by
> > +* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
> > +* If it is set DP_DPCD_REV at h could be at a value less than
> > +* the true capability of the panel. The only way to check is to
> > +* then compare h and 2200h.
> > +*/
> > + if (!(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> > + DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
> > + return 0;
> > +
> > + ret = drm_dp_dpcd_read(aux, DP_DP13_DPCD_REV, &dpcd_ext,
> > + sizeof(dpcd_ext));
> > + if (ret != sizeof(dpcd_ext))
> > + return -EIO;
> > +
> > + if (dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {
> > + DRM_DEBUG_KMS("%s: Extended DPCD rev less than base DPCD rev (%d
> > > %d)\n",
> > + aux->name, dpcd[DP_DPCD_REV],
> > + dpcd_ext[DP_DPCD_REV]);
>
> Might be a good opportunity to convert all of these to drm_dbg_dp()?
>
> > + return 0;
> > + }
> > +
> > + if (!memcmp(dpcd, dpcd_ext, sizeof(dpcd_ext)))
> > + return 0;
> > +
> > + DRM_DEBUG_KMS("%s: Base DPCD: %*ph\n",
> > + aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
> > +
> > + memcpy(dpcd, dpcd_ext, sizeof(dpcd_ext));
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * drm_dp_read_dpcd_caps() - read DPCD caps and extended DPCD caps if
> > + * available
> > + * @aux: DisplayPort AUX channel
> > + * @dpcd: Buffer to store the resulting DPCD in
> > + *
> > + * Attempts to read the base DPCD caps for @aux. Additionally, this
> > function
> > + * checks for and reads the extended DPRX caps (%DP_DP13_DPCD_REV) if
> > + * present.
> > + *
> > + * Returns: %0 if the DPCD was read successfully, negative error code
> > + * otherwise.
> > + */
> > +int drm_dp_read_dpcd_caps(struct drm_dp_aux *aux,
> > + u8 dpcd[DP_RECEIVER_CAP_SIZE])
> > +{
> > + int ret;
> > +
> > + ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
> > + if (ret != DP_RECEIVER_CAP_SIZE || dpcd[DP_DPCD_REV] == 0)
> > + return -EIO;
> > +
> > + ret = drm_dp_read_extended_dpcd_caps(aux, dpcd);
> > + if (ret < 0)
> > + return ret;
>
> I wonder if we should just go with the "regular" dpcd caps we just read in
> this
> case?
FWIW - we generally want to just abort on failed DPCD reads since if a device
doesn't implement a feature like this, it'll usually read all zeroes. Failed
DPCD reads are almost always just the result of something suddenly being
disconnected (excluding some cases I've seen on MST, but I think those more have
to do with us sending incorrect dpcd read/write requests...)
>
> Regardless of my nits,
>
> Reviewed-by: Sean Paul
>
> > +
> > + DRM_DEBUG_KMS("%s: DPCD: %*ph\n",
> > + aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
> > +
> > + if (dpcd[DP_DPCD_REV] == 0)
> > + ret = -EIO;
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL(drm_dp_read_dpcd_caps);
> > +
> > /**
> > * drm_dp_downstream_read_info() - read DPCD downstream port info if
> > available
> > * @aux: DisplayPort AUX channel
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index e343965a483df..230aa0360dc61 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4449,62 +4449,6 @@ intel_dp_link_down(
Re: [Intel-gfx] 5.9-rc1: graphics regression moved from -next to mainline
On Thu, Aug 20, 2020 at 2:23 AM Pavel Machek wrote: > > Yes, it seems they make things work. (Chris asked for new patch to be > tested, so I am switching to his kernel, but it survived longer than > it usually does.) Ok, so at worst we know how to solve it, at best the reverts won't be needed because Chris' patch will fix the issue properly. So I'll archive this thread, but remind me if this hasn't gotten sorted out in the later rc's. Linus ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps()
On Wed, 2020-08-19 at 11:29 -0400, Sean Paul wrote:
> On Tue, Aug 11, 2020 at 04:04:56PM -0400, Lyude Paul wrote:
> > Since DP 1.3, it's been possible for DP receivers to specify an
> > additional set of DPCD capabilities, which can take precedence over the
> > capabilities reported at DP_DPCD_REV.
> >
> > Basically any device supporting DP is going to need to read these in an
> > identical manner, in particular nouveau, so let's go ahead and just move
> > this code out of i915 into a shared DRM DP helper that we can use in
> > other drivers.
> >
> > Signed-off-by: Lyude Paul
> > ---
> > drivers/gpu/drm/drm_dp_helper.c | 76 +
> > drivers/gpu/drm/i915/display/intel_dp.c | 60 +---
> > drivers/gpu/drm/i915/display/intel_dp.h | 1 -
> > drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
> > include/drm/drm_dp_helper.h | 3 +
> > 5 files changed, 82 insertions(+), 60 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 0ff2959c8f8e8..f9445915c6c26 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -423,6 +423,82 @@ bool drm_dp_send_real_edid_checksum(struct drm_dp_aux
> > *aux,
> > }
> > EXPORT_SYMBOL(drm_dp_send_real_edid_checksum);
> >
> > +static int drm_dp_read_extended_dpcd_caps(struct drm_dp_aux *aux,
> > + u8 dpcd[DP_RECEIVER_CAP_SIZE])
> > +{
> > + u8 dpcd_ext[6];
> > + int ret;
> > +
> > + /*
> > +* Prior to DP1.3 the bit represented by
> > +* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
> > +* If it is set DP_DPCD_REV at h could be at a value less than
> > +* the true capability of the panel. The only way to check is to
> > +* then compare h and 2200h.
> > +*/
> > + if (!(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> > + DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
> > + return 0;
> > +
> > + ret = drm_dp_dpcd_read(aux, DP_DP13_DPCD_REV, &dpcd_ext,
> > + sizeof(dpcd_ext));
> > + if (ret != sizeof(dpcd_ext))
> > + return -EIO;
> > +
> > + if (dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {
> > + DRM_DEBUG_KMS("%s: Extended DPCD rev less than base DPCD rev (%d
> > > %d)\n",
> > + aux->name, dpcd[DP_DPCD_REV],
> > + dpcd_ext[DP_DPCD_REV]);
>
> Might be a good opportunity to convert all of these to drm_dbg_dp()?
Oh also - thought about this as well, but this would be easier as a follow-up
patch since we'd want to add a backpointer to the original DRM device (not 100%
sure we can just determine the drm device parent from the aux device's parent)
>
> > + return 0;
> > + }
> > +
> > + if (!memcmp(dpcd, dpcd_ext, sizeof(dpcd_ext)))
> > + return 0;
> > +
> > + DRM_DEBUG_KMS("%s: Base DPCD: %*ph\n",
> > + aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
> > +
> > + memcpy(dpcd, dpcd_ext, sizeof(dpcd_ext));
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * drm_dp_read_dpcd_caps() - read DPCD caps and extended DPCD caps if
> > + * available
> > + * @aux: DisplayPort AUX channel
> > + * @dpcd: Buffer to store the resulting DPCD in
> > + *
> > + * Attempts to read the base DPCD caps for @aux. Additionally, this
> > function
> > + * checks for and reads the extended DPRX caps (%DP_DP13_DPCD_REV) if
> > + * present.
> > + *
> > + * Returns: %0 if the DPCD was read successfully, negative error code
> > + * otherwise.
> > + */
> > +int drm_dp_read_dpcd_caps(struct drm_dp_aux *aux,
> > + u8 dpcd[DP_RECEIVER_CAP_SIZE])
> > +{
> > + int ret;
> > +
> > + ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
> > + if (ret != DP_RECEIVER_CAP_SIZE || dpcd[DP_DPCD_REV] == 0)
> > + return -EIO;
> > +
> > + ret = drm_dp_read_extended_dpcd_caps(aux, dpcd);
> > + if (ret < 0)
> > + return ret;
>
> I wonder if we should just go with the "regular" dpcd caps we just read in
> this
> case?
>
> Regardless of my nits,
>
> Reviewed-by: Sean Paul
>
> > +
> > + DRM_DEBUG_KMS("%s: DPCD: %*ph\n",
> > + aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
> > +
> > + if (dpcd[DP_DPCD_REV] == 0)
> > + ret = -EIO;
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL(drm_dp_read_dpcd_caps);
> > +
> > /**
> > * drm_dp_downstream_read_info() - read DPCD downstream port info if
> > available
> > * @aux: DisplayPort AUX channel
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index e343965a483df..230aa0360dc61 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4449,62 +4449,6 @@ intel_dp_link_down(struct intel_encoder *encoder,
> > }
> > }
> >
> > -static void
> > -intel_dp_extended_receiver_capabilities(struct intel_dp *i
Re: [Intel-gfx] [PATCH 2/2] drm/virtio: Remove open-coded commit-tail function
On 19. 08. 20, 15:24, Gerd Hoffmann wrote: > On Wed, Aug 19, 2020 at 02:43:28PM +0200, Jiri Slaby wrote: >> On 09. 07. 20, 14:33, Daniel Vetter wrote: >>> Exactly matches the one in the helpers. >> >> It's not that exact. The order of modeset_enables and planes is >> different. And this causes a regression -- no fb in qemu. > > Does https://patchwork.freedesktop.org/patch/385980/ help? Yes, it does. thanks, -- js suse labs ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915/drrs: Disable DRRS when needed in fastsets
Changes in the configuration could cause PSR to be compatible and
enabled so driver must also be able to disable DRRS when doing
fastsets.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/173
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
Cc: Srinivas K
Cc: Hariom Pandey
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 84 +++-
drivers/gpu/drm/i915/display/intel_dp.h | 2 +
3 files changed, 71 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index de5b216561d8..ff05a852417c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4012,7 +4012,7 @@ static void intel_ddi_update_pipe_dp(struct
intel_atomic_state *state,
intel_psr_update(intel_dp, crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
- intel_edp_drrs_enable(intel_dp, crtc_state);
+ intel_edp_drrs_update(intel_dp, crtc_state);
intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 3bf50b1ae983..de2c9851395d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2576,9 +2576,9 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct
intel_dp *intel_dp,
}
static void
-intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
-struct intel_crtc_state *pipe_config,
-int output_bpp, bool constant_n)
+intel_dp_compute_drrs(struct intel_dp *intel_dp,
+ struct intel_crtc_state *pipe_config,
+ int output_bpp, bool constant_n)
{
struct intel_connector *intel_connector = intel_dp->attached_connector;
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -2586,8 +2586,8 @@ intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
/*
* DRRS and PSR can't be enable together, so giving preference to PSR
* as it allows more power-savings by complete shutting down display,
-* so to guarantee this, intel_dp_drrs_compute_config() must be called
-* after intel_psr_compute_config().
+* so to guarantee this, intel_dp_compute_drrs() must be called after
+* intel_psr_compute_config().
*/
if (pipe_config->has_psr)
return;
@@ -2688,8 +2688,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_dp_set_clock(encoder, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config);
- intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
-constant_n);
+ intel_dp_compute_drrs(intel_dp, pipe_config, output_bpp, constant_n);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config,
conn_state);
@@ -7736,6 +7735,15 @@ static void intel_dp_set_drrs_state(struct
drm_i915_private *dev_priv,
refresh_rate);
}
+static void
+intel_edp_drrs_enable_locked(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+ dev_priv->drrs.busy_frontbuffer_bits = 0;
+ dev_priv->drrs.dp = intel_dp;
+}
+
/**
* intel_edp_drrs_enable - init drrs struct if supported
* @intel_dp: DP struct
@@ -7752,19 +7760,34 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
return;
mutex_lock(&dev_priv->drrs.mutex);
+
if (dev_priv->drrs.dp) {
- drm_dbg_kms(&dev_priv->drm, "DRRS already enabled\n");
+ drm_warn(&dev_priv->drm, "DRRS already enabled\n");
goto unlock;
}
- dev_priv->drrs.busy_frontbuffer_bits = 0;
-
- dev_priv->drrs.dp = intel_dp;
+ intel_edp_drrs_enable_locked(intel_dp);
unlock:
mutex_unlock(&dev_priv->drrs.mutex);
}
+static void
+intel_edp_drrs_disable_locked(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+ if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
+ int refresh;
+
+ refresh =
drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode);
+ intel_dp_set_drrs_state(dev_priv, crtc_state, refresh);
+ }
+
+ dev_priv->drrs.dp = NULL;
+}
+
/**
* intel_edp_drrs_disable - Disable DRRS
* @intel_dp: DP struct
@@ -7785,16 +7808,45 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
return;
}
- if (dev_priv->drrs.refresh_rate_ty
[Intel-gfx] [PATCH 1/2] drm/i915: Compute has_drrs after compute has_psr
DRRS and PSR can't be enable together, so giving preference to PSR
as it allows more power-savings by complete shutting down display,
so to guarantee this, it should compute DRRS state after compute PSR.
Cc: Srinivas K
Cc: Hariom Pandey
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dp.c | 52 +++--
1 file changed, 31 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 79c27f91f42c..3bf50b1ae983 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct
intel_dp *intel_dp,
intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
}
+static void
+intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
+struct intel_crtc_state *pipe_config,
+int output_bpp, bool constant_n)
+{
+ struct intel_connector *intel_connector = intel_dp->attached_connector;
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+ /*
+* DRRS and PSR can't be enable together, so giving preference to PSR
+* as it allows more power-savings by complete shutting down display,
+* so to guarantee this, intel_dp_drrs_compute_config() must be called
+* after intel_psr_compute_config().
+*/
+ if (pipe_config->has_psr)
+ return;
+
+ if (!intel_connector->panel.downclock_mode ||
+ dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
+ return;
+
+ pipe_config->has_drrs = true;
+ intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
+ intel_connector->panel.downclock_mode->clock,
+ pipe_config->port_clock, &pipe_config->dp_m2_n2,
+ constant_n, pipe_config->fec_enable);
+}
+
int
intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
@@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
if (ret)
return ret;
- pipe_config->has_drrs = false;
if (!intel_dp_port_has_audio(dev_priv, port))
pipe_config->has_audio = false;
else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
@@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
&pipe_config->dp_m_n,
constant_n, pipe_config->fec_enable);
- if (intel_connector->panel.downclock_mode != NULL &&
- dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
- pipe_config->has_drrs = true;
- intel_link_compute_m_n(output_bpp,
- pipe_config->lane_count,
-
intel_connector->panel.downclock_mode->clock,
- pipe_config->port_clock,
- &pipe_config->dp_m2_n2,
- constant_n,
pipe_config->fec_enable);
- }
-
if (!HAS_DDI(dev_priv))
intel_dp_set_clock(encoder, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config);
+ intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
+constant_n);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config,
conn_state);
@@ -7730,16 +7748,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- if (!crtc_state->has_drrs) {
- drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
+ if (!crtc_state->has_drrs)
return;
- }
-
- if (dev_priv->psr.enabled) {
- drm_dbg_kms(&dev_priv->drm,
- "PSR enabled. Not enabling DRRS.\n");
- return;
- }
mutex_lock(&dev_priv->drrs.mutex);
if (dev_priv->drrs.dp) {
--
2.28.0
___
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Re: [Intel-gfx] [PATCH v6] drm/kmb: Add support for KeemBay Display
Hi Anitha.
On Mon, Aug 10, 2020 at 02:53:38PM -0700, Anitha Chrisanthus wrote:
> This is a basic KMS atomic modesetting display driver for KeemBay family of
> SOCs. Driver has no 2D or 3D graphics.It calls into the ADV bridge
> driver at the connector level.
>
> Single CRTC with LCD controller->mipi DSI-> ADV bridge
>
> Only 1080p resolution and single plane is supported at this time.
>
> v2: moved extern to .h, removed license text
> use drm_dev_init, upclassed dev_private, removed HAVE_IRQ.
>
> v3: Squashed all 59 commits to one
>
> v4: review changes from Sam Ravnborg
> renamed dev_p to kmb
> moved clocks under kmb_clock, consolidated clk initializations
> use drmm functions
> use DRM_GEM_CMA_DRIVER_OPS_VMAP
>
> v5: corrected spellings
> v6: corrected checkpatch warnings
I have asked a few persons to review, but they lack time at the moment.
So I will continue this monolouge of review feedback.
I had hoped to provide all feedback in a few itearations, but I continue
to find more stuff.
First part of this round is some feedback on plane stuff
Sam
> diff --git a/drivers/gpu/drm/kmb/kmb_plane.c b/drivers/gpu/drm/kmb/kmb_plane.c
> new file mode 100644
> index 000..31bcba0
> --- /dev/null
> +++ b/drivers/gpu/drm/kmb/kmb_plane.c
> @@ -0,0 +1,519 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright © 2018-2020 Intel Corporation
> + */
> +
> +#include
> +#include
> +#include
Not used I think.
> +#include
Not used I hope.
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "kmb_crtc.h"
> +#include "kmb_drv.h"
> +#include "kmb_plane.h"
> +#include "kmb_regs.h"
> +
> +struct layer_status plane_status[KMB_MAX_PLANES];
Embed plane_status in struct kmb_plane so you avoid an extra statically
allocated variable here. And it is then together with other relevant
data.
> +const u32 layer_irqs[] = {
> + LCD_INT_VL0,
> + LCD_INT_VL1,
> + LCD_INT_GL0,
> + LCD_INT_GL1
> +};
> +
> +static unsigned int check_pixel_format(struct drm_plane *plane, u32 format)
> +{
> + int i;
> +
> + for (i = 0; i < plane->format_count; i++) {
> + if (plane->format_types[i] == format)
> + return 0;
> + }
> + return -EINVAL;
> +}
> +
> +static int kmb_plane_atomic_check(struct drm_plane *plane,
> + struct drm_plane_state *state)
> +{
> + struct drm_framebuffer *fb;
> + int ret;
> +
> + fb = state->fb;
> + if (!fb || !state->crtc)
> + return 0;
> +
Should drm_atomic_helper_check_plane_state() be called here?
> + ret = check_pixel_format(plane, fb->format->format);
> + if (ret)
> + return ret;
> +
> + if (state->crtc_w > KMB_MAX_WIDTH || state->crtc_h > KMB_MAX_HEIGHT)
> + return -EINVAL;
> + if (state->crtc_w < KMB_MIN_WIDTH || state->crtc_h < KMB_MIN_HEIGHT)
> + return -EINVAL;
> + return 0;
> +}
> +
> +static void kmb_plane_atomic_disable(struct drm_plane *plane,
> + struct drm_plane_state *state)
> +{
> + struct kmb_plane *kmb_plane = to_kmb_plane(plane);
> + int plane_id = kmb_plane->id;
> +
> + switch (plane_id) {
> + case LAYER_0:
> + plane_status[plane_id].ctrl = LCD_CTRL_VL1_ENABLE;
> + break;
> + case LAYER_1:
> + plane_status[plane_id].ctrl = LCD_CTRL_VL2_ENABLE;
> + break;
> + case LAYER_2:
> + plane_status[plane_id].ctrl = LCD_CTRL_GL1_ENABLE;
> + break;
> + case LAYER_3:
> + plane_status[plane_id].ctrl = LCD_CTRL_GL2_ENABLE;
> + break;
> + }
> +
> + plane_status[plane_id].disable = true;
> +}
> +
> +unsigned int set_pixel_format(u32 format)
> +{
> + unsigned int val = 0;
> +
> + switch (format) {
> + /* planar formats */
> + case DRM_FORMAT_YUV444:
> + val = LCD_LAYER_FORMAT_YCBCR444PLAN | LCD_LAYER_PLANAR_STORAGE;
> + break;
> + case DRM_FORMAT_YVU444:
> + val = LCD_LAYER_FORMAT_YCBCR444PLAN | LCD_LAYER_PLANAR_STORAGE
> + | LCD_LAYER_CRCB_ORDER;
> + break;
> + case DRM_FORMAT_YUV422:
> + val = LCD_LAYER_FORMAT_YCBCR422PLAN | LCD_LAYER_PLANAR_STORAGE;
> + break;
> + case DRM_FORMAT_YVU422:
> + val = LCD_LAYER_FORMAT_YCBCR422PLAN | LCD_LAYER_PLANAR_STORAGE
> + | LCD_LAYER_CRCB_ORDER;
> + break;
> + case DRM_FORMAT_YUV420:
> + val = LCD_LAYER_FORMAT_YCBCR420PLAN | LCD_LAYER_PLANAR_STORAGE;
> + break;
> + case DRM_FORMAT_YVU420:
> + val = LCD_LAYER_FORMAT_YCBCR420PLAN | LCD_LAYER_PLANAR_STORAGE
> + | LCD_LAYER_CRCB_ORDER;
> + break;
> + case DRM_FORMAT_NV12:
> + val = LCD_LAYER_FORMAT
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr
== Series Details ==
Series: series starting with [1/2] drm/i915: Compute has_drrs after compute
has_psr
URL : https://patchwork.freedesktop.org/series/80866/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8910 -> Patchwork_18383
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/index.html
Known issues
Here are the changes found in Patchwork_18383 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar
issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-byt-j1900/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-byt-j1900/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
Possible fixes
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][5] ([i915#1372]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][7] ([i915#2203]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
Warnings
* igt@i915_module_load@reload:
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][10] ([i915#62] / [i915#92]) +1 similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@i915_module_l...@reload.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-x1275/igt@i915_module_l...@reload.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [SKIP][11] ([fdo#109271]) -> [DMESG-FAIL][12]
([i915#62])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
- fi-skl-6700k2: [INCOMPLETE][13] ([i915#151] / [i915#2203]) ->
[DMESG-WARN][14] ([i915#2203])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) ->
[DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2100]: https://gitlab.freedesktop.org/drm/intel/issues/2100
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (39 -> 34)
--
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-byt-clapper
Build changes
-
* Linux: CI_DRM_8910 -> Patchwork_18383
CI-20190529: 20190529
CI_DRM_8910: a300e6a7af948f4a89a1e4ca42e8d2ae0d580f4e @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5769: 4e5f76be680b65780204668e302026cf638decc9 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18383: 25180711e9ba9480a1e4035d71f78e1f291a5ed4 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
25180711e9ba drm/i915/drrs: Disable DRRS when
[Intel-gfx] [PATCH 1/4] drm/i915/perf: Ensure observation logic is not clock gated
From: Piotr Maciejewski
A clock gating switch can control if the performance monitoring and
observation logic is enaled or not. Ensure that we enable the clocks.
v2: Separate code from other patches (Lionel)
v3: Reset PMON enable when disabling perf to save power (Lionel)
v4: Use intel_uncore_rmw and REG_BIT (Chris)
Fixes: 00a7f0d7155c ("drm/i915/tgl: Add perf support on TGL")
Signed-off-by: Piotr Maciejewski
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 9 +
drivers/gpu/drm/i915/i915_reg.h | 2 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c6f6370283cf..a43bf4cd337a 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2493,6 +2493,12 @@ gen12_enable_metric_set(struct i915_perf_stream *stream,
(period_exponent <<
GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT))
: 0);
+ /*
+* Initialize Super Queue Internal Cnt Register
+* Set PMON Enable in order to collect valid metrics.
+*/
+ intel_uncore_rmw(uncore, GEN12_SQCNT1, 0, GEN12_SQCNT1_PMON_ENABLE);
+
/*
* Update all contexts prior writing the mux configurations as we need
* to make sure all slices/subslices are ON before writing to NOA
@@ -2552,6 +2558,9 @@ static void gen12_disable_metric_set(struct
i915_perf_stream *stream)
/* Make sure we disable noa to save power. */
intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
+
+ /* Reset PMON Enable to save power. */
+ intel_uncore_rmw(uncore, GEN12_SQCNT1, GEN12_SQCNT1_PMON_ENABLE, 0);
}
static void gen7_oa_enable(struct i915_perf_stream *stream)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ac691927e29d..a6a63303d3d5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -696,6 +696,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define OABUFFER_SIZE_16M (7 << 3)
#define GEN12_OA_TLB_INV_CR _MMIO(0xceec)
+#define GEN12_SQCNT1 _MMIO(0x8718)
+#define GEN12_SQCNT1_PMON_ENABLE REG_BIT(30)
/* Gen12 OAR unit */
#define GEN12_OAR_OACONTROL _MMIO(0x2960)
--
2.20.1
___
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[Intel-gfx] [PATCH 2/4] drm/i915/perf: Whitelist OA report trigger registers
OA reports can be triggered into the OA buffer by writing into the
OAREPORTTRIG registers. Whitelist the registers to allow non-privileged
user to trigger reports.
Whitelist registers only if perf_stream_paranoid is set to 0. In
i915_perf_open_ioctl, this setting is checked and the whitelist is
enabled accordingly. On closing the perf fd, the whitelist is removed.
This ensures that the access to the whitelist is gated by
perf_stream_paranoid.
v2:
- Move related change to this patch (Lionel)
- Bump up perf revision (Lionel)
v3: Pardon whitelisted registers for selftest (Umesh)
v4: Document supported gens for the feature (Lionel)
v5: Whitelist registers only if perf_stream_paranoid is set to 0 (Jon)
v6: Move oa whitelist array to i915_perf (Chris)
v7: Fix OA writing beyond the wal->list memory (CI)
v8: Protect write to engine whitelist registers
v9: (Umesh)
- Use uncore->lock to protect write to forcepriv regs
- In case wal->count falls to zero on _wa_remove, make sure you still
clear the registers. Remove wal->count check when applying whitelist.
Signed-off-by: Piotr Maciejewski
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 153 +-
drivers/gpu/drm/i915/gt/intel_workarounds.h | 7 +
.../gpu/drm/i915/gt/intel_workarounds_types.h | 5 +
drivers/gpu/drm/i915/i915_perf.c | 76 -
drivers/gpu/drm/i915/i915_perf_types.h| 5 +
5 files changed, 207 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index be5a4685c991..9fb2a40e00f4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -78,12 +78,23 @@ static void wa_init_start(struct i915_wa_list *wal, const
char *name, const char
#define WA_LIST_CHUNK (1 << 4)
+/*
+ * Some of the i915 code like perf OA tries to whitelist registers on demand.
+ * Such code adds to the wal->list, but that would not work because the list
+ * is compacted below by wa_init_finish. While _wa_add does have code to grow
+ * the list, it does not seem to take the compaction into consideration. Leave
+ * 8 entries free during the compaction until a better mechanism can be put in
+ * place.
+ */
+#define WA_LIST_DYNAMIC_ENTRIES 8
+
static void wa_init_finish(struct i915_wa_list *wal)
{
/* Trim unused entries. */
if (!IS_ALIGNED(wal->count, WA_LIST_CHUNK)) {
+ size_t size = wal->count + WA_LIST_DYNAMIC_ENTRIES;
struct i915_wa *list = kmemdup(wal->list,
- wal->count * sizeof(*list),
+ size * sizeof(*list),
GFP_KERNEL);
if (list) {
@@ -99,10 +110,50 @@ static void wa_init_finish(struct i915_wa_list *wal)
wal->wa_count, wal->name, wal->engine_name);
}
+static int _wa_index(struct i915_wa_list *wal, i915_reg_t reg)
+{
+ unsigned int addr = i915_mmio_reg_offset(reg);
+ int start = 0, end = wal->count;
+
+ /* addr and wal->list[].reg, both include the R/W flags */
+ while (start < end) {
+ int mid = start + (end - start) / 2;
+
+ if (i915_mmio_reg_offset(wal->list[mid].reg) < addr)
+ start = mid + 1;
+ else if (i915_mmio_reg_offset(wal->list[mid].reg) > addr)
+ end = mid;
+ else
+ return mid;
+ }
+
+ return -1;
+}
+
+static void _wa_remove(struct i915_wa_list *wal, i915_reg_t reg, u32 flags)
+{
+ int index;
+ struct i915_wa *wa = wal->list;
+
+ reg.reg |= flags;
+
+ index = _wa_index(wal, reg);
+ if (index < 0)
+ return;
+
+ memset(wa + index, 0, sizeof(*wa));
+
+ while (index < wal->count - 1) {
+ swap(wa[index], wa[index + 1]);
+ index++;
+ }
+
+ wal->count--;
+}
+
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
- unsigned int addr = i915_mmio_reg_offset(wa->reg);
- unsigned int start = 0, end = wal->count;
+ int index;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -124,30 +175,23 @@ static void _wa_add(struct i915_wa_list *wal, const
struct i915_wa *wa)
wal->list = list;
}
- while (start < end) {
- unsigned int mid = start + (end - start) / 2;
-
- if (i915_mmio_reg_offset(wal->list[mid].reg) < addr) {
- start = mid + 1;
- } else if (i915_mmio_reg_offset(wal->list[mid].reg) > addr) {
- end = mid;
- } else {
- wa_ = &wal->list[mid];
-
- if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
[Intel-gfx] [PATCH 3/4] drm/i915/perf: Whitelist OA counter and buffer registers
It is useful to have markers in the OA reports to identify triggered
reports. Whitelist some OA counters that can be used as markers.
A triggered report can be found faster if we can sample the HW tail and
head registers when the report was triggered. Whitelist OA buffer
specific registers.
v2:
- Bump up the perf revision (Lionel)
- Use indexing for counters (Lionel)
- Fix selftest for oa ticking register (Umesh)
v3: Pardon whitelisted registers for selftest (Umesh)
v4:
- Document whitelisted registers (Lionel)
- Fix live isolated whitelist for OA regs (Umesh)
v5:
- Free up whitelist slots. Remove GPU_TICKS and A20 counter (Piotr)
- Whitelist registers only if perf_stream_paranoid is set to 0 (Jon)
v6: Move oa whitelist array to i915_perf (Chris)
Signed-off-by: Piotr Maciejewski
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 18 +-
drivers/gpu/drm/i915/i915_reg.h | 8
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 7443654ef842..562154d3fd49 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1350,11 +1350,19 @@ free_noa_wait(struct i915_perf_stream *stream)
static struct i915_whitelist_reg gen9_oa_wl_regs[] = {
{ OAREPORTTRIG2, RING_FORCE_TO_NONPRIV_ACCESS_RW },
{ OAREPORTTRIG6, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+ { OA_PERF_COUNTER_A(18), RING_FORCE_TO_NONPRIV_ACCESS_RW |
+RING_FORCE_TO_NONPRIV_RANGE_4 },
+ { GEN8_OASTATUS, RING_FORCE_TO_NONPRIV_ACCESS_RD |
+RING_FORCE_TO_NONPRIV_RANGE_4 },
};
static struct i915_whitelist_reg gen12_oa_wl_regs[] = {
{ GEN12_OAG_OAREPORTTRIG2, RING_FORCE_TO_NONPRIV_ACCESS_RW },
{ GEN12_OAG_OAREPORTTRIG6, RING_FORCE_TO_NONPRIV_ACCESS_RW },
+ { GEN12_OAG_PERF_COUNTER_A(18), RING_FORCE_TO_NONPRIV_ACCESS_RW |
+ RING_FORCE_TO_NONPRIV_RANGE_4 },
+ { GEN12_OAG_OASTATUS, RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4 },
};
static void intel_engine_apply_oa_whitelist(struct i915_perf_stream *stream)
@@ -4511,8 +4519,16 @@ int i915_perf_ioctl_version(void)
*into the OA buffer. This applies only to gen8+. The feature can
*only be accessed if perf_stream_paranoid is set to 0 by privileged
*user.
+*
+* 7: Whitelist below OA registers for user to identify the location of
+*triggered reports in the OA buffer. This applies only to gen8+.
+*The feature can only be accessed if perf_stream_paranoid is set to
+*0 by privileged user.
+*
+*- OA buffer head/tail/status/buffer registers for read only
+*- OA counters A18, A19, A20 for read/write
*/
- return 6;
+ return 7;
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a6a63303d3d5..e40f6fc86a74 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -974,6 +974,14 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define OAREPORTTRIG8_NOA_SELECT_6_SHIFT24
#define OAREPORTTRIG8_NOA_SELECT_7_SHIFT28
+/* Performance counters registers */
+#define OA_PERF_COUNTER_A(idx) _MMIO(0x2800 + 8 * (idx))
+#define OA_PERF_COUNTER_A_UPPER(idx) _MMIO(0x2800 + 8 * (idx) + 4)
+
+/* Gen12 Performance counters registers */
+#define GEN12_OAG_PERF_COUNTER_A(idx) _MMIO(0xD980 + 8 * (idx))
+#define GEN12_OAG_PERF_COUNTER_A_UPPER(idx) _MMIO(0xD980 + 8 * (idx) + 4)
+
/* Same layout as OASTARTTRIGX */
#define GEN12_OAG_OASTARTTRIG1 _MMIO(0xd900)
#define GEN12_OAG_OASTARTTRIG2 _MMIO(0xd904)
--
2.20.1
___
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[Intel-gfx] [PATCH 0/4] Allow privileged user to map the OA buffer
Allow user to map the OA buffer and also trigger reports into it. CI fixes: v1: Fixes a memory corruption due to addition of OA whitelist on demand. v2: Spinlock when applying whitelist v3: Use uncore->lock. Do not check for wal->count when applying whitelist. v4: Refresh and rerun with newly added test (forked access). Tests: https://patchwork.freedesktop.org/series/80761/ Signed-off-by: Umesh Nerlige Ramappa Test-with: 20200818203547.24461-1-umesh.nerlige.rama...@intel.com Piotr Maciejewski (1): drm/i915/perf: Ensure observation logic is not clock gated Umesh Nerlige Ramappa (3): drm/i915/perf: Whitelist OA report trigger registers drm/i915/perf: Whitelist OA counter and buffer registers drm/i915/perf: Map OA buffer to user space for gen12 performance query drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 153 +--- drivers/gpu/drm/i915/gt/intel_workarounds.h | 7 + .../gpu/drm/i915/gt/intel_workarounds_types.h | 5 + drivers/gpu/drm/i915/i915_perf.c | 225 +- drivers/gpu/drm/i915/i915_perf_types.h| 5 + drivers/gpu/drm/i915/i915_reg.h | 10 + include/uapi/drm/i915_drm.h | 33 +++ 9 files changed, 402 insertions(+), 40 deletions(-) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/4] drm/i915/perf: Map OA buffer to user space for gen12 performance query
i915 used to support time based sampling mode which is good for overall
system monitoring, but is not enough for query mode used to measure a
single draw call or dispatch. Gen9-Gen11 are using current i915 perf
implementation for query, but Gen12+ requires a new approach for query
based on triggered reports within oa buffer.
Triggering reports into the OA buffer is achieved by writing into a
a trigger register. Optionally an unused counter/register is set with a
marker value such that a triggered report can be identified in the OA
buffer. Reports are usually triggered at the start and end of work that
is measured.
Since OA buffer is large and queries can be frequent, an efficient way
to look for triggered reports is required. By knowing the current head
and tail offsets into the OA buffer, it is easier to determine the
locality of the reports of interest.
Current perf OA interface does not expose head/tail information to the
user and it filters out invalid reports before sending data to user.
Also considering limited size of user buffer used during a query,
creating a 1:1 copy of the OA buffer at the user space added undesired
complexity.
The solution was to map the OA buffer to user space provided
(1) that it is accessed from a privileged user.
(2) OA report filtering is not used.
These 2 conditions would satisfy the safety criteria that the current
perf interface addresses.
To enable the query:
- Add an ioctl to expose head and tail to the user
- Add an ioctl to return size and offset of the OA buffer
- Map the OA buffer to the user space
v2:
- Improve commit message (Chris)
- Do not mmap based on gem object filp. Instead, use perf_fd and support
mmap syscall (Chris)
- Pass non-zero offset in mmap to enforce the right object is
mapped (Chris)
- Do not expose gpu_address (Chris)
- Verify start and length of vma for page alignment (Lionel)
- Move SQNTL config out (Lionel)
v3: (Chris)
- Omit redundant checks
- Return VM_FAULT_SIGBUS is old stream is closed
- Maintain reference counts to stream in vm_open and vm_close
- Use switch to identify object to be mapped
v4: Call kref_put on closing perf fd (Chris)
v5:
- Strip access to OA buffer from unprivileged child of a privileged
parent. Use VM_DONTCOPY
- Enforce MAP_PRIVATE by checking for VM_MAYSHARE
v6:
(Chris)
- Use len of -1 in unmap_mapping_range
- Don't use stream->oa_buffer.vma->obj in vm_fault_oa
- Use kernel block comment style
- do_mmap gets a reference to the file and puts it in do_munmap, so
no need to maintain a reference to i915_perf_stream. Hence, remove
vm_open/vm_close and stream->closed hooks/checks.
(Umesh)
- Do not allow mmap if SAMPLE_OA_REPORT is not set during
i915_perf_open_ioctl.
- Drop ioctl returning head/tail since this information is already
whitelisted. Remove hooks to read head register.
v7: (Chris)
- unmap before destroy
- change ioctl argument struct
v8: Documentation and more checks (Chris)
Signed-off-by: Piotr Maciejewski
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 2 +
drivers/gpu/drm/i915/i915_perf.c | 126 ++-
include/uapi/drm/i915_drm.h | 33 ++
4 files changed, 161 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index b23368529a40..7c4b9b0c334b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -204,7 +204,7 @@ compute_partial_view(const struct drm_i915_gem_object *obj,
return view;
}
-static vm_fault_t i915_error_to_vmf_fault(int err)
+vm_fault_t i915_error_to_vmf_fault(int err)
{
switch (err) {
default:
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index efee9e0d2508..1190a3a228ea 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -29,4 +29,6 @@ void i915_gem_object_release_mmap_gtt(struct
drm_i915_gem_object *obj);
void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
+vm_fault_t i915_error_to_vmf_fault(int err);
+
#endif
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 562154d3fd49..4335a12265fc 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -192,10 +192,12 @@
*/
#include
+#include
#include
#include
#include "gem/i915_gem_context.h"
+#include "gem/i915_gem_mman.h"
#include "gt/intel_engine_pm.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
@@ -3265,6 +3267,44 @@ static long i915_perf_config_locked(struct
i915_perf_stream *stream,
return ret;
}
+#define I915_PERF_OA_BUFFER_MMAP_OFFSET 1
+
+/**
+ * i915_perf_oa_buffer_info_locked - size and offset of the OA buffer
+ * @stream: i915 perf stream
+ * @cmd: ioctl command
[Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup
Use PRI[du]64 as necessary for 32bit builds.
Signed-off-by: Chris Wilson
---
tests/i915/perf.c| 8
tools/i915-perf/i915_perf_recorder.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 92edc9f1f..a894fd382 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -2077,7 +2077,7 @@ test_blocking(uint64_t requested_oa_period, bool
set_kernel_hrtimer, uint64_t ke
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d blocking reads during test with %lu Hz OA sampling
(expect no more than %d)\n",
+ igt_debug("%d blocking reads during test with %"PRIu64" Hz OA sampling
(expect no more than %d)\n",
n, NSEC_PER_SEC / oa_period, max_iterations);
igt_debug("%d extra iterations seen, not related to periodic sampling
(e.g. context switches)\n",
n_extra_iterations);
@@ -2265,7 +2265,7 @@ test_polling(uint64_t requested_oa_period, bool
set_kernel_hrtimer, uint64_t ker
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d non-blocking reads during test with %lu Hz OA sampling
(expect no more than %d)\n",
+ igt_debug("%d non-blocking reads during test with %"PRIu64" Hz OA
sampling (expect no more than %d)\n",
n, NSEC_PER_SEC / oa_period, max_iterations);
igt_debug("%d extra iterations seen, not related to periodic sampling
(e.g. context switches)\n",
n_extra_iterations);
@@ -2357,7 +2357,7 @@ num_valid_reports_captured(struct
drm_i915_perf_open_param *param,
int64_t start, end;
int num_reports = 0;
- igt_debug("Expected duration = %lu\n", *duration_ns);
+ igt_debug("Expected duration = %"PRId64"\n", *duration_ns);
stream_fd = __perf_open(drm_fd, param, true);
@@ -2389,7 +2389,7 @@ num_valid_reports_captured(struct
drm_i915_perf_open_param *param,
*duration_ns = end - start;
- igt_debug("Actual duration = %lu\n", *duration_ns);
+ igt_debug("Actual duration = %"PRIu64"\n", *duration_ns);
return num_reports;
}
diff --git a/tools/i915-perf/i915_perf_recorder.c
b/tools/i915-perf/i915_perf_recorder.c
index 7671f39b4..adc41c29f 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -1001,7 +1001,7 @@ main(int argc, char *argv[])
}
ctx.oa_exponent = oa_exponent_for_period(ctx.timestamp_frequency,
perf_period);
- fprintf(stdout, "Opening perf stream with metric_id=%lu
oa_exponent=%u\n",
+ fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64"
oa_exponent=%u\n",
ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent);
ctx.perf_fd = perf_open(&ctx);
--
2.28.0
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[Intel-gfx] [PATCH i-g-t 4/4] i915/gem_exec_alignment: 32b printf cleanups
PRIu64 to the rescue!
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_alignment.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_alignment.c b/tests/i915/gem_exec_alignment.c
index 17a14bef4..7bbd2a8fc 100644
--- a/tests/i915/gem_exec_alignment.c
+++ b/tests/i915/gem_exec_alignment.c
@@ -204,7 +204,7 @@ naughty_child(int i915, int link, uint32_t shared, unsigned
int flags)
execbuf.buffer_count =
create_batch(i915, obj, execbuf.buffer_count, count, flags);
gem_execbuf(i915, &execbuf);
- igt_debug("Created %lu buffers ready for delay\n", count);
+ igt_debug("Created %"PRIu64" buffers ready for delay\n", count);
/* Calibrate a long execbuf() */
memset(&tv, 0, sizeof(tv));
--
2.28.0
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[Intel-gfx] [PATCH i-g-t 2/4] i915/gem_exec_fence: Cleanup 32bit printfs
Use PRI[ux]64 for printing 64bit values in a 32bit build.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_fence.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index b240c30bf..0b8ab1400 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -2408,7 +2408,7 @@ static void build_wait_bb(struct inter_engine_context
*context,
uint64_t wait_value =
0x - (delay * timestamp_frequency) /
NSEC_PER_SEC;
- igt_debug("wait_value=0x%lx\n", wait_value);
+ igt_debug("wait_value=0x%"PRIx64"\n", wait_value);
*bb++ = MI_LOAD_REGISTER_IMM;
*bb++ = 0x2000 + HSW_CS_GPR(0);
@@ -2680,7 +2680,7 @@ static void setup_timeline_chain_engines(struct
inter_engine_context *context, i
}
for (uint32_t i = 0; i < 10; i++)
- igt_debug("%u = %lu\n", i, fib(i));
+ igt_debug("%u = %"PRIu64"\n", i, fib(i));
/* Bootstrap the fibonacci sequence */
{
@@ -2759,7 +2759,7 @@ static void test_syncobj_timeline_chain_engines(int fd,
struct intel_engine_data
counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0,
4096, PROT_READ);
for (uint32_t i = 0; i < ctx.engines->nengines; i++)
- igt_debug("engine %i (%s)\t= %016lx\n", i,
+ igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
ctx.engines->engines[i].name, counter_output[i]);
/*
@@ -2825,7 +2825,7 @@ static void
test_syncobj_stationary_timeline_chain_engines(int fd, struct intel_
counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0,
4096, PROT_READ);
for (uint32_t i = 0; i < ctx.engines->nengines; i++)
- igt_debug("engine %i (%s)\t= %016lx\n", i,
+ igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
ctx.engines->engines[i].name, counter_output[i]);
igt_assert_eq(counter_output[engines->nengines - 1],
fib(ARRAY_SIZE(ctx.iterations) * engines->nengines + 1));
@@ -2886,7 +2886,7 @@ static void
test_syncobj_backward_timeline_chain_engines(int fd, struct intel_en
counter_output = gem_mmap__wc(fd, ctx.engine_counter_object.handle, 0,
4096, PROT_READ);
for (uint32_t i = 0; i < ctx.engines->nengines; i++)
- igt_debug("engine %i (%s)\t= %016lx\n", i,
+ igt_debug("engine %i (%s)\t= %016"PRIx64"\n", i,
ctx.engines->engines[i].name, counter_output[i]);
igt_assert_eq(counter_output[engines->nengines - 1],
fib(ARRAY_SIZE(ctx.iterations) * engines->nengines + 1));
--
2.28.0
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[Intel-gfx] [PATCH i-g-t 3/4] i915/bb: Cleanup 32bit printfs
Use PRIx64 for 64b addresses on a 32b build.
Signed-off-by: Chris Wilson
---
tests/i915/api_intel_bb.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
index 6967fc5d0..cf7f6e91b 100644
--- a/tests/i915/api_intel_bb.c
+++ b/tests/i915/api_intel_bb.c
@@ -260,9 +260,9 @@ static void blit(struct buf_ops *bops,
poff_bb = intel_bb_get_object_offset(ibb, ibb->handle);
poff_src = intel_bb_get_object_offset(ibb, src->handle);
poff_dst = intel_bb_get_object_offset(ibb, dst->handle);
- igt_debug("bb presumed offset: 0x%lx\n", poff_bb);
- igt_debug("src presumed offset: 0x%lx\n", poff_src);
- igt_debug("dst presumed offset: 0x%lx\n", poff_dst);
+ igt_debug("bb presumed offset: 0x%"PRIx64"\n", poff_bb);
+ igt_debug("src presumed offset: 0x%"PRIx64"\n", poff_src);
+ igt_debug("dst presumed offset: 0x%"PRIx64"\n", poff_dst);
if (reloc_obj == RELOC) {
igt_assert(poff_bb == 0);
igt_assert(poff_src == 0);
@@ -289,12 +289,12 @@ static void blit(struct buf_ops *bops,
poff2_dst = intel_bb_get_object_offset(ibb, dst->handle);
igt_debug("purge: %d, relocs: %d\n", purge_cache, do_relocs);
- igt_debug("bb presumed offset: 0x%lx\n", poff_bb);
- igt_debug("src presumed offset: 0x%lx\n", poff_src);
- igt_debug("dst presumed offset: 0x%lx\n", poff_dst);
- igt_debug("bb2 presumed offset: 0x%lx\n", poff2_bb);
- igt_debug("src2 presumed offset: 0x%lx\n", poff2_src);
- igt_debug("dst2 presumed offset: 0x%lx\n", poff2_dst);
+ igt_debug("bb presumed offset: 0x%"PRIx64"\n", poff_bb);
+ igt_debug("src presumed offset: 0x%"PRIx64"\n", poff_src);
+ igt_debug("dst presumed offset: 0x%"PRIx64"\n", poff_dst);
+ igt_debug("bb2 presumed offset: 0x%"PRIx64"\n", poff2_bb);
+ igt_debug("src2 presumed offset: 0x%"PRIx64"\n", poff2_src);
+ igt_debug("dst2 presumed offset: 0x%"PRIx64"\n", poff2_dst);
if (purge_cache) {
if (do_relocs) {
igt_assert(poff2_bb == 0);
--
2.28.0
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[Intel-gfx] ✓ Fi.CI.BAT: success for Allow privileged user to map the OA buffer
== Series Details ==
Series: Allow privileged user to map the OA buffer
URL : https://patchwork.freedesktop.org/series/80868/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8910 -> Patchwork_18384
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/index.html
Known issues
Here are the changes found in Patchwork_18384 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload:
- fi-apl-guc: [PASS][1] -> [DMESG-WARN][2] ([i915#1635] /
[i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-apl-guc/igt@i915_module_l...@reload.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-apl-guc/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-icl-y: [PASS][3] -> [INCOMPLETE][4] ([i915#2276])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-icl-y/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-icl-y/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_lrc:
- fi-tgl-u2: [PASS][5] -> [DMESG-FAIL][6] ([i915#2373])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-tgl-u2/igt@i915_selftest@live@gt_lrc.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-tgl-u2/igt@i915_selftest@live@gt_lrc.html
Possible fixes
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][7] ([i915#1372]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][9] ([i915#2203]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
Warnings
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92]) ->
[DMESG-WARN][12] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6700k2: [INCOMPLETE][13] ([i915#151] / [i915#2203]) ->
[DMESG-WARN][14] ([i915#2203])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) ->
[DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2100]: https://gitlab.freedesktop.org/drm/intel/issues/2100
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
[i915#2373]: https://gitlab.freedesktop.org/drm/intel/issues/2373
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (39 -> 34)
--
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-byt-clapper
Build changes
-
* IGT: IGT_5769 -> IGTPW_4889
* Linux: CI_DRM_8910 -> Patchwork_18384
CI-20190529: 20190529
CI_DRM_8910: a300e6a7af948f4a89a1e4ca42e8d2ae0d580f4e @
git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4889: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4889/index.html
IGT_5769: 4e5f76be680b65780204668e302026cf638decc9 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18384: 28e1b2c371eb95c397670bc26977a5316db0e82
[Intel-gfx] [RFC v2 05/20] drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new()
Since fa3cdf8d0b09 ("drm/nouveau: Reset MST branching unit before
enabling") we've been clearing DP_MST_CTRL before we start enabling MST.
Since then clearing DP_MST_CTRL in nv50_mstm_new() has been unnecessary
and redundant, so let's remove it.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index e7874877da858..c4d138f0ca054 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1535,17 +1535,6 @@ nv50_mstm_new(struct nouveau_encoder *outp, struct
drm_dp_aux *aux, int aux_max,
struct drm_device *dev = outp->base.base.dev;
struct nv50_mstm *mstm;
int ret;
- u8 dpcd;
-
- /* This is a workaround for some monitors not functioning
-* correctly in MST mode on initial module load. I think
-* some bad interaction with the VBIOS may be responsible.
-*
-* A good ol' off and on again seems to work here ;)
-*/
- ret = drm_dp_dpcd_readb(aux, DP_DPCD_REV, &dpcd);
- if (ret >= 0 && dpcd >= 0x12)
- drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0);
if (!(mstm = *pmstm = kzalloc(sizeof(*mstm), GFP_KERNEL)))
return -ENOMEM;
--
2.26.2
___
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[Intel-gfx] [RFC v2 10/20] drm/nouveau/kms: Use new drm_dp_has_mst() helper for checking MST caps
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_dp.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 032afc73e2a33..201c0b4335563 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -44,7 +44,6 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
struct nv50_mstm *mstm = NULL;
int ret;
u8 *dpcd = outp->dp.dpcd;
- u8 tmp;
ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
if (ret == DP_RECEIVER_CAP_SIZE && dpcd[DP_DPCD_REV]) {
@@ -56,19 +55,10 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
*nv_connector,
return connector_status_disconnected;
}
- if (nouveau_mst)
+ if (nouveau_mst) {
mstm = outp->dp.mstm;
-
- if (mstm) {
- if (dpcd[DP_DPCD_REV] >= DP_DPCD_REV_12) {
- ret = drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &tmp);
- if (ret < 0)
- return connector_status_disconnected;
-
- mstm->can_mst = !!(tmp & DP_MST_CAP);
- } else {
- mstm->can_mst = false;
- }
+ if (mstm)
+ mstm->can_mst = drm_dp_has_mst(aux, dpcd);
}
return connector_status_connected;
--
2.26.2
___
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[Intel-gfx] [RFC v2 13/20] drm/i915/dp: Extract drm_dp_downstream_read_info()
We're going to be doing the same probing process in nouveau for
determining downstream DP port capabilities, so let's deduplicate the
work by moving i915's code for handling this into a shared helper:
drm_dp_downstream_read_info().
Note that when we do this, we also do make some functional changes while
we're at it:
* We always clear the downstream port info before trying to read it,
just to make things easier for the caller
* We skip reading downstream port info if the DPCD indicates that we
don't support downstream port info
* We only read as many bytes as needed for the reported number of
downstream ports, no sense in reading the whole thing every time
v2:
* Fixup logic for calculating the downstream port length to account for
the fact that downstream port caps can be either 1 byte or 4 bytes
long. We can actually skip fixing the max_clock/max_bpc helpers here
since they all check for DP_DETAILED_CAP_INFO_AVAILABLE anyway.
* Fix ret code check for drm_dp_dpcd_read
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_helper.c | 46 +
drivers/gpu/drm/i915/display/intel_dp.c | 14 ++--
include/drm/drm_dp_helper.h | 3 ++
3 files changed, 51 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 4c21cf69dad5a..4f845995f1f66 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -423,6 +423,52 @@ bool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux,
}
EXPORT_SYMBOL(drm_dp_send_real_edid_checksum);
+static u8 drm_dp_downstream_port_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ u8 port_count = dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_PORT_COUNT_MASK;
+
+ if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DETAILED_CAP_INFO_AVAILABLE &&
port_count > 4)
+ port_count = 4;
+
+ return port_count;
+}
+
+/**
+ * drm_dp_downstream_read_info() - read DPCD downstream port info if available
+ * @aux: DisplayPort AUX channel
+ * @dpcd: A cached copy of the port's DPCD
+ * @downstream_ports: buffer to store the downstream port info in
+ *
+ * Returns: 0 if either the downstream port info was read successfully or
+ * there was no downstream info to read, or a negative error code otherwise.
+ */
+int drm_dp_downstream_read_info(struct drm_dp_aux *aux,
+ const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])
+{
+ int ret;
+ u8 len;
+
+ memset(downstream_ports, 0, DP_MAX_DOWNSTREAM_PORTS);
+
+ /* No downstream info to read */
+ if (!drm_dp_is_branch(dpcd) ||
+ dpcd[DP_DPCD_REV] < DP_DPCD_REV_10 ||
+ !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT))
+ return 0;
+
+ len = drm_dp_downstream_port_count(dpcd);
+ if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DETAILED_CAP_INFO_AVAILABLE)
+ len *= 4;
+
+ ret = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, downstream_ports,
len);
+ if (ret < 0)
+ return ret;
+
+ return ret == len ? 0 : -EIO;
+}
+EXPORT_SYMBOL(drm_dp_downstream_read_info);
+
/**
* drm_dp_downstream_max_clock() - extract branch device max
* pixel rate for legacy VGA
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 1e29d3a012856..984e49194ca31 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4685,18 +4685,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
return false;
}
- if (!drm_dp_is_branch(intel_dp->dpcd))
- return true; /* native DP sink */
-
- if (intel_dp->dpcd[DP_DPCD_REV] == 0x10)
- return true; /* no per-port downstream info */
-
- if (drm_dp_dpcd_read(&intel_dp->aux, DP_DOWNSTREAM_PORT_0,
-intel_dp->downstream_ports,
-DP_MAX_DOWNSTREAM_PORTS) < 0)
- return false; /* downstream port status fetch failed */
-
- return true;
+ return drm_dp_downstream_read_info(&intel_dp->aux, intel_dp->dpcd,
+ intel_dp->downstream_ports) == 0;
}
static bool
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 5c28199248626..1349f16564ace 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1613,6 +1613,9 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
bool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux,
u8 real_edid_checksum);
+int drm_dp_downstream_read_info(struct drm_dp_aux *aux,
+ const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]);
int drm_dp_downstream_max_clock(const u8 dpcd[DP_REC
[Intel-gfx] [RFC v2 03/20] drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c
Since this actually logs accesses, we should probably always be using
this imho…
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_dp.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index c4e9c21d4dd2b..8db9216d52c69 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -42,16 +42,12 @@ nouveau_dp_detect(struct nouveau_connector *nv_connector,
{
struct drm_device *dev = nv_encoder->base.base.dev;
struct nouveau_drm *drm = nouveau_drm(dev);
- struct nvkm_i2c_aux *aux;
- u8 dpcd[8];
+ struct drm_dp_aux *aux = &nv_connector->aux;
+ u8 dpcd[DP_RECEIVER_CAP_SIZE];
int ret;
- aux = nv_encoder->aux;
- if (!aux)
- return -ENODEV;
-
- ret = nvkm_rdaux(aux, DP_DPCD_REV, dpcd, sizeof(dpcd));
- if (ret)
+ ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
+ if (ret != sizeof(dpcd))
return ret;
nv_encoder->dp.link_bw = 27000 * dpcd[1];
--
2.26.2
___
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[Intel-gfx] [RFC v2 14/20] drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation
This adds support for querying the maximum clock rate of a downstream
port on a DisplayPort connection. Generally, downstream ports refer to
active dongles which can have their own pixel clock limits.
Note as well, we also start marking the connector as disconnected if we
can't read the DPCD, since we wouldn't be able to do anything without
DPCD access anyway.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +++
drivers/gpu/drm/nouveau/nouveau_dp.c | 15 +++
drivers/gpu/drm/nouveau/nouveau_encoder.h | 1 +
3 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 0d6879c532bec..c33b026c1f43f 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1257,7 +1257,10 @@ nv50_mstc_detect(struct drm_connector *connector,
ret = drm_dp_mst_detect_port(connector, ctx, mstc->port->mgr,
mstc->port);
+ if (ret != connector_status_connected)
+ goto out;
+out:
pm_runtime_mark_last_busy(connector->dev->dev);
pm_runtime_put_autosuspend(connector->dev->dev);
return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 71d095409c90d..c200f197083f9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -61,6 +61,11 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
mstm->can_mst = drm_dp_has_mst(aux, dpcd);
}
+ ret = drm_dp_downstream_read_info(aux, dpcd,
+ outp->dp.downstream_ports);
+ if (ret < 0)
+ return connector_status_disconnected;
+
return connector_status_connected;
}
@@ -176,8 +181,6 @@ void nouveau_dp_irq(struct nouveau_drm *drm,
/* TODO:
* - Use the minimum possible BPC here, once we add support for the max bpc
* property.
- * - Validate the mode against downstream port caps (see
- * drm_dp_downstream_max_clock())
* - Validate against the DP caps advertised by the GPU (we don't check these
* yet)
*/
@@ -188,15 +191,19 @@ nv50_dp_mode_valid(struct drm_connector *connector,
unsigned *out_clock)
{
const unsigned min_clock = 25000;
- unsigned max_clock, clock;
+ unsigned max_clock, ds_clock, clock;
enum drm_mode_status ret;
if (mode->flags & DRM_MODE_FLAG_INTERLACE && !outp->caps.dp_interlace)
return MODE_NO_INTERLACE;
max_clock = outp->dp.link_nr * outp->dp.link_bw;
- clock = mode->clock * (connector->display_info.bpc * 3) / 10;
+ ds_clock = drm_dp_downstream_max_clock(outp->dp.dpcd,
+ outp->dp.downstream_ports);
+ if (ds_clock)
+ max_clock = min(max_clock, ds_clock);
+ clock = mode->clock * (connector->display_info.bpc * 3) / 10;
ret = nouveau_conn_mode_clock_valid(mode, min_clock, max_clock,
&clock);
if (out_clock)
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h
b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index eef4643f5f982..c1924a4529a7b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -72,6 +72,7 @@ struct nouveau_encoder {
struct mutex hpd_irq_lock;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
+ u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
struct drm_dp_desc desc;
} dp;
};
--
2.26.2
___
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[Intel-gfx] [RFC v2 01/20] drm/nouveau/kms: Fix some indenting in nouveau_dp_detect()
Signed-off-by: Lyude Paul Reviewed-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_dp.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index 8a0f7994e1aeb..ee778ddc95fae 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -76,10 +76,10 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder) nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK; NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n", -nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]); +nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]); NV_DEBUG(drm, "encoder: %dx%d\n", -nv_encoder->dcb->dpconf.link_nr, -nv_encoder->dcb->dpconf.link_bw); +nv_encoder->dcb->dpconf.link_nr, +nv_encoder->dcb->dpconf.link_bw); if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr) nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr; @@ -87,7 +87,7 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder) nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw; NV_DEBUG(drm, "maximum: %dx%d\n", -nv_encoder->dp.link_nr, nv_encoder->dp.link_bw); +nv_encoder->dp.link_nr, nv_encoder->dp.link_bw); nouveau_dp_probe_oui(dev, aux, dpcd); -- 2.26.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC v2 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code is just really unoptimized in general: * We handle connector probing in the same context that we handle short IRQs in for DP, which means connector probing could potentially block ESI handling for MST * When we receive a hotplug event from a connector, we reprobe every single connector instead of just the connector that was hotplugged * Additionally because of the above reason, combined with the fact I had the bad idea of reusing some of the MST locks when I last rewrote nouveau's DP MST detection, trying to handle any other events that require short HPD IRQs is a bit awkward to actually implement. * We don't actually properly check whether EDIDs change or not when reprobing, which means we basically send out a hotplug event every single time we receive one even if nothing has changed Additionally, the code for handling DP that we have in nouveau is also quite unoptimized in general, doesn't use a lot of helpers that have been added since it was written, and is also missing quite a number of features: * Downstream port capability probing * Extended DPRX cap parsing * SINK_COUNT handling for hpd on dongles Luckily for us - all of these are implemented in i915 already. Since there's no reason for us to reinvent the wheel, and having more shared code is always nice, I decided to take the opportunity to extract the code for all of these features from i915 into a set of core DP helpers, which both i915 and nouveau (and hopefully other drivers in the future) can use. As well, this patch series also addesses the other general connector probing related issues I mentioned above, along with rewriting how we handle MST probing so we don't hit any surprise locking design issues in the future. As a note - most of this work is motivated by the fact that I'm planning on adding max_bpc/output_bpc prop support, DSC support (for both MST and SST, along with proper helpers for handling bandwidth limitations and DSC), and fallback link retraining. I figured I might as clean this code up and implement missing DP features like the ones mentioned here before moving on to those tasks. Also, I'm intending for this patch series to get merged through drm-misc-next. Once that happens, upstream maintainers will probably have an easier time with merging if they pull the pending patches for nouveau from Ben's tree before merging drm-misc-next. Lyude Paul (20): drm/nouveau/kms: Fix some indenting in nouveau_dp_detect() drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc() drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c drm/nouveau/kms/nv50-: Use macros for DP registers in nouveau_dp.c drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new() drm/nouveau/kms: Search for encoders' connectors properly drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in nv50_sor_disable() drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling drm/i915/dp: Extract drm_dp_has_mst() drm/nouveau/kms: Use new drm_dp_has_mst() helper for checking MST caps drm/nouveau/kms: Move drm_dp_cec_unset_edid() into nouveau_connector_detect() drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths drm/i915/dp: Extract drm_dp_downstream_read_info() drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation drm/i915/dp: Extract drm_dp_has_sink_count() drm/i915/dp: Extract drm_dp_get_sink_count() drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT drm/nouveau/kms: Don't change EDID when it hasn't actually changed drm/i915/dp: Extract drm_dp_read_dpcd_caps() drm/nouveau/kms: Start using drm_dp_read_dpcd_caps() drivers/gpu/drm/drm_dp_helper.c | 167 +++ drivers/gpu/drm/i915/display/intel_dp.c | 124 ++-- drivers/gpu/drm/i915/display/intel_dp.h | 1 - drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +- drivers/gpu/drm/nouveau/dispnv04/dac.c | 2 +- drivers/gpu/drm/nouveau/dispnv04/dfp.c | 7 +- drivers/gpu/drm/nouveau/dispnv04/disp.c | 24 +- drivers/gpu/drm/nouveau/dispnv04/disp.h | 4 + drivers/gpu/drm/nouveau/dispnv04/tvnv04.c | 2 +- drivers/gpu/drm/nouveau/dispnv04/tvnv17.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 306 +++- drivers/gpu/drm/nouveau/nouveau_connector.c | 132 - drivers/gpu/drm/nouveau/nouveau_connector.h | 1 + drivers/gpu/drm/nouveau/nouveau_display.c | 72 - drivers/gpu/d
[Intel-gfx] [RFC v2 06/20] drm/nouveau/kms: Search for encoders' connectors properly
While the way we find the associated connector for an encoder is just
fine for legacy modesetting, it's not correct for nv50+ since that uses
atomic modesetting. For reference, see the drm_encoder kdocs.
Fix this by removing nouveau_encoder_connector_get(), and replacing it
with nv04_encoder_get_connector(), nv50_outp_get_old_connector(), and
nv50_outp_get_new_connector().
v2:
* Don't line-wrap for_each_(old|new)_connector_in_state in
nv50_outp_get_(old|new)_connector() - sravn
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/dispnv04/dac.c | 2 +-
drivers/gpu/drm/nouveau/dispnv04/dfp.c | 7 +-
drivers/gpu/drm/nouveau/dispnv04/disp.c | 18 +
drivers/gpu/drm/nouveau/dispnv04/disp.h | 4 +
drivers/gpu/drm/nouveau/dispnv04/tvnv04.c | 2 +-
drivers/gpu/drm/nouveau/dispnv04/tvnv17.c | 2 +-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 85 +
drivers/gpu/drm/nouveau/nouveau_connector.c | 14
drivers/gpu/drm/nouveau/nouveau_encoder.h | 6 +-
9 files changed, 103 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dac.c
b/drivers/gpu/drm/nouveau/dispnv04/dac.c
index ffdd447d87068..22d10f3285597 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/dac.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/dac.c
@@ -419,7 +419,7 @@ static void nv04_dac_commit(struct drm_encoder *encoder)
helper->dpms(encoder, DRM_MODE_DPMS_ON);
NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n",
-nouveau_encoder_connector_get(nv_encoder)->base.name,
+nv04_encoder_get_connector(nv_encoder)->base.name,
nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
}
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
index f9f4482c79b54..42687ea2a4ca3 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
@@ -184,7 +184,8 @@ static bool nv04_dfp_mode_fixup(struct drm_encoder *encoder,
struct drm_display_mode *adjusted_mode)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
- struct nouveau_connector *nv_connector =
nouveau_encoder_connector_get(nv_encoder);
+ struct nouveau_connector *nv_connector =
+ nv04_encoder_get_connector(nv_encoder);
if (!nv_connector->native_mode ||
nv_connector->scaling_mode == DRM_MODE_SCALE_NONE ||
@@ -478,7 +479,7 @@ static void nv04_dfp_commit(struct drm_encoder *encoder)
helper->dpms(encoder, DRM_MODE_DPMS_ON);
NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n",
-nouveau_encoder_connector_get(nv_encoder)->base.name,
+nv04_encoder_get_connector(nv_encoder)->base.name,
nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
}
@@ -591,7 +592,7 @@ static void nv04_dfp_restore(struct drm_encoder *encoder)
if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) {
struct nouveau_connector *connector =
- nouveau_encoder_connector_get(nv_encoder);
+ nv04_encoder_get_connector(nv_encoder);
if (connector && connector->native_mode)
call_lvds_script(dev, nv_encoder->dcb, head,
diff --git a/drivers/gpu/drm/nouveau/dispnv04/disp.c
b/drivers/gpu/drm/nouveau/dispnv04/disp.c
index 900ab69df7e8f..3f046b917c85c 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/disp.c
@@ -35,6 +35,24 @@
#include
+struct nouveau_connector *
+nv04_encoder_get_connector(struct nouveau_encoder *encoder)
+{
+ struct drm_device *dev = to_drm_encoder(encoder)->dev;
+ struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
+ struct nouveau_connector *nv_connector = NULL;
+
+ drm_connector_list_iter_begin(dev, &conn_iter);
+ drm_for_each_connector_iter(connector, &conn_iter) {
+ if (connector->encoder == to_drm_encoder(encoder))
+ nv_connector = nouveau_connector(connector);
+ }
+ drm_connector_list_iter_end(&conn_iter);
+
+ return nv_connector;
+}
+
static void
nv04_display_fini(struct drm_device *dev, bool suspend)
{
diff --git a/drivers/gpu/drm/nouveau/dispnv04/disp.h
b/drivers/gpu/drm/nouveau/dispnv04/disp.h
index 495d3284e8766..5ace5e906949a 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/disp.h
+++ b/drivers/gpu/drm/nouveau/dispnv04/disp.h
@@ -6,6 +6,8 @@
#include "nouveau_display.h"
+struct nouveau_encoder;
+
enum nv04_fp_display_regs {
FP_DISPLAY_END,
FP_TOTAL,
@@ -93,6 +95,8 @@ nv04_display(struct drm_device *dev)
/* nv04_display.c */
int nv04_display_create(struct drm_device *);
+struct nouveau_connector *
+nv04_encoder_get_connector(struct nouveau_encoder *nv_encoder);
/* nv04_crtc.c */
int nv04_crtc_create(struct drm_d
[Intel-gfx] [RFC v2 07/20] drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in nv50_sor_disable()
Just use drm_dp_dpcd_(readb|writeb)() so we get automatic DPCD logging
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 57102e1a173bc..75005268941b9 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1629,19 +1629,22 @@ nv50_sor_disable(struct drm_encoder *encoder,
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
+ struct nouveau_connector *nv_connector =
+ nv50_outp_get_old_connector(nv_encoder, state);
nv_encoder->crtc = NULL;
if (nv_crtc) {
- struct nvkm_i2c_aux *aux = nv_encoder->aux;
+ struct drm_dp_aux *aux = &nv_connector->aux;
u8 pwr;
- if (aux) {
- int ret = nvkm_rdaux(aux, DP_SET_POWER, &pwr, 1);
+ if (nv_encoder->dcb->type == DCB_OUTPUT_DP) {
+ int ret = drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr);
+
if (ret == 0) {
pwr &= ~DP_SET_POWER_MASK;
pwr |= DP_SET_POWER_D3;
- nvkm_wraux(aux, DP_SET_POWER, &pwr, 1);
+ drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr);
}
}
--
2.26.2
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[Intel-gfx] [RFC v2 04/20] drm/nouveau/kms/nv50-: Use macros for DP registers in nouveau_dp.c
No functional changes. Signed-off-by: Lyude Paul Reviewed-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_dp.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index 8db9216d52c69..4030806e3522b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -50,11 +50,13 @@ nouveau_dp_detect(struct nouveau_connector *nv_connector, if (ret != sizeof(dpcd)) return ret; - nv_encoder->dp.link_bw = 27000 * dpcd[1]; - nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK; + nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE]; + nv_encoder->dp.link_nr = + dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n", -nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]); +nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, +dpcd[DP_DPCD_REV]); NV_DEBUG(drm, "encoder: %dx%d\n", nv_encoder->dcb->dpconf.link_nr, nv_encoder->dcb->dpconf.link_bw); -- 2.26.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC v2 12/20] drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths
Currently we perform both short IRQ handling for DP, and connector
reprobing in the HPD IRQ handler. However since we need to grab
connection_mutex in order to reprobe a connector, in theory we could
accidentally block ourselves from handling any short IRQs until after a
modeset completes if a connector hotplug happens to occur in parallel
with a modeset.
I haven't seen this actually happen yet, but since we're cleaning up
nouveau's hotplug handling code anyway and we already have a hpd worker,
we can simply fix this by only relying on the HPD worker to actually
reprobe connectors when we receive a HPD IRQ. We also add a mask to
nouveau_drm to keep track of which connectors are waiting to be reprobed
in response to an HPD IRQ.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_connector.c | 42 +
drivers/gpu/drm/nouveau/nouveau_connector.h | 1 +
drivers/gpu/drm/nouveau/nouveau_display.c | 70 ++---
drivers/gpu/drm/nouveau/nouveau_display.h | 1 +
drivers/gpu/drm/nouveau/nouveau_dp.c| 2 +-
drivers/gpu/drm/nouveau/nouveau_drm.c | 4 +-
drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +
7 files changed, 86 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 4a29f691c08e4..637e91594fbe8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -1138,6 +1138,20 @@ nouveau_connector_funcs_lvds = {
.early_unregister = nouveau_connector_early_unregister,
};
+void
+nouveau_connector_hpd(struct drm_connector *connector)
+{
+ struct nouveau_drm *drm = nouveau_drm(connector->dev);
+ u32 mask = drm_connector_mask(connector);
+
+ mutex_lock(&drm->hpd_lock);
+ if (!(drm->hpd_pending & mask)) {
+ drm->hpd_pending |= mask;
+ schedule_work(&drm->hpd_work);
+ }
+ mutex_unlock(&drm->hpd_lock);
+}
+
static int
nouveau_connector_hotplug(struct nvif_notify *notify)
{
@@ -1147,8 +1161,6 @@ nouveau_connector_hotplug(struct nvif_notify *notify)
struct drm_device *dev = connector->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
const struct nvif_notify_conn_rep_v0 *rep = notify->data;
- const char *name = connector->name;
- int ret;
bool plugged = (rep->mask != NVIF_NOTIFY_CONN_V0_UNPLUG);
if (rep->mask & NVIF_NOTIFY_CONN_V0_IRQ) {
@@ -1156,31 +1168,9 @@ nouveau_connector_hotplug(struct nvif_notify *notify)
return NVIF_NOTIFY_KEEP;
}
- ret = pm_runtime_get(drm->dev->dev);
- if (ret == 0) {
- /* We can't block here if there's a pending PM request
-* running, as we'll deadlock nouveau_display_fini() when it
-* calls nvif_put() on our nvif_notify struct. So, simply
-* defer the hotplug event until the device finishes resuming
-*/
- NV_DEBUG(drm, "Deferring HPD on %s until runtime resume\n",
-name);
- schedule_work(&drm->hpd_work);
-
- pm_runtime_put_noidle(drm->dev->dev);
- return NVIF_NOTIFY_KEEP;
- } else if (ret != 1 && ret != -EACCES) {
- NV_WARN(drm, "HPD on %s dropped due to RPM failure: %d\n",
- name, ret);
- return NVIF_NOTIFY_DROP;
- }
-
- NV_DEBUG(drm, "%splugged %s\n", plugged ? "" : "un", name);
-
- drm_helper_hpd_irq_event(connector->dev);
+ NV_DEBUG(drm, "%splugged %s\n", plugged ? "" : "un", connector->name);
+ nouveau_connector_hpd(connector);
- pm_runtime_mark_last_busy(drm->dev->dev);
- pm_runtime_put_autosuspend(drm->dev->dev);
return NVIF_NOTIFY_KEEP;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h
b/drivers/gpu/drm/nouveau/nouveau_connector.h
index d6de5cb8e2238..d0b859c4a80ea 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.h
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.h
@@ -187,6 +187,7 @@ nouveau_crtc_connector_get(struct nouveau_crtc *nv_crtc)
struct drm_connector *
nouveau_connector_create(struct drm_device *, const struct dcb_output *);
+void nouveau_connector_hpd(struct drm_connector *connector);
extern int nouveau_tv_disable;
extern int nouveau_ignorelid;
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 13016769a194b..bceb48a2dfca6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -457,16 +457,70 @@ static struct nouveau_drm_prop_enum_list dither_depth[] =
{
} \
} while(0)
+void
+nouveau_display_hpd_resume(struct drm_device *dev)
+{
+ struct nouveau_drm *drm = nouveau_drm(dev);
+
+ mutex_lock(&drm->hpd_lock);
+
[Intel-gfx] [RFC v2 20/20] drm/nouveau/kms: Start using drm_dp_read_dpcd_caps()
Now that we've extracted i915's code for reading both the normal DPCD
caps and extended DPCD caps into a shared helper, let's start using this
in nouveau to enable us to start checking extended DPCD caps for free.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_dp.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 89afc97ee2591..271a0a863a0e1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -55,15 +55,13 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
*nv_connector,
int ret;
u8 *dpcd = outp->dp.dpcd;
- ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
- if (ret == DP_RECEIVER_CAP_SIZE && dpcd[DP_DPCD_REV]) {
- ret = drm_dp_read_desc(aux, &outp->dp.desc,
- drm_dp_is_branch(dpcd));
- if (ret < 0)
- goto out;
- } else {
+ ret = drm_dp_read_dpcd_caps(aux, dpcd);
+ if (ret < 0)
+ goto out;
+
+ ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd));
+ if (ret < 0)
goto out;
- }
if (nouveau_mst) {
mstm = outp->dp.mstm;
--
2.26.2
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[Intel-gfx] [RFC v2 18/20] drm/nouveau/kms: Don't change EDID when it hasn't actually changed
Currently in nouveau_connector_ddc_detect() and
nouveau_connector_detect_lvds(), we start the connector probing process
by releasing the previous EDID and informing DRM of the change. However,
since commit 5186421cbfe2 ("drm: Introduce epoch counter to
drm_connector") drm_connector_update_edid_property() actually checks
whether the new EDID we've specified is different from the previous one,
and updates the connector's epoch accordingly if it is. But, because we
always set the EDID to NULL first in nouveau_connector_ddc_detect() and
nouveau_connector_detect_lvds() we end up making DRM think that the EDID
changes every single time we do a connector probe - which isn't needed.
So, let's fix this by not clearing the EDID at the start of the
connector probing process, and instead simply changing or removing it
once near the end of the probing process. This will help prevent us from
sending unneeded hotplug events to userspace when nothing has actually
changed.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_connector.c | 54 ++---
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 637e91594fbe8..49dd0cbc332ff 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -528,6 +528,17 @@ nouveau_connector_set_encoder(struct drm_connector
*connector,
}
}
+static void
+nouveau_connector_set_edid(struct nouveau_connector *nv_connector,
+ struct edid *edid)
+{
+ struct edid *old_edid = nv_connector->edid;
+
+ drm_connector_update_edid_property(&nv_connector->base, edid);
+ kfree(old_edid);
+ nv_connector->edid = edid;
+}
+
static enum drm_connector_status
nouveau_connector_detect(struct drm_connector *connector, bool force)
{
@@ -541,13 +552,6 @@ nouveau_connector_detect(struct drm_connector *connector,
bool force)
int ret;
enum drm_connector_status conn_status = connector_status_disconnected;
- /* Cleanup the previous EDID block. */
- if (nv_connector->edid) {
- drm_connector_update_edid_property(connector, NULL);
- kfree(nv_connector->edid);
- nv_connector->edid = NULL;
- }
-
/* Outputs are only polled while runtime active, so resuming the
* device here is unnecessary (and would deadlock upon runtime suspend
* because it waits for polling to finish). We do however, want to
@@ -560,22 +564,23 @@ nouveau_connector_detect(struct drm_connector *connector,
bool force)
ret = pm_runtime_get_sync(dev->dev);
if (ret < 0 && ret != -EACCES) {
pm_runtime_put_autosuspend(dev->dev);
+ nouveau_connector_set_edid(nv_connector, NULL);
return conn_status;
}
}
nv_encoder = nouveau_connector_ddc_detect(connector);
if (nv_encoder && (i2c = nv_encoder->i2c) != NULL) {
+ struct edid *new_edid;
+
if ((vga_switcheroo_handler_flags() &
VGA_SWITCHEROO_CAN_SWITCH_DDC) &&
nv_connector->type == DCB_CONNECTOR_LVDS)
- nv_connector->edid = drm_get_edid_switcheroo(connector,
-i2c);
+ new_edid = drm_get_edid_switcheroo(connector, i2c);
else
- nv_connector->edid = drm_get_edid(connector, i2c);
+ new_edid = drm_get_edid(connector, i2c);
- drm_connector_update_edid_property(connector,
- nv_connector->edid);
+ nouveau_connector_set_edid(nv_connector, new_edid);
if (!nv_connector->edid) {
NV_ERROR(drm, "DDC responded, but no EDID for %s\n",
connector->name);
@@ -609,6 +614,8 @@ nouveau_connector_detect(struct drm_connector *connector,
bool force)
conn_status = connector_status_connected;
drm_dp_cec_set_edid(&nv_connector->aux, nv_connector->edid);
goto out;
+ } else {
+ nouveau_connector_set_edid(nv_connector, NULL);
}
nv_encoder = nouveau_connector_of_detect(connector);
@@ -652,18 +659,12 @@ nouveau_connector_detect_lvds(struct drm_connector
*connector, bool force)
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_connector *nv_connector = nouveau_connector(connector);
struct nouveau_encoder *nv_encoder = NULL;
+ struct edid *edid = NULL;
enum drm_connector_status status = connector_status_disconnected;
- /* Cleanup the previous EDID block. */
- if (nv_connector->edid) {
- drm_
[Intel-gfx] [RFC v2 09/20] drm/i915/dp: Extract drm_dp_has_mst()
Just a tiny drive-by cleanup, we can consolidate i915's code for
checking for MST support into a helper to be shared across drivers.
Signed-off-by: Lyude Paul
Reviewed-by: Sean Paul
---
drivers/gpu/drm/i915/display/intel_dp.c | 18 ++
include/drm/drm_dp_mst_helper.h | 22 ++
2 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 79c27f91f42c0..1e29d3a012856 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4699,20 +4699,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
return true;
}
-static bool
-intel_dp_sink_can_mst(struct intel_dp *intel_dp)
-{
- u8 mstm_cap;
-
- if (intel_dp->dpcd[DP_DPCD_REV] < 0x12)
- return false;
-
- if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1)
- return false;
-
- return mstm_cap & DP_MST_CAP;
-}
-
static bool
intel_dp_can_mst(struct intel_dp *intel_dp)
{
@@ -4720,7 +4706,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
return i915->params.enable_dp_mst &&
intel_dp->can_mst &&
- intel_dp_sink_can_mst(intel_dp);
+ drm_dp_has_mst(&intel_dp->aux, intel_dp->dpcd);
}
static void
@@ -4729,7 +4715,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_encoder *encoder =
&dp_to_dig_port(intel_dp)->base;
- bool sink_can_mst = intel_dp_sink_can_mst(intel_dp);
+ bool sink_can_mst = drm_dp_has_mst(&intel_dp->aux, intel_dp->dpcd);
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s\n",
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 8b9eb4db3381c..2d8983a713e8c 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -911,4 +911,26 @@ __drm_dp_mst_state_iter_get(struct drm_atomic_state *state,
for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
NULL, &(new_state), (__i)))
+/**
+ * drm_dp_has_mst() - check whether or not a sink supports MST
+ * @aux: The DP AUX channel to use
+ * @dpcd: A cached copy of the DPCD capabilities for this sink
+ *
+ * Returns: %True if the sink supports MST, %false otherwise
+ */
+static inline bool
+drm_dp_has_mst(struct drm_dp_aux *aux,
+ const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ u8 mstm_cap;
+
+ if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
+ return false;
+
+ if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
+ return false;
+
+ return !!(mstm_cap & DP_MST_CAP);
+}
+
#endif
--
2.26.2
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[Intel-gfx] [RFC v2 08/20] drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling
First some backstory here: Currently, we keep track of whether or not
we've enabled MST or not by trying to piggy-back off the MST helpers.
This means that in order to check whether MST is enabled or not, we
actually need to grab drm_dp_mst_topology_mgr.lock.
Back when I originally wrote this, I did this piggy-backing with the
intention that I'd eventually be teaching our MST helpers how to recover
when an MST device has stopped responding, which in turn would require
the MST helpers having a way of disabling MST independently of the
driver. Note that this was before I reworked locking in the MST helpers,
so at the time we were sticking random things under &mgr->lock - which
grabbing this lock was meant to protect against.
This never came to fruition because doing such a reset safely turned out
to be a lot more painful and impossible then it sounds, and also just
risks us working around issues with our MST handlers that should be
properly fixed instead. Even if it did though, simply calling
drm_dp_mst_topology_mgr_set_mst() from the MST helpers (with the
exception of when we're tearing down our MST managers, that's always OK)
wouldn't have been a bad idea, since drivers like nouveau and i915 need
to do their own book keeping immediately after disabling MST.
So-implementing that would likely require adding a hook for
helper-triggered MST disables anyway.
So, fast forward to now - we want to start adding support for all of the
miscellaneous bits of the DP protocol (for both SST and MST) we're
missing before moving on to supporting more complicated features like
supporting different BPP values on MST, DSC, etc. Since many of these
features only exist on SST and make use of DP HPD IRQs, we want to be
able to atomically check whether we're servicing an MST IRQ or SST IRQ
in nouveau_connector_hotplug(). Currently we literally don't do this at
all, and just handle any kind of possible DP IRQ we could get including
ESIs - even if MST isn't actually enabled.
This would be very complicated and difficult to fix if we need to hold
&mgr->lock while handling SST IRQs to ensure that the MST topology
state doesn't change under us. What we really want here is to do our own
tracking of whether MST is enabled or not, similar to drivers like i915,
and define our own locking order to decomplicate things and avoid
hitting locking issues in the future.
So, let's do this by refactoring our MST probing/enabling code to use
our own MST bookkeeping, along with adding a lock for protecting DP
state that needs to be checked outside of our connector probing
functions. While we're at it, we also remove a bunch of unneeded steps
we perform when probing/enabling MST:
* Enabling bits in MSTM_CTRL before calling drm_dp_mst_topology_mgr_set_mst().
I don't think these ever actually did anything, since the nvif methods
for enabling MST don't actually do anything DPCD related and merely
indicate to nvkm that we've turned on MST.
* Checking the MSTM_CTRL bit is intact when checking the state of an
enabled MST topology in nv50_mstm_detect(). I just added this to be safe
originally, but now that we try reading the DPCD when probing DP
connectors it shouldn't be needed as that will abort our hotplug probing
if the device was removed well before we start checking for MST..
* All of the duplicate DPCD version checks.
This leaves us with much nicer looking code, a much more sensible
locking scheme, and an easy way of checking whether MST is enabled or
not for handling DP HPD IRQs.
v2:
* Get rid of accidental newlines
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/dispnv04/disp.c | 6 +-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 196 +---
drivers/gpu/drm/nouveau/nouveau_connector.c | 14 +-
drivers/gpu/drm/nouveau/nouveau_display.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_display.h | 2 +-
drivers/gpu/drm/nouveau/nouveau_dp.c| 132 +++--
drivers/gpu/drm/nouveau/nouveau_encoder.h | 33 +++-
7 files changed, 245 insertions(+), 140 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/disp.c
b/drivers/gpu/drm/nouveau/dispnv04/disp.c
index 3f046b917c85c..3ee836dc5058f 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/disp.c
@@ -54,8 +54,9 @@ nv04_encoder_get_connector(struct nouveau_encoder *encoder)
}
static void
-nv04_display_fini(struct drm_device *dev, bool suspend)
+nv04_display_fini(struct drm_device *dev, bool runtime, bool suspend)
{
+ struct nouveau_drm *drm = nouveau_drm(dev);
struct nv04_display *disp = nv04_display(dev);
struct drm_crtc *crtc;
@@ -67,6 +68,9 @@ nv04_display_fini(struct drm_device *dev, bool suspend)
if (nv_two_heads(dev))
NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
+ if (!runtime)
+ cancel_work_sync(&drm->hpd_work);
+
if (!suspend)
return;
diff --git a/drivers/gpu/drm/nouv
[Intel-gfx] [RFC v2 11/20] drm/nouveau/kms: Move drm_dp_cec_unset_edid() into nouveau_connector_detect()
For whatever reason we currently unset the EDID for DP CEC support when responding to the connector being unplugged, instead of just doing it in nouveau_connector_detect() where we set the CEC EDID. This isn't really needed and could even potentially cause us to forget to unset the EDID if the connector is removed without a corresponding hpd event, so let's fix that. Signed-off-by: Lyude Paul Reviewed-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_connector.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index b90591114faaf..4a29f691c08e4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -633,10 +633,11 @@ nouveau_connector_detect(struct drm_connector *connector, bool force) conn_status = connector_status_connected; goto out; } - } out: + if (!nv_connector->edid) + drm_dp_cec_unset_edid(&nv_connector->aux); pm_runtime_mark_last_busy(dev->dev); pm_runtime_put_autosuspend(dev->dev); @@ -1174,8 +1175,6 @@ nouveau_connector_hotplug(struct nvif_notify *notify) return NVIF_NOTIFY_DROP; } - if (!plugged) - drm_dp_cec_unset_edid(&nv_connector->aux); NV_DEBUG(drm, "%splugged %s\n", plugged ? "" : "un", name); drm_helper_hpd_irq_event(connector->dev); -- 2.26.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC v2 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps()
Since DP 1.3, it's been possible for DP receivers to specify an
additional set of DPCD capabilities, which can take precedence over the
capabilities reported at DP_DPCD_REV.
Basically any device supporting DP is going to need to read these in an
identical manner, in particular nouveau, so let's go ahead and just move
this code out of i915 into a shared DRM DP helper that we can use in
other drivers.
v2:
* Remove redundant dpcd[DP_DPCD_REV] == 0 check
* Fix drm_dp_dpcd_read() ret checks
Signed-off-by: Lyude Paul
Reviewed-by: Sean Paul
---
drivers/gpu/drm/drm_dp_helper.c | 77 +
drivers/gpu/drm/i915/display/intel_dp.c | 60 +---
drivers/gpu/drm/i915/display/intel_dp.h | 1 -
drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
include/drm/drm_dp_helper.h | 3 +
5 files changed, 83 insertions(+), 60 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 67ad05eb05b7e..9c99d21b42c15 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -433,6 +433,83 @@ static u8 drm_dp_downstream_port_count(const u8
dpcd[DP_RECEIVER_CAP_SIZE])
return port_count;
}
+static int drm_dp_read_extended_dpcd_caps(struct drm_dp_aux *aux,
+ u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ u8 dpcd_ext[6];
+ int ret;
+
+ /*
+* Prior to DP1.3 the bit represented by
+* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
+* If it is set DP_DPCD_REV at h could be at a value less than
+* the true capability of the panel. The only way to check is to
+* then compare h and 2200h.
+*/
+ if (!(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+ DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
+ return 0;
+
+ ret = drm_dp_dpcd_read(aux, DP_DP13_DPCD_REV, &dpcd_ext,
+ sizeof(dpcd_ext));
+ if (ret < 0)
+ return ret;
+ if (ret != sizeof(dpcd_ext))
+ return -EIO;
+
+ if (dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {
+ DRM_DEBUG_KMS("%s: Extended DPCD rev less than base DPCD rev
(%d > %d)\n",
+ aux->name, dpcd[DP_DPCD_REV],
+ dpcd_ext[DP_DPCD_REV]);
+ return 0;
+ }
+
+ if (!memcmp(dpcd, dpcd_ext, sizeof(dpcd_ext)))
+ return 0;
+
+ DRM_DEBUG_KMS("%s: Base DPCD: %*ph\n",
+ aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
+
+ memcpy(dpcd, dpcd_ext, sizeof(dpcd_ext));
+
+ return 0;
+}
+
+/**
+ * drm_dp_read_dpcd_caps() - read DPCD caps and extended DPCD caps if
+ * available
+ * @aux: DisplayPort AUX channel
+ * @dpcd: Buffer to store the resulting DPCD in
+ *
+ * Attempts to read the base DPCD caps for @aux. Additionally, this function
+ * checks for and reads the extended DPRX caps (%DP_DP13_DPCD_REV) if
+ * present.
+ *
+ * Returns: %0 if the DPCD was read successfully, negative error code
+ * otherwise.
+ */
+int drm_dp_read_dpcd_caps(struct drm_dp_aux *aux,
+ u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ int ret;
+
+ ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
+ if (ret < 0)
+ return ret;
+ if (ret != DP_RECEIVER_CAP_SIZE || dpcd[DP_DPCD_REV] == 0)
+ return -EIO;
+
+ ret = drm_dp_read_extended_dpcd_caps(aux, dpcd);
+ if (ret < 0)
+ return ret;
+
+ DRM_DEBUG_KMS("%s: DPCD: %*ph\n",
+ aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
+
+ return ret;
+}
+EXPORT_SYMBOL(drm_dp_read_dpcd_caps);
+
/**
* drm_dp_downstream_read_info() - read DPCD downstream port info if available
* @aux: DisplayPort AUX channel
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 4337321a3be4f..fb7872e2a0b93 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4449,62 +4449,6 @@ intel_dp_link_down(struct intel_encoder *encoder,
}
}
-static void
-intel_dp_extended_receiver_capabilities(struct intel_dp *intel_dp)
-{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- u8 dpcd_ext[6];
-
- /*
-* Prior to DP1.3 the bit represented by
-* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
-* if it is set DP_DPCD_REV at h could be at a value less than
-* the true capability of the panel. The only way to check is to
-* then compare h and 2200h.
-*/
- if (!(intel_dp->dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
- DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
- return;
-
- if (drm_dp_dpcd_read(&intel_dp->aux, DP_DP13_DPCD_REV,
-&dpcd_ext, sizeof(dpcd_ext)) != sizeof(dpcd_ext)) {
- drm_err(&i915->drm,
-
[Intel-gfx] [RFC v2 15/20] drm/i915/dp: Extract drm_dp_has_sink_count()
Since other drivers are also going to need to be aware of the sink count
in order to do proper dongle detection, we might as well steal i915's
DP_SINK_COUNT helpers and move them into DRM helpers so that other
dirvers can use them as well.
Note that this also starts using intel_dp_has_sink_count() in
intel_dp_detect_dpcd(), which is a functional change.
Signed-off-by: Lyude Paul
Reviewed-by: Sean Paul
---
drivers/gpu/drm/drm_dp_helper.c | 22 ++
drivers/gpu/drm/i915/display/intel_dp.c | 21 -
include/drm/drm_dp_helper.h | 8 +++-
3 files changed, 41 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 4f845995f1f66..863e0babc1903 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -714,6 +714,28 @@ void drm_dp_set_subconnector_property(struct drm_connector
*connector,
}
EXPORT_SYMBOL(drm_dp_set_subconnector_property);
+/**
+ * drm_dp_has_sink_count() - Check whether a given connector has a valid sink
+ * count
+ * @connector: The DRM connector to check
+ * @dpcd: A cached copy of the connector's DPCD RX capabilities
+ * @desc: A cached copy of the connector's DP descriptor
+ *
+ * Returns: %True if the (e)DP connector has a valid sink count that should
+ * be probed, %false otherwise.
+ */
+bool drm_dp_has_sink_count(struct drm_connector *connector,
+ const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const struct drm_dp_desc *desc)
+{
+ /* Some eDP panels don't set a valid value for the sink count */
+ return connector->connector_type != DRM_MODE_CONNECTOR_eDP &&
+ dpcd[DP_DPCD_REV] >= DP_DPCD_REV_11 &&
+ dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT &&
+ !drm_dp_has_quirk(desc, 0, DP_DPCD_QUIRK_NO_SINK_COUNT);
+}
+EXPORT_SYMBOL(drm_dp_has_sink_count);
+
/*
* I2C-over-AUX implementation
*/
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 984e49194ca31..35a4779a442e2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4634,6 +4634,16 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
return true;
}
+static bool
+intel_dp_has_sink_count(struct intel_dp *intel_dp)
+{
+ if (!intel_dp->attached_connector)
+ return false;
+
+ return drm_dp_has_sink_count(&intel_dp->attached_connector->base,
+intel_dp->dpcd,
+&intel_dp->desc);
+}
static bool
intel_dp_get_dpcd(struct intel_dp *intel_dp)
@@ -4653,13 +4663,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
intel_dp_set_common_rates(intel_dp);
}
- /*
-* Some eDP panels do not set a valid value for sink count, that is why
-* it don't care about read it here and in intel_edp_init_dpcd().
-*/
- if (!intel_dp_is_edp(intel_dp) &&
- !drm_dp_has_quirk(&intel_dp->desc, 0,
- DP_DPCD_QUIRK_NO_SINK_COUNT)) {
+ if (intel_dp_has_sink_count(intel_dp)) {
u8 count;
ssize_t r;
@@ -5939,9 +5943,8 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
return connector_status_connected;
/* If we're HPD-aware, SINK_COUNT changes dynamically */
- if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
+ if (intel_dp_has_sink_count(intel_dp) &&
intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) {
-
return intel_dp->sink_count ?
connector_status_connected : connector_status_disconnected;
}
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1349f16564ace..a1413a531eaf4 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1631,6 +1631,11 @@ void drm_dp_set_subconnector_property(struct
drm_connector *connector,
const u8 *dpcd,
const u8 port_cap[4]);
+struct drm_dp_desc;
+bool drm_dp_has_sink_count(struct drm_connector *connector,
+ const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+ const struct drm_dp_desc *desc);
+
void drm_dp_remote_aux_init(struct drm_dp_aux *aux);
void drm_dp_aux_init(struct drm_dp_aux *aux);
int drm_dp_aux_register(struct drm_dp_aux *aux);
@@ -1689,7 +1694,8 @@ enum drm_dp_quirk {
* @DP_DPCD_QUIRK_NO_SINK_COUNT:
*
* The device does not set SINK_COUNT to a non-zero value.
-* The driver should ignore SINK_COUNT during detection.
+* The driver should ignore SINK_COUNT during detection. Note that
+* drm_dp_has_sink_count() automatically checks for this quirk.
*/
DP_DPCD_QUIRK_NO_SINK_COUNT,
/**
--
2.26.2
___
[Intel-gfx] [RFC v2 17/20] drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT
This is another bit that we never implemented for nouveau: dongle
detection. When a "dongle", e.g. an active display adaptor, is hooked up
to the system and causes an HPD to be fired, we don't actually know
whether or not there's anything plugged into the dongle without checking
the sink count. As a result, plugging in a dongle without anything
plugged into it currently results in a bogus EDID retrieval error in the kernel
log.
Additionally, most dongles won't send another long HPD signal if the
user suddenly plugs something in, they'll only send a short HPD IRQ with
the expectation that the source will check the sink count and reprobe
the connector if it's changed - something we don't actually do. As a
result, nothing will happen if the user plugs the dongle in before
plugging something into the dongle.
So, let's fix this by checking the sink count in both
nouveau_dp_probe_dpcd() and nouveau_dp_irq(), and reprobing the
connector if things change.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_dp.c | 54 ---
drivers/gpu/drm/nouveau/nouveau_encoder.h | 2 +
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index c200f197083f9..89afc97ee2591 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -36,12 +36,22 @@ MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream
(default: enabled)");
static int nouveau_mst = 1;
module_param_named(mst, nouveau_mst, int, 0400);
+static bool
+nouveau_dp_has_sink_count(struct drm_connector *connector,
+ struct nouveau_encoder *outp)
+{
+ return drm_dp_has_sink_count(connector, outp->dp.dpcd,
+&outp->dp.desc);
+}
+
static enum drm_connector_status
nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
struct nouveau_encoder *outp)
{
+ struct drm_connector *connector = &nv_connector->base;
struct drm_dp_aux *aux = &nv_connector->aux;
struct nv50_mstm *mstm = NULL;
+ enum drm_connector_status status = connector_status_disconnected;
int ret;
u8 *dpcd = outp->dp.dpcd;
@@ -50,9 +60,9 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
ret = drm_dp_read_desc(aux, &outp->dp.desc,
drm_dp_is_branch(dpcd));
if (ret < 0)
- return connector_status_disconnected;
+ goto out;
} else {
- return connector_status_disconnected;
+ goto out;
}
if (nouveau_mst) {
@@ -61,12 +71,33 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
*nv_connector,
mstm->can_mst = drm_dp_has_mst(aux, dpcd);
}
+ if (nouveau_dp_has_sink_count(connector, outp)) {
+ ret = drm_dp_get_sink_count(aux);
+ if (ret < 0)
+ goto out;
+
+ outp->dp.sink_count = ret;
+
+ /*
+* Dongle connected, but no display. Don't bother reading
+* downstream port info
+*/
+ if (!outp->dp.sink_count)
+ return connector_status_disconnected;
+ }
+
ret = drm_dp_downstream_read_info(aux, dpcd,
outp->dp.downstream_ports);
if (ret < 0)
- return connector_status_disconnected;
+ goto out;
- return connector_status_connected;
+ status = connector_status_connected;
+out:
+ if (status != connector_status_connected) {
+ /* Clear any cached info */
+ outp->dp.sink_count = 0;
+ }
+ return status;
}
int
@@ -159,6 +190,8 @@ void nouveau_dp_irq(struct nouveau_drm *drm,
struct drm_connector *connector = &nv_connector->base;
struct nouveau_encoder *outp = find_encoder(connector, DCB_OUTPUT_DP);
struct nv50_mstm *mstm;
+ int ret;
+ bool send_hpd = false;
if (!outp)
return;
@@ -170,12 +203,23 @@ void nouveau_dp_irq(struct nouveau_drm *drm,
if (mstm && mstm->is_mst) {
if (!nv50_mstm_service(drm, nv_connector, mstm))
- nouveau_connector_hpd(connector);
+ send_hpd = true;
} else {
drm_dp_cec_irq(&nv_connector->aux);
+
+ if (nouveau_dp_has_sink_count(connector, outp)) {
+ ret = drm_dp_get_sink_count(&nv_connector->aux);
+ if (ret != outp->dp.sink_count)
+ send_hpd = true;
+ if (ret >= 0)
+ outp->dp.sink_count = ret;
+ }
}
mutex_unlock(&outp->dp.hpd_irq_lock);
+
+ if (s
[Intel-gfx] [RFC v2 16/20] drm/i915/dp: Extract drm_dp_get_sink_count()
And of course, we'll also need to read the sink count from other drivers
as well if we're checking whether or not it's supported. So, let's
extract the code for this into another helper.
v2:
* Fix drm_dp_dpcd_readb() ret check
* Add back comment and move back sink_count assignment in intel_dp_get_dpcd()
Signed-off-by: Lyude Paul
Reviewed-by: Sean Paul
---
drivers/gpu/drm/drm_dp_helper.c | 22 ++
drivers/gpu/drm/i915/display/intel_dp.c | 11 +--
include/drm/drm_dp_helper.h | 1 +
3 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 863e0babc1903..67ad05eb05b7e 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -736,6 +736,28 @@ bool drm_dp_has_sink_count(struct drm_connector *connector,
}
EXPORT_SYMBOL(drm_dp_has_sink_count);
+/**
+ * drm_dp_get_sink_count() - Retrieve the sink count for a given sink
+ * @aux: The DP AUX channel to use
+ *
+ * Returns: The current sink count reported by @aux, or a negative error code
+ * otherwise.
+ */
+int drm_dp_get_sink_count(struct drm_dp_aux *aux)
+{
+ u8 count;
+ int ret;
+
+ ret = drm_dp_dpcd_readb(aux, DP_SINK_COUNT, &count);
+ if (ret < 0)
+ return ret;
+ if (ret != 1)
+ return -EIO;
+
+ return DP_GET_SINK_COUNT(count);
+}
+EXPORT_SYMBOL(drm_dp_get_sink_count);
+
/*
* I2C-over-AUX implementation
*/
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 35a4779a442e2..4337321a3be4f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4648,6 +4648,8 @@ intel_dp_has_sink_count(struct intel_dp *intel_dp)
static bool
intel_dp_get_dpcd(struct intel_dp *intel_dp)
{
+ int ret;
+
if (!intel_dp_read_dpcd(intel_dp))
return false;
@@ -4664,11 +4666,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
}
if (intel_dp_has_sink_count(intel_dp)) {
- u8 count;
- ssize_t r;
-
- r = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &count);
- if (r < 1)
+ ret = drm_dp_get_sink_count(&intel_dp->aux);
+ if (ret < 0)
return false;
/*
@@ -4676,7 +4675,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
* a member variable in intel_dp will track any changes
* between short pulse interrupts.
*/
- intel_dp->sink_count = DP_GET_SINK_COUNT(count);
+ intel_dp->sink_count = ret;
/*
* SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index a1413a531eaf4..0c141fc81aaa8 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1635,6 +1635,7 @@ struct drm_dp_desc;
bool drm_dp_has_sink_count(struct drm_connector *connector,
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const struct drm_dp_desc *desc);
+int drm_dp_get_sink_count(struct drm_dp_aux *aux);
void drm_dp_remote_aux_init(struct drm_dp_aux *aux);
void drm_dp_aux_init(struct drm_dp_aux *aux);
--
2.26.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC v2 02/20] drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc()
Noticed this while going through our DP code - we use an open-coded
version of drm_dp_read_desc() instead of just using the helper, so
change that. This will also let us use quirks in the future if we end up
needing them.
Signed-off-by: Lyude Paul
Reviewed-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/nouveau_connector.c | 3 ++-
drivers/gpu/drm/nouveau/nouveau_dp.c| 30 +++--
drivers/gpu/drm/nouveau/nouveau_encoder.h | 4 ++-
3 files changed, 14 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 7674025a4bfe8..e12957e6faa7c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -435,7 +435,8 @@ nouveau_connector_ddc_detect(struct drm_connector
*connector)
switch (nv_encoder->dcb->type) {
case DCB_OUTPUT_DP:
- ret = nouveau_dp_detect(nv_encoder);
+ ret = nouveau_dp_detect(nouveau_connector(connector),
+ nv_encoder);
if (ret == NOUVEAU_DP_MST)
return NULL;
else if (ret == NOUVEAU_DP_SST)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index ee778ddc95fae..c4e9c21d4dd2b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -36,27 +36,9 @@ MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream
(default: enabled)");
static int nouveau_mst = 1;
module_param_named(mst, nouveau_mst, int, 0400);
-static void
-nouveau_dp_probe_oui(struct drm_device *dev, struct nvkm_i2c_aux *aux, u8
*dpcd)
-{
- struct nouveau_drm *drm = nouveau_drm(dev);
- u8 buf[3];
-
- if (!(dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
- return;
-
- if (!nvkm_rdaux(aux, DP_SINK_OUI, buf, 3))
- NV_DEBUG(drm, "Sink OUI: %02hx%02hx%02hx\n",
-buf[0], buf[1], buf[2]);
-
- if (!nvkm_rdaux(aux, DP_BRANCH_OUI, buf, 3))
- NV_DEBUG(drm, "Branch OUI: %02hx%02hx%02hx\n",
-buf[0], buf[1], buf[2]);
-
-}
-
int
-nouveau_dp_detect(struct nouveau_encoder *nv_encoder)
+nouveau_dp_detect(struct nouveau_connector *nv_connector,
+ struct nouveau_encoder *nv_encoder)
{
struct drm_device *dev = nv_encoder->base.base.dev;
struct nouveau_drm *drm = nouveau_drm(dev);
@@ -89,7 +71,13 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder)
NV_DEBUG(drm, "maximum: %dx%d\n",
nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
- nouveau_dp_probe_oui(dev, aux, dpcd);
+ ret = drm_dp_read_desc(&nv_connector->aux, &nv_encoder->dp.desc,
+ drm_dp_is_branch(dpcd));
+ if (ret) {
+ NV_ERROR(drm, "Failed to read DP descriptor on %s: %d\n",
+nv_connector->base.name, ret);
+ return ret;
+ }
ret = nv50_mstm_detect(nv_encoder->dp.mstm, dpcd, nouveau_mst);
if (ret == 1)
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h
b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index a72c412ac8b14..6424cdcb4913f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -33,6 +33,7 @@
#include
#include "dispnv04/disp.h"
struct nv50_head_atom;
+struct nouveau_connector;
#define NV_DPMS_CLEARED 0x80
@@ -64,6 +65,7 @@ struct nouveau_encoder {
struct nv50_mstm *mstm;
int link_nr;
int link_bw;
+ struct drm_dp_desc desc;
} dp;
};
@@ -104,7 +106,7 @@ enum nouveau_dp_status {
NOUVEAU_DP_MST,
};
-int nouveau_dp_detect(struct nouveau_encoder *);
+int nouveau_dp_detect(struct nouveau_connector *, struct nouveau_encoder *);
enum drm_mode_status nv50_dp_mode_valid(struct drm_connector *,
struct nouveau_encoder *,
const struct drm_display_mode *,
--
2.26.2
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev4)
== Series Details ==
Series: drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from
i915 (rev4)
URL : https://patchwork.freedesktop.org/series/80542/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a9e819463691 drm/nouveau/kms: Fix some indenting in nouveau_dp_detect()
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 21 lines checked
7ae06bba566f drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc()
-:102: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
nouveau_connector *' should also have an identifier name
#102: FILE: drivers/gpu/drm/nouveau/nouveau_encoder.h:109:
+int nouveau_dp_detect(struct nouveau_connector *, struct nouveau_encoder *);
-:102: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
nouveau_encoder *' should also have an identifier name
#102: FILE: drivers/gpu/drm/nouveau/nouveau_encoder.h:109:
+int nouveau_dp_detect(struct nouveau_connector *, struct nouveau_encoder *);
total: 0 errors, 2 warnings, 0 checks, 74 lines checked
6abb3f5c77eb drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c
f25602cad7dd drm/nouveau/kms/nv50-: Use macros for DP registers in nouveau_dp.c
62e930dbeef6 drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new()
-:7: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit fa3cdf8d0b09 ("drm/nouveau:
Reset MST branching unit before enabling")'
#7:
Since fa3cdf8d0b09 ("drm/nouveau: Reset MST branching unit before
total: 1 errors, 0 warnings, 0 checks, 17 lines checked
a9682f4e1452 drm/nouveau/kms: Search for encoders' connectors properly
80d08ddcbe01 drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in
nv50_sor_disable()
de0d90b0cbbe drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling
-:53: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#53:
* Enabling bits in MSTM_CTRL before calling drm_dp_mst_topology_mgr_set_mst().
-:463: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
drm_device *' should also have an identifier name
#463: FILE: drivers/gpu/drm/nouveau/nouveau_display.h:21:
+ void (*fini)(struct drm_device *, bool suspend, bool runtime);
total: 0 errors, 2 warnings, 0 checks, 575 lines checked
1ff3cc085ba8 drm/i915/dp: Extract drm_dp_has_mst()
a6f9d631d9da drm/nouveau/kms: Use new drm_dp_has_mst() helper for checking MST
caps
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 29 lines checked
4f4b361d1f59 drm/nouveau/kms: Move drm_dp_cec_unset_edid() into
nouveau_connector_detect()
2c0d380033fe drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths
-:279: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#279: FILE: drivers/gpu/drm/nouveau/nouveau_drv.h:201:
+ struct mutex hpd_lock;
total: 0 errors, 0 warnings, 1 checks, 219 lines checked
4a801b894885 drm/i915/dp: Extract drm_dp_downstream_read_info()
36456c0c6ac1 drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode
validation
-:63: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#63: FILE: drivers/gpu/drm/nouveau/nouveau_dp.c:194:
+ unsigned max_clock, ds_clock, clock;
total: 0 errors, 1 warnings, 0 checks, 57 lines checked
3e316280cc66 drm/i915/dp: Extract drm_dp_has_sink_count()
42375c922088 drm/i915/dp: Extract drm_dp_get_sink_count()
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#12:
* Add back comment and move back sink_count assignment in intel_dp_get_dpcd()
total: 0 errors, 1 warnings, 0 checks, 64 lines checked
e75ad1b640e6 drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT
-:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#11:
plugged into it currently results in a bogus EDID retrieval error in the kernel
log.
total: 0 errors, 1 warnings, 0 checks, 108 lines checked
8eaee66ccf08 drm/nouveau/kms: Don't change EDID when it hasn't actually changed
510983d335f7 drm/i915/dp: Extract drm_dp_read_dpcd_caps()
c70e1535be58 drm/nouveau/kms: Start using drm_dp_read_dpcd_caps()
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev4)
== Series Details == Series: drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev4) URL : https://patchwork.freedesktop.org/series/80542/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:expected unsigned int [addressable] [usertype] ulClockParams +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47:got restricted __le32 [usertype] +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1019:47: warning: incorrect type in assignment (different base types) +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1028:50: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1029:49: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:1037:47: warning: too many warnings +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:184:44: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:283:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:320:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:323:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:326:14: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:329:18: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:330:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:338:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:340:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:342:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:346:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:348:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:353:33: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:367:43: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:369:38: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:374:67: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:375:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:378:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:389:80: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:395:57: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:402:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:403:53: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:406:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:414:66: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:423:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:424:69: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:473:30: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:476:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:477:45: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:484:54: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:52:28: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:531:35: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:53:29: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:533:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:54:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:55:27: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:56:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:57:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:577:21: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:581:25: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:58:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:583:21: warning: cast to restricted __le32 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:586:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:590:25: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:59:26: warning: cast to restricted __le16 +drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:5
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev4)
== Series Details ==
Series: drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from
i915 (rev4)
URL : https://patchwork.freedesktop.org/series/80542/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8910 -> Patchwork_18385
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/index.html
Known issues
Here are the changes found in Patchwork_18385 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
Possible fixes
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][3] ([i915#1372]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][5] ([i915#2203]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [SKIP][7] ([fdo#109271]) -> [DMESG-FAIL][8]
([i915#62] / [i915#95])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
- fi-skl-6700k2: [INCOMPLETE][9] ([i915#151] / [i915#2203]) ->
[DMESG-WARN][10] ([i915#2203])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-skl-6700k2/igt@i915_pm_...@module-reload.html
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][12] ([i915#62] / [i915#92]) +3 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92]) ->
[DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +1 similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2100]: https://gitlab.freedesktop.org/drm/intel/issues/2100
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#2249]: https://gitlab.freedesktop.org/drm/intel/issues/2249
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (39 -> 34)
--
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-byt-clapper
Build changes
-
* Linux: CI_DRM_8910 -> Patchwork_18385
CI-20190529: 20190529
CI_DRM_8910: a300e6a7af948f4a89a1e4ca42e8d2ae0d580f4e @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5769: 4e5f76be680b65780204668e302026cf638decc9 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18385: c70e1535be58727780c304a753b53d8d5f1a93da @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c70e1535be58 drm/nouveau/kms: Start using drm_dp_read_dpcd_caps()
510983d335f7 drm/i915/dp: Extract drm_dp_read_dpcd_caps()
8eaee66ccf08 drm/nouveau/kms: Don't change EDID when it hasn't actually changed
e75ad1b640e6 drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT
42375c922088 drm/i915/dp: Extract drm_dp_get_sink_count()
3e316280cc66 drm/i915/dp: Extrac
Re: [Intel-gfx] [PATCH v6] drm/kmb: Add support for KeemBay Display
Hi Anitha.
Feedback on kmb_dsi.
The main feedback can be found after the kmb_dsi_init function.
The highligt of the feedback is that, in my opinion, the
best would be to use the drm_bridge abstraction for the kmb_dsi.
Maybe because I am biased - and this is just overhead.
But it just looks simpler to me.
There are several chunks of code surrounded by #ifdef.
It would be good if they could all be handled so no more #ifdef are
required.
There is also a lot of debug prints. Maybe this can be trimmed now that
the driver works?
There is a lot of variables that should all be included in a struct
kmb_dsi that should be allocated in the probe function (if this becomes
a bridge driver).
I hope this does not scare you away! If I am right about the ocnversion
to a drm_bridge, then I hope it is semi trivial to do.
All the hard HW init stuff is done.
Sam
> diff --git a/drivers/gpu/drm/kmb/kmb_dsi.c b/drivers/gpu/drm/kmb/kmb_dsi.c
> new file mode 100644
> index 000..21745ae
> --- /dev/null
> +++ b/drivers/gpu/drm/kmb/kmb_dsi.c
> @@ -0,0 +1,1828 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright © 2019-2020 Intel Corporation
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "kmb_drv.h"
> +#include "kmb_dsi.h"
> +#include "kmb_regs.h"
> +
> +static int hw_initialized;
> +/* #define MIPI_TX_TEST_PATTERN_GENERATION */
> +/* #define DPHY_GET_FSM */
> +/* #define DPHY_READ_TESTCODE */
> +
> +static struct mipi_dsi_host *dsi_host;
> +static struct mipi_dsi_device *dsi_device;
> +
> +/* Default setting is 1080p, 4 lanes */
> +#define IMG_HEIGHT_LINES 1080
> +#define IMG_WIDTH_PX 1920
> +#define MIPI_TX_ACTIVE_LANES 4
> +
> +struct mipi_tx_frame_section_cfg mipi_tx_frame0_sect_cfg = {
> + .width_pixels = IMG_WIDTH_PX,
> + .height_lines = IMG_HEIGHT_LINES,
> + .data_type = DSI_LP_DT_PPS_RGB888_24B,
> + .data_mode = MIPI_DATA_MODE1,
> + .dma_packed = 0
> +};
> +
> +struct mipi_tx_frame_cfg mipitx_frame0_cfg = {
> + .sections[0] = &mipi_tx_frame0_sect_cfg,
> + .sections[1] = NULL,
> + .sections[2] = NULL,
> + .sections[3] = NULL,
> + .vsync_width = 5,
> + .v_backporch = 36,
> + .v_frontporch = 4,
> + .hsync_width = 44,
> + .h_backporch = 148,
> + .h_frontporch = 88
> +};
> +
> +struct mipi_tx_dsi_cfg mipitx_dsi_cfg = {
> + .hfp_blank_en = 0,
> + .eotp_en = 0,
> + .lpm_last_vfp_line = 0,
> + .lpm_first_vsa_line = 0,
> + .sync_pulse_eventn = DSI_VIDEO_MODE_NO_BURST_EVENT,
> + .hfp_blanking = SEND_BLANK_PACKET,
> + .hbp_blanking = SEND_BLANK_PACKET,
> + .hsa_blanking = SEND_BLANK_PACKET,
> + .v_blanking = SEND_BLANK_PACKET,
> +};
> +
> +struct mipi_ctrl_cfg mipi_tx_init_cfg = {
> + .index = MIPI_CTRL6,
> + .type = MIPI_DSI,
> + .dir = MIPI_TX,
> + .active_lanes = MIPI_TX_ACTIVE_LANES,
> + .lane_rate_mbps = MIPI_TX_LANE_DATA_RATE_MBPS,
> + .ref_clk_khz = MIPI_TX_REF_CLK_KHZ,
> + .cfg_clk_khz = MIPI_TX_CFG_CLK_KHZ,
> + .data_if = MIPI_IF_PARALLEL,
> + .tx_ctrl_cfg = {
> + .frames[0] = &mipitx_frame0_cfg,
> + .frames[1] = NULL,
> + .frames[2] = NULL,
> + .frames[3] = NULL,
> + .tx_dsi_cfg = &mipitx_dsi_cfg,
> + .line_sync_pkt_en = 0,
> + .line_counter_active = 0,
> + .frame_counter_active = 0,
> + .tx_always_use_hact = 1,
> + .tx_hact_wait_stop = 1,
> + }
> +};
> +
> +struct mipi_hs_freq_range_cfg {
> + u16 default_bit_rate_mbps;
> + u8 hsfreqrange_code;
> +};
> +
> +struct vco_params {
> + u32 freq;
> + u32 range;
> + u32 divider;
> +};
> +
> +static struct vco_params vco_table[] = {
> + {52, 0x3f, 8},
> + {80, 0x39, 8},
> + {105, 0x2f, 4},
> + {160, 0x29, 4},
> + {210, 0x1f, 2},
> + {320, 0x19, 2},
> + {420, 0x0f, 1},
> + {630, 0x09, 1},
> + {1100, 0x03, 1},
> + {0x, 0x01, 1},
> +};
> +
> +static struct mipi_hs_freq_range_cfg
> +mipi_hs_freq_range[MIPI_DPHY_DEFAULT_BIT_RATES] = {
> + {.default_bit_rate_mbps = 80, .hsfreqrange_code = 0x00},
> + {.default_bit_rate_mbps = 90, .hsfreqrange_code = 0x10},
> + {.default_bit_rate_mbps = 100, .hsfreqrange_code = 0x20},
> + {.default_bit_rate_mbps = 110, .hsfreqrange_code = 0x30},
> + {.default_bit_rate_mbps = 120, .hsfreqrange_code = 0x01},
> + {.default_bit_rate_mbps = 130, .hsfreqrange_code = 0x11},
> + {.default_bit_rate_mbps = 140, .hsfreqrange_code = 0x21},
> + {.default_bit_rate_mbps = 150, .hsfreqrange_code = 0x31},
> + {.default_bit_rate_mbps = 160, .hsfreqrange_code = 0x02},
> + {.default_bit_rate_mbps = 170, .hsfreqrange_code = 0x12},
> + {.d
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Update to GuC v45.0.0
On 8/19/2020 2:14 PM, Michal Wajdeczko wrote:
On 11.08.2020 03:04, Daniele Ceraolo Spurio wrote:
On 8/7/2020 10:46 AM, john.c.harri...@intel.com wrote:
From: John Harrison
Update to the latest GuC firmware. This includes some significant
changes to the interface.
A high level overview of the changes would be nice for extra clarity. A
couple of example:
- GuC now requires a private memory area
- you're dropping the programming of the reg_state struct, but that's
actually still defined in the structure, so IMO it's worth mentioning
that it will come back with GuC submission.
Signed-off-by: John Harrison
Author: Daniele Ceraolo Spurio
Author: John Harrison
Author: Matthew Brost
Author: Michal Wajdeczko
Author: Michel Thierry
Author: Oscar Mateo
Author: Rodrigo Vivi
For the review process it would be better to have individual patches
from each author. We can squash them just before merge.
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 +-
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 125 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_abi.h | 215 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 116 --
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 21 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 110 --
drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h | 5 +
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 27 ++-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 6 +-
10 files changed, 485 insertions(+), 145 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_abi.h
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index ea4ba2afe9f9..9cd62d68abc6 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -305,8 +305,9 @@ static int intel_engine_setup(struct intel_gt *gt,
enum intel_engine_id id)
engine->i915 = i915;
engine->gt = gt;
engine->uncore = gt->uncore;
- engine->hw_id = engine->guc_id = info->hw_id;
engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases);
+ engine->hw_id = info->hw_id;
+ engine->guc_id = MAKE_GUC_ID(info->class, info->instance);
engine->class = info->class;
engine->instance = info->instance;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 861657897c0f..8d30e1d7d8a6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -7,6 +7,7 @@
#include "gt/intel_gt_irq.h"
#include "gt/intel_gt_pm_irq.h"
#include "intel_guc.h"
+#include "intel_guc_abi.h"
#include "intel_guc_ads.h"
#include "intel_guc_submission.h"
#include "i915_drv.h"
@@ -213,23 +214,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc
*guc)
return flags;
}
-static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
-{
- u32 flags = 0;
-
- if (intel_guc_submission_is_used(guc)) {
- u32 ctxnum, base;
-
- base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
- ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
-
- base >>= PAGE_SHIFT;
- flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
- (ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
- }
- return flags;
-}
-
static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
{
u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >>
PAGE_SHIFT;
@@ -291,7 +275,6 @@ static void guc_init_params(struct intel_guc *guc)
BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS *
sizeof(u32));
- params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
@@ -400,32 +383,65 @@ void intel_guc_fini(struct intel_guc *guc)
intel_uc_fw_fini(&guc->fw);
}
+static bool is_valid_mmio_action(u32 action)
+{
+ return action == GUC_ACTION_REGISTER_CTB ||
+ action == GUC_ACTION_DEREGISTER_CTB;
+}
+
+static int guc_status_to_errno(u32 status)
+{
+ switch (status) {
+ case GUC_STATUS_UNKNOWN_ACTION:
+ return -EOPNOTSUPP;
+ case GUC_STATUS_INVALID_PARAMS:
+ return -EINVAL;
+ case GUC_STATUS_INVALID_ADDR:
+ return -EFAULT;
+ case GUC_STATUS_CTX_NOT_REGISTERED:
+ return -ESRCH;
+ case GUC_STATUS_CTB_FULL:
+ return -ENOSPC;
+ case GUC_STATUS_UNAUTHORIZED_REQUEST:
+ return -EACCES;
+ case GUC_STATUS_GENERIC_FAIL:
+ default:
+ return -ENXIO;
+ }
+}
+
/*
* This function implements the MMIO based host to GuC interface.
*/
-int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32
len,
+int intel_guc_send_mmio(struct intel_guc *guc, const u32 *request,
u32 len,
u32 *response_buf, u32 response_buf_
Re: [Intel-gfx] [PATCH i-g-t 1/4] i915/perf: 32bit printf cleanup
On 20/08/2020 20:26, Chris Wilson wrote:
Use PRI[du]64 as necessary for 32bit builds.
Signed-off-by: Chris Wilson
Reviewed-by: Lionel Landwerlin
Thanks!
-Lionel
---
tests/i915/perf.c| 8
tools/i915-perf/i915_perf_recorder.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 92edc9f1f..a894fd382 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -2077,7 +2077,7 @@ test_blocking(uint64_t requested_oa_period, bool
set_kernel_hrtimer, uint64_t ke
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
+ igt_debug("%d blocking reads during test with %"PRIu64" Hz OA sampling
(expect no more than %d)\n",
n, NSEC_PER_SEC / oa_period, max_iterations);
igt_debug("%d extra iterations seen, not related to periodic sampling (e.g.
context switches)\n",
n_extra_iterations);
@@ -2265,7 +2265,7 @@ test_polling(uint64_t requested_oa_period, bool
set_kernel_hrtimer, uint64_t ker
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d non-blocking reads during test with %lu Hz OA sampling (expect no more than %d)\n",
+ igt_debug("%d non-blocking reads during test with %"PRIu64" Hz OA sampling
(expect no more than %d)\n",
n, NSEC_PER_SEC / oa_period, max_iterations);
igt_debug("%d extra iterations seen, not related to periodic sampling (e.g.
context switches)\n",
n_extra_iterations);
@@ -2357,7 +2357,7 @@ num_valid_reports_captured(struct
drm_i915_perf_open_param *param,
int64_t start, end;
int num_reports = 0;
- igt_debug("Expected duration = %lu\n", *duration_ns);
+ igt_debug("Expected duration = %"PRId64"\n", *duration_ns);
stream_fd = __perf_open(drm_fd, param, true);
@@ -2389,7 +2389,7 @@ num_valid_reports_captured(struct drm_i915_perf_open_param *param,
*duration_ns = end - start;
- igt_debug("Actual duration = %lu\n", *duration_ns);
+ igt_debug("Actual duration = %"PRIu64"\n", *duration_ns);
return num_reports;
}
diff --git a/tools/i915-perf/i915_perf_recorder.c
b/tools/i915-perf/i915_perf_recorder.c
index 7671f39b4..adc41c29f 100644
--- a/tools/i915-perf/i915_perf_recorder.c
+++ b/tools/i915-perf/i915_perf_recorder.c
@@ -1001,7 +1001,7 @@ main(int argc, char *argv[])
}
ctx.oa_exponent = oa_exponent_for_period(ctx.timestamp_frequency, perf_period);
- fprintf(stdout, "Opening perf stream with metric_id=%lu
oa_exponent=%u\n",
+ fprintf(stdout, "Opening perf stream with metric_id=%"PRIu64"
oa_exponent=%u\n",
ctx.metric_set->perf_oa_metrics_set, ctx.oa_exponent);
ctx.perf_fd = perf_open(&ctx);
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 13/20] drm/i915/dp: Extract drm_dp_downstream_read_info()
On Wed, Aug 19, 2020 at 05:34:15PM -0400, Lyude Paul wrote:
> (adding Ville and Imre to the cc here, they might be interested to know about
> this, comments down below)
>
> On Wed, 2020-08-19 at 11:15 -0400, Sean Paul wrote:
> > On Tue, Aug 11, 2020 at 04:04:50PM -0400, Lyude Paul wrote:
> > > We're going to be doing the same probing process in nouveau for
> > > determining downstream DP port capabilities, so let's deduplicate the
> > > work by moving i915's code for handling this into a shared helper:
> > > drm_dp_downstream_read_info().
> > >
> > > Note that when we do this, we also do make some functional changes while
> > > we're at it:
> > > * We always clear the downstream port info before trying to read it,
> > > just to make things easier for the caller
> > > * We skip reading downstream port info if the DPCD indicates that we
> > > don't support downstream port info
> > > * We only read as many bytes as needed for the reported number of
> > > downstream ports, no sense in reading the whole thing every time
> > >
> > > Signed-off-by: Lyude Paul
> > > ---
> > > drivers/gpu/drm/drm_dp_helper.c | 32 +
> > > drivers/gpu/drm/i915/display/intel_dp.c | 14 ++-
> > > include/drm/drm_dp_helper.h | 3 +++
> > > 3 files changed, 37 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > > b/drivers/gpu/drm/drm_dp_helper.c
> > > index 4c21cf69dad5a..9703b33599c3b 100644
> > > --- a/drivers/gpu/drm/drm_dp_helper.c
> > > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > > @@ -423,6 +423,38 @@ bool drm_dp_send_real_edid_checksum(struct drm_dp_aux
> > > *aux,
> > > }
> > > EXPORT_SYMBOL(drm_dp_send_real_edid_checksum);
> > >
> > > +/**
> > > + * drm_dp_downstream_read_info() - read DPCD downstream port info if
> > > available
> > > + * @aux: DisplayPort AUX channel
> > > + * @dpcd: A cached copy of the port's DPCD
> > > + * @downstream_ports: buffer to store the downstream port info in
> > > + *
> > > + * Returns: 0 if either the downstream port info was read successfully or
> > > + * there was no downstream info to read, or a negative error code
> > > otherwise.
> > > + */
> > > +int drm_dp_downstream_read_info(struct drm_dp_aux *aux,
> > > + const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> > > + u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])
> > > +{
> > > + int ret;
> > > + u8 len;
> > > +
> > > + memset(downstream_ports, 0, DP_MAX_DOWNSTREAM_PORTS);
> > > +
> > > + /* No downstream info to read */
> > > + if (!drm_dp_is_branch(dpcd) ||
> > > + dpcd[DP_DPCD_REV] < DP_DPCD_REV_10 ||
> > > + !(dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT))
> > > + return 0;
> > > +
> > > + len = (dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_PORT_COUNT_MASK) * 4;
> >
> > I'm having a hard time rationalizing DP_MAX_DOWNSTREAM_PORTS being 16, but
> > only
> > having 4 ports worth of data in the DP_DOWNSTREAM_PORT_* registers. Do you
> > know
> > what's supposed to happen if dpcd[DP_DOWN_STREAM_PORT_COUNT] is > 4?
> >
> ok!! Taking a lesson from our available_pbn/full_pbn confusion in the past, I
> squinted very hard at the specification and eventually found something that I
> think clears this up. Surprise - we definitely had this implemented
> incorrectly
> in i915
To me it looks correct, only DFP0's cap info is used, by also handling
the DP_DETAILED_CAP_INFO_AVAILABLE=0/1 cases.
The wording is a bit unclear, but as I understand the Standard only
calls for the above:
"""
A DP upstream device shall read the capability from DPCD Addresses 00080h
through 00083h. A DP Branch device with multiple DFPs shall report the detailed
capability information of the lowest DFP number to which a downstream device
is connected, consistent with the DisplayID or legacy EDID access routing policy
of an SST-only DP Branch device as described in Section 2.1.4.1.
"""
>
> From section 5.3.3.1:
>
>Either one or four bytes are used, per DFP type indication. Therefore, up
> to
>16 (with 1-byte descriptor) or four (with 4-byte descriptor) DFP
> capabilities
>can be stored.
>
> So, a couple takeaways from this:
>
> * A DisplayPort connector can have *multiple* different downstream port
> types,
>which I think actually makes sense as I've seen an adapter like this
> before.
> * We actually added the ability to determine the downstream port type for DP
>connectors using the subconnector prop, but it seems like if we want to aim
>for completeness we're going to need to come up with a new prop that can
>report multiple downstream port types :\.
This makes sense to me.
> * It's not explicitly mentioned, but I'm assuming the correct way of handling
>multiple downstream BPC/pixel clock capabilities is to assume the max
>BPC/pixel clock is derived from the lowest max BPC/pixel clock we find on
>*connected* downstream ports (anything else wouldn't really m
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Break up error capture compression loops with cond_resched()
== Series Details == Series: drm/i915: Break up error capture compression loops with cond_resched() URL : https://patchwork.freedesktop.org/series/80861/ State : success == Summary == CI Bug Log - changes from CI_DRM_8910_full -> Patchwork_18382_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18382_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@bonded-early: - shard-kbl: [PASS][1] -> [FAIL][2] ([i915#2079]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl4/igt@gem_exec_balan...@bonded-early.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-kbl7/igt@gem_exec_balan...@bonded-early.html * igt@gem_exec_whisper@basic-contexts-forked: - shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk1/igt@gem_exec_whis...@basic-contexts-forked.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-glk8/igt@gem_exec_whis...@basic-contexts-forked.html * igt@gen9_exec_parse@allowed-all: - shard-skl: [PASS][5] -> [DMESG-WARN][6] ([i915#1436] / [i915#716]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl8/igt@gen9_exec_pa...@allowed-all.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-skl10/igt@gen9_exec_pa...@allowed-all.html * igt@i915_selftest@mock@contexts: - shard-apl: [PASS][7] -> [INCOMPLETE][8] ([i915#1635] / [i915#2278]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-apl6/igt@i915_selftest@m...@contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-apl2/igt@i915_selftest@m...@contexts.html * igt@kms_color@pipe-b-ctm-negative: - shard-skl: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +10 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl9/igt@kms_co...@pipe-b-ctm-negative.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-skl6/igt@kms_co...@pipe-b-ctm-negative.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-sliding: - shard-skl: [PASS][11] -> [FAIL][12] ([i915#54]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl6/igt@kms_cursor_...@pipe-c-cursor-128x128-sliding.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-skl4/igt@kms_cursor_...@pipe-c-cursor-128x128-sliding.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +7 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl2/igt@kms_flip@flip-vs-susp...@c-dp1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-kbl7/igt@kms_flip@flip-vs-susp...@c-dp1.html * igt@kms_flip@modeset-vs-vblank-race-interruptible@a-hdmi-a1: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#407]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk6/igt@kms_flip@modeset-vs-vblank-race-interrupti...@a-hdmi-a1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-glk6/igt@kms_flip@modeset-vs-vblank-race-interrupti...@a-hdmi-a1.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [PASS][17] -> [INCOMPLETE][18] ([i915#155]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl7/igt@kms_frontbuffer_track...@fbc-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-kbl4/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu: - shard-tglb: [PASS][19] -> [DMESG-WARN][20] ([i915#1982]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-tglb5/igt@kms_frontbuffer_track...@fbcpsr-rgb565-draw-mmap-cpu.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-tglb7/igt@kms_frontbuffer_track...@fbcpsr-rgb565-draw-mmap-cpu.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#1188]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl4/igt@kms_...@bpc-switch-dpms.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-skl4/igt@kms_...@bpc-switch-dpms.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145] / [i915#265]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl2/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18382/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_sprite_mmap
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr
== Series Details == Series: series starting with [1/2] drm/i915: Compute has_drrs after compute has_psr URL : https://patchwork.freedesktop.org/series/80866/ State : success == Summary == CI Bug Log - changes from CI_DRM_8910_full -> Patchwork_18383_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18383_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_whisper@basic-forked-all: - shard-glk: [PASS][1] -> [DMESG-WARN][2] ([i915#118] / [i915#95]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk7/igt@gem_exec_whis...@basic-forked-all.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk4/igt@gem_exec_whis...@basic-forked-all.html * igt@gem_mmap_gtt@fault-concurrent: - shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([i915#2165]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl2/igt@gem_mmap_...@fault-concurrent.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl2/igt@gem_mmap_...@fault-concurrent.html * igt@kms_big_fb@x-tiled-64bpp-rotate-180: - shard-glk: [PASS][5] -> [DMESG-FAIL][6] ([i915#118] / [i915#95]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk4/igt@kms_big...@x-tiled-64bpp-rotate-180.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk8/igt@kms_big...@x-tiled-64bpp-rotate-180.html * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge: - shard-glk: [PASS][7] -> [DMESG-WARN][8] ([i915#1982]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk8/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-glk2/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html * igt@kms_flip@flip-vs-fences@a-edp1: - shard-skl: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +12 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl8/igt@kms_flip@flip-vs-fen...@a-edp1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl8/igt@kms_flip@flip-vs-fen...@a-edp1.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#180]) +6 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl2/igt@kms_flip@flip-vs-susp...@c-dp1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl2/igt@kms_flip@flip-vs-susp...@c-dp1.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#2122]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl4/igt@kms_flip@plain-flip-ts-check-interrupti...@a-edp1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-skl5/igt@kms_flip@plain-flip-ts-check-interrupti...@a-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html - shard-iclb: [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [PASS][19] -> [INCOMPLETE][20] ([i915#155]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl7/igt@kms_frontbuffer_track...@fbc-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-kbl1/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu: - shard-tglb: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-tglb2/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18383/shard-tglb1/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145] / [i915#265]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-sk
[Intel-gfx] ✗ Fi.CI.IGT: failure for Allow privileged user to map the OA buffer
== Series Details == Series: Allow privileged user to map the OA buffer URL : https://patchwork.freedesktop.org/series/80868/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8910_full -> Patchwork_18384_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18384_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18384_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18384_full: ### IGT changes ### Possible regressions * igt@gem_workarounds@suspend-resume-fd: - shard-skl: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl9/igt@gem_workarou...@suspend-resume-fd.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-skl6/igt@gem_workarou...@suspend-resume-fd.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-hsw: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-hsw4/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions-varying-size.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-hsw8/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions-varying-size.html New tests - New tests have been introduced between CI_DRM_8910_full and Patchwork_18384_full: ### New IGT tests (10) ### * igt@perf@closed-fd-and-unmapped-access: - Statuses : 7 pass(s) 1 skip(s) - Exec time: [0.0, 0.29] s * igt@perf@invalid-map-oa-buffer: - Statuses : 7 pass(s) 1 skip(s) - Exec time: [0.0, 0.16] s * igt@perf@map-oa-buffer: - Statuses : 7 pass(s) 1 skip(s) - Exec time: [0.0, 0.28] s * igt@perf@non-privileged-access-vaddr: - Statuses : 7 pass(s) 1 skip(s) - Exec time: [0.0, 0.31] s * igt@perf@non-privileged-map-oa-buffer: - Statuses : 6 pass(s) 1 skip(s) - Exec time: [0.0, 0.21] s * igt@perf@oa-regs-not-whitelisted: - Statuses : 6 pass(s) 2 skip(s) - Exec time: [0.0, 0.24] s * igt@perf@oa-regs-whitelisted: - Statuses : 1 dmesg-warn(s) 5 pass(s) 2 skip(s) - Exec time: [0.0, 0.25] s * igt@perf@privileged-forked-access-vaddr: - Statuses : 6 pass(s) 1 skip(s) - Exec time: [0.0, 0.29] s * igt@perf@triggered-oa-reports-paranoid-0: - Statuses : 6 pass(s) 2 skip(s) - Exec time: [0.0, 3.81] s * igt@perf@triggered-oa-reports-paranoid-1: - Statuses : 6 pass(s) 2 skip(s) - Exec time: [0.0, 3.39] s Known issues Here are the changes found in Patchwork_18384_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_whisper@basic-forked-all: - shard-glk: [PASS][5] -> [DMESG-WARN][6] ([i915#118] / [i915#95]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk7/igt@gem_exec_whis...@basic-forked-all.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-glk8/igt@gem_exec_whis...@basic-forked-all.html * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-snb: [PASS][7] -> [TIMEOUT][8] ([i915#1958]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-snb2/igt@gem_pp...@blt-vs-render-ctx0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-snb2/igt@gem_pp...@blt-vs-render-ctx0.html - shard-hsw: [PASS][9] -> [TIMEOUT][10] ([i915#1958]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-hsw6/igt@gem_pp...@blt-vs-render-ctx0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-hsw4/igt@gem_pp...@blt-vs-render-ctx0.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-iclb: [PASS][11] -> [WARN][12] ([i915#1515]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb8/igt@i915_pm_rc6_reside...@rc6-fence.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-iclb5/igt@i915_pm_rc6_reside...@rc6-fence.html * igt@i915_selftest@live@execlists: - shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([i915#2089] / [i915#2268]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-tglb5/igt@i915_selftest@l...@execlists.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18384/shard-tglb3/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@mock@contexts: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#198] / [i915#2278]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl5/igt@i915_selftest@m...@contexts.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev4)
== Series Details == Series: drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev4) URL : https://patchwork.freedesktop.org/series/80542/ State : success == Summary == CI Bug Log - changes from CI_DRM_8910_full -> Patchwork_18385_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18385_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_shared@q-smoketest-all: - shard-glk: [PASS][1] -> [DMESG-WARN][2] ([i915#118] / [i915#95]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk7/igt@gem_ctx_sha...@q-smoketest-all.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-glk6/igt@gem_ctx_sha...@q-smoketest-all.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][3] -> [FAIL][4] ([i915#454]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-iclb1/igt@i915_pm...@dc6-psr.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-iclb6/igt@i915_pm...@dc6-psr.html * igt@i915_selftest@mock@contexts: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#198] / [i915#2278]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl5/igt@i915_selftest@m...@contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-skl2/igt@i915_selftest@m...@contexts.html - shard-apl: [PASS][7] -> [INCOMPLETE][8] ([i915#1635] / [i915#2278]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-apl6/igt@i915_selftest@m...@contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-apl4/igt@i915_selftest@m...@contexts.html * igt@kms_big_fb@x-tiled-64bpp-rotate-180: - shard-glk: [PASS][9] -> [DMESG-FAIL][10] ([i915#118] / [i915#95]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-glk4/igt@kms_big...@x-tiled-64bpp-rotate-180.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-glk8/igt@kms_big...@x-tiled-64bpp-rotate-180.html * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible@ab-vga1-hdmi-a1: - shard-hsw: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-hsw1/igt@kms_flip@2x-modeset-vs-vblank-race-interrupti...@ab-vga1-hdmi-a1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-hsw1/igt@kms_flip@2x-modeset-vs-vblank-race-interrupti...@ab-vga1-hdmi-a1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#79]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-edp1.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-edp1.html * igt@kms_flip@flip-vs-fences@a-edp1: - shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +11 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl8/igt@kms_flip@flip-vs-fen...@a-edp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-skl7/igt@kms_flip@flip-vs-fen...@a-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl1/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-kbl2/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#2122]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interrupti...@b-edp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interrupti...@b-edp1.html * igt@kms_flip_tiling@flip-to-y-tiled: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#167]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-skl8/igt@kms_flip_til...@flip-to-y-tiled.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-skl7/igt@kms_flip_til...@flip-to-y-tiled.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [PASS][23] -> [INCOMPLETE][24] ([i915#155]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8910/shard-kbl7/igt@kms_frontbuffer_track...@fbc-suspend.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18385/shard-kbl2/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_frontbuffer_tracking@fb
