[Intel-gfx] [PATCH v2 2/3] drm/i915: Implement read-only support in whitelist selftest
From: John Harrison
Newer hardware supports extra feature in the whitelist registers. This
patch updates the selftest to test that entries marked as read only
are actually read only.
v2: Removed all use of 'rsvd' for read-only registers to avoid
ambiguous code or error messages.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
---
.../gpu/drm/i915/gt/selftest_workarounds.c| 49 +--
1 file changed, 35 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 466dcc8214c3..fd1d47ba4b10 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -485,12 +485,12 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
u32 srm, lrm, rsvd;
u32 expect;
int idx;
+ bool ro_reg;
if (wo_register(engine, reg))
continue;
- if (ro_register(reg))
- continue;
+ ro_reg = ro_register(reg);
srm = MI_STORE_REGISTER_MEM;
lrm = MI_LOAD_REGISTER_MEM;
@@ -591,24 +591,35 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
}
GEM_BUG_ON(values[ARRAY_SIZE(values) - 1] != 0x);
- rsvd = results[ARRAY_SIZE(values)]; /* detect write masking */
- if (!rsvd) {
- pr_err("%s: Unable to write to whitelisted register
%x\n",
- engine->name, reg);
- err = -EINVAL;
- goto out_unpin;
+ if (!ro_reg) {
+ /* detect write masking */
+ rsvd = results[ARRAY_SIZE(values)];
+ if (!rsvd) {
+ pr_err("%s: Unable to write to whitelisted
register %x\n",
+ engine->name, reg);
+ err = -EINVAL;
+ goto out_unpin;
+ }
}
expect = results[0];
idx = 1;
for (v = 0; v < ARRAY_SIZE(values); v++) {
- expect = reg_write(expect, values[v], rsvd);
+ if (ro_reg)
+ expect = results[0];
+ else
+ expect = reg_write(expect, values[v], rsvd);
+
if (results[idx] != expect)
err++;
idx++;
}
for (v = 0; v < ARRAY_SIZE(values); v++) {
- expect = reg_write(expect, ~values[v], rsvd);
+ if (ro_reg)
+ expect = results[0];
+ else
+ expect = reg_write(expect, ~values[v], rsvd);
+
if (results[idx] != expect)
err++;
idx++;
@@ -617,15 +628,22 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
pr_err("%s: %d mismatch between values written to
whitelisted register [%x], and values read back!\n",
engine->name, err, reg);
- pr_info("%s: Whitelisted register: %x, original value
%08x, rsvd %08x\n",
- engine->name, reg, results[0], rsvd);
+ if (ro_reg)
+ pr_info("%s: Whitelisted read-only register:
%x, original value %08x\n",
+ engine->name, reg, results[0]);
+ else
+ pr_info("%s: Whitelisted register: %x, original
value %08x, rsvd %08x\n",
+ engine->name, reg, results[0], rsvd);
expect = results[0];
idx = 1;
for (v = 0; v < ARRAY_SIZE(values); v++) {
u32 w = values[v];
- expect = reg_write(expect, w, rsvd);
+ if (ro_reg)
+ expect = results[0];
+ else
+ expect = reg_write(expect, w, rsvd);
pr_info("Wrote %08x, read %08x, expect %08x\n",
w, results[idx], expect);
idx++;
@@ -633,7 +651,10 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
for (v = 0; v < ARRAY_SIZE(values); v++) {
u32 w = ~values[v];
- expect = reg_write(expect, w, rsvd);
+
[Intel-gfx] [PATCH v2 0/3] Improve whitelist selftest for read-only registers
From: John Harrison Follow up patch to earlier whitelist updates. This series adds some extra sanity checking to the driver and improves the self-test. v2: Resolved abiguity over meaning of 'rsvd' in read-only mode by removing it. Rebased to newer tree. John Harrison (3): drm/i915: Add test for invalid flag bits in whitelist entries drm/i915: Implement read-only support in whitelist selftest drm/i915: Add engine name to workaround debug print drivers/gpu/drm/i915/gt/intel_workarounds.c | 44 +++--- .../gpu/drm/i915/gt/intel_workarounds_types.h | 1 + .../gpu/drm/i915/gt/selftest_workarounds.c| 80 --- drivers/gpu/drm/i915/i915_reg.h | 12 ++- 4 files changed, 91 insertions(+), 46 deletions(-) -- 2.21.0.5.gaeb582a983 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 3/3] drm/i915: Add engine name to workaround debug print
From: John Harrison
There is a debug message in the workaround initialisation path that
reports how many entries were added of each type. However, whitelist
workarounds exist for multiple engines but the type name is just
'whitelist'. Tvrtko suggested adding the engine name to make the
message more useful.
v2: Updated the similar message in the workaround reset selftest.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 15 ---
.../gpu/drm/i915/gt/intel_workarounds_types.h | 1 +
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 17 +
3 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 95be0f108f26..3b1fc7c8faa8 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -50,9 +50,10 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name)
+static void wa_init_start(struct i915_wa_list *wal, const char *name, const
char *engine_name)
{
wal->name = name;
+ wal->engine_name = engine_name;
}
#define WA_LIST_CHUNK (1 << 4)
@@ -74,8 +75,8 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds\n",
-wal->wa_count, wal->name);
+ DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
+wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
@@ -591,7 +592,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
if (engine->class != RENDER_CLASS)
return;
- wa_init_start(wal, name);
+ wa_init_start(wal, name, engine->name);
if (IS_GEN(i915, 11))
icl_ctx_workarounds_init(engine, wal);
@@ -921,7 +922,7 @@ void intel_gt_init_workarounds(struct drm_i915_private
*i915)
{
struct i915_wa_list *wal = &i915->gt_wa_list;
- wa_init_start(wal, "GT");
+ wa_init_start(wal, "GT", "global");
gt_init_workarounds(i915, wal);
wa_init_finish(wal);
}
@@ -1192,7 +1193,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs
*engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist");
+ wa_init_start(w, "whitelist", engine->name);
if (IS_GEN(i915, 11))
icl_whitelist_build(engine);
@@ -1384,7 +1385,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs
*engine)
if (INTEL_GEN(engine->i915) < 8)
return;
- wa_init_start(wal, engine->name);
+ wa_init_start(wal, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 42ac1fb99572..e27ab1b710b3 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -20,6 +20,7 @@ struct i915_wa {
struct i915_wa_list {
const char *name;
+ const char *engine_name;
struct i915_wa *list;
unsigned intcount;
unsigned intwa_count;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index fd1d47ba4b10..a0d8f1bfe0ad 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -25,11 +25,9 @@ static const struct wo_register {
{ INTEL_GEMINILAKE, 0x731c }
};
-#define REF_NAME_MAX (INTEL_ENGINE_CS_MAX_NAME + 8)
struct wa_lists {
struct i915_wa_list gt_wa_list;
struct {
- char name[REF_NAME_MAX];
struct i915_wa_list wa_list;
struct i915_wa_list ctx_wa_list;
} engine[I915_NUM_ENGINES];
@@ -43,25 +41,20 @@ reference_lists_init(struct drm_i915_private *i915, struct
wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF");
+ wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
gt_init_workarounds(i915, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, i915, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- char *name = lists->engine[id].name;
- snprintf(name, REF_NAME_MAX, "%s_REF", engine->name);
-
- wa_init_start(wal, name);
+ wa_init_start(wal, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
-
[Intel-gfx] [PATCH v2 1/3] drm/i915: Add test for invalid flag bits in whitelist entries
From: John Harrison
As per review feedback by Tvrtko, added a check that no invalid bits
are being set in the whitelist flags fields.
Also updated the read/write access definitions to make it clearer that
they are an enum field not a set of single bit flags.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 29 +++
.../gpu/drm/i915/gt/selftest_workarounds.c| 14 ++---
drivers/gpu/drm/i915/i915_reg.h | 12 ++--
3 files changed, 42 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 9e069286d3ce..95be0f108f26 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1011,6 +1011,20 @@ bool intel_gt_verify_workarounds(struct intel_gt *gt,
const char *from)
return wa_list_verify(gt->uncore, >->i915->gt_wa_list, from);
}
+static inline bool is_nonpriv_flags_valid(u32 flags)
+{
+ /* Check only valid flag bits are set */
+ if (flags & ~RING_FORCE_TO_NONPRIV_MASK_VALID)
+ return false;
+
+ /* NB: Only 3 out of 4 enum values are valid for access field */
+ if ((flags & RING_FORCE_TO_NONPRIV_ACCESS_MASK) ==
+ RING_FORCE_TO_NONPRIV_ACCESS_INVALID)
+ return false;
+
+ return true;
+}
+
static void
whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t reg, u32 flags)
{
@@ -1021,6 +1035,9 @@ whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t
reg, u32 flags)
if (GEM_DEBUG_WARN_ON(wal->count >= RING_MAX_NONPRIV_SLOTS))
return;
+ if (GEM_DEBUG_WARN_ON(!is_nonpriv_flags_valid(flags)))
+ return;
+
wa.reg.reg |= flags;
_wa_add(wal, &wa);
}
@@ -1028,7 +1045,7 @@ whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t
reg, u32 flags)
static void
whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg)
{
- whitelist_reg_ext(wal, reg, RING_FORCE_TO_NONPRIV_RW);
+ whitelist_reg_ext(wal, reg, RING_FORCE_TO_NONPRIV_ACCESS_RW);
}
static void gen9_whitelist_build(struct i915_wa_list *w)
@@ -1109,7 +1126,7 @@ static void cfl_whitelist_build(struct intel_engine_cs
*engine)
* - PS_DEPTH_COUNT_UDW
*/
whitelist_reg_ext(w, PS_INVOCATION_COUNT,
- RING_FORCE_TO_NONPRIV_RD |
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
RING_FORCE_TO_NONPRIV_RANGE_4);
}
@@ -1149,20 +1166,20 @@ static void icl_whitelist_build(struct intel_engine_cs
*engine)
* - PS_DEPTH_COUNT_UDW
*/
whitelist_reg_ext(w, PS_INVOCATION_COUNT,
- RING_FORCE_TO_NONPRIV_RD |
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
RING_FORCE_TO_NONPRIV_RANGE_4);
break;
case VIDEO_DECODE_CLASS:
/* hucStatusRegOffset */
whitelist_reg_ext(w, _MMIO(0x2000 + engine->mmio_base),
- RING_FORCE_TO_NONPRIV_RD);
+ RING_FORCE_TO_NONPRIV_ACCESS_RD);
/* hucUKernelHdrInfoRegOffset */
whitelist_reg_ext(w, _MMIO(0x2014 + engine->mmio_base),
- RING_FORCE_TO_NONPRIV_RD);
+ RING_FORCE_TO_NONPRIV_ACCESS_RD);
/* hucStatus2RegOffset */
whitelist_reg_ext(w, _MMIO(0x23B0 + engine->mmio_base),
- RING_FORCE_TO_NONPRIV_RD);
+ RING_FORCE_TO_NONPRIV_ACCESS_RD);
break;
default:
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index fa01ea7855de..466dcc8214c3 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -397,6 +397,10 @@ static bool wo_register(struct intel_engine_cs *engine,
u32 reg)
enum intel_platform platform = INTEL_INFO(engine->i915)->platform;
int i;
+ if ((reg & RING_FORCE_TO_NONPRIV_ACCESS_MASK) ==
+RING_FORCE_TO_NONPRIV_ACCESS_WR)
+ return true;
+
for (i = 0; i < ARRAY_SIZE(wo_registers); i++) {
if (wo_registers[i].platform == platform &&
wo_registers[i].reg == reg)
@@ -408,7 +412,8 @@ static bool wo_register(struct intel_engine_cs *engine, u32
reg)
static bool ro_register(u32 reg)
{
- if (reg & RING_FORCE_TO_NONPRIV_RD)
+ if ((reg & RING_FORCE_TO_NONPRIV_ACCESS_MASK) ==
+RING_FORCE_TO_NONPRIV_ACCESS_RD)
return true;
return false;
@@ -760,8 +765,8 @@ static int read_whitelisted_registers(struct
i915_gem_context *ctx,
u64 offset = results->node.start + s
Re: [Intel-gfx] [PATCH v2 1/5] drm/i915: Rename "_load"/"_unload" to match PCI entry points
Quoting Janusz Krzysztofik (2019-07-11 10:31:53) > Current names of i915_driver_load/unload() functions originate in > legacy DRM stubs. Reduce nomenclature ambiguity by renaming them to > match their current use as helpers called from PCI entry points. > > Suggested by: Chris Wilson > Signed-off-by: Janusz Krzysztofik Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/5] drm/i915: Replace "_load" with "_probe" consequently
Quoting Janusz Krzysztofik (2019-07-11 10:31:54) > Use the "_probe" nomenclature not only in i915_driver_probe() helper > name but also in other related function / variable names for > consistency. > Only the userspace exposed name of a related module > parameter is left untouched. Syncing with IGT, I think we could also change the module parameter name. > Signed-off-by: Janusz Krzysztofik Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Propagate "_release" function name suffix down
Quoting Janusz Krzysztofik (2019-07-11 10:31:55) > Replace mixed "_fini"/"_cleanup"/"_cleanup_hw" suffixes found in names > of fucntions called from i915_driver_release() with "_release" suffix > consistently. This provides better code readability, especially > helpful when trying to work out which phase the code is in. > > Functions names starting with "i915_driver_", i.e., those defined in > drivers/gpu/dri/i915/i915_drv.c, just have their "cleanup" or "fini" > parts of their names replaced with the "_release" suffix, while names > of functions coming from other source files have been suffixed with > "_driver_release" to avoid ambiguity with other possible .release entry > points. > > v2: early_probe pairs better with late_release (Chris) > > Suggested-by: Chris Wilson > Signed-off-by: Janusz Krzysztofik Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Propagate "_release" function name suffix down
Quoting Janusz Krzysztofik (2019-07-11 10:31:55) > Replace mixed "_fini"/"_cleanup"/"_cleanup_hw" suffixes found in names > of fucntions called from i915_driver_release() with "_release" suffix ^- typo Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/5] drm/i915: Propagate "_remove" function name suffix down
Quoting Janusz Krzysztofik (2019-07-11 10:31:56) > Similar to the "_release" case, consistently replace mixed > "_cleanup"/"_fini"/"_fini_hw" components found in names of functions > called from i915_driver_remove() with "_remove" or "_driver_remove" > suffixes for better code readability. > > Signed-off-by: Janusz Krzysztofik Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Propagate "_probe" function name suffix down
Quoting Janusz Krzysztofik (2019-07-11 10:31:57) > Similar to the "_release" and "_remove" cases, consequently replace > "_init" components of names of functions called from > i915_driver_probe() with "_probe" suffixes for better code readability. > > Signed-off-by: Janusz Krzysztofik Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 0/5] drm/i915: Rename functions to match their entry points
Quoting Chris Wilson (2019-07-11 10:40:02) > Quoting Janusz Krzysztofik (2019-07-11 08:31:52) > > Need for this was identified while working on split of driver unbind > > path into _remove() and _release() parts. Consistency in function > > naming has been recognized as helpful when trying to work out which > > phase the code is in. > > > > v2: * early_probe pairs better with late_release (Chris), > > * exclude patch 6/6 "drm/i915: Rename "inject_load_failure" module > > parameter" for now, it requires updates on user (IGT) side > > * rebase on top of "drm/i915: Drop extern qualifiers from header > > function prototypes" > > > > Janusz Krzysztofik (5): > > drm/i915: Rename "_load"/"_unload" to match PCI entry points > > drm/i915: Replace "_load" with "_probe" consequently > > drm/i915: Propagate "_release" function name suffix down > > drm/i915: Propagate "_remove" function name suffix down > > drm/i915: Propagate "_probe" function name suffix down > > I'm happy with the chosen names and my main concern is for improving > consistency for ease of discoverability, so Definitely a change for the better. Found one typo, otherwise all good to go. Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v4 15/23] drm: sti: Provide ddc symlink in hdmi connector sysfs directory
Le jeu. 11 juil. 2019 à 13:30, Andrzej Pietrasiewicz a écrit : > > Use the ddc pointer provided by the generic connector. > > Signed-off-by: Andrzej Pietrasiewicz Reviewed-by: Benjamin Gaignard > --- > drivers/gpu/drm/sti/sti_hdmi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c > index f03d617edc4c..90f8db63c095 100644 > --- a/drivers/gpu/drm/sti/sti_hdmi.c > +++ b/drivers/gpu/drm/sti/sti_hdmi.c > @@ -1279,6 +1279,7 @@ static int sti_hdmi_bind(struct device *dev, struct > device *master, void *data) > drm_bridge_attach(encoder, bridge, NULL); > > connector->encoder = encoder; > + drm_connector->ddc = hdmi->ddc_adapt; > > drm_connector = (struct drm_connector *)connector; > > -- > 2.17.1 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Improve whitelist selftest for read-only registers (rev2)
== Series Details ==
Series: Improve whitelist selftest for read-only registers (rev2)
URL : https://patchwork.freedesktop.org/series/63102/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6469 -> Patchwork_13634
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/
Known issues
Here are the changes found in Patchwork_13634 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap_gtt@basic-small-bo:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u3/igt@gem_mmap_...@basic-small-bo.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-icl-u3/igt@gem_mmap_...@basic-small-bo.html
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live_contexts:
- fi-skl-iommu: [INCOMPLETE][5] ([fdo#111050]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-iommu/igt@i915_selftest@live_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-skl-iommu/igt@i915_selftest@live_contexts.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][7] ([fdo#08]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u2: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-glk-dsi: [DMESG-WARN][11] ([fdo#107732]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-glk-dsi: [TIMEOUT][13] -> [PASS][14] +1 similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050
[fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08
Participating hosts (53 -> 46)
--
Missing(7): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-byt-clapper
fi-icl-y fi-icl-dsi fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6469 -> Patchwork_13634
CI_DRM_6469: 67d3a40ce7fe61793ce6f2ce555725c13dd01f2f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13634: 4701077862e78a95e041ca698ab5c8210e12acc5 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4701077862e7 drm/i915: Add engine name to workaround debug print
1c23d7d00d89 drm/i915: Implement read-only support in whitelist selftest
2c166060d840 drm/i915: Add test for invalid flag bits in whitelist entries
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/
___
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[Intel-gfx] [CI] drm/i915/gtt: Use shallow dma pages for scratch
We only use the dma pages for scratch, and so do not need to allocate
the extra storage for the shadow page directory.
v2: Refrain from reintroducing I915_PDES
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 196
drivers/gpu/drm/i915/i915_gem_gtt.h | 23 +++-
2 files changed, 100 insertions(+), 119 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 236c964dd761..1e6021e75993 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -594,26 +594,17 @@ static void cleanup_page_dma(struct i915_address_space
*vm,
#define kmap_atomic_px(px) kmap_atomic(px_base(px)->page)
-#define fill_px(vm, px, v) fill_page_dma((vm), px_base(px), (v))
-#define fill32_px(vm, px, v) fill_page_dma_32((vm), px_base(px), (v))
-
-static void fill_page_dma(struct i915_address_space *vm,
- struct i915_page_dma *p,
- const u64 val)
+static void
+fill_page_dma(const struct i915_page_dma *p, const u64 val, unsigned int count)
{
- u64 * const vaddr = kmap_atomic(p->page);
-
- memset64(vaddr, val, PAGE_SIZE / sizeof(val));
-
- kunmap_atomic(vaddr);
+ kunmap_atomic(memset64(kmap_atomic(p->page), val, count));
}
-static void fill_page_dma_32(struct i915_address_space *vm,
-struct i915_page_dma *p,
-const u32 v)
-{
- fill_page_dma(vm, p, (u64)v << 32 | v);
-}
+#define fill_px(px, v) fill_page_dma(px_base(px), (v), PAGE_SIZE / sizeof(u64))
+#define fill32_px(px, v) do { \
+ u64 v__ = lower_32_bits(v); \
+ fill_px((px), v__ << 32 | v__); \
+} while (0)
static int
setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
@@ -687,6 +678,21 @@ static void cleanup_scratch_page(struct i915_address_space
*vm)
__free_pages(p->page, order);
}
+static void free_scratch(struct i915_address_space *vm)
+{
+ if (!vm->scratch_page.daddr) /* set to 0 on clones */
+ return;
+
+ if (vm->scratch_pdp.daddr)
+ cleanup_page_dma(vm, &vm->scratch_pdp);
+ if (vm->scratch_pd.daddr)
+ cleanup_page_dma(vm, &vm->scratch_pd);
+ if (vm->scratch_pt.daddr)
+ cleanup_page_dma(vm, &vm->scratch_pt);
+
+ cleanup_scratch_page(vm);
+}
+
static struct i915_page_table *alloc_pt(struct i915_address_space *vm)
{
struct i915_page_table *pt;
@@ -711,18 +717,6 @@ static void free_pt(struct i915_address_space *vm, struct
i915_page_table *pt)
kfree(pt);
}
-static void gen8_initialize_pt(struct i915_address_space *vm,
- struct i915_page_table *pt)
-{
- fill_px(vm, pt, vm->scratch_pte);
-}
-
-static void gen6_initialize_pt(struct i915_address_space *vm,
- struct i915_page_table *pt)
-{
- fill32_px(vm, pt, vm->scratch_pte);
-}
-
static struct i915_page_directory *__alloc_pd(void)
{
struct i915_page_directory *pd;
@@ -765,9 +759,11 @@ static void free_pd(struct i915_address_space *vm,
kfree(pd);
}
-#define init_pd(vm, pd, to) { \
- fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \
- memset_p((pd)->entry, (to), 512); \
+static void init_pd(struct i915_page_directory *pd,
+ struct i915_page_dma *scratch)
+{
+ fill_px(pd, gen8_pde_encode(scratch->daddr, I915_CACHE_LLC));
+ memset_p(pd->entry, scratch, 512);
}
static inline void
@@ -869,12 +865,11 @@ static void gen8_ppgtt_clear_pd(struct i915_address_space
*vm,
u32 pde;
gen8_for_each_pde(pt, pd, start, length, pde) {
- GEM_BUG_ON(pt == vm->scratch_pt);
+ GEM_BUG_ON(px_base(pt) == &vm->scratch_pt);
atomic_inc(&pt->used);
gen8_ppgtt_clear_pt(vm, pt, start, length);
- if (release_pd_entry(pd, pde, &pt->used,
-px_base(vm->scratch_pt)))
+ if (release_pd_entry(pd, pde, &pt->used, &vm->scratch_pt))
free_pt(vm, pt);
}
}
@@ -890,12 +885,11 @@ static void gen8_ppgtt_clear_pdp(struct
i915_address_space *vm,
unsigned int pdpe;
gen8_for_each_pdpe(pd, pdp, start, length, pdpe) {
- GEM_BUG_ON(pd == vm->scratch_pd);
+ GEM_BUG_ON(px_base(pd) == &vm->scratch_pd);
atomic_inc(&pd->used);
gen8_ppgtt_clear_pd(vm, pd, start, length);
- if (release_pd_entry(pdp, pdpe, &pd->used,
-px_base(vm->scratch_pd)))
+ if (release_pd_entry(pdp, pdpe, &pd->used, &vm->scratch_p
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Use shallow dma pages for scratch (rev2)
== Series Details == Series: drm/i915/gtt: Use shallow dma pages for scratch (rev2) URL : https://patchwork.freedesktop.org/series/63595/ State : warning == Summary == $ dim checkpatch origin/drm-tip 820b8449637c drm/i915/gtt: Use shallow dma pages for scratch -:540: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'px' - possible side-effects? #540: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:262: +#define px_base(px) \ + __px_choose_expr(px, struct i915_page_dma *, __x, \ + __px_choose_expr(px, struct i915_page_table *, &__x->base, \ + __px_choose_expr(px, struct i915_page_directory *, &__x->base, \ + (void)0))) total: 0 errors, 0 warnings, 1 checks, 501 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] dma-buf: Expand reservation_list to fill allocation
Since kmalloc() will round up the allocation to the next slab size or
page, it will normally return a pointer to a memory block bigger than we
asked for. We can query for the actual size of the allocated block using
ksize() and expand our variable size reservation_list to take advantage
of that extra space.
Signed-off-by: Chris Wilson
Cc: Christian König
Cc: Michel Dänzer
---
drivers/dma-buf/reservation.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index a6ac2b3a0185..80ecc1283d15 100644
--- a/drivers/dma-buf/reservation.c
+++ b/drivers/dma-buf/reservation.c
@@ -153,7 +153,9 @@ int reservation_object_reserve_shared(struct
reservation_object *obj,
RCU_INIT_POINTER(new->shared[j++], fence);
}
new->shared_count = j;
- new->shared_max = max;
+ new->shared_max =
+ (ksize(new) - offsetof(typeof(*new), shared)) /
+ sizeof(*new->shared);
preempt_disable();
write_seqcount_begin(&obj->seq);
@@ -169,7 +171,7 @@ int reservation_object_reserve_shared(struct
reservation_object *obj,
return 0;
/* Drop the references to the signaled fences */
- for (i = k; i < new->shared_max; ++i) {
+ for (i = k; i < max; ++i) {
struct dma_fence *fence;
fence = rcu_dereference_protected(new->shared[i],
--
2.22.0
___
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[Intel-gfx] [PATCH 2/2] dma-buf: Relax the write-seqlock for reallocating the shared fence list
As the set of shared fences is not being changed during reallocation of the reservation list, we can skip updating the write_seqlock. Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: Christian König --- drivers/dma-buf/reservation.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c index 80ecc1283d15..c71b85c8c159 100644 --- a/drivers/dma-buf/reservation.c +++ b/drivers/dma-buf/reservation.c @@ -157,15 +157,15 @@ int reservation_object_reserve_shared(struct reservation_object *obj, (ksize(new) - offsetof(typeof(*new), shared)) / sizeof(*new->shared); - preempt_disable(); - write_seqcount_begin(&obj->seq); /* -* RCU_INIT_POINTER can be used here, -* seqcount provides the necessary barriers +* We are not changing the effective set of fences here so can +* merely update the pointer to the new array; both existing +* readers and new readers will see exactly the same set of +* active (unsignaled) shared fences. Individual fences and the +* old array are protected by RCU and so will not vanish under +* the gaze of the rcu_read_lock() readers. */ - RCU_INIT_POINTER(obj->fence, new); - write_seqcount_end(&obj->seq); - preempt_enable(); + rcu_assign_pointer(obj->fence, new); if (!old) return 0; -- 2.22.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gtt: Use shallow dma pages for scratch (rev2)
== Series Details == Series: drm/i915/gtt: Use shallow dma pages for scratch (rev2) URL : https://patchwork.freedesktop.org/series/63595/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/gtt: Use shallow dma pages for scratch -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1367:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1367:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1416:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1416:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1480:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1480:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1345:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1345:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1394:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1394:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1458:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1458:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1763:44: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1763:44: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1845:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1845:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1741:44: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1741:44: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1823:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1823:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:871:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:871:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:892:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:892:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:923:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:923:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:867:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:867:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:887:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:887:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:917:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:917:9: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] Revert "drm/i915: Introduce private PAT management"
+ Zhenyu as FYI Quoting Chris Wilson (2019-07-02 14:56:04) > Quoting Michał Winiarski (2019-07-02 12:31:48) > > This reverts commit 4395890a48551982549d222d1923e2833dac47cf. > > > > It's been over a year since this was merged, and the actual users of > > intel_ppat_get / intel_ppat_put never materialized. > > > > Time to remove it! > > > > v2: Unbreak suspend (Chris) > > v3: Rebase, drop fixes tag to avoid confusion > > > > Signed-off-by: Michał Winiarski > > Cc: Chris Wilson > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi > > Cc: Zhi Wang > Reviewed-by: Chris Wilson > > While I would appreciate an ack from Zhi (being the original author), > since we've already sent this a few times, there's no reason to delay > waiting for a response. > -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm/i915: Fix wrong escape clock divisor init for GLK
According to Bspec clock divisor registers in GeminiLake
should be initialized by shifting 1(<<) to amount of correspondent
divisor. While i915 was writing all this time that value as is.
Surprisingly that it by accident worked, until we met some issues
with Microtech Etab.
v2: Added Fixes tag and cc
v3: Added stable to cc as well.
Signed-off-by: stanislav.lisovs...@intel.com
Reviewed-by: Vandita Kulkarni
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=108826
Fixes: bcc657004841 ("drm/i915/glk: Program txesc clock divider for GLK")
Cc: Deepak M
Cc: Madhav Chauhan
Cc: Jani Nikula
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: intel-gfx@lists.freedesktop.org
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
index 99cc3e2e9c2c..f016a776a39e 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -396,8 +396,8 @@ static void glk_dsi_program_esc_clock(struct drm_device
*dev,
else
txesc2_div = 10;
- I915_WRITE(MIPIO_TXESC_CLK_DIV1, txesc1_div & GLK_TX_ESC_CLK_DIV1_MASK);
- I915_WRITE(MIPIO_TXESC_CLK_DIV2, txesc2_div & GLK_TX_ESC_CLK_DIV2_MASK);
+ I915_WRITE(MIPIO_TXESC_CLK_DIV1, (1 << (txesc1_div - 1)) &
GLK_TX_ESC_CLK_DIV1_MASK);
+ I915_WRITE(MIPIO_TXESC_CLK_DIV2, (1 << (txesc2_div - 1)) &
GLK_TX_ESC_CLK_DIV2_MASK);
}
/* Program BXT Mipi clocks and dividers */
--
2.17.1
___
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[Intel-gfx] [PATCH] drm/i915/selftests: Ignore self-preemption suppression under gvt
GVT forces single port submission of individual requests. We do not enjoy the context amalgamation that the test depends upon for setting up the test (where port 0 has a large number of requests with a priority change somewhere in the middle). Under single request submission of gvt it is quite able for the preemption event to occur while another context is active and so there be a real need to act upon that preemption. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Zhenyu Wang --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c index b9b881ab8e7c..fb70e0e61d5c 100644 --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c @@ -854,6 +854,9 @@ static int live_suppress_self_preempt(void *arg) if (USES_GUC_SUBMISSION(i915)) return 0; /* presume black blox */ + if (intel_vgpu_active(i915)) + return 0; /* GVT forces single port & request submission */ + mutex_lock(&i915->drm.struct_mutex); wakeref = intel_runtime_pm_get(&i915->runtime_pm); -- 2.22.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] Revert "drm/i915: Introduce private PAT management"
On 2019.07.12 11:06:01 +0300, Joonas Lahtinen wrote: > + Zhenyu as FYI > > Quoting Chris Wilson (2019-07-02 14:56:04) > > Quoting Michał Winiarski (2019-07-02 12:31:48) > > > This reverts commit 4395890a48551982549d222d1923e2833dac47cf. > > > > > > It's been over a year since this was merged, and the actual users of > > > intel_ppat_get / intel_ppat_put never materialized. > > > > > > Time to remove it! > > > > > > v2: Unbreak suspend (Chris) > > > v3: Rebase, drop fixes tag to avoid confusion > > > > > > Signed-off-by: Michał Winiarski > > > Cc: Chris Wilson > > > Cc: Joonas Lahtinen > > > Cc: Rodrigo Vivi > > > Cc: Zhi Wang > > Reviewed-by: Chris Wilson > > > > While I would appreciate an ack from Zhi (being the original author), > > since we've already sent this a few times, there's no reason to delay > > waiting for a response. Well I also depend on Zhi for comment here, as previous idea was to manage PPAT allocation between VM/host, but I'm not sure what's left work status there.. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-misc-next-fixes
drm-misc-next-fixes-2019-07-11: Pull request for drm-misc-fixes-next for v5.3: - Revert properties exposed in komeda that need improvement before they become ABI. - Only add modes from the cmdline if they are valid. - Add orientation quirk for GPD MicroPC. - Reduce stack usage in drm selftests. - Fix bochs framebuffer setup. The following changes since commit daed277e4d5ace0883d30b9be245d35c46289f49: Merge tag 'topic/remove-fbcon-notifiers-2019-06-26' into drm-misc-next-fixes (2019-06-26 12:26:34 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2019-07-11 for you to fetch changes up to 7f3bbc0b817b51206948b743331c7441bf918c7f: drm/modes: Skip invalid cmdline mode (2019-07-10 12:11:18 +0200) Pull request for drm-misc-fixes-next for v5.3: - Revert properties exposed in komeda that need improvement before they become ABI. - Only add modes from the cmdline if they are valid. - Add orientation quirk for GPD MicroPC. - Reduce stack usage in drm selftests. - Fix bochs framebuffer setup. Arnd Bergmann (2): drm/selftests: reduce stack usage drm: connector: remove bogus NULL check Daniel Vetter (5): drm/komeda: Remove clock ratio property drm/komeda: remove slave_planes property drm/komeda: remove img_enhancement property drm/komeda: Remove layer_split property MAINTAINERS: maintain drm/arm drivers in drm-misc for now Dmitry Osipenko (1): drm/modes: Skip invalid cmdline mode Gerd Hoffmann (1): drm/bochs: fix framebuffer setup. Hans de Goede (1): drm: panel-orientation-quirks: Add extra quirk table entry for GPD MicroPC james qian wang (Arm Technology China) (2): drm/komeda: Computing layer_split internally drm/komeda: Computing image enhancer internally MAINTAINERS| 4 +- drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 63 -- drivers/gpu/drm/arm/display/komeda/komeda_kms.h| 18 +-- .../gpu/drm/arm/display/komeda/komeda_pipeline.h | 3 +- .../drm/arm/display/komeda/komeda_pipeline_state.c | 15 ++- drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 84 + .../drm/arm/display/komeda/komeda_wb_connector.c | 10 +- drivers/gpu/drm/bochs/bochs.h | 2 +- drivers/gpu/drm/bochs/bochs_hw.c | 14 ++- drivers/gpu/drm/bochs/bochs_kms.c | 3 +- drivers/gpu/drm/drm_client_modeset.c | 3 +- drivers/gpu/drm/drm_connector.c| 2 +- drivers/gpu/drm/drm_modes.c| 14 ++- drivers/gpu/drm/drm_panel_orientation_quirks.c | 12 ++ .../gpu/drm/selftests/test-drm_cmdline_parser.c| 136 - include/drm/drm_modes.h| 2 +- 16 files changed, 109 insertions(+), 276 deletions(-) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] dma-buf: Expand reservation_list to fill allocation
On 2019-07-12 10:03 a.m., Chris Wilson wrote:
> Since kmalloc() will round up the allocation to the next slab size or
> page, it will normally return a pointer to a memory block bigger than we
> asked for. We can query for the actual size of the allocated block using
> ksize() and expand our variable size reservation_list to take advantage
> of that extra space.
>
> Signed-off-by: Chris Wilson
> Cc: Christian König
> Cc: Michel Dänzer
> ---
> drivers/dma-buf/reservation.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
> index a6ac2b3a0185..80ecc1283d15 100644
> --- a/drivers/dma-buf/reservation.c
> +++ b/drivers/dma-buf/reservation.c
> @@ -153,7 +153,9 @@ int reservation_object_reserve_shared(struct
> reservation_object *obj,
> RCU_INIT_POINTER(new->shared[j++], fence);
> }
> new->shared_count = j;
> - new->shared_max = max;
> + new->shared_max =
> + (ksize(new) - offsetof(typeof(*new), shared)) /
> + sizeof(*new->shared);
>
> preempt_disable();
> write_seqcount_begin(&obj->seq);
> @@ -169,7 +171,7 @@ int reservation_object_reserve_shared(struct
> reservation_object *obj,
> return 0;
>
> /* Drop the references to the signaled fences */
> - for (i = k; i < new->shared_max; ++i) {
> + for (i = k; i < max; ++i) {
> struct dma_fence *fence;
>
> fence = rcu_dereference_protected(new->shared[i],
>
Nice, TIL about ksize(), wonder where else that could be used.
Reviewed-by: Michel Dänzer
P.S. According to scripts/get_maintainer.pl , this series should be sent
to more recipients for review.
--
Earthling Michel Dänzer | https://www.amd.com
Libre software enthusiast | Mesa and X developer
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gtt: Use shallow dma pages for scratch (rev2)
== Series Details ==
Series: drm/i915/gtt: Use shallow dma pages for scratch (rev2)
URL : https://patchwork.freedesktop.org/series/63595/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6469 -> Patchwork_13635
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13635/
Known issues
Here are the changes found in Patchwork_13635 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][1] ([fdo#107718]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13635/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][3] ([fdo#08]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13635/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-glk-dsi: [DMESG-WARN][5] ([fdo#107732]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13635/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-glk-dsi: [TIMEOUT][7] -> [PASS][8] +1 similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13635/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732
[fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08
Participating hosts (53 -> 45)
--
Missing(8): fi-kbl-soraka fi-icl-u4 fi-skl-guc fi-byt-squawks fi-bsw-cyan
fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6469 -> Patchwork_13635
CI_DRM_6469: 67d3a40ce7fe61793ce6f2ce555725c13dd01f2f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13635: 820b8449637cf852621c202b818a18d69891ec0e @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
820b8449637c drm/i915/gtt: Use shallow dma pages for scratch
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13635/
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Re: [Intel-gfx] [PATCH 1/2] Revert "drm/i915: Introduce private PAT management"
It's quite a long time ago. I cannot fully remember the whole picture now. I remembered the last status was to push some unit tests and with the last part of patch. Currently I think you can revert this if it causes troubles, we can purpose this again if we need this in future. Thanks, Zhi. -Original Message- From: Zhenyu Wang [mailto:zhen...@linux.intel.com] Sent: Friday, July 12, 2019 11:29 AM To: Joonas Lahtinen Cc: Winiarski, Michal ; Chris Wilson ; intel-gfx@lists.freedesktop.org; Zhenyu Wang ; Vivi, Rodrigo ; Wang, Zhi A Subject: Re: [PATCH 1/2] Revert "drm/i915: Introduce private PAT management" On 2019.07.12 11:06:01 +0300, Joonas Lahtinen wrote: > + Zhenyu as FYI > > Quoting Chris Wilson (2019-07-02 14:56:04) > > Quoting Michał Winiarski (2019-07-02 12:31:48) > > > This reverts commit 4395890a48551982549d222d1923e2833dac47cf. > > > > > > It's been over a year since this was merged, and the actual users > > > of intel_ppat_get / intel_ppat_put never materialized. > > > > > > Time to remove it! > > > > > > v2: Unbreak suspend (Chris) > > > v3: Rebase, drop fixes tag to avoid confusion > > > > > > Signed-off-by: Michał Winiarski > > > Cc: Chris Wilson > > > Cc: Joonas Lahtinen > > > Cc: Rodrigo Vivi > > > Cc: Zhi Wang > > Reviewed-by: Chris Wilson > > > > While I would appreciate an ack from Zhi (being the original > > author), since we've already sent this a few times, there's no > > reason to delay waiting for a response. Well I also depend on Zhi for comment here, as previous idea was to manage PPAT allocation between VM/host, but I'm not sure what's left work status there.. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Add test for invalid flag bits in whitelist entries
On 12/07/2019 08:07, john.c.harri...@intel.com wrote:
From: John Harrison
As per review feedback by Tvrtko, added a check that no invalid bits
are being set in the whitelist flags fields.
Also updated the read/write access definitions to make it clearer that
they are an enum field not a set of single bit flags.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
You lost all my r-b's.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 29 +++
.../gpu/drm/i915/gt/selftest_workarounds.c| 14 ++---
drivers/gpu/drm/i915/i915_reg.h | 12 ++--
3 files changed, 42 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 9e069286d3ce..95be0f108f26 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1011,6 +1011,20 @@ bool intel_gt_verify_workarounds(struct intel_gt *gt,
const char *from)
return wa_list_verify(gt->uncore, >->i915->gt_wa_list, from);
}
+static inline bool is_nonpriv_flags_valid(u32 flags)
+{
+ /* Check only valid flag bits are set */
+ if (flags & ~RING_FORCE_TO_NONPRIV_MASK_VALID)
+ return false;
+
+ /* NB: Only 3 out of 4 enum values are valid for access field */
+ if ((flags & RING_FORCE_TO_NONPRIV_ACCESS_MASK) ==
+ RING_FORCE_TO_NONPRIV_ACCESS_INVALID)
+ return false;
+
+ return true;
+}
+
static void
whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t reg, u32 flags)
{
@@ -1021,6 +1035,9 @@ whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t
reg, u32 flags)
if (GEM_DEBUG_WARN_ON(wal->count >= RING_MAX_NONPRIV_SLOTS))
return;
+ if (GEM_DEBUG_WARN_ON(!is_nonpriv_flags_valid(flags)))
+ return;
+
wa.reg.reg |= flags;
_wa_add(wal, &wa);
}
@@ -1028,7 +1045,7 @@ whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t
reg, u32 flags)
static void
whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg)
{
- whitelist_reg_ext(wal, reg, RING_FORCE_TO_NONPRIV_RW);
+ whitelist_reg_ext(wal, reg, RING_FORCE_TO_NONPRIV_ACCESS_RW);
}
static void gen9_whitelist_build(struct i915_wa_list *w)
@@ -1109,7 +1126,7 @@ static void cfl_whitelist_build(struct intel_engine_cs
*engine)
* - PS_DEPTH_COUNT_UDW
*/
whitelist_reg_ext(w, PS_INVOCATION_COUNT,
- RING_FORCE_TO_NONPRIV_RD |
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
RING_FORCE_TO_NONPRIV_RANGE_4);
}
@@ -1149,20 +1166,20 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)
* - PS_DEPTH_COUNT_UDW
*/
whitelist_reg_ext(w, PS_INVOCATION_COUNT,
- RING_FORCE_TO_NONPRIV_RD |
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
RING_FORCE_TO_NONPRIV_RANGE_4);
break;
case VIDEO_DECODE_CLASS:
/* hucStatusRegOffset */
whitelist_reg_ext(w, _MMIO(0x2000 + engine->mmio_base),
- RING_FORCE_TO_NONPRIV_RD);
+ RING_FORCE_TO_NONPRIV_ACCESS_RD);
/* hucUKernelHdrInfoRegOffset */
whitelist_reg_ext(w, _MMIO(0x2014 + engine->mmio_base),
- RING_FORCE_TO_NONPRIV_RD);
+ RING_FORCE_TO_NONPRIV_ACCESS_RD);
/* hucStatus2RegOffset */
whitelist_reg_ext(w, _MMIO(0x23B0 + engine->mmio_base),
- RING_FORCE_TO_NONPRIV_RD);
+ RING_FORCE_TO_NONPRIV_ACCESS_RD);
break;
default:
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index fa01ea7855de..466dcc8214c3 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -397,6 +397,10 @@ static bool wo_register(struct intel_engine_cs *engine,
u32 reg)
enum intel_platform platform = INTEL_INFO(engine->i915)->platform;
int i;
+ if ((reg & RING_FORCE_TO_NONPRIV_ACCESS_MASK) ==
+RING_FORCE_TO_NONPRIV_ACCESS_WR)
+ return true;
+
for (i = 0; i < ARRAY_SIZE(wo_registers); i++) {
if (wo_registers[i].platform == platform &&
wo_registers[i].reg == reg)
@@ -408,7 +412,8 @@ static bool wo_register(struct intel_engine_cs *engine, u32
reg)
static bool ro_register(u32 reg)
{
- if (reg & RING_FORCE_TO_NONPRIV_RD)
+ if ((reg & RING_FORCE_TO_NONPRIV_ACCESS_MASK) ==
+RING_FORCE_TO_NONPRIV_ACCESS_RD)
return true;
return false;
@@
Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Add engine name to workaround debug print
On 12/07/2019 08:07, john.c.harri...@intel.com wrote:
From: John Harrison
There is a debug message in the workaround initialisation path that
reports how many entries were added of each type. However, whitelist
workarounds exist for multiple engines but the type name is just
'whitelist'. Tvrtko suggested adding the engine name to make the
message more useful.
v2: Updated the similar message in the workaround reset selftest.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 15 ---
.../gpu/drm/i915/gt/intel_workarounds_types.h | 1 +
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 17 +
3 files changed, 14 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 95be0f108f26..3b1fc7c8faa8 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -50,9 +50,10 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name)
+static void wa_init_start(struct i915_wa_list *wal, const char *name, const
char *engine_name)
{
wal->name = name;
+ wal->engine_name = engine_name;
}
#define WA_LIST_CHUNK (1 << 4)
@@ -74,8 +75,8 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds\n",
-wal->wa_count, wal->name);
+ DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
+wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
@@ -591,7 +592,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
if (engine->class != RENDER_CLASS)
return;
- wa_init_start(wal, name);
+ wa_init_start(wal, name, engine->name);
if (IS_GEN(i915, 11))
icl_ctx_workarounds_init(engine, wal);
@@ -921,7 +922,7 @@ void intel_gt_init_workarounds(struct drm_i915_private
*i915)
{
struct i915_wa_list *wal = &i915->gt_wa_list;
- wa_init_start(wal, "GT");
+ wa_init_start(wal, "GT", "global");
gt_init_workarounds(i915, wal);
wa_init_finish(wal);
}
@@ -1192,7 +1193,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs
*engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist");
+ wa_init_start(w, "whitelist", engine->name);
if (IS_GEN(i915, 11))
icl_whitelist_build(engine);
@@ -1384,7 +1385,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs
*engine)
if (INTEL_GEN(engine->i915) < 8)
return;
- wa_init_start(wal, engine->name);
+ wa_init_start(wal, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 42ac1fb99572..e27ab1b710b3 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -20,6 +20,7 @@ struct i915_wa {
struct i915_wa_list {
const char *name;
+ const char *engine_name;
struct i915_wa *list;
unsigned intcount;
unsigned intwa_count;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index fd1d47ba4b10..a0d8f1bfe0ad 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -25,11 +25,9 @@ static const struct wo_register {
{ INTEL_GEMINILAKE, 0x731c }
};
-#define REF_NAME_MAX (INTEL_ENGINE_CS_MAX_NAME + 8)
struct wa_lists {
struct i915_wa_list gt_wa_list;
struct {
- char name[REF_NAME_MAX];
struct i915_wa_list wa_list;
struct i915_wa_list ctx_wa_list;
} engine[I915_NUM_ENGINES];
@@ -43,25 +41,20 @@ reference_lists_init(struct drm_i915_private *i915, struct
wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF");
+ wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
gt_init_workarounds(i915, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, i915, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- char *name = lists->engine[id].name;
- snprintf(name, REF_NAME_MAX, "%s_REF", engine->name);
-
- wa_init_start(wal, name);
+ wa_init_start(wal, "REF", engine->name);
eng
Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Implement read-only support in whitelist selftest
On 12/07/2019 08:07, john.c.harri...@intel.com wrote:
From: John Harrison
Newer hardware supports extra feature in the whitelist registers. This
patch updates the selftest to test that entries marked as read only
are actually read only.
v2: Removed all use of 'rsvd' for read-only registers to avoid
ambiguous code or error messages.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
---
.../gpu/drm/i915/gt/selftest_workarounds.c| 49 +--
1 file changed, 35 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 466dcc8214c3..fd1d47ba4b10 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -485,12 +485,12 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
u32 srm, lrm, rsvd;
u32 expect;
int idx;
+ bool ro_reg;
if (wo_register(engine, reg))
continue;
- if (ro_register(reg))
- continue;
+ ro_reg = ro_register(reg);
srm = MI_STORE_REGISTER_MEM;
lrm = MI_LOAD_REGISTER_MEM;
@@ -591,24 +591,35 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
}
GEM_BUG_ON(values[ARRAY_SIZE(values) - 1] != 0x);
- rsvd = results[ARRAY_SIZE(values)]; /* detect write masking */
- if (!rsvd) {
- pr_err("%s: Unable to write to whitelisted register
%x\n",
- engine->name, reg);
- err = -EINVAL;
- goto out_unpin;
+ if (!ro_reg) {
+ /* detect write masking */
+ rsvd = results[ARRAY_SIZE(values)];
+ if (!rsvd) {
+ pr_err("%s: Unable to write to whitelisted register
%x\n",
+ engine->name, reg);
+ err = -EINVAL;
+ goto out_unpin;
+ }
}
expect = results[0];
idx = 1;
for (v = 0; v < ARRAY_SIZE(values); v++) {
- expect = reg_write(expect, values[v], rsvd);
+ if (ro_reg)
+ expect = results[0];
+ else
+ expect = reg_write(expect, values[v], rsvd);
+
if (results[idx] != expect)
err++;
idx++;
}
for (v = 0; v < ARRAY_SIZE(values); v++) {
- expect = reg_write(expect, ~values[v], rsvd);
+ if (ro_reg)
+ expect = results[0];
+ else
+ expect = reg_write(expect, ~values[v], rsvd);
+
if (results[idx] != expect)
err++;
idx++;
@@ -617,15 +628,22 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
pr_err("%s: %d mismatch between values written to
whitelisted register [%x], and values read back!\n",
engine->name, err, reg);
- pr_info("%s: Whitelisted register: %x, original value %08x, rsvd %08x\n",
- engine->name, reg, results[0], rsvd);
+ if (ro_reg)
+ pr_info("%s: Whitelisted read-only register: %x,
original value %08x\n",
+ engine->name, reg, results[0]);
+ else
+ pr_info("%s: Whitelisted register: %x, original
value %08x, rsvd %08x\n",
+ engine->name, reg, results[0], rsvd);
expect = results[0];
idx = 1;
for (v = 0; v < ARRAY_SIZE(values); v++) {
u32 w = values[v];
-expect = reg_write(expect, w, rsvd);
+ if (ro_reg)
+ expect = results[0];
+ else
+ expect = reg_write(expect, w, rsvd);
pr_info("Wrote %08x, read %08x, expect %08x\n",
w, results[idx], expect);
idx++;
@@ -633,7 +651,10 @@ static int check_dirty_whitelist(struct i915_gem_context
*ctx,
for (v = 0; v < ARRAY_SIZE(values); v++) {
u32 w = ~values[v];
-expect = reg_write(expect, w, rsvd);
+ if (ro_reg)
+
Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Implement read-only support in whitelist selftest
On 12/07/2019 08:07, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Newer hardware supports extra feature in the whitelist registers. This
> patch updates the selftest to test that entries marked as read only
> are actually read only.
>
> v2: Removed all use of 'rsvd' for read-only registers to avoid
> ambiguous code or error messages.
Work's never done. :) You can follow up with a patch which adds engine looping
to live_reset_whitelist.
I was looking at your test results and wondering why no new whitelists:
<6> [486.665700] i915: Running
intel_workarounds_live_selftests/live_reset_whitelist
<6> [486.665706] Checking 4 whitelisted registers on rcs0 (RING_NONPRIV)
[engine]
<7> [486.666281] [drm:intel_power_well_enable [i915]] enabling always-on
<5> [486.668777] i915 :00:02.0: Resetting rcs0 for live_workarounds
<6> [486.669900] Checking 4 whitelisted registers on rcs0 (RING_NONPRIV)
[device]
<5> [486.671042] i915 :00:02.0: Resetting chip for live_workarounds
Regards,
Tvrtko
> Signed-off-by: John Harrison
> CC: Tvrtko Ursulin
> ---
> .../gpu/drm/i915/gt/selftest_workarounds.c| 49 +--
> 1 file changed, 35 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 466dcc8214c3..fd1d47ba4b10 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -485,12 +485,12 @@ static int check_dirty_whitelist(struct
> i915_gem_context *ctx,
> u32 srm, lrm, rsvd;
> u32 expect;
> int idx;
> + bool ro_reg;
>
> if (wo_register(engine, reg))
> continue;
>
> - if (ro_register(reg))
> - continue;
> + ro_reg = ro_register(reg);
>
> srm = MI_STORE_REGISTER_MEM;
> lrm = MI_LOAD_REGISTER_MEM;
> @@ -591,24 +591,35 @@ static int check_dirty_whitelist(struct
> i915_gem_context *ctx,
> }
>
> GEM_BUG_ON(values[ARRAY_SIZE(values) - 1] != 0x);
> - rsvd = results[ARRAY_SIZE(values)]; /* detect write masking */
> - if (!rsvd) {
> - pr_err("%s: Unable to write to whitelisted register
> %x\n",
> -engine->name, reg);
> - err = -EINVAL;
> - goto out_unpin;
> + if (!ro_reg) {
> + /* detect write masking */
> + rsvd = results[ARRAY_SIZE(values)];
> + if (!rsvd) {
> + pr_err("%s: Unable to write to whitelisted
> register %x\n",
> +engine->name, reg);
> + err = -EINVAL;
> + goto out_unpin;
> + }
> }
>
> expect = results[0];
> idx = 1;
> for (v = 0; v < ARRAY_SIZE(values); v++) {
> - expect = reg_write(expect, values[v], rsvd);
> + if (ro_reg)
> + expect = results[0];
> + else
> + expect = reg_write(expect, values[v], rsvd);
> +
> if (results[idx] != expect)
> err++;
> idx++;
> }
> for (v = 0; v < ARRAY_SIZE(values); v++) {
> - expect = reg_write(expect, ~values[v], rsvd);
> + if (ro_reg)
> + expect = results[0];
> + else
> + expect = reg_write(expect, ~values[v], rsvd);
> +
> if (results[idx] != expect)
> err++;
> idx++;
> @@ -617,15 +628,22 @@ static int check_dirty_whitelist(struct
> i915_gem_context *ctx,
> pr_err("%s: %d mismatch between values written to
> whitelisted register [%x], and values read back!\n",
> engine->name, err, reg);
>
> - pr_info("%s: Whitelisted register: %x, original value
> %08x, rsvd %08x\n",
> - engine->name, reg, results[0], rsvd);
> + if (ro_reg)
> + pr_info("%s: Whitelisted read-only register:
> %x, original value %08x\n",
> + engine->name, reg, results[0]);
> + else
> + pr_info("%s: Whitelisted register: %x, original
> value %08x, rsvd %08x\n",
> + engine->name, reg, results[0], rsvd);
>
> expect = results[0];
> idx = 1;
> for (v = 0; v < ARRAY_SIZE(values); v++) {
>
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] dma-buf: Expand reservation_list to fill allocation
== Series Details == Series: series starting with [1/2] dma-buf: Expand reservation_list to fill allocation URL : https://patchwork.freedesktop.org/series/63615/ State : success == Summary == CI Bug Log - changes from CI_DRM_6469 -> Patchwork_13636 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/ Known issues Here are the changes found in Patchwork_13636 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic-small-bo: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u3/igt@gem_m...@basic-small-bo.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-icl-u3/igt@gem_m...@basic-small-bo.html * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [PASS][3] -> [FAIL][4] ([fdo#108511]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-skl-6770hq/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live_reset: - fi-icl-u3: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u3/igt@i915_selftest@live_reset.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-icl-u3/igt@i915_selftest@live_reset.html Possible fixes * igt@i915_selftest@live_contexts: - fi-skl-iommu: [INCOMPLETE][7] ([fdo#111050]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-iommu/igt@i915_selftest@live_contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-skl-iommu/igt@i915_selftest@live_contexts.html * igt@i915_selftest@live_execlists: - fi-skl-gvtdvm: [DMESG-FAIL][9] ([fdo#08]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_hangcheck: - fi-icl-u2: [INCOMPLETE][11] ([fdo#107713] / [fdo#108569]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u2/igt@i915_selftest@live_hangcheck.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-icl-u2/igt@i915_selftest@live_hangcheck.html * igt@kms_pipe_crc_basic@read-crc-pipe-c: - fi-glk-dsi: [DMESG-WARN][13] ([fdo#107732]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-glk-dsi: [TIMEOUT][15] -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732 [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050 [fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08 Participating hosts (53 -> 46) -- Missing(7): fi-kbl-soraka fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6469 -> Patchwork_13636 CI_DRM_6469: 67d3a40ce7fe61793ce6f2ce555725c13dd01f2f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13636: c2c63d1c0213b030aad653e614d282712304c5a5 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c2c63d1c0213 dma-buf: Relax the write-seqlock for reallocating the shared fence list c59821ca560f dma-buf: Expand reservation_list to fill allocation == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13636/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix wrong escape clock divisor init for GLK (rev3)
== Series Details == Series: drm/i915: Fix wrong escape clock divisor init for GLK (rev3) URL : https://patchwork.freedesktop.org/series/63505/ State : warning == Summary == $ dim checkpatch origin/drm-tip bcd7871af13d drm/i915: Fix wrong escape clock divisor init for GLK -:43: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Stanislav Lisovskiy ' total: 0 errors, 1 warnings, 0 checks, 10 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✓ Fi.CI.BAT: success for Improve whitelist selftest for read-only registers (rev2)
On 12/07/2019 08:55, Patchwork wrote:
== Series Details ==
Series: Improve whitelist selftest for read-only registers (rev2)
URL : https://patchwork.freedesktop.org/series/63102/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6469 -> Patchwork_13634
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/
Known issues
Here are the changes found in Patchwork_13634 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap_gtt@basic-small-bo:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u3/igt@gem_mmap_...@basic-small-bo.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-icl-u3/igt@gem_mmap_...@basic-small-bo.html
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live_contexts:
- fi-skl-iommu: [INCOMPLETE][5] ([fdo#111050]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-iommu/igt@i915_selftest@live_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-skl-iommu/igt@i915_selftest@live_contexts.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][7] ([fdo#08]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u2: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-glk-dsi: [DMESG-WARN][11] ([fdo#107732]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-glk-dsi: [TIMEOUT][13] -> [PASS][14] +1 similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050
[fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08
Participating hosts (53 -> 46)
--
Missing(7): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-byt-clapper
fi-icl-y fi-icl-dsi fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6469 -> Patchwork_13634
CI_DRM_6469: 67d3a40ce7fe61793ce6f2ce555725c13dd01f2f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13634: 4701077862e78a95e041ca698ab5c8210e12acc5 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4701077862e7 drm/i915: Add engine name to workaround debug print
1c23d7d00d89 drm/i915: Implement read-only support in whitelist selftest
2c166060d840 drm/i915: Add test for invalid flag bits in whitelist entries
Pushed, thanks.
Regards,
Tvrtko
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13634/
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/5] drm/i915: Replace "_load" with "_probe" consequently
On Friday, July 12, 2019 9:36:31 AM CEST Joonas Lahtinen wrote: > Quoting Janusz Krzysztofik (2019-07-11 10:31:54) > > Use the "_probe" nomenclature not only in i915_driver_probe() helper > > name but also in other related function / variable names for > > consistency. > > > Only the userspace exposed name of a related module > > parameter is left untouched. > > Syncing with IGT, I think we could also change the module parameter > name. There was a patch for that in RFC v1 of the series, I've excluded it from v2 just because it requires a corresponding patch on IGT side which I haven't had prepared yet. I'm going to submit both soon. Thanks, Janusz > > > Signed-off-by: Janusz Krzysztofik > > Reviewed-by: Joonas Lahtinen > > Regards, Joonas > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix wrong escape clock divisor init for GLK (rev3)
== Series Details == Series: drm/i915: Fix wrong escape clock divisor init for GLK (rev3) URL : https://patchwork.freedesktop.org/series/63505/ State : success == Summary == CI Bug Log - changes from CI_DRM_6469 -> Patchwork_13637 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/ Known issues Here are the changes found in Patchwork_13637 that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_rpm@module-reload: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u3/igt@i915_pm_...@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-icl-u3/igt@i915_pm_...@module-reload.html Possible fixes * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html * igt@i915_selftest@live_contexts: - fi-skl-iommu: [INCOMPLETE][5] ([fdo#111050]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-iommu/igt@i915_selftest@live_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-skl-iommu/igt@i915_selftest@live_contexts.html * igt@i915_selftest@live_execlists: - fi-skl-gvtdvm: [DMESG-FAIL][7] ([fdo#08]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_hangcheck: - fi-icl-u2: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-icl-u2/igt@i915_selftest@live_hangcheck.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-icl-u2/igt@i915_selftest@live_hangcheck.html * igt@kms_pipe_crc_basic@read-crc-pipe-c: - fi-glk-dsi: [DMESG-WARN][11] ([fdo#107732]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-glk-dsi/igt@kms_pipe_crc_ba...@read-crc-pipe-c.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-glk-dsi: [TIMEOUT][13] ([fdo#16]) -> [PASS][14] +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6469/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/fi-glk-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050 [fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08 [fdo#16]: https://bugs.freedesktop.org/show_bug.cgi?id=16 Participating hosts (53 -> 45) -- Missing(8): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-gdg-551 fi-icl-y fi-icl-dsi fi-bdw-samus Build changes - * Linux: CI_DRM_6469 -> Patchwork_13637 CI_DRM_6469: 67d3a40ce7fe61793ce6f2ce555725c13dd01f2f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13637: bcd7871af13db29203da8aef56780b1dfef07860 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == bcd7871af13d drm/i915: Fix wrong escape clock divisor init for GLK == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13637/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 6/6] drm/i915/gtt: Use NULL to encode scratch shadow entries
We can simplify our gtt walking code by comparing against NULL for
scratch entries as opposed to looking up the distinct per-level scratch
pointer.
The only caveat is to remember to protect external parties and map the
NULL to the scratch top pd.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 107 +---
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
2 files changed, 33 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 16bcf2163ae0..753090a7729e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -710,7 +710,6 @@ static struct i915_page_table *alloc_pt(struct
i915_address_space *vm)
}
atomic_set(&pt->used, 0);
-
return pt;
}
@@ -718,13 +717,11 @@ static struct i915_page_directory *__alloc_pd(void)
{
struct i915_page_directory *pd;
- pd = kmalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
+ pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
if (unlikely(!pd))
return NULL;
- atomic_set(px_used(pd), 0);
spin_lock_init(&pd->lock);
-
return pd;
}
@@ -752,63 +749,56 @@ static void free_pd(struct i915_address_space *vm, struct
i915_page_dma *pd)
#define free_px(vm, px) free_pd(vm, px_base(px))
-static void init_pd(struct i915_page_directory *pd,
- struct i915_page_scratch *scratch)
-{
- fill_px(pd, scratch->encode);
- memset_p(pd->entry, scratch, 512);
-}
-
static inline void
write_dma_entry(struct i915_page_dma * const pdma,
- const unsigned short pde,
+ const unsigned short idx,
const u64 encoded_entry)
{
u64 * const vaddr = kmap_atomic(pdma->page);
- vaddr[pde] = encoded_entry;
+ vaddr[idx] = encoded_entry;
kunmap_atomic(vaddr);
}
static inline void
__set_pd_entry(struct i915_page_directory * const pd,
- const unsigned short pde,
+ const unsigned short idx,
struct i915_page_dma * const to,
u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
{
GEM_BUG_ON(atomic_read(px_used(pd)) > 512);
atomic_inc(px_used(pd));
- pd->entry[pde] = to;
- write_dma_entry(px_base(pd), pde, encode(to->daddr, I915_CACHE_LLC));
+ pd->entry[idx] = to;
+ write_dma_entry(px_base(pd), idx, encode(to->daddr, I915_CACHE_LLC));
}
-#define set_pd_entry(pd, pde, to) \
- __set_pd_entry((pd), (pde), px_base(to), gen8_pde_encode)
+#define set_pd_entry(pd, idx, to) \
+ __set_pd_entry((pd), (idx), px_base(to), gen8_pde_encode)
static inline void
clear_pd_entry(struct i915_page_directory * const pd,
- const unsigned short pde,
- struct i915_page_scratch * const scratch)
+ const unsigned short idx,
+ const struct i915_page_scratch * const scratch)
{
GEM_BUG_ON(atomic_read(px_used(pd)) == 0);
- write_dma_entry(px_base(pd), pde, scratch->encode);
- pd->entry[pde] = scratch;
+ write_dma_entry(px_base(pd), idx, scratch->encode);
+ pd->entry[idx] = NULL;
atomic_dec(px_used(pd));
}
static bool
release_pd_entry(struct i915_page_directory * const pd,
-const unsigned short pde,
+const unsigned short idx,
struct i915_page_table * const pt,
-struct i915_page_scratch * const scratch)
+const struct i915_page_scratch * const scratch)
{
bool free = false;
spin_lock(&pd->lock);
if (atomic_dec_and_test(&pt->used)) {
- clear_pd_entry(pd, pde, scratch);
+ clear_pd_entry(pd, idx, scratch);
free = true;
}
spin_unlock(&pd->lock);
@@ -912,7 +902,7 @@ static void gen8_free_page_tables(struct i915_address_space
*vm,
int i;
for (i = 0; i < I915_PDES; i++) {
- if (pd->entry[i] != &vm->scratch[1])
+ if (pd->entry[i])
free_pd(vm, pd->entry[i]);
}
}
@@ -924,7 +914,7 @@ static void gen8_ppgtt_cleanup_3lvl(struct
i915_address_space *vm,
int i;
for (i = 0; i < pdpes; i++) {
- if (pdp->entry[i] == &vm->scratch[2])
+ if (!pdp->entry[i])
continue;
gen8_free_page_tables(vm, pdp->entry[i]);
@@ -942,7 +932,7 @@ static void gen8_ppgtt_cleanup_4lvl(struct i915_ppgtt
*ppgtt)
for (i = 0; i < GEN8_PML4ES_PER_PML4; i++) {
struct i915_page_directory *pdp = i915_pdp_entry(pml4, i);
- if (px_base(pdp) == px_base(&ppgtt->vm.scratch[3]))
+ if (!pdp)
continue;
gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, pdp);
@@ -996,8 +986,6 @@ static void gen8_ppgtt_clear_pd(s
[Intel-gfx] [CI 2/6] drm/i915/gtt: Reorder gen8 ppgtt free/clear/alloc
In preparation for refactoring the free/clear/alloc, first move the code
around so that we can avoid forward declarations in the next set of
patches.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 673 ++--
1 file changed, 337 insertions(+), 336 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b2aa44103fb0..abb2e3e4bbbc 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -830,6 +830,104 @@ static void mark_tlbs_dirty(struct i915_ppgtt *ppgtt)
ppgtt->pd_dirty_engines = ALL_ENGINES;
}
+static int gen8_ppgtt_notify_vgt(struct i915_ppgtt *ppgtt, bool create)
+{
+ struct i915_address_space *vm = &ppgtt->vm;
+ struct drm_i915_private *dev_priv = vm->i915;
+ enum vgt_g2v_type msg;
+ int i;
+
+ if (create)
+ atomic_inc(px_used(ppgtt->pd)); /* never remove */
+ else
+ atomic_dec(px_used(ppgtt->pd));
+
+ if (i915_vm_is_4lvl(vm)) {
+ const u64 daddr = px_dma(ppgtt->pd);
+
+ I915_WRITE(vgtif_reg(pdp[0].lo), lower_32_bits(daddr));
+ I915_WRITE(vgtif_reg(pdp[0].hi), upper_32_bits(daddr));
+
+ msg = (create ? VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE :
+ VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY);
+ } else {
+ for (i = 0; i < GEN8_3LVL_PDPES; i++) {
+ const u64 daddr = i915_page_dir_dma_addr(ppgtt, i);
+
+ I915_WRITE(vgtif_reg(pdp[i].lo), lower_32_bits(daddr));
+ I915_WRITE(vgtif_reg(pdp[i].hi), upper_32_bits(daddr));
+ }
+
+ msg = (create ? VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE :
+ VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY);
+ }
+
+ I915_WRITE(vgtif_reg(g2v_notify), msg);
+
+ return 0;
+}
+
+static void gen8_free_page_tables(struct i915_address_space *vm,
+ struct i915_page_directory *pd)
+{
+ int i;
+
+ for (i = 0; i < I915_PDES; i++) {
+ if (pd->entry[i] != &vm->scratch_pt)
+ free_pd(vm, pd->entry[i]);
+ }
+}
+
+static void gen8_ppgtt_cleanup_3lvl(struct i915_address_space *vm,
+ struct i915_page_directory *pdp)
+{
+ const unsigned int pdpes = i915_pdpes_per_pdp(vm);
+ int i;
+
+ for (i = 0; i < pdpes; i++) {
+ if (pdp->entry[i] == &vm->scratch_pd)
+ continue;
+
+ gen8_free_page_tables(vm, pdp->entry[i]);
+ free_pd(vm, pdp->entry[i]);
+ }
+
+ free_px(vm, pdp);
+}
+
+static void gen8_ppgtt_cleanup_4lvl(struct i915_ppgtt *ppgtt)
+{
+ struct i915_page_directory * const pml4 = ppgtt->pd;
+ int i;
+
+ for (i = 0; i < GEN8_PML4ES_PER_PML4; i++) {
+ struct i915_page_directory *pdp = i915_pdp_entry(pml4, i);
+
+ if (px_base(pdp) == &ppgtt->vm.scratch_pdp)
+ continue;
+
+ gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, pdp);
+ }
+
+ free_px(&ppgtt->vm, pml4);
+}
+
+static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
+{
+ struct drm_i915_private *i915 = vm->i915;
+ struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+
+ if (intel_vgpu_active(i915))
+ gen8_ppgtt_notify_vgt(ppgtt, false);
+
+ if (i915_vm_is_4lvl(vm))
+ gen8_ppgtt_cleanup_4lvl(ppgtt);
+ else
+ gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, ppgtt->pd);
+
+ free_scratch(vm);
+}
+
/* Removes entries from a single page table, releasing it if it's empty.
* Caller can use the return value to update higher-level entries.
*/
@@ -916,95 +1014,265 @@ static void gen8_ppgtt_clear_4lvl(struct
i915_address_space *vm,
}
}
-static inline struct sgt_dma {
- struct scatterlist *sg;
- dma_addr_t dma, max;
-} sgt_dma(struct i915_vma *vma) {
- struct scatterlist *sg = vma->pages->sgl;
- dma_addr_t addr = sg_dma_address(sg);
- return (struct sgt_dma) { sg, addr, addr + sg->length };
-}
-
-struct gen8_insert_pte {
- u16 pml4e;
- u16 pdpe;
- u16 pde;
- u16 pte;
-};
-static __always_inline struct gen8_insert_pte gen8_insert_pte(u64 start)
+static int gen8_ppgtt_alloc_pd(struct i915_address_space *vm,
+ struct i915_page_directory *pd,
+ u64 start, u64 length)
{
- return (struct gen8_insert_pte) {
-gen8_pml4e_index(start),
-gen8_pdpe_index(start),
-gen8_pde_index(start),
-gen8_pte_index(start),
- };
-}
+ struct i915_page_table *pt, *alloc = NULL;
+ u64 from = start;
+ unsigned int pde;
+ int ret = 0;
-static __always_inl
[Intel-gfx] [CI 1/6] drm/i915/gtt: Wrap page_table with page_directory
The page directory extends the page table with the shadow entries. Make
the page directory struct embed the page table for easier code reuse.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c| 100 ++---
drivers/gpu/drm/i915/i915_gem_gtt.h| 16 ++--
3 files changed, 57 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index a98652e4055c..2873276879cb 100644
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -1512,7 +1512,7 @@ static int load_pd_dir(struct i915_request *rq, const
struct i915_ppgtt *ppgtt)
*cs++ = MI_LOAD_REGISTER_IMM(1);
*cs++ = i915_mmio_reg_offset(RING_PP_DIR_BASE(engine->mmio_base));
- *cs++ = ppgtt->pd->base.ggtt_offset << 10;
+ *cs++ = px_base(ppgtt->pd)->ggtt_offset << 10;
intel_ring_advance(rq, cs);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1e6021e75993..b2aa44103fb0 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -107,6 +107,8 @@
*
*/
+#define as_pd(x) container_of((x), typeof(struct i915_page_directory), pt)
+
static int
i915_get_ggtt_vma_pages(struct i915_vma *vma);
@@ -711,28 +713,17 @@ static struct i915_page_table *alloc_pt(struct
i915_address_space *vm)
return pt;
}
-static void free_pt(struct i915_address_space *vm, struct i915_page_table *pt)
-{
- cleanup_page_dma(vm, &pt->base);
- kfree(pt);
-}
-
static struct i915_page_directory *__alloc_pd(void)
{
struct i915_page_directory *pd;
pd = kmalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
-
if (unlikely(!pd))
return NULL;
- memset(&pd->base, 0, sizeof(pd->base));
- atomic_set(&pd->used, 0);
+ atomic_set(px_used(pd), 0);
spin_lock_init(&pd->lock);
- /* for safety */
- pd->entry[0] = NULL;
-
return pd;
}
@@ -744,7 +735,7 @@ static struct i915_page_directory *alloc_pd(struct
i915_address_space *vm)
if (unlikely(!pd))
return ERR_PTR(-ENOMEM);
- if (unlikely(setup_page_dma(vm, &pd->base))) {
+ if (unlikely(setup_page_dma(vm, px_base(pd {
kfree(pd);
return ERR_PTR(-ENOMEM);
}
@@ -752,13 +743,14 @@ static struct i915_page_directory *alloc_pd(struct
i915_address_space *vm)
return pd;
}
-static void free_pd(struct i915_address_space *vm,
- struct i915_page_directory *pd)
+static void free_pd(struct i915_address_space *vm, struct i915_page_dma *pd)
{
- cleanup_page_dma(vm, &pd->base);
+ cleanup_page_dma(vm, pd);
kfree(pd);
}
+#define free_px(vm, px) free_pd(vm, px_base(px))
+
static void init_pd(struct i915_page_directory *pd,
struct i915_page_dma *scratch)
{
@@ -783,9 +775,9 @@ __set_pd_entry(struct i915_page_directory * const pd,
struct i915_page_dma * const to,
u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
{
- GEM_BUG_ON(atomic_read(&pd->used) > 512);
+ GEM_BUG_ON(atomic_read(px_used(pd)) > 512);
- atomic_inc(&pd->used);
+ atomic_inc(px_used(pd));
pd->entry[pde] = to;
write_dma_entry(px_base(pd), pde, encode(to->daddr, I915_CACHE_LLC));
}
@@ -796,11 +788,11 @@ __clear_pd_entry(struct i915_page_directory * const pd,
struct i915_page_dma * const to,
u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
{
- GEM_BUG_ON(atomic_read(&pd->used) == 0);
+ GEM_BUG_ON(atomic_read(px_used(pd)) == 0);
write_dma_entry(px_base(pd), pde, encode(to->daddr, I915_CACHE_LLC));
pd->entry[pde] = to;
- atomic_dec(&pd->used);
+ atomic_dec(px_used(pd));
}
#define set_pd_entry(pd, pde, to) \
@@ -812,13 +804,13 @@ __clear_pd_entry(struct i915_page_directory * const pd,
static bool
release_pd_entry(struct i915_page_directory * const pd,
const unsigned short pde,
-atomic_t *counter,
+struct i915_page_table * const pt,
struct i915_page_dma * const scratch)
{
bool free = false;
spin_lock(&pd->lock);
- if (atomic_dec_and_test(counter)) {
+ if (atomic_dec_and_test(&pt->used)) {
clear_pd_entry(pd, pde, scratch);
free = true;
}
@@ -869,8 +861,8 @@ static void gen8_ppgtt_clear_pd(struct i915_address_space
*vm,
atomic_inc(&pt->used);
gen8_ppgtt_clear_pt(vm, pt, start, length);
- if (release_pd_entry(pd, pde, &pt->used, &vm->scratch_pt))
- free_pt(vm, pt);
+ if (release_pd_entry(pd, pde, pt, &vm->
[Intel-gfx] [CI 3/6] drm/i915/gtt: Markup i915_ppgtt height
This will be useful to consolidate recursive code.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index abb2e3e4bbbc..4544af1d3a3c 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1598,6 +1598,7 @@ static struct i915_ppgtt *gen8_ppgtt_create(struct
drm_i915_private *i915)
return ERR_PTR(-ENOMEM);
ppgtt_init(ppgtt, &i915->gt);
+ ppgtt->vm.top = i915_vm_is_4lvl(&ppgtt->vm) ? 3 : 2;
/*
* From bdw, there is hw support for read-only pages in the PPGTT.
@@ -2084,6 +2085,7 @@ static struct i915_ppgtt *gen6_ppgtt_create(struct
drm_i915_private *i915)
return ERR_PTR(-ENOMEM);
ppgtt_init(&ppgtt->base, &i915->gt);
+ ppgtt->base.vm.top = 1;
ppgtt->base.vm.allocate_va_range = gen6_alloc_va_range;
ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 48bb8c5125e3..36162bb7561b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -323,6 +323,7 @@ struct i915_address_space {
struct i915_page_dma scratch_pt;
struct i915_page_dma scratch_pd;
struct i915_page_dma scratch_pdp; /* GEN8+ & 48b PPGTT */
+ unsigned int top;
/**
* List of vma currently bound.
--
2.22.0
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[Intel-gfx] [CI 5/6] drm/i915/gtt: Convert vm->scratch into an array
Each level has its own scratch. Make the levels more obvious by forgoing
the fancy similarly names and replace them with a number. 0 is the bottom
most level, the physical page used for actual data; 1+ are the page
directories.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 205
drivers/gpu/drm/i915/i915_gem_gtt.h | 16 ++-
2 files changed, 100 insertions(+), 121 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1a60403e1a70..16bcf2163ae0 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -633,7 +633,7 @@ setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
gfp |= __GFP_ZERO | __GFP_RETRY_MAYFAIL;
do {
- int order = get_order(size);
+ unsigned int order = get_order(size);
struct page *page;
dma_addr_t addr;
@@ -652,8 +652,8 @@ setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
if (unlikely(!IS_ALIGNED(addr, size)))
goto unmap_page;
- vm->scratch_page.page = page;
- vm->scratch_page.daddr = addr;
+ vm->scratch[0].base.page = page;
+ vm->scratch[0].base.daddr = addr;
vm->scratch_order = order;
return 0;
@@ -672,8 +672,8 @@ setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
static void cleanup_scratch_page(struct i915_address_space *vm)
{
- struct i915_page_dma *p = &vm->scratch_page;
- int order = vm->scratch_order;
+ struct i915_page_dma *p = px_base(&vm->scratch[0]);
+ unsigned int order = vm->scratch_order;
dma_unmap_page(vm->dma, p->daddr, BIT(order) << PAGE_SHIFT,
PCI_DMA_BIDIRECTIONAL);
@@ -682,15 +682,16 @@ static void cleanup_scratch_page(struct
i915_address_space *vm)
static void free_scratch(struct i915_address_space *vm)
{
- if (!vm->scratch_page.daddr) /* set to 0 on clones */
+ int i;
+
+ if (!px_dma(&vm->scratch[0])) /* set to 0 on clones */
return;
- if (vm->scratch_pdp.daddr)
- cleanup_page_dma(vm, &vm->scratch_pdp);
- if (vm->scratch_pd.daddr)
- cleanup_page_dma(vm, &vm->scratch_pd);
- if (vm->scratch_pt.daddr)
- cleanup_page_dma(vm, &vm->scratch_pt);
+ for (i = 1; i <= vm->top; i++) {
+ if (!px_dma(&vm->scratch[i]))
+ break;
+ cleanup_page_dma(vm, px_base(&vm->scratch[i]));
+ }
cleanup_scratch_page(vm);
}
@@ -752,9 +753,9 @@ static void free_pd(struct i915_address_space *vm, struct
i915_page_dma *pd)
#define free_px(vm, px) free_pd(vm, px_base(px))
static void init_pd(struct i915_page_directory *pd,
- struct i915_page_dma *scratch)
+ struct i915_page_scratch *scratch)
{
- fill_px(pd, gen8_pde_encode(scratch->daddr, I915_CACHE_LLC));
+ fill_px(pd, scratch->encode);
memset_p(pd->entry, scratch, 512);
}
@@ -782,30 +783,26 @@ __set_pd_entry(struct i915_page_directory * const pd,
write_dma_entry(px_base(pd), pde, encode(to->daddr, I915_CACHE_LLC));
}
+#define set_pd_entry(pd, pde, to) \
+ __set_pd_entry((pd), (pde), px_base(to), gen8_pde_encode)
+
static inline void
-__clear_pd_entry(struct i915_page_directory * const pd,
-const unsigned short pde,
-struct i915_page_dma * const to,
-u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
+clear_pd_entry(struct i915_page_directory * const pd,
+ const unsigned short pde,
+ struct i915_page_scratch * const scratch)
{
GEM_BUG_ON(atomic_read(px_used(pd)) == 0);
- write_dma_entry(px_base(pd), pde, encode(to->daddr, I915_CACHE_LLC));
- pd->entry[pde] = to;
+ write_dma_entry(px_base(pd), pde, scratch->encode);
+ pd->entry[pde] = scratch;
atomic_dec(px_used(pd));
}
-#define set_pd_entry(pd, pde, to) \
- __set_pd_entry((pd), (pde), px_base(to), gen8_pde_encode)
-
-#define clear_pd_entry(pd, pde, to) \
- __clear_pd_entry((pd), (pde), (to), gen8_pde_encode)
-
static bool
release_pd_entry(struct i915_page_directory * const pd,
const unsigned short pde,
struct i915_page_table * const pt,
-struct i915_page_dma * const scratch)
+struct i915_page_scratch * const scratch)
{
bool free = false;
@@ -915,7 +912,7 @@ static void gen8_free_page_tables(struct i915_address_space
*vm,
int i;
for (i = 0; i < I915_PDES; i++) {
- if (pd->entry[i] != &vm->scratch_pt)
+ if (pd->entry[i] != &vm->scratch[1])
free_pd(vm, pd->entry[i]);
}
}
@@ -927,7 +924,7 @@
[Intel-gfx] [CI 4/6] drm/i915/gtt: Compute the radix for gen8 page table levels
The radix levels of each page directory are easily determined so replace
the numerous hardcoded constants with precomputed derived constants.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 42 +
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 -
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4544af1d3a3c..1a60403e1a70 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -867,6 +867,48 @@ static int gen8_ppgtt_notify_vgt(struct i915_ppgtt *ppgtt,
bool create)
return 0;
}
+/* Index shifts into the pagetable are offset by GEN8_PTE_SHIFT [12] */
+#define GEN8_PAGE_SIZE (SZ_4K) /* page and page-directory sizes are the same */
+#define GEN8_PTE_SHIFT (ilog2(GEN8_PAGE_SIZE))
+#define GEN8_PDES (GEN8_PAGE_SIZE / sizeof(u64))
+#define gen8_pd_shift(lvl) ((lvl) * ilog2(GEN8_PDES))
+#define gen8_pd_index(i, lvl) i915_pde_index((i), gen8_pd_shift(lvl))
+#define __gen8_pte_shift(lvl) (GEN8_PTE_SHIFT + gen8_pd_shift(lvl))
+#define __gen8_pte_index(a, lvl) i915_pde_index((a), __gen8_pte_shift(lvl))
+
+static inline unsigned int
+gen8_pd_range(u64 start, u64 end, int lvl, unsigned int *idx)
+{
+ const int shift = gen8_pd_shift(lvl);
+ const u64 mask = ~0ull << gen8_pd_shift(lvl + 1);
+
+ GEM_BUG_ON(start >= end);
+ end += ~mask >> gen8_pd_shift(1);
+
+ *idx = i915_pde_index(start, shift);
+ if ((start ^ end) & mask)
+ return GEN8_PDES - *idx;
+ else
+ return i915_pde_index(end, shift) - *idx;
+}
+
+static inline bool gen8_pd_contains(u64 start, u64 end, int lvl)
+{
+ const u64 mask = ~0ull << gen8_pd_shift(lvl + 1);
+
+ GEM_BUG_ON(start >= end);
+ return (start ^ end) & mask && (start & ~mask) == 0;
+}
+
+static inline unsigned int gen8_pt_count(u64 start, u64 end)
+{
+ GEM_BUG_ON(start >= end);
+ if ((start ^ end) >> gen8_pd_shift(1))
+ return GEN8_PDES - (start & (GEN8_PDES - 1));
+ else
+ return end - start;
+}
+
static void gen8_free_page_tables(struct i915_address_space *vm,
struct i915_page_directory *pd)
{
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 36162bb7561b..fb33f251ef9a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -124,7 +124,6 @@ typedef u64 gen8_pte_t;
#define GEN8_3LVL_PDPES4
#define GEN8_PDE_SHIFT 21
#define GEN8_PDE_MASK 0x1ff
-#define GEN8_PTE_SHIFT 12
#define GEN8_PTE_MASK 0x1ff
#define GEN8_PTES I915_PTES(sizeof(gen8_pte_t))
--
2.22.0
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Re: [Intel-gfx] [PATCH 14/14] drm/i915/gt: Use intel_gt as the primary object for handling resets
Quoting Daniele Ceraolo Spurio (2019-07-11 21:45:36)
>
>
> > --- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
> > +++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> > @@ -256,7 +256,7 @@ int __i915_live_setup(void *data)
> > {
> > struct drm_i915_private *i915 = data;
> >
> > - return i915_terminally_wedged(i915);
> > + return intel_gt_terminally_wedged(&i915->gt);
> > }
> >
> > int __i915_live_teardown(int err, void *data)
> > @@ -273,6 +273,27 @@ int __i915_live_teardown(int err, void *data)
> > return err;
> > }
> >
> > +int __intel_gt_live_setup(void *data)
> > +{
> > + struct intel_gt *gt = data;
> > +
> > + return intel_gt_terminally_wedged(gt);
> > +}
> > +
> > +int __intel_gt_live_teardown(int err, void *data)
> > +{
> > + struct intel_gt *gt = data;
> > +
> > + mutex_lock(>->i915->drm.struct_mutex);
> > + if (igt_flush_test(gt->i915, I915_WAIT_LOCKED))
> > + err = -EIO;
> > + mutex_unlock(>->i915->drm.struct_mutex);
> > +
> > + i915_gem_drain_freed_objects(gt->i915);
> > +
> > + return err;
> > +}
>
> this is basically a copy of __i915_live_teardown, it might be worth
> having one of the 2 functions call into the other if you're not planning
> to have them diverge in the short term.
I had a start of an idea to move this more local to the test suites and
out of the core. Also I expect the gt tests to diverge somewhat :)
> s/intel_gpu_reset/intel_gt_reset/ also didn't materialize but I'm happy
> for that to come later.
Right, intel_gt_reset is already taken. The intel_gpu_reset is meant to
be the core agnostic bit, that unfortunately gets used outside. It's not
the best name, but at least it's uncommon enough for people not to
assume too much about it.
> Reviewed-by: Daniele Ceraolo Spurio
>
> P.S.: if you have to respin for other reasons, it'd be nice if you could
> use a local i915 variable where there are a lot of s/i915/gt->i915/ to
> keep the diff smaller :P
The gt->i915 that stick out in my mind are intentional sore points :)
I expect those to be refined to something other than gt->i915.
-Chris
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[Intel-gfx] [PATCH i-g-t] [RFT] What's up with Broadwater?
Just a poke to see if we still get mystery failures with MI_STORE_DWORD_IMM or maybe we've cracked the flushing! --- lib/igt_gt.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/lib/igt_gt.c b/lib/igt_gt.c index 78e3cd089..2d0a34b22 100644 --- a/lib/igt_gt.c +++ b/lib/igt_gt.c @@ -572,9 +572,6 @@ bool gem_class_can_store_dword(int fd, int class) if (gen == 6 && class == I915_ENGINE_CLASS_VIDEO) return false; - if (info->is_broadwater) - return false; /* Not sure yet... */ - return true; } -- 2.22.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: screen freeze with 5.2-rc6 Dell XPS-13 skylake i915
Paul Bolle schreef op do 11-07-2019 om 13:20 [+0200]: > Chris Wilson schreef op do 11-07-2019 om 10:29 [+0100]: > > Temporary workaround would be to set i915.enable_psr=0 > > That workaround seems to work for me. Over an hour of uptime without any > screen freezes. May or may not be related: 24 hours into that session I had the machine lock up hard. Screen frozen, no input possible, etc. I had to power cycle it (after half an hour, behaving very patient). But the screen freeze that we're focusing on here never occurred during this session. Paul Bolle
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Ignore self-preemption suppression under gvt
== Series Details ==
Series: drm/i915/selftests: Ignore self-preemption suppression under gvt
URL : https://patchwork.freedesktop.org/series/63619/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6471 -> Patchwork_13638
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13638/
Known issues
Here are the changes found in Patchwork_13638 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7567u: [PASS][1] -> [FAIL][2] ([fdo#109485])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-kbl-7567u/igt@kms_chamel...@hdmi-hpd-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13638/fi-kbl-7567u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][3] -> [FAIL][4] ([fdo#103167])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13638/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_ctx_exec@basic:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u3/igt@gem_ctx_e...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13638/fi-icl-u3/igt@gem_ctx_e...@basic.html
* {igt@gem_ctx_switch@rcs0}:
- fi-icl-guc: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-guc/igt@gem_ctx_swi...@rcs0.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13638/fi-icl-guc/igt@gem_ctx_swi...@rcs0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
Participating hosts (55 -> 46)
--
Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-icl-y fi-icl-dsi fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6471 -> Patchwork_13638
CI_DRM_6471: 7b027aac4fc3877fa21bb35cc7eb1c932012032a @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13638: 663ea209c3457af4ae5aec4584d99fe4a713f005 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
663ea209c345 drm/i915/selftests: Ignore self-preemption suppression under gvt
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13638/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Revert "drm/i915: Enable PSR2 by default"
== Series Details == Series: drm/i915: Revert "drm/i915: Enable PSR2 by default" URL : https://patchwork.freedesktop.org/series/63548/ State : success == Summary == CI Bug Log - changes from CI_DRM_6458_full -> Patchwork_13620_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13620_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb2/igt@gem_exec_balan...@smoke.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-iclb3/igt@gem_exec_balan...@smoke.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][3] -> [INCOMPLETE][4] ([fdo#103665]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl6/igt@gem_workarou...@suspend-resume-fd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-kbl1/igt@gem_workarou...@suspend-resume-fd.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-hsw: [PASS][5] -> [INCOMPLETE][6] ([fdo#103540]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-hsw5/igt@kms_f...@2x-flip-vs-suspend-interruptible.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-hsw4/igt@kms_f...@2x-flip-vs-suspend-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([fdo#109507]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl6/igt@kms_f...@flip-vs-suspend-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-skl4/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) +5 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb3/igt@kms_frontbuffer_track...@fbc-rgb565-draw-pwrite.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-iclb4/igt@kms_frontbuffer_track...@fbc-rgb565-draw-pwrite.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103166]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb6/igt@kms_plane_low...@pipe-a-tiling-y.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-iclb5/igt@kms_plane_low...@pipe-a-tiling-y.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109441]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-iclb5/igt@kms_psr@psr2_cursor_render.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl1/igt@kms_vbl...@pipe-a-ts-continuation-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-apl6/igt@kms_vbl...@pipe-a-ts-continuation-suspend.html Possible fixes * igt@gem_ctx_isolation@vecs0-s3: - shard-apl: [DMESG-WARN][17] ([fdo#108566]) -> [PASS][18] +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl2/igt@gem_ctx_isolat...@vecs0-s3.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-apl4/igt@gem_ctx_isolat...@vecs0-s3.html * igt@i915_pm_backlight@fade_with_suspend: - shard-skl: [INCOMPLETE][19] ([fdo#104108]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl1/igt@i915_pm_backlight@fade_with_suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-skl10/igt@i915_pm_backlight@fade_with_suspend.html * igt@i915_pm_rpm@system-suspend: - shard-kbl: [INCOMPLETE][21] ([fdo#103665] / [fdo#107807]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl6/igt@i915_pm_...@system-suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-kbl6/igt@i915_pm_...@system-suspend.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic: - shard-iclb: [INCOMPLETE][23] ([fdo#107713]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb7/igt@kms_...@pipe-c-crc-sprite-planes-basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13620/shard-iclb3/igt@kms_...@pipe-c-crc-sprite-planes-basic.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [FAIL][25] ([fdo#105363]) -> [PASS][26] [
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/6] drm/i915/gtt: Wrap page_table with page_directory
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gtt: Wrap page_table with
page_directory
URL : https://patchwork.freedesktop.org/series/63629/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
203c4b085992 drm/i915/gtt: Wrap page_table with page_directory
-:385: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'px' - possible side-effects?
#385: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:268:
+#define px_pt(px) \
+ __px_choose_expr(px, struct i915_page_table *, __x, \
+ __px_choose_expr(px, struct i915_page_directory *, &__x->pt, \
+ (void)0))
total: 0 errors, 0 warnings, 1 checks, 352 lines checked
40f5e813d128 drm/i915/gtt: Reorder gen8 ppgtt free/clear/alloc
-:371: WARNING:LINE_SPACING: Missing a blank line after declarations
#371: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1193:
+ dma_addr_t addr = sg_dma_address(sg);
+ return (struct sgt_dma) { sg, addr, addr + sg->length };
total: 0 errors, 1 warnings, 0 checks, 717 lines checked
33a26b3513b1 drm/i915/gtt: Markup i915_ppgtt height
187530eee8da drm/i915/gtt: Compute the radix for gen8 page table levels
c0eac34d6115 drm/i915/gtt: Convert vm->scratch into an array
020a2249b498 drm/i915/gtt: Use NULL to encode scratch shadow entries
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/6] drm/i915/gtt: Wrap page_table with page_directory
== Series Details == Series: series starting with [CI,1/6] drm/i915/gtt: Wrap page_table with page_directory URL : https://patchwork.freedesktop.org/series/63629/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/gtt: Wrap page_table with page_directory -O:drivers/gpu/drm/i915/i915_gem_gtt.c:887:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:887:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:917:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:917:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:879:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:879:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:909:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:909:9: warning: expression using sizeof(void) Commit: drm/i915/gtt: Reorder gen8 ppgtt free/clear/alloc -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1337:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1337:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1386:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1386:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1450:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1450:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1007:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1007:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1028:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1028:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1077:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1077:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1141:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1141:9: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_gem_gtt.c:1007:9: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_gem_gtt.c:1007:9: warning: expression using sizeof(void) Commit: drm/i915/gtt: Markup i915_ppgtt height Okay! Commit: drm/i915/gtt: Compute the radix for gen8 page table levels +drivers/gpu/drm/i915/i915_gem_gtt.c:1019:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1019:9: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_gem_gtt.c:1019:9: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_gem_gtt.c:1019:9: warning: expression using sizeof(void) Commit: drm/i915/gtt: Convert vm->scratch into an array -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1019:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1019:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1049:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1049:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1070:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1070:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1119:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1119:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1183:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1183:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1018:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1018:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1048:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1048:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1068:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1068:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1117:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1117:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1181:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1181:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1777:44: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1777:44: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1859:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1859:9: warning: expression using size
Re: [Intel-gfx] [PATCH v4 23/23] drm/i915: Provide ddc symlink in hdmi connector sysfs directory
On Thu, Jul 11, 2019 at 01:26:50PM +0200, Andrzej Pietrasiewicz wrote: > Use the ddc pointer provided by the generic connector. We already have a symlink via intel_hdmi_create_i2c_symlink(). I guess we should remove that in favor of the generic one. Oleg? > > Signed-off-by: Andrzej Pietrasiewicz > --- > drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c > b/drivers/gpu/drm/i915/display/intel_hdmi.c > index 0ebec69bbbfc..678fa4d1bd4e 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > @@ -3094,6 +3094,9 @@ void intel_hdmi_init_connector(struct > intel_digital_port *intel_dig_port, >intel_dig_port->max_lanes, port_name(port))) > return; > > + intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port); > + connector->ddc = intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus); > + > drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, > DRM_MODE_CONNECTOR_HDMIA); > drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); > @@ -3105,8 +3108,6 @@ void intel_hdmi_init_connector(struct > intel_digital_port *intel_dig_port, > if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > connector->ycbcr_420_allowed = true; > > - intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port); > - > if (WARN_ON(port == PORT_A)) > return; > intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port); > -- > 2.17.1 -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v4 01/23] drm: Include ddc adapter pointer in struct drm_connector
On Thu, Jul 11, 2019 at 01:26:28PM +0200, Andrzej Pietrasiewicz wrote:
> Add generic code which creates symbolic links in sysfs, pointing to ddc
> interface used by a particular video output. For example:
>
> ls -l /sys/class/drm/card0-HDMI-A-1/ddc
> lrwxrwxrwx 1 root root 0 Jun 24 10:42 /sys/class/drm/card0-HDMI-A-1/ddc \
> -> ../../../../soc/1388.i2c/i2c-2
>
> This makes it easy for user to associate a display with its ddc adapter
> and use e.g. ddcutil to control the chosen monitor.
>
> This patch adds an i2c_adapter pointer to struct drm_connector. Particular
> drivers can then use it instead of using their own private instance. If a
> connector contains a ddc, then create a symbolic link in sysfs.
>
> Signed-off-by: Andrzej Pietrasiewicz
> Acked-by: Daniel Vetter
> Reviewed-by: Andrzej Hajda
> ---
> drivers/gpu/drm/drm_sysfs.c | 7 +++
> include/drm/drm_connector.h | 11 +++
> 2 files changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
> index ad10810bc972..26d359b39785 100644
> --- a/drivers/gpu/drm/drm_sysfs.c
> +++ b/drivers/gpu/drm/drm_sysfs.c
> @@ -294,6 +294,9 @@ int drm_sysfs_connector_add(struct drm_connector
> *connector)
> /* Let userspace know we have a new connector */
> drm_sysfs_hotplug_event(dev);
>
> + if (connector->ddc)
> + return sysfs_create_link(&connector->kdev->kobj,
> + &connector->ddc->dev.kobj, "ddc");
> return 0;
> }
>
> @@ -301,6 +304,10 @@ void drm_sysfs_connector_remove(struct drm_connector
> *connector)
> {
> if (!connector->kdev)
> return;
> +
> + if (connector->ddc)
> + sysfs_remove_link(&connector->kdev->kobj, "ddc");
> +
> DRM_DEBUG("removing \"%s\" from sysfs\n",
> connector->name);
>
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index ca745d9feaf5..1ad3d1d54ba7 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -23,6 +23,7 @@
> #ifndef __DRM_CONNECTOR_H__
> #define __DRM_CONNECTOR_H__
>
> +#include
struct i2c_adapter;
would suffice.
> #include
> #include
> #include
> @@ -1308,6 +1309,16 @@ struct drm_connector {
>* [0]: progressive, [1]: interlaced
>*/
> int audio_latency[2];
> +
> + /**
> + * @ddc: associated ddc adapter.
> + * A connector usually has its associated ddc adapter. If a driver uses
> + * this field, then an appropriate symbolic link is created in connector
> + * sysfs directory to make it easy for the user to tell which i2c
> + * adapter is for a particular display.
> + */
> + struct i2c_adapter *ddc;
> +
> /**
>* @null_edid_counter: track sinks that give us all zeros for the EDID.
>* Needed to workaround some HW bugs where we get all 0s
> --
> 2.17.1
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v9 1/6] drm: Add Content protection type property
On Thu, 11 Jul 2019 11:20:49 +0530
Ramalingam C wrote:
> On 2019-07-10 at 11:16:24 +0300, Pekka Paalanen wrote:
> > On Tue, 9 Jul 2019 18:17:59 +0530
> > Ramalingam C wrote:
> >
> > > On 2019-07-09 at 17:31:10 +0300, Pekka Paalanen wrote:
> > > > On Mon, 8 Jul 2019 16:51:11 +0530
> > > > Ramalingam C wrote:
> > > >
> > > > > This patch adds a DRM ENUM property to the selected connectors.
> > > > > This property is used for mentioning the protected content's type
> > > > > from userspace to kernel HDCP authentication.
> > > > >
> > > > > Type of the stream is decided by the protected content providers.
> > > > > Type 0 content can be rendered on any HDCP protected display wires.
> > > > > But Type 1 content can be rendered only on HDCP2.2 protected paths.
> > > > >
> > > > > So when a userspace sets this property to Type 1 and starts the HDCP
> > > > > enable, kernel will honour it only if HDCP2.2 authentication is
> > > > > through
> > > > > for type 1. Else HDCP enable will be failed.
> > > > >
> > > > > Need ACK for this new conenctor property from userspace consumer.
> > > > >
> > > > > v2:
> > > > > cp_content_type is replaced with content_protection_type [daniel]
> > > > > check at atomic_set_property is removed [Maarten]
> > > > > v3:
> > > > > %s/content_protection_type/hdcp_content_type [Pekka]
> > > > > v4:
> > > > > property is created for the first requested connector and then
> > > > > reused.
> > > > > [Danvet]
> > > > > v5:
> > > > > kernel doc nits addressed [Daniel]
> > > > > Rebased as part of patch reordering.
> > > > > v6:
> > > > > Kernel docs are modified [pekka]
> > > > > v7:
> > > > > More details in Kernel docs. [pekka]
> > > > >
> > > > > Signed-off-by: Ramalingam C
> > > > > Reviewed-by: Daniel Vetter
> > > > > ---
> > > > > drivers/gpu/drm/drm_atomic_uapi.c | 4 +++
> > > > > drivers/gpu/drm/drm_connector.c | 39
> > > > > +++
> > > > > drivers/gpu/drm/drm_hdcp.c| 36 -
> > > > > drivers/gpu/drm/i915/display/intel_hdcp.c | 4 ++-
> > > > > include/drm/drm_connector.h | 7
> > > > > include/drm/drm_hdcp.h| 2 +-
> > > > > include/drm/drm_mode_config.h | 6
> > > > > include/uapi/drm/drm_mode.h | 4 +++
> > > > > 8 files changed, 99 insertions(+), 3 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > b/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > index abe38bdf85ae..19ae119f1a5d 100644
> > > > > --- a/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > @@ -747,6 +747,8 @@ static int
> > > > > drm_atomic_connector_set_property(struct drm_connector *connector,
> > > > > return -EINVAL;
> > > > > }
> > > > > state->content_protection = val;
> > > > > + } else if (property == config->hdcp_content_type_property) {
> > > > > + state->hdcp_content_type = val;
> > > > > } else if (property == connector->colorspace_property) {
> > > > > state->colorspace = val;
> > > > > } else if (property == config->writeback_fb_id_property) {
> > > > > @@ -831,6 +833,8 @@ drm_atomic_connector_get_property(struct
> > > > > drm_connector *connector,
> > > > > state->hdr_output_metadata->base.id : 0;
> > > > > } else if (property == config->content_protection_property) {
> > > > > *val = state->content_protection;
> > > > > + } else if (property == config->hdcp_content_type_property) {
> > > > > + *val = state->hdcp_content_type;
> > > > > } else if (property == config->writeback_fb_id_property) {
> > > > > /* Writeback framebuffer is one-shot, write and forget
> > > > > */
> > > > > *val = 0;
> > > > > diff --git a/drivers/gpu/drm/drm_connector.c
> > > > > b/drivers/gpu/drm/drm_connector.c
> > > > > index 068d4b05f1be..732f6645643d 100644
> > > > > --- a/drivers/gpu/drm/drm_connector.c
> > > > > +++ b/drivers/gpu/drm/drm_connector.c
> > > > > @@ -952,6 +952,45 @@ static const struct drm_prop_enum_list
> > > > > hdmi_colorspaces[] = {
> > > > > * is no longer protected and userspace should take appropriate
> > > > > action
> > > > > * (whatever that might be).
> > > > > *
> > > > > + * HDCP Content Type:
> > > > > + * This Enum property is used by the userspace to declare the
> > > > > content type
> > > > > + * of the display stream, to kernel. Here display stream stands
> > > > > for any
> > > > > + * display content that userspace intended to render with HDCP
> > > > > encryption.
> > > >
> > > > Hi,
> > > >
> > > > I'd suggest s/render with/display through/.
> > > >
> > > > As a gfx dev, rendering is something quite different to me.
> > > Ok.
> > > >
> > > > > + *
> > > > > + * Content Type of a strea
[Intel-gfx] [PATCH v3 2/6] drm/i915: Rename "_load"/"_unload" to match PCI entry points
Current names of i915_driver_load/unload() functions originate in
legacy DRM stubs. Reduce nomenclature ambiguity by renaming them to
match their current use as helpers called from PCI entry points.
Suggested by: Chris Wilson
Signed-off-by: Janusz Krzysztofik
---
drivers/gpu/drm/i915/i915_drv.c | 8
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_pci.c | 4 ++--
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8502a2e4268e..9488aa3cb9cc 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1876,17 +1876,17 @@ static void i915_driver_destroy(struct drm_i915_private
*i915)
}
/**
- * i915_driver_load - setup chip and create an initial config
+ * i915_driver_probe - setup chip and create an initial config
* @pdev: PCI device
* @ent: matching PCI ID entry
*
- * The driver load routine has to do several things:
+ * The driver probe routine has to do several things:
* - drive output discovery via intel_modeset_init()
* - initialize the memory manager
* - allocate initial config memory
* - setup the DRM framebuffer with the allocated memory
*/
-int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
+int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
const struct intel_device_info *match_info =
(struct intel_device_info *)ent->driver_data;
@@ -1952,7 +1952,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct
pci_device_id *ent)
return ret;
}
-void i915_driver_unload(struct drm_device *dev)
+void i915_driver_remove(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1a6b4e14a405..b644f54abec2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2396,8 +2396,8 @@ long i915_compat_ioctl(struct file *filp, unsigned int
cmd, unsigned long arg);
#endif
extern const struct dev_pm_ops i915_pm_ops;
-int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent);
-void i915_driver_unload(struct drm_device *dev);
+int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
+void i915_driver_remove(struct drm_device *dev);
void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
void intel_hangcheck_init(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e83c94cf2744..49558727b5f3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -878,7 +878,7 @@ static void i915_pci_remove(struct pci_dev *pdev)
if (!dev) /* driver load aborted, nothing to cleanup */
return;
- i915_driver_unload(dev);
+ i915_driver_remove(dev);
drm_dev_put(dev);
pci_set_drvdata(pdev, NULL);
@@ -953,7 +953,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
if (vga_switcheroo_client_probe_defer(pdev))
return -EPROBE_DEFER;
- err = i915_driver_load(pdev, ent);
+ err = i915_driver_probe(pdev, ent);
if (err)
return err;
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 6/6] drm/i915: Propagate "_probe" function name suffix down
Similar to the "_release" and "_remove" cases, consequently replace
"_init" components of names of functions called from
i915_driver_probe() with "_probe" suffixes for better code readability.
Signed-off-by: Janusz Krzysztofik
---
drivers/gpu/drm/i915/i915_drv.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3af8e602befe..e2d1bed9454c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -681,7 +681,7 @@ static const struct vga_switcheroo_client_ops
i915_switcheroo_ops = {
.can_switch = i915_switcheroo_can_switch,
};
-static int i915_load_modeset_init(struct drm_device *dev)
+static int i915_driver_modeset_probe(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
@@ -890,7 +890,7 @@ static void intel_detect_preproduction_hw(struct
drm_i915_private *dev_priv)
}
/**
- * i915_driver_init_early - setup state not requiring device access
+ * i915_driver_early_probe - setup state not requiring device access
* @dev_priv: device private
*
* Initialize everything that is a "SW-only" state, that is state not
@@ -899,7 +899,7 @@ static void intel_detect_preproduction_hw(struct
drm_i915_private *dev_priv)
* system memory allocation, setting up device specific attributes and
* function hooks not requiring accessing the device.
*/
-static int i915_driver_init_early(struct drm_i915_private *dev_priv)
+static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
{
int ret = 0;
@@ -969,7 +969,7 @@ static int i915_driver_init_early(struct drm_i915_private
*dev_priv)
/**
* i915_driver_late_release - cleanup the setup done in
- *i915_driver_init_early()
+ *i915_driver_early_probe()
* @dev_priv: device private
*/
static void i915_driver_late_release(struct drm_i915_private *dev_priv)
@@ -986,7 +986,7 @@ static void i915_driver_late_release(struct
drm_i915_private *dev_priv)
}
/**
- * i915_driver_init_mmio - setup device MMIO
+ * i915_driver_mmio_probe - setup device MMIO
* @dev_priv: device private
*
* Setup minimal device state necessary for MMIO accesses later in the
@@ -994,7 +994,7 @@ static void i915_driver_late_release(struct
drm_i915_private *dev_priv)
* side effects or exposing the driver via kernel internal or user space
* interfaces.
*/
-static int i915_driver_init_mmio(struct drm_i915_private *dev_priv)
+static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
{
int ret;
@@ -1035,7 +1035,7 @@ static int i915_driver_init_mmio(struct drm_i915_private
*dev_priv)
}
/**
- * i915_driver_mmio_release - cleanup the setup done in i915_driver_init_mmio()
+ * i915_driver_mmio_release - cleanup the setup done in
i915_driver_mmio_probe()
* @dev_priv: device private
*/
static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
@@ -1531,13 +1531,13 @@ static void edram_detect(struct drm_i915_private
*dev_priv)
}
/**
- * i915_driver_init_hw - setup state requiring device access
+ * i915_driver_hw_probe - setup state requiring device access
* @dev_priv: device private
*
* Setup state that requires accessing the device, but doesn't require
* exposing the driver via kernel internal or userspace interfaces.
*/
-static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
+static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
{
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
@@ -1906,7 +1906,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
if (ret)
goto out_fini;
- ret = i915_driver_init_early(dev_priv);
+ ret = i915_driver_early_probe(dev_priv);
if (ret < 0)
goto out_pci_disable;
@@ -1914,15 +1914,15 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
i915_detect_vgpu(dev_priv);
- ret = i915_driver_init_mmio(dev_priv);
+ ret = i915_driver_mmio_probe(dev_priv);
if (ret < 0)
goto out_runtime_pm_put;
- ret = i915_driver_init_hw(dev_priv);
+ ret = i915_driver_hw_probe(dev_priv);
if (ret < 0)
goto out_cleanup_mmio;
- ret = i915_load_modeset_init(&dev_priv->drm);
+ ret = i915_driver_modeset_probe(&dev_priv->drm);
if (ret < 0)
goto out_cleanup_hw;
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 0/6] drm/i915: Rename functions to match their entry points
Need for this was identified while working on split of driver unbind path into _remove() and _release() parts. Consistency in function naming has been recognized as helpful when trying to work out which phase the code is in. v2: * early_probe pairs better with late_release (Chris), * exclude patch 6/6 "drm/i915: Rename "inject_load_failure" module parameter" for now, it requires updates on user (IGT) side * rebase on top of "drm/i915: Drop extern qualifiers from header function prototypes" v3: * fix typo in commit message of 3/5 (now 4/6) (Joonas) * bundle with "drm/i915: Drop extern qualifiers from header function prototypes", which the series depends on, as 1/6 (Chris) Janusz Krzysztofik (6): drm/i915: Drop extern qualifiers from header function prototypes drm/i915: Rename "_load"/"_unload" to match PCI entry points drm/i915: Replace "_load" with "_probe" consequently drm/i915: Propagate "_release" function name suffix down drm/i915: Propagate "_remove" function name suffix down drm/i915: Propagate "_probe" function name suffix down drivers/gpu/drm/i915/display/intel_bios.c | 4 +- drivers/gpu/drm/i915/display/intel_bios.h | 2 +- .../gpu/drm/i915/display/intel_connector.c| 2 +- drivers/gpu/drm/i915/display/intel_display.c | 2 +- .../drm/i915/display/intel_display_power.c| 6 +- .../drm/i915/display/intel_display_power.h| 2 +- drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/gvt/gtt.h| 13 ++- drivers/gpu/drm/i915/i915_drv.c | 107 +- drivers/gpu/drm/i915/i915_drv.h | 61 +- drivers/gpu/drm/i915/i915_gem.c | 12 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- drivers/gpu/drm/i915/i915_irq.h | 4 +- drivers/gpu/drm/i915/i915_pci.c | 6 +- drivers/gpu/drm/i915/intel_gvt.c | 7 +- drivers/gpu/drm/i915/intel_gvt.h | 5 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- drivers/gpu/drm/i915/intel_uncore.c | 2 +- drivers/gpu/drm/i915/intel_wopcm.c| 2 +- drivers/gpu/drm/i915/oa/i915_oa_bdw.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_bxt.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_cflgt2.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_cflgt3.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_chv.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_cnl.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_glk.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_hsw.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_icl.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_kblgt2.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_kblgt3.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_sklgt2.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_sklgt3.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_sklgt4.h | 2 +- include/drm/i915_drm.h| 10 +- 37 files changed, 145 insertions(+), 144 deletions(-) -- 2.21.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 4/6] drm/i915: Propagate "_release" function name suffix down
Replace mixed "_fini"/"_cleanup"/"_cleanup_hw" suffixes found in names
of functions called from i915_driver_release() with "_release" suffix
consistently. This provides better code readability, especially
helpful when trying to work out which phase the code is in.
Functions names starting with "i915_driver_", i.e., those defined in
drivers/gpu/dri/i915/i915_drv.c, just have their "cleanup" or "fini"
parts of their names replaced with the "_release" suffix, while names
of functions coming from other source files have been suffixed with
"_driver_release" to avoid ambiguity with other possible .release entry
points.
v2: early_probe pairs better with late_release (Chris)
v3: fix typo in commit message (Joonas)
Suggested-by: Chris Wilson
Signed-off-by: Janusz Krzysztofik
---
drivers/gpu/drm/i915/i915_drv.c | 33 +
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +--
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +-
7 files changed, 24 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7371571d735d..60dad4450e28 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -758,7 +758,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
cleanup_gem:
i915_gem_suspend(dev_priv);
i915_gem_fini_hw(dev_priv);
- i915_gem_fini(dev_priv);
+ i915_gem_driver_release(dev_priv);
cleanup_modeset:
intel_modeset_cleanup(dev);
cleanup_irq:
@@ -968,10 +968,11 @@ static int i915_driver_init_early(struct drm_i915_private
*dev_priv)
}
/**
- * i915_driver_cleanup_early - cleanup the setup done in
i915_driver_init_early()
+ * i915_driver_late_release - cleanup the setup done in
+ *i915_driver_init_early()
* @dev_priv: device private
*/
-static void i915_driver_cleanup_early(struct drm_i915_private *dev_priv)
+static void i915_driver_late_release(struct drm_i915_private *dev_priv)
{
intel_irq_fini(dev_priv);
intel_power_domains_cleanup(dev_priv);
@@ -1034,10 +1035,10 @@ static int i915_driver_init_mmio(struct
drm_i915_private *dev_priv)
}
/**
- * i915_driver_cleanup_mmio - cleanup the setup done in i915_driver_init_mmio()
+ * i915_driver_mmio_release - cleanup the setup done in i915_driver_init_mmio()
* @dev_priv: device private
*/
-static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv)
+static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
{
intel_teardown_mchbar(dev_priv);
intel_uncore_fini_mmio(&dev_priv->uncore);
@@ -1690,7 +1691,7 @@ static int i915_driver_init_hw(struct drm_i915_private
*dev_priv)
pci_disable_msi(pdev);
pm_qos_remove_request(&dev_priv->pm_qos);
err_ggtt:
- i915_ggtt_cleanup_hw(dev_priv);
+ i915_ggtt_driver_release(dev_priv);
err_perf:
i915_perf_fini(dev_priv);
return ret;
@@ -1935,15 +1936,15 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
out_cleanup_hw:
i915_driver_cleanup_hw(dev_priv);
- i915_ggtt_cleanup_hw(dev_priv);
+ i915_ggtt_driver_release(dev_priv);
/* Paranoia: make sure we have disabled everything before we exit. */
intel_sanitize_gt_powersave(dev_priv);
out_cleanup_mmio:
- i915_driver_cleanup_mmio(dev_priv);
+ i915_driver_mmio_release(dev_priv);
out_runtime_pm_put:
enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
- i915_driver_cleanup_early(dev_priv);
+ i915_driver_late_release(dev_priv);
out_pci_disable:
pci_disable_device(pdev);
out_fini:
@@ -2006,19 +2007,19 @@ static void i915_driver_release(struct drm_device *dev)
disable_rpm_wakeref_asserts(rpm);
- i915_gem_fini(dev_priv);
+ i915_gem_driver_release(dev_priv);
- i915_ggtt_cleanup_hw(dev_priv);
+ i915_ggtt_driver_release(dev_priv);
/* Paranoia: make sure we have disabled everything before we exit. */
intel_sanitize_gt_powersave(dev_priv);
- i915_driver_cleanup_mmio(dev_priv);
+ i915_driver_mmio_release(dev_priv);
enable_rpm_wakeref_asserts(rpm);
- intel_runtime_pm_cleanup(rpm);
+ intel_runtime_pm_driver_release(rpm);
- i915_driver_cleanup_early(dev_priv);
+ i915_driver_late_release(dev_priv);
i915_driver_destroy(dev_priv);
}
@@ -2211,7 +2212,7 @@ static int i915_drm_suspend_late(struct drm_device *dev,
bool hibernation)
out:
enable_rpm_wakeref_asserts(rpm);
if (!dev_priv->uncore.user_forcewake.count)
- intel_runtime_pm_cleanup(rpm);
+ intel_runtime_pm_driver_release(rpm);
return ret;
}
@@ -2975,7 +2976,7 @@ static int intel_ru
[Intel-gfx] [PATCH v3 5/6] drm/i915: Propagate "_remove" function name suffix down
Similar to the "_release" case, consistently replace mixed
"_cleanup"/"_fini"/"_fini_hw" components found in names of functions
called from i915_driver_remove() with "_remove" or "_driver_remove"
suffixes for better code readability.
Signed-off-by: Janusz Krzysztofik
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
drivers/gpu/drm/i915/display/intel_bios.h | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_power.c| 6 ++---
.../drm/i915/display/intel_display_power.h| 2 +-
drivers/gpu/drm/i915/i915_drv.c | 24 +--
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/intel_gvt.c | 5 ++--
drivers/gpu/drm/i915/intel_gvt.h | 5 ++--
10 files changed, 29 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 2fe68f72b88f..21501d565327 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1908,10 +1908,10 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
}
/**
- * intel_bios_cleanup - Free any resources allocated by intel_bios_init()
+ * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
* @dev_priv: i915 device instance
*/
-void intel_bios_cleanup(struct drm_i915_private *dev_priv)
+void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
{
kfree(dev_priv->vbt.child_dev);
dev_priv->vbt.child_dev = NULL;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h
b/drivers/gpu/drm/i915/display/intel_bios.h
index 0b7be6389a07..4969189e620f 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -228,7 +228,7 @@ struct mipi_pps_data {
} __packed;
void intel_bios_init(struct drm_i915_private *dev_priv);
-void intel_bios_cleanup(struct drm_i915_private *dev_priv);
+void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
bool intel_bios_is_valid_vbt(const void *buf, size_t size);
bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8
*i2c_pin);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 79ae8f4e5213..e12671ca1886 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17092,7 +17092,7 @@ static void intel_hpd_poll_fini(struct drm_device *dev)
drm_connector_list_iter_end(&conn_iter);
}
-void intel_modeset_cleanup(struct drm_device *dev)
+void intel_modeset_driver_remove(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display/intel_display_power.c
index d25fd5a25199..93a148684c53 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4902,7 +4902,7 @@ static void intel_power_domains_verify_state(struct
drm_i915_private *dev_priv);
*
* It will return with power domains disabled (to be enabled later by
* intel_power_domains_enable()) and must be paired with
- * intel_power_domains_fini_hw().
+ * intel_power_domains_driver_remove().
*/
void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
{
@@ -4954,7 +4954,7 @@ void intel_power_domains_init_hw(struct drm_i915_private
*i915, bool resume)
}
/**
- * intel_power_domains_fini_hw - deinitialize hw power domain state
+ * intel_power_domains_driver_remove - deinitialize hw power domain state
* @i915: i915 device instance
*
* De-initializes the display power domain HW state. It also ensures that the
@@ -4964,7 +4964,7 @@ void intel_power_domains_init_hw(struct drm_i915_private
*i915, bool resume)
* intel_power_domains_disable()) and must be paired with
* intel_power_domains_init_hw().
*/
-void intel_power_domains_fini_hw(struct drm_i915_private *i915)
+void intel_power_domains_driver_remove(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref __maybe_unused =
fetch_and_zero(&i915->power_domains.wakeref);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
b/drivers/gpu/drm/i915/display/intel_display_power.h
index a264f18c95f1..e4d2c1ba24b0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -241,7 +241,7 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv);
int intel_power_domains_init(struct drm_i915_private *dev_priv);
void intel_power_domains_cleanup(struct drm_i915_private *dev_priv);
void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool
resume);
-void intel_power_domains_fini_hw(struct drm_i915_private
[Intel-gfx] [PATCH v3 3/6] drm/i915: Replace "_load" with "_probe" consequently
Use the "_probe" nomenclature not only in i915_driver_probe() helper
name but also in other related function / variable names for
consistency. Only the userspace exposed name of a related module
parameter is left untouched.
Signed-off-by: Janusz Krzysztofik
---
.../gpu/drm/i915/display/intel_connector.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 20 +--
drivers/gpu/drm/i915/i915_drv.h | 10 +-
drivers/gpu/drm/i915/i915_gem.c | 8
drivers/gpu/drm/i915/i915_pci.c | 2 +-
drivers/gpu/drm/i915/intel_gvt.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
drivers/gpu/drm/i915/intel_wopcm.c| 2 +-
9 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_connector.c
b/drivers/gpu/drm/i915/display/intel_connector.c
index 41310f8e5a2a..d0163d86c42a 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -118,7 +118,7 @@ int intel_connector_register(struct drm_connector
*connector)
if (ret)
goto err;
- if (i915_inject_load_failure()) {
+ if (i915_inject_probe_failure()) {
ret = -EFAULT;
goto err_backlight;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 76b5c068a26d..2dc1917b9d30 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -426,7 +426,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
WARN_ON(engine_mask &
GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9488aa3cb9cc..7371571d735d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -81,14 +81,14 @@
static struct drm_driver driver;
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
-static unsigned int i915_load_fail_count;
+static unsigned int i915_probe_fail_count;
-bool __i915_inject_load_failure(const char *func, int line)
+bool __i915_inject_probe_failure(const char *func, int line)
{
- if (i915_load_fail_count >= i915_modparams.inject_load_failure)
+ if (i915_probe_fail_count >= i915_modparams.inject_load_failure)
return false;
- if (++i915_load_fail_count == i915_modparams.inject_load_failure) {
+ if (++i915_probe_fail_count == i915_modparams.inject_load_failure) {
DRM_INFO("Injecting failure at checkpoint %u [%s:%d]\n",
i915_modparams.inject_load_failure, func, line);
i915_modparams.inject_load_failure = 0;
@@ -100,7 +100,7 @@ bool __i915_inject_load_failure(const char *func, int line)
bool i915_error_injected(void)
{
- return i915_load_fail_count && !i915_modparams.inject_load_failure;
+ return i915_probe_fail_count && !i915_modparams.inject_load_failure;
}
#endif
@@ -687,7 +687,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
if (HAS_DISPLAY(dev_priv)) {
@@ -903,7 +903,7 @@ static int i915_driver_init_early(struct drm_i915_private
*dev_priv)
{
int ret = 0;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
intel_device_info_subplatform_init(dev_priv);
@@ -997,7 +997,7 @@ static int i915_driver_init_mmio(struct drm_i915_private
*dev_priv)
{
int ret;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
if (i915_get_bridge_dev(dev_priv))
@@ -1541,7 +1541,7 @@ static int i915_driver_init_hw(struct drm_i915_private
*dev_priv)
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
intel_device_info_runtime_init(dev_priv);
@@ -1947,7 +1947,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
out_pci_disable:
pci_disable_device(pdev);
out_fini:
- i915_load_error(dev_priv, "Device initialization failed (%d)\n", ret);
+ i915_probe_error(dev_priv, "Device initialization failed (%d)\n", ret);
i915_driver_destroy(dev_priv);
return ret;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b644f54abec2..af07d8d4ac10 100644
--- a/drivers/gpu/
[Intel-gfx] [PATCH v3 1/6] drm/i915: Drop extern qualifiers from header function prototypes
Follow dim checkpatch recommendation so it doesn't complain on that now
and again on header file modifications.
v2: drop testing leftover (Chris)
Signed-off-by: Janusz Krzysztofik
---
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +-
drivers/gpu/drm/i915/gvt/gtt.h | 13 +++---
drivers/gpu/drm/i915/i915_drv.h| 47 ++
drivers/gpu/drm/i915/i915_irq.h| 4 +-
drivers/gpu/drm/i915/oa/i915_oa_bdw.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_bxt.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_cflgt2.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_cflgt3.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_chv.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_cnl.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_glk.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_hsw.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_icl.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_kblgt2.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_kblgt3.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_sklgt2.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_sklgt3.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_sklgt4.h | 2 +-
include/drm/i915_drm.h | 10 ++---
19 files changed, 51 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 20754c15412a..67aea07ea019 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -81,7 +81,7 @@ i915_gem_object_lookup(struct drm_file *file, u32 handle)
}
__deprecated
-extern struct drm_gem_object *
+struct drm_gem_object *
drm_gem_object_lookup(struct drm_file *file, u32 handle);
__attribute__((nonnull))
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
index 42d0394f0de2..88789316807d 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.h
+++ b/drivers/gpu/drm/i915/gvt/gtt.h
@@ -205,17 +205,18 @@ struct intel_vgpu_gtt {
struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX];
};
-extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
-extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);
+int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
+void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);
void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old);
void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu);
-extern int intel_gvt_init_gtt(struct intel_gvt *gvt);
+int intel_gvt_init_gtt(struct intel_gvt *gvt);
void intel_vgpu_reset_gtt(struct intel_vgpu *vgpu);
-extern void intel_gvt_clean_gtt(struct intel_gvt *gvt);
+void intel_gvt_clean_gtt(struct intel_gvt *gvt);
-extern struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
- int page_table_level, void *root_entry);
+struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
+ int page_table_level,
+ void *root_entry);
struct intel_vgpu_oos_page {
struct intel_vgpu_ppgtt_spt *spt;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 56527a7a1666..1a6b4e14a405 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2390,19 +2390,17 @@ __i915_printk(struct drm_i915_private *dev_priv, const
char *level,
__i915_printk(dev_priv, KERN_ERR, fmt, ##__VA_ARGS__)
#ifdef CONFIG_COMPAT
-extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
+long i915_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
#else
#define i915_compat_ioctl NULL
#endif
extern const struct dev_pm_ops i915_pm_ops;
-extern int i915_driver_load(struct pci_dev *pdev,
- const struct pci_device_id *ent);
-extern void i915_driver_unload(struct drm_device *dev);
+int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent);
+void i915_driver_unload(struct drm_device *dev);
-extern void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
-extern void intel_hangcheck_init(struct drm_i915_private *dev_priv);
+void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
+void intel_hangcheck_init(struct drm_i915_private *dev_priv);
int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool on);
u32 intel_calculate_mcr_s_ss_select(struct drm_i915_private *dev_priv);
@@ -2672,14 +2670,14 @@ int intel_engine_cmd_parser(struct intel_engine_cs
*engine,
bool is_master);
/* i915_perf.c */
-extern void i915_perf_init(struct drm_i915_private *dev_priv);
-extern void i915_perf_fini(struct drm_i915_private *dev_priv);
-extern void i915_perf_register(struct drm_i915_private *dev_priv);
-extern void i915_perf_unregister(struct drm_i915_private *dev_priv);
+void i915_perf_init(struct drm_i915_private *dev_priv);
+void i915_perf_fini(struct drm_i915_private *dev_priv);
+v
[Intel-gfx] [PATCH 0/2] Enable HuC by default for Gen11+
HuC firmware is required to unlock advanced video codecs in media driver. Let's enable it by default for Gen11+ platforms, where we know it works. Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Daniele Ceraolo Spurio Michal Wajdeczko (2): drm/i915/guc: Don't enable GuC/HuC in auto mode on pre-Gen11 drm/i915/guc: Turn on GuC/HuC auto mode drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_uc.c| 10 +++--- 2 files changed, 8 insertions(+), 4 deletions(-) -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915/gtt: Wrap page_table with page_directory
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gtt: Wrap page_table with
page_directory
URL : https://patchwork.freedesktop.org/series/63629/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6471 -> Patchwork_13639
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13639/
Known issues
Here are the changes found in Patchwork_13639 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_param@basic-default:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u3/igt@gem_ctx_pa...@basic-default.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13639/fi-icl-u3/igt@gem_ctx_pa...@basic-default.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][3] -> [FAIL][4] ([fdo#103167])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13639/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_ctx_exec@basic:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u3/igt@gem_ctx_e...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13639/fi-icl-u3/igt@gem_ctx_e...@basic.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][7] ([fdo#102614]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13639/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
Participating hosts (55 -> 47)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6471 -> Patchwork_13639
CI_DRM_6471: 7b027aac4fc3877fa21bb35cc7eb1c932012032a @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13639: 020a2249b498cf13034ce8f148b0da75062e703f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
020a2249b498 drm/i915/gtt: Use NULL to encode scratch shadow entries
c0eac34d6115 drm/i915/gtt: Convert vm->scratch into an array
187530eee8da drm/i915/gtt: Compute the radix for gen8 page table levels
33a26b3513b1 drm/i915/gtt: Markup i915_ppgtt height
40f5e813d128 drm/i915/gtt: Reorder gen8 ppgtt free/clear/alloc
203c4b085992 drm/i915/gtt: Wrap page_table with page_directory
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13639/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 0/6] drm/i915: Rename functions to match their entry points
On Friday, July 12, 2019 1:12:52 PM CEST Janusz Krzysztofik wrote: > Need for this was identified while working on split of driver unbind > path into _remove() and _release() parts. Consistency in function > naming has been recognized as helpful when trying to work out which > phase the code is in. > > v2: * early_probe pairs better with late_release (Chris), > * exclude patch 6/6 "drm/i915: Rename "inject_load_failure" module > parameter" for now, it requires updates on user (IGT) side > * rebase on top of "drm/i915: Drop extern qualifiers from header > function prototypes" > v3: * fix typo in commit message of 3/5 (now 4/6) (Joonas) > * bundle with "drm/i915: Drop extern qualifiers from header > function prototypes", which the series depends on, as 1/6 (Chris) I forgot about including R-b clauses, sorry, will resend in a moment. Janusz > > Janusz Krzysztofik (6): > drm/i915: Drop extern qualifiers from header function prototypes > drm/i915: Rename "_load"/"_unload" to match PCI entry points > drm/i915: Replace "_load" with "_probe" consequently > drm/i915: Propagate "_release" function name suffix down > drm/i915: Propagate "_remove" function name suffix down > drm/i915: Propagate "_probe" function name suffix down > > drivers/gpu/drm/i915/display/intel_bios.c | 4 +- > drivers/gpu/drm/i915/display/intel_bios.h | 2 +- > .../gpu/drm/i915/display/intel_connector.c| 2 +- > drivers/gpu/drm/i915/display/intel_display.c | 2 +- > .../drm/i915/display/intel_display_power.c| 6 +- > .../drm/i915/display/intel_display_power.h| 2 +- > drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 +- > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- > drivers/gpu/drm/i915/gvt/gtt.h| 13 ++- > drivers/gpu/drm/i915/i915_drv.c | 107 +- > drivers/gpu/drm/i915/i915_drv.h | 61 +- > drivers/gpu/drm/i915/i915_gem.c | 12 +- > drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +- > drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- > drivers/gpu/drm/i915/i915_irq.h | 4 +- > drivers/gpu/drm/i915/i915_pci.c | 6 +- > drivers/gpu/drm/i915/intel_gvt.c | 7 +- > drivers/gpu/drm/i915/intel_gvt.h | 5 +- > drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- > drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- > drivers/gpu/drm/i915/intel_uncore.c | 2 +- > drivers/gpu/drm/i915/intel_wopcm.c| 2 +- > drivers/gpu/drm/i915/oa/i915_oa_bdw.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_bxt.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_cflgt2.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_cflgt3.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_chv.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_cnl.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_glk.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_hsw.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_icl.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_kblgt2.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_kblgt3.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_sklgt2.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_sklgt3.h | 2 +- > drivers/gpu/drm/i915/oa/i915_oa_sklgt4.h | 2 +- > include/drm/i915_drm.h| 10 +- > 37 files changed, 145 insertions(+), 144 deletions(-) > > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for Docs: move more driver, device related docs into drivers dir follows kernel source
== Series Details == Series: Docs: move more driver, device related docs into drivers dir follows kernel source URL : https://patchwork.freedesktop.org/series/63633/ State : failure == Summary == Applying: Docs: move more driver, device related docs into drivers dir follows kernel source error: mode change for Documentation/cdrom/cdrom-standard.rst, which is not in current HEAD error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 Docs: move more driver, device related docs into drivers dir follows kernel source When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915/guc: Turn on GuC/HuC auto mode
Using "enable_guc" modparam auto mode (-1) will let driver decide on which platforms and in which configuration we want to use GuC/HuC firmwares. Today driver will enable HuC firmware authentication by GuC only on Gen11+ platforms as HuC firmware is required to unlock advanced video codecs in media driver. Legacy platforms with GuC/HuC are not affected by this change as for them driver still defaults to disabled(0) in auto mode. Signed-off-by: Michal Wajdeczko Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index d29ade3b7de6..5736c55694fe 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -54,7 +54,7 @@ struct drm_printer; param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc, 0) \ + param(int, enable_guc, -1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't enable GuC/HuC in auto mode on pre-Gen11
We are about to change default setting of "enable_guc" modparam from 0(disabled) to -1(auto). As we only want to turn on GuC/HuC on Gen11+, keep it off for older gens. Note that it would be still possible to enable GuC/HuC on these old platforms using explicit "enable_guc=2" modparam. Signed-off-by: Michal Wajdeczko Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/intel_uc.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index fdf00f1ebb57..72bbcb2597fd 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -58,12 +58,16 @@ static int __get_platform_enable_guc(struct drm_i915_private *i915) struct intel_uc_fw *huc_fw = &i915->huc.fw; int enable_guc = 0; - /* Default is to use HuC if we know GuC and HuC firmwares */ + if (!HAS_GUC(i915)) + return 0; + + /* We don't want to enable GuC/HuC on pre-Gen11 by default */ + if (INTEL_GEN(i915) < 11) + return 0; + if (intel_uc_fw_is_selected(guc_fw) && intel_uc_fw_is_selected(huc_fw)) enable_guc |= ENABLE_GUC_LOAD_HUC; - /* Any platform specific fine-tuning can be done here */ - return enable_guc; } -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't enable GuC/HuC in auto mode on pre-Gen11
Quoting Michal Wajdeczko (2019-07-12 14:14:44) > We are about to change default setting of "enable_guc" modparam > from 0(disabled) to -1(auto). As we only want to turn on > GuC/HuC on Gen11+, keep it off for older gens. > > Note that it would be still possible to enable GuC/HuC on these > old platforms using explicit "enable_guc=2" modparam. > > Signed-off-by: Michal Wajdeczko > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Chris Wilson > Cc: Daniele Ceraolo Spurio Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Turn on GuC/HuC auto mode
Quoting Michal Wajdeczko (2019-07-12 14:14:45) > Using "enable_guc" modparam auto mode (-1) will let driver > decide on which platforms and in which configuration we want > to use GuC/HuC firmwares. > > Today driver will enable HuC firmware authentication by GuC > only on Gen11+ platforms as HuC firmware is required to unlock > advanced video codecs in media driver. > > Legacy platforms with GuC/HuC are not affected by this change > as for them driver still defaults to disabled(0) in auto mode. > > Signed-off-by: Michal Wajdeczko > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Chris Wilson > Cc: Daniele Ceraolo Spurio Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RESUBMIT PATCH v3 1/6] drm/i915: Drop extern qualifiers from header function prototypes
Follow dim checkpatch recommendation so it doesn't complain on that now
and again on header file modifications.
v2: drop testing leftover (Chris)
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +-
drivers/gpu/drm/i915/gvt/gtt.h | 13 +++---
drivers/gpu/drm/i915/i915_drv.h| 47 ++
drivers/gpu/drm/i915/i915_irq.h| 4 +-
drivers/gpu/drm/i915/oa/i915_oa_bdw.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_bxt.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_cflgt2.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_cflgt3.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_chv.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_cnl.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_glk.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_hsw.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_icl.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_kblgt2.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_kblgt3.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_sklgt2.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_sklgt3.h | 2 +-
drivers/gpu/drm/i915/oa/i915_oa_sklgt4.h | 2 +-
include/drm/i915_drm.h | 10 ++---
19 files changed, 51 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 20754c15412a..67aea07ea019 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -81,7 +81,7 @@ i915_gem_object_lookup(struct drm_file *file, u32 handle)
}
__deprecated
-extern struct drm_gem_object *
+struct drm_gem_object *
drm_gem_object_lookup(struct drm_file *file, u32 handle);
__attribute__((nonnull))
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
index 42d0394f0de2..88789316807d 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.h
+++ b/drivers/gpu/drm/i915/gvt/gtt.h
@@ -205,17 +205,18 @@ struct intel_vgpu_gtt {
struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX];
};
-extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
-extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);
+int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
+void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);
void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old);
void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu);
-extern int intel_gvt_init_gtt(struct intel_gvt *gvt);
+int intel_gvt_init_gtt(struct intel_gvt *gvt);
void intel_vgpu_reset_gtt(struct intel_vgpu *vgpu);
-extern void intel_gvt_clean_gtt(struct intel_gvt *gvt);
+void intel_gvt_clean_gtt(struct intel_gvt *gvt);
-extern struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
- int page_table_level, void *root_entry);
+struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
+ int page_table_level,
+ void *root_entry);
struct intel_vgpu_oos_page {
struct intel_vgpu_ppgtt_spt *spt;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 56527a7a1666..1a6b4e14a405 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2390,19 +2390,17 @@ __i915_printk(struct drm_i915_private *dev_priv, const
char *level,
__i915_printk(dev_priv, KERN_ERR, fmt, ##__VA_ARGS__)
#ifdef CONFIG_COMPAT
-extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
- unsigned long arg);
+long i915_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
#else
#define i915_compat_ioctl NULL
#endif
extern const struct dev_pm_ops i915_pm_ops;
-extern int i915_driver_load(struct pci_dev *pdev,
- const struct pci_device_id *ent);
-extern void i915_driver_unload(struct drm_device *dev);
+int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent);
+void i915_driver_unload(struct drm_device *dev);
-extern void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
-extern void intel_hangcheck_init(struct drm_i915_private *dev_priv);
+void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
+void intel_hangcheck_init(struct drm_i915_private *dev_priv);
int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool on);
u32 intel_calculate_mcr_s_ss_select(struct drm_i915_private *dev_priv);
@@ -2672,14 +2670,14 @@ int intel_engine_cmd_parser(struct intel_engine_cs
*engine,
bool is_master);
/* i915_perf.c */
-extern void i915_perf_init(struct drm_i915_private *dev_priv);
-extern void i915_perf_fini(struct drm_i915_private *dev_priv);
-extern void i915_perf_register(struct drm_i915_private *dev_priv);
-extern void i915_perf_unregister(struct drm_i915_private *dev_priv);
+void i915_perf_init(struct drm_i915_private *dev_priv);
+void i915_perf_fini(struct drm_
[Intel-gfx] [RESUBMIT PATCH v3 2/6] drm/i915: Rename "_load"/"_unload" to match PCI entry points
Current names of i915_driver_load/unload() functions originate in
legacy DRM stubs. Reduce nomenclature ambiguity by renaming them to
match their current use as helpers called from PCI entry points.
Suggested by: Chris Wilson
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 8
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_pci.c | 4 ++--
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8502a2e4268e..9488aa3cb9cc 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1876,17 +1876,17 @@ static void i915_driver_destroy(struct drm_i915_private
*i915)
}
/**
- * i915_driver_load - setup chip and create an initial config
+ * i915_driver_probe - setup chip and create an initial config
* @pdev: PCI device
* @ent: matching PCI ID entry
*
- * The driver load routine has to do several things:
+ * The driver probe routine has to do several things:
* - drive output discovery via intel_modeset_init()
* - initialize the memory manager
* - allocate initial config memory
* - setup the DRM framebuffer with the allocated memory
*/
-int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
+int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
const struct intel_device_info *match_info =
(struct intel_device_info *)ent->driver_data;
@@ -1952,7 +1952,7 @@ int i915_driver_load(struct pci_dev *pdev, const struct
pci_device_id *ent)
return ret;
}
-void i915_driver_unload(struct drm_device *dev)
+void i915_driver_remove(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1a6b4e14a405..b644f54abec2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2396,8 +2396,8 @@ long i915_compat_ioctl(struct file *filp, unsigned int
cmd, unsigned long arg);
#endif
extern const struct dev_pm_ops i915_pm_ops;
-int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent);
-void i915_driver_unload(struct drm_device *dev);
+int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
+void i915_driver_remove(struct drm_device *dev);
void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
void intel_hangcheck_init(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e83c94cf2744..49558727b5f3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -878,7 +878,7 @@ static void i915_pci_remove(struct pci_dev *pdev)
if (!dev) /* driver load aborted, nothing to cleanup */
return;
- i915_driver_unload(dev);
+ i915_driver_remove(dev);
drm_dev_put(dev);
pci_set_drvdata(pdev, NULL);
@@ -953,7 +953,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
if (vga_switcheroo_client_probe_defer(pdev))
return -EPROBE_DEFER;
- err = i915_driver_load(pdev, ent);
+ err = i915_driver_probe(pdev, ent);
if (err)
return err;
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RESUBMIT PATCH v3 4/6] drm/i915: Propagate "_release" function name suffix down
Replace mixed "_fini"/"_cleanup"/"_cleanup_hw" suffixes found in names
of functions called from i915_driver_release() with "_release" suffix
consistently. This provides better code readability, especially
helpful when trying to work out which phase the code is in.
Functions names starting with "i915_driver_", i.e., those defined in
drivers/gpu/dri/i915/i915_drv.c, just have their "cleanup" or "fini"
parts of their names replaced with the "_release" suffix, while names
of functions coming from other source files have been suffixed with
"_driver_release" to avoid ambiguity with other possible .release entry
points.
v2: early_probe pairs better with late_release (Chris)
v3: fix typo in commit message (Joonas)
Suggested-by: Chris Wilson
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 33 +
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +--
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +-
7 files changed, 24 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7371571d735d..60dad4450e28 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -758,7 +758,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
cleanup_gem:
i915_gem_suspend(dev_priv);
i915_gem_fini_hw(dev_priv);
- i915_gem_fini(dev_priv);
+ i915_gem_driver_release(dev_priv);
cleanup_modeset:
intel_modeset_cleanup(dev);
cleanup_irq:
@@ -968,10 +968,11 @@ static int i915_driver_init_early(struct drm_i915_private
*dev_priv)
}
/**
- * i915_driver_cleanup_early - cleanup the setup done in
i915_driver_init_early()
+ * i915_driver_late_release - cleanup the setup done in
+ *i915_driver_init_early()
* @dev_priv: device private
*/
-static void i915_driver_cleanup_early(struct drm_i915_private *dev_priv)
+static void i915_driver_late_release(struct drm_i915_private *dev_priv)
{
intel_irq_fini(dev_priv);
intel_power_domains_cleanup(dev_priv);
@@ -1034,10 +1035,10 @@ static int i915_driver_init_mmio(struct
drm_i915_private *dev_priv)
}
/**
- * i915_driver_cleanup_mmio - cleanup the setup done in i915_driver_init_mmio()
+ * i915_driver_mmio_release - cleanup the setup done in i915_driver_init_mmio()
* @dev_priv: device private
*/
-static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv)
+static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
{
intel_teardown_mchbar(dev_priv);
intel_uncore_fini_mmio(&dev_priv->uncore);
@@ -1690,7 +1691,7 @@ static int i915_driver_init_hw(struct drm_i915_private
*dev_priv)
pci_disable_msi(pdev);
pm_qos_remove_request(&dev_priv->pm_qos);
err_ggtt:
- i915_ggtt_cleanup_hw(dev_priv);
+ i915_ggtt_driver_release(dev_priv);
err_perf:
i915_perf_fini(dev_priv);
return ret;
@@ -1935,15 +1936,15 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
out_cleanup_hw:
i915_driver_cleanup_hw(dev_priv);
- i915_ggtt_cleanup_hw(dev_priv);
+ i915_ggtt_driver_release(dev_priv);
/* Paranoia: make sure we have disabled everything before we exit. */
intel_sanitize_gt_powersave(dev_priv);
out_cleanup_mmio:
- i915_driver_cleanup_mmio(dev_priv);
+ i915_driver_mmio_release(dev_priv);
out_runtime_pm_put:
enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
- i915_driver_cleanup_early(dev_priv);
+ i915_driver_late_release(dev_priv);
out_pci_disable:
pci_disable_device(pdev);
out_fini:
@@ -2006,19 +2007,19 @@ static void i915_driver_release(struct drm_device *dev)
disable_rpm_wakeref_asserts(rpm);
- i915_gem_fini(dev_priv);
+ i915_gem_driver_release(dev_priv);
- i915_ggtt_cleanup_hw(dev_priv);
+ i915_ggtt_driver_release(dev_priv);
/* Paranoia: make sure we have disabled everything before we exit. */
intel_sanitize_gt_powersave(dev_priv);
- i915_driver_cleanup_mmio(dev_priv);
+ i915_driver_mmio_release(dev_priv);
enable_rpm_wakeref_asserts(rpm);
- intel_runtime_pm_cleanup(rpm);
+ intel_runtime_pm_driver_release(rpm);
- i915_driver_cleanup_early(dev_priv);
+ i915_driver_late_release(dev_priv);
i915_driver_destroy(dev_priv);
}
@@ -2211,7 +2212,7 @@ static int i915_drm_suspend_late(struct drm_device *dev,
bool hibernation)
out:
enable_rpm_wakeref_asserts(rpm);
if (!dev_priv->uncore.user_forcewake.count)
- intel_runtime_pm_cleanup(rpm);
+ intel_runtime_pm_driver_release(rpm);
[Intel-gfx] [RESUBMIT PATCH v3 5/6] drm/i915: Propagate "_remove" function name suffix down
Similar to the "_release" case, consistently replace mixed
"_cleanup"/"_fini"/"_fini_hw" components found in names of functions
called from i915_driver_remove() with "_remove" or "_driver_remove"
suffixes for better code readability.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
drivers/gpu/drm/i915/display/intel_bios.h | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_power.c| 6 ++---
.../drm/i915/display/intel_display_power.h| 2 +-
drivers/gpu/drm/i915/i915_drv.c | 24 +--
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/intel_gvt.c | 5 ++--
drivers/gpu/drm/i915/intel_gvt.h | 5 ++--
10 files changed, 29 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 2fe68f72b88f..21501d565327 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1908,10 +1908,10 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
}
/**
- * intel_bios_cleanup - Free any resources allocated by intel_bios_init()
+ * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
* @dev_priv: i915 device instance
*/
-void intel_bios_cleanup(struct drm_i915_private *dev_priv)
+void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
{
kfree(dev_priv->vbt.child_dev);
dev_priv->vbt.child_dev = NULL;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h
b/drivers/gpu/drm/i915/display/intel_bios.h
index 0b7be6389a07..4969189e620f 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -228,7 +228,7 @@ struct mipi_pps_data {
} __packed;
void intel_bios_init(struct drm_i915_private *dev_priv);
-void intel_bios_cleanup(struct drm_i915_private *dev_priv);
+void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
bool intel_bios_is_valid_vbt(const void *buf, size_t size);
bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8
*i2c_pin);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 79ae8f4e5213..e12671ca1886 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17092,7 +17092,7 @@ static void intel_hpd_poll_fini(struct drm_device *dev)
drm_connector_list_iter_end(&conn_iter);
}
-void intel_modeset_cleanup(struct drm_device *dev)
+void intel_modeset_driver_remove(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display/intel_display_power.c
index d25fd5a25199..93a148684c53 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4902,7 +4902,7 @@ static void intel_power_domains_verify_state(struct
drm_i915_private *dev_priv);
*
* It will return with power domains disabled (to be enabled later by
* intel_power_domains_enable()) and must be paired with
- * intel_power_domains_fini_hw().
+ * intel_power_domains_driver_remove().
*/
void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
{
@@ -4954,7 +4954,7 @@ void intel_power_domains_init_hw(struct drm_i915_private
*i915, bool resume)
}
/**
- * intel_power_domains_fini_hw - deinitialize hw power domain state
+ * intel_power_domains_driver_remove - deinitialize hw power domain state
* @i915: i915 device instance
*
* De-initializes the display power domain HW state. It also ensures that the
@@ -4964,7 +4964,7 @@ void intel_power_domains_init_hw(struct drm_i915_private
*i915, bool resume)
* intel_power_domains_disable()) and must be paired with
* intel_power_domains_init_hw().
*/
-void intel_power_domains_fini_hw(struct drm_i915_private *i915)
+void intel_power_domains_driver_remove(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref __maybe_unused =
fetch_and_zero(&i915->power_domains.wakeref);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
b/drivers/gpu/drm/i915/display/intel_display_power.h
index a264f18c95f1..e4d2c1ba24b0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -241,7 +241,7 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv);
int intel_power_domains_init(struct drm_i915_private *dev_priv);
void intel_power_domains_cleanup(struct drm_i915_private *dev_priv);
void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool
resume);
[Intel-gfx] [RESUBMIT PATCH v3 3/6] drm/i915: Replace "_load" with "_probe" consequently
Use the "_probe" nomenclature not only in i915_driver_probe() helper
name but also in other related function / variable names for
consistency. Only the userspace exposed name of a related module
parameter is left untouched.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
.../gpu/drm/i915/display/intel_connector.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 20 +--
drivers/gpu/drm/i915/i915_drv.h | 10 +-
drivers/gpu/drm/i915/i915_gem.c | 8
drivers/gpu/drm/i915/i915_pci.c | 2 +-
drivers/gpu/drm/i915/intel_gvt.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
drivers/gpu/drm/i915/intel_wopcm.c| 2 +-
9 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_connector.c
b/drivers/gpu/drm/i915/display/intel_connector.c
index 41310f8e5a2a..d0163d86c42a 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -118,7 +118,7 @@ int intel_connector_register(struct drm_connector
*connector)
if (ret)
goto err;
- if (i915_inject_load_failure()) {
+ if (i915_inject_probe_failure()) {
ret = -EFAULT;
goto err_backlight;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 76b5c068a26d..2dc1917b9d30 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -426,7 +426,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
WARN_ON(engine_mask &
GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9488aa3cb9cc..7371571d735d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -81,14 +81,14 @@
static struct drm_driver driver;
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
-static unsigned int i915_load_fail_count;
+static unsigned int i915_probe_fail_count;
-bool __i915_inject_load_failure(const char *func, int line)
+bool __i915_inject_probe_failure(const char *func, int line)
{
- if (i915_load_fail_count >= i915_modparams.inject_load_failure)
+ if (i915_probe_fail_count >= i915_modparams.inject_load_failure)
return false;
- if (++i915_load_fail_count == i915_modparams.inject_load_failure) {
+ if (++i915_probe_fail_count == i915_modparams.inject_load_failure) {
DRM_INFO("Injecting failure at checkpoint %u [%s:%d]\n",
i915_modparams.inject_load_failure, func, line);
i915_modparams.inject_load_failure = 0;
@@ -100,7 +100,7 @@ bool __i915_inject_load_failure(const char *func, int line)
bool i915_error_injected(void)
{
- return i915_load_fail_count && !i915_modparams.inject_load_failure;
+ return i915_probe_fail_count && !i915_modparams.inject_load_failure;
}
#endif
@@ -687,7 +687,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
if (HAS_DISPLAY(dev_priv)) {
@@ -903,7 +903,7 @@ static int i915_driver_init_early(struct drm_i915_private
*dev_priv)
{
int ret = 0;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
intel_device_info_subplatform_init(dev_priv);
@@ -997,7 +997,7 @@ static int i915_driver_init_mmio(struct drm_i915_private
*dev_priv)
{
int ret;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
if (i915_get_bridge_dev(dev_priv))
@@ -1541,7 +1541,7 @@ static int i915_driver_init_hw(struct drm_i915_private
*dev_priv)
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
- if (i915_inject_load_failure())
+ if (i915_inject_probe_failure())
return -ENODEV;
intel_device_info_runtime_init(dev_priv);
@@ -1947,7 +1947,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
out_pci_disable:
pci_disable_device(pdev);
out_fini:
- i915_load_error(dev_priv, "Device initialization failed (%d)\n", ret);
+ i915_probe_error(dev_priv, "Device initialization failed (%d)\n", ret);
i915_driver_destroy(dev_priv);
return ret;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
i
[Intel-gfx] [RESUBMIT PATCH v3 0/6] drm/i915: Rename functions to match their entry points
Need for this was identified while working on split of driver unbind path into _remove() and _release() parts. Consistency in function naming has been recognized as helpful when trying to work out which phase the code is in. v2: * early_probe pairs better with late_release (Chris), * exclude patch 6/6 "drm/i915: Rename "inject_load_failure" module parameter" for now, it requires updates on user (IGT) side * rebase on top of "drm/i915: Drop extern qualifiers from header function prototypes" v3: * fix typo in commit message of 3/5 (now 4/6) (Joonas) * bundle with "drm/i915: Drop extern qualifiers from header function prototypes", which the series depends on, as 1/6 (Chris) Resubmitting with Reviewed-by: clauses added. Janusz Krzysztofik (6): drm/i915: Drop extern qualifiers from header function prototypes drm/i915: Rename "_load"/"_unload" to match PCI entry points drm/i915: Replace "_load" with "_probe" consequently drm/i915: Propagate "_release" function name suffix down drm/i915: Propagate "_remove" function name suffix down drm/i915: Propagate "_probe" function name suffix down drivers/gpu/drm/i915/display/intel_bios.c | 4 +- drivers/gpu/drm/i915/display/intel_bios.h | 2 +- .../gpu/drm/i915/display/intel_connector.c| 2 +- drivers/gpu/drm/i915/display/intel_display.c | 2 +- .../drm/i915/display/intel_display_power.c| 6 +- .../drm/i915/display/intel_display_power.h| 2 +- drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/gvt/gtt.h| 13 ++- drivers/gpu/drm/i915/i915_drv.c | 107 +- drivers/gpu/drm/i915/i915_drv.h | 61 +- drivers/gpu/drm/i915/i915_gem.c | 12 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- drivers/gpu/drm/i915/i915_irq.h | 4 +- drivers/gpu/drm/i915/i915_pci.c | 6 +- drivers/gpu/drm/i915/intel_gvt.c | 7 +- drivers/gpu/drm/i915/intel_gvt.h | 5 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- drivers/gpu/drm/i915/intel_uncore.c | 2 +- drivers/gpu/drm/i915/intel_wopcm.c| 2 +- drivers/gpu/drm/i915/oa/i915_oa_bdw.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_bxt.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_cflgt2.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_cflgt3.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_chv.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_cnl.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_glk.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_hsw.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_icl.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_kblgt2.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_kblgt3.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_sklgt2.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_sklgt3.h | 2 +- drivers/gpu/drm/i915/oa/i915_oa_sklgt4.h | 2 +- include/drm/i915_drm.h| 10 +- 37 files changed, 145 insertions(+), 144 deletions(-) -- 2.21.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RESUBMIT PATCH v3 6/6] drm/i915: Propagate "_probe" function name suffix down
Similar to the "_release" and "_remove" cases, consequently replace
"_init" components of names of functions called from
i915_driver_probe() with "_probe" suffixes for better code readability.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3af8e602befe..e2d1bed9454c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -681,7 +681,7 @@ static const struct vga_switcheroo_client_ops
i915_switcheroo_ops = {
.can_switch = i915_switcheroo_can_switch,
};
-static int i915_load_modeset_init(struct drm_device *dev)
+static int i915_driver_modeset_probe(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
@@ -890,7 +890,7 @@ static void intel_detect_preproduction_hw(struct
drm_i915_private *dev_priv)
}
/**
- * i915_driver_init_early - setup state not requiring device access
+ * i915_driver_early_probe - setup state not requiring device access
* @dev_priv: device private
*
* Initialize everything that is a "SW-only" state, that is state not
@@ -899,7 +899,7 @@ static void intel_detect_preproduction_hw(struct
drm_i915_private *dev_priv)
* system memory allocation, setting up device specific attributes and
* function hooks not requiring accessing the device.
*/
-static int i915_driver_init_early(struct drm_i915_private *dev_priv)
+static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
{
int ret = 0;
@@ -969,7 +969,7 @@ static int i915_driver_init_early(struct drm_i915_private
*dev_priv)
/**
* i915_driver_late_release - cleanup the setup done in
- *i915_driver_init_early()
+ *i915_driver_early_probe()
* @dev_priv: device private
*/
static void i915_driver_late_release(struct drm_i915_private *dev_priv)
@@ -986,7 +986,7 @@ static void i915_driver_late_release(struct
drm_i915_private *dev_priv)
}
/**
- * i915_driver_init_mmio - setup device MMIO
+ * i915_driver_mmio_probe - setup device MMIO
* @dev_priv: device private
*
* Setup minimal device state necessary for MMIO accesses later in the
@@ -994,7 +994,7 @@ static void i915_driver_late_release(struct
drm_i915_private *dev_priv)
* side effects or exposing the driver via kernel internal or user space
* interfaces.
*/
-static int i915_driver_init_mmio(struct drm_i915_private *dev_priv)
+static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
{
int ret;
@@ -1035,7 +1035,7 @@ static int i915_driver_init_mmio(struct drm_i915_private
*dev_priv)
}
/**
- * i915_driver_mmio_release - cleanup the setup done in i915_driver_init_mmio()
+ * i915_driver_mmio_release - cleanup the setup done in
i915_driver_mmio_probe()
* @dev_priv: device private
*/
static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
@@ -1531,13 +1531,13 @@ static void edram_detect(struct drm_i915_private
*dev_priv)
}
/**
- * i915_driver_init_hw - setup state requiring device access
+ * i915_driver_hw_probe - setup state requiring device access
* @dev_priv: device private
*
* Setup state that requires accessing the device, but doesn't require
* exposing the driver via kernel internal or userspace interfaces.
*/
-static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
+static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
{
struct pci_dev *pdev = dev_priv->drm.pdev;
int ret;
@@ -1906,7 +1906,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
if (ret)
goto out_fini;
- ret = i915_driver_init_early(dev_priv);
+ ret = i915_driver_early_probe(dev_priv);
if (ret < 0)
goto out_pci_disable;
@@ -1914,15 +1914,15 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
i915_detect_vgpu(dev_priv);
- ret = i915_driver_init_mmio(dev_priv);
+ ret = i915_driver_mmio_probe(dev_priv);
if (ret < 0)
goto out_runtime_pm_put;
- ret = i915_driver_init_hw(dev_priv);
+ ret = i915_driver_hw_probe(dev_priv);
if (ret < 0)
goto out_cleanup_mmio;
- ret = i915_load_modeset_init(&dev_priv->drm);
+ ret = i915_driver_modeset_probe(&dev_priv->drm);
if (ret < 0)
goto out_cleanup_hw;
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/4] drm/i915/gtt: Recursive cleanup for gen8
With an explicit level, we can refactor the separate cleanup functions
as a simple recursive function. We take the opportunity to pass down the
size of each level so that we can deal with the different sizes of
top-level and avoid over allocating for 32/36-bit vm.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 93 ++---
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
2 files changed, 33 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 753090a7729e..305c65c08a6a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -713,11 +713,11 @@ static struct i915_page_table *alloc_pt(struct
i915_address_space *vm)
return pt;
}
-static struct i915_page_directory *__alloc_pd(void)
+static struct i915_page_directory *__alloc_pd(size_t sz)
{
struct i915_page_directory *pd;
- pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
+ pd = kzalloc(sz, I915_GFP_ALLOW_FAIL);
if (unlikely(!pd))
return NULL;
@@ -729,7 +729,7 @@ static struct i915_page_directory *alloc_pd(struct
i915_address_space *vm)
{
struct i915_page_directory *pd;
- pd = __alloc_pd();
+ pd = __alloc_pd(sizeof(*pd));
if (unlikely(!pd))
return ERR_PTR(-ENOMEM);
@@ -766,7 +766,7 @@ __set_pd_entry(struct i915_page_directory * const pd,
struct i915_page_dma * const to,
u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
{
- GEM_BUG_ON(atomic_read(px_used(pd)) > 512);
+ GEM_BUG_ON(atomic_read(px_used(pd)) > ARRAY_SIZE(pd->entry));
atomic_inc(px_used(pd));
pd->entry[idx] = to;
@@ -896,64 +896,34 @@ static inline unsigned int gen8_pt_count(u64 start, u64
end)
return end - start;
}
-static void gen8_free_page_tables(struct i915_address_space *vm,
- struct i915_page_directory *pd)
+static void __gen8_ppgtt_cleanup(struct i915_address_space *vm,
+struct i915_page_directory *pd,
+int count, int lvl)
{
- int i;
-
- for (i = 0; i < I915_PDES; i++) {
- if (pd->entry[i])
- free_pd(vm, pd->entry[i]);
- }
-}
-
-static void gen8_ppgtt_cleanup_3lvl(struct i915_address_space *vm,
- struct i915_page_directory *pdp)
-{
- const unsigned int pdpes = i915_pdpes_per_pdp(vm);
- int i;
-
- for (i = 0; i < pdpes; i++) {
- if (!pdp->entry[i])
- continue;
-
- gen8_free_page_tables(vm, pdp->entry[i]);
- free_pd(vm, pdp->entry[i]);
- }
-
- free_px(vm, pdp);
-}
-
-static void gen8_ppgtt_cleanup_4lvl(struct i915_ppgtt *ppgtt)
-{
- struct i915_page_directory * const pml4 = ppgtt->pd;
- int i;
-
- for (i = 0; i < GEN8_PML4ES_PER_PML4; i++) {
- struct i915_page_directory *pdp = i915_pdp_entry(pml4, i);
+ if (lvl) {
+ void **pde = pd->entry;
- if (!pdp)
- continue;
+ do {
+ if (!*pde)
+ continue;
- gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, pdp);
+ __gen8_ppgtt_cleanup(vm, *pde, I915_PDES, lvl - 1);
+ } while (pde++, --count);
}
- free_px(&ppgtt->vm, pml4);
+ free_px(vm, pd);
}
static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
{
- struct drm_i915_private *i915 = vm->i915;
struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
- if (intel_vgpu_active(i915))
+ if (intel_vgpu_active(vm->i915))
gen8_ppgtt_notify_vgt(ppgtt, false);
- if (i915_vm_is_4lvl(vm))
- gen8_ppgtt_cleanup_4lvl(ppgtt);
- else
- gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, ppgtt->pd);
-
+ __gen8_ppgtt_cleanup(vm, ppgtt->pd,
+vm->total >> __gen8_pte_shift(vm->top),
+vm->top);
free_scratch(vm);
}
@@ -1505,24 +1475,18 @@ static int gen8_preallocate_top_level_pdp(struct
i915_ppgtt *ppgtt)
struct i915_page_directory *pdp = ppgtt->pd;
struct i915_page_directory *pd;
u64 start = 0, length = ppgtt->vm.total;
- u64 from = start;
unsigned int pdpe;
gen8_for_each_pdpe(pd, pdp, start, length, pdpe) {
pd = alloc_pd(vm);
if (IS_ERR(pd))
- goto unwind;
+ return PTR_ERR(pd);
fill_px(pd, vm->scratch[1].encode);
set_pd_entry(pdp, pdpe, pd);
}
return 0;
-
-unwind:
- gen8_ppgtt_clear_pdp(vm, pdp, from, start - from);
- atomic_set(px_used(pdp), 0);
- return -
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't enable GuC/HuC in auto mode on pre-Gen11
On Fri, Jul 12, 2019 at 11:14:44AM +, Michal Wajdeczko wrote: > We are about to change default setting of "enable_guc" modparam > from 0(disabled) to -1(auto). As we only want to turn on > GuC/HuC on Gen11+, keep it off for older gens. > > Note that it would be still possible to enable GuC/HuC on these > old platforms using explicit "enable_guc=2" modparam. > > Signed-off-by: Michal Wajdeczko > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Chris Wilson > Cc: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_uc.c | 10 +++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c > index fdf00f1ebb57..72bbcb2597fd 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -58,12 +58,16 @@ static int __get_platform_enable_guc(struct > drm_i915_private *i915) > struct intel_uc_fw *huc_fw = &i915->huc.fw; > int enable_guc = 0; > > - /* Default is to use HuC if we know GuC and HuC firmwares */ > + if (!HAS_GUC(i915)) > + return 0; > + > + /* We don't want to enable GuC/HuC on pre-Gen11 by default */ > + if (INTEL_GEN(i915) < 11) > + return 0; > + > if (intel_uc_fw_is_selected(guc_fw) && intel_uc_fw_is_selected(huc_fw)) > enable_guc |= ENABLE_GUC_LOAD_HUC; > > - /* Any platform specific fine-tuning can be done here */ > - > return enable_guc; > } > > -- > 2.19.2 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/4] drm/i915/gtt: Recursive ppgtt clear for gen8
With an explicit level, we can refactor the separate clear functions
as a simple recursive function. The additional knowledge of the level
allows us to spot when we can free an entire subtree at once.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Kconfig.debug | 15 +++
drivers/gpu/drm/i915/i915_gem_gtt.c | 154
2 files changed, 105 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index 8d922bb4d953..ed8c787058a5 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -94,6 +94,21 @@ config DRM_I915_TRACE_GEM
If in doubt, say "N".
+config DRM_I915_TRACE_GTT
+ bool "Insert extra ftrace output from the GTT internals"
+ depends on DRM_I915_DEBUG_GEM
+ select TRACING
+ default n
+ help
+ Enable additional and verbose debugging output that will spam
+ ordinary tests, but may be vital for post-mortem debugging when
+ used with /proc/sys/kernel/ftrace_dump_on_oops
+
+ Recommended for driver developers only.
+
+ If in doubt, say "N".
+
+
config DRM_I915_SW_FENCE_DEBUG_OBJECTS
bool "Enable additional driver debugging for fence objects"
depends on DRM_I915
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 305c65c08a6a..7b2f3188d435 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -46,6 +46,12 @@
#define I915_GFP_ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
+#if IS_ENABLED(CONFIG_DRM_I915_TRACE_GTT)
+#define DBG(...) trace_printk(__VA_ARGS__)
+#else
+#define DBG(...)
+#endif
+
/**
* DOC: Global GTT views
*
@@ -796,6 +802,9 @@ release_pd_entry(struct i915_page_directory * const pd,
{
bool free = false;
+ if (atomic_add_unless(&pt->used, -1, 1))
+ return false;
+
spin_lock(&pd->lock);
if (atomic_dec_and_test(&pt->used)) {
clear_pd_entry(pd, idx, scratch);
@@ -927,86 +936,101 @@ static void gen8_ppgtt_cleanup(struct i915_address_space
*vm)
free_scratch(vm);
}
-/* Removes entries from a single page table, releasing it if it's empty.
- * Caller can use the return value to update higher-level entries.
- */
-static void gen8_ppgtt_clear_pt(const struct i915_address_space *vm,
- struct i915_page_table *pt,
- u64 start, u64 length)
+static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
+ struct i915_page_directory * const pd,
+ u64 start, const u64 end, int lvl)
{
- const unsigned int num_entries = gen8_pte_count(start, length);
- gen8_pte_t *vaddr;
+ const struct i915_page_scratch * const scratch = &vm->scratch[lvl];
+ unsigned int idx, len;
- vaddr = kmap_atomic_px(pt);
- memset64(vaddr + gen8_pte_index(start),
-vm->scratch[0].encode,
-num_entries);
- kunmap_atomic(vaddr);
+ len = gen8_pd_range(start, end, lvl--, &idx);
+ DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d}\n",
+ __func__, vm, lvl + 1, start, end,
+ idx, len, atomic_read(px_used(pd)));
+ GEM_BUG_ON(!len || len >= atomic_read(px_used(pd)));
- GEM_BUG_ON(num_entries > atomic_read(&pt->used));
+ do {
+ struct i915_page_table *pt = pd->entry[idx];
+
+ if (atomic_fetch_inc(&pt->used) >> gen8_pd_shift(1) &&
+ gen8_pd_contains(start, end, lvl)) {
+ DBG("%s(%p):{ lvl:%d, idx:%d, start:%llx, end:%llx }
removing pd\n",
+ __func__, vm, lvl + 1, idx, start, end);
+ clear_pd_entry(pd, idx, scratch);
+ __gen8_ppgtt_cleanup(vm, as_pd(pt), I915_PDES, lvl);
+ start += (u64)I915_PDES << gen8_pd_shift(lvl);
+ continue;
+ }
- atomic_sub(num_entries, &pt->used);
-}
+ if (lvl) {
+ start = __gen8_ppgtt_clear(vm, as_pd(pt),
+ start, end, lvl);
+ } else {
+ unsigned int count;
+ u64 *vaddr;
-static void gen8_ppgtt_clear_pd(struct i915_address_space *vm,
- struct i915_page_directory *pd,
- u64 start, u64 length)
-{
- struct i915_page_table *pt;
- u32 pde;
+ count = gen8_pt_count(start, end);
+ DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d,
len:%d, used:%d} removing pte\n",
+ __func__, vm, lvl, start, end,
+ gen8_pd_index(start, 0), count,
+ at
[Intel-gfx] ppGTT the recursive wars
Doing more with less! We restore and succesfully generalise a recently lost optimisation to avoid updating page directories to be removed, all while using less i$ and hopefully more predictable branches. Mircoptimisations, but less code for the win. We even add some debug traces for the next poor soul to be trapped here. drivers/gpu/drm/i915/Kconfig.debug | 15 + drivers/gpu/drm/i915/i915_gem_gtt.c | 586 +++- drivers/gpu/drm/i915/i915_gem_gtt.h | 92 +- 3 files changed, 259 insertions(+), 434 deletions(-) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/4] drm/i915/gtt: Tidy up ppgtt insertion for gen8
Apply the new radix shift helpers to extract the multi-level indices
cleanly when inserting pte into the gtt tree.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 115 +++-
drivers/gpu/drm/i915/i915_gem_gtt.h | 90 ++
2 files changed, 48 insertions(+), 157 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 72e0f9799a46..de78dc8c425c 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1131,47 +1131,28 @@ static inline struct sgt_dma {
return (struct sgt_dma) { sg, addr, addr + sg->length };
}
-struct gen8_insert_pte {
- u16 pml4e;
- u16 pdpe;
- u16 pde;
- u16 pte;
-};
-
-static __always_inline struct gen8_insert_pte gen8_insert_pte(u64 start)
-{
- return (struct gen8_insert_pte) {
-gen8_pml4e_index(start),
-gen8_pdpe_index(start),
-gen8_pde_index(start),
-gen8_pte_index(start),
- };
-}
-
-static __always_inline bool
+static __always_inline u64
gen8_ppgtt_insert_pte_entries(struct i915_ppgtt *ppgtt,
struct i915_page_directory *pdp,
struct sgt_dma *iter,
- struct gen8_insert_pte *idx,
+ u64 idx,
enum i915_cache_level cache_level,
u32 flags)
{
struct i915_page_directory *pd;
const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags);
gen8_pte_t *vaddr;
- bool ret;
- GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->vm));
- pd = i915_pd_entry(pdp, idx->pdpe);
- vaddr = kmap_atomic_px(i915_pt_entry(pd, idx->pde));
+ pd = i915_pd_entry(pdp, gen8_pd_index(idx, 2));
+ vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1)));
do {
- vaddr[idx->pte] = pte_encode | iter->dma;
+ vaddr[gen8_pd_index(idx, 0)] = pte_encode | iter->dma;
iter->dma += I915_GTT_PAGE_SIZE;
if (iter->dma >= iter->max) {
iter->sg = __sg_next(iter->sg);
if (!iter->sg) {
- ret = false;
+ idx = 0;
break;
}
@@ -1179,30 +1160,22 @@ gen8_ppgtt_insert_pte_entries(struct i915_ppgtt *ppgtt,
iter->max = iter->dma + iter->sg->length;
}
- if (++idx->pte == GEN8_PTES) {
- idx->pte = 0;
-
- if (++idx->pde == I915_PDES) {
- idx->pde = 0;
-
+ if (gen8_pd_index(++idx, 0) == 0) {
+ if (gen8_pd_index(idx, 1) == 0) {
/* Limited by sg length for 3lvl */
- if (++idx->pdpe == GEN8_PML4ES_PER_PML4) {
- idx->pdpe = 0;
- ret = true;
+ if (gen8_pd_index(idx, 2) == 0)
break;
- }
- GEM_BUG_ON(idx->pdpe >=
i915_pdpes_per_pdp(&ppgtt->vm));
- pd = pdp->entry[idx->pdpe];
+ pd = pdp->entry[gen8_pd_index(idx, 2)];
}
kunmap_atomic(vaddr);
- vaddr = kmap_atomic_px(i915_pt_entry(pd, idx->pde));
+ vaddr = kmap_atomic_px(i915_pt_entry(pd,
gen8_pd_index(idx, 1)));
}
} while (1);
kunmap_atomic(vaddr);
- return ret;
+ return idx;
}
static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
@@ -1212,9 +1185,9 @@ static void gen8_ppgtt_insert_3lvl(struct
i915_address_space *vm,
{
struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
struct sgt_dma iter = sgt_dma(vma);
- struct gen8_insert_pte idx = gen8_insert_pte(vma->node.start);
- gen8_ppgtt_insert_pte_entries(ppgtt, ppgtt->pd, &iter, &idx,
+ gen8_ppgtt_insert_pte_entries(ppgtt, ppgtt->pd, &iter,
+ vma->node.start >> GEN8_PTE_SHIFT,
cache_level, flags);
vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
@@ -1231,39 +1204,38 @@ static void gen8_ppgtt_insert_huge_entries(struct
i915_vma *vma,
dma_addr_t rem = iter->sg->length;
do {
- struct gen8_insert_pte idx = gen8_insert_pte(start);
struct i915_page_directory *pdp =
- i915_pdp_entry(pml4, idx.pml4e);
- struct i915_page_directory *pd = i915_pd_entry(pdp, idx.pdpe);
- unsigned int page_s
[Intel-gfx] [PATCH 3/4] drm/i915/gtt: Recursive ppgtt alloc for gen8
Refactor the separate allocation routines into a single recursive
function.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 272 ++--
1 file changed, 97 insertions(+), 175 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 7b2f3188d435..72e0f9799a46 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1007,199 +1007,119 @@ static void gen8_ppgtt_clear(struct
i915_address_space *vm,
start, start + length, vm->top);
}
-static void gen8_ppgtt_clear_pd(struct i915_address_space *vm,
- struct i915_page_directory *pd,
- u64 start, u64 length)
-{
- GEM_BUG_ON(!IS_ALIGNED(start, BIT_ULL(GEN8_PTE_SHIFT)));
- GEM_BUG_ON(!IS_ALIGNED(length, BIT_ULL(GEN8_PTE_SHIFT)));
-
- start >>= GEN8_PTE_SHIFT;
- length >>= GEN8_PTE_SHIFT;
-
- __gen8_ppgtt_clear(vm, pd, start, start + length, 1);
-}
-
-static void gen8_ppgtt_clear_pdp(struct i915_address_space *vm,
-struct i915_page_directory * const pdp,
-u64 start, u64 length)
-{
- GEM_BUG_ON(!IS_ALIGNED(start, BIT_ULL(GEN8_PTE_SHIFT)));
- GEM_BUG_ON(!IS_ALIGNED(length, BIT_ULL(GEN8_PTE_SHIFT)));
-
- start >>= GEN8_PTE_SHIFT;
- length >>= GEN8_PTE_SHIFT;
-
- __gen8_ppgtt_clear(vm, pdp, start, start + length, 2);
-}
-
-static int gen8_ppgtt_alloc_pd(struct i915_address_space *vm,
- struct i915_page_directory *pd,
- u64 start, u64 length)
+static int __gen8_ppgtt_alloc(struct i915_address_space * const vm,
+ struct i915_page_directory * const pd,
+ u64 * const start, u64 end, int lvl)
{
- struct i915_page_table *pt, *alloc = NULL;
- u64 from = start;
- unsigned int pde;
+ const struct i915_page_scratch * const scratch = &vm->scratch[lvl];
+ struct i915_page_table *alloc = NULL;
+ unsigned int idx, len;
int ret = 0;
+ len = gen8_pd_range(*start, end, lvl--, &idx);
+ DBG("%s(%p):{lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d}\n",
+ __func__, vm, lvl + 1, *start, end,
+ idx, len, atomic_read(px_used(pd)));
+ GEM_BUG_ON(!len || (idx + len - 1) >> gen8_pd_shift(1));
+
spin_lock(&pd->lock);
- gen8_for_each_pde(pt, pd, start, length, pde) {
- const int count = gen8_pte_count(start, length);
+ GEM_BUG_ON(!atomic_read(px_used(pd))); /* Must be pinned! */
+ do {
+ struct i915_page_table *pt = pd->entry[idx];
if (!pt) {
spin_unlock(&pd->lock);
- pt = fetch_and_zero(&alloc);
- if (!pt)
- pt = alloc_pt(vm);
- if (IS_ERR(pt)) {
- ret = PTR_ERR(pt);
- goto unwind;
- }
+ DBG("%s(%p):{ lvl:%d, idx:%d } allocating new tree\n",
+ __func__, vm, lvl + 1, idx);
- if (count < GEN8_PTES || intel_vgpu_active(vm->i915))
- fill_px(pt, vm->scratch[0].encode);
+ pt = fetch_and_zero(&alloc);
+ if (lvl) {
+ if (!pt) {
+ pt = &alloc_pd(vm)->pt;
+ if (IS_ERR(pt)) {
+ ret = PTR_ERR(pt);
+ goto out;
+ }
+ }
- spin_lock(&pd->lock);
- if (!pd->entry[pde]) {
- set_pd_entry(pd, pde, pt);
+ fill_px(pt, vm->scratch[lvl].encode);
} else {
- alloc = pt;
- pt = pd->entry[pde];
- }
- }
-
- atomic_add(count, &pt->used);
- }
- spin_unlock(&pd->lock);
- goto out;
-
-unwind:
- gen8_ppgtt_clear_pd(vm, pd, from, start - from);
-out:
- if (alloc)
- free_px(vm, alloc);
- return ret;
-}
-
-static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm,
- struct i915_page_directory *pdp,
- u64 start, u64 length)
-{
- struct i915_page_directory *pd, *alloc = NULL;
- u64 from = start;
- unsigned int pdpe;
- int ret = 0;
+ if (!pt) {
+ pt = alloc_pt(vm);
+
Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Turn on GuC/HuC auto mode
On Fri, Jul 12, 2019 at 11:14:45AM +, Michal Wajdeczko wrote: > Using "enable_guc" modparam auto mode (-1) will let driver > decide on which platforms and in which configuration we want > to use GuC/HuC firmwares. > > Today driver will enable HuC firmware authentication by GuC > only on Gen11+ platforms as HuC firmware is required to unlock > advanced video codecs in media driver. > > Legacy platforms with GuC/HuC are not affected by this change > as for them driver still defaults to disabled(0) in auto mode. > > Signed-off-by: Michal Wajdeczko > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Chris Wilson > Cc: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/i915_params.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index d29ade3b7de6..5736c55694fe 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -54,7 +54,7 @@ struct drm_printer; > param(int, disable_power_well, -1) \ > param(int, enable_ips, 1) \ > param(int, invert_brightness, 0) \ > - param(int, enable_guc, 0) \ > + param(int, enable_guc, -1) \ > param(int, guc_log_level, -1) \ > param(char *, guc_firmware_path, NULL) \ > param(char *, huc_firmware_path, NULL) \ > -- > 2.19.2 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Drop extern qualifiers from header function prototypes
On Thursday, July 11, 2019 8:55:05 AM CEST Chris Wilson wrote: > Quoting Janusz Krzysztofik (2019-07-11 07:50:01) > > Follow dim checkpatch recommendation so it doesn't complain on that now > > and again on header file modifications. > > > > v2: Drop testing leftover > > > > Signed-off-by: Janusz Krzysztofik > > I'm not sure the entire cc wants to see extern header churn. > Reviewed-by: Chris Wilson Please ignore this submission, the patch has been bundled with v3 of "drm/ i915: Rename functions to match their entry points" series. Thanks, Janusz > -Chris > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v9 1/6] drm: Add Content protection type property
On Thu, 11 Jul 2019 10:18:22 -0400
Sean Paul wrote:
> On Mon, Jul 08, 2019 at 04:51:11PM +0530, Ramalingam C wrote:
> > This patch adds a DRM ENUM property to the selected connectors.
> > This property is used for mentioning the protected content's type
> > from userspace to kernel HDCP authentication.
> >
> > Type of the stream is decided by the protected content providers.
> > Type 0 content can be rendered on any HDCP protected display wires.
> > But Type 1 content can be rendered only on HDCP2.2 protected paths.
> >
> > So when a userspace sets this property to Type 1 and starts the HDCP
> > enable, kernel will honour it only if HDCP2.2 authentication is through
> > for type 1. Else HDCP enable will be failed.
> >
> > Need ACK for this new conenctor property from userspace consumer.
...
> > diff --git a/drivers/gpu/drm/drm_connector.c
> > b/drivers/gpu/drm/drm_connector.c
> > index 068d4b05f1be..732f6645643d 100644
> > --- a/drivers/gpu/drm/drm_connector.c
> > +++ b/drivers/gpu/drm/drm_connector.c
> > @@ -952,6 +952,45 @@ static const struct drm_prop_enum_list
> > hdmi_colorspaces[] = {
> > * is no longer protected and userspace should take appropriate action
> > * (whatever that might be).
> > *
> > + * HDCP Content Type:
> > + * This Enum property is used by the userspace to declare the content type
> > + * of the display stream, to kernel. Here display stream stands for any
> > + * display content that userspace intended to render with HDCP encryption.
> > + *
> > + * Content Type of a stream is decided by the owner of the stream, as
> > + * "HDCP Type0" or "HDCP Type1".
> > + *
> > + * The value of the property can be one the below:
> > + * - "HDCP Type0": DRM_MODE_HDCP_CONTENT_TYPE0 = 0
> > + * - "HDCP Type1": DRM_MODE_HDCP_CONTENT_TYPE1 = 1
> > + *
> > + * When kernel starts the HDCP authentication upon the "DESIRED" state of
> > + * the "Content Protection", it refers the "HDCP Content Type" property
> > + * state. And perform the HDCP authentication with the display sink for
> > + * the content type mentioned by "HDCP Content Type".
> > + *
> > + * Stream classified as HDCP Type0 can be transmitted on a link which is
> > + * encrypted with HDCP 1.4 or higher versions of HDCP(i.e HDCP2.2
> > + * and more).
> > + *
> > + * Streams classified as HDCP Type1 can be transmitted on a link which is
> > + * encrypted only with HDCP 2.2. In future, HDCP versions >2.2 also might
> > + * support Type1 based on their spec.
> > + *
> > + * HDCP2.2 authentication protocol itself takes the "Content Type" as a
> > + * parameter, which is a input for the DP HDCP2.2 encryption algo.
> > + *
> > + * Note that the HDCP Content Type property is introduced at HDCP 2.2, and
> > + * defaults to type 0. It is only exposed by drivers supporting HDCP 2.2.
> > + * Based on how next versions of HDCP specs are defined content Type could
> > + * be used for higher versions too.
> > + *
> > + * If content type is changed when "Content Protection" is not UNDESIRED,
> > + * then kernel will disable the HDCP and re-enable with new type in the
> > + * same atomic commit. And when "Content Protection" is ENABLED, it means
> > + * that link is HDCP authenticated and encrypted, for the transmission of
> > + * the Type of stream mentioned at "HDCP Content Type".
> > + *
> > * HDR_OUTPUT_METADATA:
> > * Connector property to enable userspace to send HDR Metadata to
> > * driver. This metadata is based on the composition and blending
>
> Do we actually need an entirely new property? Can't we just add a new
> entry to the existing Content Protection property which is "Desired Type1" or
> similar? The kernel will then either attempt 2.2 auth or it will ignore it the
> request if it's not supported.
Hi,
IMHO the existing "Content Protection" property is already complicated
enough that one should not add anything new to it.
If you added "desired-type-1", the readback of it would become
ambiguous if it was "ENABLED", userspace would not know if the value
written was "DESIRED" or "desired-type-1". Sure, it's not a problem
when a display server knows what it just wrote into it, but shouldn't
we try to keep KMS state readable as well, if for nothing but debugging?
I think using the same property for communicating in both directions
between the kernel and userspace (value can be set by both userspace and
kernel at times) was a mistake to begin with. It has already caused
long discussions on what the readback actually should reflect and
whether there are races for a given userspace implementation.
Thanks,
pq
pgp6Q8ez695z3.pgp
Description: OpenPGP digital signature
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Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 2/6] kms_writeback: Add initial writeback tests
On Thu, 2019-07-11 at 23:44 -0300, Rodrigo Siqueira wrote:
> On 07/10, Ser, Simon wrote:
> > Hi,
> >
> > Thanks for the patch! Here are a few comments.
> >
> > For bonus points, it would be nice to add igt_describe descriptions of
> > each sub-test.
>
> Hi Simon,
>
> First of all, thanks for your feedback; I already applied most of your
> suggestions. I just have some inline comments/questions.
>
> > On Wed, 2019-06-12 at 23:16 -0300, Brian Starkey wrote:
> > > Add tests for the WRITEBACK_PIXEL_FORMATS, WRITEBACK_OUT_FENCE_PTR and
> > > WRITEBACK_FB_ID properties on writeback connectors, ensuring their
> > > behaviour is correct.
> > >
> > > Signed-off-by: Brian Starkey
> > > [rebased and updated do_writeback_test() function to address feedback]
> > > Signed-off-by: Liviu Dudau
> > > ---
> > > tests/Makefile.sources | 1 +
> > > tests/kms_writeback.c | 314 +
> > > tests/meson.build | 1 +
> > > 3 files changed, 316 insertions(+)
> > > create mode 100644 tests/kms_writeback.c
> > >
> > > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > > index 027ed82f..03cc8efa 100644
> > > --- a/tests/Makefile.sources
> > > +++ b/tests/Makefile.sources
> > > @@ -77,6 +77,7 @@ TESTS_progs = \
> > > kms_universal_plane \
> > > kms_vblank \
> > > kms_vrr \
> > > + kms_writeback \
> > > meta_test \
> > > perf \
> > > perf_pmu \
> > > diff --git a/tests/kms_writeback.c b/tests/kms_writeback.c
> > > new file mode 100644
> > > index ..66ef48a6
> > > --- /dev/null
> > > +++ b/tests/kms_writeback.c
> > > @@ -0,0 +1,314 @@
> > > +/*
> > > + * (C) COPYRIGHT 2017 ARM Limited. All rights reserved.
> > > + *
> > > + * Permission is hereby granted, free of charge, to any person obtaining
> > > a
> > > + * copy of this software and associated documentation files (the
> > > "Software"),
> > > + * to deal in the Software without restriction, including without
> > > limitation
> > > + * the rights to use, copy, modify, merge, publish, distribute,
> > > sublicense,
> > > + * and/or sell copies of the Software, and to permit persons to whom the
> > > + * Software is furnished to do so, subject to the following conditions:
> > > + *
> > > + * The above copyright notice and this permission notice (including the
> > > next
> > > + * paragraph) shall be included in all copies or substantial portions of
> > > the
> > > + * Software.
> > > + *
> > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > > EXPRESS OR
> > > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> > > MERCHANTABILITY,
> > > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
> > > SHALL
> > > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > > OTHER
> > > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > > ARISING
> > > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> > > DEALINGS
> > > + * IN THE SOFTWARE.
> > > + *
> > > + */
> > > +
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +#include "igt.h"
> > > +#include "igt_core.h"
> > > +#include "igt_fb.h"
> > > +
> > > +static drmModePropertyBlobRes *get_writeback_formats_blob(igt_output_t
> > > *output)
> > > +{
> > > + drmModePropertyBlobRes *blob = NULL;
> > > + uint64_t blob_id;
> > > + int ret;
> > > +
> > > + ret = kmstest_get_property(output->display->drm_fd,
> > > +output->config.connector->connector_id,
> > > +DRM_MODE_OBJECT_CONNECTOR,
> > > +
> > > igt_connector_prop_names[IGT_CONNECTOR_WRITEBACK_PIXEL_FORMATS],
> > > +NULL, &blob_id, NULL);
> > > + if (ret)
> > > + blob = drmModeGetPropertyBlob(output->display->drm_fd, blob_id);
> > > +
> > > + igt_assert(blob);
> > > +
> > > + return blob;
> > > +}
> > > +
> > > +static bool check_writeback_config(igt_display_t *display, igt_output_t
> > > *output)
> > > +{
> > > + igt_fb_t input_fb, output_fb;
> > > + igt_plane_t *plane;
> > > + uint32_t writeback_format = DRM_FORMAT_XRGB;
> > > + uint64_t tiling = igt_fb_mod_to_tiling(0);
> > > + int width, height, ret;
> > > + drmModeModeInfo override_mode = {
> > > + .clock = 25175,
> > > + .hdisplay = 640,
> > > + .hsync_start = 656,
> > > + .hsync_end = 752,
> > > + .htotal = 800,
> > > + .hskew = 0,
> > > + .vdisplay = 480,
> > > + .vsync_start = 490,
> > > + .vsync_end = 492,
> > > + .vtotal = 525,
> > > + .vscan = 0,
> > > + .vrefresh = 60,
> > > + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> > > + .name = {"640x480-60"},
> > > + };
> > > + igt_output_override_mode(output, &override_mode);
> > > +
> > > + width = override_mode.hdisplay;
> > > + height = override_mode.vdisplay;
> > > +
> > > + ret = igt_create_fb(d
Re: [Intel-gfx] [PATCH v9 1/6] drm: Add Content protection type property
On 2019-07-12 at 14:11:05 +0300, Pekka Paalanen wrote:
> On Thu, 11 Jul 2019 11:20:49 +0530
> Ramalingam C wrote:
>
> > On 2019-07-10 at 11:16:24 +0300, Pekka Paalanen wrote:
> > > On Tue, 9 Jul 2019 18:17:59 +0530
> > > Ramalingam C wrote:
> > >
> > > > On 2019-07-09 at 17:31:10 +0300, Pekka Paalanen wrote:
> > > > > On Mon, 8 Jul 2019 16:51:11 +0530
> > > > > Ramalingam C wrote:
> > > > >
> > > > > > This patch adds a DRM ENUM property to the selected connectors.
> > > > > > This property is used for mentioning the protected content's type
> > > > > > from userspace to kernel HDCP authentication.
> > > > > >
> > > > > > Type of the stream is decided by the protected content providers.
> > > > > > Type 0 content can be rendered on any HDCP protected display wires.
> > > > > > But Type 1 content can be rendered only on HDCP2.2 protected paths.
> > > > > >
> > > > > > So when a userspace sets this property to Type 1 and starts the HDCP
> > > > > > enable, kernel will honour it only if HDCP2.2 authentication is
> > > > > > through
> > > > > > for type 1. Else HDCP enable will be failed.
> > > > > >
> > > > > > Need ACK for this new conenctor property from userspace consumer.
> > > > > >
> > > > > > v2:
> > > > > > cp_content_type is replaced with content_protection_type [daniel]
> > > > > > check at atomic_set_property is removed [Maarten]
> > > > > > v3:
> > > > > > %s/content_protection_type/hdcp_content_type [Pekka]
> > > > > > v4:
> > > > > > property is created for the first requested connector and then
> > > > > > reused.
> > > > > > [Danvet]
> > > > > > v5:
> > > > > > kernel doc nits addressed [Daniel]
> > > > > > Rebased as part of patch reordering.
> > > > > > v6:
> > > > > > Kernel docs are modified [pekka]
> > > > > > v7:
> > > > > > More details in Kernel docs. [pekka]
> > > > > >
> > > > > > Signed-off-by: Ramalingam C
> > > > > > Reviewed-by: Daniel Vetter
> > > > > > ---
> > > > > > drivers/gpu/drm/drm_atomic_uapi.c | 4 +++
> > > > > > drivers/gpu/drm/drm_connector.c | 39
> > > > > > +++
> > > > > > drivers/gpu/drm/drm_hdcp.c| 36
> > > > > > -
> > > > > > drivers/gpu/drm/i915/display/intel_hdcp.c | 4 ++-
> > > > > > include/drm/drm_connector.h | 7
> > > > > > include/drm/drm_hdcp.h| 2 +-
> > > > > > include/drm/drm_mode_config.h | 6
> > > > > > include/uapi/drm/drm_mode.h | 4 +++
> > > > > > 8 files changed, 99 insertions(+), 3 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > > b/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > > index abe38bdf85ae..19ae119f1a5d 100644
> > > > > > --- a/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > > +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> > > > > > @@ -747,6 +747,8 @@ static int
> > > > > > drm_atomic_connector_set_property(struct drm_connector *connector,
> > > > > > return -EINVAL;
> > > > > > }
> > > > > > state->content_protection = val;
> > > > > > + } else if (property == config->hdcp_content_type_property) {
> > > > > > + state->hdcp_content_type = val;
> > > > > > } else if (property == connector->colorspace_property) {
> > > > > > state->colorspace = val;
> > > > > > } else if (property == config->writeback_fb_id_property) {
> > > > > > @@ -831,6 +833,8 @@ drm_atomic_connector_get_property(struct
> > > > > > drm_connector *connector,
> > > > > > state->hdr_output_metadata->base.id : 0;
> > > > > > } else if (property == config->content_protection_property) {
> > > > > > *val = state->content_protection;
> > > > > > + } else if (property == config->hdcp_content_type_property) {
> > > > > > + *val = state->hdcp_content_type;
> > > > > > } else if (property == config->writeback_fb_id_property) {
> > > > > > /* Writeback framebuffer is one-shot, write and forget
> > > > > > */
> > > > > > *val = 0;
> > > > > > diff --git a/drivers/gpu/drm/drm_connector.c
> > > > > > b/drivers/gpu/drm/drm_connector.c
> > > > > > index 068d4b05f1be..732f6645643d 100644
> > > > > > --- a/drivers/gpu/drm/drm_connector.c
> > > > > > +++ b/drivers/gpu/drm/drm_connector.c
> > > > > > @@ -952,6 +952,45 @@ static const struct drm_prop_enum_list
> > > > > > hdmi_colorspaces[] = {
> > > > > > * is no longer protected and userspace should take appropriate
> > > > > > action
> > > > > > * (whatever that might be).
> > > > > > *
> > > > > > + * HDCP Content Type:
> > > > > > + * This Enum property is used by the userspace to declare the
> > > > > > content type
> > > > > > + * of the display stream, to kernel. Here display stream stands
> > > > > > for any
> > > > > > + * display content that userspace intended to render with HDCP
> > > > > > encryption.
> > > > >
> >
[Intel-gfx] [PATCH] drm/vgem: Reclassify buffer creation debug message
A buffer is created in response to the user ioctl, it should therefore
be a plain DRM_DEBUG() message to reflect it being a user invoked
response and not a driver construct.
This is just to make the commonplace drm.debug=[26e] quieter when
running with vgem.
Signed-off-by: Chris Wilson
Cc: Daniel Vetter
---
drivers/gpu/drm/vgem/vgem_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem/vgem_drv.c
index 386efc3b5843..76d95b5e289c 100644
--- a/drivers/gpu/drm/vgem/vgem_drv.c
+++ b/drivers/gpu/drm/vgem/vgem_drv.c
@@ -214,7 +214,7 @@ static int vgem_gem_dumb_create(struct drm_file *file,
struct drm_device *dev,
args->size = gem_object->size;
args->pitch = pitch;
- DRM_DEBUG_DRIVER("Created object of size %lld\n", size);
+ DRM_DEBUG("Created object of size %lld\n", size);
return 0;
}
--
2.22.0
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rename functions to match their entry points (rev2)
== Series Details ==
Series: drm/i915: Rename functions to match their entry points (rev2)
URL : https://patchwork.freedesktop.org/series/63541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6471 -> Patchwork_13641
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/
Known issues
Here are the changes found in Patchwork_13641 that come from known issues:
### IGT changes ###
Issues hit
* igt@core_auth@basic-auth:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +2
similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u3/igt@core_a...@basic-auth.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-icl-u3/igt@core_a...@basic-auth.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][3] -> [FAIL][4] ([fdo#108511])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u2: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] /
[fdo#108569])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][7] -> [FAIL][8] ([fdo#103167])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_ctx_exec@basic:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-u3/igt@gem_ctx_e...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-icl-u3/igt@gem_ctx_e...@basic.html
* {igt@gem_ctx_switch@rcs0}:
- fi-icl-guc: [INCOMPLETE][11] ([fdo#107713]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-icl-guc/igt@gem_ctx_swi...@rcs0.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-icl-guc/igt@gem_ctx_swi...@rcs0.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][13] ([fdo#102614]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6471/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
Participating hosts (55 -> 47)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6471 -> Patchwork_13641
CI_DRM_6471: 7b027aac4fc3877fa21bb35cc7eb1c932012032a @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13641: d1f88dc60080ca44f6bb6c9bdec2e3bc03cd14bf @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d1f88dc60080 drm/i915: Propagate "_probe" function name suffix down
b024a8b628d9 drm/i915: Propagate "_remove" function name suffix down
edbd9893ef18 drm/i915: Propagate "_release" function name suffix down
3499abc8ce0f drm/i915: Replace "_load" with "_probe" consequently
d4cd18ecdcc6 drm/i915: Rename "_load"/"_unload" to match PCI entry points
9fdf32b419a6 drm/i915: Drop extern qualifiers from header function prototypes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13641/
___
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Re: [Intel-gfx] [PATCH] drm/i915: Revert "drm/i915: Enable PSR2 by default"
On Thu, Jul 11, 2019 at 12:08:12PM +0100, Chris Wilson wrote: > Quoting Rodrigo Vivi (2019-07-11 12:02:01) > > On Thu, Jul 11, 2019 at 10:22:54AM +0100, Chris Wilson wrote: > > > Multiple users are reporting black screens upon boot, after resume, or > > > frozen after a short period of idleness. A black screen on boot is a > > > critical issue so disable psr2 again until resolved. > > > > > > This reverts commit 8f6e87d6d561f10cfa48a687345512419839b6d8. > > > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088 > > > > I agree it is critical, but unfortunately this revert won't solve the issue. > > > > [1.954886] [drm:intel_psr_init_dpcd [i915]] eDP panel supports PSR > > version 1 > > [2.003686] [drm:intel_psr_enable_locked [i915]] Enabling PSR1 > > > > Users are claiming the regression is only on 5.2 with 5.1 working well > > and PSR1 is enabled by default since 5.0. > > Hmm, which panels are psr2 and is it being accurately reported? yes, this part of detection is pretty reliable. I'd expect PSR2 only on brand new panels > > If you suspect psr1, just revert both for now. I'm hesitating on the revert because psr worked find for 5.0 and 5.1 and even on the current issue the reproducibility is really low plus the fact that Jose is on top of that working right now. but yeap, if more issues start to pop up and time passing by we will have no choice again. > -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 3/6] lib: Add function to hash a framebuffer
On Thu, 2019-07-11 at 23:49 -0300, Rodrigo Siqueira wrote:
> On 07/10, Ser, Simon wrote:
> > On Wed, 2019-07-10 at 15:30 +, Ser, Simon wrote:
> > > Mostly LGTM, here are a few nits.
> > >
> > > On Wed, 2019-06-12 at 23:17 -0300, Brian Starkey wrote:
> > > > To use writeback buffers as a CRC source, we need to be able to hash
> > > > them. Implement a simple FVA-1a hashing routine for this purpose.
> > > >
> > > > Doing a bytewise hash on the framebuffer directly can be very slow if
> > > > the memory is noncached. By making a copy of each line in the FB first
> > > > (which can take advantage of word-access speedup), we can do the hash
> > > > on a cached copy, which is much faster (10x speedup on my platform).
> > > >
> > > > v6: use igt_memcpy_from_wc() instead of plain memcpy, as suggested by
> > > > Chris Wilson
> > > >
> > > > Signed-off-by: Brian Starkey
> > > > [rebased and updated to the most recent API]
> > > > Signed-off-by: Liviu Dudau
> > > > ---
> > > > lib/igt_fb.c | 66
> > > > lib/igt_fb.h | 3 +++
> > > > 2 files changed, 69 insertions(+)
> > > >
> > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > > > index 9d4f905e..d07dae39 100644
> > > > --- a/lib/igt_fb.c
> > > > +++ b/lib/igt_fb.c
> > > > @@ -3256,6 +3256,72 @@ bool igt_fb_supported_format(uint32_t drm_format)
> > > > return false;
> > > > }
> > > >
> > > > +/*
> > > > + * This implements the FNV-1a hashing algorithm instead of CRC, for
> > > > + * simplicity
> > > > + * http://www.isthe.com/chongo/tech/comp/fnv/index.html
> > > > + *
> > > > + * hash = offset_basis
> > > > + * for each octet_of_data to be hashed
> > > > + * hash = hash xor octet_of_data
> > > > + * hash = hash * FNV_prime
> > > > + * return hash
> > > > + *
> > > > + * 32 bit offset_basis = 2166136261
> > > > + * 32 bit FNV_prime = 224 + 28 + 0x93 = 16777619
> > > > + */
> > > > +int igt_fb_get_crc(struct igt_fb *fb, igt_crc_t *crc)
> > > > +{
> > > > +#define FNV1a_OFFSET_BIAS 2166136261
> > > > +#define FNV1a_PRIME 16777619
> > >
> > > I'd just use plain uint32_t variables for those, but no big deal.
> > >
> > > > + uint32_t hash;
> > > > + void *map;
> > > > + char *ptr, *line = NULL;
> > > > + int x, y, cpp = igt_drm_format_to_bpp(fb->drm_format) / 8;
> > > > + uint32_t stride = calc_plane_stride(fb, 0);
> > >
> > > We could return -EINVAL in case fb->num_planes != 1.
> >
> > Let's not waste cycles. With this ^ fixed, this patch is:
> >
> > Reviewed-by: Simon Ser
> >
> > Other nits are optional.
>
> I agreed with all your suggestions, and I already applied all of them.
> Should I wait for the other patches review, or should I resend the new
> version?
I'm fine with waiting for the full review before a new version of the
whole patchset, but you can also send an updated version of a single
patch with:
git send-email
--in-reply-to="" -1
where In-Reply-To is the Message-Id of the patch you want to update. I
agree it's a little tedious since you need to extract the Message-Id
from the message header.
> Thanks for all the feedback
:)
> Best Regards
>
> > > > + if (fb->is_dumb)
> > > > + map = kmstest_dumb_map_buffer(fb->fd, fb->gem_handle,
> > > > fb->size,
> > > > + PROT_READ);
> > > > + else
> > > > + map = gem_mmap__gtt(fb->fd, fb->gem_handle, fb->size,
> > > > + PROT_READ);
> > > > + ptr = map;
> > >
> > > Nit: no need for this, can assign the result of mmap directly to ptr.
> > >
> > > > +
> > > > + /*
> > > > +* Framebuffers are often uncached, which can make byte-wise
> > > > accesses
> > > > +* very slow. We copy each line of the FB into a local buffer
> > > > to speed
> > > > +* up the hashing.
> > > > +*/
> > > > + line = malloc(stride);
> > > > + if (!line) {
> > > > + munmap(map, fb->size);
> > > > + return -ENOMEM;
> > > > + }
> > > > +
> > > > + hash = FNV1a_OFFSET_BIAS;
> > > > +
> > > > + for (y = 0; y < fb->height; y++, ptr += stride) {
> > > > +
> > > > + igt_memcpy_from_wc(line, ptr, stride);
> > >
> > > Nit: no need to copy the whole stride actually, we can just copy
> > > fb->width * cpp since we're only going to read that.
> > >
> > > > +
> > > > + for (x = 0; x < fb->width * cpp; x++) {
> > > > + hash ^= line[x];
> > > > + hash *= FNV1a_PRIME;
> > > > + }
> > > > + }
> > > > +
> > > > + crc->n_words = 1;
> > > > + crc->crc[0] = hash;
> > > > +
> > > > + free(line);
> > > > + munmap(map, fb->size);
> > > > +
> > > > + return 0;
> > > > +#undef FNV1a_OFFSET_BIAS
> > > > +#undef FNV1a_PRIME
> > > > +}
> > > > +
> > > > /**
> > > > * igt_format_is_yuv:
> > >
Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 4/6] kms_writeback: Add writeback-check-output
Mostly looks good, here are a few comments.
On Wed, 2019-06-12 at 23:17 -0300, Brian Starkey wrote:
> Add a test which makes commits using the writeback connector, and
> checks the output buffer hash to make sure it is/isn't written as
> appropriate.
>
> Signed-off-by: Brian Starkey
> ---
> tests/kms_writeback.c | 124 ++
> 1 file changed, 124 insertions(+)
>
> diff --git a/tests/kms_writeback.c b/tests/kms_writeback.c
> index 66ef48a6..0f20dadd 100644
> --- a/tests/kms_writeback.c
> +++ b/tests/kms_writeback.c
> @@ -30,6 +30,7 @@
> #include "igt.h"
> #include "igt_core.h"
> #include "igt_fb.h"
> +#include "sw_sync.h"
>
> static drmModePropertyBlobRes *get_writeback_formats_blob(igt_output_t
> *output)
> {
> @@ -221,6 +222,116 @@ static void writeback_fb_id(igt_output_t *output,
> igt_fb_t *valid_fb, igt_fb_t *
> igt_assert(ret == 0);
> }
>
> +static void fill_fb(igt_fb_t *fb, double color[3])
> +{
> + cairo_t *cr = igt_get_cairo_ctx(fb->fd, fb);
> + igt_assert(cr);
> +
> + igt_paint_color(cr, 0, 0, fb->width, fb->height,
> + color[0], color[1], color[2]);
> +}
> +
> +static void get_and_wait_out_fence(igt_output_t *output)
> +{
> + int ret;
> +
> + igt_assert(output->writeback_out_fence_fd >= 0);
> +
> + ret = sync_fence_wait(output->writeback_out_fence_fd, 1000);
> + igt_assert(ret == 0);
When filtering failures in CI Bug Log, "ret == 0" is not very helpful
and may not be unique. Can we add a descriptive error message, with
something among the lines of:
igt_assert_f(ret == 0, "sync_fence_wait failed: %s\n", strerror(-ret));
> + close(output->writeback_out_fence_fd);
> + output->writeback_out_fence_fd = -1;
> +}
> +
> +static void writeback_sequence(igt_output_t *output, igt_plane_t *plane,
> + igt_fb_t *in_fb, igt_fb_t *out_fbs[], int
> n_commits)
> +{
> + int i, color_idx = 0;
> + double in_fb_colors[2][3] = {
> + { 1.0, 0.0, 0.0 },
> + { 0.0, 1.0, 0.0 },
> + };
> + double clear_color[3] = { 1.0, 1.0, 1.0 };
> + igt_crc_t cleared_crc, out_expected;
> +
> + for (i = 0; i < n_commits; i++, color_idx++) {
> + /* Change the input color each time */
> + fill_fb(in_fb, in_fb_colors[color_idx % 2]);
Why do we need two indexes (i and color_idx)? I think [i % 2] should
work just fine.
> + if (out_fbs[i]) {
> + igt_crc_t out_before;
> +
> + /* Get the expected CRC */
> + fill_fb(out_fbs[i], in_fb_colors[color_idx % 2]);
> + igt_fb_get_crc(out_fbs[i], &out_expected);
Using out_fbs[i] to compute the expected CRC is a little bit confusing.
I think we can just use in_fb here (which is already filled with the
proper color).
> + fill_fb(out_fbs[i], clear_color);
> + if (i == 0)
> + igt_fb_get_crc(out_fbs[i], &cleared_crc);
> + igt_fb_get_crc(out_fbs[i], &out_before);
> + igt_assert_crc_equal(&cleared_crc, &out_before);
> + }
> +
> + /* Commit */
> + igt_plane_set_fb(plane, in_fb);
> + igt_output_set_writeback_fb(output, out_fbs[i]);
> +
> + igt_display_commit_atomic(output->display,
> + DRM_MODE_ATOMIC_ALLOW_MODESET,
> + NULL);
> + if (out_fbs[i])
> + get_and_wait_out_fence(output);
> +
> + /* Make sure the old output buffer is untouched */
> + if (i > 0 && out_fbs[i - 1] && (out_fbs[i] != out_fbs[i - 1])) {
Nit: unnecessary parentheses here
> + igt_crc_t out_prev;
> + igt_fb_get_crc(out_fbs[i - 1], &out_prev);
> + igt_assert_crc_equal(&cleared_crc, &out_prev);
> + }
> +
> + /* Make sure this output buffer is written */
> + if (out_fbs[i]) {
> + igt_crc_t out_after;
> + igt_fb_get_crc(out_fbs[i], &out_after);
> + igt_assert_crc_equal(&out_expected, &out_after);
> +
> + /* And clear it, for the next time */
> + fill_fb(out_fbs[i], clear_color);
> + }
> + }
> +}
> +
> +static void writeback_check_output(igt_output_t *output, igt_plane_t *plane,
> +igt_fb_t *input_fb, igt_fb_t *output_fb)
> +{
> + igt_fb_t *out_fbs[2] = { 0 };
> + igt_fb_t second_out_fb;
> + int ret;
> +
> + /* One commit, with a writeback. */
> + writeback_sequence(output, plane, input_fb, &output_fb, 1);
> +
> + /* Two commits, the second with no writeback */
> + out_fbs[0] = output_fb;
> + writeback_sequence(output, plane, input_fb, out_fbs, 2);
> +
> + /* Two comm
[Intel-gfx] ✓ Fi.CI.BAT: success for Enable HuC by default for Gen11+
== Series Details == Series: Enable HuC by default for Gen11+ URL : https://patchwork.freedesktop.org/series/63635/ State : success == Summary == CI Bug Log - changes from CI_DRM_6472 -> Patchwork_13642 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13642/ Known issues Here are the changes found in Patchwork_13642 that come from known issues: ### IGT changes ### Issues hit * igt@kms_busy@basic-flip-c: - fi-skl-6770hq: [PASS][1] -> [SKIP][2] ([fdo#109271] / [fdo#109278]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-skl-6770hq/igt@kms_b...@basic-flip-c.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13642/fi-skl-6770hq/igt@kms_b...@basic-flip-c.html * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6770hq: [PASS][3] -> [SKIP][4] ([fdo#109271]) +23 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-skl-6770hq/igt@kms_f...@basic-flip-vs-dpms.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13642/fi-skl-6770hq/igt@kms_f...@basic-flip-vs-dpms.html Possible fixes * igt@i915_selftest@live_blt: - fi-icl-dsi: [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-icl-dsi/igt@i915_selftest@live_blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13642/fi-icl-dsi/igt@i915_selftest@live_blt.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: [FAIL][7] ([fdo#103167]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13642/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 Participating hosts (54 -> 47) -- Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6472 -> Patchwork_13642 CI_DRM_6472: 649e17f8cfe7361cbc104427d155f685cf7151d5 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13642: 2011d7770a68783a6f438dcfd1ef4db6ecf21df3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2011d7770a68 drm/i915/guc: Turn on GuC/HuC auto mode 51e212f28dd1 drm/i915/guc: Don't enable GuC/HuC in auto mode on pre-Gen11 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13642/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 1/2] drm/i915/display/icl: Bump up the vdisplay to reflect higher transcoder vertical limits
On Thu, Jul 11, 2019 at 04:15:41PM -0700, Manasi Navare wrote:
> On Thu, Jul 11, 2019 at 01:38:41PM +0300, Ville Syrjälä wrote:
> > On Wed, Jul 10, 2019 at 02:39:50PM -0700, Manasi Navare wrote:
> > > On ICL+, the vertical limits for the transcoders are increased to 8192 so
> > > bump up
> > > limits in intel_mode_valid()
> > >
> > > v3:
> > > * Supported starting ICL (Ville)
> > > * Use the higher limits from TRANS_VTOTAL register (Ville)
> > > v2:
> > > * Checkpatch warning (Manasi)
> > >
> > > Cc: Maarten Lankhorst
> > > Cc: Ville Syrjälä
> > > Signed-off-by: Manasi Navare
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 9 +++--
> > > 1 file changed, 7 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index f07081815b80..9883f607bb88 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
> > > DRM_MODE_FLAG_CLKDIV2))
> > > return MODE_BAD;
> > >
> > > - if (INTEL_GEN(dev_priv) >= 9 ||
> > > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> > > + if (INTEL_GEN(dev_priv) >= 11) {
> > > + hdisplay_max = 8192;
> > > + vdisplay_max = 8192;
> >
> > The horiz limits should be 16k.
>
> So the TRANS_HTOTAL has had 14 bits so allowed 16K even for Gen9+, should
> this be changed for all?
I think you're looking at the wrong docs if you see 14 bits.
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH] drm/vgem: Reclassify buffer creation debug message
On Fri, Jul 12, 2019 at 2:01 PM Chris Wilson wrote:
>
> A buffer is created in response to the user ioctl, it should therefore
> be a plain DRM_DEBUG() message to reflect it being a user invoked
> response and not a driver construct.
>
> This is just to make the commonplace drm.debug=[26e] quieter when
> running with vgem.
>
> Signed-off-by: Chris Wilson
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/vgem/vgem_drv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem/vgem_drv.c
> index 386efc3b5843..76d95b5e289c 100644
> --- a/drivers/gpu/drm/vgem/vgem_drv.c
> +++ b/drivers/gpu/drm/vgem/vgem_drv.c
> @@ -214,7 +214,7 @@ static int vgem_gem_dumb_create(struct drm_file *file,
> struct drm_device *dev,
> args->size = gem_object->size;
> args->pitch = pitch;
>
> - DRM_DEBUG_DRIVER("Created object of size %lld\n", size);
> + DRM_DEBUG("Created object of size %lld\n", size);
Hm, I honestly dunno what DRM_DEBUG is for, except generating noise.
Maybe also ditch this outright. Either approach gets my
Reviewed-by: Daniel Vetter
>
> return 0;
> }
> --
> 2.22.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 5/6] lib/igt_kms: Add igt_output_clone_pipe for cloning
So, to test these last two patches we'd need specific hardware right?
Because VKMS doesn't support cloning yet (does it?).
What kind of hardware supports cloned writeback outputs? I have a
Raspberry Pi which supports writeback via VC4, but I don't think it has
writeback cloning. I'm also not willing to install any proprietary
driver.
I guess we could land the first part of the series, and wait for VKMS
to support cloned outputs to land the last two patches.
Any other ideas?
On Wed, 2019-06-12 at 23:18 -0300, Brian Starkey wrote:
> An output can be added as a clone of any other output(s) attached to a
> pipe using igt_output_clone_pipe()
>
> v5: Drop field out_fence_requested from struct igt_pipe (Brian Starkey)
>
> Signed-off-by: Brian Starkey
> ---
> lib/igt_kms.c | 100 +++---
> lib/igt_kms.h | 4 ++
> 2 files changed, 66 insertions(+), 38 deletions(-)
>
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 140db346..b85a0404 100644
> --- a/lib/igt_kms.c
> +++ b/lib/igt_kms.c
> @@ -1765,6 +1765,17 @@ static void igt_display_log_shift(igt_display_t
> *display, int shift)
> igt_assert(display->log_shift >= 0);
> }
>
> +static int igt_output_idx(igt_output_t *output)
> +{
> + int i;
> +
> + for (i = 0; i < output->display->n_outputs; i++)
> + if (&output->display->outputs[i] == output)
> + return i;
> +
> + return -1;
> +}
> +
> static void igt_output_refresh(igt_output_t *output)
> {
> igt_display_t *display = output->display;
> @@ -2317,42 +2328,6 @@ void igt_display_fini(igt_display_t *display)
> display->planes = NULL;
> }
>
> -static void igt_display_refresh(igt_display_t *display)
> -{
> - igt_output_t *output;
> - int i;
> -
> - unsigned long pipes_in_use = 0;
> -
> - /* Check that two outputs aren't trying to use the same pipe */
> - for (i = 0; i < display->n_outputs; i++) {
> - output = &display->outputs[i];
> -
> - if (output->pending_pipe != PIPE_NONE) {
> - if (pipes_in_use & (1 << output->pending_pipe))
> - goto report_dup;
> -
> - pipes_in_use |= 1 << output->pending_pipe;
> - }
> -
> - if (output->force_reprobe)
> - igt_output_refresh(output);
> - }
> -
> - return;
> -
> -report_dup:
> - for (; i > 0; i--) {
> - igt_output_t *b = &display->outputs[i - 1];
> -
> - igt_assert_f(output->pending_pipe !=
> - b->pending_pipe,
> - "%s and %s are both trying to use pipe %s\n",
> - igt_output_name(output), igt_output_name(b),
> - kmstest_pipe_name(output->pending_pipe));
> - }
> -}
> -
> static igt_pipe_t *igt_output_get_driving_pipe(igt_output_t *output)
> {
> igt_display_t *display = output->display;
> @@ -2376,6 +2351,40 @@ static igt_pipe_t
> *igt_output_get_driving_pipe(igt_output_t *output)
> return &display->pipes[pipe];
> }
>
> +static void igt_display_refresh(igt_display_t *display)
> +{
> + igt_output_t *output;
> + igt_pipe_t *pipe;
> + int i;
> +
> + unsigned long pipes_in_use = 0;
> + unsigned long pending_crtc_idx_mask;
> +
> + /* Check that outputs and pipes agree wrt. cloning */
> + for (i = 0; i < display->n_outputs; i++) {
> + output = &display->outputs[i];
> + pending_crtc_idx_mask = 1 << output->pending_pipe;
> +
> + pipe = igt_output_get_driving_pipe(output);
> + if (pipe) {
> + igt_assert_f(pipe->outputs & (1 <<
> igt_output_idx(output)),
> + "Output %s not expected to be using pipe
> %s\n",
> + igt_output_name(output),
> + kmstest_pipe_name(pipe->pipe));
> +
> + if (pipes_in_use & pending_crtc_idx_mask)
> + LOG(display, "Output %s clones pipe %s\n",
> + igt_output_name(output),
> + kmstest_pipe_name(pipe->pipe));
> + }
> +
> + pipes_in_use |= pending_crtc_idx_mask;
> +
> + if (output->force_reprobe)
> + igt_output_refresh(output);
> + }
> +}
> +
> static igt_plane_t *igt_pipe_get_plane(igt_pipe_t *pipe, int plane_idx)
> {
> igt_require_f(plane_idx >= 0 && plane_idx < pipe->n_planes,
> @@ -3766,6 +3775,7 @@ void igt_output_override_mode(igt_output_t *output,
> const drmModeModeInfo *mode)
> output->use_override_mode = !!mode;
>
> if (pipe) {
> + igt_debug("overriding pipe mode in %s way\n",
> output->display->is_atomic ? "atomic" : "legacy");
> if (output->display->is_atomic)
> igt_pipe_obj_replace_prop_blob(pipe,
Re: [Intel-gfx] [PATCH v3 1/1] drm/i915: Add modular FIA
On Thu, Jul 11, 2019 at 04:49:07PM -0700, Lucas De Marchi wrote:
> On Thu, Jul 11, 2019 at 04:15:42PM -0700, Summers, Stuart wrote:
> >On Thu, 2019-07-11 at 13:58 -0700, Lucas De Marchi wrote:
> >> From: Anusha Srivatsa
> >>
> >> Some platforms may have Modular FIA. If Modular FIA is used in the
> >> SOC,
> >> then Display Driver will access the additional instances of
> >> FIA based on pre-assigned offset in GTTMADDR space.
> >>
> >> Each Modular FIA instance has its own IOSF Sideband Port ID
> >> and it houses only 2 Type-C Port. In SOC that has more than
> >> two Type-C Ports, there are multiple instances of Modular FIA.
> >> Gunit will need to use different destination ID when it access
> >> different pair of Type-C Port.
> >>
> >> The DFLEXDPSP register has Modular FIA bit starting on Tiger
> >> Lake. If
> >> Modular FIA is used in the SOC, this register bit exists in all the
> >> instances of Modular FIA. IOM FW is required to program only the MF
> >> bit
> >> in first FIA instance that houses the Type-C Port 0 and Port 1, for
> >> Display Driver to read from.
> >>
> >> v2 (Lucas):
> >> - Move all accesses to FIA to be contained in intel_tc.c, along
> >> with
> >> display_fia that is now called tc_phy_fia
> >> - Save the fia instance number on intel_digital_port, so we don't
> >> have
> >> to query if modular FIA is used on every access
> >> v3 (Lucas): Make function static
> >> v4 (Lucas): Move enum phy_fia to the header and use it in
> >>intel_digital_port (suggested by Ville)
> >>
> >> Cc: Jani Nikula
> >> Signed-off-by: Anusha Srivatsa
> >> Signed-off-by: Lucas De Marchi
> >> Acked-by: Ville Syrjälä
> >> ---
> >> drivers/gpu/drm/i915/display/intel_display.h | 6 +++
> >> drivers/gpu/drm/i915/display/intel_tc.c | 43
> >>
> >> drivers/gpu/drm/i915/i915_reg.h | 13 --
> >> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> >> drivers/gpu/drm/i915/intel_drv.h | 1 +
> >> 5 files changed, 52 insertions(+), 12 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> >> b/drivers/gpu/drm/i915/display/intel_display.h
> >> index 8a4a57ef82a2..8b048976f7b4 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> >> @@ -243,6 +243,12 @@ enum phy {
> >>
> >> #define phy_name(a) ((a) + 'A')
> >>
> >> +enum phy_fia {
> >> + FIA1,
> >> + FIA2,
> >> + FIA3,
> >> +};
> >> +
> >> #define for_each_pipe(__dev_priv, __p) \
> >>for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes;
> >> (__p)++)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> >> b/drivers/gpu/drm/i915/display/intel_tc.c
> >> index f44ee4bfe7c8..9400da4f7916 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> >> @@ -22,6 +22,24 @@ static const char *tc_port_mode_name(enum
> >> tc_port_mode mode)
> >>return names[mode];
> >> }
> >>
> >> +static bool has_modular_fia(struct drm_i915_private *i915)
> >> +{
> >> + if (!INTEL_INFO(i915)->display.has_modular_fia)
> >> + return false;
> >> +
> >> + return intel_uncore_read(&i915->uncore,
> >> + PORT_TX_DFLEXDPSP(FIA1)) &
> >> MODULAR_FIA_MASK;
> >> +}
> >> +
> >> +static enum phy_fia tc_port_to_fia(struct drm_i915_private *i915,
> >> + enum tc_port tc_port)
> >> +{
> >> + if (!has_modular_fia(i915))
> >> + return FIA1;
> >> +
> >> + return tc_port / 2;
> >
> >I realize this is described in the commit message, but would be nice to
> >have a brief comment describing why we need this conversion.
> >
> >> +}
> >> +
> >> u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> >> {
> >>struct drm_i915_private *i915 = to_i915(dig_port-
> >> >base.base.dev);
> >> @@ -29,7 +47,8 @@ u32 intel_tc_port_get_lane_mask(struct
> >> intel_digital_port *dig_port)
> >>struct intel_uncore *uncore = &i915->uncore;
> >>u32 lane_mask;
> >>
> >> - lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
> >> + lane_mask = intel_uncore_read(uncore,
> >> +PORT_TX_DFLEXDPSP(dig_port-
> >> >tc_phy_fia));
> >>
> >>WARN_ON(lane_mask == 0x);
> >>
> >> @@ -78,7 +97,8 @@ void intel_tc_port_set_fia_lane_count(struct
> >> intel_digital_port *dig_port,
> >>
> >>WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
> >>
> >> - val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
> >> + val = intel_uncore_read(uncore,
> >> + PORT_TX_DFLEXDPMLE1(dig_port-
> >> >tc_phy_fia));
> >>val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
> >>
> >>switch (required_lanes) {
> >> @@ -97,7 +117,8 @@ void intel_tc_port_set_fia_lane_count(struct
> >> intel_digital_port *dig_port,
> >>MISSING_CASE(required_lanes);
> >>}
> >>
> >> - intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
> >> +
Re: [Intel-gfx] [PATCH 1/4] drm/i915/gtt: Recursive cleanup for gen8
On 12/07/2019 14.27, Chris Wilson wrote:
> With an explicit level, we can refactor the separate cleanup functions
> as a simple recursive function. We take the opportunity to pass down the
> size of each level so that we can deal with the different sizes of
> top-level and avoid over allocating for 32/36-bit vm.
>
> Signed-off-by: Chris Wilson
> ---
Reviewed-by: Abdiel Janulgue
Regards,
Abdiel
> drivers/gpu/drm/i915/i915_gem_gtt.c | 93 ++---
> drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
> 2 files changed, 33 insertions(+), 62 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 753090a7729e..305c65c08a6a 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -713,11 +713,11 @@ static struct i915_page_table *alloc_pt(struct
> i915_address_space *vm)
> return pt;
> }
>
> -static struct i915_page_directory *__alloc_pd(void)
> +static struct i915_page_directory *__alloc_pd(size_t sz)
> {
> struct i915_page_directory *pd;
>
> - pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
> + pd = kzalloc(sz, I915_GFP_ALLOW_FAIL);
> if (unlikely(!pd))
> return NULL;
>
> @@ -729,7 +729,7 @@ static struct i915_page_directory *alloc_pd(struct
> i915_address_space *vm)
> {
> struct i915_page_directory *pd;
>
> - pd = __alloc_pd();
> + pd = __alloc_pd(sizeof(*pd));
> if (unlikely(!pd))
> return ERR_PTR(-ENOMEM);
>
> @@ -766,7 +766,7 @@ __set_pd_entry(struct i915_page_directory * const pd,
> struct i915_page_dma * const to,
> u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
> {
> - GEM_BUG_ON(atomic_read(px_used(pd)) > 512);
> + GEM_BUG_ON(atomic_read(px_used(pd)) > ARRAY_SIZE(pd->entry));
>
> atomic_inc(px_used(pd));
> pd->entry[idx] = to;
> @@ -896,64 +896,34 @@ static inline unsigned int gen8_pt_count(u64 start, u64
> end)
> return end - start;
> }
>
> -static void gen8_free_page_tables(struct i915_address_space *vm,
> - struct i915_page_directory *pd)
> +static void __gen8_ppgtt_cleanup(struct i915_address_space *vm,
> + struct i915_page_directory *pd,
> + int count, int lvl)
> {
> - int i;
> -
> - for (i = 0; i < I915_PDES; i++) {
> - if (pd->entry[i])
> - free_pd(vm, pd->entry[i]);
> - }
> -}
> -
> -static void gen8_ppgtt_cleanup_3lvl(struct i915_address_space *vm,
> - struct i915_page_directory *pdp)
> -{
> - const unsigned int pdpes = i915_pdpes_per_pdp(vm);
> - int i;
> -
> - for (i = 0; i < pdpes; i++) {
> - if (!pdp->entry[i])
> - continue;
> -
> - gen8_free_page_tables(vm, pdp->entry[i]);
> - free_pd(vm, pdp->entry[i]);
> - }
> -
> - free_px(vm, pdp);
> -}
> -
> -static void gen8_ppgtt_cleanup_4lvl(struct i915_ppgtt *ppgtt)
> -{
> - struct i915_page_directory * const pml4 = ppgtt->pd;
> - int i;
> -
> - for (i = 0; i < GEN8_PML4ES_PER_PML4; i++) {
> - struct i915_page_directory *pdp = i915_pdp_entry(pml4, i);
> + if (lvl) {
> + void **pde = pd->entry;
>
> - if (!pdp)
> - continue;
> + do {
> + if (!*pde)
> + continue;
>
> - gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, pdp);
> + __gen8_ppgtt_cleanup(vm, *pde, I915_PDES, lvl - 1);
> + } while (pde++, --count);
> }
>
> - free_px(&ppgtt->vm, pml4);
> + free_px(vm, pd);
> }
>
> static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
> {
> - struct drm_i915_private *i915 = vm->i915;
> struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
>
> - if (intel_vgpu_active(i915))
> + if (intel_vgpu_active(vm->i915))
> gen8_ppgtt_notify_vgt(ppgtt, false);
>
> - if (i915_vm_is_4lvl(vm))
> - gen8_ppgtt_cleanup_4lvl(ppgtt);
> - else
> - gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, ppgtt->pd);
> -
> + __gen8_ppgtt_cleanup(vm, ppgtt->pd,
> + vm->total >> __gen8_pte_shift(vm->top),
> + vm->top);
> free_scratch(vm);
> }
>
> @@ -1505,24 +1475,18 @@ static int gen8_preallocate_top_level_pdp(struct
> i915_ppgtt *ppgtt)
> struct i915_page_directory *pdp = ppgtt->pd;
> struct i915_page_directory *pd;
> u64 start = 0, length = ppgtt->vm.total;
> - u64 from = start;
> unsigned int pdpe;
>
> gen8_for_each_pdpe(pd, pdp, start, length, pdpe) {
> pd = alloc_pd(vm);
> if (IS_ERR(pd))
> - goto unwind;
> + return PTR_ERR(pd);
>
> fil
[Intel-gfx] [PATCH i-g-t v2] i915/gem_ctx_engine: Drip feed requests into 'independent'
The intent of the test is to exercise that each channel in the engine[]
is an independent context/ring/timeline. It setups 64 channels pointing
to rcs0 and then submits one request to each in turn waiting on a
timeline that will force them to run out of submission order. They can
only run in fence order and not submission order if the timelines of
each channel are truly independent.
However, we released the fences en masse, and once the requests are
ready they are independent any may be executed in any order by the HW,
especially true with timeslicing that may reorder the requests on a
whim. So instead of releasing all requests at once, increment the
timeline step by step and check we get our results advancing. If the
requests can not be run in fence order and fall back to submission
order, we will time out waiting for our incremental results and trigger
a few GPU hangs.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
Signed-off-by: Chris Wilson
---
Remember the importance of READ_ONCE!
---
tests/i915/gem_ctx_engines.c | 39 +++-
1 file changed, 29 insertions(+), 10 deletions(-)
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 8c66fb261..2e80d0f3e 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -405,6 +405,14 @@ static void execute_allforone(int i915)
gem_context_destroy(i915, param.ctx_id);
}
+static uint32_t read_result(int timeline, uint32_t *map, int idx)
+{
+ sw_sync_timeline_inc(timeline, 1);
+ while (!READ_ONCE(map[idx]))
+ ;
+ return map[idx];
+}
+
static void independent(int i915)
{
#define RCS_TIMESTAMP (0x2000 + 0x358)
@@ -438,6 +446,12 @@ static void independent(int i915)
memset(&engines, 0, sizeof(engines)); /* All rcs0 */
gem_context_set_param(i915, ¶m);
+ gem_set_caching(i915, results.handle, I915_CACHING_CACHED);
+ map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
+ gem_set_domain(i915, results.handle,
+ I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ memset(map, 0, 4096);
+
for (int i = 0; i < I915_EXEC_RING_MASK + 1; i++) {
struct drm_i915_gem_exec_object2 obj[2] = {
results, /* write hazard lies! */
@@ -472,21 +486,21 @@ static void independent(int i915)
gem_close(i915, obj[1].handle);
close(execbuf.rsvd2);
}
- close(timeline);
- gem_sync(i915, results.handle);
-
- map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
- gem_set_domain(i915, results.handle, I915_GEM_DOMAIN_CPU, 0);
- gem_close(i915, results.handle);
- last = map[0];
+ last = read_result(timeline, map, 0);
for (int i = 1; i < I915_EXEC_RING_MASK + 1; i++) {
- igt_assert_f((map[i] - last) > 0,
-"Engine instance [%d] executed too late\n", i);
- last = map[i];
+ uint32_t t = read_result(timeline, map, i);
+ igt_assert_f(t - last > 0,
+"Engine instance [%d] executed too late, previous
timestamp %08x, now %08x\n",
+i, last, t);
+ last = t;
}
munmap(map, 4096);
+ close(timeline);
+ gem_sync(i915, results.handle);
+ gem_close(i915, results.handle);
+
gem_context_destroy(i915, param.ctx_id);
}
@@ -500,6 +514,8 @@ igt_main
gem_require_contexts(i915);
igt_require(has_context_engines(i915));
+
+ igt_fork_hang_detector(i915);
}
igt_subtest("invalid-engines")
@@ -519,4 +535,7 @@ igt_main
igt_subtest("independent")
independent(i915);
+
+ igt_fixture
+ igt_stop_hang_detector();
}
--
2.22.0
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rename functions to match their entry points (rev3)
== Series Details ==
Series: drm/i915: Rename functions to match their entry points (rev3)
URL : https://patchwork.freedesktop.org/series/63541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6472 -> Patchwork_13643
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/
Known issues
Here are the changes found in Patchwork_13643 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [PASS][1] -> [FAIL][2] ([fdo#110627])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#109485])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][5] -> [FAIL][6] ([fdo#103167])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][7] ([fdo#08]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6472/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627
[fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08
Participating hosts (54 -> 45)
--
Missing(9): fi-kbl-7567u fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-icl-y fi-icl-dsi fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6472 -> Patchwork_13643
CI_DRM_6472: 649e17f8cfe7361cbc104427d155f685cf7151d5 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5094: d7f140b5b02d054183a74842b4579cf7f5533927 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13643: 6b8bf3561b308aeac7e3e3c4f9366cb8a69d547b @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6b8bf3561b30 drm/i915: Propagate "_probe" function name suffix down
8a98e67ae6e4 drm/i915: Propagate "_remove" function name suffix down
3740fa749341 drm/i915: Propagate "_release" function name suffix down
06fb7768f7b5 drm/i915: Replace "_load" with "_probe" consequently
94debfbf411e drm/i915: Rename "_load"/"_unload" to match PCI entry points
968fac008e47 drm/i915: Drop extern qualifiers from header function prototypes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rename functions to match their entry points (rev3)
Quoting Patchwork (2019-07-12 14:14:34) > == Series Details == > > Series: drm/i915: Rename functions to match their entry points (rev3) > URL : https://patchwork.freedesktop.org/series/63541/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_6472 -> Patchwork_13643 > > > Summary > --- > > **SUCCESS** > > No regressions found. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13643/ And pushed. Thanks for the continual improvements, -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/display: Drop kerneldoc for 'intel_atomic_commit'
intel_atomic_commit() is not for use internally, but only as an entry point from the core drm atomic helper (drm_atomic_commit). Squelches the warning for: drivers/gpu/drm/i915/display/intel_display.c:14148: warning: Function parameter or member '_state' not described in 'intel_atomic_commit' drivers/gpu/drm/i915/display/intel_display.c:14148: warning: Excess function parameter 'state' description in 'intel_atomic_commit' Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_display.c | 12 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index e12671ca1886..9758523f0837 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -14130,18 +14130,6 @@ static void intel_atomic_track_fbs(struct intel_atomic_state *state) plane->frontbuffer_bit); } -/** - * intel_atomic_commit - commit validated state object - * @dev: DRM device - * @state: the top-level driver state object - * @nonblock: nonblocking commit - * - * This function commits a top-level state object that has been validated - * with drm_atomic_helper_check(). - * - * RETURNS - * Zero for success or -errno. - */ static int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, bool nonblock) -- 2.22.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Vulkan performance query support (rev9)
== Series Details == Series: drm/i915: Vulkan performance query support (rev9) URL : https://patchwork.freedesktop.org/series/60916/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6458_full -> Patchwork_13621_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_13621_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_13621_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_13621_full: ### IGT changes ### Possible regressions * igt@perf@blocking: - shard-hsw: [PASS][1] -> [DMESG-WARN][2] +11 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-hsw2/igt@p...@blocking.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-hsw6/igt@p...@blocking.html * igt@perf@create-destroy-userspace-config: - shard-glk: [PASS][3] -> [DMESG-WARN][4] +10 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-glk7/igt@p...@create-destroy-userspace-config.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-glk4/igt@p...@create-destroy-userspace-config.html * igt@perf@gen8-unprivileged-single-ctx-counters: - shard-skl: [PASS][5] -> [DMESG-WARN][6] +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl4/igt@p...@gen8-unprivileged-single-ctx-counters.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-skl9/igt@p...@gen8-unprivileged-single-ctx-counters.html * igt@perf@invalid-oa-exponent: - shard-iclb: [PASS][7] -> [DMESG-WARN][8] +8 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-iclb5/igt@p...@invalid-oa-exponent.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-iclb6/igt@p...@invalid-oa-exponent.html * igt@perf@invalid-oa-metric-set-id: - shard-skl: [PASS][9] -> [INCOMPLETE][10] +2 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-skl9/igt@p...@invalid-oa-metric-set-id.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-skl5/igt@p...@invalid-oa-metric-set-id.html * igt@perf@low-oa-exponent-permissions: - shard-apl: [PASS][11] -> [DMESG-WARN][12] +9 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl5/igt@p...@low-oa-exponent-permissions.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-apl7/igt@p...@low-oa-exponent-permissions.html - shard-iclb: NOTRUN -> [DMESG-WARN][13] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-iclb6/igt@p...@low-oa-exponent-permissions.html * igt@perf@oa-exponents: - shard-hsw: [PASS][14] -> [TIMEOUT][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-hsw2/igt@p...@oa-exponents.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-hsw5/igt@p...@oa-exponents.html * igt@perf@short-reads: - shard-kbl: [PASS][16] -> [DMESG-WARN][17] +10 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl1/igt@p...@short-reads.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-kbl7/igt@p...@short-reads.html * igt@runner@aborted: - shard-hsw: NOTRUN -> ([FAIL][18], [FAIL][19]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-hsw5/igt@run...@aborted.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-hsw5/igt@run...@aborted.html - shard-kbl: NOTRUN -> [FAIL][20] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-kbl2/igt@run...@aborted.html - shard-apl: NOTRUN -> [FAIL][21] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-apl6/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_13621_full that come from known issues: ### IGT changes ### Issues hit * igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen: - shard-kbl: [PASS][22] -> [FAIL][23] ([fdo#103232]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-kbl1/igt@kms_cursor_...@pipe-b-cursor-64x64-onscreen.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13621/shard-kbl1/igt@kms_cursor_...@pipe-b-cursor-64x64-onscreen.html - shard-apl: [PASS][24] -> [FAIL][25] ([fdo#103232]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6458/shard-apl2/igt@kms_cursor_...@pipe-b-cursor-64x64-onscreen.html [25]:
