[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Optimize use of DBuf slices (rev3)
== Series Details == Series: Optimize use of DBuf slices (rev3) URL : https://patchwork.freedesktop.org/series/41180/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/icl: track dbuf slice-2 status -drivers/gpu/drm/i915/selftests/../i915_drv.h:2211:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3659:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) Commit: drm/i915/icl: Enable 2nd DBuf slice only when needed Okay! Commit: drm/i915/icl: update ddb entry start/end mask during hw ddb readout Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr
On Fri, 20 Apr 2018, vathsala nagaraju wrote:
> On Thursday 19 April 2018 07:05 PM, Jani Nikula wrote:
>> On Thu, 19 Apr 2018, vathsala nagaraju wrote:
>>> From: Vathsala Nagaraju
>>>
>>> For psr block #9, the vbt description has moved to options [0-3] for
>>> TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt
>>> structure. Since spec does not mention from which VBT version this
>>> change was added to vbt.bsf file, we cannot depend on bdb->version check
>>> to change for all the platforms.
>>>
>>> There is RCR inplace for GOP team to provide the version number
>>> to make generic change. Since Kabylake with bdb version 209 is having this
>>> change, limiting this change to kbl and version 209+ to unblock google.
>> This is an incredible mess.
>>
>>> Tested on skl(bdb version 203,without options) and
>>> kabylake(bdb version 209,212) having new options.
>>>
>>> bspec 20131
>>>
>>> v2: (Jani and Rodrigo)
>>> move the 165 version check to intel_bios.c
>>> v3: Jani
>>> move the abstraction to intel_bios
>>>
>>> Cc: Rodrigo Vivi
>>> CC: Puthikorn Voravootivat
>>>
>>> Signed-off-by: Maulik V Vaghela
>>> Signed-off-by: Vathsala Nagaraju
>>> ---
>>> drivers/gpu/drm/i915/intel_bios.c | 40
>>> ---
>>> drivers/gpu/drm/i915/intel_psr.c | 26 -
>>> 2 files changed, 50 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_bios.c
>>> b/drivers/gpu/drm/i915/intel_bios.c
>>> index 702d3fa..8913dc8 100644
>>> --- a/drivers/gpu/drm/i915/intel_bios.c
>>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>>> @@ -646,6 +646,15 @@ static int intel_bios_ssc_frequency(struct
>>> drm_i915_private *dev_priv,
>>> }
>>> }
>>>
>>> +static bool
>>> +is_psr_options(struct drm_i915_private *dev_priv, const struct bdb_header
>>> *bdb)
>>> +{
>>> + if (bdb->version >= 209 && IS_KABYLAKE(dev_priv))
>>> + return true;
>>> + else
>>> + return false;
>>> +}
>>> +
>>> static void
>>> parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
>>> {
>>> @@ -658,7 +667,6 @@ static int intel_bios_ssc_frequency(struct
>>> drm_i915_private *dev_priv,
>>> DRM_DEBUG_KMS("No PSR BDB found.\n");
>>> return;
>>> }
>>> -
>>> psr_table = &psr->psr_table[panel_type];
>>>
>>> dev_priv->vbt.psr.full_link = psr_table->full_link;
>>> @@ -687,8 +695,34 @@ static int intel_bios_ssc_frequency(struct
>>> drm_i915_private *dev_priv,
>>> break;
>>> }
>>>
>>> - dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
>>> - dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
>>> + /* new psr optionsold decimal value interpretation
>>> +* 0 [500 us] > 1 [500 us ]
>>> +* 1 [100 us] > 0 [100 us ]
>>> +* 2 [2.5 ms] > 5 [2.5 ms ]
>>> +* 3 [0 us] = 0 [0 us ]
>> The old decimal value stuff was wake up time in multiples of 100 us.
>>
>>> +*/
>>> + if (!is_psr_options(dev_priv, bdb)) {
>> You only use is_psr_options here once, please just open code the
>> condition. Also reverse order to not need !something in the condition.
>>
>>> + if (psr_table->tp1_wakeup_time > 5)
>>> + dev_priv->vbt.psr.tp1_wakeup_time = 2;
>>> + else if (psr_table->tp1_wakeup_time > 1)
>>> + dev_priv->vbt.psr.tp1_wakeup_time = 0;
>>> + else if (psr_table->tp1_wakeup_time > 0)
>>> + dev_priv->vbt.psr.tp1_wakeup_time = 1;
>>> + else
>>> + dev_priv->vbt.psr.tp1_wakeup_time = 3;
>>> +
>>> + if (psr_table->tp2_tp3_wakeup_time > 5)
>>> + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 2;
>>> + else if (psr_table->tp2_tp3_wakeup_time > 1)
>>> + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 0;
>>> + else if (psr_table->tp1_wakeup_time > 0)
>>> + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 1;
>>> + else
>>> + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 3;
>>> + } else {
>>> + dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
>>> + dev_priv->vbt.psr.tp2_tp3_wakeup_time =
>>> psr_table->tp2_tp3_wakeup_time;
>>> + }
>>> }
>> Please rename dev_priv->vbt.psr tp1_wakeup_time and tp2_tp3_wakeup_time
>> to have _us suffix, and actually assign the wakeup time in us
>> there. Hide all the hideous, hideous VBT stuff behind that, and doesn't
>> use magic numbers all over the place.
>>
>> The old format becomes wakeup_time_us = vbt_value * 100. The code should
>> handle mismatches between the value and what the hardware can do (see
>> below).
>>
>> The new format should just be a switch-case mapping values to us,
>> whining about values other than 0..3 and defaulting to max in that case.
> if we don't set anything in SRD_CTL/PSR2_CTL reg for those bits , by
Re: [Intel-gfx] [PATCH 1/1] drm/i915: move audio component intialization before audio driver use it
On Thu, 29 Mar 2018, Yang wrote: > From: Yang Shi > > snd_hdac driver would use the component interface from i915 driver. > if i915 driver do the audio component intialization too late, snd_hdac > driver will meet ipanic. To follow-up, we figured out off-list that the root cause here were local async probe changes, and the issue that this patch addresses is not present upstream. However, it seems likely that the patch [1] recently proposed by Chris would cause similar issues. Let's continue the discussion on that thread. BR, Jani. [1] http://patchwork.freedesktop.org/patch/msgid/20180323083048.13327-1-ch...@chris-wilson.co.uk > > Signed-off-by: Bo He > Signed-off-by: Yang Shi > --- > drivers/gpu/drm/i915/i915_drv.c | 2 -- > drivers/gpu/drm/i915/intel_display.c | 2 ++ > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 2f5209d..9d25d7e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1243,8 +1243,6 @@ static void i915_driver_register(struct > drm_i915_private *dev_priv) > if (IS_GEN5(dev_priv)) > intel_gpu_ips_init(dev_priv); > > - intel_audio_init(dev_priv); > - > /* >* Some ports require correctly set-up hpd registers for detection to >* work properly (leading to ghost connected connector status), e.g. VGA > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index f288bcc..a471c88 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -14468,6 +14468,8 @@ int intel_modeset_init(struct drm_device *dev) > > dev->mode_config.funcs = &intel_mode_funcs; > > + intel_audio_init(dev_priv); > + > init_llist_head(&dev_priv->atomic_helper.free_list); > INIT_WORK(&dev_priv->atomic_helper.free_work, > intel_atomic_helper_free_state_worker); -- Jani Nikula, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Optimize use of DBuf slices (rev3)
== Series Details == Series: Optimize use of DBuf slices (rev3) URL : https://patchwork.freedesktop.org/series/41180/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106 -> Patchwork_8815 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/41180/revisions/3/mbox/ == Known issues == Here are the changes found in Patchwork_8815 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-wf_vblank: fi-cfl-s3: PASS -> FAIL (fdo#100368) Possible fixes igt@prime_vgem@basic-fence-flip: fi-ilk-650: FAIL (fdo#104008) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 == Participating hosts (39 -> 35) == Missing(4): fi-byt-j1900 fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8815 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8815: 5c516df104b953f7868147d104cdfa4b4596dacd @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 5c516df104b9 drm/i915/icl: update ddb entry start/end mask during hw ddb readout 4d96ef7a65c8 drm/i915/icl: Enable 2nd DBuf slice only when needed 2e0eb86b46f1 drm/i915/icl: track dbuf slice-2 status == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8815/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Request driver probe from an async task
On Thu, 26 Apr 2018, Imre Deak wrote:
> On Thu, Apr 26, 2018 at 03:41:57PM +0300, David Weinehall wrote:
>> On Fri, Mar 23, 2018 at 08:30:48AM +, Chris Wilson wrote:
>> > As we are careful not to register external interfaces before the
>> > internals are brought up, we are not dependent upon a synchronous
>> > probing and can allow ourselves to be probed from a secondary thread
>> > during system bootup. We already do relegate some configuration to
>> > asynchronous tasks (such as setting up the fbdev), now do the entire
>> > probe.
>> >
>> > References: https://bugs.freedesktop.org/show_bug.cgi?id=105622
>> > Signed-off-by: Chris Wilson
>>
>> LGTM, and still seems to apply cleanly.
>>
>> Reviewed-by: David Weinehall
>
> One problem with this is that atm in snd_hdac_i915_init()
> request_module() is expected to return only once the i915 probe function
> has run. With async probing this won't be any more the case.
>
> +Takashi
As I wrote to Yang (Cc'd) in the context of another patch, one approach
that takes care of this would be adding a completion in hdac_i915.c,
waiting for it with a timeout below request_module("i915") in
snd_hdac_i915_init(), and completing it in
hdac_component_master_bind(). How long the timeout should be is anyone's
guess...
BR,
Jani.
>
>>
>> > Cc: Imre Deak
>> > Cc: Ville Syrjälä
>> > Cc: David Weinehall
>> > ---
>> > drivers/gpu/drm/i915/i915_pci.c | 1 +
>> > 1 file changed, 1 insertion(+)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_pci.c
>> > b/drivers/gpu/drm/i915/i915_pci.c
>> > index 4364922e935d..be7b03d48229 100644
>> > --- a/drivers/gpu/drm/i915/i915_pci.c
>> > +++ b/drivers/gpu/drm/i915/i915_pci.c
>> > @@ -726,6 +726,7 @@ static struct pci_driver i915_pci_driver = {
>> >.probe = i915_pci_probe,
>> >.remove = i915_pci_remove,
>> >.driver.pm = &i915_pm_ops,
>> > + .driver.probe_type = PROBE_PREFER_ASYNCHRONOUS,
>> > };
>> >
>> > static int __init i915_init(void)
>> > --
>> > 2.16.2
>> >
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 4.17-rc2: Could not determine valid watermarks for inherited state
== Series Details == Series: 4.17-rc2: Could not determine valid watermarks for inherited state URL : https://patchwork.freedesktop.org/series/42348/ State : warning == Summary == $ dim checkpatch origin/drm-tip 024c36c024b1 4.17-rc2: Could not determine valid watermarks for inherited state -:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #13: > > > [1.176131] [drm:i9xx_get_initial_plane_config] pipe A/primary A with > > > fb: size=800x600@32, offset=0, pitch 3200, size 0x1d4c00 -:57: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s) total: 1 errors, 1 warnings, 0 checks, 8 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for 4.17-rc2: Could not determine valid watermarks for inherited state
== Series Details == Series: 4.17-rc2: Could not determine valid watermarks for inherited state URL : https://patchwork.freedesktop.org/series/42348/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106 -> Patchwork_8816 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/42348/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_8816 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-wf_vblank: fi-hsw-4200u: PASS -> FAIL (fdo#100368) Possible fixes igt@prime_vgem@basic-fence-flip: fi-ilk-650: FAIL (fdo#104008) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8816 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8816: 024c36c024b11b89ff4d1cc8e06fe5da1ab153fe @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 024c36c024b1 4.17-rc2: Could not determine valid watermarks for inherited state == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8816/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout
== Series Details == Series: drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout URL : https://patchwork.freedesktop.org/series/42351/ State : warning == Summary == $ dim checkpatch origin/drm-tip f70e93b138f0 drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout -:44: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #44: References: https://lists.freedesktop.org/archives/intel-gfx/2018-April/163186.html total: 0 errors, 1 warnings, 0 checks, 8 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout
== Series Details == Series: drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout URL : https://patchwork.freedesktop.org/series/42351/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106 -> Patchwork_8817 = == Summary - WARNING == Minor unknown changes coming with Patchwork_8817 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8817, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42351/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8817: === IGT changes === Warnings igt@gem_exec_gttfill@basic: fi-pnv-d510:SKIP -> PASS == Known issues == Here are the changes found in Patchwork_8817 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-ivb-3520m: PASS -> DMESG-WARN (fdo#106084) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cnl-psr: PASS -> DMESG-WARN (fdo#104951) Possible fixes igt@gem_mmap_gtt@basic-small-bo-tiledx: fi-gdg-551: FAIL (fdo#102575) -> PASS igt@prime_vgem@basic-fence-flip: fi-ilk-650: FAIL (fdo#104008) -> PASS fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951 fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8817 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8817: f70e93b138f0d04711491a223655c72326136eb2 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == f70e93b138f0 drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8817/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details ==
Series: series starting with [1/7] drm/i915: Stop tracking
timeline->inflight_seqnos
URL : https://patchwork.freedesktop.org/series/42360/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
35d1fe2b7f54 drm/i915: Stop tracking timeline->inflight_seqnos
-:17: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9b6586ae9f6b ("drm/i915: Keep a
global seqno per-engine")'
#17:
References: 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine")
total: 1 errors, 0 warnings, 0 checks, 128 lines checked
20c25ecb6898 drm/i915: Wrap engine->context_pin() and engine->context_unpin()
934b5fb6717d drm/i915: Retire requests along rings
0b75afb49522 drm/i915: Only track live rings for retiring
74dfea354317 drm/i915: Move timeline from GTT to ring
8acc3a732d03 drm/i915: Split i915_gem_timeline into individual timelines
-:464: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#464:
deleted file mode 100644
-:969: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#969: FILE: drivers/gpu/drm/i915/i915_timeline.c:1:
+/*
total: 0 errors, 2 warnings, 0 checks, 1638 lines checked
67838145b9cf drm/i915: Lazily unbind vma on close
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42360/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Stop tracking timeline->inflight_seqnos -O:drivers/gpu/drm/i915/i915_request.c:268:13: error: undefined identifier '__builtin_add_overflow_p' -O:drivers/gpu/drm/i915/i915_request.c:268:13: warning: call with no type! -drivers/gpu/drm/i915/selftests/../i915_drv.h:2211:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3659:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) Commit: drm/i915: Wrap engine->context_pin() and engine->context_unpin() Okay! Commit: drm/i915: Retire requests along rings -drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3661:16: warning: expression using sizeof(void) Commit: drm/i915: Only track live rings for retiring -drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3661:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3662:16: warning: expression using sizeof(void) Commit: drm/i915: Move timeline from GTT to ring -drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3662:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2215:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3653:16: warning: expression using sizeof(void) Commit: drm/i915: Split i915_gem_timeline into individual timelines -drivers/gpu/drm/i915/selftests/../i915_drv.h:2215:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3653:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3651:16: warning: expression using sizeof(void) Commit: drm/i915: Lazily unbind vma on close -drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3651:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3652:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42360/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4106 -> Patchwork_8818 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_8818 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8818, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42360/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8818: === IGT changes === Possible regressions igt@gem_exec_suspend@basic-s4-devices: fi-skl-guc: PASS -> FAIL +1 Warnings igt@gem_exec_gttfill@basic: fi-pnv-d510:SKIP -> PASS == Known issues == Here are the changes found in Patchwork_8818 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s4-devices: fi-kbl-7500u: PASS -> DMESG-WARN (fdo#105128) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-cnl-y3: PASS -> DMESG-WARN (fdo#104951) Possible fixes igt@gem_mmap_gtt@basic-small-bo-tiledx: fi-gdg-551: FAIL (fdo#102575) -> PASS igt@prime_vgem@basic-fence-flip: fi-ilk-650: FAIL (fdo#104008) -> PASS fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951 fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8818 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8818: 67838145b9cf732858cee3bb3da7d88ea5f22321 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 67838145b9cf drm/i915: Lazily unbind vma on close 8acc3a732d03 drm/i915: Split i915_gem_timeline into individual timelines 74dfea354317 drm/i915: Move timeline from GTT to ring 0b75afb49522 drm/i915: Only track live rings for retiring 934b5fb6717d drm/i915: Retire requests along rings 20c25ecb6898 drm/i915: Wrap engine->context_pin() and engine->context_unpin() 35d1fe2b7f54 drm/i915: Stop tracking timeline->inflight_seqnos == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8818/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] x86: Mark up large pm4/5 constants with UL
To silence sparse while maintaining compatibility with the assembly, use _UL which conditionally only appends the UL suffix for C code. Signed-off-by: Chris Wilson --- arch/x86/include/asm/pgtable_64_types.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h index d5c21a382475..40caf5eb9c18 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -105,14 +105,14 @@ extern unsigned int ptrs_per_p4d; #define LDT_PGD_ENTRY (pgtable_l5_enabled ? LDT_PGD_ENTRY_L5 : LDT_PGD_ENTRY_L4) #define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT) -#define __VMALLOC_BASE_L4 0xc900 -#define __VMALLOC_BASE_L5 0xffa0 +#define __VMALLOC_BASE_L4 _UL(0xc900) +#define __VMALLOC_BASE_L5 _UL(0xffa0) #define VMALLOC_SIZE_TB_L4 32UL #define VMALLOC_SIZE_TB_L5 12800UL -#define __VMEMMAP_BASE_L4 0xea00 -#define __VMEMMAP_BASE_L5 0xffd4 +#define __VMEMMAP_BASE_L4 _UL(0xea00) +#define __VMEMMAP_BASE_L5 _UL(0xffd4) #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT # define VMALLOC_START vmalloc_base -- 2.17.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake
On Wed, 25 Apr 2018, Ian W MORRISON wrote:
> Can I ask if this is on anyone's radar as I'm concerned this patch will
> stall otherwise?
Pushed to drm-intel-next-queued, thanks for the patch.
I opted to drop the Cc: stable for now. This doesn't mean it can't be
backported later on, I'm just punting on that call right now to make
some forward progress here.
Joonas, please do pick f6d3e06f0747 ("drm/i915/glk: Add MODULE_FIRMWARE
for Geminilake") to drm-intel-fixes to queue it to v4.17.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp: Rename the edp_sdp_header as dp_sdp_header
== Series Details == Series: drm/dp: Rename the edp_sdp_header as dp_sdp_header URL : https://patchwork.freedesktop.org/series/42363/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106 -> Patchwork_8819 = == Summary - WARNING == Minor unknown changes coming with Patchwork_8819 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8819, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42363/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8819: === IGT changes === Warnings igt@gem_exec_gttfill@basic: fi-pnv-d510:SKIP -> PASS == Known issues == Here are the changes found in Patchwork_8819 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-wf_vblank: fi-cnl-psr: PASS -> FAIL (fdo#100368) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cnl-y3: PASS -> DMESG-FAIL (fdo#103191) Possible fixes igt@prime_vgem@basic-fence-flip: fi-ilk-650: FAIL (fdo#104008) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 == Participating hosts (39 -> 35) == Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-bxt-dsi fi-skl-6700hq == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8819 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8819: 031193daa609e6a5e124b1413dc736583c0dd58b @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 031193daa609 drm/dp: Rename the edp_sdp_header as dp_sdp_header == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8819/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for Optimize use of DBuf slices (rev3)
== Series Details == Series: Optimize use of DBuf slices (rev3) URL : https://patchwork.freedesktop.org/series/41180/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106_full -> Patchwork_8815_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8815_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8815_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/41180/revisions/3/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8815_full: === IGT changes === Warnings igt@gem_mocs_settings@mocs-rc6-vebox: shard-kbl: SKIP -> PASS +1 igt@kms_fbcon_fbt@fbc-suspend: shard-snb: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_8815_full that come from known issues: === IGT changes === Issues hit igt@gem_render_copy_redux@normal: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing: shard-apl: PASS -> FAIL (fdo#103207) igt@kms_cursor_legacy@cursor-vs-flip-toggle: shard-hsw: PASS -> FAIL (fdo#103355) igt@kms_flip@absolute-wf_vblank-interruptible: shard-glk: PASS -> FAIL (fdo#106087) igt@kms_flip@plain-flip-fb-recreate-interruptible: shard-glk: PASS -> FAIL (fdo#100368) Possible fixes igt@gem_eio@in-flight-contexts-1us: shard-glk: FAIL (fdo#105957) -> PASS igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-glk: DMESG-WARN -> PASS igt@kms_rotation_crc@primary-rotation-180: shard-hsw: FAIL (fdo#103925) -> PASS igt@kms_vblank@pipe-a-accuracy-idle: shard-hsw: FAIL (fdo#102583) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583 fdo#103207 https://bugs.freedesktop.org/show_bug.cgi?id=103207 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087 == Participating hosts (6 -> 5) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8815 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8815: 5c516df104b953f7868147d104cdfa4b4596dacd @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8815/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for dma-fence doc polish and small cleanup
== Series Details ==
Series: dma-fence doc polish and small cleanup
URL : https://patchwork.freedesktop.org/series/42373/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d608bb886c37 dma-fence: Some kerneldoc polish for dma-fence.h
d3e894db59f2 dma-fence: remove fill_driver_data callback
7a0436313af4 dma-fence: Make ->enable_signaling optional
-:39: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON &
recovery code rather than BUG() or BUG_ON()
#39: FILE: drivers/dma-buf/dma-fence.c:570:
+ BUG_ON(!ops || !ops->wait ||
total: 0 errors, 1 warnings, 0 checks, 40 lines checked
c992546a4299 dma-fence: Allow wait_any_timeout for all fences
-:11: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit a519435a9659 ("dma-buf/fence:
add fence_wait_any_timeout function v2")'
#11:
commit a519435a96597d8cd96123246fea4ae5a6c90b02
total: 1 errors, 0 warnings, 0 checks, 11 lines checked
5bb2c4489fe2 dma-fence: Make ->wait callback optional
82a1077c8bc4 drm/amdgpu: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/amdgpu: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
0a9e1f9ea902 drm: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 52 lines checked
cd72740696a4 drm/etnaviv: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/etnaviv: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 20 lines checked
882e1829f9ea drm/i915: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/i915: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 35 lines checked
d96eb2b842cb drm/msm: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/msm: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 20 lines checked
ef2128ee2e42 drm/nouveau: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/nouveau: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 6 lines checked
b56969ece9ef drm/qxl: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/qxl: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 19 lines checked
de3955faf8ba drm/radeon: Remove custom dma_fence_ops->wait implementation
9ee21af0f11e drm/vc4: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/vc4: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 19 lines checked
1d34900aa346 drm/vgem: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/vgem: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 27 lines checked
dab6a77e297e drm/virtio: Remove unecessary dma_fence_ops
-:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps
'unnecessary'?
#4:
Subject: [PATCH] drm/virtio: Remove unecessary dma_fence_ops
total: 0 errors, 1 warnings, 0 checks, 20 lines checked
78ce7209ca31 dma-fence: Polish kernel-doc for dma-fence.c
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[Intel-gfx] ✗ Fi.CI.BAT: failure for dma-fence doc polish and small cleanup
== Series Details == Series: dma-fence doc polish and small cleanup URL : https://patchwork.freedesktop.org/series/42373/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4107 -> Patchwork_8820 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_8820 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8820, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42373/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8820: === IGT changes === Possible regressions igt@core_auth@basic-auth: fi-kbl-r: PASS -> INCOMPLETE fi-bwr-2160:PASS -> INCOMPLETE fi-kbl-7560u: PASS -> INCOMPLETE igt@debugfs_test@read_all_entries: fi-cfl-u: PASS -> INCOMPLETE fi-ivb-3770:PASS -> INCOMPLETE fi-cfl-s3: PASS -> INCOMPLETE fi-skl-6260u: PASS -> INCOMPLETE fi-snb-2600:PASS -> INCOMPLETE fi-hsw-4770r: PASS -> INCOMPLETE fi-kbl-7500u: PASS -> INCOMPLETE fi-hsw-4200u: PASS -> INCOMPLETE fi-bdw-5557u: PASS -> INCOMPLETE fi-skl-guc: PASS -> INCOMPLETE fi-kbl-7567u: PASS -> INCOMPLETE fi-skl-6600u: PASS -> INCOMPLETE fi-cfl-8700k: PASS -> INCOMPLETE fi-ivb-3520m: PASS -> INCOMPLETE fi-skl-6700k2: PASS -> INCOMPLETE fi-hsw-4770:PASS -> INCOMPLETE fi-skl-6770hq: PASS -> INCOMPLETE igt@gem_close_race@basic-process: fi-ilk-650: PASS -> INCOMPLETE fi-blb-e6850: PASS -> INCOMPLETE fi-gdg-551: PASS -> INCOMPLETE fi-pnv-d510:PASS -> INCOMPLETE fi-bsw-n3050: PASS -> INCOMPLETE == Known issues == Here are the changes found in Patchwork_8820 that come from known issues: === IGT changes === Issues hit igt@core_auth@basic-auth: fi-glk-j4005: PASS -> INCOMPLETE (k.org#198133, fdo#103359) fi-bdw-gvtdvm: PASS -> INCOMPLETE (fdo#105600) fi-cnl-psr: PASS -> INCOMPLETE (fdo#105086) fi-cnl-y3: PASS -> INCOMPLETE (fdo#105086) fi-skl-gvtdvm: PASS -> INCOMPLETE (fdo#105600) igt@debugfs_test@read_all_entries: fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713) igt@gem_close_race@basic-process: fi-elk-e7500: PASS -> INCOMPLETE (fdo#103989) fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927) fi-byt-j1900: PASS -> INCOMPLETE (fdo#102657) fi-bxt-j4205: PASS -> INCOMPLETE (fdo#103927) fi-byt-n2820: PASS -> INCOMPLETE (fdo#102657) fdo#102657 https://bugs.freedesktop.org/show_bug.cgi?id=102657 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fdo#105086 https://bugs.freedesktop.org/show_bug.cgi?id=105086 fdo#105600 https://bugs.freedesktop.org/show_bug.cgi?id=105600 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8820 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8820: 78ce7209ca318f37b53fe082a8bfafb4d74ac79a @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 78ce7209ca31 dma-fence: Polish kernel-doc for dma-fence.c dab6a77e297e drm/virtio: Remove unecessary dma_fence_ops 1d34900aa346 drm/vgem: Remove unecessary dma_fence_ops 9ee21af0f11e drm/vc4: Remove unecessary dma_fence_ops de3955faf8ba drm/radeon: Remove custom dma_fence_ops->wait implementation b56969ece9ef drm/qxl: Remove unecessary dma_fence_ops ef2128ee2e42 drm/nouveau: Remove unecessary dma_fence_ops d96eb2b842cb drm/msm: Remove unecessary dma_fence_ops 882e1829f9ea drm/i915: Remove unecessary dma_fence_ops cd72740696a4 drm/etnaviv: Remove unecessary dma_fence_ops 0a9e1f9ea902 drm: Remove unecessary dma_fence_ops 82a1077c8bc4 drm/amdgpu: Remove unecessary dma_fence_ops 5bb2c4489fe2 dma-fence: Make ->wait callback optional c992546a4299 dma-fence: Allow wait_any_timeout for all fences 7a0436313af4 dma-fence: Make ->enable_signaling optional d3e894db59f2 dma-fence: remove fill_drive
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/psr : Add psr1 live status (rev2)
== Series Details == Series: drm/i915/psr : Add psr1 live status (rev2) URL : https://patchwork.freedesktop.org/series/42021/ State : warning == Summary == $ dim checkpatch origin/drm-tip f386581d5e6f drm/i915/psr : Add psr1 live status -:105: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #105: FILE: drivers/gpu/drm/i915/i915_debugfs.c:2723: + seq_printf(m, "EDP_SOURCE_PSR%s_STATUS: %x [%s]\n", + dev_priv->psr.psr2_enabled ? "2" : "1", total: 0 errors, 0 warnings, 1 checks, 93 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for 4.17-rc2: Could not determine valid watermarks for inherited state
== Series Details == Series: 4.17-rc2: Could not determine valid watermarks for inherited state URL : https://patchwork.freedesktop.org/series/42348/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106_full -> Patchwork_8816_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8816_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8816_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42348/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8816_full: === IGT changes === Warnings igt@gem_mocs_settings@mocs-rc6-vebox: shard-kbl: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_8816_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@flip-vs-wf_vblank-interruptible: shard-glk: PASS -> FAIL (fdo#100368) Possible fixes igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-glk: DMESG-WARN (fdo#106247) -> PASS igt@kms_rotation_crc@primary-rotation-180: shard-hsw: FAIL (fdo#103925) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@kms_vblank@pipe-a-accuracy-idle: shard-hsw: FAIL (fdo#102583) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (9 -> 5) == Missing(4): shard-glkb pig-skl-6600 pig-glk-j4005 pig-hsw-4770r == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8816 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8816: 024c36c024b11b89ff4d1cc8e06fe5da1ab153fe @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8816/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr : Add psr1 live status (rev2)
== Series Details == Series: drm/i915/psr : Add psr1 live status (rev2) URL : https://patchwork.freedesktop.org/series/42021/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4107 -> Patchwork_8821 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/42021/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_8821 that come from known issues: === IGT changes === Issues hit igt@kms_frontbuffer_tracking@basic: fi-cnl-y3: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713) igt@prime_vgem@basic-fence-flip: fi-ilk-650: PASS -> FAIL (fdo#104008) Possible fixes igt@gem_exec_suspend@basic-s3: fi-ivb-3520m: DMESG-WARN (fdo#106084) -> PASS igt@kms_busy@basic-flip-c: fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-cnl-psr: FAIL (fdo#100368) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-cnl-psr: FAIL (fdo#103481) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084 == Participating hosts (39 -> 35) == Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-bwr-2160 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8821 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8821: f386581d5e6f236c5db6af327218bf874def0dac @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == f386581d5e6f drm/i915/psr : Add psr1 live status == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8821/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details ==
Series: series starting with [1/7] drm/i915: Stop tracking
timeline->inflight_seqnos
URL : https://patchwork.freedesktop.org/series/42360/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
346302027794 drm/i915: Stop tracking timeline->inflight_seqnos
-:17: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9b6586ae9f6b ("drm/i915: Keep a
global seqno per-engine")'
#17:
References: 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine")
total: 1 errors, 0 warnings, 0 checks, 128 lines checked
8ab432091db4 drm/i915: Wrap engine->context_pin() and engine->context_unpin()
d13d6277b1d2 drm/i915: Retire requests along rings
8941cb5a2ee6 drm/i915: Only track live rings for retiring
d7448ce207cd drm/i915: Move timeline from GTT to ring
c2a1803dcc45 drm/i915: Split i915_gem_timeline into individual timelines
-:464: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#464:
deleted file mode 100644
-:969: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#969: FILE: drivers/gpu/drm/i915/i915_timeline.c:1:
+/*
total: 0 errors, 2 warnings, 0 checks, 1638 lines checked
04c6fc7bf967 drm/i915: Lazily unbind vma on close
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42360/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Stop tracking timeline->inflight_seqnos -O:drivers/gpu/drm/i915/i915_request.c:268:13: error: undefined identifier '__builtin_add_overflow_p' -O:drivers/gpu/drm/i915/i915_request.c:268:13: warning: call with no type! -drivers/gpu/drm/i915/selftests/../i915_drv.h:2211:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3659:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) Commit: drm/i915: Wrap engine->context_pin() and engine->context_unpin() Okay! Commit: drm/i915: Retire requests along rings -drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3661:16: warning: expression using sizeof(void) Commit: drm/i915: Only track live rings for retiring -drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3661:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3662:16: warning: expression using sizeof(void) Commit: drm/i915: Move timeline from GTT to ring -drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3662:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2215:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3653:16: warning: expression using sizeof(void) Commit: drm/i915: Split i915_gem_timeline into individual timelines -drivers/gpu/drm/i915/selftests/../i915_drv.h:2215:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3653:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3651:16: warning: expression using sizeof(void) Commit: drm/i915: Lazily unbind vma on close -drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3651:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3652:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v7 1/2] drm: content-type property for HDMI connector
Ping.
On Mon, 2018-04-23 at 13:45 +, Lisovskiy, Stanislav wrote:
> Ping
>
> From: Intel-gfx [intel-gfx-boun...@lists.freedesktop.org] on behalf
> of StanLis [stanislav.lisovs...@intel.com]
> Sent: Monday, April 23, 2018 10:34 AM
> To: dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v7 1/2] drm: content-type property for
> HDMI connector
>
> From: Stanislav Lisovskiy
>
> Added content_type property to drm_connector_state
> in order to properly handle external HDMI TV content-type setting.
>
> v2:
> * Moved helper function which attaches content type property
>to the drm core, as was suggested.
>Removed redundant connector state initialization.
>
> v3:
> * Removed caps in drm_content_type_enum_list.
>After some discussion it turned out that HDMI Spec 1.4
>was wrongly assuming that IT Content(itc) bit doesn't affect
>Content type states, however itc bit needs to be manupulated
>as well. In order to not expose additional property for itc,
>for sake of simplicity it was decided to bind those together
>in same "content type" property.
>
> v4:
> * Added it_content checking in intel_digital_connector_atomic_check.
>Fixed documentation for new content type enum.
>
> v5:
> * Moved patch revision's description to commit messages.
>
> v6:
> * Minor naming fix for the content type enumeration string.
>
> v7:
> * Fix parameter name for documentation and parameter alignment
>in order not to get warning. Added Content Type description to
>new HDMI connector properties section.
>
> Signed-off-by: Stanislav Lisovskiy
> ---
> Documentation/gpu/drm-kms.rst| 6 +++
> Documentation/gpu/kms-properties.csv | 1 +
> drivers/gpu/drm/drm_atomic.c | 17 +++
> drivers/gpu/drm/drm_connector.c | 74
>
> drivers/gpu/drm/drm_edid.c | 2 +
> include/drm/drm_connector.h | 18 +++
> include/drm/drm_mode_config.h| 5 ++
> include/uapi/drm/drm_mode.h | 7 +++
> 8 files changed, 130 insertions(+)
>
> diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-
> kms.rst
> index 1dffd1ac4cd4..e233c2626bd0 100644
> --- a/Documentation/gpu/drm-kms.rst
> +++ b/Documentation/gpu/drm-kms.rst
> @@ -517,6 +517,12 @@ Standard Connector Properties
> .. kernel-doc:: drivers/gpu/drm/drm_connector.c
> :doc: standard connector properties
>
> +HDMI Specific Connector Properties
> +-
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_connector.c
> + :doc: HDMI connector properties
> +
> Plane Composition Properties
>
>
> diff --git a/Documentation/gpu/kms-properties.csv
> b/Documentation/gpu/kms-properties.csv
> index 6b28b014cb7d..3567c986bd7d 100644
> --- a/Documentation/gpu/kms-properties.csv
> +++ b/Documentation/gpu/kms-properties.csv
> @@ -17,6 +17,7 @@ Owner Module/Drivers,Group,Property
> Name,Type,Property Values,Object attached,De
> ,Virtual GPU,“suggested X”,RANGE,"Min=0,
> Max=0x",Connector,property to suggest an X offset for a
> connector
> ,,“suggested Y”,RANGE,"Min=0, Max=0x",Connector,property to
> suggest an Y offset for a connector
> ,Optional,"""aspect ratio""",ENUM,"{ ""None"", ""4:3"", ""16:9""
> }",Connector,TDB
> +,Optional,"""content type""",ENUM,"{ ""No Data"", ""Graphics"",
> ""Photo"", ""Cinema"", ""Game"" }",Connector,TBD
> i915,Generic,"""Broadcast RGB""",ENUM,"{ ""Automatic"", ""Full"",
> ""Limited 16:235"" }",Connector,"When this property is set to Limited
> 16:235 and CTM is set, the hardware will be programmed with the
> result of the multiplication of CTM by the limited range matrix to
> ensure the pixels normaly in the range 0..1.0 are remapped to the
> range 16/255..235/255."
> ,,“audio”,ENUM,"{ ""force-dvi"", ""off"", ""auto"", ""on""
> }",Connector,TBD
> ,SDVO-TV,“mode”,ENUM,"{ ""NTSC_M"", ""NTSC_J"", ""NTSC_443"",
> ""PAL_B"" } etc.",Connector,TBD
> diff --git a/drivers/gpu/drm/drm_atomic.c
> b/drivers/gpu/drm/drm_atomic.c
> index 7d25c42f22db..479499f5848e 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1266,6 +1266,15 @@ static int
> drm_atomic_connector_set_property(struct drm_connector *connector,
> state->link_status = val;
> } else if (property == config->aspect_ratio_property) {
> state->picture_aspect_ratio = val;
> + } else if (property == config->content_type_property) {
> + /*
> +* Lowest two bits of content_type property control
> +* content_type, bit 2 controls itc bit.
> +* It was decided to have a single property called
> +* content_type, instead of content_type and itc.
> +*/
> + state->content_type = val & 3;
> + state->it_content = val >> 2;
>
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [1/7] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42360/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4107 -> Patchwork_8822 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_8822 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8822, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42360/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8822: === IGT changes === Possible regressions igt@drv_module_reload@basic-reload: fi-bsw-n3050: PASS -> DMESG-FAIL == Known issues == Here are the changes found in Patchwork_8822 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-wf_vblank: fi-glk-j4005: PASS -> FAIL (fdo#100368) Possible fixes igt@gem_exec_suspend@basic-s3: fi-ivb-3520m: DMESG-WARN (fdo#106084) -> PASS igt@kms_busy@basic-flip-c: fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-cnl-psr: FAIL (fdo#100368) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-cnl-psr: FAIL (fdo#103481) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8822 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8822: 04c6fc7bf967158517c3c25335363844f5721a4e @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 04c6fc7bf967 drm/i915: Lazily unbind vma on close c2a1803dcc45 drm/i915: Split i915_gem_timeline into individual timelines d7448ce207cd drm/i915: Move timeline from GTT to ring 8941cb5a2ee6 drm/i915: Only track live rings for retiring d13d6277b1d2 drm/i915: Retire requests along rings 8ab432091db4 drm/i915: Wrap engine->context_pin() and engine->context_unpin() 346302027794 drm/i915: Stop tracking timeline->inflight_seqnos == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8822/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for x86: Mark up large pm4/5 constants with UL
== Series Details == Series: x86: Mark up large pm4/5 constants with UL URL : https://patchwork.freedesktop.org/series/42387/ State : warning == Summary == $ dim checkpatch origin/drm-tip 33874ebb33b3 x86: Mark up large pm4/5 constants with UL -:22: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #22: FILE: arch/x86/include/asm/pgtable_64_types.h:109: +#define __VMALLOC_BASE_L5 ^I_UL(0xffa0)$ total: 0 errors, 1 warnings, 0 checks, 18 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for x86: Mark up large pm4/5 constants with UL
== Series Details == Series: x86: Mark up large pm4/5 constants with UL URL : https://patchwork.freedesktop.org/series/42387/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: x86: Mark up large pm4/5 constants with UL -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant 0xea00 is so big it is unsigned long -./arch/x86/include/asm/pgall
Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for x86: Mark up large pm4/5 constants with UL
Quoting Patchwork (2018-04-27 11:54:51) > == Series Details == > > Series: x86: Mark up large pm4/5 constants with UL > URL : https://patchwork.freedesktop.org/series/42387/ > State : warning > > == Summary == > > $ dim sparse origin/drm-tip > Commit: x86: Mark up large pm4/5 constants with UL > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm/pgalloc.h:115:31: warning: constant > 0xea00 is so big it is unsigned long > -./arch/x86/include/asm
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout
== Series Details == Series: drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout URL : https://patchwork.freedesktop.org/series/42351/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106_full -> Patchwork_8817_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8817_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8817_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42351/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8817_full: === IGT changes === Warnings igt@gem_mocs_settings@mocs-rc6-vebox: shard-kbl: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_8817_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@2x-plain-flip-fb-recreate: shard-hsw: PASS -> FAIL (fdo#100368) igt@kms_flip@absolute-wf_vblank-interruptible: shard-glk: PASS -> FAIL (fdo#106087) igt@kms_sysfs_edid_timing: shard-apl: PASS -> WARN (fdo#100047) Possible fixes igt@gem_eio@in-flight-contexts-1us: shard-glk: FAIL (fdo#105957) -> PASS igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#106023, fdo#103665) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-glk: DMESG-WARN (fdo#106247) -> PASS igt@kms_rotation_crc@primary-rotation-180: shard-hsw: FAIL (fdo#103925) -> PASS igt@kms_vblank@pipe-a-accuracy-idle: shard-hsw: FAIL (fdo#102583) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 == Participating hosts (9 -> 5) == Missing(4): shard-glkb pig-skl-6600 pig-glk-j4005 pig-hsw-4770r == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8817 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8817: f70e93b138f0d04711491a223655c72326136eb2 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8817/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for x86: Mark up large pm4/5 constants with UL
== Series Details == Series: x86: Mark up large pm4/5 constants with UL URL : https://patchwork.freedesktop.org/series/42387/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4107 -> Patchwork_8823 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/42387/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_8823 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-bxt-dsi: NOTRUN -> INCOMPLETE (fdo#103927) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-ivb-3520m: PASS -> DMESG-WARN (fdo#106084) Possible fixes igt@gem_exec_suspend@basic-s3: fi-ivb-3520m: DMESG-WARN (fdo#106084) -> PASS igt@kms_busy@basic-flip-c: fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-cnl-psr: FAIL (fdo#100368) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-cnl-psr: FAIL (fdo#103481) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8823 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8823: 33874ebb33b395e489a4b37475ca6a2da5aaa6ee @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 33874ebb33b3 x86: Mark up large pm4/5 constants with UL == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8823/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp: Rename the edp_sdp_header as dp_sdp_header
== Series Details == Series: drm/dp: Rename the edp_sdp_header as dp_sdp_header URL : https://patchwork.freedesktop.org/series/42363/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4106_full -> Patchwork_8819_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8819_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8819_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42363/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8819_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-render: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_8819_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3-devices: shard-hsw: PASS -> DMESG-WARN (fdo#106086) igt@kms_cursor_legacy@flip-vs-cursor-legacy: shard-hsw: PASS -> FAIL (fdo#102670) igt@kms_flip@2x-dpms-vs-vblank-race-interruptible: shard-hsw: PASS -> FAIL (fdo#103060) igt@kms_flip@basic-flip-vs-wf_vblank: shard-hsw: PASS -> FAIL (fdo#103928) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: PASS -> FAIL (fdo#102887, fdo#105363) igt@kms_flip@plain-flip-fb-recreate-interruptible: shard-hsw: PASS -> FAIL (fdo#100368) igt@kms_flip@wf_vblank-ts-check-interruptible: shard-apl: PASS -> FAIL (fdo#100368) igt@pm_rpm@universal-planes-dpms: shard-kbl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +7 Possible fixes igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-glk: DMESG-WARN (fdo#106247) -> PASS igt@kms_rotation_crc@primary-rotation-180: shard-hsw: FAIL (fdo#103925) -> PASS igt@kms_vblank@pipe-a-accuracy-idle: shard-hsw: FAIL (fdo#102583) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583 fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106086 https://bugs.freedesktop.org/show_bug.cgi?id=106086 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 == Participating hosts (9 -> 5) == Missing(4): shard-glkb pig-skl-6600 pig-glk-j4005 pig-hsw-4770r == Build changes == * Linux: CI_DRM_4106 -> Patchwork_8819 CI_DRM_4106: dd4a65248ce636039848b97f0b8e4704aa2f32b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8819: 031193daa609e6a5e124b1413dc736583c0dd58b @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8819/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/7] drm/i915: Stop tracking timeline->inflight_seqnos
On 26/04/2018 18:49, Chris Wilson wrote:
In commit 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine"), we
moved from a global inflight counter to per-engine counters in the
hope that will be easy to run concurrently in future. However, with the
advent of the desire to move requests between engines, we do need a
global counter to preserve the semantics that no engine wraps in the
middle of a submit. (Although this semantic is now only required for gen7
semaphore support, which only supports greater-then comparisons!)
v2: Keep a global counter of all requests ever submitted and force the
reset when it wraps.
References: 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 5 ++--
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem_timeline.h | 6 -
drivers/gpu/drm/i915/i915_request.c | 33
drivers/gpu/drm/i915/intel_engine_cs.c | 5 ++--
5 files changed, 22 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 1c88805d3354..83c86257fe1c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1340,10 +1340,9 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
struct rb_node *rb;
seq_printf(m, "%s:\n", engine->name);
- seq_printf(m, "\tseqno = %x [current %x, last %x], inflight
%d\n",
+ seq_printf(m, "\tseqno = %x [current %x, last %x]\n",
engine->hangcheck.seqno, seqno[id],
- intel_engine_last_submit(engine),
- engine->timeline->inflight_seqnos);
+ intel_engine_last_submit(engine));
seq_printf(m, "\twaiters? %s, fake irq active? %s, stalled?
%s\n",
yesno(intel_engine_has_waiter(engine)),
yesno(test_bit(engine->id,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8444ca8d5aa3..8fd9fb6efba5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2061,6 +2061,7 @@ struct drm_i915_private {
struct list_head timelines;
struct i915_gem_timeline global_timeline;
u32 active_requests;
+ u32 request_serial;
/**
* Is the GPU currently considered idle, or busy executing
diff --git a/drivers/gpu/drm/i915/i915_gem_timeline.h
b/drivers/gpu/drm/i915/i915_gem_timeline.h
index 33e01bf6aa36..6e82119e2cd8 100644
--- a/drivers/gpu/drm/i915/i915_gem_timeline.h
+++ b/drivers/gpu/drm/i915/i915_gem_timeline.h
@@ -37,12 +37,6 @@ struct intel_timeline {
u64 fence_context;
u32 seqno;
- /**
-* Count of outstanding requests, from the time they are constructed
-* to the moment they are retired. Loosely coupled to hardware.
-*/
- u32 inflight_seqnos;
-
spinlock_t lock;
/**
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index b692a9f7c357..b1993d4a1a53 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -241,6 +241,7 @@ static int reset_all_global_seqno(struct drm_i915_private
*i915, u32 seqno)
sizeof(timeline->engine[id].global_sync));
}
+ i915->gt.request_serial = seqno;
return 0;
}
@@ -257,18 +258,22 @@ int i915_gem_set_global_seqno(struct drm_device *dev, u32 seqno)
return reset_all_global_seqno(i915, seqno - 1);
}
-static int reserve_engine(struct intel_engine_cs *engine)
+static int reserve_gt(struct drm_i915_private *i915)
{
- struct drm_i915_private *i915 = engine->i915;
- u32 active = ++engine->timeline->inflight_seqnos;
- u32 seqno = engine->timeline->seqno;
int ret;
- /* Reservation is fine until we need to wrap around */
- if (unlikely(add_overflows(seqno, active))) {
+ /*
+* Reservation is fine until we may need to wrap around
+*
+* By incrementing the serial for every request, we know that no
+* individual engine may exceed that serial (as each is reset to 0
+* on any wrap). This protects even the most pessimistic of migrations
+* of every request from all engines onto just one.
+*/
+ while (unlikely(++i915->gt.request_serial == 0)) {
ret = reset_all_global_seqno(i915, 0);
if (ret) {
- engine->timeline->inflight_seqnos--;
+ i915->gt.request_serial--;
return ret;
}
}
@@ -279,15 +284,10 @@ static int reserve_engine(struct intel_engine_cs *engine)
return 0;
}
-static void unreserve_engine(struct
[Intel-gfx] [PATCH v12 04/10] drm/edid: Don't send bogus aspect ratios in AVI infoframes
From: Ville Syrjälä
If the user mode would specify an aspect ratio other than 4:3 or 16:9
we now silently ignore it. Maybe a better apporoach is to return an
error? Let's try that.
Also we must be careful that we don't try to send illegal picture
aspect in the infoframe as it's only capable of signalling none,
4:3, and 16:9. Currently we're sending these bogus infoframes
whenever the cea mode specifies some other aspect ratio.
Cc: Shashank Sharma
Cc: Sean Paul
Cc: Jose Abreu
Cc: Daniel Vetter
Cc: Emil Velikov
Signed-off-by: Ville Syrjälä
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/drm_edid.c | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 3f157c8..40e1e24 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4833,6 +4833,7 @@ drm_hdmi_avi_infoframe_from_display_mode(struct
hdmi_avi_infoframe *frame,
const struct drm_display_mode *mode,
bool is_hdmi2_sink)
{
+ enum hdmi_picture_aspect picture_aspect;
int err;
if (!frame || !mode)
@@ -4875,13 +4876,23 @@ drm_hdmi_avi_infoframe_from_display_mode(struct
hdmi_avi_infoframe *frame,
* Populate picture aspect ratio from either
* user input (if specified) or from the CEA mode list.
*/
- if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
- mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
- frame->picture_aspect = mode->picture_aspect_ratio;
- else if (frame->video_code > 0)
- frame->picture_aspect = drm_get_cea_aspect_ratio(
- frame->video_code);
+ picture_aspect = mode->picture_aspect_ratio;
+ if (picture_aspect == HDMI_PICTURE_ASPECT_NONE)
+ picture_aspect = drm_get_cea_aspect_ratio(frame->video_code);
+ /*
+* The infoframe can't convey anything but none, 4:3
+* and 16:9, so if the user has asked for anything else
+* we can only satisfy it by specifying the right VIC.
+*/
+ if (picture_aspect > HDMI_PICTURE_ASPECT_16_9) {
+ if (picture_aspect !=
+ drm_get_cea_aspect_ratio(frame->video_code))
+ return -EINVAL;
+ picture_aspect = HDMI_PICTURE_ASPECT_NONE;
+ }
+
+ frame->picture_aspect = picture_aspect;
frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
--
2.7.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v12 07/10] drm: Handle aspect ratio info in legacy modeset path
From: Ankit Nautiyal
If the user-space does not support aspect-ratio, and requests for a
modeset with mode having aspect ratio bits set, then the given
user-mode must be rejected. Secondly, while preparing a user-mode from
kernel mode, the aspect-ratio info must not be given, if aspect-ratio
is not supported by the user.
This patch:
1. rejects the modes with aspect-ratio info, during modeset, if the
user does not support aspect ratio.
2. does not load the aspect-ratio info in user-mode structure, if
aspect ratio is not supported.
3. adds helper functions for determining if aspect-ratio is expected
in user-mode and for allowing/disallowing the aspect-ratio, if its
not expected.
Signed-off-by: Ankit Nautiyal
V3: Addressed review comments from Ville:
Do not corrupt the current crtc state by updating aspect-ratio on
the fly.
V4: rebase
V5: As suggested by Ville, rejected the modeset calls for modes with
aspect ratio, if the user does not set aspect-ratio cap.
V6: Used the helper functions for determining if aspect-ratio is
expected in the user-mode.
V7: rebase
V8: rebase
V9: rebase
v10: Modified the commit-message
v11: rebase
v12: Merged the patch for adding aspect-ratio helper functions
with this patch.
---
drivers/gpu/drm/drm_crtc.c | 8
drivers/gpu/drm/drm_modes.c | 45 +
include/drm/drm_modes.h | 4
3 files changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index a231dd5..98323f4 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -449,6 +449,7 @@ int drm_mode_getcrtc(struct drm_device *dev,
crtc_resp->mode_valid = 0;
}
}
+ drm_mode_filter_aspect_ratio_flags(file_priv, &crtc_resp->mode);
drm_modeset_unlock(&crtc->mutex);
return 0;
@@ -628,6 +629,13 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
ret = -ENOMEM;
goto out;
}
+ if (!drm_mode_aspect_ratio_allowed(file_priv,
+ &crtc_req->mode)) {
+ DRM_DEBUG_KMS("Unexpected aspect-ratio flag bits\n");
+ ret = -EINVAL;
+ goto out;
+ }
+
ret = drm_mode_convert_umode(dev, mode, &crtc_req->mode);
if (ret) {
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index c395a24..d6f68c8 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1759,3 +1759,48 @@ bool drm_mode_is_420(const struct drm_display_info
*display,
drm_mode_is_420_also(display, mode);
}
EXPORT_SYMBOL(drm_mode_is_420);
+
+/**
+ * drm_mode_aspect_ratio_allowed - checks if the aspect-ratio information
+ * is expected from the user-mode.
+ *
+ * If the user has set aspect-ratio cap, then the flag of the user-mode is
+ * allowed to contain aspect-ratio value.
+ * If the user does not set aspect-ratio cap, then the only value allowed in
the
+ * flags bits is aspect-ratio NONE.
+ *
+ * @file_priv: file private structure to get the user capabilities
+ * @umode: drm_mode_modeinfo struct, whose flag carry the aspect ratio
+ * information.
+ *
+ * Returns:
+ * true if the aspect-ratio info is allowed in the user-mode flags.
+ * false, otherwise.
+ */
+bool
+drm_mode_aspect_ratio_allowed(const struct drm_file *file_priv,
+ struct drm_mode_modeinfo *umode)
+{
+ return file_priv->aspect_ratio_allowed || (umode->flags &
+ DRM_MODE_FLAG_PIC_AR_MASK) == DRM_MODE_FLAG_PIC_AR_NONE;
+}
+
+/**
+ * drm_mode_filter_aspect_ratio_flags - filters the aspect-ratio bits in the
+ * user-mode flags.
+ *
+ * Checks if the aspect-ratio information is allowed. Resets the aspect-ratio
+ * bits in the user-mode flags, if aspect-ratio info is not allowed.
+ *
+ * @file_priv: file private structure to get the user capabilities.
+ * @umode: drm_mode_modeinfo struct, whose flags' aspect-ratio bits needs to
+ * be filtered.
+ *
+ */
+void
+drm_mode_filter_aspect_ratio_flags(const struct drm_file *file_priv,
+ struct drm_mode_modeinfo *umode)
+{
+ if (!drm_mode_aspect_ratio_allowed(file_priv, umode))
+ umode->flags &= ~DRM_MODE_FLAG_PIC_AR_MASK;
+}
diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index 2f78b7e..e0b060d 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -461,6 +461,10 @@ bool drm_mode_is_420_also(const struct drm_display_info
*display,
const struct drm_display_mode *mode);
bool drm_mode_is_420(const struct drm_display_info *display,
const struct drm_display_mode *mode);
+bool drm_mode_aspect_ratio_allowed(const struct drm_file *file_priv,
+ struct drm_mode_modein
[Intel-gfx] [PATCH v12 02/10] drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy
From: Ville Syrjälä Use drm_mode_equal_no_clocks_no_stereo() in drm_match_hdmi_mode_clock_tolerance() for consistency as we also use it in drm_match_hdmi_mode() and the cea mode matching functions. This doesn't actually change anything since the input mode comes from detailed timings and we match it against edid_4k_modes[] which. So none of those modes can have stereo flags set. Signed-off-by: Ville Syrjälä Reviewed-by: Shashank Sharma --- drivers/gpu/drm/drm_edid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 08d33b4..5475f31 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3047,7 +3047,7 @@ static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_ abs(to_match->clock - clock2) > clock_tolerance) continue; - if (drm_mode_equal_no_clocks(to_match, hdmi_mode)) + if (drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode)) return vic; } -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v12 03/10] drm/edid: Fix cea mode aspect ratio handling
From: Ville Syrjälä
commit 6dffd431e229 ("drm: Add aspect ratio parsing in DRM layer")
cause us to not send out any VICs in the AVI infoframes. That commit
was since reverted, but if and when we add aspect ratio handing back
we need to be more careful.
Let's handle this by considering the aspect ratio as a requirement
for cea mode matching only if the passed in mode actually has a
non-zero aspect ratio field. This will keep userspace that doesn't
provide an aspect ratio working as before by matching it to the
first otherwise equal cea mode. And once userspace starts to
provide the aspect ratio it will be considerd a hard requirement
for the match.
Also change the hdmi mode matching to use drm_mode_match() for
consistency, but we don't match on aspect ratio there since the
spec doesn't list a specific aspect ratio for those modes.
Cc: Shashank Sharma
Cc: "Lin, Jia"
Cc: Akashdeep Sharma
Cc: Jim Bride
Cc: Jose Abreu
Cc: Daniel Vetter
Cc: Emil Velikov
Signed-off-by: Ville Syrjälä
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/drm_edid.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 5475f31..3f157c8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2930,11 +2930,15 @@ cea_mode_alternate_timings(u8 vic, struct
drm_display_mode *mode)
static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode
*to_match,
unsigned int clock_tolerance)
{
+ unsigned int match_flags = DRM_MODE_MATCH_TIMINGS |
DRM_MODE_MATCH_FLAGS;
u8 vic;
if (!to_match->clock)
return 0;
+ if (to_match->picture_aspect_ratio)
+ match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
+
for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
struct drm_display_mode cea_mode = edid_cea_modes[vic];
unsigned int clock1, clock2;
@@ -2948,7 +2952,7 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct
drm_display_mode *to_m
continue;
do {
- if (drm_mode_equal_no_clocks_no_stereo(to_match,
&cea_mode))
+ if (drm_mode_match(to_match, &cea_mode, match_flags))
return vic;
} while (cea_mode_alternate_timings(vic, &cea_mode));
}
@@ -2965,11 +2969,15 @@ static u8 drm_match_cea_mode_clock_tolerance(const
struct drm_display_mode *to_m
*/
u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
{
+ unsigned int match_flags = DRM_MODE_MATCH_TIMINGS |
DRM_MODE_MATCH_FLAGS;
u8 vic;
if (!to_match->clock)
return 0;
+ if (to_match->picture_aspect_ratio)
+ match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
+
for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
struct drm_display_mode cea_mode = edid_cea_modes[vic];
unsigned int clock1, clock2;
@@ -2983,7 +2991,7 @@ u8 drm_match_cea_mode(const struct drm_display_mode
*to_match)
continue;
do {
- if (drm_mode_equal_no_clocks_no_stereo(to_match,
&cea_mode))
+ if (drm_mode_match(to_match, &cea_mode, match_flags))
return vic;
} while (cea_mode_alternate_timings(vic, &cea_mode));
}
@@ -3030,6 +3038,7 @@ hdmi_mode_alternate_clock(const struct drm_display_mode
*hdmi_mode)
static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode
*to_match,
unsigned int clock_tolerance)
{
+ unsigned int match_flags = DRM_MODE_MATCH_TIMINGS |
DRM_MODE_MATCH_FLAGS;
u8 vic;
if (!to_match->clock)
@@ -3047,7 +3056,7 @@ static u8 drm_match_hdmi_mode_clock_tolerance(const
struct drm_display_mode *to_
abs(to_match->clock - clock2) > clock_tolerance)
continue;
- if (drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
+ if (drm_mode_match(to_match, hdmi_mode, match_flags))
return vic;
}
@@ -3064,6 +3073,7 @@ static u8 drm_match_hdmi_mode_clock_tolerance(const
struct drm_display_mode *to_
*/
static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
{
+ unsigned int match_flags = DRM_MODE_MATCH_TIMINGS |
DRM_MODE_MATCH_FLAGS;
u8 vic;
if (!to_match->clock)
@@ -3079,7 +3089,7 @@ static u8 drm_match_hdmi_mode(const struct
drm_display_mode *to_match)
if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
- drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
+ drm_mode_match(to_match, hdmi_mode, m
[Intel-gfx] [PATCH v12 01/10] drm/modes: Introduce drm_mode_match()
From: Ville Syrjälä
Make mode matching less confusing by allowing the caller to specify
which parts of the modes should match via some flags.
Signed-off-by: Ville Syrjälä
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/drm_modes.c | 134 ++--
include/drm/drm_modes.h | 9 +++
2 files changed, 112 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index e82b61e..c395a24 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -939,17 +939,68 @@ struct drm_display_mode *drm_mode_duplicate(struct
drm_device *dev,
}
EXPORT_SYMBOL(drm_mode_duplicate);
+static bool drm_mode_match_timings(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ return mode1->hdisplay == mode2->hdisplay &&
+ mode1->hsync_start == mode2->hsync_start &&
+ mode1->hsync_end == mode2->hsync_end &&
+ mode1->htotal == mode2->htotal &&
+ mode1->hskew == mode2->hskew &&
+ mode1->vdisplay == mode2->vdisplay &&
+ mode1->vsync_start == mode2->vsync_start &&
+ mode1->vsync_end == mode2->vsync_end &&
+ mode1->vtotal == mode2->vtotal &&
+ mode1->vscan == mode2->vscan;
+}
+
+static bool drm_mode_match_clock(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ /*
+* do clock check convert to PICOS
+* so fb modes get matched the same
+*/
+ if (mode1->clock && mode2->clock)
+ return KHZ2PICOS(mode1->clock) == KHZ2PICOS(mode2->clock);
+ else
+ return mode1->clock == mode2->clock;
+}
+
+static bool drm_mode_match_flags(const struct drm_display_mode *mode1,
+const struct drm_display_mode *mode2)
+{
+ return (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
+ (mode2->flags & ~DRM_MODE_FLAG_3D_MASK);
+}
+
+static bool drm_mode_match_3d_flags(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ return (mode1->flags & DRM_MODE_FLAG_3D_MASK) ==
+ (mode2->flags & DRM_MODE_FLAG_3D_MASK);
+}
+
+static bool drm_mode_match_aspect_ratio(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ return mode1->picture_aspect_ratio == mode2->picture_aspect_ratio;
+}
+
/**
- * drm_mode_equal - test modes for equality
+ * drm_mode_match - test modes for (partial) equality
* @mode1: first mode
* @mode2: second mode
+ * @match_flags: which parts need to match (DRM_MODE_MATCH_*)
*
* Check to see if @mode1 and @mode2 are equivalent.
*
* Returns:
- * True if the modes are equal, false otherwise.
+ * True if the modes are (partially) equal, false otherwise.
*/
-bool drm_mode_equal(const struct drm_display_mode *mode1, const struct
drm_display_mode *mode2)
+bool drm_mode_match(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2,
+ unsigned int match_flags)
{
if (!mode1 && !mode2)
return true;
@@ -957,15 +1008,48 @@ bool drm_mode_equal(const struct drm_display_mode
*mode1, const struct drm_displ
if (!mode1 || !mode2)
return false;
- /* do clock check convert to PICOS so fb modes get matched
-* the same */
- if (mode1->clock && mode2->clock) {
- if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
- return false;
- } else if (mode1->clock != mode2->clock)
+ if (match_flags & DRM_MODE_MATCH_TIMINGS &&
+ !drm_mode_match_timings(mode1, mode2))
return false;
- return drm_mode_equal_no_clocks(mode1, mode2);
+ if (match_flags & DRM_MODE_MATCH_CLOCK &&
+ !drm_mode_match_clock(mode1, mode2))
+ return false;
+
+ if (match_flags & DRM_MODE_MATCH_FLAGS &&
+ !drm_mode_match_flags(mode1, mode2))
+ return false;
+
+ if (match_flags & DRM_MODE_MATCH_3D_FLAGS &&
+ !drm_mode_match_3d_flags(mode1, mode2))
+ return false;
+
+ if (match_flags & DRM_MODE_MATCH_ASPECT_RATIO &&
+ !drm_mode_match_aspect_ratio(mode1, mode2))
+ return false;
+
+ return true;
+}
+EXPORT_SYMBOL(drm_mode_match);
+
+/**
+ * drm_mode_equal - test modes for equality
+ * @mode1: first mode
+ * @mode2: second mode
+ *
+ * Check to see if @mode1 and @mode2 are equivalent.
+ *
+ * Returns:
+ * True if the modes are equal, false otherwise.
+ */
+bool drm_mode_equal(const struct drm_display_mode *mode1,
+ const struct drm_display_mode *mode2)
+{
+ return drm_mode_match(mode1, mode2,
+ DRM_
[Intel-gfx] [PATCH v12 00/10] Aspect ratio support in DRM layer
From: Ankit Nautiyal This patch series is a re-attempt to enable aspect ratio support in DRM layer. Currently the aspect ratio information gets lost in translation during a user->kernel mode or vice versa. The old patch series (https://pw-emeril.freedesktop.org/series/10850/) had 4 patches, out of which 2 patches were reverted due to lack of drm client protection while loading the aspect information. This patch series also includes 5 patches from Ville Syrjälä's series for 'Info-frame cleanup and fixes': https://patchwork.freedesktop.org/series/33730/ which fixes the mode matching mechanism via flags, and also ensures that no bogus aspect-ratios are sent in the AVI infoframes. This patch series, adds a DRM client option for aspect ratio, and loads aspect ratio flags, only when the client sets this cap. To test this patch, the testdiplay IGT test is modified to have an option to do a modeset with only aspect ratio modes. Also, there is a userspace implementation in Wayland/weston layer: https://patchwork.freedesktop.org/patch/188125/ (Which is already ACK'ed by wayland community.) This, helps us in passing HDMI compliance test cases like 7-27, where the test equipment applies a CEA mode, and expects the exact VIC in the AVI infoframes. Ankit Nautiyal (3): drm: Add DRM client cap for aspect-ratio drm: Handle aspect ratio info in legacy modeset path drm: Expose modes with aspect ratio, only if requested Sharma, Shashank (2): drm: Add aspect ratio parsing in DRM layer drm: Add and handle new aspect ratios in DRM layer Ville Syrjälä (5): drm/modes: Introduce drm_mode_match() drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy drm/edid: Fix cea mode aspect ratio handling drm/edid: Don't send bogus aspect ratios in AVI infoframes video/hdmi: Reject illegal picture aspect ratios drivers/gpu/drm/drm_connector.c | 52 -- drivers/gpu/drm/drm_crtc.c | 8 ++ drivers/gpu/drm/drm_edid.c | 41 ++-- drivers/gpu/drm/drm_fb_helper.c | 12 ++- drivers/gpu/drm/drm_ioctl.c | 9 ++ drivers/gpu/drm/drm_modes.c | 224 ++-- drivers/video/hdmi.c| 3 + include/drm/drm_file.h | 8 ++ include/drm/drm_modes.h | 22 include/uapi/drm/drm.h | 7 ++ include/uapi/drm/drm_mode.h | 6 ++ 11 files changed, 341 insertions(+), 51 deletions(-) -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v12 10/10] drm: Add and handle new aspect ratios in DRM layer
From: "Sharma, Shashank"
HDMI 2.0/CEA-861-F introduces two new aspect ratios:
- 64:27
- 256:135
This patch:
- Adds new DRM flags for to represent these new aspect ratios.
- Adds new cases to handle these aspect ratios while converting
from user->kernel mode or vise versa.
This patch was once reviewed and merged, and later reverted due
to lack of DRM client protection, while adding aspect ratio bits
in user modes. This is a re-spin of the series, with DRM client
cap protection.
The previous series can be found here:
https://pw-emeril.freedesktop.org/series/10850/
Signed-off-by: Shashank Sharma
Reviewed-by: Sean Paul (V2)
Reviewed-by: Jose Abreu (V2)
Cc: Ville Syrjala
Cc: Sean Paul
Cc: Jose Abreu
Cc: Ankit Nautiyal
V3: rebase
V4: rebase
V5: corrected the macro name for an aspect ratio, in a switch case.
V6: rebase
V7: rebase
V8: rebase
V9: rebase
V10: rebase
V11: rebase
V12: rebase
---
drivers/gpu/drm/drm_modes.c | 12
include/uapi/drm/drm_mode.h | 6 ++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 17a1667..4a04851 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1656,6 +1656,12 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo
*out,
case HDMI_PICTURE_ASPECT_16_9:
out->flags |= DRM_MODE_FLAG_PIC_AR_16_9;
break;
+ case HDMI_PICTURE_ASPECT_64_27:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_64_27;
+ break;
+ case HDMI_PICTURE_ASPECT_256_135:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_256_135;
+ break;
case HDMI_PICTURE_ASPECT_RESERVED:
default:
out->flags |= DRM_MODE_FLAG_PIC_AR_NONE;
@@ -1721,6 +1727,12 @@ int drm_mode_convert_umode(struct drm_device *dev,
case DRM_MODE_FLAG_PIC_AR_16_9:
out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_16_9;
break;
+ case DRM_MODE_FLAG_PIC_AR_64_27:
+ out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_64_27;
+ break;
+ case DRM_MODE_FLAG_PIC_AR_256_135:
+ out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_256_135;
+ break;
default:
out->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
break;
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 50bcf42..4b3a1bb 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -93,6 +93,8 @@ extern "C" {
#define DRM_MODE_PICTURE_ASPECT_NONE 0
#define DRM_MODE_PICTURE_ASPECT_4_31
#define DRM_MODE_PICTURE_ASPECT_16_9 2
+#define DRM_MODE_PICTURE_ASPECT_64_27 3
+#define DRM_MODE_PICTURE_ASPECT_256_1354
/* Aspect ratio flag bitmask (4 bits 22:19) */
#define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19)
@@ -102,6 +104,10 @@ extern "C" {
(DRM_MODE_PICTURE_ASPECT_4_3<<19)
#define DRM_MODE_FLAG_PIC_AR_16_9 \
(DRM_MODE_PICTURE_ASPECT_16_9<<19)
+#define DRM_MODE_FLAG_PIC_AR_64_27 \
+ (DRM_MODE_PICTURE_ASPECT_64_27<<19)
+#define DRM_MODE_FLAG_PIC_AR_256_135 \
+ (DRM_MODE_PICTURE_ASPECT_256_135<<19)
#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \
DRM_MODE_FLAG_NHSYNC | \
--
2.7.4
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[Intel-gfx] [PATCH v12 09/10] drm: Add aspect ratio parsing in DRM layer
From: "Sharma, Shashank"
Current DRM layer functions don't parse aspect ratio information
while converting a user mode->kernel mode or vice versa. This
causes modeset to pick mode with wrong aspect ratio, eventually
causing failures in HDMI compliance test cases, due to wrong VIC.
This patch adds aspect ratio information in DRM's mode conversion
and mode comparision functions, to make sure kernel picks mode
with right aspect ratio (as per the VIC).
Background:
This patch was once reviewed and merged, and later reverted due to
lack of DRM cap protection. This is a re-spin of this patch, this
time with DRM cap protection, to avoid aspect ratio information, when
the client doesn't request for it.
Review link: https://pw-emeril.freedesktop.org/patch/104068/
Background discussion: https://patchwork.kernel.org/patch/9379057/
Signed-off-by: Shashank Sharma
Signed-off-by: Lin, Jia
Signed-off-by: Akashdeep Sharma
Reviewed-by: Jim Bride (V2)
Reviewed-by: Jose Abreu (V4)
Cc: Ville Syrjala
Cc: Jim Bride
Cc: Jose Abreu
Cc: Ankit Nautiyal
V3: modified the aspect-ratio check in drm_mode_equal as per new flags
provided by Ville. https://patchwork.freedesktop.org/patch/188043/
V4: rebase
V5: rebase
V6: As recommended by Ville, avoided matching of aspect-ratio in
drm_fb_helper, while trying to find a common mode among connectors
for the target clone mode.
V7: rebase
V8: rebase
V9: rebase
V10: rebase
V11: rebase
V12: rebase
---
drivers/gpu/drm/drm_fb_helper.c | 12 ++--
drivers/gpu/drm/drm_modes.c | 35 ++-
2 files changed, 44 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 0646b10..2ee1eaa 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -2183,7 +2183,11 @@ static bool drm_target_cloned(struct drm_fb_helper
*fb_helper,
for (j = 0; j < i; j++) {
if (!enabled[j])
continue;
- if (!drm_mode_equal(modes[j], modes[i]))
+ if (!drm_mode_match(modes[j], modes[i],
+ DRM_MODE_MATCH_TIMINGS |
+ DRM_MODE_MATCH_CLOCK |
+ DRM_MODE_MATCH_FLAGS |
+ DRM_MODE_MATCH_3D_FLAGS))
can_clone = false;
}
}
@@ -2203,7 +2207,11 @@ static bool drm_target_cloned(struct drm_fb_helper
*fb_helper,
fb_helper_conn = fb_helper->connector_info[i];
list_for_each_entry(mode, &fb_helper_conn->connector->modes,
head) {
- if (drm_mode_equal(mode, dmt_mode))
+ if (drm_mode_match(mode, dmt_mode,
+ DRM_MODE_MATCH_TIMINGS |
+ DRM_MODE_MATCH_CLOCK |
+ DRM_MODE_MATCH_FLAGS |
+ DRM_MODE_MATCH_3D_FLAGS))
modes[i] = mode;
}
if (!modes[i])
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index d6f68c8..17a1667 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1049,7 +1049,8 @@ bool drm_mode_equal(const struct drm_display_mode *mode1,
DRM_MODE_MATCH_TIMINGS |
DRM_MODE_MATCH_CLOCK |
DRM_MODE_MATCH_FLAGS |
- DRM_MODE_MATCH_3D_FLAGS);
+ DRM_MODE_MATCH_3D_FLAGS|
+ DRM_MODE_MATCH_ASPECT_RATIO);
}
EXPORT_SYMBOL(drm_mode_equal);
@@ -1647,6 +1648,20 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo
*out,
out->vrefresh = in->vrefresh;
out->flags = in->flags;
out->type = in->type;
+
+ switch (in->picture_aspect_ratio) {
+ case HDMI_PICTURE_ASPECT_4_3:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_4_3;
+ break;
+ case HDMI_PICTURE_ASPECT_16_9:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_16_9;
+ break;
+ case HDMI_PICTURE_ASPECT_RESERVED:
+ default:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_NONE;
+ break;
+ }
+
strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
}
@@ -1693,6 +1708,24 @@ int drm_mode_convert_umode(struct drm_device *dev,
strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
+ /* Clearing picture aspect ratio bits from out flags,
+* as the aspect-ratio information is not stored in
+* flags for kernel-mode, but in picture_aspect_ratio.
+*/
+ out->flags &= ~DRM_MOD
[Intel-gfx] [PATCH v12 05/10] video/hdmi: Reject illegal picture aspect ratios
From: Ville Syrjälä AVI infoframe can only carry none, 4:3, or 16:9 picture aspect ratios. Return an error if the user asked for something different. Cc: Shashank Sharma Cc: "Lin, Jia" Cc: Akashdeep Sharma Cc: Jim Bride Cc: Jose Abreu Cc: Daniel Vetter Cc: Emil Velikov Cc: Thierry Reding Cc: Hans Verkuil Cc: linux-me...@vger.kernel.org Signed-off-by: Ville Syrjälä Reviewed-by: Jose Abreu --- drivers/video/hdmi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c index 111a0ab..38716eb5 100644 --- a/drivers/video/hdmi.c +++ b/drivers/video/hdmi.c @@ -93,6 +93,9 @@ ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer, if (size < length) return -ENOSPC; + if (frame->picture_aspect > HDMI_PICTURE_ASPECT_16_9) + return -EINVAL; + memset(buffer, 0, size); ptr[0] = frame->type; -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v12 08/10] drm: Expose modes with aspect ratio, only if requested
From: Ankit Nautiyal
We parse the EDID and add all the modes in the connector's modelist.
This adds CEA modes with aspect ratio information too, regadless of
whether user space requested this information or not.
This patch prunes the modes with aspect-ratio information, from a
connector's modelist, if the user-space has not set the aspect ratio
DRM client cap. However if such a mode is unique in the list, it is
kept in the list, with aspect-ratio flags reset.
Cc: Ville Syrjala
Cc: Shashank Sharma
Cc: Jose Abreu
Signed-off-by: Ankit Nautiyal
V3: As suggested by Ville, modified the mechanism of pruning of modes
with aspect-ratio, if the aspect-ratio is not supported. Instead
of straight away pruning such a mode, the mode is retained with
aspect ratio bits set to zero, provided it is unique.
V4: rebase
V5: Addressed review comments from Ville:
-used a pointer to store last valid mode.
-avoided, modifying of picture_aspect_ratio in kernel mode,
instead only flags bits of user mode are reset (if aspect-ratio
is not supported).
V6: As suggested by Ville, corrected the mode pruning logic and
elaborated the mode pruning logic and the assumptions taken.
V7: rebase
V8: rebase
V9: rebase
V10: rebase
V11: Fixed the issue caused in kms_3d test, and enhanced the pruning
logic to correctly identify and prune modes with aspect-ratio,
if aspect-ratio cap is not set.
V12: As suggested by Ville, added another list_head in
drm_mode_display to traverse the list of exposed modes and
avoided duplication of modes.
---
drivers/gpu/drm/drm_connector.c | 52 ++---
include/drm/drm_modes.h | 9 +++
2 files changed, 53 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index b3cde89..e12964b 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1531,15 +1531,35 @@ static struct drm_encoder
*drm_connector_get_encoder(struct drm_connector *conne
return connector->encoder;
}
-static bool drm_mode_expose_to_userspace(const struct drm_display_mode *mode,
-const struct drm_file *file_priv)
+static bool
+drm_mode_expose_to_userspace(const struct drm_display_mode *mode,
+const struct list_head *modelist,
+const struct drm_file *file_priv)
{
/*
* If user-space hasn't configured the driver to expose the stereo 3D
* modes, don't expose them.
*/
+ struct drm_display_mode *mode_itr;
+
if (!file_priv->stereo_allowed && drm_mode_is_stereo(mode))
return false;
+ /*
+* If user-space hasn't configured the driver to expose the modes
+* with aspect-ratio, don't expose them. However if such a mode
+* is unique, let it be exposed, but reset the aspect-ratio flags
+* while preparing the list of user-modes.
+*/
+ if (!file_priv->aspect_ratio_allowed &&
+ mode->picture_aspect_ratio != HDMI_PICTURE_ASPECT_NONE) {
+ list_for_each_entry(mode_itr, modelist, exp_head)
+ if (drm_mode_match(mode_itr, mode,
+ DRM_MODE_MATCH_TIMINGS |
+ DRM_MODE_MATCH_CLOCK |
+ DRM_MODE_MATCH_FLAGS |
+ DRM_MODE_MATCH_3D_FLAGS))
+ return false;
+ }
return true;
}
@@ -1550,7 +1570,8 @@ int drm_mode_getconnector(struct drm_device *dev, void
*data,
struct drm_mode_get_connector *out_resp = data;
struct drm_connector *connector;
struct drm_encoder *encoder;
- struct drm_display_mode *mode;
+ struct drm_display_mode *mode, *tmp;
+ struct list_head modelist;
int mode_count = 0;
int encoders_count = 0;
int ret = 0;
@@ -1605,23 +1626,34 @@ int drm_mode_getconnector(struct drm_device *dev, void
*data,
out_resp->subpixel = connector->display_info.subpixel_order;
out_resp->connection = connector->status;
+ INIT_LIST_HEAD(&modelist);
+
/* delayed so we get modes regardless of pre-fill_modes state */
list_for_each_entry(mode, &connector->modes, head)
- if (drm_mode_expose_to_userspace(mode, file_priv))
+ if (drm_mode_expose_to_userspace(mode, &modelist,
+file_priv)) {
+ list_add_tail(&mode->exp_head, &modelist);
mode_count++;
+ }
/*
* This ioctl is called twice, once to determine how much space is
* needed, and the 2nd time to fill it.
+* The modes that need to be exposed to the user are maintained in the
+* 'modelist'. When the ioctl is cal
[Intel-gfx] [PATCH v12 06/10] drm: Add DRM client cap for aspect-ratio
From: Ankit Nautiyal
To enable aspect-ratio support in DRM, blindly exposing the aspect
ratio information along with mode, can break things in existing
non-atomic user-spaces which have no intention or support to use this
aspect ratio information.
To avoid this, a new drm client cap is required to enable a non-atomic
user-space to advertise if it supports modes with aspect-ratio. Based
on this cap value, the kernel will take a call on exposing the aspect
ratio info in modes or not.
This patch adds the client cap for aspect-ratio.
Since no atomic-userspaces blow up on receiving aspect-ratio
information, the client cap for aspect-ratio is always enabled
for atomic clients.
Cc: Ville Syrjala
Cc: Shashank Sharma
Signed-off-by: Ankit Nautiyal
V3: rebase
V4: As suggested by Marteen Lankhorst modified the commit message
explaining the need to use the DRM cap for aspect-ratio. Also,
tweaked the comment lines in the code for better understanding and
clarity, as recommended by Shashank Sharma.
V5: rebase
V6: rebase
V7: rebase
V8: rebase
V9: rebase
V10: rebase
V11: rebase
v12: As suggested by Daniel Vetter and Ville Syrjala,
always enable aspect-ratio client cap for atomic userspaces,
if no atomic userspace breaks on aspect-ratio bits.
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/drm_ioctl.c | 9 +
include/drm/drm_file.h | 8
include/uapi/drm/drm.h | 7 +++
3 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index af78291..0379983 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -324,6 +324,15 @@ drm_setclientcap(struct drm_device *dev, void *data,
struct drm_file *file_priv)
return -EINVAL;
file_priv->atomic = req->value;
file_priv->universal_planes = req->value;
+ /*
+* No atomic user-space blows up on aspect ratio mode bits.
+*/
+ file_priv->aspect_ratio_allowed = req->value;
+ break;
+ case DRM_CLIENT_CAP_ASPECT_RATIO:
+ if (req->value > 1)
+ return -EINVAL;
+ file_priv->aspect_ratio_allowed = req->value;
break;
default:
return -EINVAL;
diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h
index 5176c37..02b7dde 100644
--- a/include/drm/drm_file.h
+++ b/include/drm/drm_file.h
@@ -182,6 +182,14 @@ struct drm_file {
unsigned atomic:1;
/**
+* @aspect_ratio_allowed:
+*
+* True, if client can handle picture aspect ratios, and has requested
+* to pass this information along with the mode.
+*/
+ unsigned aspect_ratio_allowed:1;
+
+ /**
* @is_master:
*
* This client is the creator of @master. Protected by struct
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 6fdff59..9c660e1 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -680,6 +680,13 @@ struct drm_get_cap {
*/
#define DRM_CLIENT_CAP_ATOMIC 3
+/**
+ * DRM_CLIENT_CAP_ASPECT_RATIO
+ *
+ * If set to 1, the DRM core will provide aspect ratio information in modes.
+ */
+#define DRM_CLIENT_CAP_ASPECT_RATIO4
+
/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
struct drm_set_client_cap {
__u64 capability;
--
2.7.4
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Re: [Intel-gfx] [PATCH 2/7] drm/i915: Wrap engine->context_pin() and engine->context_unpin()
On 26/04/2018 18:49, Chris Wilson wrote:
Make life easier in upcoming patches by moving the context_pin and
context_unpin vfuncs into inline helpers.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gvt/mmio_context.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.c | 20 ++---
drivers/gpu/drm/i915/i915_debugfs.c | 20 +++--
drivers/gpu/drm/i915/i915_gem.c | 4 +--
drivers/gpu/drm/i915/i915_gem_context.c | 8 +++---
drivers/gpu/drm/i915/i915_gem_context.h | 30 +++-
drivers/gpu/drm/i915/i915_gpu_error.c| 3 +-
drivers/gpu/drm/i915/i915_perf.c | 9 +++---
drivers/gpu/drm/i915/i915_request.c | 6 ++--
drivers/gpu/drm/i915/intel_engine_cs.c | 13 -
drivers/gpu/drm/i915/intel_guc_ads.c | 3 +-
drivers/gpu/drm/i915/intel_guc_submission.c | 5 ++--
drivers/gpu/drm/i915/intel_lrc.c | 29 +++
drivers/gpu/drm/i915/intel_lrc.h | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 19 +++--
drivers/gpu/drm/i915/selftests/mock_engine.c | 2 +-
16 files changed, 108 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c
b/drivers/gpu/drm/i915/gvt/mmio_context.c
index a5bac83d53a9..0f949554d118 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -448,7 +448,7 @@ static void switch_mocs(struct intel_vgpu *pre, struct
intel_vgpu *next,
bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id)
{
- u32 *reg_state = ctx->engine[ring_id].lrc_reg_state;
+ u32 *reg_state = ctx->__engine[ring_id].lrc_reg_state;
u32 inhibit_mask =
_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
index 35f7cfd7a6b4..ffb45a9ee228 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -58,7 +58,7 @@ static void update_shadow_pdps(struct intel_vgpu_workload
*workload)
int ring_id = workload->ring_id;
struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
struct drm_i915_gem_object *ctx_obj =
- shadow_ctx->engine[ring_id].state->obj;
+ shadow_ctx->__engine[ring_id].state->obj;
struct execlist_ring_context *shadow_ring_context;
struct page *page;
@@ -130,7 +130,7 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload)
int ring_id = workload->ring_id;
struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
struct drm_i915_gem_object *ctx_obj =
- shadow_ctx->engine[ring_id].state->obj;
+ shadow_ctx->__engine[ring_id].state->obj;
struct execlist_ring_context *shadow_ring_context;
struct page *page;
void *dst;
@@ -283,7 +283,7 @@ static int shadow_context_status_change(struct
notifier_block *nb,
static void shadow_context_descriptor_update(struct i915_gem_context *ctx,
struct intel_engine_cs *engine)
{
- struct intel_context *ce = &ctx->engine[engine->id];
+ struct intel_context *ce = to_intel_context(ctx, engine);
u64 desc = 0;
desc = ce->lrc_desc;
@@ -389,7 +389,7 @@ int intel_gvt_scan_and_shadow_workload(struct
intel_vgpu_workload *workload)
* shadow_ctx pages invalid. So gvt need to pin itself. After update
* the guest context, gvt can unpin the shadow_ctx safely.
*/
- ring = engine->context_pin(engine, shadow_ctx);
+ ring = intel_context_pin(shadow_ctx, engine);
if (IS_ERR(ring)) {
ret = PTR_ERR(ring);
gvt_vgpu_err("fail to pin shadow context\n");
@@ -403,7 +403,7 @@ int intel_gvt_scan_and_shadow_workload(struct
intel_vgpu_workload *workload)
return 0;
err_unpin:
- engine->context_unpin(engine, shadow_ctx);
+ intel_context_unpin(shadow_ctx, engine);
err_shadow:
release_shadow_wa_ctx(&workload->wa_ctx);
err_scan:
@@ -437,7 +437,7 @@ static int intel_gvt_generate_request(struct
intel_vgpu_workload *workload)
return 0;
err_unpin:
- engine->context_unpin(engine, shadow_ctx);
+ intel_context_unpin(shadow_ctx, engine);
release_shadow_wa_ctx(&workload->wa_ctx);
return ret;
}
@@ -526,7 +526,7 @@ static int update_wa_ctx_2_shadow_ctx(struct
intel_shadow_wa_ctx *wa_ctx)
struct intel_vgpu_submission *s = &workload->vgpu->submission;
struct i915_gem_context *shadow_ctx = s->shadow_ctx;
struct drm_i915_gem_object *ctx_obj =
- shadow_ctx->engine[ring_id].state->obj;
+ shadow_ctx->__engine[ring_id].state->obj;
struct execlist_ring_context *shadow_ring_context;
struct page *page;
@@ -688,7 +688,7 @@ static int dispatch_wo
Re: [Intel-gfx] [RFC] drm/i915: Rework "Potential atomic update error" to handle PSR exit
On Thu, Apr 26, 2018 at 08:09:56PM -0700, Tarun Vyas wrote:
> On Thu, Apr 26, 2018 at 02:39:04PM -0700, Tarun Vyas wrote:
> > On Thu, Apr 26, 2018 at 10:47:40AM -0700, Dhinakaran Pandiyan wrote:
> > >
> > >
> > >
> > > On Thu, 2018-04-26 at 16:41 +0300, Ville Syrjälä wrote:
> > > > On Wed, Apr 25, 2018 at 07:10:09PM -0700, tarun.v...@intel.com wrote:
> > > > > From: Tarun
> > > > >
> > > > > The Display scanline counter freezes on PSR entry. Inside
> > > > > intel_pipe_update_start, once Vblank interrupts are enabled, we start
> > > > > exiting PSR, but by the time the scanline counter is read, we may not
> > > > > have completely exited PSR which leads us to schedule out and check
> > > > > back
> > > > > later.
> > > > > On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but
> > > > > lags w.r.t core kernel code, hot plugging an external display triggers
> > > > > tons of "potential atomic update errors" in the dmesg, on *pipe A*. A
> > > > > closer analysis reveals that we try to read the scanline 3 times and
> > > > > eventually timeout, b/c PSR hasn't exited fully leading to a PIPEDSL
> > > > > stuck @
> > > > > 1599.
> > > > > This issue is not seen on upstream kernels, b/c for *some* reason we
> > > > > loop inside intel_pipe_update start for ~2+ msec which in this case is
> > > > > more than enough to exit PSR fully, hence an *unstuck* PIPEDSL
> > > > > counter,
> > > > > hence no error. On the other hand, the ChromeOS kernel spends ~1.1
> > > > > msec
> > > > > looping inside intel_pipe_update_start and hence errors out b/c the
> > > > > source is still in PSR.
> > > > >
> > > > > If PSR is enabled, then we should *wait* for the PSR
> > > > > state to move to IDLE before re-reading the PIPEDSL so as to avoid
> > > > > bogus
> > > > > and annoying "potential atomic update error" messages.
> > > > >
> > > > > P.S: This scenario applies to a configuration with an additional pipe,
> > > > > as of now.
> > > > >
> > >
> > > Ville,
> > >
> > > Any idea what could be the reason the warnings start appearing when an
> > > external display is connected? We couldn't come up with an explanation.
> > >
> > Another source of confusion for me is that on the upstream kernels, it
> > *appears* to take more time for us to get *re-scheduled* after we call
> > schedule_timeout(). So with ~2+msec spent in the loop, it seems to be not
> > working as intended b/c we end up spending a lot more time in the loop,
> > which in turn contributes to this issue not being seen on upstream kernels.
> > >
> > > > > Signed-off-by: Tarun
> > > > > ---
> > > > > drivers/gpu/drm/i915/intel_sprite.c | 19 +++
> > > > > 1 file changed, 15 insertions(+), 4 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> > > > > b/drivers/gpu/drm/i915/intel_sprite.c
> > > > > index aa1dfaa692b9..77dd3b936131 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_sprite.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_sprite.c
> > > > > @@ -92,11 +92,13 @@ void intel_pipe_update_start(const struct
> > > > > intel_crtc_state *new_crtc_state)
> > > > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > > > const struct drm_display_mode *adjusted_mode =
> > > > > &new_crtc_state->base.adjusted_mode;
> > > > > long timeout = msecs_to_jiffies_timeout(1);
> > > > > - int scanline, min, max, vblank_start;
> > > > > + int scanline, min, max, vblank_start, old_scanline,
> > > > > new_scanline;
> > > > > + bool retried = false;
> > > > > wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
> > > > > bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) ||
> > > > > IS_CHERRYVIEW(dev_priv)) &&
> > > > > intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
> > > > > DEFINE_WAIT(wait);
> > > > > + old_scanline = new_scanline = -1;
> > > > >
> > > > > vblank_start = adjusted_mode->crtc_vblank_start;
> > > > > if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> > > > > @@ -126,15 +128,24 @@ void intel_pipe_update_start(const struct
> > > > > intel_crtc_state *new_crtc_state)
> > > > >* read the scanline.
> > > > >*/
> > > > > prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
> > > > > -
> > > > > +retry:
> > > > > scanline = intel_get_crtc_scanline(crtc);
> > > > > + old_scanline = new_scanline, new_scanline = scanline;
> > > > > +
> > > > > if (scanline < min || scanline > max)
> > > > > break;
> > > > >
> > > > > if (timeout <= 0) {
> > > > > - DRM_ERROR("Potential atomic update failure on
> > > > > pipe %c\n",
> > > > > + if(!i915.enable_psr || retried) {
> > >
> > > You could use the CAN_PSR() macro that checks for source and sink
> > > support.
> > >
> > Will do.
> > > > > + DRM_ERRO
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Aspect ratio support in DRM layer
== Series Details == Series: Aspect ratio support in DRM layer URL : https://patchwork.freedesktop.org/series/42403/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6d0e3d322715 drm/modes: Introduce drm_mode_match() -:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #39: FILE: drivers/gpu/drm/drm_modes.c:958: +static bool drm_mode_match_clock(const struct drm_display_mode *mode1, + const struct drm_display_mode *mode2) total: 0 errors, 0 warnings, 1 checks, 190 lines checked f4fd4583689d drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy 78e1b6d70ed4 drm/edid: Fix cea mode aspect ratio handling d6886905af86 drm/edid: Don't send bogus aspect ratios in AVI infoframes 580bb243213b video/hdmi: Reject illegal picture aspect ratios dc7e7e1e0257 drm: Add DRM client cap for aspect-ratio f94f783b89d9 drm: Handle aspect ratio info in legacy modeset path 1ba4ec5d7d45 drm: Expose modes with aspect ratio, only if requested 58c770cef648 drm: Add aspect ratio parsing in DRM layer -:88: CHECK:SPACING: space preferred before that '|' (ctx:VxE) #88: FILE: drivers/gpu/drm/drm_modes.c:1052: + DRM_MODE_MATCH_3D_FLAGS| ^ total: 0 errors, 0 warnings, 1 checks, 77 lines checked 1cccf4dbbdca drm: Add and handle new aspect ratios in DRM layer -:91: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #91: FILE: include/uapi/drm/drm_mode.h:108: + (DRM_MODE_PICTURE_ASPECT_64_27<<19) ^ -:93: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #93: FILE: include/uapi/drm/drm_mode.h:110: + (DRM_MODE_PICTURE_ASPECT_256_135<<19) ^ total: 0 errors, 0 warnings, 2 checks, 42 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/7] drm/i915: Retire requests along rings
On 26/04/2018 18:49, Chris Wilson wrote:
In the next patch, rings are the central timeline as requests may jump
between engines. Therefore in the future as we retire in order along the
engine timeline, we may retire out-of-order within a ring (as the ring now
occurs along multiple engines), leading to much hilarity in miscomputing
the position of ring->head.
As an added bonus, retiring along the ring reduces the penalty of having
one execlists client do cleanup for another (old legacy submission
shares a ring between all clients). The downside is that slow and
irregular (off the critical path) process of cleaning up stale requests
after userspace becomes a modicum less efficient.
In the long run, it will become apparent that the ordered
ring->request_list matches the ring->timeline, a fun challenge for the
future will be unifying the two lists to avoid duplication!
v2: We need both engine-order and ring-order processing to maintain our
knowledge of where individual rings have completed upto as well as
knowing what was last executing on any engine. And finally by decoupling
retiring the contexts on the engine and the timelines along the rings,
we do have to keep a reference to the context on each request
(previously it was guaranteed by the context being pinned).
v3: Not just a reference to the context, but we need to keep it pinned
as we manipulate the rings; i.e. we need a pin for both the manipulation
of the engine state during its retirements, and a separate pin for the
manipulation of the ring state.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_gem.c | 1 +
drivers/gpu/drm/i915/i915_request.c | 150 +++---
drivers/gpu/drm/i915/i915_utils.h | 6 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
drivers/gpu/drm/i915/selftests/mock_engine.c | 27 +++-
.../gpu/drm/i915/selftests/mock_gem_device.c | 2 +
8 files changed, 131 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8fd9fb6efba5..1837c01d44d0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2058,8 +2058,9 @@ struct drm_i915_private {
void (*resume)(struct drm_i915_private *);
void (*cleanup_engine)(struct intel_engine_cs *engine);
- struct list_head timelines;
struct i915_gem_timeline global_timeline;
+ struct list_head timelines;
+ struct list_head rings;
u32 active_requests;
u32 request_serial;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4090bfdda340..f0644d1fbd75 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5600,6 +5600,7 @@ int i915_gem_init_early(struct drm_i915_private *dev_priv)
goto err_dependencies;
mutex_lock(&dev_priv->drm.struct_mutex);
+ INIT_LIST_HEAD(&dev_priv->gt.rings);
INIT_LIST_HEAD(&dev_priv->gt.timelines);
err = i915_gem_timeline_init__global(dev_priv);
mutex_unlock(&dev_priv->drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 9358f2cf0c32..e6535255d445 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -286,6 +286,7 @@ static int reserve_gt(struct drm_i915_private *i915)
static void unreserve_gt(struct drm_i915_private *i915)
{
+ GEM_BUG_ON(!i915->gt.active_requests);
if (!--i915->gt.active_requests)
i915_gem_park(i915);
}
@@ -298,6 +299,7 @@ void i915_gem_retire_noop(struct i915_gem_active *active,
static void advance_ring(struct i915_request *request)
{
+ struct intel_ring *ring = request->ring;
unsigned int tail;
/*
@@ -309,7 +311,8 @@ static void advance_ring(struct i915_request *request)
* Note this requires that we are always called in request
* completion order.
*/
- if (list_is_last(&request->ring_link, &request->ring->request_list)) {
+ GEM_BUG_ON(!list_is_first(&request->ring_link, &ring->request_list));
+ if (list_is_last(&request->ring_link, &ring->request_list)) {
/*
* We may race here with execlists resubmitting this request
* as we retire it. The resubmission will move the ring->tail
@@ -322,9 +325,9 @@ static void advance_ring(struct i915_request *request)
} else {
tail = request->postfix;
}
- list_del(&request->ring_link);
+ list_del_init(&request->ring_link);
- request->ring->head = tail;
+ ring->head = tail;
}
static void free_capture_list(struct i915_request *request)
@@ -340,30 +343,84 @@ static void free_ca
Re: [Intel-gfx] [PATCH 4/7] drm/i915: Only track live rings for retiring
On 26/04/2018 18:49, Chris Wilson wrote:
We don't need to track every ring for its lifetime as they are managed
by the contexts/engines. What we do want to track are the live rings so
that we can sporadically clean up requests if userspace falls behind. We
can simply restrict the gt->rings list to being only gt->live_rings.
v2: s/live/active/ for consistency with gt.active_requests
Suggested-by: Tvrtko Ursulin
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 3 ++-
drivers/gpu/drm/i915/i915_gem.c | 6 --
drivers/gpu/drm/i915/i915_request.c | 10 --
drivers/gpu/drm/i915/intel_ringbuffer.c | 4
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
drivers/gpu/drm/i915/selftests/mock_engine.c | 4
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 5 +++--
7 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1837c01d44d0..54351cace362 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2060,7 +2060,8 @@ struct drm_i915_private {
struct i915_gem_timeline global_timeline;
struct list_head timelines;
- struct list_head rings;
+
+ struct list_head active_rings;
u32 active_requests;
u32 request_serial;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f0644d1fbd75..fa1d94a4eb5f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -141,6 +141,7 @@ static u32 __i915_gem_park(struct drm_i915_private *i915)
{
lockdep_assert_held(&i915->drm.struct_mutex);
GEM_BUG_ON(i915->gt.active_requests);
+ GEM_BUG_ON(!list_empty(&i915->gt.active_rings));
if (!i915->gt.awake)
return I915_EPOCH_INVALID;
@@ -5599,9 +5600,10 @@ int i915_gem_init_early(struct drm_i915_private
*dev_priv)
if (!dev_priv->priorities)
goto err_dependencies;
- mutex_lock(&dev_priv->drm.struct_mutex);
- INIT_LIST_HEAD(&dev_priv->gt.rings);
INIT_LIST_HEAD(&dev_priv->gt.timelines);
+ INIT_LIST_HEAD(&dev_priv->gt.active_rings);
+
+ mutex_lock(&dev_priv->drm.struct_mutex);
err = i915_gem_timeline_init__global(dev_priv);
mutex_unlock(&dev_priv->drm.struct_mutex);
if (err)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index e6535255d445..c8fc4b323e62 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -322,6 +322,7 @@ static void advance_ring(struct i915_request *request)
* noops - they are safe to be replayed on a reset.
*/
tail = READ_ONCE(request->tail);
+ list_del(&ring->active_link);
} else {
tail = request->postfix;
}
@@ -1096,6 +1097,8 @@ void __i915_request_add(struct i915_request *request,
bool flush_caches)
i915_gem_active_set(&timeline->last_request, request);
list_add_tail(&request->ring_link, &ring->request_list);
+ if (list_is_first(&request->ring_link, &ring->request_list))
+ list_add(&ring->active_link, &request->i915->gt.active_rings);
request->emitted_jiffies = jiffies;
/*
@@ -1418,14 +1421,17 @@ static void ring_retire_requests(struct intel_ring
*ring)
void i915_retire_requests(struct drm_i915_private *i915)
{
- struct intel_ring *ring, *next;
+ struct intel_ring *ring, *tmp;
lockdep_assert_held(&i915->drm.struct_mutex);
if (!i915->gt.active_requests)
return;
- list_for_each_entry_safe(ring, next, &i915->gt.rings, link)
+ /* An outstanding request must be on a still active ring somewhere */
+ GEM_BUG_ON(list_empty(&i915->gt.active_rings));
+
+ list_for_each_entry_safe(ring, tmp, &i915->gt.active_rings, active_link)
ring_retire_requests(ring);
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ae8958007df5..007449cfa22b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1150,8 +1150,6 @@ intel_engine_create_ring(struct intel_engine_cs *engine,
int size)
}
ring->vma = vma;
- list_add(&ring->link, &engine->i915->gt.rings);
-
return ring;
}
@@ -1163,8 +1161,6 @@ intel_ring_free(struct intel_ring *ring)
i915_vma_close(ring->vma);
__i915_gem_object_release_unless_active(obj);
- list_del(&ring->link);
-
kfree(ring);
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index deb80d01e0bd..fd679cec9ac6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ri
[Intel-gfx] ✗ Fi.CI.BAT: failure for Aspect ratio support in DRM layer
== Series Details == Series: Aspect ratio support in DRM layer URL : https://patchwork.freedesktop.org/series/42403/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4107 -> Patchwork_8824 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_8824 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8824, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42403/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8824: === IGT changes === Possible regressions igt@prime_vgem@basic-fence-flip: fi-bwr-2160:PASS -> FAIL == Known issues == Here are the changes found in Patchwork_8824 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: fi-skl-6770hq: PASS -> FAIL (fdo#103481) Possible fixes igt@kms_busy@basic-flip-c: fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-cnl-psr: FAIL (fdo#100368) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-cnl-psr: FAIL (fdo#103481) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8824 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8824: 1cccf4dbbdca46f5654de3cf3e308ad775fe2a46 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 1cccf4dbbdca drm: Add and handle new aspect ratios in DRM layer 58c770cef648 drm: Add aspect ratio parsing in DRM layer 1ba4ec5d7d45 drm: Expose modes with aspect ratio, only if requested f94f783b89d9 drm: Handle aspect ratio info in legacy modeset path dc7e7e1e0257 drm: Add DRM client cap for aspect-ratio 580bb243213b video/hdmi: Reject illegal picture aspect ratios d6886905af86 drm/edid: Don't send bogus aspect ratios in AVI infoframes 78e1b6d70ed4 drm/edid: Fix cea mode aspect ratio handling f4fd4583689d drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy 6d0e3d322715 drm/modes: Introduce drm_mode_match() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8824/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/7] drm/i915: Retire requests along rings
Quoting Tvrtko Ursulin (2018-04-27 13:50:44)
>
> On 26/04/2018 18:49, Chris Wilson wrote:
> > +static void __retire_engine_request(struct intel_engine_cs *engine,
> > + struct i915_request *rq)
> > +{
> > + GEM_TRACE("%s(%s) fence %llx:%d, global=%d, current %d\n",
> > + __func__, engine->name,
> > + rq->fence.context, rq->fence.seqno,
> > + rq->global_seqno,
> > + intel_engine_get_seqno(engine));
> > +
> > + GEM_BUG_ON(!i915_request_completed(rq));
> > +
> > + local_irq_disable();
> > +
> > + spin_lock(&engine->timeline->lock);
> > + GEM_BUG_ON(!list_is_first(&rq->link, &engine->timeline->requests));
>
> Assert not strictly needed because how the single caller pops the
> elements off, but maybe in the future something changes.
Indeed, useful if we do add a direct call here; and useful to reiterate
the point that the engine->last_retired_context depends on ordering.
> > +static void __retire_engine_upto(struct intel_engine_cs *engine,
> > + struct i915_request *rq)
> > +{
> > + struct i915_request *tmp;
> > +
> > + if (list_empty(&rq->link))
> > + return;
> > +
> > + do {
> > + tmp = list_first_entry(&engine->timeline->requests,
> > +typeof(*tmp), link);
> > +
> > + GEM_BUG_ON(tmp->engine != engine);
>
> Very minor - move this assert to outside the loop as rq->engine != engine?
I felt validating the engine backpointer along the list at various
points will be handy. Especially when request.engine becomes a bit more
volatile.
> > void i915_request_retire_upto(struct i915_request *rq)
> > {
> > - struct intel_engine_cs *engine = rq->engine;
> > + struct intel_ring *ring = rq->ring;
> > struct i915_request *tmp;
> >
> > + GEM_TRACE("%s fence %llx:%d, global=%d, current %d\n",
> > + rq->engine->name,
> > + rq->fence.context, rq->fence.seqno,
> > + rq->global_seqno,
> > + intel_engine_get_seqno(rq->engine));
>
> Maybe we could consolidate these with GEM_TRACE_RQ(rq, "prefix") or
> something.
Worth trying, if you mean to completely stop me from adding
inconsistency to every GEM_TRACE. Spoilsport.
> > @@ -651,9 +694,9 @@ i915_request_alloc(struct intel_engine_cs *engine,
> > struct i915_gem_context *ctx)
> > if (ret)
> > goto err_unreserve;
> >
> > - /* Move the oldest request to the slab-cache (if not in use!) */
> > - rq = list_first_entry_or_null(&engine->timeline->requests,
> > - typeof(*rq), link);
> > + /* Move our oldest request to the slab-cache (if not in use!) */
> > + rq = list_first_entry_or_null(&ring->request_list,
> > + typeof(*rq), ring_link);
>
> This one I still think it will reduce the recycling effectiveness. But
> OK, can leave it for later if it will become noticeable.
Or the inefficiency of retiring more than required. So long as we do
prune regularly, we can hold off the oom daemons.
Yes, it's not as neat as first planned.
-Chris
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 5/7] drm/i915: Move timeline from GTT to ring
On 26/04/2018 18:49, Chris Wilson wrote:
In the future, we want to move a request between engines. To achieve
this, we first realise that we have two timelines in effect here. The
first runs through the GTT is required for ordering vma access, which is
tracked currently by engine. The second is implied by sequential
execution of commands inside the ringbuffer. This timeline is one that
maps to userspace's expectations when submitting requests (i.e. given the
same context, batch A is executed before batch B). As the rings's
timelines map to userspace and the GTT timeline an implementation
detail, move the timeline from the GTT into the ring itself (per-context
in logical-ring-contexts/execlists, or a global per-engine timeline for
the shared ringbuffers in legacy submission.
The two timelines are still assumed to be equivalent at the moment (no
migrating requests between engines yet) and so we can simply move from
one to the other without adding extra ordering.
v2: Reinforce that one isn't allowed to mix the engine execution
timeline with the client timeline from userspace (on the ring).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 13 +
drivers/gpu/drm/i915/i915_gem.c | 9 ++--
drivers/gpu/drm/i915/i915_gem_context.c | 15 +-
drivers/gpu/drm/i915/i915_gem_context.h | 2 +
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 --
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 -
drivers/gpu/drm/i915/i915_gem_timeline.c | 54 +--
drivers/gpu/drm/i915/i915_gem_timeline.h | 4 ++
drivers/gpu/drm/i915/i915_request.c | 13 +++--
drivers/gpu/drm/i915/intel_engine_cs.c| 3 +-
drivers/gpu/drm/i915/intel_lrc.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +++-
drivers/gpu/drm/i915/intel_ringbuffer.h | 5 +-
drivers/gpu/drm/i915/selftests/mock_engine.c | 3 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 4 +-
drivers/gpu/drm/i915/selftests/mock_gtt.c | 1 -
16 files changed, 101 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 54351cace362..b9bd8328f501 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2058,7 +2058,8 @@ struct drm_i915_private {
void (*resume)(struct drm_i915_private *);
void (*cleanup_engine)(struct intel_engine_cs *engine);
- struct i915_gem_timeline global_timeline;
+ struct i915_gem_timeline execution_timeline;
+ struct i915_gem_timeline legacy_timeline;
struct list_head timelines;
struct list_head active_rings;
@@ -3234,16 +3235,6 @@ i915_gem_context_lookup(struct drm_i915_file_private
*file_priv, u32 id)
return ctx;
}
-static inline struct intel_timeline *
-i915_gem_context_lookup_timeline(struct i915_gem_context *ctx,
-struct intel_engine_cs *engine)
-{
- struct i915_address_space *vm;
-
- vm = ctx->ppgtt ? &ctx->ppgtt->base : &ctx->i915->ggtt.base;
- return &vm->timeline.engine[engine->id];
-}
-
int i915_perf_open_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fa1d94a4eb5f..438a2fc5bba0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3110,10 +3110,10 @@ static void engine_skip_context(struct i915_request
*request)
{
struct intel_engine_cs *engine = request->engine;
struct i915_gem_context *hung_ctx = request->ctx;
- struct intel_timeline *timeline;
+ struct intel_timeline *timeline = request->timeline;
unsigned long flags;
- timeline = i915_gem_context_lookup_timeline(hung_ctx, engine);
+ GEM_BUG_ON(timeline == engine->timeline);
spin_lock_irqsave(&engine->timeline->lock, flags);
spin_lock(&timeline->lock);
@@ -3782,7 +3782,7 @@ int i915_gem_wait_for_idle(struct drm_i915_private *i915,
unsigned int flags)
ret = wait_for_engines(i915);
} else {
- ret = wait_for_timeline(&i915->gt.global_timeline, flags);
+ ret = wait_for_timeline(&i915->gt.execution_timeline, flags);
}
return ret;
@@ -5652,7 +5652,8 @@ void i915_gem_cleanup_early(struct drm_i915_private
*dev_priv)
WARN_ON(dev_priv->mm.object_count);
mutex_lock(&dev_priv->drm.struct_mutex);
- i915_gem_timeline_fini(&dev_priv->gt.global_timeline);
+ i915_gem_timeline_fini(&dev_priv->gt.legacy_timeline);
+ i915_gem_timeline_fini(&dev_priv->gt.execution_timeline);
WARN_ON(!list_empty(&dev_priv->gt.timelines));
mutex_unlock(&dev_priv->drm.struct_mutex);
diff --git a/drivers/gpu/dr
Re: [Intel-gfx] [RFC] drm/i915: Rework "Potential atomic update error" to handle PSR exit
Quoting Ville Syrjälä (2018-04-27 13:41:42) > On Thu, Apr 26, 2018 at 08:09:56PM -0700, Tarun Vyas wrote: > > On a second thought, I was doing it wrong in the initial RFC. Can't do a > > wait_for_register with irqs disabled by local_irq_disable(). So, will have > > to *poll* the PSR_STATE, but will that be desirable ? > > Do it before disabling the irqs? As long as we prevent it from > re-entering PSR after the wait it should be safe. Maybe the vblank irq > is the best way to prevent the re-entry? There's also an atomic variant of wait_for_register. But if we don't need to wait with irqs off, don't. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr : Add psr1 live status (rev2)
== Series Details == Series: drm/i915/psr : Add psr1 live status (rev2) URL : https://patchwork.freedesktop.org/series/42021/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4107_full -> Patchwork_8821_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8821_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8821_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42021/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8821_full: === IGT changes === Warnings igt@kms_vblank@pipe-a-wait-forked-busy-hang: shard-snb: PASS -> SKIP +1 == Known issues == Here are the changes found in Patchwork_8821_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: shard-hsw: PASS -> FAIL (fdo#100368) igt@kms_flip@modeset-vs-vblank-race: shard-hsw: PASS -> FAIL (fdo#103060) igt@kms_flip@plain-flip-fb-recreate-interruptible: shard-glk: PASS -> FAIL (fdo#100368) igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-kbl: PASS -> DMESG-WARN (fdo#106247) igt@perf_pmu@interrupts-sync: shard-apl: PASS -> FAIL (fdo#104485) Possible fixes igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: FAIL (fdo#105767) -> PASS igt@kms_flip@2x-plain-flip-ts-check: shard-hsw: FAIL (fdo#100368) -> PASS igt@kms_flip@blocking-wf_vblank: shard-hsw: FAIL (fdo#103928) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-hsw: FAIL (fdo#105707) -> PASS igt@kms_sysfs_edid_timing: shard-apl: WARN (fdo#100047) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#104485 https://bugs.freedesktop.org/show_bug.cgi?id=104485 fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 == Participating hosts (9 -> 8) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8821 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8821: f386581d5e6f236c5db6af327218bf874def0dac @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8821/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Aspect ratio support in DRM layer
== Series Details == Series: Aspect ratio support in DRM layer URL : https://patchwork.freedesktop.org/series/42403/ State : warning == Summary == $ dim checkpatch origin/drm-tip 26bd319b4abf drm/modes: Introduce drm_mode_match() -:39: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #39: FILE: drivers/gpu/drm/drm_modes.c:958: +static bool drm_mode_match_clock(const struct drm_display_mode *mode1, + const struct drm_display_mode *mode2) total: 0 errors, 0 warnings, 1 checks, 190 lines checked d13115ecbdc1 drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy a881ad03fda9 drm/edid: Fix cea mode aspect ratio handling 38dcb640b419 drm/edid: Don't send bogus aspect ratios in AVI infoframes 2daade285efb video/hdmi: Reject illegal picture aspect ratios e86d5a0d9ee0 drm: Add DRM client cap for aspect-ratio 9955311be9aa drm: Handle aspect ratio info in legacy modeset path 2a72ce9d5a9a drm: Expose modes with aspect ratio, only if requested 1b7fe5d2c8aa drm: Add aspect ratio parsing in DRM layer -:88: CHECK:SPACING: space preferred before that '|' (ctx:VxE) #88: FILE: drivers/gpu/drm/drm_modes.c:1052: + DRM_MODE_MATCH_3D_FLAGS| ^ total: 0 errors, 0 warnings, 1 checks, 77 lines checked 8355947e8186 drm: Add and handle new aspect ratios in DRM layer -:91: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #91: FILE: include/uapi/drm/drm_mode.h:108: + (DRM_MODE_PICTURE_ASPECT_64_27<<19) ^ -:93: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #93: FILE: include/uapi/drm/drm_mode.h:110: + (DRM_MODE_PICTURE_ASPECT_256_135<<19) ^ total: 0 errors, 0 warnings, 2 checks, 42 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Aspect ratio support in DRM layer
== Series Details == Series: Aspect ratio support in DRM layer URL : https://patchwork.freedesktop.org/series/42403/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4107 -> Patchwork_8825 = == Summary - WARNING == Minor unknown changes coming with Patchwork_8825 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8825, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42403/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8825: === IGT changes === Warnings igt@gem_exec_gttfill@basic: fi-pnv-d510:PASS -> SKIP == Known issues == Here are the changes found in Patchwork_8825 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-ivb-3520m: PASS -> DMESG-WARN (fdo#106084) Possible fixes igt@gem_exec_suspend@basic-s3: fi-ivb-3520m: DMESG-WARN (fdo#106084) -> PASS igt@gem_mmap_gtt@basic-small-bo-tiledx: fi-gdg-551: FAIL (fdo#102575) -> PASS igt@kms_busy@basic-flip-c: fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-cnl-psr: FAIL (fdo#100368) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-cnl-psr: FAIL (fdo#103481) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8825 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8825: 8355947e81868cb3a9def449f9d56e188272c9a6 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 8355947e8186 drm: Add and handle new aspect ratios in DRM layer 1b7fe5d2c8aa drm: Add aspect ratio parsing in DRM layer 2a72ce9d5a9a drm: Expose modes with aspect ratio, only if requested 9955311be9aa drm: Handle aspect ratio info in legacy modeset path e86d5a0d9ee0 drm: Add DRM client cap for aspect-ratio 2daade285efb video/hdmi: Reject illegal picture aspect ratios 38dcb640b419 drm/edid: Don't send bogus aspect ratios in AVI infoframes a881ad03fda9 drm/edid: Fix cea mode aspect ratio handling d13115ecbdc1 drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy 26bd319b4abf drm/modes: Introduce drm_mode_match() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8825/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v12 07/10] drm: Handle aspect ratio info in legacy modeset path
On Fri, Apr 27, 2018 at 05:44:53PM +0530, Nautiyal, Ankit K wrote:
> From: Ankit Nautiyal
>
> If the user-space does not support aspect-ratio, and requests for a
> modeset with mode having aspect ratio bits set, then the given
> user-mode must be rejected. Secondly, while preparing a user-mode from
> kernel mode, the aspect-ratio info must not be given, if aspect-ratio
> is not supported by the user.
>
> This patch:
> 1. rejects the modes with aspect-ratio info, during modeset, if the
>user does not support aspect ratio.
> 2. does not load the aspect-ratio info in user-mode structure, if
>aspect ratio is not supported.
> 3. adds helper functions for determining if aspect-ratio is expected
>in user-mode and for allowing/disallowing the aspect-ratio, if its
>not expected.
>
> Signed-off-by: Ankit Nautiyal
>
> V3: Addressed review comments from Ville:
> Do not corrupt the current crtc state by updating aspect-ratio on
> the fly.
> V4: rebase
> V5: As suggested by Ville, rejected the modeset calls for modes with
> aspect ratio, if the user does not set aspect-ratio cap.
> V6: Used the helper functions for determining if aspect-ratio is
> expected in the user-mode.
> V7: rebase
> V8: rebase
> V9: rebase
> v10: Modified the commit-message
> v11: rebase
> v12: Merged the patch for adding aspect-ratio helper functions
> with this patch.
> ---
> drivers/gpu/drm/drm_crtc.c | 8
> drivers/gpu/drm/drm_modes.c | 45
> +
> include/drm/drm_modes.h | 4
> 3 files changed, 57 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index a231dd5..98323f4 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -449,6 +449,7 @@ int drm_mode_getcrtc(struct drm_device *dev,
> crtc_resp->mode_valid = 0;
> }
> }
> + drm_mode_filter_aspect_ratio_flags(file_priv, &crtc_resp->mode);
> drm_modeset_unlock(&crtc->mutex);
>
> return 0;
> @@ -628,6 +629,13 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
> ret = -ENOMEM;
> goto out;
> }
> + if (!drm_mode_aspect_ratio_allowed(file_priv,
> +&crtc_req->mode)) {
> + DRM_DEBUG_KMS("Unexpected aspect-ratio flag bits\n");
> + ret = -EINVAL;
> + goto out;
> + }
> +
>
> ret = drm_mode_convert_umode(dev, mode, &crtc_req->mode);
> if (ret) {
> diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> index c395a24..d6f68c8 100644
> --- a/drivers/gpu/drm/drm_modes.c
> +++ b/drivers/gpu/drm/drm_modes.c
> @@ -1759,3 +1759,48 @@ bool drm_mode_is_420(const struct drm_display_info
> *display,
> drm_mode_is_420_also(display, mode);
> }
> EXPORT_SYMBOL(drm_mode_is_420);
> +
> +/**
> + * drm_mode_aspect_ratio_allowed - checks if the aspect-ratio information
> + * is expected from the user-mode.
> + *
> + * If the user has set aspect-ratio cap, then the flag of the user-mode is
> + * allowed to contain aspect-ratio value.
> + * If the user does not set aspect-ratio cap, then the only value allowed in
> the
> + * flags bits is aspect-ratio NONE.
> + *
> + * @file_priv: file private structure to get the user capabilities
> + * @umode: drm_mode_modeinfo struct, whose flag carry the aspect ratio
> + * information.
> + *
> + * Returns:
> + * true if the aspect-ratio info is allowed in the user-mode flags.
> + * false, otherwise.
> + */
> +bool
> +drm_mode_aspect_ratio_allowed(const struct drm_file *file_priv,
> + struct drm_mode_modeinfo *umode)
> +{
> + return file_priv->aspect_ratio_allowed || (umode->flags &
> + DRM_MODE_FLAG_PIC_AR_MASK) == DRM_MODE_FLAG_PIC_AR_NONE;
Still looks funny.
> +}
> +
> +/**
> + * drm_mode_filter_aspect_ratio_flags - filters the aspect-ratio bits in the
> + * user-mode flags.
> + *
> + * Checks if the aspect-ratio information is allowed. Resets the aspect-ratio
> + * bits in the user-mode flags, if aspect-ratio info is not allowed.
> + *
> + * @file_priv: file private structure to get the user capabilities.
> + * @umode: drm_mode_modeinfo struct, whose flags' aspect-ratio bits needs to
> + * be filtered.
> + *
> + */
> +void
> +drm_mode_filter_aspect_ratio_flags(const struct drm_file *file_priv,
> +struct drm_mode_modeinfo *umode)
> +{
> + if (!drm_mode_aspect_ratio_allowed(file_priv, umode))
> + umode->flags &= ~DRM_MODE_FLAG_PIC_AR_MASK;
> +}
> diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
> index 2f78b7e..e0b060d 100644
> --- a/include/drm/drm_modes.h
> +++ b/include/drm/drm_modes.h
> @@ -461,6 +461,10 @@ bool drm_mode_is_420_also(const struct drm_display_info
> *display,
>
[Intel-gfx] ✓ Fi.CI.IGT: success for x86: Mark up large pm4/5 constants with UL
== Series Details == Series: x86: Mark up large pm4/5 constants with UL URL : https://patchwork.freedesktop.org/series/42387/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4107_full -> Patchwork_8823_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8823_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8823_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42387/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8823_full: === IGT changes === Warnings igt@gem_mocs_settings@mocs-rc6-vebox: shard-kbl: PASS -> SKIP +2 == Known issues == Here are the changes found in Patchwork_8823_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@2x-dpms-vs-vblank-race: shard-hsw: PASS -> FAIL (fdo#103060) igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-hsw: PASS -> FAIL (fdo#102887) igt@kms_flip@2x-plain-flip-fb-recreate: shard-hsw: PASS -> FAIL (fdo#100368) igt@kms_flip@wf_vblank-ts-check-interruptible: shard-glk: PASS -> FAIL (fdo#105312) igt@perf_pmu@interrupts-sync: shard-apl: PASS -> FAIL (fdo#104485) Possible fixes igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#103665, fdo#106023) -> PASS igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: FAIL (fdo#105767) -> PASS igt@kms_flip@2x-plain-flip-ts-check: shard-hsw: FAIL (fdo#100368) -> PASS igt@kms_flip@blocking-wf_vblank: shard-hsw: FAIL (fdo#103928) -> PASS igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_sysfs_edid_timing: shard-apl: WARN (fdo#100047) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#104485 https://bugs.freedesktop.org/show_bug.cgi?id=104485 fdo#105312 https://bugs.freedesktop.org/show_bug.cgi?id=105312 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 == Participating hosts (9 -> 8) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8823 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8823: 33874ebb33b395e489a4b37475ca6a2da5aaa6ee @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8823/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v12 08/10] drm: Expose modes with aspect ratio, only if requested
On Fri, Apr 27, 2018 at 05:44:54PM +0530, Nautiyal, Ankit K wrote:
> From: Ankit Nautiyal
>
> We parse the EDID and add all the modes in the connector's modelist.
> This adds CEA modes with aspect ratio information too, regadless of
> whether user space requested this information or not.
>
> This patch prunes the modes with aspect-ratio information, from a
> connector's modelist, if the user-space has not set the aspect ratio
> DRM client cap. However if such a mode is unique in the list, it is
> kept in the list, with aspect-ratio flags reset.
>
> Cc: Ville Syrjala
> Cc: Shashank Sharma
> Cc: Jose Abreu
>
> Signed-off-by: Ankit Nautiyal
>
> V3: As suggested by Ville, modified the mechanism of pruning of modes
> with aspect-ratio, if the aspect-ratio is not supported. Instead
> of straight away pruning such a mode, the mode is retained with
> aspect ratio bits set to zero, provided it is unique.
> V4: rebase
> V5: Addressed review comments from Ville:
> -used a pointer to store last valid mode.
> -avoided, modifying of picture_aspect_ratio in kernel mode,
> instead only flags bits of user mode are reset (if aspect-ratio
> is not supported).
> V6: As suggested by Ville, corrected the mode pruning logic and
> elaborated the mode pruning logic and the assumptions taken.
> V7: rebase
> V8: rebase
> V9: rebase
> V10: rebase
> V11: Fixed the issue caused in kms_3d test, and enhanced the pruning
> logic to correctly identify and prune modes with aspect-ratio,
> if aspect-ratio cap is not set.
> V12: As suggested by Ville, added another list_head in
> drm_mode_display to traverse the list of exposed modes and
> avoided duplication of modes.
> ---
> drivers/gpu/drm/drm_connector.c | 52
> ++---
> include/drm/drm_modes.h | 9 +++
> 2 files changed, 53 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index b3cde89..e12964b 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -1531,15 +1531,35 @@ static struct drm_encoder
> *drm_connector_get_encoder(struct drm_connector *conne
> return connector->encoder;
> }
>
> -static bool drm_mode_expose_to_userspace(const struct drm_display_mode *mode,
> - const struct drm_file *file_priv)
> +static bool
> +drm_mode_expose_to_userspace(const struct drm_display_mode *mode,
> + const struct list_head *modelist,
> + const struct drm_file *file_priv)
> {
> /*
>* If user-space hasn't configured the driver to expose the stereo 3D
>* modes, don't expose them.
>*/
> + struct drm_display_mode *mode_itr;
> +
This is clearly misplaced. It should be before the comment. Hmm,
atually better move it into the aspect ratio if block since it's
not needed elsewhere.
> if (!file_priv->stereo_allowed && drm_mode_is_stereo(mode))
> return false;
> + /*
> + * If user-space hasn't configured the driver to expose the modes
> + * with aspect-ratio, don't expose them. However if such a mode
> + * is unique, let it be exposed, but reset the aspect-ratio flags
> + * while preparing the list of user-modes.
> + */
> + if (!file_priv->aspect_ratio_allowed &&
> + mode->picture_aspect_ratio != HDMI_PICTURE_ASPECT_NONE) {
> + list_for_each_entry(mode_itr, modelist, exp_head)
> + if (drm_mode_match(mode_itr, mode,
> +DRM_MODE_MATCH_TIMINGS |
> +DRM_MODE_MATCH_CLOCK |
> +DRM_MODE_MATCH_FLAGS |
> +DRM_MODE_MATCH_3D_FLAGS))
> + return false;
> + }
>
> return true;
> }
> @@ -1550,7 +1570,8 @@ int drm_mode_getconnector(struct drm_device *dev, void
> *data,
> struct drm_mode_get_connector *out_resp = data;
> struct drm_connector *connector;
> struct drm_encoder *encoder;
> - struct drm_display_mode *mode;
> + struct drm_display_mode *mode, *tmp;
> + struct list_head modelist;
LIST_HEAD_INIT(modelist);
And maybe call it export_list or something like that.
> int mode_count = 0;
> int encoders_count = 0;
> int ret = 0;
> @@ -1605,23 +1626,34 @@ int drm_mode_getconnector(struct drm_device *dev,
> void *data,
> out_resp->subpixel = connector->display_info.subpixel_order;
> out_resp->connection = connector->status;
>
> + INIT_LIST_HEAD(&modelist);
> +
> /* delayed so we get modes regardless of pre-fill_modes state */
> list_for_each_entry(mode, &connector->modes, head)
> - if (drm_mode_expose_to_userspace(mode, file_priv))
> + if (drm_mode_expose_to_userspace(mode, &modelist,
> +
[Intel-gfx] [PATCH] drm/i915/selftests: Potential uninitialized return in live_reset_whitelist()
Smatch complains that "err" could be uninitialized at the end. I don't know the code well but that seems like a reasonable warning. Signed-off-by: Dan Carpenter diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c index 5455b2626627..17444a3abbb9 100644 --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c @@ -239,7 +239,7 @@ static int live_reset_whitelist(void *arg) struct intel_engine_cs *engine = i915->engine[RCS]; struct i915_gpu_error *error = &i915->gpu_error; struct whitelist w; - int err; + int err = 0; /* If we reset the gpu, we should not lose the RING_NONPRIV */ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 RESEND] drm/i915: add support for specifying DMC firmware override by module param
On Tue, Apr 24, 2018 at 03:20:16PM +0300, Jani Nikula wrote:
> Use i915.dmc_firmware_path to override default firmware for the platform
> and bypassing version checks.
>
> v2: add missing param struct member declaration (David)
>
> Tested-by: David Weinehall
> Reviewed-by: David Weinehall
Re-tested against latest drm-tip; still works fine.
> Cc: Anusha Srivatsa
> Cc: David Weinehall
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_params.c | 3 +++
> drivers/gpu/drm/i915/i915_params.h | 1 +
> drivers/gpu/drm/i915/intel_csr.c | 9 +++--
> 3 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 08108ce5be21..66ea3552c63e 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -164,6 +164,9 @@ i915_param_named_unsafe(guc_firmware_path, charp, 0400,
> i915_param_named_unsafe(huc_firmware_path, charp, 0400,
> "HuC firmware path to use instead of the default one");
>
> +i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
> + "DMC firmware path to use instead of the default one");
> +
> i915_param_named_unsafe(enable_dp_mst, bool, 0600,
> "Enable multi-stream transport (MST) for new DisplayPort sinks.
> (default: true)");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index c96360398072..6684025b7af8 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -51,6 +51,7 @@ struct drm_printer;
> param(int, guc_log_level, -1) \
> param(char *, guc_firmware_path, NULL) \
> param(char *, huc_firmware_path, NULL) \
> + param(char *, dmc_firmware_path, NULL) \
> param(int, mmio_debug, 0) \
> param(int, edp_vswing, 0) \
> param(int, reset, 2) \
> diff --git a/drivers/gpu/drm/i915/intel_csr.c
> b/drivers/gpu/drm/i915/intel_csr.c
> index 41e6c75a7f3c..d81673250d3b 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -297,7 +297,10 @@ static uint32_t *parse_csr_fw(struct drm_i915_private
> *dev_priv,
>
> csr->version = css_header->version;
>
> - if (IS_CANNONLAKE(dev_priv)) {
> + if (csr->fw_path == i915_modparams.dmc_firmware_path) {
> + /* Bypass version check for firmware override. */
> + required_version = csr->version;
> + } else if (IS_CANNONLAKE(dev_priv)) {
> required_version = CNL_CSR_VERSION_REQUIRED;
> } else if (IS_GEMINILAKE(dev_priv)) {
> required_version = GLK_CSR_VERSION_REQUIRED;
> @@ -452,7 +455,9 @@ void intel_csr_ucode_init(struct drm_i915_private
> *dev_priv)
> if (!HAS_CSR(dev_priv))
> return;
>
> - if (IS_CANNONLAKE(dev_priv))
> + if (i915_modparams.dmc_firmware_path)
> + csr->fw_path = i915_modparams.dmc_firmware_path;
> + else if (IS_CANNONLAKE(dev_priv))
> csr->fw_path = I915_CSR_CNL;
> else if (IS_GEMINILAKE(dev_priv))
> csr->fw_path = I915_CSR_GLK;
> --
> 2.11.0
>
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Re: [Intel-gfx] [PATCH] drm/i915/selftests: Potential uninitialized return in live_reset_whitelist()
On Fri, Apr 27, 2018 at 05:06:16PM +0300, Dan Carpenter wrote: > Smatch complains that "err" could be uninitialized at the end. I don't > know the code well but that seems like a reasonable warning. > > Signed-off-by: Dan Carpenter > > diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c > b/drivers/gpu/drm/i915/selftests/intel_workarounds.c > index 5455b2626627..17444a3abbb9 100644 > --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c > @@ -239,7 +239,7 @@ static int live_reset_whitelist(void *arg) > struct intel_engine_cs *engine = i915->engine[RCS]; > struct i915_gpu_error *error = &i915->gpu_error; > struct whitelist w; > - int err; > + int err = 0; > > /* If we reset the gpu, we should not lose the RING_NONPRIV */ Looks like this is already fixed. commit a3997159133d56e444f0c0f56ab1ae59863912a8 Author: Gustavo A. R. Silva Date: Tue Apr 24 08:15:45 2018 -0500 drm/i915/selftests: Fix uninitialized variable -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Potential uninitialized return in live_reset_whitelist()
Quoting Dan Carpenter (2018-04-27 15:06:16) > Smatch complains that "err" could be uninitialized at the end. I don't > know the code well but that seems like a reasonable warning. > > Signed-off-by: Dan Carpenter Thanks for the report, Gustavo Silva already submitted the same fixup. commit a3997159133d56e444f0c0f56ab1ae59863912a8 Author: Gustavo A. R. Silva Date: Tue Apr 24 08:15:45 2018 -0500 drm/i915/selftests: Fix uninitialized variable There is a potential execution path in which variable err is returned without being properly initialized previously. Fix this by initializing variable err to 0. Ta, -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Don't pass the index to drm_property_add_enum()
On Thu, Apr 26, 2018 at 12:45:13PM +, Lisovskiy, Stanislav wrote:
> Reviewed-by: Stanislav Lisovskiy
Thanks. Pushed to drm-misc-next.
>
> Best Regards,
>
> Lisovskiy Stanislav
>
> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
>
>
> From: Intel-gfx [intel-gfx-boun...@lists.freedesktop.org] on behalf of
> Lisovskiy, Stanislav [stanislav.lisovs...@intel.com]
> Sent: Monday, April 23, 2018 4:59 PM
> To: Ville Syrjala; dri-de...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Ben Skeggs
> Subject: Re: [Intel-gfx] [PATCH] drm: Don't pass the index to
> drm_property_add_enum()
>
> Acked-by: Stanislav Lisovskiy
>
> Best Regards,
>
> Lisovskiy Stanislav
>
> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo>
>
>
> From: Ville Syrjala [ville.syrj...@linux.intel.com]
> Sent: Friday, March 16, 2018 9:04 PM
> To: dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org; Patrik Jakobsson; Ben Skeggs;
> nouv...@lists.freedesktop.org
> Subject: [PATCH] drm: Don't pass the index to drm_property_add_enum()
>
> From: Ville Syrjälä
>
> drm_property_add_enum() can calculate the index itself just fine,
> so no point in having the caller pass it in.
>
> Cc: Patrik Jakobsson
> Cc: Ben Skeggs
> Cc: nouv...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_connector.c | 6 +++---
> drivers/gpu/drm/drm_property.c| 27 +--
> drivers/gpu/drm/gma500/cdv_device.c | 4 ++--
> drivers/gpu/drm/gma500/psb_intel_sdvo.c | 2 +-
> drivers/gpu/drm/i915/intel_sdvo.c | 5 ++---
> drivers/gpu/drm/nouveau/nouveau_display.c | 4 +---
> include/drm/drm_property.h| 2 +-
> 7 files changed, 23 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index b3cde897cd80..dfc8ca1e9413 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -1069,7 +1069,7 @@ int drm_mode_create_tv_properties(struct drm_device
> *dev,
> goto nomem;
>
> for (i = 0; i < num_modes; i++)
> - drm_property_add_enum(dev->mode_config.tv_mode_property, i,
> + drm_property_add_enum(dev->mode_config.tv_mode_property,
> i, modes[i]);
>
> dev->mode_config.tv_brightness_property =
> @@ -1156,7 +1156,7 @@ int drm_connector_attach_scaling_mode_property(struct
> drm_connector *connector,
> {
> struct drm_device *dev = connector->dev;
> struct drm_property *scaling_mode_property;
> - int i, j = 0;
> + int i;
> const unsigned valid_scaling_mode_mask =
> (1U << ARRAY_SIZE(drm_scaling_mode_enum_list)) - 1;
>
> @@ -1177,7 +1177,7 @@ int drm_connector_attach_scaling_mode_property(struct
> drm_connector *connector,
> if (!(BIT(i) & scaling_mode_mask))
> continue;
>
> - ret = drm_property_add_enum(scaling_mode_property, j++,
> + ret = drm_property_add_enum(scaling_mode_property,
>
> drm_scaling_mode_enum_list[i].type,
>
> drm_scaling_mode_enum_list[i].name);
>
> diff --git a/drivers/gpu/drm/drm_property.c b/drivers/gpu/drm/drm_property.c
> index 8f4672daac7f..1f8031e30f53 100644
> --- a/drivers/gpu/drm/drm_property.c
> +++ b/drivers/gpu/drm/drm_property.c
> @@ -169,9 +169,9 @@ struct drm_property *drm_property_create_enum(struct
> drm_device *dev,
> return NULL;
>
> for (i = 0; i < num_values; i++) {
> - ret = drm_property_add_enum(property, i,
> - props[i].type,
> - props[i].name);
> + ret = drm_property_add_enum(property,
> + props[i].type,
> + props[i].name);
> if (ret) {
> drm_property_destroy(dev, property);
> return NULL;
> @@ -209,7 +209,7 @@ struct drm_property *drm_property_create_bitmask(struct
> drm_device *dev,
> uint64_t supported_bits)
> {
> struct drm_property *property;
> - int i, ret, index = 0;
> + int i, ret;
> int num_values = hweight64(supported_bits);
>
> flags |= DRM_MODE_PROP_BITMASK;
> @@ -221,14 +221,9 @@ struct drm_property *drm_property_create_bitmask(struct
> drm_device *dev,
> if (!(supported_bits & (1ULL << props[i].type)))
> continue;
>
> - if (WARN_ON(index >= num_values)) {
> - drm_property_de
Re: [Intel-gfx] [PATCH] drm/dp: Rename the edp_sdp_header as dp_sdp_header
On Thu, Apr 26, 2018 at 12:27:48PM -0700, Manasi Navare wrote:
> No functional changes in this patch.
>
> The SDP Header is a generic header for secondary data packets for
> both eDP and DP so call it dp_sdp_header. This header gets used for
> different SDP types already defined.
> Also header bytes 2 and 3 are secondary data packet specific header bytes.
> So change the comment to indicate the same.
>
> Cc: Ville Syrjälä
> Cc: Jani Nikula
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Manasi Navare
Pushed to drm-misc-next. Thanks for the patch.
> ---
> include/drm/drm_dp_helper.h | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 91c9bcd..2d55036 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -977,18 +977,18 @@ int drm_dp_bw_code_to_link_rate(u8 link_bw);
> #define DP_SDP_VSC_EXT_CEA 0x21 /* DP 1.4 */
> /* 0x80+ CEA-861 infoframe types */
>
> -struct edp_sdp_header {
> +struct dp_sdp_header {
> u8 HB0; /* Secondary Data Packet ID */
> u8 HB1; /* Secondary Data Packet Type */
> - u8 HB2; /* 7:5 reserved, 4:0 revision number */
> - u8 HB3; /* 7:5 reserved, 4:0 number of valid data bytes */
> + u8 HB2; /* Secondary Data Packet Specific header, Byte 0 */
> + u8 HB3; /* Secondary Data packet Specific header, Byte 1 */
> } __packed;
>
> #define EDP_SDP_HEADER_REVISION_MASK 0x1F
> #define EDP_SDP_HEADER_VALID_PAYLOAD_BYTES 0x1F
>
> struct edp_vsc_psr {
> - struct edp_sdp_header sdp_header;
> + struct dp_sdp_header sdp_header;
> u8 DB0; /* Stereo Interface */
> u8 DB1; /* 0 - PSR State; 1 - Update RFB; 2 - CRC Valid */
> u8 DB2; /* CRC value bits 7:0 of the R or Cr component */
> --
> 2.7.4
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 6/7] drm/i915: Split i915_gem_timeline into individual timelines
On 26/04/2018 18:49, Chris Wilson wrote:
We need to move to a more flexible timeline that doesn't assume one
fence context per engine, and so allow for a single timeline to be used
across a combination of engines. This means that preallocating a fence
context per engine is now a hindrance, and so we want to introduce the
singular timeline. From the code perspective, this has the notable
advantage of clearing up a lot of mirky semantics and some clumsy
pointer chasing.
By splitting the timeline up into a single entity rather than an array
of per-engine timelines, we can realise the goal of the previous patch
of tracking the timeline alongside the ring.
v2: Tweak wait_for_idle to stop the compiling thinking that ret may be
uninitialised.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 129 +---
drivers/gpu/drm/i915/i915_gem_context.c | 49 ++---
drivers/gpu/drm/i915/i915_gem_context.h | 2 -
drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +-
drivers/gpu/drm/i915/i915_gem_timeline.c | 198 --
drivers/gpu/drm/i915/i915_gpu_error.c | 4 +-
drivers/gpu/drm/i915/i915_perf.c | 10 +-
drivers/gpu/drm/i915/i915_request.c | 68 +++---
drivers/gpu/drm/i915/i915_request.h | 3 +-
drivers/gpu/drm/i915/i915_timeline.c | 105 ++
.../{i915_gem_timeline.h => i915_timeline.h} | 67 +++---
drivers/gpu/drm/i915/intel_engine_cs.c| 27 ++-
drivers/gpu/drm/i915/intel_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_lrc.c | 48 +++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 25 ++-
drivers/gpu/drm/i915/intel_ringbuffer.h | 11 +-
.../{i915_gem_timeline.c => i915_timeline.c} | 94 +++--
drivers/gpu/drm/i915/selftests/mock_engine.c | 32 ++-
.../gpu/drm/i915/selftests/mock_gem_device.c | 10 +-
.../gpu/drm/i915/selftests/mock_timeline.c| 45 ++--
.../gpu/drm/i915/selftests/mock_timeline.h| 28 +--
23 files changed, 398 insertions(+), 570 deletions(-)
delete mode 100644 drivers/gpu/drm/i915/i915_gem_timeline.c
create mode 100644 drivers/gpu/drm/i915/i915_timeline.c
rename drivers/gpu/drm/i915/{i915_gem_timeline.h => i915_timeline.h} (68%)
rename drivers/gpu/drm/i915/selftests/{i915_gem_timeline.c =>
i915_timeline.c} (70%)
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 9bee52a949a9..120db21fcd50 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -67,11 +67,11 @@ i915-y += i915_cmd_parser.o \
i915_gem_shrinker.o \
i915_gem_stolen.o \
i915_gem_tiling.o \
- i915_gem_timeline.o \
i915_gem_userptr.o \
i915_gemfs.o \
i915_query.o \
i915_request.o \
+ i915_timeline.o \
i915_trace_points.o \
i915_vma.o \
intel_breadcrumbs.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b9bd8328f501..dab15b6abc3c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -72,10 +72,10 @@
#include "i915_gem_fence_reg.h"
#include "i915_gem_object.h"
#include "i915_gem_gtt.h"
-#include "i915_gem_timeline.h"
#include "i915_gpu_error.h"
#include "i915_request.h"
#include "i915_scheduler.h"
+#include "i915_timeline.h"
#include "i915_vma.h"
#include "intel_gvt.h"
@@ -2058,8 +2058,6 @@ struct drm_i915_private {
void (*resume)(struct drm_i915_private *);
void (*cleanup_engine)(struct intel_engine_cs *engine);
- struct i915_gem_timeline execution_timeline;
- struct i915_gem_timeline legacy_timeline;
struct list_head timelines;
struct list_head active_rings;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 438a2fc5bba0..484354f25f98 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -162,7 +162,7 @@ static u32 __i915_gem_park(struct drm_i915_private *i915)
synchronize_irq(i915->drm.irq);
intel_engines_park(i915);
- i915_gem_timelines_park(i915);
+ i915_timelines_park(i915);
i915_pmu_gt_parked(i915);
@@ -2977,8 +2977,8 @@ i915_gem_find_active_request(struct intel_engine_cs *engine)
* extra delay for a recent interrupt is pointless. Hence, we do
* not need an engine->irq_seqno_barrier() before the seqno reads.
*/
- spin_lock_irqsave(&engine->timeline->lock, flags);
- list_for_each_entry(request, &engine->timeline->requests, link) {
+ spin_lock_irqsave(&engine->timeline.lock, flags);
+ list_for_each_entry(request, &engine->timeline.requests, link) {
if (__i915_request_completed(request,
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Potential uninitialized return in live_reset_whitelist()
== Series Details == Series: drm/i915/selftests: Potential uninitialized return in live_reset_whitelist() URL : https://patchwork.freedesktop.org/series/42407/ State : failure == Summary == Applying: drm/i915/selftests: Potential uninitialized return in live_reset_whitelist() Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/selftests/intel_workarounds.c Falling back to patching base and 3-way merge... No changes -- Patch already applied. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 6/7] drm/i915: Split i915_gem_timeline into individual timelines
Quoting Tvrtko Ursulin (2018-04-27 15:37:58)
>
> On 26/04/2018 18:49, Chris Wilson wrote:
> > -static bool engine_has_idle_kernel_context(struct intel_engine_cs *engine)
> > +static struct i915_request *
> > +last_timeline_request(struct i915_timeline *timeline,
> > + struct intel_engine_cs *engine)
> > {
> > - struct i915_gem_timeline *timeline;
> > + struct i915_request *rq;
> >
> > - list_for_each_entry(timeline, &engine->i915->gt.timelines, link) {
> > - struct intel_timeline *tl;
> > + if (timeline == &engine->timeline)
> > + return NULL;
>
> You are skipping engine timelines here? Would it be clearer if the
> caller did this in the list_for_each_entry loop?
Yeah, that we want to skip the engine->timeline isn't a property of
"last_timeline_request", but that of the caller.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Print error state times relative to capture
Using plain jiffies in error state output makes the output
time differences relative to the current system time. This
is wrong as it makes output time differences dependent
of when the error state is printed rather than when it is
captured.
Store capture jiffies into error state and use it
when outputting the state to fix time differences output.
v2: use engine timestamp as epoch, output formatting (Chris)
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gpu_error.c | 48 +--
drivers/gpu/drm/i915/i915_gpu_error.h | 2 ++
2 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 671ffa37614e..fca550954be0 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -403,16 +403,17 @@ static const char *bannable(const struct
drm_i915_error_context *ctx)
}
static void error_print_request(struct drm_i915_error_state_buf *m,
+ const struct i915_gpu_state *error,
const char *prefix,
const struct drm_i915_error_request *erq)
{
if (!erq->seqno)
return;
- err_printf(m, "%s pid %d, ban score %d, seqno %8x:%08x, prio %d,
emitted %dms ago, head %08x, tail %08x\n",
+ err_printf(m, "%s pid %d, ban score %d, seqno %8x:%08x, prio %d,
emitted %dms, head %08x, tail %08x\n",
prefix, erq->pid, erq->ban_score,
erq->context, erq->seqno, erq->sched_attr.priority,
- jiffies_to_msecs(jiffies - erq->jiffies),
+ jiffies_to_msecs(erq->jiffies - error->epoch),
erq->head, erq->tail);
}
@@ -427,8 +428,10 @@ static void error_print_context(struct
drm_i915_error_state_buf *m,
}
static void error_print_engine(struct drm_i915_error_state_buf *m,
- const struct drm_i915_error_engine *ee)
+ const struct i915_gpu_state *error,
+ const int engine_n)
{
+ const struct drm_i915_error_engine *ee = &error->engine[engine_n];
int n;
err_printf(m, "%s command stream:\n",
@@ -497,14 +500,18 @@ static void error_print_engine(struct
drm_i915_error_state_buf *m,
err_printf(m, " hangcheck stall: %s\n", yesno(ee->hangcheck_stalled));
err_printf(m, " hangcheck action: %s\n",
hangcheck_action_to_str(ee->hangcheck_action));
- err_printf(m, " hangcheck action timestamp: %lu, %u ms ago\n",
+
+ err_printf(m, " hangcheck action timestamp: %dms (%lu%s)\n",
+ jiffies_to_msecs(ee->hangcheck_timestamp -
+ error->epoch),
ee->hangcheck_timestamp,
- jiffies_to_msecs(jiffies - ee->hangcheck_timestamp));
+ ee->hangcheck_timestamp == error->epoch ? "; epoch" : "");
+
err_printf(m, " engine reset count: %u\n", ee->reset_count);
for (n = 0; n < ee->num_ports; n++) {
err_printf(m, " ELSP[%d]:", n);
- error_print_request(m, " ", &ee->execlist[n]);
+ error_print_request(m, error, " ", &ee->execlist[n]);
}
error_print_context(m, " Active context: ", &ee->context);
@@ -650,6 +657,11 @@ int i915_error_state_to_str(struct
drm_i915_error_state_buf *m,
ts = ktime_to_timespec64(error->uptime);
err_printf(m, "Uptime: %lld s %ld us\n",
(s64)ts.tv_sec, ts.tv_nsec / NSEC_PER_USEC);
+ err_printf(m, "Epoch: %lu jiffies (%u HZ)\n", error->epoch, HZ);
+ err_printf(m, "Capture: %lu jiffies; %d ms ago, %d ms after epoch\n",
+ error->capture,
+ jiffies_to_msecs(jiffies - error->capture),
+ jiffies_to_msecs(error->capture - error->epoch));
for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
if (error->engine[i].hangcheck_stalled &&
@@ -710,7 +722,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf
*m,
for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
if (error->engine[i].engine_id != -1)
- error_print_engine(m, &error->engine[i]);
+ error_print_engine(m, error, i);
}
for (i = 0; i < ARRAY_SIZE(error->active_vm); i++) {
@@ -769,7 +781,8 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf
*m,
dev_priv->engine[i]->name,
ee->num_requests);
for (j = 0; j < ee->num_requests; j++)
- error_print_request(m, " ", &ee->requests[j]);
+ error_print_request(m, error, " ",
+ &ee->requests[j]);
}
Re: [Intel-gfx] [PATCH] drm/i915: Print error state times relative to capture
Quoting Mika Kuoppala (2018-04-27 16:12:48) > @@ -427,8 +428,10 @@ static void error_print_context(struct > drm_i915_error_state_buf *m, > } > > static void error_print_engine(struct drm_i915_error_state_buf *m, > - const struct drm_i915_error_engine *ee) > + const struct i915_gpu_state *error, > + const int engine_n) Make it pass in the error_engine again, and Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 7/7] drm/i915: Lazily unbind vma on close
On 26/04/2018 18:49, Chris Wilson wrote:
When userspace is passing around swapbuffers using DRI, we frequently
have to open and close the same object in the foreign address space.
This shows itself as the same object being rebound at roughly 30fps
(with a second object also being rebound at 30fps), which involves us
having to rewrite the page tables and maintain the drm_mm range manager
every time.
However, since the object still exists and it is only the local handle
that disappears, if we are lazy and do not unbind the VMA immediately
when the local user closes the object but defer it until the GPU is
idle, then we can reuse the same VMA binding. We still have to be
careful to mark the handle and lookup tables as closed to maintain the
uABI, just allowing the underlying VMA to be resurrected if the user is
able to access the same object from the same context again.
If the object itself is destroyed (neither userspace keeping a handle to
it), the VMA will be reaped immediately as usual.
In the future, this will be even more useful as instantiating a new VMA
for use on the GPU will become heavier. A nuisance indeed, so nip it in
the bud.
v2: s/__i915_vma_final_close/i915_vma_destroy/ etc.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 4 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c| 3 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++--
drivers/gpu/drm/i915/i915_vma.c | 61 +--
drivers/gpu/drm/i915/i915_vma.h | 6 ++
drivers/gpu/drm/i915/selftests/huge_pages.c | 2 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 1 +
8 files changed, 67 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dab15b6abc3c..d4da9f941d04 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2061,6 +2061,7 @@ struct drm_i915_private {
struct list_head timelines;
struct list_head active_rings;
+ struct list_head closed_vma;
u32 active_requests;
u32 request_serial;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 484354f25f98..5ece6ae4bdff 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -165,6 +165,7 @@ static u32 __i915_gem_park(struct drm_i915_private *i915)
i915_timelines_park(i915);
i915_pmu_gt_parked(i915);
+ i915_vma_parked(i915);
i915->gt.awake = false;
@@ -4795,7 +4796,7 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915,
&obj->vma_list, obj_link) {
GEM_BUG_ON(i915_vma_is_active(vma));
vma->flags &= ~I915_VMA_PIN_MASK;
- i915_vma_close(vma);
+ i915_vma_destroy(vma);
}
GEM_BUG_ON(!list_empty(&obj->vma_list));
GEM_BUG_ON(!RB_EMPTY_ROOT(&obj->vma_tree));
@@ -5598,6 +5599,7 @@ int i915_gem_init_early(struct drm_i915_private *dev_priv)
INIT_LIST_HEAD(&dev_priv->gt.timelines);
INIT_LIST_HEAD(&dev_priv->gt.active_rings);
+ INIT_LIST_HEAD(&dev_priv->gt.closed_vma);
i915_gem_init__mm(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c74f5df3fb5a..f627a8c47c58 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -762,7 +762,8 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
}
/* transfer ref to ctx */
- vma->open_count++;
+ if (!vma->open_count++)
+ i915_vma_reopen(vma);
So only execbuf path gets to be able to reopen the VMA? I assume this is
sufficient for the use case commit message describes? Other potential
use cases are not interesting?
list_add(&lut->obj_link, &obj->lut_list);
list_add(&lut->ctx_link, &eb->ctx->handles_list);
lut->ctx = eb->ctx;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e9d828324f67..272d6bb407cc 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2218,6 +2218,12 @@ i915_ppgtt_create(struct drm_i915_private *dev_priv,
}
void i915_ppgtt_close(struct i915_address_space *vm)
+{
+ GEM_BUG_ON(vm->closed);
+ vm->closed = true;
+}
+
+static void ppgtt_destroy_vma(struct i915_address_space *vm)
{
struct list_head *phases[] = {
&vm->active_list,
@@ -2226,15 +2232,12 @@ void i915_ppgtt_close(struct i915_address_space *vm)
NULL,
}, **phase;
- GEM_BUG_ON(vm->closed);
vm->closed = true;
There are no more re
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Print error state times relative to capture (rev2)
== Series Details == Series: drm/i915: Print error state times relative to capture (rev2) URL : https://patchwork.freedesktop.org/series/41749/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4108 -> Patchwork_8827 = == Summary - WARNING == Minor unknown changes coming with Patchwork_8827 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8827, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/41749/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8827: === IGT changes === Warnings igt@gem_exec_gttfill@basic: fi-pnv-d510:SKIP -> PASS igt@kms_frontbuffer_tracking@basic: fi-bsw-n3050: SKIP -> PASS +12 == Known issues == Here are the changes found in Patchwork_8827 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-cnl-y3: PASS -> DMESG-WARN (fdo#104951) Possible fixes igt@gem_sync@basic-each: fi-bsw-n3050: DMESG-FAIL -> PASS igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: fi-bsw-n3050: FAIL -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-bsw-n3050: DMESG-WARN -> PASS fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4108 -> Patchwork_8827 CI_DRM_4108: 6270f64d10649baff02ae464542f185476a6f652 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8827: 838bd2331dc3bcd184f98d9b13b02d2cca5d13bf @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 838bd2331dc3 drm/i915: Print error state times relative to capture == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8827/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 7/7] drm/i915: Lazily unbind vma on close
Quoting Tvrtko Ursulin (2018-04-27 16:38:47)
>
> On 26/04/2018 18:49, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > index c74f5df3fb5a..f627a8c47c58 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > @@ -762,7 +762,8 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
> > }
> >
> > /* transfer ref to ctx */
> > - vma->open_count++;
> > + if (!vma->open_count++)
> > + i915_vma_reopen(vma);
>
> So only execbuf path gets to be able to reopen the VMA? I assume this is
> sufficient for the use case commit message describes? Other potential
> use cases are not interesting?
It's the only generator/consumer of user vma. Everything else is the
global gtt. Think PIN_USER vs PIN_GLOBAL.
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index e9d828324f67..272d6bb407cc 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -2218,6 +2218,12 @@ i915_ppgtt_create(struct drm_i915_private *dev_priv,
> > }
> >
> > void i915_ppgtt_close(struct i915_address_space *vm)
> > +{
> > + GEM_BUG_ON(vm->closed);
> > + vm->closed = true;
> > +}
> > +
> > +static void ppgtt_destroy_vma(struct i915_address_space *vm)
> > {
> > struct list_head *phases[] = {
> > &vm->active_list,
> > @@ -2226,15 +2232,12 @@ void i915_ppgtt_close(struct i915_address_space *vm)
> > NULL,
> > }, **phase;
> >
> > - GEM_BUG_ON(vm->closed);
> > vm->closed = true;
>
> There are no more references at this point so no need to mark it as
> closed I think.
It's a trick for a quicker i915_vma_unbind that skips the PTE updates as
we know the ppgtt is being torn down.
> > -static void i915_vma_destroy(struct i915_vma *vma)
> > +void i915_vma_close(struct i915_vma *vma)
> > +{
> > + lockdep_assert_held(&vma->vm->i915->drm.struct_mutex);
> > +
> > + GEM_BUG_ON(i915_vma_is_closed(vma));
>
> I think the VMA code has gotten pretty messy. For instance a couple of
> external callers of is_vma_closed feel out of place. Like they should
> try to do what ever they want with the VMA, say pin it, or close it, and
> then that operation should either fail or handle the fact, respectively.
> But just another grumble at this point.
But closing twice would be weird. The assert is here because the code as
is would be broken if called twice.
> > + vma->flags |= I915_VMA_CLOSED;
> > +
> > + list_add_tail(&vma->closed_link, &vma->vm->i915->gt.closed_vma);
> > +}
>
> I think a comment next to this function might be good, doesn't have to
> be long, just to mention the rationale behind lazy unbind/destroy. Just
> because often after refactorings and code churn it is difficult to find
> the commit associated with some logical piece of the code.
>
> > +
> > +void i915_vma_reopen(struct i915_vma *vma)
> > +{
> > + lockdep_assert_held(&vma->vm->i915->drm.struct_mutex);
> > +
> > + if (vma->flags & I915_VMA_CLOSED) {
> > + vma->flags &= ~I915_VMA_CLOSED;
> > + list_del(&vma->closed_link);
> > + }
> > +}
>
> And then continuing the grumble, this helper wouldn't be needed. If
> someone had a vlaid vma reference, and tried to do something meaningful
> wiht it, the vma code would re-open it under the covers.
Oh no, no, no, no ;)
Magically reappearing vma reeks of uabi exposure.
> > diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> > b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> > index a662c0450e77..4b6622c6986a 100644
> > --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> > +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> > @@ -226,6 +226,7 @@ struct drm_i915_private *mock_gem_device(void)
> >
> > INIT_LIST_HEAD(&i915->gt.timelines);
> > INIT_LIST_HEAD(&i915->gt.active_rings);
> > + INIT_LIST_HEAD(&i915->gt.closed_vma);
> >
> > mutex_lock(&i915->drm.struct_mutex);
> > mock_init_ggtt(i915);
> >
>
> Only two actionable things AFAIR. Then it looks OK to me. Although I
> would a) see if you can get Joonas to read through it - perhaps he spots
> something I missed, and b) ah no, won't mention any pencilling in of
> looking at overall vma handling in the future.
You would only have to read it and execbuffer.c again :-p
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH igt 0/8] Non-Intel test suite fixes
Hi Ulrich, On Thursday, 15 March 2018 16:45:36 EEST Ulrich Hecht wrote: > Hi! > > I have run the tests on a Renesas R-Car M3-W's DU device, and have found a > number of false negatives that mostly stem from use of Intel-specifics > without checking if that makes sense first. So here's a bunch of fixes for > those, hope they are generic enough for upstreaming. I'm looking for instructions on how to compile and use igt on elinux.org but can't find them. Could you please point me to the relevant page ? Also, what are your plans to get those patches merged upstream ? > Ulrich Hecht (8): > tests/kms_addfb_basic: skip i915-specific tests on other platforms > tests/kms_panel_fitting: check for i915 before checking version > lib/igt_gt: has_gpu_reset(): fix failed assertion on non-i915 > platforms > lib/igt_gt: check for presence of GPU reset before using it > tests/kms_plane_lowres: skip i915-specific tests on other platforms > lib/igt_pm: turn absence of autosuspend_delay_ms from fail to skip > tests/kms_addfb_basic: size_tests(): reduce test buffer size > test/kms_addfb_basic: tolerate absence of 8-bit format > > lib/igt_gt.c | 24 ++-- > lib/igt_pm.c | 2 +- > tests/kms_addfb_basic.c | 33 ++--- > tests/kms_panel_fitting.c | 1 + > tests/kms_plane_lowres.c | 1 + > 5 files changed, 35 insertions(+), 26 deletions(-) -- Regards, Laurent Pinchart ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Promote .format_mod_supported() to the lead role
On Fri, Mar 30, 2018 at 12:06:11PM -0700, Eric Anholt wrote:
> Ville Syrjala writes:
>
> > From: Ville Syrjälä
> >
> > Up to now we've used the plane's modifier list as the primary
> > source of information for which modifiers are supported by a
> > given plane. In order to allow auxiliary metadata to be embedded
> > within the bits of the modifier we need to stop doing that.
> >
> > Thus we have to make .format_mod_supported() aware of the plane's
> > capabilities and gracefully deal with any modifier being passed
> > in directly from userspace.
>
> I took a look, and I think you have the chance to delete a whole ton of
> code if you keep the assumption that the core will check that the format
> is one of plane->format_types.
I'm not particularly happy about splitting the roles that way. Makes it
harder to figure out what exactly is supported when you have to go look
at two different sources of information.
But I do agree that the duplication isn't all that nice either. I was
actually wondering whether I could just remove the format/modifier
arrays entirely and rely purely on .format_mod_supported(). But I guess
I'd have to at least keep one set of arrays to give the core something
which it could use when calling .format_mod_supported(). So I'd have to
at least keep one of each array, and just make them the superset of all
supported format/modifiers between all the platform we have in i915.
>
> >
> > Cc: Eric Anholt
> > References:
> > https://lists.freedesktop.org/archives/dri-devel/2018-March/169782.html
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 147 +++---
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_sprite.c | 194
> > ++-
> > 3 files changed, 210 insertions(+), 132 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 3e7ab75e1b41..d717004be0b8 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -88,15 +88,7 @@ static const uint32_t skl_primary_formats[] = {
> > DRM_FORMAT_VYUY,
> > };
> >
> > -static const uint64_t skl_format_modifiers_noccs[] = {
> > - I915_FORMAT_MOD_Yf_TILED,
> > - I915_FORMAT_MOD_Y_TILED,
> > - I915_FORMAT_MOD_X_TILED,
> > - DRM_FORMAT_MOD_LINEAR,
> > - DRM_FORMAT_MOD_INVALID
> > -};
> > -
> > -static const uint64_t skl_format_modifiers_ccs[] = {
> > +static const uint64_t skl_format_modifiers[] = {
> > I915_FORMAT_MOD_Yf_TILED_CCS,
> > I915_FORMAT_MOD_Y_TILED_CCS,
> > I915_FORMAT_MOD_Yf_TILED,
> > @@ -12997,8 +12989,17 @@ void intel_plane_destroy(struct drm_plane *plane)
> > kfree(to_intel_plane(plane));
> > }
> >
> > -static bool i8xx_mod_supported(uint32_t format, uint64_t modifier)
> > +static bool i8xx_plane_format_mod_supported(struct drm_plane *_plane,
> > + u32 format, u64 modifier)
> > {
> > + switch (modifier) {
> > + case DRM_FORMAT_MOD_LINEAR:
> > + case I915_FORMAT_MOD_X_TILED:
> > + break;
> > + default:
> > + return false;
> > + }
> > +
>
> I think you could just remove the format-dependent switch below in favor
> of s/break/return true/. It's just a list of all the formats in
> i8xx_primary_formats[].
>
> > switch (format) {
> > case DRM_FORMAT_C8:
> > case DRM_FORMAT_RGB565:
> > @@ -13011,8 +13012,17 @@ static bool i8xx_mod_supported(uint32_t format,
> > uint64_t modifier)
> > }
> > }
> >
> > -static bool i965_mod_supported(uint32_t format, uint64_t modifier)
> > +static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
> > + u32 format, u64 modifier)
> > {
> > + switch (modifier) {
> > + case DRM_FORMAT_MOD_LINEAR:
> > + case I915_FORMAT_MOD_X_TILED:
> > + break;
> > + default:
> > + return false;
> > + }
>
> Again, there's no format dependence, so drop the switch statement, and
> probably just reuse the mod_supported func from 8xx.
>
> > +
> > switch (format) {
> > case DRM_FORMAT_C8:
> > case DRM_FORMAT_RGB565:
> > @@ -13027,17 +13037,37 @@ static bool i965_mod_supported(uint32_t format,
> > uint64_t modifier)
> > }
> > }
> >
> > -static bool skl_mod_supported(uint32_t format, uint64_t modifier)
> > +static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
> > + u32 format, u64 modifier)
> > {
> > + struct intel_plane *plane = to_intel_plane(_plane);
> > +
> > + switch (modifier) {
> > + case DRM_FORMAT_MOD_LINEAR:
> > + case I915_FORMAT_MOD_X_TILED:
> > + case I915_FORMAT_MOD_Y_TILED:
> > + case I915_FORMAT_MOD_Yf_TILED:
> > + break;
> > + case I915_FORMAT_MOD_Y_TILED_CCS:
> > + case I915_FORMAT_MOD_Yf_TILED_CCS:
> > + if (!plane->has_ccs)
> > + return false;
> >
[Intel-gfx] ✓ Fi.CI.IGT: success for Aspect ratio support in DRM layer
== Series Details == Series: Aspect ratio support in DRM layer URL : https://patchwork.freedesktop.org/series/42403/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4107_full -> Patchwork_8824_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8824_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8824_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42403/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8824_full: === IGT changes === Warnings igt@kms_draw_crc@fill-fb: shard-snb: PASS -> SKIP +2 igt@kms_flip@flip-vs-fences: shard-kbl: PASS -> SKIP +36 == Known issues == Here are the changes found in Patchwork_8824_full that come from known issues: === IGT changes === Issues hit igt@gem_softpin@noreloc-s3: shard-kbl: PASS -> DMESG-WARN (fdo#103558) igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +6 igt@kms_flip@2x-dpms-vs-vblank-race: shard-hsw: PASS -> FAIL (fdo#103060) igt@kms_flip@dpms-vs-vblank-race-interruptible: shard-glk: PASS -> FAIL (fdo#103060) Possible fixes igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: FAIL (fdo#105767) -> PASS igt@kms_flip@2x-plain-flip-ts-check: shard-hsw: FAIL (fdo#100368) -> PASS igt@kms_flip@blocking-wf_vblank: shard-hsw: FAIL (fdo#103928) -> PASS igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-hsw: FAIL (fdo#105707) -> PASS shard-glk: FAIL (fdo#105363) -> PASS igt@kms_setmode@basic: shard-hsw: FAIL (fdo#99912) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (9 -> 8) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8824 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8824: 1cccf4dbbdca46f5654de3cf3e308ad775fe2a46 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8824/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 3/4] drm/i915: Retire requests along rings
In the next patch, rings are the central timeline as requests may jump
between engines. Therefore in the future as we retire in order along the
engine timeline, we may retire out-of-order within a ring (as the ring now
occurs along multiple engines), leading to much hilarity in miscomputing
the position of ring->head.
As an added bonus, retiring along the ring reduces the penalty of having
one execlists client do cleanup for another (old legacy submission
shares a ring between all clients). The downside is that slow and
irregular (off the critical path) process of cleaning up stale requests
after userspace becomes a modicum less efficient.
In the long run, it will become apparent that the ordered
ring->request_list matches the ring->timeline, a fun challenge for the
future will be unifying the two lists to avoid duplication!
v2: We need both engine-order and ring-order processing to maintain our
knowledge of where individual rings have completed upto as well as
knowing what was last executing on any engine. And finally by decoupling
retiring the contexts on the engine and the timelines along the rings,
we do have to keep a reference to the context on each request
(previously it was guaranteed by the context being pinned).
v3: Not just a reference to the context, but we need to keep it pinned
as we manipulate the rings; i.e. we need a pin for both the manipulation
of the engine state during its retirements, and a separate pin for the
manipulation of the ring state.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_gem.c | 1 +
drivers/gpu/drm/i915/i915_request.c | 150 +++---
drivers/gpu/drm/i915/i915_utils.h | 6 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
drivers/gpu/drm/i915/selftests/mock_engine.c | 27 +++-
.../gpu/drm/i915/selftests/mock_gem_device.c | 2 +
8 files changed, 131 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8fd9fb6efba5..1837c01d44d0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2058,8 +2058,9 @@ struct drm_i915_private {
void (*resume)(struct drm_i915_private *);
void (*cleanup_engine)(struct intel_engine_cs *engine);
- struct list_head timelines;
struct i915_gem_timeline global_timeline;
+ struct list_head timelines;
+ struct list_head rings;
u32 active_requests;
u32 request_serial;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4090bfdda340..f0644d1fbd75 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5600,6 +5600,7 @@ int i915_gem_init_early(struct drm_i915_private *dev_priv)
goto err_dependencies;
mutex_lock(&dev_priv->drm.struct_mutex);
+ INIT_LIST_HEAD(&dev_priv->gt.rings);
INIT_LIST_HEAD(&dev_priv->gt.timelines);
err = i915_gem_timeline_init__global(dev_priv);
mutex_unlock(&dev_priv->drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 9358f2cf0c32..e6535255d445 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -286,6 +286,7 @@ static int reserve_gt(struct drm_i915_private *i915)
static void unreserve_gt(struct drm_i915_private *i915)
{
+ GEM_BUG_ON(!i915->gt.active_requests);
if (!--i915->gt.active_requests)
i915_gem_park(i915);
}
@@ -298,6 +299,7 @@ void i915_gem_retire_noop(struct i915_gem_active *active,
static void advance_ring(struct i915_request *request)
{
+ struct intel_ring *ring = request->ring;
unsigned int tail;
/*
@@ -309,7 +311,8 @@ static void advance_ring(struct i915_request *request)
* Note this requires that we are always called in request
* completion order.
*/
- if (list_is_last(&request->ring_link, &request->ring->request_list)) {
+ GEM_BUG_ON(!list_is_first(&request->ring_link, &ring->request_list));
+ if (list_is_last(&request->ring_link, &ring->request_list)) {
/*
* We may race here with execlists resubmitting this request
* as we retire it. The resubmission will move the ring->tail
@@ -322,9 +325,9 @@ static void advance_ring(struct i915_request *request)
} else {
tail = request->postfix;
}
- list_del(&request->ring_link);
+ list_del_init(&request->ring_link);
- request->ring->head = tail;
+ ring->head = tail;
}
static void free_capture_list(struct i915_request *request)
@@ -340,30 +343,84 @@ static void free_capture_list(struct
[Intel-gfx] [CI 1/4] drm/i915: Stop tracking timeline->inflight_seqnos
In commit 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine"), we
moved from a global inflight counter to per-engine counters in the
hope that will be easy to run concurrently in future. However, with the
advent of the desire to move requests between engines, we do need a
global counter to preserve the semantics that no engine wraps in the
middle of a submit. (Although this semantic is now only required for gen7
semaphore support, which only supports greater-then comparisons!)
v2: Keep a global counter of all requests ever submitted and force the
reset when it wraps.
References: 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 5 ++--
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem_timeline.h | 6 -
drivers/gpu/drm/i915/i915_request.c | 33
drivers/gpu/drm/i915/intel_engine_cs.c | 5 ++--
5 files changed, 22 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index cb1a804bf72e..747dad2666aa 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1340,10 +1340,9 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
struct rb_node *rb;
seq_printf(m, "%s:\n", engine->name);
- seq_printf(m, "\tseqno = %x [current %x, last %x], inflight
%d\n",
+ seq_printf(m, "\tseqno = %x [current %x, last %x]\n",
engine->hangcheck.seqno, seqno[id],
- intel_engine_last_submit(engine),
- engine->timeline->inflight_seqnos);
+ intel_engine_last_submit(engine));
seq_printf(m, "\twaiters? %s, fake irq active? %s, stalled?
%s\n",
yesno(intel_engine_has_waiter(engine)),
yesno(test_bit(engine->id,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8444ca8d5aa3..8fd9fb6efba5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2061,6 +2061,7 @@ struct drm_i915_private {
struct list_head timelines;
struct i915_gem_timeline global_timeline;
u32 active_requests;
+ u32 request_serial;
/**
* Is the GPU currently considered idle, or busy executing
diff --git a/drivers/gpu/drm/i915/i915_gem_timeline.h
b/drivers/gpu/drm/i915/i915_gem_timeline.h
index 33e01bf6aa36..6e82119e2cd8 100644
--- a/drivers/gpu/drm/i915/i915_gem_timeline.h
+++ b/drivers/gpu/drm/i915/i915_gem_timeline.h
@@ -37,12 +37,6 @@ struct intel_timeline {
u64 fence_context;
u32 seqno;
- /**
-* Count of outstanding requests, from the time they are constructed
-* to the moment they are retired. Loosely coupled to hardware.
-*/
- u32 inflight_seqnos;
-
spinlock_t lock;
/**
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index b692a9f7c357..b1993d4a1a53 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -241,6 +241,7 @@ static int reset_all_global_seqno(struct drm_i915_private
*i915, u32 seqno)
sizeof(timeline->engine[id].global_sync));
}
+ i915->gt.request_serial = seqno;
return 0;
}
@@ -257,18 +258,22 @@ int i915_gem_set_global_seqno(struct drm_device *dev, u32
seqno)
return reset_all_global_seqno(i915, seqno - 1);
}
-static int reserve_engine(struct intel_engine_cs *engine)
+static int reserve_gt(struct drm_i915_private *i915)
{
- struct drm_i915_private *i915 = engine->i915;
- u32 active = ++engine->timeline->inflight_seqnos;
- u32 seqno = engine->timeline->seqno;
int ret;
- /* Reservation is fine until we need to wrap around */
- if (unlikely(add_overflows(seqno, active))) {
+ /*
+* Reservation is fine until we may need to wrap around
+*
+* By incrementing the serial for every request, we know that no
+* individual engine may exceed that serial (as each is reset to 0
+* on any wrap). This protects even the most pessimistic of migrations
+* of every request from all engines onto just one.
+*/
+ while (unlikely(++i915->gt.request_serial == 0)) {
ret = reset_all_global_seqno(i915, 0);
if (ret) {
- engine->timeline->inflight_seqnos--;
+ i915->gt.request_serial--;
return ret;
}
}
@@ -279,15 +284,10 @@ static int reserve_engine(struct intel_engine_cs *engine)
return 0;
}
-static void unreserve_engine(
[Intel-gfx] [CI 2/4] drm/i915: Wrap engine->context_pin() and engine->context_unpin()
Make life easier in upcoming patches by moving the context_pin and
context_unpin vfuncs into inline helpers.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gvt/mmio_context.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.c | 20 ++---
drivers/gpu/drm/i915/i915_debugfs.c | 20 +++--
drivers/gpu/drm/i915/i915_gem.c | 4 +--
drivers/gpu/drm/i915/i915_gem_context.c | 8 +++---
drivers/gpu/drm/i915/i915_gem_context.h | 30 +++-
drivers/gpu/drm/i915/i915_gpu_error.c| 3 +-
drivers/gpu/drm/i915/i915_perf.c | 9 +++---
drivers/gpu/drm/i915/i915_request.c | 6 ++--
drivers/gpu/drm/i915/intel_engine_cs.c | 13 -
drivers/gpu/drm/i915/intel_guc_ads.c | 3 +-
drivers/gpu/drm/i915/intel_guc_submission.c | 5 ++--
drivers/gpu/drm/i915/intel_lrc.c | 29 +++
drivers/gpu/drm/i915/intel_lrc.h | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 19 +++--
drivers/gpu/drm/i915/selftests/mock_engine.c | 2 +-
16 files changed, 108 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c
b/drivers/gpu/drm/i915/gvt/mmio_context.c
index a5bac83d53a9..0f949554d118 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -448,7 +448,7 @@ static void switch_mocs(struct intel_vgpu *pre, struct
intel_vgpu *next,
bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id)
{
- u32 *reg_state = ctx->engine[ring_id].lrc_reg_state;
+ u32 *reg_state = ctx->__engine[ring_id].lrc_reg_state;
u32 inhibit_mask =
_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
b/drivers/gpu/drm/i915/gvt/scheduler.c
index 35f7cfd7a6b4..ffb45a9ee228 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -58,7 +58,7 @@ static void update_shadow_pdps(struct intel_vgpu_workload
*workload)
int ring_id = workload->ring_id;
struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
struct drm_i915_gem_object *ctx_obj =
- shadow_ctx->engine[ring_id].state->obj;
+ shadow_ctx->__engine[ring_id].state->obj;
struct execlist_ring_context *shadow_ring_context;
struct page *page;
@@ -130,7 +130,7 @@ static int populate_shadow_context(struct
intel_vgpu_workload *workload)
int ring_id = workload->ring_id;
struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
struct drm_i915_gem_object *ctx_obj =
- shadow_ctx->engine[ring_id].state->obj;
+ shadow_ctx->__engine[ring_id].state->obj;
struct execlist_ring_context *shadow_ring_context;
struct page *page;
void *dst;
@@ -283,7 +283,7 @@ static int shadow_context_status_change(struct
notifier_block *nb,
static void shadow_context_descriptor_update(struct i915_gem_context *ctx,
struct intel_engine_cs *engine)
{
- struct intel_context *ce = &ctx->engine[engine->id];
+ struct intel_context *ce = to_intel_context(ctx, engine);
u64 desc = 0;
desc = ce->lrc_desc;
@@ -389,7 +389,7 @@ int intel_gvt_scan_and_shadow_workload(struct
intel_vgpu_workload *workload)
* shadow_ctx pages invalid. So gvt need to pin itself. After update
* the guest context, gvt can unpin the shadow_ctx safely.
*/
- ring = engine->context_pin(engine, shadow_ctx);
+ ring = intel_context_pin(shadow_ctx, engine);
if (IS_ERR(ring)) {
ret = PTR_ERR(ring);
gvt_vgpu_err("fail to pin shadow context\n");
@@ -403,7 +403,7 @@ int intel_gvt_scan_and_shadow_workload(struct
intel_vgpu_workload *workload)
return 0;
err_unpin:
- engine->context_unpin(engine, shadow_ctx);
+ intel_context_unpin(shadow_ctx, engine);
err_shadow:
release_shadow_wa_ctx(&workload->wa_ctx);
err_scan:
@@ -437,7 +437,7 @@ static int intel_gvt_generate_request(struct
intel_vgpu_workload *workload)
return 0;
err_unpin:
- engine->context_unpin(engine, shadow_ctx);
+ intel_context_unpin(shadow_ctx, engine);
release_shadow_wa_ctx(&workload->wa_ctx);
return ret;
}
@@ -526,7 +526,7 @@ static int update_wa_ctx_2_shadow_ctx(struct
intel_shadow_wa_ctx *wa_ctx)
struct intel_vgpu_submission *s = &workload->vgpu->submission;
struct i915_gem_context *shadow_ctx = s->shadow_ctx;
struct drm_i915_gem_object *ctx_obj =
- shadow_ctx->engine[ring_id].state->obj;
+ shadow_ctx->__engine[ring_id].state->obj;
struct execlist_ring_context *shadow_ring_context;
struct page *page;
@@ -688,7 +688,7 @@ static int dispatch_workload(struct intel_vgpu_workload
*workload)
[Intel-gfx] [CI 4/4] drm/i915: Only track live rings for retiring
We don't need to track every ring for its lifetime as they are managed
by the contexts/engines. What we do want to track are the live rings so
that we can sporadically clean up requests if userspace falls behind. We
can simply restrict the gt->rings list to being only gt->live_rings.
v2: s/live/active/ for consistency with gt.active_requests
Suggested-by: Tvrtko Ursulin
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 3 ++-
drivers/gpu/drm/i915/i915_gem.c | 6 --
drivers/gpu/drm/i915/i915_request.c | 10 --
drivers/gpu/drm/i915/intel_ringbuffer.c | 4
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
drivers/gpu/drm/i915/selftests/mock_engine.c | 4
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 5 +++--
7 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1837c01d44d0..54351cace362 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2060,7 +2060,8 @@ struct drm_i915_private {
struct i915_gem_timeline global_timeline;
struct list_head timelines;
- struct list_head rings;
+
+ struct list_head active_rings;
u32 active_requests;
u32 request_serial;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f0644d1fbd75..fa1d94a4eb5f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -141,6 +141,7 @@ static u32 __i915_gem_park(struct drm_i915_private *i915)
{
lockdep_assert_held(&i915->drm.struct_mutex);
GEM_BUG_ON(i915->gt.active_requests);
+ GEM_BUG_ON(!list_empty(&i915->gt.active_rings));
if (!i915->gt.awake)
return I915_EPOCH_INVALID;
@@ -5599,9 +5600,10 @@ int i915_gem_init_early(struct drm_i915_private
*dev_priv)
if (!dev_priv->priorities)
goto err_dependencies;
- mutex_lock(&dev_priv->drm.struct_mutex);
- INIT_LIST_HEAD(&dev_priv->gt.rings);
INIT_LIST_HEAD(&dev_priv->gt.timelines);
+ INIT_LIST_HEAD(&dev_priv->gt.active_rings);
+
+ mutex_lock(&dev_priv->drm.struct_mutex);
err = i915_gem_timeline_init__global(dev_priv);
mutex_unlock(&dev_priv->drm.struct_mutex);
if (err)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index e6535255d445..c8fc4b323e62 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -322,6 +322,7 @@ static void advance_ring(struct i915_request *request)
* noops - they are safe to be replayed on a reset.
*/
tail = READ_ONCE(request->tail);
+ list_del(&ring->active_link);
} else {
tail = request->postfix;
}
@@ -1096,6 +1097,8 @@ void __i915_request_add(struct i915_request *request,
bool flush_caches)
i915_gem_active_set(&timeline->last_request, request);
list_add_tail(&request->ring_link, &ring->request_list);
+ if (list_is_first(&request->ring_link, &ring->request_list))
+ list_add(&ring->active_link, &request->i915->gt.active_rings);
request->emitted_jiffies = jiffies;
/*
@@ -1418,14 +1421,17 @@ static void ring_retire_requests(struct intel_ring
*ring)
void i915_retire_requests(struct drm_i915_private *i915)
{
- struct intel_ring *ring, *next;
+ struct intel_ring *ring, *tmp;
lockdep_assert_held(&i915->drm.struct_mutex);
if (!i915->gt.active_requests)
return;
- list_for_each_entry_safe(ring, next, &i915->gt.rings, link)
+ /* An outstanding request must be on a still active ring somewhere */
+ GEM_BUG_ON(list_empty(&i915->gt.active_rings));
+
+ list_for_each_entry_safe(ring, tmp, &i915->gt.active_rings, active_link)
ring_retire_requests(ring);
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ae8958007df5..007449cfa22b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1150,8 +1150,6 @@ intel_engine_create_ring(struct intel_engine_cs *engine,
int size)
}
ring->vma = vma;
- list_add(&ring->link, &engine->i915->gt.rings);
-
return ring;
}
@@ -1163,8 +1161,6 @@ intel_ring_free(struct intel_ring *ring)
i915_vma_close(ring->vma);
__i915_gem_object_release_unless_active(obj);
- list_del(&ring->link);
-
kfree(ring);
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index deb80d01e0bd..fd679cec9ac6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/int
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Stop tracking
timeline->inflight_seqnos
URL : https://patchwork.freedesktop.org/series/42419/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f4428c86a843 drm/i915: Stop tracking timeline->inflight_seqnos
-:17: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9b6586ae9f6b ("drm/i915: Keep a
global seqno per-engine")'
#17:
References: 9b6586ae9f6b ("drm/i915: Keep a global seqno per-engine")
total: 1 errors, 0 warnings, 0 checks, 128 lines checked
ebb9041fab71 drm/i915: Wrap engine->context_pin() and engine->context_unpin()
cecb26fc1ca0 drm/i915: Retire requests along rings
13efbe7394fa drm/i915: Only track live rings for retiring
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42419/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Stop tracking timeline->inflight_seqnos -O:drivers/gpu/drm/i915/i915_request.c:268:13: error: undefined identifier '__builtin_add_overflow_p' -O:drivers/gpu/drm/i915/i915_request.c:268:13: warning: call with no type! -drivers/gpu/drm/i915/selftests/../i915_drv.h:2211:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3659:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) Commit: drm/i915: Wrap engine->context_pin() and engine->context_unpin() Okay! Commit: drm/i915: Retire requests along rings -drivers/gpu/drm/i915/selftests/../i915_drv.h:2212:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3660:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3661:16: warning: expression using sizeof(void) Commit: drm/i915: Only track live rings for retiring -drivers/gpu/drm/i915/selftests/../i915_drv.h:2213:33: warning: constant 0xea00 is so big it is unsigned long -drivers/gpu/drm/i915/selftests/../i915_drv.h:3661:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:2214:33: warning: constant 0xea00 is so big it is unsigned long +drivers/gpu/drm/i915/selftests/../i915_drv.h:3662:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42419/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4108 -> Patchwork_8828 = == Summary - WARNING == Minor unknown changes coming with Patchwork_8828 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8828, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42419/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8828: === IGT changes === Warnings igt@gem_exec_gttfill@basic: fi-pnv-d510:SKIP -> PASS igt@kms_frontbuffer_tracking@basic: fi-bsw-n3050: SKIP -> PASS +12 == Known issues == Here are the changes found in Patchwork_8828 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-ivb-3520m: PASS -> DMESG-WARN (fdo#106084) Possible fixes igt@gem_sync@basic-each: fi-bsw-n3050: DMESG-FAIL -> PASS igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: fi-bsw-n3050: FAIL -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-bsw-n3050: DMESG-WARN -> PASS fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084 == Participating hosts (39 -> 36) == Missing(3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq == Build changes == * Linux: CI_DRM_4108 -> Patchwork_8828 CI_DRM_4108: 6270f64d10649baff02ae464542f185476a6f652 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8828: 13efbe7394fa35a5b781ecd04e68eb0c73647a37 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Linux commits == 13efbe7394fa drm/i915: Only track live rings for retiring cecb26fc1ca0 drm/i915: Retire requests along rings ebb9041fab71 drm/i915: Wrap engine->context_pin() and engine->context_unpin() f4428c86a843 drm/i915: Stop tracking timeline->inflight_seqnos == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8828/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for Aspect ratio support in DRM layer
== Series Details == Series: Aspect ratio support in DRM layer URL : https://patchwork.freedesktop.org/series/42403/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4107_full -> Patchwork_8825_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_8825_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8825_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42403/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8825_full: === IGT changes === Possible regressions igt@kms_draw_crc@draw-method-xrgb2101010-render-ytiled: shard-kbl: PASS -> FAIL +1 igt@perf@buffer-fill: shard-kbl: PASS -> DMESG-FAIL Warnings igt@perf_pmu@cpu-hotplug: shard-kbl: PASS -> SKIP +14 == Known issues == Here are the changes found in Patchwork_8825_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@absolute-wf_vblank-interruptible: shard-glk: PASS -> FAIL (fdo#106087) igt@kms_flip@dpms-vs-vblank-race-interruptible: shard-glk: PASS -> FAIL (fdo#103060) igt@kms_flip@flip-vs-wf_vblank-interruptible: shard-hsw: PASS -> FAIL (fdo#103928) igt@kms_flip@plain-flip-fb-recreate: shard-hsw: PASS -> FAIL (fdo#100368) igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: PASS -> FAIL (fdo#100368) +2 Possible fixes igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: FAIL (fdo#105767) -> PASS igt@kms_flip@2x-plain-flip-ts-check: shard-hsw: FAIL (fdo#100368) -> PASS igt@kms_flip@blocking-wf_vblank: shard-hsw: FAIL (fdo#103928) -> PASS igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-hsw: FAIL (fdo#105707) -> PASS shard-glk: FAIL (fdo#105363) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087 == Participating hosts (9 -> 8) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4107 -> Patchwork_8825 CI_DRM_4107: f711c0b36f2382983c964bd69d6c477482e604f1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8825: 8355947e81868cb3a9def449f9d56e188272c9a6 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8825/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Print error state times relative to capture (rev2)
== Series Details == Series: drm/i915: Print error state times relative to capture (rev2) URL : https://patchwork.freedesktop.org/series/41749/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4108_full -> Patchwork_8827_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8827_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8827_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/41749/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8827_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-render: shard-kbl: PASS -> SKIP igt@gem_mocs_settings@mocs-rc6-bsd2: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_8827_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible: shard-glk: PASS -> FAIL (fdo#100368) igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#102887, fdo#105363) igt@kms_flip@plain-flip-ts-check-interruptible: shard-hsw: PASS -> FAIL (fdo#100368) +1 igt@kms_plane_lowres@pipe-c-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_sysfs_edid_timing: shard-apl: PASS -> WARN (fdo#100047) igt@kms_vblank@pipe-a-accuracy-idle: shard-hsw: PASS -> FAIL (fdo#102583) Possible fixes igt@kms_flip@2x-flip-vs-absolute-wf_vblank: shard-hsw: FAIL (fdo#103928) -> PASS igt@kms_flip@absolute-wf_vblank-interruptible: shard-glk: FAIL (fdo#106087) -> PASS igt@kms_flip@dpms-vs-vblank-race-interruptible: shard-glk: FAIL (fdo#103060) -> PASS igt@kms_flip@plain-flip-ts-check: shard-hsw: FAIL (fdo#100368) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-kbl: DMESG-WARN (fdo#106247) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (9 -> 8) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4108 -> Patchwork_8827 CI_DRM_4108: 6270f64d10649baff02ae464542f185476a6f652 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8827: 838bd2331dc3bcd184f98d9b13b02d2cca5d13bf @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8827/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
Previously, we just reset the ring register in the context image such
that we could skip over the broken batch and emit the closing
breadcrumb. However, on resume the context image and GPU state would be
reloaded, which may have been left in an inconsistent state by the
reset. The presumption was that at worst it would just cause another
reset and skip again until it recovered, however it seems just as likely
to cause an unrecoverable hang. Instead of risking loading an incomplete
context image, restore it back to the default state.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ce23d5116482..422b05290ed6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1804,8 +1804,8 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
struct i915_request *request)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct intel_context *ce;
unsigned long flags;
+ u32 *regs;
GEM_TRACE("%s request global=%x, current=%d\n",
engine->name, request ? request->global_seqno : 0,
@@ -1855,14 +1855,24 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
* future request will be after userspace has had the opportunity
* to recreate its own state.
*/
- ce = &request->ctx->engine[engine->id];
- execlists_init_reg_state(ce->lrc_reg_state,
-request->ctx, engine, ce->ring);
+ regs = request->ctx->engine[engine->id].lrc_reg_state;
+ if (engine->default_state) {
+ void *defaults;
+
+ defaults = i915_gem_object_pin_map(engine->default_state,
+ I915_MAP_WB);
+ if (!IS_ERR(defaults)) {
+ memcpy(regs,
+ defaults + LRC_HEADER_PAGES * PAGE_SIZE,
+ engine->context_size);
+ i915_gem_object_unpin_map(engine->default_state);
+ }
+ }
+ execlists_init_reg_state(regs, request->ctx, engine, request->ring);
/* Move the RING_HEAD onto the breadcrumb, past the hanging batch */
- ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
- i915_ggtt_offset(ce->ring->vma);
- ce->lrc_reg_state[CTX_RING_HEAD+1] = request->postfix;
+ regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(request->ring->vma);
+ regs[CTX_RING_HEAD + 1] = request->postfix;
request->ring->head = request->postfix;
intel_ring_update_space(request->ring);
--
2.17.0
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Re: [Intel-gfx] [PATCH v7 1/2] drm: content-type property for HDMI connector
On Mon, Apr 23, 2018 at 10:34:41AM +0300, StanLis wrote:
> From: Stanislav Lisovskiy
>
> Added content_type property to drm_connector_state
> in order to properly handle external HDMI TV content-type setting.
>
> v2:
> * Moved helper function which attaches content type property
>to the drm core, as was suggested.
>Removed redundant connector state initialization.
>
> v3:
> * Removed caps in drm_content_type_enum_list.
>After some discussion it turned out that HDMI Spec 1.4
>was wrongly assuming that IT Content(itc) bit doesn't affect
>Content type states, however itc bit needs to be manupulated
>as well. In order to not expose additional property for itc,
>for sake of simplicity it was decided to bind those together
>in same "content type" property.
>
> v4:
> * Added it_content checking in intel_digital_connector_atomic_check.
>Fixed documentation for new content type enum.
>
> v5:
> * Moved patch revision's description to commit messages.
>
> v6:
> * Minor naming fix for the content type enumeration string.
>
> v7:
> * Fix parameter name for documentation and parameter alignment
>in order not to get warning. Added Content Type description to
>new HDMI connector properties section.
>
> Signed-off-by: Stanislav Lisovskiy
> ---
> Documentation/gpu/drm-kms.rst| 6 +++
> Documentation/gpu/kms-properties.csv | 1 +
> drivers/gpu/drm/drm_atomic.c | 17 +++
> drivers/gpu/drm/drm_connector.c | 74
> drivers/gpu/drm/drm_edid.c | 2 +
> include/drm/drm_connector.h | 18 +++
> include/drm/drm_mode_config.h| 5 ++
> include/uapi/drm/drm_mode.h | 7 +++
> 8 files changed, 130 insertions(+)
>
> diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
> index 1dffd1ac4cd4..e233c2626bd0 100644
> --- a/Documentation/gpu/drm-kms.rst
> +++ b/Documentation/gpu/drm-kms.rst
> @@ -517,6 +517,12 @@ Standard Connector Properties
> .. kernel-doc:: drivers/gpu/drm/drm_connector.c
> :doc: standard connector properties
>
> +HDMI Specific Connector Properties
> +-
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_connector.c
> + :doc: HDMI connector properties
> +
> Plane Composition Properties
>
>
> diff --git a/Documentation/gpu/kms-properties.csv
> b/Documentation/gpu/kms-properties.csv
> index 6b28b014cb7d..3567c986bd7d 100644
> --- a/Documentation/gpu/kms-properties.csv
> +++ b/Documentation/gpu/kms-properties.csv
> @@ -17,6 +17,7 @@ Owner Module/Drivers,Group,Property Name,Type,Property
> Values,Object attached,De
> ,Virtual GPU,“suggested X”,RANGE,"Min=0, Max=0x",Connector,property
> to suggest an X offset for a connector
> ,,“suggested Y”,RANGE,"Min=0, Max=0x",Connector,property to suggest
> an Y offset for a connector
> ,Optional,"""aspect ratio""",ENUM,"{ ""None"", ""4:3"", ""16:9""
> }",Connector,TDB
> +,Optional,"""content type""",ENUM,"{ ""No Data"", ""Graphics"", ""Photo"",
> ""Cinema"", ""Game"" }",Connector,TBD
> i915,Generic,"""Broadcast RGB""",ENUM,"{ ""Automatic"", ""Full"", ""Limited
> 16:235"" }",Connector,"When this property is set to Limited 16:235 and CTM is
> set, the hardware will be programmed with the result of the multiplication of
> CTM by the limited range matrix to ensure the pixels normaly in the range
> 0..1.0 are remapped to the range 16/255..235/255."
> ,,“audio”,ENUM,"{ ""force-dvi"", ""off"", ""auto"", ""on"" }",Connector,TBD
> ,SDVO-TV,“mode”,ENUM,"{ ""NTSC_M"", ""NTSC_J"", ""NTSC_443"", ""PAL_B"" }
> etc.",Connector,TBD
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 7d25c42f22db..479499f5848e 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1266,6 +1266,15 @@ static int drm_atomic_connector_set_property(struct
> drm_connector *connector,
> state->link_status = val;
> } else if (property == config->aspect_ratio_property) {
> state->picture_aspect_ratio = val;
> + } else if (property == config->content_type_property) {
> + /*
> + * Lowest two bits of content_type property control
> + * content_type, bit 2 controls itc bit.
> + * It was decided to have a single property called
> + * content_type, instead of content_type and itc.
> + */
> + state->content_type = val & 3;
> + state->it_content = val >> 2;
> } else if (property == connector->scaling_mode_property) {
> state->scaling_mode = val;
> } else if (property == connector->content_protection_property) {
> @@ -1351,6 +1360,14 @@ drm_atomic_connector_get_property(struct drm_connector
> *connector,
> *val = state->link_status;
> } else if (property == config->aspect_ratio_property) {
> *val = state->
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos
== Series Details == Series: series starting with [CI,1/4] drm/i915: Stop tracking timeline->inflight_seqnos URL : https://patchwork.freedesktop.org/series/42419/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4108_full -> Patchwork_8828_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_8828_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_8828_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/42419/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_8828_full: === IGT changes === Possible regressions igt@drv_selftest@mock_requests: shard-kbl: PASS -> DMESG-FAIL shard-hsw: PASS -> DMESG-FAIL shard-snb: PASS -> DMESG-FAIL shard-glk: PASS -> DMESG-FAIL shard-apl: PASS -> DMESG-FAIL Warnings igt@drv_selftest@live_evict: shard-snb: PASS -> SKIP +19 igt@drv_selftest@live_execlists: shard-hsw: PASS -> SKIP +19 igt@drv_selftest@live_objects: shard-glk: PASS -> SKIP +19 igt@drv_selftest@live_requests: shard-kbl: PASS -> SKIP +20 igt@drv_selftest@live_workarounds: shard-apl: PASS -> SKIP +19 igt@gem_mocs_settings@mocs-rc6-bsd2: shard-kbl: SKIP -> PASS igt@pm_rc6_residency@rc6-accuracy: shard-snb: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_8828_full that come from known issues: === IGT changes === Issues hit igt@gem_eio@in-flight-contexts-1us: shard-glk: PASS -> FAIL (fdo#105957) igt@kms_flip@2x-flip-vs-expired-vblank: shard-hsw: PASS -> FAIL (fdo#102887) igt@kms_flip@plain-flip-fb-recreate-interruptible: shard-glk: PASS -> FAIL (fdo#100368) igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu: shard-hsw: PASS -> DMESG-WARN (fdo#102614) igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_sysfs_edid_timing: shard-apl: PASS -> WARN (fdo#100047) Possible fixes igt@kms_flip@2x-flip-vs-absolute-wf_vblank: shard-hsw: FAIL (fdo#103928) -> PASS igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-hsw: FAIL (fdo#102887) -> PASS igt@kms_flip@absolute-wf_vblank-interruptible: shard-glk: FAIL (fdo#106087) -> PASS igt@kms_flip@plain-flip-ts-check: shard-hsw: FAIL (fdo#100368) -> PASS igt@kms_flip@wf_vblank-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: shard-kbl: DMESG-WARN (fdo#106247) -> PASS igt@kms_setmode@basic: shard-glk: FAIL (fdo#99912) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (9 -> 8) == Missing(1): shard-glkb == Build changes == * Linux: CI_DRM_4108 -> Patchwork_8828 CI_DRM_4108: 6270f64d10649baff02ae464542f185476a6f652 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4450: 0350f0e7f6a0e07281445fc3082aa70419f4aac7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_8828: 13efbe7394fa35a5b781ecd04e68eb0c73647a37 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4450: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8828/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
On 4/27/2018 12:32 PM, Chris Wilson wrote:
Previously, we just reset the ring register in the context image such
that we could skip over the broken batch and emit the closing
breadcrumb. However, on resume the context image and GPU state would be
reloaded, which may have been left in an inconsistent state by the
reset. The presumption was that at worst it would just cause another
reset and skip again until it recovered, however it seems just as likely
to cause an unrecoverable hang. Instead of risking loading an incomplete
context image, restore it back to the default state.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ce23d5116482..422b05290ed6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1804,8 +1804,8 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
struct i915_request *request)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct intel_context *ce;
unsigned long flags;
+ u32 *regs;
GEM_TRACE("%s request global=%x, current=%d\n",
engine->name, request ? request->global_seqno : 0,
@@ -1855,14 +1855,24 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
* future request will be after userspace has had the opportunity
* to recreate its own state.
*/
- ce = &request->ctx->engine[engine->id];
- execlists_init_reg_state(ce->lrc_reg_state,
-request->ctx, engine, ce->ring);
+ regs = request->ctx->engine[engine->id].lrc_reg_state;
+ if (engine->default_state) {
+ void *defaults;
+
+ defaults = i915_gem_object_pin_map(engine->default_state,
+ I915_MAP_WB);
+ if (!IS_ERR(defaults)) {
+ memcpy(regs,
+ defaults + LRC_HEADER_PAGES * PAGE_SIZE,
+ engine->context_size);
Hi,
The context_size is taking into count the PP_HWSP page, do we also need
to rewrite the PP_HSWP? (or just the logical state).
Also regs is already pointing to the start of the logical state
(vaddr + LRC_STATE_PN * PAGE_SIZE).
So if we want to overwrite from the PP_HWSP, then regs is not the right
offset, or if we only want to change the logical state then it should be
from 'defaults + LRC_STATE_PN * PAGE_SIZE'.
-Michel
+ i915_gem_object_unpin_map(engine->default_state);
+ }
+ }
+ execlists_init_reg_state(regs, request->ctx, engine, request->ring);
/* Move the RING_HEAD onto the breadcrumb, past the hanging batch */
- ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
- i915_ggtt_offset(ce->ring->vma);
- ce->lrc_reg_state[CTX_RING_HEAD+1] = request->postfix;
+ regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(request->ring->vma);
+ regs[CTX_RING_HEAD + 1] = request->postfix;
request->ring->head = request->postfix;
intel_ring_update_space(request->ring);
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Re: [Intel-gfx] [PATCH] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
Quoting Michel Thierry (2018-04-27 21:12:38)
> On 4/27/2018 12:32 PM, Chris Wilson wrote:
> > Previously, we just reset the ring register in the context image such
> > that we could skip over the broken batch and emit the closing
> > breadcrumb. However, on resume the context image and GPU state would be
> > reloaded, which may have been left in an inconsistent state by the
> > reset. The presumption was that at worst it would just cause another
> > reset and skip again until it recovered, however it seems just as likely
> > to cause an unrecoverable hang. Instead of risking loading an incomplete
> > context image, restore it back to the default state.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
> > Cc: Michał Winiarski
> > Cc: Michel Thierry
> > Cc: Tvrtko Ursulin
> > ---
> > drivers/gpu/drm/i915/intel_lrc.c | 24 +---
> > 1 file changed, 17 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> > b/drivers/gpu/drm/i915/intel_lrc.c
> > index ce23d5116482..422b05290ed6 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -1804,8 +1804,8 @@ static void reset_common_ring(struct intel_engine_cs
> > *engine,
> > struct i915_request *request)
> > {
> > struct intel_engine_execlists * const execlists = &engine->execlists;
> > - struct intel_context *ce;
> > unsigned long flags;
> > + u32 *regs;
> >
> > GEM_TRACE("%s request global=%x, current=%d\n",
> > engine->name, request ? request->global_seqno : 0,
> > @@ -1855,14 +1855,24 @@ static void reset_common_ring(struct
> > intel_engine_cs *engine,
> >* future request will be after userspace has had the opportunity
> >* to recreate its own state.
> >*/
> > - ce = &request->ctx->engine[engine->id];
> > - execlists_init_reg_state(ce->lrc_reg_state,
> > - request->ctx, engine, ce->ring);
> > + regs = request->ctx->engine[engine->id].lrc_reg_state;
> > + if (engine->default_state) {
> > + void *defaults;
> > +
> > + defaults = i915_gem_object_pin_map(engine->default_state,
> > +I915_MAP_WB);
> > + if (!IS_ERR(defaults)) {
> > + memcpy(regs,
> > +defaults + LRC_HEADER_PAGES * PAGE_SIZE,
> > +engine->context_size);
> Hi,
>
> The context_size is taking into count the PP_HWSP page, do we also need
> to rewrite the PP_HSWP? (or just the logical state).
>
> Also regs is already pointing to the start of the logical state
> (vaddr + LRC_STATE_PN * PAGE_SIZE).
Yeah, I was aiming for just the register state, and had a nice little
off by one in comparing the macros.
> So if we want to overwrite from the PP_HWSP, then regs is not the right
> offset, or if we only want to change the logical state then it should be
> from 'defaults + LRC_STATE_PN * PAGE_SIZE'.
Right, I don't think we need to scrub the HWSP, just the register state.
The context is lost at this point, and what I want to protect is the
read of the image following the reset. Afaik, we don't issue any reads
from PPHWSP.
-Chris
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[Intel-gfx] [PATCH v2] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
Previously, we just reset the ring register in the context image such
that we could skip over the broken batch and emit the closing
breadcrumb. However, on resume the context image and GPU state would be
reloaded, which may have been left in an inconsistent state by the
reset. The presumption was that at worst it would just cause another
reset and skip again until it recovered, however it seems just as likely
to cause an unrecoverable hang. Instead of risking loading an incomplete
context image, restore it back to the default state.
v2: Fix up off-by-one from including the ppHSWP in with the register
state.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ce23d5116482..01750a4c2f3f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1804,8 +1804,8 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
struct i915_request *request)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct intel_context *ce;
unsigned long flags;
+ u32 *regs;
GEM_TRACE("%s request global=%x, current=%d\n",
engine->name, request ? request->global_seqno : 0,
@@ -1855,14 +1855,24 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
* future request will be after userspace has had the opportunity
* to recreate its own state.
*/
- ce = &request->ctx->engine[engine->id];
- execlists_init_reg_state(ce->lrc_reg_state,
-request->ctx, engine, ce->ring);
+ regs = request->ctx->engine[engine->id].lrc_reg_state;
+ if (engine->default_state) {
+ void *defaults;
+
+ defaults = i915_gem_object_pin_map(engine->default_state,
+ I915_MAP_WB);
+ if (!IS_ERR(defaults)) {
+ memcpy(regs, /* skip restoring to the vanilla PPHWSP */
+ defaults + LRC_STATE_PN * PAGE_SIZE,
+ engine->context_size - PAGE_SIZE);
+ i915_gem_object_unpin_map(engine->default_state);
+ }
+ }
+ execlists_init_reg_state(regs, request->ctx, engine, request->ring);
/* Move the RING_HEAD onto the breadcrumb, past the hanging batch */
- ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
- i915_ggtt_offset(ce->ring->vma);
- ce->lrc_reg_state[CTX_RING_HEAD+1] = request->postfix;
+ regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(request->ring->vma);
+ regs[CTX_RING_HEAD + 1] = request->postfix;
request->ring->head = request->postfix;
intel_ring_update_space(request->ring);
--
2.17.0
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Re: [Intel-gfx] [PATCH v2] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
On 4/27/2018 1:24 PM, Chris Wilson wrote:
Previously, we just reset the ring register in the context image such
that we could skip over the broken batch and emit the closing
breadcrumb. However, on resume the context image and GPU state would be
reloaded, which may have been left in an inconsistent state by the
reset. The presumption was that at worst it would just cause another
reset and skip again until it recovered, however it seems just as likely
to cause an unrecoverable hang. Instead of risking loading an incomplete
context image, restore it back to the default state.
v2: Fix up off-by-one from including the ppHSWP in with the register
state.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Tvrtko Ursulin
Reviewed-by: Michel Thierry
Does it need a 'Fixes:' tag or has a bugzilla reference?
---
drivers/gpu/drm/i915/intel_lrc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ce23d5116482..01750a4c2f3f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1804,8 +1804,8 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
struct i915_request *request)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct intel_context *ce;
unsigned long flags;
+ u32 *regs;
GEM_TRACE("%s request global=%x, current=%d\n",
engine->name, request ? request->global_seqno : 0,
@@ -1855,14 +1855,24 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
* future request will be after userspace has had the opportunity
* to recreate its own state.
*/
- ce = &request->ctx->engine[engine->id];
- execlists_init_reg_state(ce->lrc_reg_state,
-request->ctx, engine, ce->ring);
+ regs = request->ctx->engine[engine->id].lrc_reg_state;
+ if (engine->default_state) {
+ void *defaults;
+
+ defaults = i915_gem_object_pin_map(engine->default_state,
+ I915_MAP_WB);
+ if (!IS_ERR(defaults)) {
+ memcpy(regs, /* skip restoring to the vanilla PPHWSP */
+ defaults + LRC_STATE_PN * PAGE_SIZE,
+ engine->context_size - PAGE_SIZE);
+ i915_gem_object_unpin_map(engine->default_state);
+ }
+ }
+ execlists_init_reg_state(regs, request->ctx, engine, request->ring);
/* Move the RING_HEAD onto the breadcrumb, past the hanging batch */
- ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
- i915_ggtt_offset(ce->ring->vma);
- ce->lrc_reg_state[CTX_RING_HEAD+1] = request->postfix;
+ regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(request->ring->vma);
+ regs[CTX_RING_HEAD + 1] = request->postfix;
request->ring->head = request->postfix;
intel_ring_update_space(request->ring);
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[Intel-gfx] [PATCH v3] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
Previously, we just reset the ring register in the context image such
that we could skip over the broken batch and emit the closing
breadcrumb. However, on resume the context image and GPU state would be
reloaded, which may have been left in an inconsistent state by the
reset. The presumption was that at worst it would just cause another
reset and skip again until it recovered, however it seems just as likely
to cause an unrecoverable hang. Instead of risking loading an incomplete
context image, restore it back to the default state.
v2: Fix up off-by-one from including the ppHSWP in with the register
state.
v3: Use a ring local to compact a few lines.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 29 -
1 file changed, 20 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ce23d5116482..bbca79bf19cc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1804,8 +1804,9 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
struct i915_request *request)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct intel_context *ce;
+ struct intel_ring * const ring = request->ring;
unsigned long flags;
+ u32 *regs;
GEM_TRACE("%s request global=%x, current=%d\n",
engine->name, request ? request->global_seqno : 0,
@@ -1855,17 +1856,27 @@ static void reset_common_ring(struct intel_engine_cs
*engine,
* future request will be after userspace has had the opportunity
* to recreate its own state.
*/
- ce = &request->ctx->engine[engine->id];
- execlists_init_reg_state(ce->lrc_reg_state,
-request->ctx, engine, ce->ring);
+ regs = request->ctx->engine[engine->id].lrc_reg_state;
+ if (engine->default_state) {
+ void *defaults;
+
+ defaults = i915_gem_object_pin_map(engine->default_state,
+ I915_MAP_WB);
+ if (!IS_ERR(defaults)) {
+ memcpy(regs, /* skip restoring to the vanilla PPHWSP */
+ defaults + LRC_STATE_PN * PAGE_SIZE,
+ engine->context_size - PAGE_SIZE);
+ i915_gem_object_unpin_map(engine->default_state);
+ }
+ }
+ execlists_init_reg_state(regs, request->ctx, engine, ring);
/* Move the RING_HEAD onto the breadcrumb, past the hanging batch */
- ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
- i915_ggtt_offset(ce->ring->vma);
- ce->lrc_reg_state[CTX_RING_HEAD+1] = request->postfix;
+ regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(ring->vma);
+ regs[CTX_RING_HEAD + 1] = request->postfix;
- request->ring->head = request->postfix;
- intel_ring_update_space(request->ring);
+ ring->head = request->postfix;
+ intel_ring_update_space(ring);
/* Reset WaIdleLiteRestore:bdw,skl as well */
unwind_wa_tail(request);
--
2.17.0
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Re: [Intel-gfx] [PATCH v2] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
Quoting Michel Thierry (2018-04-27 21:27:46)
> On 4/27/2018 1:24 PM, Chris Wilson wrote:
> > Previously, we just reset the ring register in the context image such
> > that we could skip over the broken batch and emit the closing
> > breadcrumb. However, on resume the context image and GPU state would be
> > reloaded, which may have been left in an inconsistent state by the
> > reset. The presumption was that at worst it would just cause another
> > reset and skip again until it recovered, however it seems just as likely
> > to cause an unrecoverable hang. Instead of risking loading an incomplete
> > context image, restore it back to the default state.
> >
> > v2: Fix up off-by-one from including the ppHSWP in with the register
> > state.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
> > Cc: Michał Winiarski
> > Cc: Michel Thierry
> > Cc: Tvrtko Ursulin
>
> Reviewed-by: Michel Thierry
>
> Does it need a 'Fixes:' tag or has a bugzilla reference?
I suspect it's rare enough that the unrecoverable hang might not be
recognisable in bugzilla. I was just looking at
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4108/fi-bsw-n3050/dmesg0.log
trying to think of ways how the reset might appear to work but the
recovery fail with
<7>[ 521.765114] missed_breadcrumb vecs0 missed breadcrumb at
intel_breadcrumbs_hangcheck+0x5a/0x80 [i915]
<7>[ 521.765176] missed_breadcrumb current seqno e4e, last e4f, hangcheck
e4e [2048 ms], inflight 1
<7>[ 521.765191] missed_breadcrumb Reset count: 0 (global 0)
<7>[ 521.765206] missed_breadcrumb Requests:
<7>[ 521.765223] missed_breadcrumb first e4f [9b82:e4f] prio=0 @
3766ms: gem_sync[3107]/0
<7>[ 521.765239] missed_breadcrumb last e4f [9b82:e4f] prio=0 @
3766ms: gem_sync[3107]/0
<7>[ 521.765256] missed_breadcrumb active e4f [9b82:e4f] prio=0 @
3766ms: gem_sync[3107]/0
<7>[ 521.765274] missed_breadcrumb [head 3900, postfix 3930, tail
3948, batch 0x_00042000]
<7>[ 521.765289] missed_breadcrumb ring->start: 0x008ef000
<7>[ 521.765301] missed_breadcrumb ring->head: 0x38f8
<7>[ 521.765313] missed_breadcrumb ring->tail: 0x3948
<7>[ 521.765325] missed_breadcrumb ring->emit: 0x3950
<7>[ 521.765337] missed_breadcrumb ring->space: 0x2618
<7>[ 521.765372] missed_breadcrumb RING_START: 0x008ef000
<7>[ 521.765389] missed_breadcrumb RING_HEAD: 0x38f8
<7>[ 521.765404] missed_breadcrumb RING_TAIL: 0x3948
<7>[ 521.765422] missed_breadcrumb RING_CTL: 0x3001
<7>[ 521.765438] missed_breadcrumb RING_MODE: 0x
<7>[ 521.765453] missed_breadcrumb RING_IMR: fefe
<7>[ 521.765473] missed_breadcrumb ACTHD: 0x_022039b8
<7>[ 521.765492] missed_breadcrumb BBADDR: 0x_00042004
<7>[ 521.765511] missed_breadcrumb DMA_FADDR: 0x_008f28f8
<7>[ 521.765537] missed_breadcrumb IPEIR: 0x
<7>[ 521.765552] missed_breadcrumb IPEHR: 0x1111
<7>[ 521.765570] missed_breadcrumb Execlist status: 0x00044032 0002
<7>[ 521.765586] missed_breadcrumb Execlist CSB read 1 [1 cached], write 2
[2 from hws], interrupt posted? no, tasklet queued? no (enabled)
<7>[ 521.765604] missed_breadcrumb Execlist CSB[2]: 0x0001 [0x0001
in hwsp], context: 0 [0 in hwsp]
<7>[ 521.765619] missed_breadcrumb ELSP[0] count=1, rq: e4f
[9b82:e4f] prio=0 @ 3767ms: gem_sync[3107]/0
<7>[ 521.765632] missed_breadcrumb ELSP[1] idle
<7>[ 521.765645] missed_breadcrumb HW active? 0x1
<7>[ 521.765660] missed_breadcrumb E e4f [9b82:e4f] prio=0 @
3767ms: gem_sync[3107]/0
<7>[ 521.765670] missed_breadcrumb Queue priority: -2147483648
<7>[ 521.765684] missed_breadcrumb gem_sync [3112] waiting for e4f
<7>[ 521.765697] missed_breadcrumb IRQ? 0x1 (breadcrumbs? yes) (execlists? no)
<7>[ 521.765707] missed_breadcrumb HWSP:
<7>[ 521.765723] missed_breadcrumb
<7>[ 521.765733] missed_breadcrumb *
<7>[ 521.765747] missed_breadcrumb 0040 0001 0018
0002 0001 0018 0002
<7>[ 521.765760] missed_breadcrumb 0060 0001 0018
0002 0002
<7>[ 521.765774] missed_breadcrumb 0080
<7>[ 521.765784] missed_breadcrumb *
<7>[ 521.765809] missed_breadcrumb 00c0 0e4e
<7>[ 521.765823] missed_breadcrumb 00e0
<7>[ 521.765833] missed_breadcrumb *
<7>[ 521.765845] missed_breadcrumb Idle? no
Of particular note being the IPEHR being MI_LRI, the ring being idle (it
hasn't moved on from t
[Intel-gfx] [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake
Only enough to achieve HuC authentication. No GuC submission
or any other feature for the time being.
Signed-off-by: Oscar Mateo
Cc: Joonas Lahtinen
Cc: Michal Wajdeczko
Cc: John Spotswood
Cc: Tony Ye
---
drivers/gpu/drm/i915/intel_guc.c | 10 --
drivers/gpu/drm/i915/intel_guc_fwif.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 116f4cc..133747c 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc *guc)
params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
- params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
- GUC_CTL_VCS2_ENABLED;
+ if (INTEL_GEN(dev_priv) >= 11) {
+ params[GUC_CTL_FEATURE] |= GEN11_GUC_CTL_DISABLE_SCHEDULER;
+} else {
+ params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER;
+ params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;
+ }
params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
@@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
u32 pgs = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
+ GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
+
params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 0867ba7..781c0c0 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -106,6 +106,7 @@
#define GUC_CTL_PREEMPTION_LOG (1 << 5)
#define GUC_CTL_ENABLE_SLPC (1 << 7)
#define GUC_CTL_RESET_ON_PREMPT_FAILURE (1 << 8)
+#define GEN11_GUC_CTL_DISABLE_SCHEDULER (1 << 14)
#define GUC_CTL_DEBUG 8
#define GUC_LOG_VERBOSITY_SHIFT 0
--
1.9.1
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[Intel-gfx] [PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
Sanitize the enable_guc option so that we can enable HuC authentication,
but nothing else. The firmware interface has changed quite dramatically
in Gen11, so it will take a while before we can submit workloads to the
GuC with guarantees.
Signed-off-by: Oscar Mateo
Cc: Joonas Lahtinen
Cc: Michal Wajdeczko
Cc: John Spotswood
Cc: Tony Ye
---
drivers/gpu/drm/i915/intel_uc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 1cffaf7..d2a935c 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -63,6 +63,8 @@ static int __get_platform_enable_guc(struct drm_i915_private
*dev_priv)
enable_guc |= ENABLE_GUC_LOAD_HUC;
/* Any platform specific fine-tuning can be done here */
+ if (INTEL_GEN(dev_priv) >= 11)
+ enable_guc &= ~ENABLE_GUC_SUBMISSION;
return enable_guc;
}
@@ -115,6 +117,14 @@ static void sanitize_options_early(struct drm_i915_private
*dev_priv)
yesno(intel_uc_is_using_guc_submission()),
yesno(intel_uc_is_using_huc()));
+ /* Verify GuC submission support */
+ if (intel_uc_is_using_guc_submission() && INTEL_GEN(dev_priv) >= 11) {
+ DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
+"enable_guc", i915_modparams.enable_guc,
+"submission not supported");
+ i915_modparams.enable_guc &= ~ENABLE_GUC_SUBMISSION;
+ }
+
/* Verify GuC firmware availability */
if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {
DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
--
1.9.1
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[Intel-gfx] [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version for Icelake
A GuC firmware for Icelake is now available. Let's use it.
v2: Split out the Cannonlake stuff in a separate patch (Michal)
v3: Rebased
v4:
- Rebased
- Split out MODULE_FIRMWARE so we don't accidentally push it
before linux-firmware (Joonas)
v5: Use the latest firmware (v23.120)
v6: Use the latest firmware (v26.171)
v7: Rebased (remove guc-core-family)
v8: Use the latest firmware (v27.182)
Cc: Michal Wajdeczko
Cc: John Spotswood
Cc: Tony Ye
Cc: Joonas Lahtinen
Cc: Daniele Ceraolo Spurio
Signed-off-by: Michel Thierry
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_guc_fw.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcc..c5c5dd8 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -39,6 +39,9 @@
#define KBL_FW_MAJOR 9
#define KBL_FW_MINOR 39
+#define ICL_FW_MAJOR 27
+#define ICL_FW_MINOR 182
+
#define GUC_FW_PATH(platform, major, minor) \
"i915/" __stringify(platform) "_guc_ver" __stringify(major) "_"
__stringify(minor) ".bin"
@@ -51,6 +54,8 @@
#define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR, KBL_FW_MINOR)
MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
+#define I915_ICL_GUC_UCODE GUC_FW_PATH(icl, ICL_FW_MAJOR, ICL_FW_MINOR)
+
static void guc_fw_select(struct intel_uc_fw *guc_fw)
{
struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
@@ -77,6 +82,10 @@ static void guc_fw_select(struct intel_uc_fw *guc_fw)
guc_fw->path = I915_KBL_GUC_UCODE;
guc_fw->major_ver_wanted = KBL_FW_MAJOR;
guc_fw->minor_ver_wanted = KBL_FW_MINOR;
+ } else if (IS_ICELAKE(dev_priv)) {
+ guc_fw->path = I915_ICL_GUC_UCODE;
+ guc_fw->major_ver_wanted = ICL_FW_MAJOR;
+ guc_fw->minor_ver_wanted = ICL_FW_MINOR;
} else {
DRM_WARN("%s: No firmware known for this platform!\n",
intel_uc_fw_type_repr(guc_fw->type));
--
1.9.1
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[Intel-gfx] [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
The register to check for correct HuC authentication by the GuC
has changed in Icelake. Look into the right register & bit.
v2: rebased.
v3: rebased.
v4: Fix I915_PARAM_HUC_STATUS as well (Tony)
BSpec: 19686
Signed-off-by: Oscar Mateo
Cc: Tony Ye
Cc: Vinay Belgaumkar
Cc: Michel Thierry
Cc: Michal Wajdeczko
Cc: John Spotswood
Cc: Tony Ye
---
drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++
drivers/gpu/drm/i915/intel_huc.c | 23 +++
2 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h
b/drivers/gpu/drm/i915/intel_guc_reg.h
index d860847..9f14f9f 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -76,6 +76,9 @@
#define HUC_STATUS2 _MMIO(0xD3B0)
#define HUC_FW_VERIFIED (1<<7)
+#define HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
+#define HUC_LOAD_SUCCESSFUL (1 << 0)
+
#define GUC_WOPCM_SIZE _MMIO(0xc050)
#define GUC_WOPCM_SIZE_LOCKED (1<<0)
#define GUC_WOPCM_SIZE_SHIFT 12
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 2912852..b509756 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -48,9 +48,19 @@ int intel_huc_auth(struct intel_huc *huc)
struct drm_i915_private *i915 = huc_to_i915(huc);
struct intel_guc *guc = &i915->guc;
struct i915_vma *vma;
+ i915_reg_t status_reg;
u32 status;
+ u32 status_ok;
int ret;
+ if (INTEL_GEN(i915) >= 11) {
+ status_reg = HUC_KERNEL_LOAD_INFO;
+ status_ok = HUC_LOAD_SUCCESSFUL;
+ } else {
+ status_reg = HUC_STATUS2;
+ status_ok = HUC_FW_VERIFIED;
+ }
+
if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return -ENOEXEC;
@@ -72,9 +82,9 @@ int intel_huc_auth(struct intel_huc *huc)
/* Check authentication status, it should be done by now */
ret = __intel_wait_for_register(i915,
- HUC_STATUS2,
- HUC_FW_VERIFIED,
- HUC_FW_VERIFIED,
+ status_reg,
+ status_ok,
+ status_ok,
2, 50, &status);
if (ret) {
DRM_ERROR("HuC: Firmware not verified %#x\n", status);
@@ -112,7 +122,12 @@ int intel_huc_check_status(struct intel_huc *huc)
return -ENODEV;
intel_runtime_pm_get(dev_priv);
- status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
+ if (INTEL_GEN(dev_priv) >= 11)
+ status = I915_READ(HUC_KERNEL_LOAD_INFO) & HUC_LOAD_SUCCESSFUL;
+ else
+ status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
intel_runtime_pm_put(dev_priv);
return status;
--
1.9.1
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[Intel-gfx] [PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version for Icelake
This patch adds the support to load HuC on ICL.
Version 8.02.2678
v2 (James): Rebase
Signed-off-by: Oscar Mateo
Cc: Tony Ye
Cc: Vinay Belgaumkar
Cc: Michel Thierry
Cc: Joonas Lahtinen
Cc: Michal Wajdeczko
Cc: John Spotswood
---
drivers/gpu/drm/i915/intel_huc_fw.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu/drm/i915/intel_huc_fw.c
index f93d238..795d585 100644
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -34,6 +34,10 @@
#define KBL_HUC_FW_MINOR 00
#define KBL_BLD_NUM 1810
+#define ICL_HUC_FW_MAJOR 8
+#define ICL_HUC_FW_MINOR 02
+#define ICL_BLD_NUM 2678
+
#define HUC_FW_PATH(platform, major, minor, bld_num) \
"i915/" __stringify(platform) "_huc_ver" __stringify(major) "_" \
__stringify(minor) "_" __stringify(bld_num) ".bin"
@@ -50,6 +54,9 @@
KBL_HUC_FW_MINOR, KBL_BLD_NUM)
MODULE_FIRMWARE(I915_KBL_HUC_UCODE);
+#define I915_ICL_HUC_UCODE HUC_FW_PATH(icl, ICL_HUC_FW_MAJOR, \
+ ICL_HUC_FW_MINOR, ICL_BLD_NUM)
+
static void huc_fw_select(struct intel_uc_fw *huc_fw)
{
struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
@@ -76,6 +83,10 @@ static void huc_fw_select(struct intel_uc_fw *huc_fw)
huc_fw->path = I915_KBL_HUC_UCODE;
huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
+ } else if (IS_ICELAKE(dev_priv)) {
+ huc->fw.path = I915_ICL_HUC_UCODE;
+ huc->fw.major_ver_wanted = ICL_HUC_FW_MAJOR;
+ huc->fw.minor_ver_wanted = ICL_HUC_FW_MINOR;
} else {
DRM_WARN("%s: No firmware known for this platform!\n",
intel_uc_fw_type_repr(huc_fw->type));
--
1.9.1
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[Intel-gfx] [PATCH 0/5] Enable HuC authentication in Icelake
Bare minimum number of patches to get the GuC to authenticate the HuC correctly (i915.enable_guc=2). Oscar Mateo (5): drm/i915/icl/guc: Do not allow GuC submission on Icelake for now drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake drm/i915/icl/guc: Define the GuC firmware version for Icelake drm/i915/icl/huc: Correctly authenticate the HuC for Icelake drm/i915/icl/huc: Define the HuC firmware version for Icelake drivers/gpu/drm/i915/intel_guc.c | 10 -- drivers/gpu/drm/i915/intel_guc_fw.c | 9 + drivers/gpu/drm/i915/intel_guc_fwif.h | 1 + drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++ drivers/gpu/drm/i915/intel_huc.c | 23 +++ drivers/gpu/drm/i915/intel_huc_fw.c | 11 +++ drivers/gpu/drm/i915/intel_uc.c | 10 ++ 7 files changed, 61 insertions(+), 6 deletions(-) -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/lrc: Scrub the GPU state of the guilty hanging request
On 4/27/2018 1:35 PM, Chris Wilson wrote:
Quoting Michel Thierry (2018-04-27 21:27:46)
On 4/27/2018 1:24 PM, Chris Wilson wrote:
Previously, we just reset the ring register in the context image such
that we could skip over the broken batch and emit the closing
breadcrumb. However, on resume the context image and GPU state would be
reloaded, which may have been left in an inconsistent state by the
reset. The presumption was that at worst it would just cause another
reset and skip again until it recovered, however it seems just as likely
to cause an unrecoverable hang. Instead of risking loading an incomplete
context image, restore it back to the default state.
v2: Fix up off-by-one from including the ppHSWP in with the register
state.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Michał Winiarski
Cc: Michel Thierry
Cc: Tvrtko Ursulin
Reviewed-by: Michel Thierry
Does it need a 'Fixes:' tag or has a bugzilla reference?
I suspect it's rare enough that the unrecoverable hang might not be
recognisable in bugzilla. I was just looking at
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4108/fi-bsw-n3050/dmesg0.log
trying to think of ways how the reset might appear to work but the
recovery fail with
<7>[ 521.765114] missed_breadcrumb vecs0 missed breadcrumb at
intel_breadcrumbs_hangcheck+0x5a/0x80 [i915]
<7>[ 521.765176] missed_breadcrumb current seqno e4e, last e4f,
hangcheck e4e [2048 ms], inflight 1
<7>[ 521.765191] missed_breadcrumb Reset count: 0 (global 0)
<7>[ 521.765206] missed_breadcrumb Requests:
<7>[ 521.765223] missed_breadcrumb first e4f [9b82:e4f] prio=0
@ 3766ms: gem_sync[3107]/0
<7>[ 521.765239] missed_breadcrumb last e4f [9b82:e4f] prio=0
@ 3766ms: gem_sync[3107]/0
<7>[ 521.765256] missed_breadcrumb active e4f [9b82:e4f] prio=0
@ 3766ms: gem_sync[3107]/0
<7>[ 521.765274] missed_breadcrumb [head 3900, postfix 3930,
tail 3948, batch 0x_00042000]
<7>[ 521.765289] missed_breadcrumb ring->start: 0x008ef000
<7>[ 521.765301] missed_breadcrumb ring->head: 0x38f8
<7>[ 521.765313] missed_breadcrumb ring->tail: 0x3948
<7>[ 521.765325] missed_breadcrumb ring->emit: 0x3950
<7>[ 521.765337] missed_breadcrumb ring->space: 0x2618
<7>[ 521.765372] missed_breadcrumb RING_START: 0x008ef000
<7>[ 521.765389] missed_breadcrumb RING_HEAD: 0x38f8
<7>[ 521.765404] missed_breadcrumb RING_TAIL: 0x3948
<7>[ 521.765422] missed_breadcrumb RING_CTL: 0x3001
<7>[ 521.765438] missed_breadcrumb RING_MODE: 0x
<7>[ 521.765453] missed_breadcrumb RING_IMR: fefe
<7>[ 521.765473] missed_breadcrumb ACTHD: 0x_022039b8
<7>[ 521.765492] missed_breadcrumb BBADDR: 0x_00042004
<7>[ 521.765511] missed_breadcrumb DMA_FADDR: 0x_008f28f8
<7>[ 521.765537] missed_breadcrumb IPEIR: 0x
<7>[ 521.765552] missed_breadcrumb IPEHR: 0x1111
<7>[ 521.765570] missed_breadcrumb Execlist status: 0x00044032 0002
<7>[ 521.765586] missed_breadcrumb Execlist CSB read 1 [1 cached], write
2 [2 from hws], interrupt posted? no, tasklet queued? no (enabled)
<7>[ 521.765604] missed_breadcrumb Execlist CSB[2]: 0x0001
[0x0001 in hwsp], context: 0 [0 in hwsp]
<7>[ 521.765619] missed_breadcrumb ELSP[0] count=1, rq: e4f
[9b82:e4f] prio=0 @ 3767ms: gem_sync[3107]/0
<7>[ 521.765632] missed_breadcrumb ELSP[1] idle
<7>[ 521.765645] missed_breadcrumb HW active? 0x1
<7>[ 521.765660] missed_breadcrumb E e4f [9b82:e4f] prio=0 @
3767ms: gem_sync[3107]/0
<7>[ 521.765670] missed_breadcrumb Queue priority: -2147483648
<7>[ 521.765684] missed_breadcrumb gem_sync [3112] waiting for e4f
<7>[ 521.765697] missed_breadcrumb IRQ? 0x1 (breadcrumbs? yes) (execlists? no)
<7>[ 521.765707] missed_breadcrumb HWSP:
<7>[ 521.765723] missed_breadcrumb
<7>[ 521.765733] missed_breadcrumb *
<7>[ 521.765747] missed_breadcrumb 0040 0001 0018
0002 0001 0018 0002
<7>[ 521.765760] missed_breadcrumb 0060 0001 0018
0002 0002
<7>[ 521.765774] missed_breadcrumb 0080
<7>[ 521.765784] missed_breadcrumb *
<7>[ 521.765809] missed_breadcrumb 00c0 0e4e
<7>[ 521.765823] missed_breadcrumb 00e0
<7>[ 521.765833] missed_breadcrumb *
<7>[ 521.765845] missed_breadcrumb Idle? no
Of particular note being the IPEHR being MI_LRI, the ring being
