Re: [Intel-gfx] [PATCH v2] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect
On Tue, 20 Dec 2016, Dhinakaran Pandiyan wrote:
> From: "Navare, Manasi D"
>
> The detect_done flag was introduced in the 'commit 7d23e3c37bb3
> ("drm/i915: Cleaning up intel_dp_hpd_pulse")' in order to avoid multiple
> detects on hotplug where intel_dp_long_pulse() was called from HPD handler
> as well as intel_dp_detect(). Later, 'commit 1015811609c0
> ("drm/i915: Move long hpd handling into the hotplug work")' deferred long
> hpd handling to hotplug work to avoid handling it twice. But, resetting the
> flag after long hpd handling leads to the code being executed again during
> mode enumeration.
>
> So, do not reset the detect_done flag to false in intel_dp_detect. The flag
> is reset in intel_dp_hpd_pulse to allow a full detect and set when the
> hotplug work does a full DPCD detect. However if .detect() gets called
> during enumeration we return the cached status.
>
> v2:
> Allow full detect after encoder reset. (Ville)
> Set the detect_done even connector if disconnected (DK)
> Commit message changes.
>
Fixes: ?
> Cc: Ville Syrjala
> Cc: Daniel Vetter
> Cc: Jani Nikula
> Signed-off-by: Manasi Navare
> Signed-off-by: Dhinakaran Pandiyan
> ---
> drivers/gpu/drm/i915/intel_dp.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 45ebc96..5689cf3 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4473,7 +4473,6 @@ intel_dp_long_pulse(struct intel_connector
> *intel_connector)
> intel_dp_set_edid(intel_dp);
> if (is_edp(intel_dp) || intel_connector->detect_edid)
> status = connector_status_connected;
> - intel_dp->detect_done = true;
>
> /* Try to read the source of the interrupt */
> if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
> @@ -4508,10 +4507,10 @@ intel_dp_detect(struct drm_connector *connector, bool
> force)
> connector->base.id, connector->name);
>
> /* If full detect is not performed yet, do a full detect */
> - if (!intel_dp->detect_done)
> + if (!intel_dp->detect_done) {
> + intel_dp->detect_done = true;
> status = intel_dp_long_pulse(intel_dp->attached_connector);
> -
> - intel_dp->detect_done = false;
> + }
>
> return status;
> }
> @@ -4803,6 +4802,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
> if (lspcon->active)
> lspcon_resume(lspcon);
>
> + intel_dp->detect_done = false;
> +
> if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP)
> return;
--
Jani Nikula, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 6/6] drm/i915: Add a cursor hack to allow converting legacy page flip to atomic, v3.
On Mon, Dec 12, 2016 at 11:34:55AM +0100, Maarten Lankhorst wrote:
> Do something similar to vc4, only allow updating the cursor state
> in-place through a fastpath when the watermarks are unaffected. This
> will allow cursor movement to be smooth, but changing cursor size or
> showing/hiding cursor will still fall back so watermarks can be updated.
>
> Only moving and changing fb is allowed.
>
> Changes since v1:
> - Set page flip to always_unused for trybot.
> - Copy fence correctly, ignore plane_state->state, should be NULL.
> - Check crtc_state for !active and modeset, go to slowpath if the case.
> Changes since v2:
> - Make error handling work correctly. (Matthew Auld)
>
> Signed-off-by: Maarten Lankhorst
Pulled in the entire pile through drm-misc, thanks.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 47 +++
> drivers/gpu/drm/i915/intel_display.c | 132
> +-
> drivers/gpu/drm/i915/intel_drv.h | 2 +
> 3 files changed, 163 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index dbe9fb41ae53..60d75ce8a989 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -103,36 +103,24 @@ intel_plane_destroy_state(struct drm_plane *plane,
> drm_atomic_helper_plane_destroy_state(plane, state);
> }
>
> -static int intel_plane_atomic_check(struct drm_plane *plane,
> - struct drm_plane_state *state)
> +int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> + struct intel_plane_state *intel_state)
> {
> + struct drm_plane *plane = intel_state->base.plane;
> struct drm_i915_private *dev_priv = to_i915(plane->dev);
> - struct drm_crtc *crtc = state->crtc;
> - struct intel_crtc *intel_crtc;
> - struct intel_crtc_state *crtc_state;
> + struct drm_plane_state *state = &intel_state->base;
> struct intel_plane *intel_plane = to_intel_plane(plane);
> - struct intel_plane_state *intel_state = to_intel_plane_state(state);
> - struct drm_crtc_state *drm_crtc_state;
> int ret;
>
> - crtc = crtc ? crtc : plane->state->crtc;
> - intel_crtc = to_intel_crtc(crtc);
> -
> /*
>* Both crtc and plane->crtc could be NULL if we're updating a
>* property while the plane is disabled. We don't actually have
>* anything driver-specific we need to test in that case, so
>* just return success.
>*/
> - if (!crtc)
> + if (!intel_state->base.crtc && !plane->state->crtc)
> return 0;
>
> - drm_crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
> - if (WARN_ON(!drm_crtc_state))
> - return -EINVAL;
> -
> - crtc_state = to_intel_crtc_state(drm_crtc_state);
> -
> /* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */
> intel_state->clip.x1 = 0;
> intel_state->clip.y1 = 0;
> @@ -184,6 +172,31 @@ static int intel_plane_atomic_check(struct drm_plane
> *plane,
> return intel_plane_atomic_calc_changes(&crtc_state->base, state);
> }
>
> +static int intel_plane_atomic_check(struct drm_plane *plane,
> + struct drm_plane_state *state)
> +{
> + struct drm_crtc *crtc = state->crtc;
> + struct drm_crtc_state *drm_crtc_state;
> +
> + crtc = crtc ? crtc : plane->state->crtc;
> +
> + /*
> + * Both crtc and plane->crtc could be NULL if we're updating a
> + * property while the plane is disabled. We don't actually have
> + * anything driver-specific we need to test in that case, so
> + * just return success.
> + */
> + if (!crtc)
> + return 0;
> +
> + drm_crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
> + if (WARN_ON(!drm_crtc_state))
> + return -EINVAL;
> +
> + return
> intel_plane_atomic_check_with_state(to_intel_crtc_state(drm_crtc_state),
> +to_intel_plane_state(state));
> +}
> +
> static void intel_plane_atomic_update(struct drm_plane *plane,
> struct drm_plane_state *old_state)
> {
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 9eaf1e5bdae9..5568ecac2edc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15028,6 +15028,136 @@ const struct drm_plane_funcs intel_plane_funcs = {
> .atomic_destroy_state = intel_plane_destroy_state,
> };
>
> +static int
> +intel_legacy_cursor_update(struct drm_plane *plane,
> +struct drm_crtc *crtc,
> +struct drm_framebuffer *fb,
> +int crtc_x, int crtc_y,
> +unsigned int crtc_w, unsigned int
Re: [Intel-gfx] [PATCH 0/2] drm: link status property and DP link training failure handling
On Mon, Dec 19, 2016 at 11:15:40PM +, Pandiyan, Dhinakaran wrote: > On Sun, 2016-12-18 at 14:43 +0100, Daniel Vetter wrote: > > On Sat, Dec 17, 2016 at 05:47:56AM +, Pandiyan, Dhinakaran wrote: > > > On Fri, 2016-12-16 at 16:47 +0200, Jani Nikula wrote: > > > > On Fri, 16 Dec 2016, Daniel Vetter wrote: > > > > > On Fri, Dec 16, 2016 at 12:29:05PM +0200, Jani Nikula wrote: > > > > >> The two remaining patches from [1], rebased. > > > > >> > > > > >> BR, > > > > >> Jani. > > > > >> > > > > >> > > > > >> [1] > > > > >> 1480984058-552-1-git-send-email-manasi.d.navare@intel.com">http://mid.mail-archive.com/1480984058-552-1-git-send-email-manasi.d.navare@intel.com > > > > > > > > > > Just for the record, I think the only thing missing here is the Xorg > > > > > review on the -modesetting patch. As soon as we have that I can vacuum > > > > > this up (probably best through drm-misc, but not sure). > > > > > > > > Yeah I rebased this (and provided a debug hack privately) so Martin can > > > > test the modesetting changes. > > > > > > > > BR, > > > > Jani. > > > > > > > > > > > > > > I tested the -modesetting patch, which Martin had provided to Manasi, > > > with a compliance testing device (DPR-120) that can simulate link > > > training failure. The link rate correctly lowered after the link_status > > > property was set to BAD by the kernel and the userspace responded with a > > > modeset. > > > > > > One thing that was not straight forward to figure out was I had to boot > > > with i915.nuclear_pageflip=1. Is it documented somewhere that the > > > property needs DRIVER_ATOMIC to be set, or is it implicit? > > > > It should work without DRIVER_ATOMIC. At least the property should be > > exposed ... If this does only work with DRIVER_ATOMIC set then we have a > > bug somewhere. Can you pls try to figure out why it doesn't work? > > > > The property is exposed even without DRIVER_ATOMIC set, but the value is > always GOOD (0). > We set connector->state->link_status to BAD when link training fails but > the getconnector() ioctl ends up reading obj->properties->values[i] if > DRIVER_ATOMIC is NOT set. But with DRIVER_ATOMIC set, getconnector() > calls into drm_atomic_connector_get_property() and retrieves the value > stored in connector->state->link_status. That sounds like a bug in the getconnector code. This needs the same treatment as other places, see e.g. commit d3a46183db97536a53df5de6b556bd61197842b2 Author: Daniel Vetter Date: Wed Jun 8 14:19:15 2016 +0200 drm: Replace fb_helper->atomic with mode_config->atomic_commit I think it'd be good to extract this check into a drm_drv_uses_atomic_modeset to better self-document the code, roll it out to all existing places that check for atomic_commit and then also roll it out to the getproperty functions (for connectors, planes and crtcs). > > > The other thing I had trouble with -modesetting was, there was no > > > modeset following a long pulse from the sink at the begging of the test. > > > I had to force a modeset by changing the resolution so that the link > > > training path is executed. However, the link training failure induced a > > > modeset without any intervention. > > > > Sounds roughly like how it's supposed to work. For real mode configuration > > changes the desktop environment is supposed to set the mode it wants, by > > listening to the xrandr hotplug event. That's not the same as the udev > > hotplug event. You can listen for the xrandr hotplug event using > > > > $ xev -event randr > > > > Got it, -modesetting does indeed send out the hotplug events upon > hotplug. Excellent, so at least that's all working well. -Daniel > > -DK > > > > Cheers, Daniel > > > > > > > > -DK > > > > > > > > > > > -Daniel > > > > > > > > > >> > > > > >> > > > > >> Manasi Navare (2): > > > > >> drm: Add a new connector atomic property for link status > > > > >> drm/i915: Implement Link Rate fallback on Link training failure > > > > >> > > > > >> drivers/gpu/drm/drm_atomic.c | 16 + > > > > >> drivers/gpu/drm/drm_atomic_helper.c | 15 > > > > >> drivers/gpu/drm/drm_connector.c | 52 > > > > >> +++ > > > > >> drivers/gpu/drm/i915/intel_dp.c | 27 ++ > > > > >> drivers/gpu/drm/i915/intel_dp_link_training.c | 22 ++-- > > > > >> drivers/gpu/drm/i915/intel_drv.h | 3 ++ > > > > >> include/drm/drm_connector.h | 19 ++ > > > > >> include/drm/drm_mode_config.h | 5 +++ > > > > >> include/uapi/drm/drm_mode.h | 4 +++ > > > > >> 9 files changed, 161 insertions(+), 2 deletions(-) > > > > >> > > > > >> -- > > > > >> 2.1.4 > > > > >> > > > > >> ___ > > > > >> dri-devel mailing list > > > > >> dri-de...@lists.freedesktop.org > > > > >> https://lists.freedesktop.org/mailman/listinfo/dri-devel > > >
Re: [Intel-gfx] [RFC 0/4] Introduce drmfs pseudo filesystem for drm subsystem
On Tue, 20 Dec 2016, Laurent Pinchart wrote: > Hi Swati, > > On Monday 19 Dec 2016 16:12:22 swati.dhin...@intel.com wrote: >> From: Swati Dhingra >> >> Currently, we don't have a stable ABI which can be used for the purpose of >> providing output debug/loggging/crc and other such data from DRM. >> The ABI in current use (filesystems, ioctls, et al.) have their own >> constraints and are intended to output a particular type of data. >> Few cases in point: >> sysfs- stable ABI, but constrained to one textual value per file >> debugfs - unstable ABI, free-for-all >> ioctls - not as suitable to many single purpose continuous data >>dumping, we would very quickly run out ioctl space; requires more >>userspace support than "cat" >> device nodes - a real possibilty, kernel instantiation is more tricky, >> requires udev (+udev.rules) or userspace discovery of the >> dynamic major:minor (via sysfs) [mounting a registered >> filesystem is easy in comparison] >> netlink - stream based, therefore involves numerous copies. >> >> Debugfs is the lesser among the evils here, thereby we have grown used to >> the convenience and flexibility in presentation that debugfs gives us >> (including relayfs inodes) that we want some of that hierachy in stable user >> ABI form. > > Seriously, why ? A subsystem growing its own file system sounds so wrong. It > seems that you want to have all the benefits of a stable ABI without going > through the standardization effort that this requires. I can see so many ways > that drmfs could be abused, with drivers throwing in new data with little or > no review. You'll need very compelling arguments to convince me. This is not unlike my sentiments on the first version posted [1]. There's also the distinct feeling of [2]. Suffice it to say at this time that I'm dubious, not convinced enough to defend this. Swati, please refrain from posting new versions of the patches until there's some consensus one way or the other; it's counter-productive to keep splitting off the discussion into several patch series threads at this stage. Let's have the discussion here. BR, Jani. [1] 87lgw0xcf4.fsf@intel.com">http://mid.mail-archive.com/87lgw0xcf4.fsf@intel.com [2] https://xkcd.com/927/ > >> Due to these limitations, there is a need for a new pseudo filesytem, that >> would act as a stable 'free-for-all' ABI, with the heirarchial structure and >> thus convenience of debugfs. This will be managed by drm, thus named >> 'drmfs'. DRM would register this filesystem to manage a canonical >> mountpoint, but this wouldn't limit everyone to only using that pseudofs >> underneath. >> >> This can serve to hold various kinds of output data from Linux DRM >> subsystems, for the files which can't truely fit anywhere else with >> existing ABI's but present so, for the lack of a better place. >> >> In this patch series, we have introduced a pseudo filesystem named as >> 'drmfs' for now. The filesystem is introduced in the first patch, and the >> subsequent patches make use of the filesystem interfaces, in drm driver, >> and making them available for use by the drm subsystem components, one of >> which is i915. We've moved the location of i915 GuC logs from debugfs to >> drmfs in the last patch. Subsequently, more such files such as pipe_crc, >> error states, memory stats, etc. can be move to this filesystem, if the >> idea introduced here is acceptable per se. The filesystem introduced is >> being used to house the data generated by i915 driver in this patch series, >> but will hopefully be generic enough to provide scope for usage by any >> other drm subsystem component. >> >> The patch series is being floated as RFC to gather feedback on the idea and >> infrastructure proposed here and it's suitability to address the specific >> problem statement/use case. >> >> v2: fix the bat failures caused due to missing config check >> >> v3: Changes made: >> - Move the location of drmfs from fs/ to drivers/gpu/drm/ (Chris) >> - Moving config checks to header (Chris,Daniel) >> >> v4: Added the kernel Documentaion (using Sphinx). >> >> Sourab Gupta (4): >> drm: Introduce drmfs pseudo filesystem interfaces >> drm: Register drmfs filesystem from drm init >> drm: Create driver specific root directory inside drmfs >> drm/i915: Creating guc log file in drmfs instead of debugfs >> >> Documentation/gpu/drm-uapi.rst | 76 >> drivers/gpu/drm/Kconfig| 9 + >> drivers/gpu/drm/Makefile | 1 + >> drivers/gpu/drm/drm_drv.c | 26 ++ >> drivers/gpu/drm/drmfs.c| 566 ++ >> drivers/gpu/drm/i915/i915_guc_submission.c | 33 +- >> include/drm/drm_drv.h | 3 + >> include/drm/drmfs.h| 77 >> include/uapi/linux/magic.h | 3 + >> 9 files changed, 773
Re: [Intel-gfx] [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder
On Mon, 2016-12-19 at 19:35 +0200, Jani Nikula wrote:
> On Mon, 19 Dec 2016, ville.syrj...@linux.intel.com wrote:
> >
> > From: Ville Syrjälä
> >
> > Let's clean up the mess we have in the if ladder that assigns the
> > .get_cdclk() hooks. The grouping of the platforms by the function
> > results in a thing that's not really legible, so let's do it the
> > other way around and order the if ladder by platform and duplicate
> > whatever assignments we need.
> >
> > To further avoid confusion with the function names let's rename
> > them to just fixed__get_cdclk(). The other option would
> > be to duplicate the functions entirely but it seems quite
> > pointless to do that since each one just returns a fixed value.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 41 +--
> > -
> > 1 file changed, 24 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index bbfef348783b..29f91e799272 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -7379,22 +7379,22 @@ static int valleyview_get_cdclk(struct
> > drm_i915_private *dev_priv)
> > CCK_DISPLAY_CLOCK_CONTROL);
> > }
> >
> > -static int ilk_get_cdclk(struct drm_i915_private *dev_priv)
> > +static int fixed_450mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > {
> > return 45;
> > }
> >
> > -static int i945_get_cdclk(struct drm_i915_private *dev_priv)
> > +static int fixed_400mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > {
> > return 40;
> > }
> >
> > -static int i915_get_cdclk(struct drm_i915_private *dev_priv)
> > +static int fixed_333mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > {
> > return 33;
> > }
> >
> > -static int i9xx_misc_get_cdclk(struct drm_i915_private *dev_priv)
> > +static int fixed_200mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > {
> > return 20;
> > }
> > @@ -7444,7 +7444,7 @@ static int i915gm_get_cdclk(struct drm_i915_private
> > *dev_priv)
> > }
> > }
> >
> > -static int i865_get_cdclk(struct drm_i915_private *dev_priv)
> > +static int fixed_266mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > {
> > return 27;
> > }
> > @@ -7487,7 +7487,7 @@ static int i85x_get_cdclk(struct drm_i915_private
> > *dev_priv)
> > return 0;
> > }
> >
> > -static int i830_get_cdclk(struct drm_i915_private *dev_priv)
> > +static int fixed_133mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > {
> > return 13;
> > }
> > @@ -16098,32 +16098,39 @@ void intel_init_display_hooks(struct
> > drm_i915_private *dev_priv)
> > dev_priv->display.get_cdclk = haswell_get_cdclk;
> > else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> > dev_priv->display.get_cdclk = valleyview_get_cdclk;
> > + else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> > else if (IS_GEN5(dev_priv))
> > - dev_priv->display.get_cdclk = ilk_get_cdclk;
> > - else if (IS_I945G(dev_priv) || IS_I965G(dev_priv) ||
> > - IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> > - dev_priv->display.get_cdclk = i945_get_cdclk;
> > + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
> > else if (IS_GM45(dev_priv))
> > dev_priv->display.get_cdclk = gm45_get_cdclk;
> > + else if (IS_G4X(dev_priv))
> > + dev_priv->display.get_cdclk = g33_get_cdclk;
> > else if (IS_I965GM(dev_priv))
> > dev_priv->display.get_cdclk = i965gm_get_cdclk;
> > + else if (IS_I965G(dev_priv))
> > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> > else if (IS_PINEVIEW(dev_priv))
> > dev_priv->display.get_cdclk = pnv_get_cdclk;
> > - else if (IS_G33(dev_priv) || IS_G4X(dev_priv))
> > + else if (IS_G33(dev_priv))
> > dev_priv->display.get_cdclk = g33_get_cdclk;
> > - else if (IS_I915G(dev_priv))
> > - dev_priv->display.get_cdclk = i915_get_cdclk;
> > - else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
> > - dev_priv->display.get_cdclk = i9xx_misc_get_cdclk;
> > + else if (IS_I945GM(dev_priv))
> > + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
> > + else if (IS_I945G(dev_priv))
> > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> > else if (IS_I915GM(dev_priv))
> > dev_priv->display.get_cdclk = i915gm_get_cdclk;
> > + else if (IS_I915G(dev_priv))
> > + dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk;
> > else if (IS_I865G(dev_priv))
> > - dev_priv->display.get_cdclk = i865_get_cdclk;
> > + dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk;
> > else if (IS_I85X(dev_priv))
> > dev_priv->display.get_cdclk = i
Re: [Intel-gfx] [PATCH] drm/i915: More reasonable memcpy unroll in i915_gem_swizzle_page
On 19/12/2016 10:32, Jani Nikula wrote:
On Mon, 19 Dec 2016, Joonas Lahtinen wrote:
On ma, 2016-12-19 at 09:19 +, Tvrtko Ursulin wrote:
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -631,9 +631,9 @@ i915_gem_swizzle_page(struct page *page)
vaddr = kmap(page);
for (i = 0; i < PAGE_SIZE; i += 128) {
- memcpy(temp, &vaddr[i], 64);
+ memcpy(&temp[0], &vaddr[i], 64);
memcpy(&vaddr[i], &vaddr[i + 64], 64);
- memcpy(&vaddr[i + 64], temp, 64);
+ memcpy(&vaddr[i + 64], &temp[0], 64);
This reeks of GCC bug badly. So I would not apply as next time the bug
could be into the another direction.
Agreed. Please file a bug over at https://gcc.gnu.org/bugs/
Bug filed: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78869
Potentially useful code generation explorer picked up from #gcc:
https://godbolt.org/g/XNioHs
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/debugfs: use rb_entry()
On Mon, Dec 19, 2016 at 10:43:49PM +0800, Geliang Tang wrote:
> To make the code clearer, use rb_entry() instead of container_of() to
> deal with rbtree.
>
> Signed-off-by: Geliang Tang
Not sure a direct alias for container_of is all that useful, but we have
list_entry too ...
Queued up for 4.11, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index b77b53b..e04d9a1 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -686,7 +686,7 @@ static void i915_ring_seqno_info(struct seq_file *m,
>
> spin_lock_irq(&b->lock);
> for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
> - struct intel_wait *w = container_of(rb, typeof(*w), node);
> + struct intel_wait *w = rb_entry(rb, typeof(*w), node);
>
> seq_printf(m, "Waiting (%s): %s [%d] on %x\n",
> engine->name, w->tsk->comm, w->tsk->pid, w->seqno);
> @@ -1336,7 +1336,7 @@ static int i915_hangcheck_info(struct seq_file *m, void
> *unused)
>
> &dev_priv->gpu_error.missed_irq_rings)));
> spin_lock_irq(&b->lock);
> for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
> - struct intel_wait *w = container_of(rb, typeof(*w),
> node);
> + struct intel_wait *w = rb_entry(rb, typeof(*w), node);
>
> seq_printf(m, "\t%s [%d] waiting for %x\n",
> w->tsk->comm, w->tsk->pid, w->seqno);
> @@ -3252,7 +3252,7 @@ static int i915_engine_info(struct seq_file *m, void
> *unused)
>
> spin_lock_irq(&b->lock);
> for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
> - struct intel_wait *w = container_of(rb, typeof(*w),
> node);
> + struct intel_wait *w = rb_entry(rb, typeof(*w), node);
>
> seq_printf(m, "\t%s [%d] waiting for %x\n",
> w->tsk->comm, w->tsk->pid, w->seqno);
> --
> 2.9.3
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder
On Tue, 20 Dec 2016, Ander Conselvan De Oliveira wrote:
> On Mon, 2016-12-19 at 19:35 +0200, Jani Nikula wrote:
>> On Mon, 19 Dec 2016, ville.syrj...@linux.intel.com wrote:
>> >
>> > From: Ville Syrjälä
>> >
>> > Let's clean up the mess we have in the if ladder that assigns the
>> > .get_cdclk() hooks. The grouping of the platforms by the function
>> > results in a thing that's not really legible, so let's do it the
>> > other way around and order the if ladder by platform and duplicate
>> > whatever assignments we need.
>> >
>> > To further avoid confusion with the function names let's rename
>> > them to just fixed__get_cdclk(). The other option would
>> > be to duplicate the functions entirely but it seems quite
>> > pointless to do that since each one just returns a fixed value.
>> >
>> > Signed-off-by: Ville Syrjälä
>> > ---
>> > drivers/gpu/drm/i915/intel_display.c | 41 +--
>> > -
>> > 1 file changed, 24 insertions(+), 17 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_display.c
>> > b/drivers/gpu/drm/i915/intel_display.c
>> > index bbfef348783b..29f91e799272 100644
>> > --- a/drivers/gpu/drm/i915/intel_display.c
>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>> > @@ -7379,22 +7379,22 @@ static int valleyview_get_cdclk(struct
>> > drm_i915_private *dev_priv)
>> > CCK_DISPLAY_CLOCK_CONTROL);
>> > }
>> >
>> > -static int ilk_get_cdclk(struct drm_i915_private *dev_priv)
>> > +static int fixed_450mhz_get_cdclk(struct drm_i915_private *dev_priv)
>> > {
>> > return 45;
>> > }
>> >
>> > -static int i945_get_cdclk(struct drm_i915_private *dev_priv)
>> > +static int fixed_400mhz_get_cdclk(struct drm_i915_private *dev_priv)
>> > {
>> > return 40;
>> > }
>> >
>> > -static int i915_get_cdclk(struct drm_i915_private *dev_priv)
>> > +static int fixed_333mhz_get_cdclk(struct drm_i915_private *dev_priv)
>> > {
>> > return 33;
>> > }
>> >
>> > -static int i9xx_misc_get_cdclk(struct drm_i915_private *dev_priv)
>> > +static int fixed_200mhz_get_cdclk(struct drm_i915_private *dev_priv)
>> > {
>> > return 20;
>> > }
>> > @@ -7444,7 +7444,7 @@ static int i915gm_get_cdclk(struct drm_i915_private
>> > *dev_priv)
>> > }
>> > }
>> >
>> > -static int i865_get_cdclk(struct drm_i915_private *dev_priv)
>> > +static int fixed_266mhz_get_cdclk(struct drm_i915_private *dev_priv)
>> > {
>> > return 27;
>> > }
>> > @@ -7487,7 +7487,7 @@ static int i85x_get_cdclk(struct drm_i915_private
>> > *dev_priv)
>> > return 0;
>> > }
>> >
>> > -static int i830_get_cdclk(struct drm_i915_private *dev_priv)
>> > +static int fixed_133mhz_get_cdclk(struct drm_i915_private *dev_priv)
>> > {
>> > return 13;
>> > }
>> > @@ -16098,32 +16098,39 @@ void intel_init_display_hooks(struct
>> > drm_i915_private *dev_priv)
>> > dev_priv->display.get_cdclk = haswell_get_cdclk;
>> > else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> > dev_priv->display.get_cdclk = valleyview_get_cdclk;
>> > + else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
>> > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
>> > else if (IS_GEN5(dev_priv))
>> > - dev_priv->display.get_cdclk = ilk_get_cdclk;
>> > - else if (IS_I945G(dev_priv) || IS_I965G(dev_priv) ||
>> > - IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
>> > - dev_priv->display.get_cdclk = i945_get_cdclk;
>> > + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
>> > else if (IS_GM45(dev_priv))
>> > dev_priv->display.get_cdclk = gm45_get_cdclk;
>> > + else if (IS_G4X(dev_priv))
>> > + dev_priv->display.get_cdclk = g33_get_cdclk;
>> > else if (IS_I965GM(dev_priv))
>> > dev_priv->display.get_cdclk = i965gm_get_cdclk;
>> > + else if (IS_I965G(dev_priv))
>> > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
>> > else if (IS_PINEVIEW(dev_priv))
>> > dev_priv->display.get_cdclk = pnv_get_cdclk;
>> > - else if (IS_G33(dev_priv) || IS_G4X(dev_priv))
>> > + else if (IS_G33(dev_priv))
>> > dev_priv->display.get_cdclk = g33_get_cdclk;
>> > - else if (IS_I915G(dev_priv))
>> > - dev_priv->display.get_cdclk = i915_get_cdclk;
>> > - else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
>> > - dev_priv->display.get_cdclk = i9xx_misc_get_cdclk;
>> > + else if (IS_I945GM(dev_priv))
>> > + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
>> > + else if (IS_I945G(dev_priv))
>> > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
>> > else if (IS_I915GM(dev_priv))
>> > dev_priv->display.get_cdclk = i915gm_get_cdclk;
>> > + else if (IS_I915G(dev_priv))
>> > + dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk;
>> > else if (IS_I865G(dev_priv))
>> > - dev_priv->display.get_cdclk = i865_get_cdclk;
>> > + dev_priv->d
Re: [Intel-gfx] [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder
On Tue, 2016-12-20 at 12:08 +0200, Jani Nikula wrote:
> On Tue, 20 Dec 2016, Ander Conselvan De Oliveira wrote:
> >
> > On Mon, 2016-12-19 at 19:35 +0200, Jani Nikula wrote:
> > >
> > > On Mon, 19 Dec 2016, ville.syrj...@linux.intel.com wrote:
> > > >
> > > >
> > > > From: Ville Syrjälä
> > > >
> > > > Let's clean up the mess we have in the if ladder that assigns the
> > > > .get_cdclk() hooks. The grouping of the platforms by the function
> > > > results in a thing that's not really legible, so let's do it the
> > > > other way around and order the if ladder by platform and duplicate
> > > > whatever assignments we need.
> > > >
> > > > To further avoid confusion with the function names let's rename
> > > > them to just fixed__get_cdclk(). The other option would
> > > > be to duplicate the functions entirely but it seems quite
> > > > pointless to do that since each one just returns a fixed value.
> > > >
> > > > Signed-off-by: Ville Syrjälä
> > > > ---
> > > > drivers/gpu/drm/i915/intel_display.c | 41 +--
> > > >
> > > > -
> > > > 1 file changed, 24 insertions(+), 17 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > index bbfef348783b..29f91e799272 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > @@ -7379,22 +7379,22 @@ static int valleyview_get_cdclk(struct
> > > > drm_i915_private *dev_priv)
> > > > CCK_DISPLAY_CLOCK_CONTROL);
> > > > }
> > > >
> > > > -static int ilk_get_cdclk(struct drm_i915_private *dev_priv)
> > > > +static int fixed_450mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > > > {
> > > > return 45;
> > > > }
> > > >
> > > > -static int i945_get_cdclk(struct drm_i915_private *dev_priv)
> > > > +static int fixed_400mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > > > {
> > > > return 40;
> > > > }
> > > >
> > > > -static int i915_get_cdclk(struct drm_i915_private *dev_priv)
> > > > +static int fixed_333mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > > > {
> > > > return 33;
> > > > }
> > > >
> > > > -static int i9xx_misc_get_cdclk(struct drm_i915_private *dev_priv)
> > > > +static int fixed_200mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > > > {
> > > > return 20;
> > > > }
> > > > @@ -7444,7 +7444,7 @@ static int i915gm_get_cdclk(struct
> > > > drm_i915_private
> > > > *dev_priv)
> > > > }
> > > > }
> > > >
> > > > -static int i865_get_cdclk(struct drm_i915_private *dev_priv)
> > > > +static int fixed_266mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > > > {
> > > > return 27;
> > > > }
> > > > @@ -7487,7 +7487,7 @@ static int i85x_get_cdclk(struct drm_i915_private
> > > > *dev_priv)
> > > > return 0;
> > > > }
> > > >
> > > > -static int i830_get_cdclk(struct drm_i915_private *dev_priv)
> > > > +static int fixed_133mhz_get_cdclk(struct drm_i915_private *dev_priv)
> > > > {
> > > > return 13;
> > > > }
> > > > @@ -16098,32 +16098,39 @@ void intel_init_display_hooks(struct
> > > > drm_i915_private *dev_priv)
> > > > dev_priv->display.get_cdclk = haswell_get_cdclk;
> > > > else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> > > > dev_priv->display.get_cdclk = valleyview_get_cdclk;
> > > > + else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> > > > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> > > > else if (IS_GEN5(dev_priv))
> > > > - dev_priv->display.get_cdclk = ilk_get_cdclk;
> > > > - else if (IS_I945G(dev_priv) || IS_I965G(dev_priv) ||
> > > > - IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> > > > - dev_priv->display.get_cdclk = i945_get_cdclk;
> > > > + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
> > > > else if (IS_GM45(dev_priv))
> > > > dev_priv->display.get_cdclk = gm45_get_cdclk;
> > > > + else if (IS_G4X(dev_priv))
> > > > + dev_priv->display.get_cdclk = g33_get_cdclk;
> > > > else if (IS_I965GM(dev_priv))
> > > > dev_priv->display.get_cdclk = i965gm_get_cdclk;
> > > > + else if (IS_I965G(dev_priv))
> > > > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> > > > else if (IS_PINEVIEW(dev_priv))
> > > > dev_priv->display.get_cdclk = pnv_get_cdclk;
> > > > - else if (IS_G33(dev_priv) || IS_G4X(dev_priv))
> > > > + else if (IS_G33(dev_priv))
> > > > dev_priv->display.get_cdclk = g33_get_cdclk;
> > > > - else if (IS_I915G(dev_priv))
> > > > - dev_priv->display.get_cdclk = i915_get_cdclk;
> > > > - else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
> > > > - dev_priv
Re: [Intel-gfx] [PATCH i-g-t v1] tests/perf: Fix pointer length compilation errors on 32-bit systems
On Tue, Dec 20, 2016 at 12:48:38AM -0500, Robert Foss wrote:
> Fix pointer length compilations errors on 32-bit systems.
That's fine, but considering to_user_pointer() to wrap it up similarly
to the unwrap on the kernel side (and for everyone ofc).
static inline uint64_t to_user_pointer(void *ptr)
{
return (uint64_t)(uintptr_t)ptr;
}
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/breadcrumbs: s/container_of/rb_entry/
In keeping with commit f802cf7e0986 ("drm/i915/debugfs: use
rb_entry()"), convert the primary user of the rbtrees over to using
rb_entry rather than the equivalent container_of.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_breadcrumbs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/intel_breadcrumbs.c
index 53ae7884babd..fcfa423d08bd 100644
--- a/drivers/gpu/drm/i915/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c
@@ -154,7 +154,7 @@ static void __intel_breadcrumbs_disable_irq(struct
intel_breadcrumbs *b)
static inline struct intel_wait *to_wait(struct rb_node *node)
{
- return container_of(node, struct intel_wait, node);
+ return rb_entry(node, struct intel_wait, node);
}
static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
@@ -427,7 +427,7 @@ static bool signal_complete(struct drm_i915_gem_request
*request)
static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
{
- return container_of(rb, struct drm_i915_gem_request, signaling.node);
+ return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
}
static void signaler_set_rtpriority(void)
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/debugfs: use rb_entry()
To make the code clearer, use rb_entry() instead of container_of() to
deal with rbtree.
Signed-off-by: Geliang Tang
---
drivers/gpu/drm/i915/i915_debugfs.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index b77b53b..e04d9a1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -686,7 +686,7 @@ static void i915_ring_seqno_info(struct seq_file *m,
spin_lock_irq(&b->lock);
for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
- struct intel_wait *w = container_of(rb, typeof(*w), node);
+ struct intel_wait *w = rb_entry(rb, typeof(*w), node);
seq_printf(m, "Waiting (%s): %s [%d] on %x\n",
engine->name, w->tsk->comm, w->tsk->pid, w->seqno);
@@ -1336,7 +1336,7 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
&dev_priv->gpu_error.missed_irq_rings)));
spin_lock_irq(&b->lock);
for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
- struct intel_wait *w = container_of(rb, typeof(*w),
node);
+ struct intel_wait *w = rb_entry(rb, typeof(*w), node);
seq_printf(m, "\t%s [%d] waiting for %x\n",
w->tsk->comm, w->tsk->pid, w->seqno);
@@ -3252,7 +3252,7 @@ static int i915_engine_info(struct seq_file *m, void
*unused)
spin_lock_irq(&b->lock);
for (rb = rb_first(&b->waiters); rb; rb = rb_next(rb)) {
- struct intel_wait *w = container_of(rb, typeof(*w),
node);
+ struct intel_wait *w = rb_entry(rb, typeof(*w), node);
seq_printf(m, "\t%s [%d] waiting for %x\n",
w->tsk->comm, w->tsk->pid, w->seqno);
--
2.9.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Remove useless VLV_FEATURE Macro.
On Mon, Dec 19, 2016 at 01:55:08PM -0800, Rodrigo Vivi wrote:
> This macro got useless after commit 8d9c20e1d1e38
> "drm/i915: Remove .is_mobile field from platform struct"
>
> that removed is_mobile split from VLV definition.
> Also this was never reused on any following platform.
>
> So let's clean up a bit here.
>
> Cc: Carlos Santa
> Cc: Daniel Vetter
> Signed-off-by: Rodrigo Vivi
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/i915_pci.c | 34 --
> 1 file changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 9885458..7435a73 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -265,26 +265,24 @@
> .has_l3_dpf = 1,
> };
>
> -#define VLV_FEATURES \
> - .gen = 7, .num_pipes = 2, \
> - .is_lp = 1, \
> - .has_psr = 1, \
> - .has_runtime_pm = 1, \
> - .has_rc6 = 1, \
> - .has_gmbus_irq = 1, \
> - .has_hw_contexts = 1, \
> - .has_gmch_display = 1, \
> - .has_hotplug = 1, \
> - .has_aliasing_ppgtt = 1, \
> - .has_full_ppgtt = 1, \
> - .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> - .display_mmio_offset = VLV_DISPLAY_BASE, \
> - GEN_DEFAULT_PIPEOFFSETS, \
> - CURSOR_OFFSETS
> -
> static const struct intel_device_info intel_valleyview_info = {
> - VLV_FEATURES,
> .platform = INTEL_VALLEYVIEW,
> + .gen = 7,
> + .is_lp = 1,
> + .num_pipes = 2,
> + .has_psr = 1,
> + .has_runtime_pm = 1,
> + .has_rc6 = 1,
> + .has_gmbus_irq = 1,
> + .has_hw_contexts = 1,
> + .has_gmch_display = 1,
> + .has_hotplug = 1,
> + .has_aliasing_ppgtt = 1,
> + .has_full_ppgtt = 1,
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING,
> + .display_mmio_offset = VLV_DISPLAY_BASE,
> + GEN_DEFAULT_PIPEOFFSETS,
> + CURSOR_OFFSETS
> };
>
> #define HSW_FEATURES \
> --
> 1.9.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/breadcrumbs: s/container_of/rb_entry/
On Tue, Dec 20, 2016 at 10:40:03AM +, Chris Wilson wrote:
> In keeping with commit f802cf7e0986 ("drm/i915/debugfs: use
> rb_entry()"), convert the primary user of the rbtrees over to using
> rb_entry rather than the equivalent container_of.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_breadcrumbs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c
> b/drivers/gpu/drm/i915/intel_breadcrumbs.c
> index 53ae7884babd..fcfa423d08bd 100644
> --- a/drivers/gpu/drm/i915/intel_breadcrumbs.c
> +++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c
> @@ -154,7 +154,7 @@ static void __intel_breadcrumbs_disable_irq(struct
> intel_breadcrumbs *b)
>
> static inline struct intel_wait *to_wait(struct rb_node *node)
> {
> - return container_of(node, struct intel_wait, node);
> + return rb_entry(node, struct intel_wait, node);
> }
>
> static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
> @@ -427,7 +427,7 @@ static bool signal_complete(struct drm_i915_gem_request
> *request)
>
> static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
> {
> - return container_of(rb, struct drm_i915_gem_request, signaling.node);
> + return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
> }
>
> static void signaler_set_rtpriority(void)
> --
> 2.11.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t v1] tests/perf: Fix pointer length compilation errors on 32-bit systems
On 2016-12-20 05:28 AM, Chris Wilson wrote:
On Tue, Dec 20, 2016 at 12:48:38AM -0500, Robert Foss wrote:
Fix pointer length compilations errors on 32-bit systems.
That's fine, but considering to_user_pointer() to wrap it up similarly
to the unwrap on the kernel side (and for everyone ofc).
static inline uint64_t to_user_pointer(void *ptr)
{
return (uint64_t)(uintptr_t)ptr;
}
-Chris
I'll resubmit a to_user_pointer version.
Thanks Chris!
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2] tests/perf: Fix pointer length compilation errors on 32-bit systems
Fix pointer length compilations errors on 32-bit systems.
Signed-off-by: Robert Foss
---
tests/perf.c | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 87df9f00..c9c5c57e 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -432,7 +432,7 @@ test_system_wide_paranoid(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
@@ -458,7 +458,7 @@ test_system_wide_paranoid(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd;
@@ -491,7 +491,7 @@ test_invalid_open_flags(void)
struct drm_i915_perf_open_param param = {
.flags = ~0, /* Undefined flag bits set! */
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
@@ -513,7 +513,7 @@ test_invalid_oa_metric_set_id(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd;
@@ -548,7 +548,7 @@ test_invalid_oa_format_id(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd;
@@ -581,7 +581,7 @@ test_missing_sample_flags(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
@@ -735,7 +735,7 @@ open_and_read_2_oa_reports(int format_id,
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
@@ -1047,7 +1047,7 @@ test_invalid_oa_exponent(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
@@ -1103,7 +1103,7 @@ test_low_oa_exponent_permissions(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
uint64_t oa_period, oa_freq;
@@ -1168,7 +1168,7 @@ test_per_context_mode_unprivileged(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
/* should be default, but just to be sure... */
@@ -1255,7 +1255,7 @@ test_blocking(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
uint8_t buf[1024 * 1024];
@@ -1348,7 +1348,7 @@ test_polling(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof
Re: [Intel-gfx] [PATCH i-g-t v2] tests/perf: Fix pointer length compilation errors on 32-bit systems
I didn't test v2 properly and it is lacking an include.
I will resubmit a working version in a little bit.
Rob.
On 2016-12-20 05:56 AM, Robert Foss wrote:
Fix pointer length compilations errors on 32-bit systems.
Signed-off-by: Robert Foss
---
tests/perf.c | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 87df9f00..c9c5c57e 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -432,7 +432,7 @@ test_system_wide_paranoid(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
@@ -458,7 +458,7 @@ test_system_wide_paranoid(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd;
@@ -491,7 +491,7 @@ test_invalid_open_flags(void)
struct drm_i915_perf_open_param param = {
.flags = ~0, /* Undefined flag bits set! */
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
@@ -513,7 +513,7 @@ test_invalid_oa_metric_set_id(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd;
@@ -548,7 +548,7 @@ test_invalid_oa_format_id(void)
.flags = I915_PERF_FLAG_FD_CLOEXEC |
I915_PERF_FLAG_FD_NONBLOCK,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd;
@@ -581,7 +581,7 @@ test_missing_sample_flags(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
@@ -735,7 +735,7 @@ open_and_read_2_oa_reports(int format_id,
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
@@ -1047,7 +1047,7 @@ test_invalid_oa_exponent(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
@@ -1103,7 +1103,7 @@ test_low_oa_exponent_permissions(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
uint64_t oa_period, oa_freq;
@@ -1168,7 +1168,7 @@ test_per_context_mode_unprivileged(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
/* should be default, but just to be sure... */
@@ -1255,7 +1255,7 @@ test_blocking(void)
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC,
.num_properties = sizeof(properties) / 16,
- .properties_ptr = (uint64_t)properties,
+ .properties_ptr = to_user_pointer(properties),
};
int stream_fd = __perf_open(drm_fd, ¶m);
uint8_t buf[1024 * 1024];
@@ -1348,7 +1348,7 @@ test_polling(v
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On Mon, Dec 19, 2016 at 12:43:45PM +, Chris Wilson wrote:
> If we at first do not succeed with attempting to remap our physical
> pages using a coalesced scattergather list, try again with one
> scattergather entry per page. This should help with swiotlb as it uses a
> limited buffer size and only searches for contiguous chunks within its
> buffer aligned up to the next boundary - i.e. we may prematurely cause a
> failure as we are unable to utilize the unused space between large
> chunks and trigger an error such as:
>
>i915 :00:02.0: swiotlb buffer is full (sz: 1630208 bytes)
>
> Reported-by: Juergen Gross
> Fixes: 871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment
> size")
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Imre Deak
> Cc:
Reviewed-by: Daniel Vetter
Feels a bit funny to call swiotlb_* functions, I'd kinda assume that we
could somehow figure this out from the dma limits instead of leaking
through the dma api abstraction. But that's already there, so meh.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem.c | 26 ++
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 412f3513f269..4e263df2afc3 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2326,7 +2326,8 @@ static struct sg_table *
> i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
> {
> struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
> - int page_count, i;
> + const unsigned long page_count = obj->base.size / PAGE_SIZE;
> + unsigned long i;
> struct address_space *mapping;
> struct sg_table *st;
> struct scatterlist *sg;
> @@ -2352,7 +2353,7 @@ i915_gem_object_get_pages_gtt(struct
> drm_i915_gem_object *obj)
> if (st == NULL)
> return ERR_PTR(-ENOMEM);
>
> - page_count = obj->base.size / PAGE_SIZE;
> +rebuild_st:
> if (sg_alloc_table(st, page_count, GFP_KERNEL)) {
> kfree(st);
> return ERR_PTR(-ENOMEM);
> @@ -2411,8 +2412,25 @@ i915_gem_object_get_pages_gtt(struct
> drm_i915_gem_object *obj)
> i915_sg_trim(st);
>
> ret = i915_gem_gtt_prepare_pages(obj, st);
> - if (ret)
> - goto err_pages;
> + if (ret) {
> + /* DMA remapping failed? One possible cause is that
> + * it could not reserve enough large entries, asking
> + * for PAGE_SIZE chunks instead may be helpful.
> + */
> + if (max_segment > PAGE_SIZE) {
> + for_each_sgt_page(page, sgt_iter, st)
> + put_page(page);
> + sg_free_table(st);
> +
> + max_segment = PAGE_SIZE;
> + goto rebuild_st;
> + } else {
> + dev_warn(&dev_priv->drm.pdev->dev,
> + "Failed to DMA remap %lu pages\n",
> + page_count);
> + goto err_pages;
> + }
> + }
>
> if (i915_gem_object_needs_bit17_swizzle(obj))
> i915_gem_object_do_bit_17_swizzle(obj, st);
> --
> 2.11.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add a test that we terminate the trimmed sgtable as expected
On Mon, Dec 19, 2016 at 12:43:46PM +, Chris Wilson wrote:
> In commit 0c40ce130e38 ("drm/i915: Trim the object sg table"), we expect
> to copy exactly orig_st->nents across and allocate the table thusly.
> The copy loop should therefore end with the new_sg being NULL.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/i915_gem.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4e263df2afc3..0a82cce5f731 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2316,6 +2316,7 @@ static void i915_sg_trim(struct sg_table *orig_st)
> /* called before being DMA mapped, no need to copy sg->dma_* */
> new_sg = sg_next(new_sg);
> }
> + GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
I wasn't sure this holds up vs. overallocation of sg tables, but the last
entry is marked and that mark seems to survive intact everywhere.
Reviewed-by: Daniel Vetter
>
> sg_free_table(orig_st);
>
> --
> 2.11.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On 19/12/2016 12:43, Chris Wilson wrote:
If we at first do not succeed with attempting to remap our physical
pages using a coalesced scattergather list, try again with one
scattergather entry per page. This should help with swiotlb as it uses a
limited buffer size and only searches for contiguous chunks within its
buffer aligned up to the next boundary - i.e. we may prematurely cause a
failure as we are unable to utilize the unused space between large
chunks and trigger an error such as:
i915 :00:02.0: swiotlb buffer is full (sz: 1630208 bytes)
Reported-by: Juergen Gross
Fixes: 871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment size")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Imre Deak
Cc:
---
drivers/gpu/drm/i915/i915_gem.c | 26 ++
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 412f3513f269..4e263df2afc3 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2326,7 +2326,8 @@ static struct sg_table *
i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
{
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- int page_count, i;
+ const unsigned long page_count = obj->base.size / PAGE_SIZE;
+ unsigned long i;
struct address_space *mapping;
struct sg_table *st;
struct scatterlist *sg;
@@ -2352,7 +2353,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object
*obj)
if (st == NULL)
return ERR_PTR(-ENOMEM);
- page_count = obj->base.size / PAGE_SIZE;
+rebuild_st:
if (sg_alloc_table(st, page_count, GFP_KERNEL)) {
kfree(st);
return ERR_PTR(-ENOMEM);
@@ -2411,8 +2412,25 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object
*obj)
i915_sg_trim(st);
ret = i915_gem_gtt_prepare_pages(obj, st);
- if (ret)
- goto err_pages;
+ if (ret) {
+ /* DMA remapping failed? One possible cause is that
+* it could not reserve enough large entries, asking
+* for PAGE_SIZE chunks instead may be helpful.
+*/
+ if (max_segment > PAGE_SIZE) {
+ for_each_sgt_page(page, sgt_iter, st)
+ put_page(page);
+ sg_free_table(st);
+
+ max_segment = PAGE_SIZE;
+ goto rebuild_st;
+ } else {
+ dev_warn(&dev_priv->drm.pdev->dev,
+"Failed to DMA remap %lu pages\n",
+page_count);
+ goto err_pages;
+ }
+ }
if (i915_gem_object_needs_bit17_swizzle(obj))
i915_gem_object_do_bit_17_swizzle(obj, st);
How much is the cost of freeing and re-acquiring pages in the fall back
case? It could be avoidable by using the table and adding something like
sgt = i915_sg_copy(sgt, table_max_segment). But it depends on how likely
is this path to be hit on swiotlb platforms. I have no idea. Our
datasets are much bigger than the swiotlb space - if that is true on
such platforms?
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add a test that we terminate the trimmed sgtable as expected
On 19/12/2016 12:43, Chris Wilson wrote:
In commit 0c40ce130e38 ("drm/i915: Trim the object sg table"), we expect
to copy exactly orig_st->nents across and allocate the table thusly.
The copy loop should therefore end with the new_sg being NULL.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4e263df2afc3..0a82cce5f731 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2316,6 +2316,7 @@ static void i915_sg_trim(struct sg_table *orig_st)
/* called before being DMA mapped, no need to copy sg->dma_* */
new_sg = sg_next(new_sg);
}
+ GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
sg_free_table(orig_st);
I was sure I had this in the code back then, hm.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On Tue, Dec 20, 2016 at 11:13:43AM +, Tvrtko Ursulin wrote:
>
> On 19/12/2016 12:43, Chris Wilson wrote:
> >If we at first do not succeed with attempting to remap our physical
> >pages using a coalesced scattergather list, try again with one
> >scattergather entry per page. This should help with swiotlb as it uses a
> >limited buffer size and only searches for contiguous chunks within its
> >buffer aligned up to the next boundary - i.e. we may prematurely cause a
> >failure as we are unable to utilize the unused space between large
> >chunks and trigger an error such as:
> >
> > i915 :00:02.0: swiotlb buffer is full (sz: 1630208 bytes)
> >
> >Reported-by: Juergen Gross
> >Fixes: 871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment
> >size")
> >Signed-off-by: Chris Wilson
> >Cc: Tvrtko Ursulin
> >Cc: Imre Deak
> >Cc:
> >---
> > drivers/gpu/drm/i915/i915_gem.c | 26 ++
> > 1 file changed, 22 insertions(+), 4 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_gem.c
> >b/drivers/gpu/drm/i915/i915_gem.c
> >index 412f3513f269..4e263df2afc3 100644
> >--- a/drivers/gpu/drm/i915/i915_gem.c
> >+++ b/drivers/gpu/drm/i915/i915_gem.c
> >@@ -2326,7 +2326,8 @@ static struct sg_table *
> > i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
> > {
> > struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
> >-int page_count, i;
> >+const unsigned long page_count = obj->base.size / PAGE_SIZE;
> >+unsigned long i;
> > struct address_space *mapping;
> > struct sg_table *st;
> > struct scatterlist *sg;
> >@@ -2352,7 +2353,7 @@ i915_gem_object_get_pages_gtt(struct
> >drm_i915_gem_object *obj)
> > if (st == NULL)
> > return ERR_PTR(-ENOMEM);
> >
> >-page_count = obj->base.size / PAGE_SIZE;
> >+rebuild_st:
> > if (sg_alloc_table(st, page_count, GFP_KERNEL)) {
> > kfree(st);
> > return ERR_PTR(-ENOMEM);
> >@@ -2411,8 +2412,25 @@ i915_gem_object_get_pages_gtt(struct
> >drm_i915_gem_object *obj)
> > i915_sg_trim(st);
> >
> > ret = i915_gem_gtt_prepare_pages(obj, st);
> >-if (ret)
> >-goto err_pages;
> >+if (ret) {
> >+/* DMA remapping failed? One possible cause is that
> >+ * it could not reserve enough large entries, asking
> >+ * for PAGE_SIZE chunks instead may be helpful.
> >+ */
> >+if (max_segment > PAGE_SIZE) {
> >+for_each_sgt_page(page, sgt_iter, st)
> >+put_page(page);
> >+sg_free_table(st);
> >+
> >+max_segment = PAGE_SIZE;
> >+goto rebuild_st;
> >+} else {
> >+dev_warn(&dev_priv->drm.pdev->dev,
> >+ "Failed to DMA remap %lu pages\n",
> >+ page_count);
> >+goto err_pages;
> >+}
> >+}
> >
> > if (i915_gem_object_needs_bit17_swizzle(obj))
> > i915_gem_object_do_bit_17_swizzle(obj, st);
> >
>
> How much is the cost of freeing and re-acquiring pages in the fall
> back case? It could be avoidable by using the table and adding
> something like sgt = i915_sg_copy(sgt, table_max_segment). But it
> depends on how likely is this path to be hit on swiotlb platforms. I
> have no idea. Our datasets are much bigger than the swiotlb space -
> if that is true on such platforms?
It's below my level of care (atm). Platforms hitting this are using
swiotlb *bounce* buffers. They will not be able to support a full gfx
workload and be going through a copy. We could avoid the additional
work, the sg_table is large enough for a 1:1 copy if we do it before the
trim, but more importantly we need a simple fix for 4.10.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/breadcrumbs: s/container_of/rb_entry/
== Series Details == Series: drm/i915/breadcrumbs: s/container_of/rb_entry/ URL : https://patchwork.freedesktop.org/series/17048/ State : success == Summary == Series 17048v1 drm/i915/breadcrumbs: s/container_of/rb_entry/ https://patchwork.freedesktop.org/api/1.0/series/17048/revisions/1/mbox/ fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 c0d7a4455b44d48ede0a38af3a1469d28dee10c9 drm-tip: 2016y-12m-20d-10h-01m-56s UTC integration manifest 735081d drm/i915/breadcrumbs: s/container_of/rb_entry/ == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3336/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/guc: Make intel_guc_recv static.
This function is only used by intel_guc_send() and it doesn't
need to be exposed outside of intel_uc.o file. Also when defined
as static, compiler will generate smaller code. Additionally let
it take guc param instead dev_priv to match function name.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Arkadiusz Hiler
---
drivers/gpu/drm/i915/intel_uc.c | 8 +---
drivers/gpu/drm/i915/intel_uc.h | 1 -
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 8ae6795..c6be352 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -34,8 +34,10 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
*/
-bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status)
+static bool intel_guc_recv(struct intel_guc *guc, u32 *status)
{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
u32 val = I915_READ(SOFT_SCRATCH(0));
*status = val;
return INTEL_GUC_RECV_IS_RESPONSE(val);
@@ -69,9 +71,9 @@ int intel_guc_send(struct intel_guc *guc, const u32 *action,
u32 len)
* up to that length of time, then switch to a slower sleep-wait loop.
* No inte_guc_send command should ever take longer than 10ms.
*/
- ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10);
+ ret = wait_for_us(intel_guc_recv(guc, &status), 10);
if (ret)
- ret = wait_for(intel_guc_recv(dev_priv, &status), 10);
+ ret = wait_for(intel_guc_recv(guc, &status), 10);
if (status != INTEL_GUC_STATUS_SUCCESS) {
/*
* Either the GuC explicitly returned an error (which
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 11f5608..406b06a 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -170,7 +170,6 @@ struct intel_guc {
/* intel_uc.c */
void intel_uc_init_early(struct drm_i915_private *dev_priv);
-bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len);
int intel_guc_sample_forcewake(struct intel_guc *guc);
int intel_guc_log_flush_complete(struct intel_guc *guc);
--
2.7.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 1/2] lib/i915_pciids.h: Update to latest version wich includes GLK ids
Copy the include/drm/i915_pciids.h file from following kernel commit,
which includes Geminilake PCI IDs.
commit 8363e3c3947d0e22955f94a6a87e4f17ce5087b4
Author: Ander Conselvan de Oliveira
Date: Thu Nov 10 17:23:08 2016 +0200
drm/i915/glk: Add Geminilake PCI IDs
Signed-off-by: Ander Conselvan de Oliveira
---
lib/i915_pciids.h | 42 ++
lib/intel_device_info.c | 27 +++
overlay/igfx.c| 9 +++--
tests/gen7_forcewake_mt.c | 3 +--
4 files changed, 25 insertions(+), 56 deletions(-)
diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 33466bf..540be9f 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -134,7 +134,7 @@
#define INTEL_IVB_Q_IDS(info) \
INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
-#define INTEL_HSW_D_IDS(info) \
+#define INTEL_HSW_IDS(info) \
INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
@@ -179,9 +179,7 @@
INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
- INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ \
-
-#define INTEL_HSW_M_IDS(info) \
+ INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
@@ -198,17 +196,15 @@
INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */
-#define INTEL_VLV_M_IDS(info) \
+#define INTEL_VLV_IDS(info) \
INTEL_VGA_DEVICE(0x0f30, info), \
INTEL_VGA_DEVICE(0x0f31, info), \
INTEL_VGA_DEVICE(0x0f32, info), \
INTEL_VGA_DEVICE(0x0f33, info), \
- INTEL_VGA_DEVICE(0x0157, info)
-
-#define INTEL_VLV_D_IDS(info) \
+ INTEL_VGA_DEVICE(0x0157, info), \
INTEL_VGA_DEVICE(0x0155, info)
-#define INTEL_BDW_GT12M_IDS(info) \
+#define INTEL_BDW_GT12_IDS(info) \
INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
@@ -216,21 +212,17 @@
INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
- INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
-
-#define INTEL_BDW_GT12D_IDS(info) \
+ INTEL_VGA_DEVICE(0x161E, info), /* GT2 ULX */ \
INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
-#define INTEL_BDW_GT3M_IDS(info) \
+#define INTEL_BDW_GT3_IDS(info) \
INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
- INTEL_VGA_DEVICE(0x162E, info) /* ULX */
-
-#define INTEL_BDW_GT3D_IDS(info) \
+ INTEL_VGA_DEVICE(0x162E, info), /* ULX */\
INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
@@ -244,14 +236,12 @@
INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
-#define INTEL_BDW_M_IDS(info) \
- INTEL_BDW_GT12M_IDS(info), \
- INTEL_BDW_GT3M_IDS(info), \
- INTEL_BDW_RSVDM_IDS(info)
-
-#define INTEL_BDW_D_IDS(info) \
- INTEL_BDW_GT12D_IDS(info), \
- INTEL_BDW_GT3D_IDS(info), \
+#define INTEL_BDW_IDS(info) \
+ INTEL_BDW_GT12_IDS(info), \
+ INTEL_BDW_GT3_IDS(info), \
+ INTEL_BDW_RSVDM_IDS(info), \
+ INTEL_BDW_GT12_IDS(info), \
+ INTEL_BDW_GT3_IDS(info), \
INTEL_BDW_RSVDD_IDS(info)
#define INTEL_CHV_IDS(info) \
@@ -302,6 +292,10 @@
INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
INTEL_VGA_DEVICE(0x5A85, info) /* APL HD Graphics 500 */
+#define INTEL_GLK_IDS(info) \
+ INTEL_VGA_DEVICE(0x3184, info), \
+ INTEL_VGA_DEVICE(0x3185, info)
+
#define INTEL_KBL_GT1_IDS(info)\
INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 5aab684..5805b5e 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -138,36 +138,18 @@ static const struct intel_device_info
intel_valleyview_info = {
.is_valleyview = true,
.codename = "valleyview"
};
-static const struct intel_device_info intel_valleyview_m_info = {
- .gen = BIT(6),
- .is_mobile = tru
[Intel-gfx] [PATCH i-g-t 2/2] lib/intel_chipset: Add geminilake platform definition
Signed-off-by: Ander Conselvan de Oliveira
---
lib/intel_chipset.h | 2 ++
lib/intel_device_info.c | 8
2 files changed, 10 insertions(+)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 3c1260b..259b45f 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -63,6 +63,7 @@ struct intel_device_info {
bool is_skylake : 1;
bool is_broxton : 1;
bool is_kabylake : 1;
+ bool is_geminilake : 1;
const char *codename;
};
@@ -156,6 +157,7 @@ void intel_check_pch(void);
#define IS_KABYLAKE(devid) (intel_get_device_info(devid)->is_kabylake)
#define IS_SKYLAKE(devid) (intel_get_device_info(devid)->is_skylake)
#define IS_BROXTON(devid) (intel_get_device_info(devid)->is_broxton)
+#define IS_GEMINILAKE(devid) (intel_get_device_info(devid)->is_geminilake)
#define IS_GEN(devid, x) (intel_get_device_info(devid)->gen & (1u <<
((x)-1)))
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->gen & -(1u <<
((x)-1)))
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 5805b5e..db4f383 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -175,6 +175,12 @@ static const struct intel_device_info intel_kabylake_info
= {
.codename = "kabylake"
};
+static const struct intel_device_info intel_geminilake_info = {
+ .gen = BIT(8),
+ .is_geminilake = true,
+ .codename = "geminilake"
+};
+
static const struct pci_id_match intel_device_match[] = {
INTEL_I830_IDS(&intel_i830_info),
INTEL_I845G_IDS(&intel_i845_info),
@@ -218,6 +224,8 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_KBL_IDS(&intel_kabylake_info),
+ INTEL_GLK_IDS(&intel_geminilake_info),
+
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
};
--
2.5.5
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On Tue, Dec 20, 2016 at 11:33:27AM +, Chris Wilson wrote: > On Tue, Dec 20, 2016 at 11:13:43AM +, Tvrtko Ursulin wrote: > > How much is the cost of freeing and re-acquiring pages in the fall > > back case? It could be avoidable by using the table and adding > > something like sgt = i915_sg_copy(sgt, table_max_segment). But it > > depends on how likely is this path to be hit on swiotlb platforms. I > > have no idea. Our datasets are much bigger than the swiotlb space - > > if that is true on such platforms? > > It's below my level of care (atm). Platforms hitting this are using > swiotlb *bounce* buffers. They will not be able to support a full gfx > workload and be going through a copy. We could avoid the additional > work, the sg_table is large enough for a 1:1 copy if we do it before the > trim, but more importantly we need a simple fix for 4.10. Pushed this pair as I think this is the safe course of action. Creating i915_sg_expand() is a job for a rainy day. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/6] drm/i915: Use drm_connector_list_iter in debugfs
Op 19-12-16 om 09:24 schreef Daniel Vetter:
> While at it also try to reduce the locking a bit to what's really just
> needed instead of everything that we could possibly lock.
>
> Added a new for_each_intel_connector_iter which includes the cast to
> intel_connector.
>
> Otherwise just plain transformation with nothing special going on.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 62
> -
> drivers/gpu/drm/i915/i915_drv.h | 3 ++
> 2 files changed, 44 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 15deb2bc568b..f7633e8474b2 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2617,12 +2617,15 @@ static int i915_sink_crc(struct seq_file *m, void
> *data)
> struct drm_i915_private *dev_priv = node_to_i915(m->private);
> struct drm_device *dev = &dev_priv->drm;
> struct intel_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> struct intel_dp *intel_dp = NULL;
> int ret;
> u8 crc[6];
>
> - drm_modeset_lock_all(dev);
> - for_each_intel_connector(dev, connector) {
> + /* connection mutex also gives us a read lock on the crtc */
> + drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
> + drm_connector_list_iter_get(dev, &conn_iter);
> + for_each_intel_connector_iter(connector, &conn_iter) {
> struct drm_crtc *crtc;
>
> if (!connector->base.state->best_encoder)
> @@ -2648,7 +2651,8 @@ static int i915_sink_crc(struct seq_file *m, void *data)
Wrong, it's using crtc->state, which definitely requires the crtc mutex.
crtc_state can update without connection_mutex.
Not the other way around though, acquiring connector_state also acquires the
crtc_mutex, so if you have only a crtc lock you can iterate over
crtc_state->connector_mask and dereference its state. In practice we still
require the connection_mutex lock. :)
> }
> ret = -ENODEV;
> out:
> - drm_modeset_unlock_all(dev);
> + drm_connector_list_iter_put(&conn_iter);
> + drm_modeset_unlock(&dev->mode_config.connection_mutex);
> return ret;
> }
>
> @@ -3089,9 +3093,9 @@ static int i915_display_info(struct seq_file *m, void
> *unused)
> struct drm_device *dev = &dev_priv->drm;
> struct intel_crtc *crtc;
> struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
>
> intel_runtime_pm_get(dev_priv);
> - drm_modeset_lock_all(dev);
> seq_printf(m, "CRTC info\n");
> seq_printf(m, "-\n");
> for_each_intel_crtc(dev, crtc) {
> @@ -3099,6 +3103,7 @@ static int i915_display_info(struct seq_file *m, void
> *unused)
> struct intel_crtc_state *pipe_config;
> int x, y;
>
> + drm_modeset_lock(&crtc->base.mutex, NULL);
> pipe_config = to_intel_crtc_state(crtc->base.state);
>
> seq_printf(m, "CRTC %d: pipe: %c, active=%s, (size=%dx%d),
> dither=%s, bpp=%d\n",
> @@ -3123,15 +3128,19 @@ static int i915_display_info(struct seq_file *m, void
> *unused)
> seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n",
> yesno(!crtc->cpu_fifo_underrun_disabled),
> yesno(!crtc->pch_fifo_underrun_disabled));
> + drm_modeset_unlock(&crtc->base.mutex);
> }
>
> seq_printf(m, "\n");
> seq_printf(m, "Connector info\n");
> seq_printf(m, "--\n");
> - list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
> + mutex_lock(&dev->mode_config.mutex);
> + drm_connector_list_iter_get(dev, &conn_iter);
> + drm_for_each_connector_iter(connector, &conn_iter)
> intel_connector_info(m, connector);
> - }
> - drm_modeset_unlock_all(dev);
> + drm_connector_list_iter_put(&conn_iter);
> + mutex_unlock(&dev->mode_config.mutex);
> +
> intel_runtime_pm_put(dev_priv);
>
> return 0;
> @@ -3452,13 +3461,16 @@ static void drrs_status_per_crtc(struct seq_file *m,
> struct i915_drrs *drrs = &dev_priv->drrs;
> int vrefresh = 0;
> struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
>
> - drm_for_each_connector(connector, dev) {
> + drm_connector_list_iter_get(dev, &conn_iter);
> + drm_for_each_connector_iter(connector, &conn_iter) {
> if (connector->state->crtc != &intel_crtc->base)
> continue;
>
> seq_printf(m, "%s:\n", connector->name);
> }
> + drm_connector_list_iter_put(&conn_iter);
>
> if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
> seq_puts(m, "\tVBT: DRRS_type: Static");
> @@ -3544,9 +3556,10 @@ static int i915_dp_mst_info(struct seq_file *m, void
> *unused)
> st
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK
== Series Details == Series: series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK URL : https://patchwork.freedesktop.org/series/16926/ State : failure == Summary == Series 16926v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/16926/revisions/1/mbox/ Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN (fi-kbl-7500u) Test pm_rpm: Subgroup basic-pci-d3-state: pass -> FAIL (fi-kbl-7500u) Subgroup basic-rte: pass -> FAIL (fi-kbl-7500u) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:223 dwarn:1 dfail:0 fail:2 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 c0d7a4455b44d48ede0a38af3a1469d28dee10c9 drm-tip: 2016y-12m-20d-10h-01m-56s UTC integration manifest 09486c1 drm/i915/glk: Convert a few more IS_BROXTON() to IS_GEN9_LP() 2ba792e drm/i915/glk: Add missing bits to allow runtime pm suspend on GLK. 630af86 drm/i915/DMC/GLK: Load DMC on GLK == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3338/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: skip the first 4k of stolen memory on everything >= gen8
Em Qua, 2016-12-14 às 12:55 -0200, Paulo Zanoni escreveu: > BSpec got updated and this workaround is now listed as standard > required programming for all subsequent projects. This is confirmed > to > fix Skylake screen flickering issues (probably caused by the fact > that > we initialized a ring in the first page of stolen, but I didn't 100% > confirm this theory). > > v2: this is the patch that fixes the screen flickering, document it. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94605 > Cc: sta...@vger.kernel.org > Tested-by: Dominik Klementowski > Signed-off-by: Paulo Zanoni Daniel gave me the missing R-B for this patch on IRC, so I pushed both patches. Thanks everybody for the reviews. > --- > drivers/gpu/drm/i915/i915_gem_stolen.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c > b/drivers/gpu/drm/i915/i915_gem_stolen.c > index efc0e74..b1c8897 100644 > --- a/drivers/gpu/drm/i915/i915_gem_stolen.c > +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c > @@ -55,10 +55,9 @@ int i915_gem_stolen_insert_node_in_range(struct > drm_i915_private *dev_priv, > return -ENODEV; > > /* See the comment at the drm_mm_init() call for more about > this check. > - * WaSkipStolenMemoryFirstPage:bdw,chv,kbl (incomplete) > + * WaSkipStolenMemoryFirstPage:bdw+ (incomplete) > */ > - if (start < 4096 && (IS_GEN8(dev_priv) || > - IS_KBL_REVID(dev_priv, 0, > KBL_REVID_A0))) > + if (start < 4096 && INTEL_GEN(dev_priv) >= 8) > start = 4096; > > mutex_lock(&dev_priv->mm.stolen_lock); ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 01/19] drm/i915: Provide a hook for selftests
Some pieces of code are independent of hardware but are very tricky to
exercise through the normal userspace ABI or via debugfs hooks. Being
able to create mock unit tests and execute them through CI is vital.
Start by adding a central point where we can execute unit tests and
a parameter to enable them. This is disabled by default as the
expectation is that these tests will occasionally explode.
To facilitate integration with igt, any parameter beginning with
i915.igt__ is interpreted as a subtest executable independently via
igt/drv_selftest.
Two classes of selftests are recognised: mock unit tests and integration
tests. Mock unit tests are run as soon as the module is loaded, before
the device is probed. At that point there is no driver instantiated and
all hw interactions must be "mocked". This is very useful for writing
universal tests to exercise code not typically run on a broad range of
architectures. Alternatively, you can hook into the late selftests and
run when the device has been instantiated - hw interactions are real.
v2: Add a macro for compiling conditional code for mock objects inside
real objects.
v3: Differentiate between mock unit tests and late integration test.
v4: List the tests in natural order, use igt to sort after modparam.
v5: s/late/live/
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin #v1
---
drivers/gpu/drm/i915/Kconfig.debug | 15 ++
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/i915_pci.c| 19 +-
drivers/gpu/drm/i915/i915_selftest.h | 91 +
.../gpu/drm/i915/selftests/i915_live_selftests.h | 11 +
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 11 +
drivers/gpu/drm/i915/selftests/i915_selftest.c | 222 +
7 files changed, 371 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/i915_selftest.h
create mode 100644 drivers/gpu/drm/i915/selftests/i915_live_selftests.h
create mode 100644 drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
create mode 100644 drivers/gpu/drm/i915/selftests/i915_selftest.c
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index 598551dbf62c..de051502e891 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -26,6 +26,7 @@ config DRM_I915_DEBUG
select DRM_DEBUG_MM if DRM=y
select DRM_DEBUG_MM_SELFTEST
select DRM_I915_SW_FENCE_DEBUG_OBJECTS
+ select DRM_I915_SELFTEST
default n
help
Choose this option to turn on extra driver debugging that may affect
@@ -59,3 +60,17 @@ config DRM_I915_SW_FENCE_DEBUG_OBJECTS
Recommended for driver developers only.
If in doubt, say "N".
+
+config DRM_I915_SELFTEST
+ bool "Enable selftests upon driver load"
+ depends on DRM_I915
+ default n
+ help
+ Choose this option to allow the driver to perform selftests upon
+ loading; also requires the i915.selftest=1 module parameter. To
+ exit the module after running the selftests (i.e. to prevent normal
+ module initialisation afterwards) use i915.selftest=-1.
+
+ Recommended for driver developers only.
+
+ If in doubt, say "N".
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5196509e71cf..461aeb44a9ad 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -3,6 +3,7 @@
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
subdir-ccflags-$(CONFIG_DRM_I915_WERROR) := -Werror
+subdir-ccflags-$(CONFIG_DRM_I915_SELFTEST) := -I$(src) -I$(src)/selftests
subdir-ccflags-y += \
$(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
@@ -114,6 +115,8 @@ i915-y += dvo_ch7017.o \
# Post-mortem debug and GPU hang state capture
i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
+i915-$(CONFIG_DRM_I915_SELFTEST) += \
+ selftests/i915_selftest.o
# virtual gpu code
i915-y += i915_vgpu.o
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9885458b0fb8..3d416d142573 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -27,6 +27,7 @@
#include
#include "i915_drv.h"
+#include "i915_selftest.h"
#define GEN_DEFAULT_PIPEOFFSETS \
.pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \
@@ -477,6 +478,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
{
struct intel_device_info *intel_info =
(struct intel_device_info *) ent->driver_data;
+ int err;
if (IS_ALPHA_SUPPORT(intel_info) && !i915.alpha_support) {
DRM_INFO("The driver support for your hardware in this kernel
version is alpha quality\n"
@@ -500,7 +502,17 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
if (vga_switcheroo_client_p
[Intel-gfx] [RFCv2 05/19] drm/i915: Add unit tests for the breadcrumb rbtree, completion
Second retroactive test, make sure that the waiters are removed from the
global wait-tree when their seqno completes.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c | 103 +
drivers/gpu/drm/i915/selftests/mock_engine.h | 6 ++
2 files changed, 109 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
index f3c64412ed56..cbc8a8456d59 100644
--- a/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
@@ -64,6 +64,27 @@ static int check_rbtree(struct intel_engine_cs *engine,
return 0;
}
+static int check_completion(struct intel_engine_cs *engine,
+ const unsigned long *bitmap,
+ const struct intel_wait *waiters,
+ const int count)
+{
+ int n;
+
+ for (n = 0; n < count; n++) {
+ if (intel_wait_complete(&waiters[n]) != !!test_bit(n, bitmap))
+ continue;
+
+ pr_err("waiter[%d, seqno=%d] is %s, but expected %s\n",
+ n, waiters[n].seqno,
+ intel_wait_complete(&waiters[n]) ? "complete" : "active",
+ test_bit(n, bitmap) ? "active" : "complete");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int check_rbtree_empty(struct intel_engine_cs *engine)
{
struct intel_breadcrumbs *b = &engine->breadcrumbs;
@@ -154,10 +175,92 @@ static int igt_random_insert_remove(void *arg)
return err;
}
+static int igt_insert_complete(void *arg)
+{
+ const u32 seqno_bias = 0x1000;
+ struct intel_engine_cs *engine = arg;
+ struct intel_wait *waiters;
+ const int count = 4096;
+ unsigned long *bitmap;
+ int err = -ENOMEM;
+ int n, m;
+
+ mock_engine_reset(engine);
+
+ waiters = drm_malloc_gfp(count, sizeof(*waiters), GFP_TEMPORARY);
+ if (!waiters)
+ goto out_engines;
+
+ bitmap = kcalloc(DIV_ROUND_UP(count, BITS_PER_LONG), sizeof(*bitmap),
+GFP_TEMPORARY);
+ if (!bitmap)
+ goto out_waiters;
+
+ for (n = 0; n < count; n++) {
+ intel_wait_init(&waiters[n], n + seqno_bias);
+ intel_engine_add_wait(engine, &waiters[n]);
+ __set_bit(n, bitmap);
+ }
+ err = check_rbtree(engine, bitmap, waiters, count);
+ if (err)
+ goto err;
+
+ for (n = 0; n < count; n = m) {
+ int seqno = 2 * n;
+
+ GEM_BUG_ON(find_first_bit(bitmap, count) != n);
+
+ if (intel_wait_complete(&waiters[n])) {
+ pr_err("waiter[%d, seqno=%d] completed too early\n",
+ n, waiters[n].seqno);
+ err = -EINVAL;
+ goto err;
+ }
+
+ /* complete the following waiters */
+ mock_seqno_advance(engine, seqno + seqno_bias);
+ for (m = n; m <= seqno; m++) {
+ if (m == count)
+ break;
+
+ GEM_BUG_ON(!test_bit(m, bitmap));
+ __clear_bit(m, bitmap);
+ }
+
+ intel_engine_remove_wait(engine, &waiters[n]);
+ RB_CLEAR_NODE(&waiters[n].node);
+
+ err = check_rbtree(engine, bitmap, waiters, count);
+ if (err) {
+ pr_err("rbtree corrupt after seqno advance to %d\n",
+ seqno + seqno_bias);
+ goto err;
+ }
+
+ err = check_completion(engine, bitmap, waiters, count);
+ if (err) {
+ pr_err("completions after seqno advance to %d failed\n",
+ seqno + seqno_bias);
+ goto err;
+ }
+ }
+
+ err = check_rbtree_empty(engine);
+err:
+ kfree(bitmap);
+out_waiters:
+ drm_free_large(waiters);
+out_engines:
+ mock_engine_flush(engine);
+out:
+ return err;
+}
+
int intel_breadcrumbs_selftest(void)
{
static const struct i915_subtest tests[] = {
SUBTEST(igt_random_insert_remove),
+ SUBTEST(igt_insert_complete),
};
struct intel_engine_cs *engine;
int err;
diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.h
b/drivers/gpu/drm/i915/selftests/mock_engine.h
index 0ae9a94aaa1e..9cfe9671f860 100644
--- a/drivers/gpu/drm/i915/selftests/mock_engine.h
+++ b/drivers/gpu/drm/i915/selftests/mock_engine.h
@@ -29,4 +29,10 @@ struct intel_engine_cs *mock_engine(const char *name);
void mock_engine_flush(struct intel_engine_cs *engine);
void mock_engine_reset(struct intel_engine_cs *engine);
+static
[Intel-gfx] [RFCv2 02/19] kselftests: Exercise hw-independent mock tests for i915.ko
Although being a GPU driver most functionality of i915.ko depends upon real hardware, many of its internal interfaces can be "mocked" and so tested independently of any hardware. Expanding the test coverage is not only useful for i915.ko, but should provide some integration tests for core infrastructure as well. Loading i915.ko with mock_selftests=-1 will cause it to execute its mock tests then exit before attempting to probe hardware. If the driver is already loaded and bound to hardware, it requires a few more steps to unbind, and so the simple preliminary modprobe -r will fail, causing the test to be skipped. Signed-off-by: Chris Wilson Cc: Shuah Khan Cc: linux-kselft...@vger.kernel.org --- tools/testing/selftests/drivers/gpu/i915.sh | 15 +++ 1 file changed, 15 insertions(+) create mode 100755 tools/testing/selftests/drivers/gpu/i915.sh diff --git a/tools/testing/selftests/drivers/gpu/i915.sh b/tools/testing/selftests/drivers/gpu/i915.sh new file mode 100755 index ..c06d6e8a8dcc --- /dev/null +++ b/tools/testing/selftests/drivers/gpu/i915.sh @@ -0,0 +1,15 @@ +#!/bin/sh +# Runs hardware independent tests for i915 (drivers/gpu/drm/i915) + +if ! /sbin/modprobe -q -r i915; then + echo "drivers/gpu/i915: [SKIP]" + exit 77 +fi + +if /sbin/modprobe -q i915 mock_selftests=-1; then + /sbin/modprobe -q -r i915 + echo "drivers/gpu/i915: ok" +else + echo "drivers/gpu/i915: [FAIL]" + exit 1 +fi -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 03/19] drm/i915: Add some selftests for sg_table manipulation
Start exercising the scattergather lists, especially looking at
iteration after coalescing.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c| 11 +-
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/scatterlist.c | 255 +
3 files changed, 264 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/scatterlist.c
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 891e479dbf5d..4547d4cd2064 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2315,17 +2315,17 @@ static unsigned int swiotlb_max_size(void)
#endif
}
-static void i915_sg_trim(struct sg_table *orig_st)
+static bool i915_sg_trim(struct sg_table *orig_st)
{
struct sg_table new_st;
struct scatterlist *sg, *new_sg;
unsigned int i;
if (orig_st->nents == orig_st->orig_nents)
- return;
+ return false;
if (sg_alloc_table(&new_st, orig_st->nents, GFP_KERNEL | __GFP_NOWARN))
- return;
+ return false;
new_sg = new_st.sgl;
for_each_sg(orig_st->sgl, sg, orig_st->nents, i) {
@@ -2338,6 +2338,7 @@ static void i915_sg_trim(struct sg_table *orig_st)
sg_free_table(orig_st);
*orig_st = new_st;
+ return true;
}
static struct sg_table *
@@ -4972,3 +4973,7 @@ i915_gem_object_get_dma_address(struct
drm_i915_gem_object *obj,
sg = i915_gem_object_get_sg(obj, n, &offset);
return sg_dma_address(sg) + (offset << PAGE_SHIFT);
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/scatterlist.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
index 69e97a2ba4a6..8639bb8fd50d 100644
--- a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
@@ -9,3 +9,4 @@
* Tests are executed in order by igt/drv_selftest
*/
selftest(sanitycheck, i915_mock_sanitycheck) /* keep first (igt selfcheck) */
+selftest(scatterlist, mock_scatterlist_selftests)
diff --git a/drivers/gpu/drm/i915/selftests/scatterlist.c
b/drivers/gpu/drm/i915/selftests/scatterlist.c
new file mode 100644
index ..9bc3bc6dbc41
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/scatterlist.c
@@ -0,0 +1,255 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include
+
+#include "i915_selftest.h"
+
+#define PFN_BIAS (1 << 10)
+
+struct pfn_table {
+ struct sg_table st;
+ unsigned long start, end;
+};
+
+static noinline int expect_pfn_sg(struct pfn_table *pt, const char *who)
+{
+ struct scatterlist *sg;
+ unsigned long pfn, n;
+
+ pfn = pt->start;
+ for_each_sg(pt->st.sgl, sg, pt->st.nents, n) {
+ struct page *page = sg_page(sg);
+
+ if (page_to_pfn(page) != pfn) {
+ pr_err("%s left pages out of order, expected pfn %lu,
found pfn %lu (using for_each_sg)\n",
+ who, pfn, page_to_pfn(page));
+ return -EINVAL;
+ }
+
+ if (sg->length != (n + 1) * PAGE_SIZE) {
+ pr_err("%s: %s copied wrong sg length, expected size
%lu, found %u (using for_each_sg)\n",
+ __func__, who, (n + 1) * PAGE_SIZE, sg->length);
+ return -EINVAL;
+ }
+
+ cond_resched();
+ if (signal_pending(current))
+ return -EINTR;
+
+ pfn += n + 1;
+ }
+ if (pfn != pt->end) {
+ pr_err("%s: %s finished on wrong pfn, expected %lu, found
%lu\n",
+ __func__, wh
[Intel-gfx] [RFCv2 07/19] drm/i915: Mock the GEM device for self-testing
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 1 +
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 109 +++
drivers/gpu/drm/i915/selftests/mock_gem_device.h | 8 ++
drivers/gpu/drm/i915/selftests/mock_gem_object.h | 8 ++
4 files changed, 126 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/mock_gem_device.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_gem_device.h
create mode 100644 drivers/gpu/drm/i915/selftests/mock_gem_object.h
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4547d4cd2064..f52f1aafb4b9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4976,4 +4976,5 @@ i915_gem_object_get_dma_address(struct
drm_i915_gem_object *obj,
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/scatterlist.c"
+#include "selftests/mock_gem_device.c"
#endif
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
new file mode 100644
index ..95cf1d845bf1
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include
+
+#include "mock_gem_device.h"
+#include "mock_gem_object.h"
+
+static void mock_device_release(struct drm_device *dev)
+{
+ struct drm_i915_private *i915 = to_i915(dev);
+
+ rcu_barrier();
+ while (flush_work(&i915->mm.free_work))
+ rcu_barrier();
+
+ kmem_cache_destroy(i915->objects);
+ put_device(&i915->drm.pdev->dev);
+}
+
+static struct drm_driver mock_driver = {
+ .name = "mock",
+ .driver_features = DRIVER_GEM,
+ .release = mock_device_release,
+
+ .gem_close_object = i915_gem_close_object,
+ .gem_free_object_unlocked = i915_gem_free_object,
+};
+
+static void release_dev(struct device *dev)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+
+ kfree(pdev);
+}
+
+struct drm_i915_private *mock_gem_device(void)
+{
+ struct drm_i915_private *i915;
+ struct pci_dev *pdev;
+ int err;
+
+ i915 = kzalloc(sizeof(*i915), GFP_TEMPORARY);
+ if (!i915)
+ return NULL;
+
+ pdev = kzalloc(sizeof(*pdev), GFP_TEMPORARY);
+ if (!pdev) {
+ kfree(i915);
+ return NULL;
+ }
+
+ device_initialize(&pdev->dev);
+ pdev->dev.release = release_dev;
+ dev_set_name(&pdev->dev, "mock");
+ dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+
+ pm_runtime_dont_use_autosuspend(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
+ pci_set_drvdata(pdev, i915);
+
+ err = drm_dev_init(&i915->drm, &mock_driver, &pdev->dev);
+ if (err) {
+ pr_err("Failed to initialise mock GEM device: err=%d\n", err);
+ put_device(&pdev->dev);
+ kfree(i915);
+ return NULL;
+ }
+ i915->drm.pdev = pdev;
+ i915->drm.dev_private = i915;
+
+ mkwrite_device_info(i915)->gen = -1;
+
+ spin_lock_init(&i915->mm.object_stat_lock);
+
+ INIT_WORK(&i915->mm.free_work, __i915_gem_free_work);
+ init_llist_head(&i915->mm.free_list);
+
+ i915->objects = KMEM_CACHE(mock_object, SLAB_HWCACHE_ALIGN);
+ if (!i915->objects)
+ goto err_device;
+
+ return i915;
+
+err_device:
+ kfree(i915);
+ return NULL;
+}
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.h
b/drivers/gpu/drm/i915/selftests/mock_gem_device.h
new file mode 100644
index ..7ff7c848f731
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.h
@@ -0,0 +1,8 @@
+#ifndef __MOCK_GEM_DEVICE_H__
+#define __MOCK_GEM_DEVICE_H__
+
+#include "i915_drv.h"
+
+struct drm_i915_private
[Intel-gfx] [RFCv2 06/19] drm/i915: Add unit tests for the breadcrumb rbtree, wakeups
Third retroactive test, make sure that the seqno waiters are woken.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c | 169 -
1 file changed, 168 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
index cbc8a8456d59..19859379d7d5 100644
--- a/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
@@ -252,7 +252,173 @@ static int igt_insert_complete(void *arg)
drm_free_large(waiters);
out_engines:
mock_engine_flush(engine);
-out:
+ return err;
+}
+
+struct igt_wakeup {
+ struct task_struct *tsk;
+ atomic_t *ready, *set, *done;
+ struct intel_engine_cs *engine;
+ unsigned long flags;
+ wait_queue_head_t *wq;
+ u32 seqno;
+};
+
+static int wait_atomic(atomic_t *p)
+{
+ schedule();
+ return 0;
+}
+
+static int wait_atomic_timeout(atomic_t *p)
+{
+ return schedule_timeout(10 * HZ) ? 0 : -ETIMEDOUT;
+}
+
+static int igt_wakeup_thread(void *arg)
+{
+ struct igt_wakeup *w = arg;
+ struct intel_wait wait;
+
+ while (!kthread_should_stop()) {
+ DEFINE_WAIT(ready);
+
+ for (;;) {
+ prepare_to_wait(w->wq, &ready, TASK_INTERRUPTIBLE);
+ if (atomic_read(w->ready) == 0)
+ break;
+
+ schedule();
+ }
+ finish_wait(w->wq, &ready);
+ if (atomic_dec_and_test(w->set))
+ wake_up_atomic_t(w->set);
+
+ if (test_bit(0, &w->flags))
+ break;
+
+ intel_wait_init(&wait, w->seqno);
+ intel_engine_add_wait(w->engine, &wait);
+ for (;;) {
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ if (i915_seqno_passed(intel_engine_get_seqno(w->engine),
+ w->seqno))
+ break;
+
+ schedule();
+ }
+ intel_engine_remove_wait(w->engine, &wait);
+ __set_current_state(TASK_RUNNING);
+
+ if (atomic_dec_and_test(w->done))
+ wake_up_atomic_t(w->done);
+ }
+
+ if (atomic_dec_and_test(w->done))
+ wake_up_atomic_t(w->done);
+ return 0;
+}
+
+static void igt_wake_all_sync(atomic_t *ready,
+ atomic_t *set,
+ atomic_t *done,
+ wait_queue_head_t *wq,
+ int count)
+{
+ atomic_set(set, count);
+ atomic_set(done, count);
+
+ atomic_set(ready, 0);
+ wake_up_all(wq);
+
+ wait_on_atomic_t(set, wait_atomic, TASK_UNINTERRUPTIBLE);
+ atomic_set(ready, count);
+}
+
+static int igt_wakeup(void *arg)
+{
+ const int state = TASK_UNINTERRUPTIBLE;
+ struct intel_engine_cs *engine = arg;
+ struct igt_wakeup *waiters;
+ DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq);
+ const int count = 4096;
+ const u32 max_seqno = count / 4;
+ atomic_t ready, set, done;
+ int err = -ENOMEM;
+ int n, step;
+
+ mock_engine_reset(engine);
+
+ waiters = drm_malloc_gfp(count, sizeof(*waiters), GFP_TEMPORARY);
+ if (!waiters)
+ goto out_engines;
+
+ atomic_set(&ready, count);
+ for (n = 0; n < count; n++) {
+ waiters[n].wq = &wq;
+ waiters[n].ready = &ready;
+ waiters[n].set = &set;
+ waiters[n].done = &done;
+ waiters[n].engine = engine;
+ waiters[n].flags = 0;
+
+ waiters[n].tsk = kthread_run(igt_wakeup_thread, &waiters[n],
+"i915/igt:%d", n);
+ if (IS_ERR(waiters[n].tsk))
+ goto out_waiters;
+
+ get_task_struct(waiters[n].tsk);
+ }
+
+ for (step = 1; step <= max_seqno; step <<= 1) {
+ u32 seqno;
+
+ for (n = 0; n < count; n++)
+ waiters[n].seqno = 1 + get_random_int() % max_seqno;
+
+ mock_seqno_advance(engine, 0);
+ igt_wake_all_sync(&ready, &set, &done, &wq, count);
+
+ for (seqno = 1; seqno <= max_seqno + step; seqno += step) {
+ usleep_range(50, 500);
+ mock_seqno_advance(engine, seqno);
+ }
+ GEM_BUG_ON(intel_engine_get_seqno(engine) < 1 + max_seqno);
+
+ err = wait_on_atomic_t(&done, wait_atomic_timeout, state);
+ if (err) {
+ pr_err("Timed out waiting for %d remaining waiters\n",
+ atomic_read(&done));
+
[Intel-gfx] [RFCv2 14/19] drm/i915: Move uncore selfchecks to live selftest infrastructure
Now that the kselftest infrastructure exists, put it to use and add to
it the existing consistency checks on the fw register lookup tables.
v2: s/tabke/table/
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_uncore.c| 52 +---
.../gpu/drm/i915/selftests/i915_live_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/intel_uncore.c | 99 ++
3 files changed, 104 insertions(+), 48 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/intel_uncore.c
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 8fc5f29e79a8..3ab2d891f585 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -635,33 +635,6 @@ find_fw_domain(struct drm_i915_private *dev_priv, u32
offset)
return entry->domains;
}
-static void
-intel_fw_table_check(struct drm_i915_private *dev_priv)
-{
- const struct intel_forcewake_range *ranges;
- unsigned int num_ranges;
- s32 prev;
- unsigned int i;
-
- if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG))
- return;
-
- ranges = dev_priv->uncore.fw_domains_table;
- if (!ranges)
- return;
-
- num_ranges = dev_priv->uncore.fw_domains_table_entries;
-
- for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
- WARN_ON_ONCE(IS_GEN9(dev_priv) &&
-(prev + 1) != (s32)ranges->start);
- WARN_ON_ONCE(prev >= (s32)ranges->start);
- prev = ranges->start;
- WARN_ON_ONCE(prev >= (s32)ranges->end);
- prev = ranges->end;
- }
-}
-
#define GEN_FW_RANGE(s, e, d) \
{ .start = (s), .end = (e), .domains = (d) }
@@ -700,23 +673,6 @@ static const i915_reg_t gen8_shadowed_regs[] = {
/* TODO: Other registers are not yet used */
};
-static void intel_shadow_table_check(void)
-{
- const i915_reg_t *reg = gen8_shadowed_regs;
- s32 prev;
- u32 offset;
- unsigned int i;
-
- if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG))
- return;
-
- for (i = 0, prev = -1; i < ARRAY_SIZE(gen8_shadowed_regs); i++, reg++) {
- offset = i915_mmio_reg_offset(*reg);
- WARN_ON_ONCE(prev >= (s32)offset);
- prev = offset;
- }
-}
-
static int mmio_reg_cmp(u32 key, const i915_reg_t *reg)
{
u32 offset = i915_mmio_reg_offset(*reg);
@@ -1445,10 +1401,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
break;
}
- intel_fw_table_check(dev_priv);
- if (INTEL_GEN(dev_priv) >= 8)
- intel_shadow_table_check();
-
if (intel_vgpu_active(dev_priv)) {
ASSIGN_WRITE_MMIO_VFUNCS(vgpu);
ASSIGN_READ_MMIO_VFUNCS(vgpu);
@@ -1971,3 +1923,7 @@ intel_uncore_forcewake_for_reg(struct drm_i915_private
*dev_priv,
return fw_domains;
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/intel_uncore.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index f3e17cb10e05..3d1d2719ec64 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -9,3 +9,4 @@
* Tests are executed in order by igt/drv_selftest
*/
selftest(sanitycheck, i915_live_sanitycheck) /* keep first (igt selfcheck) */
+selftest(uncore, intel_uncore_live_selftests)
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c
b/drivers/gpu/drm/i915/selftests/intel_uncore.c
new file mode 100644
index ..0ac467940a4f
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i9
[Intel-gfx] [RFCv2 16/19] drm/i915: Sanity check all registers for matching fw domains
Add a late selftest that walks over all forcewake registers (those below
0x4) and checks intel_uncore_forcewake_for_reg() that the look
exists and we having the matching powerwells.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_uncore.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c
b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index c18fddb12d00..c9f90514500f 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -107,6 +107,49 @@ int intel_uncore_mock_selftests(void)
return 0;
}
+static int intel_uncore_check_forcewake_domains(struct drm_i915_private
*dev_priv)
+{
+#define FW_RANGE 0x4
+ unsigned long *valid;
+ u32 offset;
+ int err;
+
+ valid = kzalloc(BITS_TO_LONGS(FW_RANGE) * sizeof(*valid),
+ GFP_TEMPORARY);
+ if (!valid)
+ return -ENOMEM;
+
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
+ check_for_unclaimed_mmio(dev_priv);
+ for (offset = 0; offset < FW_RANGE; offset += 4) {
+ i915_reg_t reg = { offset };
+
+ (void)I915_READ_FW(reg);
+ if (!check_for_unclaimed_mmio(dev_priv))
+ set_bit(offset, valid);
+ }
+
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+
+ for_each_set_bit(offset, valid, FW_RANGE) {
+ i915_reg_t reg = { offset };
+
+ intel_uncore_forcewake_reset(dev_priv, false);
+ check_for_unclaimed_mmio(dev_priv);
+
+ (void)I915_READ(reg);
+ if (check_for_unclaimed_mmio(dev_priv)) {
+ pr_err("Unclaimed mmio read to register 0x%04x\n",
+ offset);
+ err = -EINVAL;
+ }
+ }
+
+ kfree(valid);
+ return err;
+}
+
int intel_uncore_live_selftests(struct drm_i915_private *i915)
{
int err;
@@ -118,5 +161,9 @@ int intel_uncore_live_selftests(struct drm_i915_private
*i915)
if (err)
return err;
+ err = intel_uncore_check_forcewake_domains(i915);
+ if (err)
+ return err;
+
return 0;
}
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 19/19] drm/i915: Initial selftests for exercising eviction
Very simple tests to just ask eviction to find some free space in a full
GTT and one with some available space.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_evict.c | 4 +
drivers/gpu/drm/i915/selftests/i915_gem_evict.c| 237 +
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
3 files changed, 242 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem_evict.c
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c
b/drivers/gpu/drm/i915/i915_gem_evict.c
index f92f63e8749a..c01a9dd6298c 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -383,3 +383,7 @@ int i915_gem_evict_vm(struct i915_address_space *vm, bool
do_idle)
return 0;
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/i915_gem_evict.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
new file mode 100644
index ..c31e6a6c98cd
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -0,0 +1,237 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+
+#include "mock_gem_device.h"
+
+static int populate_ggtt(struct drm_i915_private *i915)
+{
+ struct drm_i915_gem_object *obj;
+ u64 size;
+
+ for (size = 0; size < i915->ggtt.base.total; size += PAGE_SIZE) {
+ struct i915_vma *vma;
+
+ obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
+ }
+
+ if (!list_empty(&i915->mm.unbound_list)) {
+ size = 0;
+ list_for_each_entry(obj, &i915->mm.unbound_list, global_link)
+ size++;
+
+ pr_err("Found %lld objects unbound!\n", size);
+ return -EINVAL;
+ }
+
+ if (list_empty(&i915->ggtt.base.inactive_list)) {
+ pr_err("No objects on the GGTT inactive list!\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void unpin_ggtt(struct drm_i915_private *i915)
+{
+ struct i915_vma *vma;
+
+ list_for_each_entry(vma, &i915->ggtt.base.inactive_list, vm_link)
+ i915_vma_unpin(vma);
+}
+
+static void cleanup_objects(struct drm_i915_private *i915)
+{
+ struct drm_i915_gem_object *obj, *on;
+
+ list_for_each_entry_safe(obj, on, &i915->mm.unbound_list, global_link)
+ i915_gem_object_put(obj);
+
+ list_for_each_entry_safe(obj, on, &i915->mm.bound_list, global_link)
+ i915_gem_object_put(obj);
+
+ mutex_unlock(&i915->drm.struct_mutex);
+
+ rcu_barrier();
+ while (flush_work(&i915->mm.free_work))
+ rcu_barrier();
+
+ mutex_lock(&i915->drm.struct_mutex);
+}
+
+static int igt_evict_something(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct i915_ggtt *ggtt = &i915->ggtt;
+ int err;
+
+ err = populate_ggtt(i915);
+ if (err)
+ goto cleanup;
+
+ err = i915_gem_evict_something(&ggtt->base,
+ PAGE_SIZE, 0, 0,
+ 0, U64_MAX,
+ 0);
+ if (err != -ENOSPC) {
+ pr_err("i915_gem_evict_something failed on a full GGTT with
err=%d\n",
+ err);
+ goto cleanup;
+ }
+
+ unpin_ggtt(i915);
+
+ err = i915_gem_evict_something(&ggtt->base,
+ PAGE_SIZE, 0, 0,
+ 0, U64_MAX,
+
[Intel-gfx] [RFCv2 15/19] drm/i915: Test all fw tables during mock selftests
In addition to just testing the fw table we load, during the initial
mock testing we can test that all tables are valid (so the testing is
not limited to just the platforms that load that particular table).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/intel_uncore.c | 49 --
2 files changed, 37 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
index 33390b2530a7..390af5cd895e 100644
--- a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
@@ -10,6 +10,7 @@
*/
selftest(sanitycheck, i915_mock_sanitycheck) /* keep first (igt selfcheck) */
selftest(scatterlist, mock_scatterlist_selftests)
+selftest(uncore, intel_uncore_mock_selftests)
selftest(breadcrumbs, intel_breadcrumbs_selftest)
selftest(requests, i915_gem_request_selftest)
selftest(objects, i915_gem_object_selftests)
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c
b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 0ac467940a4f..c18fddb12d00 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -24,20 +24,16 @@
#include "i915_selftest.h"
-static int intel_fw_table_check(struct drm_i915_private *i915)
+static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
+ unsigned int num_ranges,
+ bool is_watertight)
{
- const struct intel_forcewake_range *ranges;
- unsigned int num_ranges, i;
+ unsigned int i;
s32 prev;
- ranges = i915->uncore.fw_domains_table;
- if (!ranges)
- return 0;
-
- num_ranges = i915->uncore.fw_domains_table_entries;
for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
/* Check that the table is watertight */
- if (IS_GEN9(i915) && (prev + 1) != (s32)ranges->start) {
+ if (is_watertight && (prev + 1) != (s32)ranges->start) {
pr_err("%s: entry[%d]:(%x, %x) is not watertight to
previous (%x)\n",
__func__, i, ranges->start, ranges->end, prev);
return -EINVAL;
@@ -83,15 +79,42 @@ static int intel_shadow_table_check(void)
return 0;
}
-int intel_uncore_live_selftests(struct drm_i915_private *i915)
+int intel_uncore_mock_selftests(void)
{
- int err;
+ struct {
+ const struct intel_forcewake_range *ranges;
+ unsigned int num_ranges;
+ bool is_watertight;
+ } fw[] = {
+ { __vlv_fw_ranges, ARRAY_SIZE(__vlv_fw_ranges), false },
+ { __chv_fw_ranges, ARRAY_SIZE(__chv_fw_ranges), false },
+ { __gen9_fw_ranges, ARRAY_SIZE(__gen9_fw_ranges), true },
+ };
+ int err, i;
+
+ for (i = 0; i < ARRAY_SIZE(fw); i++) {
+ err = intel_fw_table_check(fw[i].ranges,
+ fw[i].num_ranges,
+ fw[i].is_watertight);
+ if (err)
+ return err;
+ }
- err = intel_fw_table_check(i915);
+ err = intel_shadow_table_check();
if (err)
return err;
- err = intel_shadow_table_check();
+ return 0;
+}
+
+int intel_uncore_live_selftests(struct drm_i915_private *i915)
+{
+ int err;
+
+ /* Confirm the table we load is still valid */
+ err = intel_fw_table_check(i915->uncore.fw_domains_table,
+ i915->uncore.fw_domains_table_entries,
+ INTEL_GEN(i915) >= 9);
if (err)
return err;
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 12/19] drm/i915: Add a simple fence selftest to i915_gem_request
Do a quick selftest on in the interoperability of dma_fence_wait on a
i915_gem_request.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/selftests/i915_gem_request.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
index 743a641b1cd9..e91633ee721c 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
@@ -90,11 +90,58 @@ static int igt_wait_request(void *arg)
return err;
}
+static int igt_fence_wait(void *arg)
+{
+ const long T = HZ / 4;
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_request *request;
+ int err = -EINVAL;
+
+ mutex_lock(&i915->drm.struct_mutex);
+ request = mock_request(i915->engine[RCS], i915->kernel_context, T);
+ if (!request) {
+ err = -ENOMEM;
+ goto out_locked;
+ }
+
+ i915_add_request(request);
+ mutex_unlock(&i915->drm.struct_mutex);
+
+ if (dma_fence_is_signaled(&request->fence)) {
+ pr_err("fence signaled immediately!\n");
+ goto out_device;
+ }
+
+ if (dma_fence_wait_timeout(&request->fence, false, T / 2) != -ETIME) {
+ pr_err("fence wait success after submit (expected timeout)!\n");
+ goto out_device;
+ }
+
+ if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
+ pr_err("fence wait timed out (expected success)!\n");
+ goto out_device;
+ }
+
+ if (!dma_fence_is_signaled(&request->fence)) {
+ pr_err("fence unsignaled after waiting!\n");
+ goto out_device;
+ }
+
+ err = 0;
+out_device:
+ mutex_lock(&i915->drm.struct_mutex);
+out_locked:
+ mock_device_flush(i915);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
int i915_gem_request_selftest(void)
{
static const struct i915_subtest tests[] = {
SUBTEST(igt_add_request),
SUBTEST(igt_wait_request),
+ SUBTEST(igt_fence_wait),
};
struct drm_i915_private *i915;
int err;
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 13/19] drm/i915: Add selftests for object allocation, phys
The phys object is a rarely used device (only very old machines require
a chunk of physically contiguous pages for a few hardware interactions).
As such, it is not exercised by CI and to combat that we want to add a
test that exercises the phys object on all platforms.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c| 1 +
drivers/gpu/drm/i915/selftests/i915_gem_object.c | 114 +
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
3 files changed, 116 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem_object.c
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f52f1aafb4b9..81d24227ecca 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4977,4 +4977,5 @@ i915_gem_object_get_dma_address(struct
drm_i915_gem_object *obj,
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/scatterlist.c"
#include "selftests/mock_gem_device.c"
+#include "selftests/i915_gem_object.c"
#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
new file mode 100644
index ..3ae3bbdd4e42
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
@@ -0,0 +1,114 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+
+#include "mock_gem_device.h"
+
+static int igt_gem_object(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_object *obj;
+ int err = -ENOMEM;
+
+ obj = i915_gem_object_create(i915, PAGE_SIZE);
+ if (IS_ERR(obj)) {
+ err = PTR_ERR(obj);
+ pr_err("i915_gem_object_create failed, err=%d\n", err);
+ goto out;
+ }
+
+ err = 0;
+ i915_gem_object_put(obj);
+out:
+ return err;
+}
+
+static int igt_phys_object(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_object *obj;
+ int err = -ENOMEM;
+
+ obj = i915_gem_object_create(i915, PAGE_SIZE);
+ if (IS_ERR(obj)) {
+ err = PTR_ERR(obj);
+ pr_err("i915_gem_object_create failed, err=%d\n", err);
+ goto out;
+ }
+
+ err = -EINVAL;
+ mutex_lock(&i915->drm.struct_mutex);
+ err = i915_gem_object_attach_phys(obj, PAGE_SIZE);
+ mutex_unlock(&i915->drm.struct_mutex);
+ if (err) {
+ pr_err("i915_gem_object_attach_phys failed, err=%d\n", err);
+ goto err;
+ }
+
+ if (obj->ops != &i915_gem_phys_ops) {
+ pr_err("i915_gem_object_attach_phys did not create a phys
object\n");
+ goto err;
+ }
+
+ if (!atomic_read(&obj->mm.pages_pin_count)) {
+ pr_err("i915_gem_object_attach_phys did not pin its phys
pages\n");
+ goto err;
+ }
+
+ /* Make the object dirty so that put_pages must do copy back the data */
+ mutex_lock(&i915->drm.struct_mutex);
+ err = i915_gem_object_set_to_gtt_domain(obj, true);
+ mutex_unlock(&i915->drm.struct_mutex);
+ if (err) {
+ pr_err("i915_gem_object_set_to_gtt_domain failed with err=%d\n",
+ err);
+ goto err;
+ }
+
+ err = 0;
+err:
+ i915_gem_object_put(obj);
+out:
+ return err;
+}
+
+int i915_gem_object_selftests(void)
+{
+ static const struct i915_subtest tests[] = {
+ SUBTEST(igt_gem_object),
+ SUBTEST(igt_phys_object),
+ };
+ struct drm_i915_private *i915;
+ int err;
+
+ i915 = mock_gem_device();
+ if (!i915)
+ return -ENOMEM;
+
+ err = i915_subtests(tests, i915);
+
+ drm_dev_unref(&i915->drm);
+
[Intel-gfx] [RFCv2 17/19] drm/i915: Add some mock tests for dmabuf interop
Check that we can create both dmabuf and objects from dmabuf.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 5 +
drivers/gpu/drm/i915/selftests/i915_gem_dmabuf.c | 297 +
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/mock_dmabuf.c | 176
drivers/gpu/drm/i915/selftests/mock_dmabuf.h | 43 +++
5 files changed, 522 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem_dmabuf.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_dmabuf.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_dmabuf.h
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index d037adcda6f2..3e276eee0450 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -307,3 +307,8 @@ struct drm_gem_object *i915_gem_prime_import(struct
drm_device *dev,
return ERR_PTR(ret);
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/mock_dmabuf.c"
+#include "selftests/i915_gem_dmabuf.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/selftests/i915_gem_dmabuf.c
new file mode 100644
index ..115c477978f7
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_dmabuf.c
@@ -0,0 +1,297 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+
+#include "mock_gem_device.h"
+#include "mock_dmabuf.h"
+
+static int igt_dmabuf_export(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_object *obj;
+ struct dma_buf *dmabuf;
+ int err;
+
+ obj = i915_gem_object_create(i915, PAGE_SIZE);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ dmabuf = i915_gem_prime_export(&i915->drm, &obj->base, 0);
+ if (IS_ERR(dmabuf)) {
+ pr_err("i915_gem_prime_export failed with err=%d\n",
+ (int)PTR_ERR(dmabuf));
+ err = PTR_ERR(dmabuf);
+ goto err;
+ }
+
+ err = 0;
+ dma_buf_put(dmabuf);
+err:
+ i915_gem_object_put(obj);
+ return err;
+}
+
+static int igt_dmabuf_import_self(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_object *obj;
+ struct drm_gem_object *import;
+ struct dma_buf *dmabuf;
+ int err;
+
+ obj = i915_gem_object_create(i915, PAGE_SIZE);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ dmabuf = i915_gem_prime_export(&i915->drm, &obj->base, 0);
+ if (IS_ERR(dmabuf)) {
+ pr_err("i915_gem_prime_export failed with err=%d\n",
+ (int)PTR_ERR(dmabuf));
+ err = PTR_ERR(dmabuf);
+ goto err;
+ }
+
+ import = i915_gem_prime_import(&i915->drm, dmabuf);
+ if (IS_ERR(import)) {
+ pr_err("i915_gem_prime_import failed with err=%d\n",
+ (int)PTR_ERR(import));
+ err = PTR_ERR(import);
+ goto err_dmabuf;
+ }
+
+ if (import != &obj->base) {
+ pr_err("i915_gem_prime_import created a new object!\n");
+ err = -EINVAL;
+ goto err_import;
+ }
+
+ err = 0;
+err_import:
+ i915_gem_object_put(to_intel_bo(import));
+err_dmabuf:
+ dma_buf_put(dmabuf);
+err:
+ i915_gem_object_put(obj);
+ return err;
+}
+
+static int igt_dmabuf_import(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_object *obj;
+ struct dma_buf *dmabuf;
+ void *obj_map, *dma_map;
+ u32 pattern[] = { 0, 0xaa, 0xcc, 0x55, 0xff };
+ int err, i;
+
+ dmabuf = mock_dmabuf(1);
+ if (IS_ERR(dmabuf))
+
[Intel-gfx] [RFCv2 11/19] drm/i915: Add a simple request selftest for waiting
A trivial kselftest to submit a request and wait upon it.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/i915_gem_request.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
index 43d92d8c8377..743a641b1cd9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
@@ -47,10 +47,54 @@ static int igt_add_request(void *arg)
return err;
}
+static int igt_wait_request(void *arg)
+{
+ const long T = HZ / 4;
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_request *request;
+ int err = -EINVAL;
+
+ mutex_lock(&i915->drm.struct_mutex);
+ request = mock_request(i915->engine[RCS], i915->kernel_context, T);
+ if (!request) {
+ err = -ENOMEM;
+ goto out_unlock;
+ }
+
+ i915_add_request(request);
+
+ if (i915_gem_request_completed(request)) {
+ pr_err("request completed immediately!\n");
+ goto out_unlock;
+ }
+
+ if (i915_wait_request(request, I915_WAIT_LOCKED, T / 2) != -ETIME) {
+ pr_err("request wait succeeded (expected tiemout!)\n");
+ goto out_unlock;
+ }
+
+ if (i915_wait_request(request, I915_WAIT_LOCKED, T) == -ETIME) {
+ pr_err("request wait timed out!\n");
+ goto out_unlock;
+ }
+
+ if (!i915_gem_request_completed(request)) {
+ pr_err("request not complete after waiting!\n");
+ goto out_unlock;
+ }
+
+ err = 0;
+out_unlock:
+ mock_device_flush(i915);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
int i915_gem_request_selftest(void)
{
static const struct i915_subtest tests[] = {
SUBTEST(igt_add_request),
+ SUBTEST(igt_wait_request),
};
struct drm_i915_private *i915;
int err;
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 10/19] drm/i915: Add selftests for i915_gem_request
Simple starting point for adding seltests for i915_gem_request, first
mock a device (with engines and contexts) that allows us to construct
and execute a request, along with waiting for the request to complete.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_request.c| 5 ++
drivers/gpu/drm/i915/selftests/i915_gem_request.c | 66 ++
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
3 files changed, 72 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem_request.c
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c
b/drivers/gpu/drm/i915/i915_gem_request.c
index 7427aac74923..1ac3a134ae1a 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -1208,3 +1208,8 @@ void i915_gem_retire_requests(struct drm_i915_private
*dev_priv)
for_each_engine(engine, dev_priv, id)
engine_retire_requests(engine);
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/mock_request.c"
+#include "selftests/i915_gem_request.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
new file mode 100644
index ..43d92d8c8377
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+
+#include "mock_gem_device.h"
+
+static int igt_add_request(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_request *request;
+ int err = -ENOMEM;
+
+ mutex_lock(&i915->drm.struct_mutex);
+ request = mock_request(i915->engine[RCS],
+ i915->kernel_context,
+ HZ / 10);
+ if (!request)
+ goto out_unlock;
+
+ i915_add_request(request);
+
+ err = 0;
+out_unlock:
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+int i915_gem_request_selftest(void)
+{
+ static const struct i915_subtest tests[] = {
+ SUBTEST(igt_add_request),
+ };
+ struct drm_i915_private *i915;
+ int err;
+
+ i915 = mock_gem_device();
+ if (!i915)
+ return -ENOMEM;
+
+ err = i915_subtests(tests, i915);
+ drm_dev_unref(&i915->drm);
+
+ return err;
+}
diff --git a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
index fdee6c88e415..09374df0d867 100644
--- a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
@@ -11,3 +11,4 @@
selftest(sanitycheck, i915_mock_sanitycheck) /* keep first (igt selfcheck) */
selftest(scatterlist, mock_scatterlist_selftests)
selftest(breadcrumbs, intel_breadcrumbs_selftest)
+selftest(requests, i915_gem_request_selftest)
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 04/19] drm/i915: Add unit tests for the breadcrumb rbtree, insert/remove
First retroactive test, make sure that the waiters are in global seqno
order after random inserts and removals.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/intel_breadcrumbs.c | 21 +++
drivers/gpu/drm/i915/intel_engine_cs.c | 4 +
drivers/gpu/drm/i915/intel_ringbuffer.h| 2 +
.../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/i915_random.c | 63
drivers/gpu/drm/i915/selftests/i915_random.h | 47 ++
drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c | 173 +
drivers/gpu/drm/i915/selftests/mock_engine.c | 55 +++
drivers/gpu/drm/i915/selftests/mock_engine.h | 32
10 files changed, 399 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_random.c
create mode 100644 drivers/gpu/drm/i915/selftests/i915_random.h
create mode 100644 drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_engine.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_engine.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 461aeb44a9ad..2844b2d643e4 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -116,6 +116,7 @@ i915-y += dvo_ch7017.o \
# Post-mortem debug and GPU hang state capture
i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
i915-$(CONFIG_DRM_I915_SELFTEST) += \
+ selftests/i915_random.o \
selftests/i915_selftest.o
# virtual gpu code
diff --git a/drivers/gpu/drm/i915/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/intel_breadcrumbs.c
index fcfa423d08bd..5682c8aa8064 100644
--- a/drivers/gpu/drm/i915/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/intel_breadcrumbs.c
@@ -109,6 +109,18 @@ static void __intel_breadcrumbs_enable_irq(struct
intel_breadcrumbs *b)
if (b->rpm_wakelock)
return;
+ if (I915_SELFTEST_ONLY(b->mock)) {
+ /* For our mock objects we want to avoid interaction
+* with the real hardware (which is not set up). So
+* we simply pretend we have enabled the powerwell
+* and the irq, and leave it up to the mock
+* implementation to call intel_engine_wakeup()
+* itself when it wants to simulate a user interrupt,
+*/
+ b->rpm_wakelock = true;
+ return;
+ }
+
/* Since we are waiting on a request, the GPU should be busy
* and should have its own rpm reference. For completeness,
* record an rpm reference for ourselves to cover the
@@ -143,6 +155,11 @@ static void __intel_breadcrumbs_disable_irq(struct
intel_breadcrumbs *b)
if (!b->rpm_wakelock)
return;
+ if (I915_SELFTEST_ONLY(b->mock)) {
+ b->rpm_wakelock = false;
+ return;
+ }
+
if (b->irq_enabled) {
irq_disable(engine);
b->irq_enabled = false;
@@ -661,3 +678,7 @@ unsigned int intel_breadcrumbs_busy(struct drm_i915_private
*i915)
return mask;
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/intel_breadcrumbs.c"
+#endif
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 97bbbc3d6aa8..c6332096d870 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -482,3 +482,7 @@ void intel_engine_get_instdone(struct intel_engine_cs
*engine,
break;
}
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/mock_engine.c"
+#endif
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 0969de7d5ab7..5b10e2d1c9a8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -5,6 +5,7 @@
#include "i915_gem_batch_pool.h"
#include "i915_gem_request.h"
#include "i915_gem_timeline.h"
+#include "i915_selftest.h"
#define I915_CMD_HASH_ORDER 9
@@ -244,6 +245,7 @@ struct intel_engine_cs {
bool irq_enabled : 1;
bool rpm_wakelock : 1;
+ I915_SELFTEST_DECLARE(bool mock : 1);
} breadcrumbs;
/*
diff --git a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
index 8639bb8fd50d..fdee6c88e415 100644
--- a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
@@ -10,3 +10,4 @@
*/
selftest(sanitycheck, i915_mock_sanitycheck) /* keep first (igt selfcheck) */
selftest(scatterlist, mock_scatterlist_selftests)
+selftest(breadcrumbs, intel_breadcrumbs_selftest)
diff --git a/drivers/gpu/drm/i915/selftests/i915_random.c
b/drivers/gpu/drm/i915/selftests/i915_random.c
n
[Intel-gfx] [RFCv2 09/19] drm/i915: Mock infrastructure for request emission
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_context.c| 4 +
drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c | 11 +-
drivers/gpu/drm/i915/selftests/mock_context.c | 95
drivers/gpu/drm/i915/selftests/mock_context.h | 34 +
drivers/gpu/drm/i915/selftests/mock_engine.c | 161 +++--
drivers/gpu/drm/i915/selftests/mock_engine.h | 18 ++-
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 100 -
drivers/gpu/drm/i915/selftests/mock_gem_device.h | 2 +
drivers/gpu/drm/i915/selftests/mock_request.c | 45 ++
drivers/gpu/drm/i915/selftests/mock_request.h | 44 ++
10 files changed, 496 insertions(+), 18 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/mock_context.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_context.h
create mode 100644 drivers/gpu/drm/i915/selftests/mock_request.c
create mode 100644 drivers/gpu/drm/i915/selftests/mock_request.h
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 15b25c1b1f4d..a4e5515c4ef3 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -1138,3 +1138,7 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device
*dev,
return 0;
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/mock_context.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
index 19859379d7d5..535949d518aa 100644
--- a/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
@@ -25,6 +25,7 @@
#include "i915_random.h"
#include "i915_selftest.h"
+#include "mock_gem_device.h"
#include "mock_engine.h"
static int check_rbtree(struct intel_engine_cs *engine,
@@ -429,15 +430,15 @@ int intel_breadcrumbs_selftest(void)
SUBTEST(igt_insert_complete),
SUBTEST(igt_wakeup),
};
- struct intel_engine_cs *engine;
+ struct drm_i915_private *i915;
int err;
- engine = mock_engine("mock");
- if (!engine)
+ i915 = mock_gem_device();
+ if (!i915)
return -ENOMEM;
- err = i915_subtests(tests, engine);
- kfree(engine);
+ err = i915_subtests(tests, i915->engine[RCS]);
+ drm_dev_unref(&i915->drm);
return err;
}
diff --git a/drivers/gpu/drm/i915/selftests/mock_context.c
b/drivers/gpu/drm/i915/selftests/mock_context.c
new file mode 100644
index ..e808898bd22d
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/mock_context.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "mock_context.h"
+
+static void mock_ppgtt_cleanup(struct i915_address_space *vm)
+{
+}
+
+static struct i915_hw_ppgtt *
+mock_ppgtt(struct drm_i915_private *i915,
+ const char *name)
+{
+ struct i915_hw_ppgtt *ppgtt;
+
+ ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
+ if (!ppgtt)
+ return NULL;
+
+ kref_init(&ppgtt->ref);
+
+ INIT_LIST_HEAD(&ppgtt->base.active_list);
+ INIT_LIST_HEAD(&ppgtt->base.inactive_list);
+ INIT_LIST_HEAD(&ppgtt->base.unbound_list);
+
+ INIT_LIST_HEAD(&ppgtt->base.global_link);
+ drm_mm_init(&ppgtt->base.mm, 0, ~0);
+ i915_gem_timeline_init(i915, &ppgtt->base.timeline, name);
+
+ ppgtt->base.cleanup = mock_ppgtt_cleanup;
+
+ return ppgtt;
+}
+
+struct i915_gem_context *
+mock_context(struct drm_i915_private *i915,
+const char *name)
+{
+ struct i915_gem_context *ctx;
+ int ret;
+
+ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return NULL;
+
+ kref_init(&ctx->ref);
+ INIT_LIST_HEA
[Intel-gfx] [RFCv2 08/19] drm/i915: Mock a GGTT for self-testing
A very simple mockery, just a random manager and timeline. Useful for
inserting objects and ordering retirement; and not much else.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 22 +++
drivers/gpu/drm/i915/selftests/mock_gem_device.h | 1 +
drivers/gpu/drm/i915/selftests/mock_ggtt.c | 79
4 files changed, 106 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/mock_ggtt.c
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d35c46b477a6..5a98e2ca5a53 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3576,3 +3576,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
size, alignment, colour,
start, end, DRM_MM_INSERT_EVICT);
}
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/mock_ggtt.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 95cf1d845bf1..025012ba92eb 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -35,6 +35,7 @@ static void mock_device_release(struct drm_device *dev)
while (flush_work(&i915->mm.free_work))
rcu_barrier();
+ kmem_cache_destroy(i915->vmas);
kmem_cache_destroy(i915->objects);
put_device(&i915->drm.pdev->dev);
}
@@ -90,19 +91,40 @@ struct drm_i915_private *mock_gem_device(void)
i915->drm.pdev = pdev;
i915->drm.dev_private = i915;
+ drm_mode_config_init(&i915->drm);
+
mkwrite_device_info(i915)->gen = -1;
spin_lock_init(&i915->mm.object_stat_lock);
INIT_WORK(&i915->mm.free_work, __i915_gem_free_work);
init_llist_head(&i915->mm.free_list);
+ INIT_LIST_HEAD(&i915->mm.unbound_list);
+ INIT_LIST_HEAD(&i915->mm.bound_list);
i915->objects = KMEM_CACHE(mock_object, SLAB_HWCACHE_ALIGN);
if (!i915->objects)
goto err_device;
+ i915->vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN);
+ if (!i915->vmas)
+ goto err_objects;
+
+ mutex_lock(&i915->drm.struct_mutex);
+ INIT_LIST_HEAD(&i915->gt.timelines);
+ err = i915_gem_timeline_init__global(i915);
+ if (err)
+ goto err_vmas;
+
+ mock_init_ggtt(i915);
+ mutex_unlock(&i915->drm.struct_mutex);
+
return i915;
+err_vmas:
+ kmem_cache_destroy(i915->vmas);
+err_objects:
+ kmem_cache_destroy(i915->objects);
err_device:
kfree(i915);
return NULL;
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.h
b/drivers/gpu/drm/i915/selftests/mock_gem_device.h
index 7ff7c848f731..5189f684a17e 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.h
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.h
@@ -4,5 +4,6 @@
#include "i915_drv.h"
struct drm_i915_private *mock_gem_device(void);
+void mock_init_ggtt(struct drm_i915_private *i915);
#endif /* !__MOCK_GEM_DEVICE_H__ */
diff --git a/drivers/gpu/drm/i915/selftests/mock_ggtt.c
b/drivers/gpu/drm/i915/selftests/mock_ggtt.c
new file mode 100644
index ..d5f2811bc220
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/mock_ggtt.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "mock_gem_device.h"
+
+static void mock_insert_page(struct i915_address_space *vm,
+dma_addr_t addr,
+uint64_t offset,
+enum i915_cache_level level,
+u32 flags)
+{
+}
+
+static void mock_insert_entries(struct i915_addr
Re: [Intel-gfx] [PATCH 01/14] drm/i915: Store the pipe pixel rate in the crtc state
On Mon, 2016-12-19 at 19:28 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Rather than recomptuing the pipe pixel rate on demand everwhere, let's
> just stick the precomputed value into the crtc state.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_display.c | 31 ++-
> drivers/gpu/drm/i915/intel_drv.h | 2 ++
> drivers/gpu/drm/i915/intel_fbc.c | 3 +--
> drivers/gpu/drm/i915/intel_pm.c | 14 +++---
> 4 files changed, 36 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 0b0d7e8be630..1d979041c52c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
>
[...]
> @@ -16919,7 +16938,7 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
__drm_atomic_helper_crtc_destroy_state(&crtc_state->base);
memset(crtc_state, 0, sizeof(*crtc_state));
crtc_state->base.crtc = &crtc->base;
crtc_state->base.active = crtc_state->base.enable =
dev_priv->display.get_pipe_config(crtc, crtc_state);
crtc->base.enabled = crtc_state->base.enable;
crtc->active = crtc_state->base.active;
if (crtc_state->base.active) {
> dev_priv->active_crtcs |= 1 << crtc->pipe;
>
> if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
> - pixclk = ilk_pipe_pixel_rate(crtc_state);
> + pixclk = crtc_state->pixel_rate;
Aren't you reading 0 here, because of the memset above? As far as I can tell,
haswell_get_pipe_config() doesn't set crtc_state->pixel_rate.
> else if (IS_VALLEYVIEW(dev_priv) ||
> IS_CHERRYVIEW(dev_priv))
> pixclk =
> crtc_state->base.adjusted_mode.crtc_clock;
> else
> @@ -17031,6 +17050,8 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
> */
> crtc->base.state->mode.private_flags =
> I915_MODE_FLAG_INHERITED;
>
> + intel_crtc_compute_pixel_rate(crtc->config);
> +
> drm_calc_timestamping_constants(&crtc->base,
> &crtc->base.hwmode);
> update_scanline_offset(crtc);
> }
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index f61ea43c7532..3969e786d566 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -541,6 +541,8 @@ struct intel_crtc_state {
> * and get clipped at the edges. */
> int pipe_src_w, pipe_src_h;
>
> + unsigned int pixel_rate;
> +
Maybe add some comment about this parameter. This is not in kernel doc, but
having that already would probably make it easier for whoever does it in the
end.
Ander
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFCv2 18/19] drm/i915: Add initial selftests for i915_gem_gtt
Simple starting point for adding seltests for i915_gem_gtt, first
try creating a ppGTT and filling it.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c| 1 +
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 95 ++
.../gpu/drm/i915/selftests/i915_live_selftests.h | 1 +
3 files changed, 97 insertions(+)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5a98e2ca5a53..4baa0aee62a5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3579,4 +3579,5 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_ggtt.c"
+#include "selftests/i915_gem_gtt.c"
#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
new file mode 100644
index ..97b55e9726d8
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+
+static int igt_ppgtt_alloc(void *arg)
+{
+ struct drm_i915_private *dev_priv = arg;
+ struct i915_hw_ppgtt *ppgtt;
+ u64 size, last;
+ int err;
+
+ if (!USES_PPGTT(dev_priv))
+ return 0;
+
+ ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
+ if (!ppgtt)
+ return -ENOMEM;
+
+ err = __hw_ppgtt_init(ppgtt, dev_priv);
+ if (err)
+ goto err_ppgtt;
+
+ if (!ppgtt->base.allocate_va_range)
+ goto err_ppgtt_cleanup;
+
+ /* Check we can allocate the entire range */
+ for (size = 4096;
+size <= ppgtt->base.total;
+size <<= 2) {
+ err = ppgtt->base.allocate_va_range(&ppgtt->base, 0, size);
+ if (err) {
+ if (err == -ENOMEM) {
+ pr_info("[1] Ran out of memory for va_range [0
+ %llx] [bit %d]\n",
+ size, ilog2(size));
+ err = 0; /* virtual space too large! */
+ }
+ goto err_ppgtt_cleanup;
+ }
+
+ ppgtt->base.clear_range(&ppgtt->base, 0, size);
+ }
+
+ /* Check we can incrementally allocate the entire range */
+ for (last = 0, size = 4096;
+size <= ppgtt->base.total;
+last = size, size <<= 2) {
+ err = ppgtt->base.allocate_va_range(&ppgtt->base,
+ last, size - last);
+ if (err) {
+ if (err == -ENOMEM) {
+ pr_info("[2] Ran out of memory for va_range
[%llx + %llx] [bit %d]\n",
+ last, size - last, ilog2(size));
+ err = 0; /* virtual space too large! */
+ }
+ goto err_ppgtt_cleanup;
+ }
+ }
+
+err_ppgtt_cleanup:
+ ppgtt->base.cleanup(&ppgtt->base);
+err_ppgtt:
+ kfree(ppgtt);
+ return err;
+}
+
+int i915_gem_gtt_live_selftests(struct drm_i915_private *i915)
+{
+ static const struct i915_subtest tests[] = {
+ SUBTEST(igt_ppgtt_alloc),
+ };
+
+ return i915_subtests(tests, i915);
+}
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index 3d1d2719ec64..0c3765f42cef 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -10,3 +10,4 @@
*/
selftest(sanitycheck, i915_live_sanitycheck) /* keep first (igt selfcheck)
Re: [Intel-gfx] [PATCH 02/14] drm/i915: Nuke intel_mode_max_pixclk()
On Mon, 2016-12-19 at 19:28 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> ilk_max_pixel_rate() will now give the "correct" pixel rate for all
> platforms, so let's kill rename it to intel_max_pixel_rate() and kill
Typo: "kill rename". With that fixed,
Reviewed-by: Ander Conselvan de Oliveira
> off intel_mode_max_pixclk().
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_display.c | 41 ++-
> -
> 1 file changed, 6 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 1d979041c52c..1e3f173a70e5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -123,7 +123,7 @@ static void ironlake_pfit_disable(struct intel_crtc *crtc,
> bool force);
> static void ironlake_pfit_enable(struct intel_crtc *crtc);
> static void intel_modeset_setup_hw_state(struct drm_device *dev);
> static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc);
> -static int ilk_max_pixel_rate(struct drm_atomic_state *state);
> +static int intel_max_pixel_rate(struct drm_atomic_state *state);
> static int glk_calc_cdclk(int max_pixclk);
> static int bxt_calc_cdclk(int max_pixclk);
>
> @@ -6566,40 +6566,11 @@ static int bxt_calc_cdclk(int max_pixclk)
> return 144000;
> }
>
> -/* Compute the max pixel clock for new configuration. */
> -static int intel_mode_max_pixclk(struct drm_device *dev,
> - struct drm_atomic_state *state)
> -{
> - struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - struct drm_crtc *crtc;
> - struct drm_crtc_state *crtc_state;
> - unsigned max_pixclk = 0, i;
> - enum pipe pipe;
> -
> - memcpy(intel_state->min_pixclk, dev_priv->min_pixclk,
> - sizeof(intel_state->min_pixclk));
> -
> - for_each_crtc_in_state(state, crtc, crtc_state, i) {
> - int pixclk = 0;
> -
> - if (crtc_state->enable)
> - pixclk = crtc_state->adjusted_mode.crtc_clock;
> -
> - intel_state->min_pixclk[i] = pixclk;
> - }
> -
> - for_each_pipe(dev_priv, pipe)
> - max_pixclk = max(intel_state->min_pixclk[pipe], max_pixclk);
> -
> - return max_pixclk;
> -}
> -
> static int valleyview_modeset_calc_cdclk(struct drm_atomic_state *state)
> {
> struct drm_device *dev = state->dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> - int max_pixclk = intel_mode_max_pixclk(dev, state);
> + int max_pixclk = intel_max_pixel_rate(state);
> struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
>
> @@ -6615,7 +6586,7 @@ static int valleyview_modeset_calc_cdclk(struct
> drm_atomic_state *state)
> static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
> {
> struct drm_i915_private *dev_priv = to_i915(state->dev);
> - int max_pixclk = ilk_max_pixel_rate(state);
> + int max_pixclk = intel_max_pixel_rate(state);
> struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> int cdclk;
> @@ -10290,7 +10261,7 @@ static int bdw_adjust_min_pipe_pixel_rate(struct
> intel_crtc_state *crtc_state,
> }
>
> /* compute the max rate for new configuration */
> -static int ilk_max_pixel_rate(struct drm_atomic_state *state)
> +static int intel_max_pixel_rate(struct drm_atomic_state *state)
> {
> struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> struct drm_i915_private *dev_priv = to_i915(state->dev);
> @@ -10422,7 +10393,7 @@ static int broadwell_modeset_calc_cdclk(struct
> drm_atomic_state *state)
> {
> struct drm_i915_private *dev_priv = to_i915(state->dev);
> struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> - int max_pixclk = ilk_max_pixel_rate(state);
> + int max_pixclk = intel_max_pixel_rate(state);
> int cdclk;
>
> /*
> @@ -10458,7 +10429,7 @@ static int skl_modeset_calc_cdclk(struct
> drm_atomic_state *state)
> {
> struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> struct drm_i915_private *dev_priv = to_i915(state->dev);
> - const int max_pixclk = ilk_max_pixel_rate(state);
> + const int max_pixclk = intel_max_pixel_rate(state);
> int vco = intel_state->cdclk_pll_vco;
> int cdclk;
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 03/14] drm/i915: s/get_display_clock_speed/get_cdclk/
On Mon, 2016-12-19 at 19:28 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Rename the .get_display_clock_speed() hook to .get_cdclk().
> .get_cdclk() is more specific (which clock) and it's much
> shorter.
Indeed!
Reviewed-by: Ander Conselvan de Oliveira
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/intel_display.c| 93 +---
> -
> drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +-
> 3 files changed, 39 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6217f01d3c11..393b34fb2d1a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -611,7 +611,7 @@ struct intel_limit;
> struct dpll;
>
> struct drm_i915_display_funcs {
> - int (*get_display_clock_speed)(struct drm_i915_private *dev_priv);
> + int (*get_cdclk)(struct drm_i915_private *dev_priv);
> int (*get_fifo_size)(struct drm_i915_private *dev_priv, int plane);
> int (*compute_pipe_wm)(struct intel_crtc_state *cstate);
> int (*compute_intermediate_wm)(struct drm_device *dev,
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 1e3f173a70e5..bbfef348783b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5873,7 +5873,7 @@ static void intel_update_max_cdclk(struct
> drm_i915_private *dev_priv)
>
> static void intel_update_cdclk(struct drm_i915_private *dev_priv)
> {
> - dev_priv->cdclk_freq = dev_priv-
> >display.get_display_clock_speed(dev_priv);
> + dev_priv->cdclk_freq = dev_priv->display.get_cdclk(dev_priv);
>
> if (INTEL_GEN(dev_priv) >= 9)
> DRM_DEBUG_DRIVER("Current CD clock rate: %d kHz, VCO: %d kHz,
> ref: %d kHz\n",
> @@ -6411,8 +6411,7 @@ static void valleyview_set_cdclk(struct drm_device *dev,
> int cdclk)
> struct drm_i915_private *dev_priv = to_i915(dev);
> u32 val, cmd;
>
> - WARN_ON(dev_priv->display.get_display_clock_speed(dev_priv)
> - != dev_priv->cdclk_freq);
> + WARN_ON(dev_priv->display.get_cdclk(dev_priv) != dev_priv-
> >cdclk_freq);
>
> if (cdclk >= 32) /* jump to highest voltage for 400MHz too */
> cmd = 2;
> @@ -6476,8 +6475,7 @@ static void cherryview_set_cdclk(struct drm_device *dev,
> int cdclk)
> struct drm_i915_private *dev_priv = to_i915(dev);
> u32 val, cmd;
>
> - WARN_ON(dev_priv->display.get_display_clock_speed(dev_priv)
> - != dev_priv->cdclk_freq);
> + WARN_ON(dev_priv->display.get_cdclk(dev_priv) != dev_priv-
> >cdclk_freq);
>
> switch (cdclk) {
> case 33:
> @@ -7243,7 +7241,7 @@ static int intel_crtc_compute_config(struct intel_crtc
> *crtc,
> return 0;
> }
>
> -static int skylake_get_display_clock_speed(struct drm_i915_private *dev_priv)
> +static int skylake_get_cdclk(struct drm_i915_private *dev_priv)
> {
> u32 cdctl;
>
> @@ -7304,7 +7302,7 @@ static void bxt_de_pll_update(struct drm_i915_private
> *dev_priv)
> dev_priv->cdclk_pll.ref;
> }
>
> -static int broxton_get_display_clock_speed(struct drm_i915_private *dev_priv)
> +static int broxton_get_cdclk(struct drm_i915_private *dev_priv)
> {
> u32 divider;
> int div, vco;
> @@ -7339,7 +7337,7 @@ static int broxton_get_display_clock_speed(struct
> drm_i915_private *dev_priv)
> return DIV_ROUND_CLOSEST(vco, div);
> }
>
> -static int broadwell_get_display_clock_speed(struct drm_i915_private
> *dev_priv)
> +static int broadwell_get_cdclk(struct drm_i915_private *dev_priv)
> {
> uint32_t lcpll = I915_READ(LCPLL_CTL);
> uint32_t freq = lcpll & LCPLL_CLK_FREQ_MASK;
> @@ -7358,7 +7356,7 @@ static int broadwell_get_display_clock_speed(struct
> drm_i915_private *dev_priv)
> return 675000;
> }
>
> -static int haswell_get_display_clock_speed(struct drm_i915_private *dev_priv)
> +static int haswell_get_cdclk(struct drm_i915_private *dev_priv)
> {
> uint32_t lcpll = I915_READ(LCPLL_CTL);
> uint32_t freq = lcpll & LCPLL_CLK_FREQ_MASK;
> @@ -7375,33 +7373,33 @@ static int haswell_get_display_clock_speed(struct
> drm_i915_private *dev_priv)
> return 54;
> }
>
> -static int valleyview_get_display_clock_speed(struct drm_i915_private
> *dev_priv)
> +static int valleyview_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return vlv_get_cck_clock_hpll(dev_priv, "cdclk",
> CCK_DISPLAY_CLOCK_CONTROL);
> }
>
> -static int ilk_get_display_clock_speed(struct drm_i915_private *dev_priv)
> +static int ilk_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 45;
> }
>
> -static int i945_get_display_clock_speed(struct drm_i915_private *dev_priv)
> +stati
Re: [Intel-gfx] [PATCH 01/14] drm/i915: Store the pipe pixel rate in the crtc state
On Tue, Dec 20, 2016 at 03:10:53PM +0200, Ander Conselvan De Oliveira wrote:
> On Mon, 2016-12-19 at 19:28 +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Rather than recomptuing the pipe pixel rate on demand everwhere, let's
> > just stick the precomputed value into the crtc state.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 31 ++-
> > drivers/gpu/drm/i915/intel_drv.h | 2 ++
> > drivers/gpu/drm/i915/intel_fbc.c | 3 +--
> > drivers/gpu/drm/i915/intel_pm.c | 14 +++---
> > 4 files changed, 36 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 0b0d7e8be630..1d979041c52c 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> >
>
> [...]
>
> > @@ -16919,7 +16938,7 @@ static void intel_modeset_readout_hw_state(struct
> > drm_device *dev)
> __drm_atomic_helper_crtc_destroy_state(&crtc_state->base);
> memset(crtc_state, 0, sizeof(*crtc_state));
> crtc_state->base.crtc = &crtc->base;
>
> crtc_state->base.active = crtc_state->base.enable =
> dev_priv->display.get_pipe_config(crtc, crtc_state);
>
> crtc->base.enabled = crtc_state->base.enable;
> crtc->active = crtc_state->base.active;
>
> if (crtc_state->base.active) {
> > dev_priv->active_crtcs |= 1 << crtc->pipe;
> >
> > if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
> > - pixclk = ilk_pipe_pixel_rate(crtc_state);
> > + pixclk = crtc_state->pixel_rate;
>
> Aren't you reading 0 here, because of the memset above? As far as I can tell,
> haswell_get_pipe_config() doesn't set crtc_state->pixel_rate.
Hmm, yeah. Which means this whole piece of min_pixclk[] code is in
the wrong place. You can't know the pixel rate until you know the
clock, and you don't know that until you've done the full readout
(meaning the encoder .get_config() hooks have been called as well).
>
> > else if (IS_VALLEYVIEW(dev_priv) ||
> > IS_CHERRYVIEW(dev_priv))
> > pixclk =
> > crtc_state->base.adjusted_mode.crtc_clock;
> > else
> > @@ -17031,6 +17050,8 @@ static void intel_modeset_readout_hw_state(struct
> > drm_device *dev)
> > */
> > crtc->base.state->mode.private_flags =
> > I915_MODE_FLAG_INHERITED;
> >
> > + intel_crtc_compute_pixel_rate(crtc->config);
> > +
> > drm_calc_timestamping_constants(&crtc->base,
> > &crtc->base.hwmode);
> > update_scanline_offset(crtc);
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index f61ea43c7532..3969e786d566 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -541,6 +541,8 @@ struct intel_crtc_state {
> > * and get clipped at the edges. */
> > int pipe_src_w, pipe_src_h;
> >
> > + unsigned int pixel_rate;
> > +
>
> Maybe add some comment about this parameter. This is not in kernel doc, but
> having that already would probably make it easier for whoever does it in the
> end.
>
> Ander
--
Ville Syrjälä
Intel OTC
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/6] drm/i915: use drm_connector_list_iter in intel_hotplug.c
Op 19-12-16 om 09:24 schreef Daniel Vetter:
> Nothing special, just rote conversion.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_hotplug.c | 28 ++--
> 1 file changed, 18 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_hotplug.c
> b/drivers/gpu/drm/i915/intel_hotplug.c
> index 3d546c019de0..2ddc9e5842ec 100644
> --- a/drivers/gpu/drm/i915/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/intel_hotplug.c
> @@ -145,16 +145,17 @@ static bool intel_hpd_irq_storm_detect(struct
> drm_i915_private *dev_priv,
> static void intel_hpd_irq_storm_disable(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = &dev_priv->drm;
> - struct drm_mode_config *mode_config = &dev->mode_config;
> struct intel_connector *intel_connector;
> struct intel_encoder *intel_encoder;
> struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> enum hpd_pin pin;
> bool hpd_disabled = false;
>
> assert_spin_locked(&dev_priv->irq_lock);
>
> - list_for_each_entry(connector, &mode_config->connector_list, head) {
> + drm_connector_list_iter_get(dev, &conn_iter);
> + drm_for_each_connector_iter(connector, &conn_iter) {
> if (connector->polled != DRM_CONNECTOR_POLL_HPD)
> continue;
This is called with irqs disabled, will lockdep complain about inconsistent use
of this lock with and without irqs?
If not,
Reviewed-by: Maarten Lankhorst
> @@ -177,6 +178,7 @@ static void intel_hpd_irq_storm_disable(struct
> drm_i915_private *dev_priv)
> | DRM_CONNECTOR_POLL_DISCONNECT;
> hpd_disabled = true;
> }
> + drm_connector_list_iter_put(&conn_iter);
>
> /* Enable polling and queue hotplug re-enabling. */
> if (hpd_disabled) {
> @@ -192,7 +194,6 @@ static void intel_hpd_irq_storm_reenable_work(struct
> work_struct *work)
> container_of(work, typeof(*dev_priv),
>hotplug.reenable_work.work);
> struct drm_device *dev = &dev_priv->drm;
> - struct drm_mode_config *mode_config = &dev->mode_config;
> int i;
>
> intel_runtime_pm_get(dev_priv);
> @@ -200,13 +201,15 @@ static void intel_hpd_irq_storm_reenable_work(struct
> work_struct *work)
> spin_lock_irq(&dev_priv->irq_lock);
> for_each_hpd_pin(i) {
> struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
>
> if (dev_priv->hotplug.stats[i].state != HPD_DISABLED)
> continue;
>
> dev_priv->hotplug.stats[i].state = HPD_ENABLED;
>
> - list_for_each_entry(connector, &mode_config->connector_list,
> head) {
> + drm_connector_list_iter_get(dev, &conn_iter);
> + drm_for_each_connector_iter(connector, &conn_iter) {
> struct intel_connector *intel_connector =
> to_intel_connector(connector);
>
> if (intel_connector->encoder->hpd_pin == i) {
> @@ -218,6 +221,7 @@ static void intel_hpd_irq_storm_reenable_work(struct
> work_struct *work)
> connector->polled =
> DRM_CONNECTOR_POLL_HPD;
> }
> }
> + drm_connector_list_iter_put(&conn_iter);
> }
> if (dev_priv->display.hpd_irq_setup)
> dev_priv->display.hpd_irq_setup(dev_priv);
> @@ -303,14 +307,14 @@ static void i915_hotplug_work_func(struct work_struct
> *work)
> struct drm_i915_private *dev_priv =
> container_of(work, struct drm_i915_private,
> hotplug.hotplug_work);
> struct drm_device *dev = &dev_priv->drm;
> - struct drm_mode_config *mode_config = &dev->mode_config;
> struct intel_connector *intel_connector;
> struct intel_encoder *intel_encoder;
> struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> bool changed = false;
> u32 hpd_event_bits;
>
> - mutex_lock(&mode_config->mutex);
> + mutex_lock(&dev->mode_config.mutex);
> DRM_DEBUG_KMS("running encoder hotplug functions\n");
>
> spin_lock_irq(&dev_priv->irq_lock);
> @@ -323,7 +327,8 @@ static void i915_hotplug_work_func(struct work_struct
> *work)
>
> spin_unlock_irq(&dev_priv->irq_lock);
>
> - list_for_each_entry(connector, &mode_config->connector_list, head) {
> + drm_connector_list_iter_get(dev, &conn_iter);
> + drm_for_each_connector_iter(connector, &conn_iter) {
> intel_connector = to_intel_connector(connector);
> if (!intel_connector->encoder)
> continue;
> @@ -337,7 +342,8 @@ static void i915_hotplug_work_func(struct work_struct
> *work)
> changed = true;
> }
> }
> - mutex_unlock(&mode_config->mutex);
> + drm_connector_list_iter
Re: [Intel-gfx] [PATCH 4/6] drm/i915: Make intel_get_pipe_from_connector atomic
Op 19-12-16 om 09:24 schreef Daniel Vetter:
> Drive-by fixup while looking at all the connector_list walkers -
> holding connection_mutex does actually _not_ give you locking to look
> at the legacy drm_connector->encoder->crtc pointer chain. That one is
> solely owned by the atomic commit workers. Instead we must inspect the
> atomic state.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_display.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 0b0d7e8be630..438d27f93aca 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15427,15 +15427,14 @@ static int intel_crtc_init(struct drm_i915_private
> *dev_priv, enum pipe pipe)
>
> enum pipe intel_get_pipe_from_connector(struct intel_connector *connector)
> {
> - struct drm_encoder *encoder = connector->base.encoder;
> struct drm_device *dev = connector->base.dev;
>
> WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
>
> - if (!encoder || WARN_ON(!encoder->crtc))
> + if (!connector->base.state->crtc)
> return INVALID_PIPE;
>
> - return to_intel_crtc(encoder->crtc)->pipe;
> + return to_intel_crtc(connector->base.state->crtc)->pipe;
> }
>
> int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
This patch clashes with the previous patch. intel_panel_set_backlight_acpi is
called
from asle_set_backlight. You should probably keep connection_mutex alive for it.
~Maarten
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 1/2] drm: Create new structure for HDMI info
This patch creates a new structure drm_hdmi_info (inspired from
drm_display_info). Driver will parse HDMI sink's advance capabilities
from HF-VSDB and populate this structure. This structure will be kept
and used as a sub-class within drm_display_info.
We are adding parsing of HF-VSDB In the next patch.
Cc: Thierry Reding
Cc: Daniel Vetter
Cc: Jose Abreu
Suggested-by: Thierry Reding
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_edid.c | 6 ++--
include/drm/drm_connector.h | 79 ++---
2 files changed, 77 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 67d6a73..b552197 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3782,21 +3782,21 @@ static void drm_parse_hdmi_deep_color_info(struct
drm_connector *connector,
if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
dc_bpc = 10;
- info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
+ info->hdmi_info.edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
connector->name);
}
if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
dc_bpc = 12;
- info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
+ info->hdmi_info.edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
connector->name);
}
if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
dc_bpc = 16;
- info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
+ info->hdmi_info.edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
connector->name);
}
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 6e352a0..fba2b88 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -90,6 +90,76 @@ enum subpixel_order {
};
/**
+ * struct drm_hdmi_info - runtime data specific to a connected hdmi sink
+ *
+ * Describes a given hdmi display (e.g. CRT or flat panel) and its
capabilities.
+ * Mostly refects the advanced features added in HDMI 2.0 specs and the deep
+ * color support. This is a sub-segment of struct drm_display_info and should
be
+ * used within.
+ *
+ * For sinks which provide an EDID this can be filled out by calling
+ * drm_add_edid_modes().
+ */
+
+struct drm_hdmi_info {
+
+ /**
+* @edid_hdmi_dc_modes: Mask of supported hdmi deep color modes. Even
+* more stuff redundant with @bus_formats.
+*/
+ u8 edid_hdmi_dc_modes;
+
+ /**
+* @edid_yuv420_dc_modes: bpc for deep color yuv420 encoding.
+* various sinks can support 10/12/16 bit per channel deep
+* color encoding. edid_yuv420_dc_modes = 0 means sink doesn't
+* support deep color yuv420 encoding.
+*/
+ u8 edid_yuv420_dc_modes;
+
+
+#define DRM_HFVSDB_SCDC_SUPPORT(1<<7)
+#define DRM_HFVSDB_SCDC_RR_CAP (1<<6)
+#define DRM_HFVSDB_SCRAMBLING (1<<3)
+#define DRM_HFVSDB_INDEPENDENT_VIEW(1<<2)
+#define DRM_HFVSDB_DUAL_VIEW (1<<1)
+#define DRM_HFVSDB_3D_OSD (1<<0)
+
+ /**
+* @scdc_supported: Sink supports SCDC functionality.
+*/
+ bool scdc_supported;
+
+ /**
+* @scdc_rr_cap: Sink has SCDC read request capability.
+*/
+ bool scdc_rr_cap;
+
+ /**
+* @scrambling: Sync supports scrambling for <=340 Mcsc TMDS
+* char rates. Above 340 Mcsc rates, scrambling is always reqd.
+*/
+ bool scrambling;
+
+ /**
+* @independent_view_3d: Sink supports 3d independent view signaling
+* in HF-VSIF.
+*/
+ bool independent_view_3d;
+
+ /**
+* @dual_view_3d: Sink supports 3d dual view signaling in HF-VSIF.
+*/
+ bool dual_view_3d;
+
+ /**
+* @osd_disparity_3d: Sink supports 3d osd disparity indication
+* in HF-VSIF.
+*/
+ bool osd_disparity_3d;
+};
+
+/**
* struct drm_display_info - runtime data about the connected sink
*
* Describes a given display (e.g. CRT or flat panel) and its limitations. For
@@ -179,15 +249,14 @@ struct drm_display_info {
bool dvi_dual;
/**
-* @edid_hdmi_dc_modes: Mask of supported hdmi deep color modes. Even
-* more stuff redundant with @bus_formats.
+* @cea_rev: CEA revision of the HDMI sink.
*/
- u8 edid_hdmi_dc_modes;
+ u8 cea_rev;
/**
-* @cea_rev: CEA revision of the HDMI sink.
+* @ drm_hdmi_info: Capabilities of connected HDMI display
*/
- u8 cea_rev;
+ struct drm_hdmi_info hdmi_info;
};
int drm_display_info_set_bus_formats(struct drm_display_info *info,
--
1.9.1
[Intel-gfx] [PATCH v2 2/2] drm: parse hf-vsdb
HDMI 2.0 / CEA-861-F specs define a new CEA extension data block,
called hdmi-forum vendor specific data block (HF-VSDB). This block
contains information about sink's support for HDMI 2.0 compliant
features. These features are:
- Deep color YUV 420 support and BPC
- 3D flags for
- OSD Displarity
- Dual view signaling
- independent view signaling
- SCDC support
- Max TMDS char rate
- Scrambling support
This patch adds a parser function for this block, and add flags to
indicate support for new features, in drm_display_info structure
V2:
- Addressed review comments from Thierry
- remove len > 31 check
- remove version check
- fix duplicate values for macros of 36 and 30-bit depths
- Added a sub-class for HDMI related information within drm_display_info
(Thierry, Daniel) and populated it with HF-VSDB specific info.
Cc: Thierry Reding
Cc: Daniel Vetter
Cc: Jose Abreu
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_edid.c | 70 ++
include/drm/drm_edid.h | 5
include/linux/hdmi.h | 1 +
3 files changed, 76 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index b552197..59e04fb 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3224,6 +3224,23 @@ static int add_3d_struct_modes(struct drm_connector
*connector, u16 structure,
return 0;
}
+static bool cea_db_is_hf_vsdb(const u8 *db)
+{
+ u8 len;
+ int hfvsdb_id;
+
+ if (cea_db_tag(db) != VENDOR_BLOCK)
+ return false;
+
+ len = cea_db_payload_len(db);
+ if (len < 7)
+ return false;
+
+ hfvsdb_id = db[1] | (db[2] << 8) | (db[3] << 16);
+
+ return hfvsdb_id == HDMI_IEEE_OUI_HFVSDB;
+}
+
static bool cea_db_is_hdmi_vsdb(const u8 *db)
{
int hdmi_id;
@@ -3768,6 +3785,57 @@ bool drm_rgb_quant_range_selectable(struct edid *edid)
}
EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
+static void drm_parse_yuv420_deep_color_info(struct drm_connector *connector,
+ const u8 *db)
+{
+ struct drm_hdmi_info *info = &connector->display_info.hdmi_info;
+
+ if (db[7] & DRM_EDID_YUV420_DC_48)
+ info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_48;
+ if (db[7] & DRM_EDID_YUV420_DC_36)
+ info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_36;
+ if (db[7] & DRM_EDID_YUV420_DC_30)
+ info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_30;
+
+ if (!info->edid_yuv420_dc_modes) {
+ DRM_DEBUG("%s: No YUV 420 deep color support in sink.\n",
+ connector->name);
+ return;
+ }
+}
+
+static void
+drm_parse_hf_vsdb(struct drm_connector *connector, const u8 *db)
+{
+ struct drm_display_info *info = &connector->display_info;
+ struct drm_hdmi_info *hdmi_info = &info->hdmi_info;
+
+ if (db[5]) {
+ /*
+* If the sink supplies max tmds char rate in db,
+* the actual max tmds rate = db[5] * 5Mhz.
+*/
+ info->max_tmds_clock = db[5] * 5000;
+ DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n",
+ info->max_tmds_clock);
+ }
+
+ if (db[6] & DRM_HFVSDB_SCDC_SUPPORT)
+ hdmi_info->scdc_supported = true;
+ if (db[6] & DRM_HFVSDB_SCDC_RR_CAP)
+ hdmi_info->scdc_rr_cap = true;
+ if (db[6] & DRM_HFVSDB_SCRAMBLING)
+ hdmi_info->scrambling = true;
+ if (db[6] & DRM_HFVSDB_INDEPENDENT_VIEW)
+ hdmi_info->independent_view_3d = true;
+ if (db[6] & DRM_HFVSDB_DUAL_VIEW)
+ hdmi_info->dual_view_3d = true;
+ if (db[6] & DRM_HFVSDB_3D_OSD)
+ hdmi_info->osd_disparity_3d = true;
+
+ drm_parse_yuv420_deep_color_info(connector, db);
+}
+
static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
const u8 *hdmi)
{
@@ -3882,6 +3950,8 @@ static void drm_parse_cea_ext(struct drm_connector
*connector,
if (cea_db_is_hdmi_vsdb(db))
drm_parse_hdmi_vsdb_video(connector, db);
+ if (cea_db_is_hf_vsdb(db))
+ drm_parse_hf_vsdb(connector, db);
}
}
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 38eabf6..df606e3 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -212,6 +212,11 @@ struct detailed_timing {
#define DRM_EDID_HDMI_DC_30 (1 << 4)
#define DRM_EDID_HDMI_DC_Y444 (1 << 3)
+/* YUV 420 deep color modes */
+#define DRM_EDID_YUV420_DC_48(1 << 6)
+#define DRM_EDID_YUV420_DC_36(1 << 5)
+#define DRM_EDID_YUV420_DC_30(1 << 4)
+
/* ELD Header Block */
#define DRM_ELD_HEADER_BLOCK_SIZE 4
di
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On 20/12/2016 12:36, Chris Wilson wrote: On Tue, Dec 20, 2016 at 11:33:27AM +, Chris Wilson wrote: On Tue, Dec 20, 2016 at 11:13:43AM +, Tvrtko Ursulin wrote: How much is the cost of freeing and re-acquiring pages in the fall back case? It could be avoidable by using the table and adding something like sgt = i915_sg_copy(sgt, table_max_segment). But it depends on how likely is this path to be hit on swiotlb platforms. I have no idea. Our datasets are much bigger than the swiotlb space - if that is true on such platforms? It's below my level of care (atm). Platforms hitting this are using swiotlb *bounce* buffers. They will not be able to support a full gfx workload and be going through a copy. We could avoid the additional work, the sg_table is large enough for a 1:1 copy if we do it before the trim, but more importantly we need a simple fix for 4.10. Pushed this pair as I think this is the safe course of action. Creating i915_sg_expand() is a job for a rainy day. It would have been very simple and much more elegant in my opinion. But I understand Tested-by tag was precious to keep. I'll send a patch shortly but it won't be very tested due to time constraints. Also I don't know why you changed page_count and i to unsigned long when the sg API can only handle unsigned int for that. Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 6/6] drm/i915: Update comment that sets I915_MODE_FLAG_INHERITED
Op 19-12-16 om 09:24 schreef Daniel Vetter:
> The code was moved, but the comment not updated. It confused me.
>
> Fixes: 7f4c62840cc4 ("drm/i915: Assign hwmode after encoder state readout")
> Cc: Maarten Lankhorst
> Cc: Patrik Jakobsson
> Cc: Ville Syrjälä
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_display.c | 14 +++---
> 1 file changed, 3 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index e029dba96bca..c7d775f01b23 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -17028,17 +17028,9 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
>* the atomic core happy. It wants a valid mode if the
>* crtc's enabled, so we do the above call.
>*
> - * At this point some state updated by the connectors
> - * in their ->detect() callback has not run yet, so
> - * no recalculation can be done yet.
> - *
> - * Even if we could do a recalculation and modeset
> - * right now it would cause a double modeset if
> - * fbdev or userspace chooses a different initial mode.
> - *
> - * If that happens, someone indicated they wanted a
> - * mode change, which means it's safe to do a full
> - * recalculation.
> + * But we don't set all the derived state fully, hence
> + * set a flag to indicate that a full recalculation is
> + * needed on the next commit.
>*/
> crtc->base.state->mode.private_flags =
> I915_MODE_FLAG_INHERITED;
>
Reviewed-by: Maarten Lankhorst
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Use the existing pages when retrying to DMA map
From: Tvrtko Ursulin
Rather than freeing and re-allocating the pages when DMA mapping
in large chunks fails, we can just rebuild the sg table with no
coalescing.
Also change back the page counter to unsigned int because that
is what the sg API supports.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
Only compile tested!
---
drivers/gpu/drm/i915/i915_gem.c | 40 ++--
1 file changed, 30 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5275f6248ce3..e73f9f5a5d23 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2340,12 +2340,36 @@ static void i915_sg_trim(struct sg_table *orig_st)
*orig_st = new_st;
}
+static void i915_sg_uncoalesce(struct sg_table *orig_st, unsigned long nents)
+{
+ struct sg_table new_st;
+ struct scatterlist *new_sg;
+ struct sgt_iter sgt_iter;
+ struct page *page;
+
+ if (sg_alloc_table(&new_st, nents, GFP_KERNEL))
+ return;
+
+ new_sg = new_st.sgl;
+ for_each_sgt_page(page, sgt_iter, orig_st) {
+ sg_set_page(new_sg, page, PAGE_SIZE, 0);
+ /* called before being DMA mapped, no need to copy sg->dma_* */
+ new_sg = sg_next(new_sg);
+ }
+
+ GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
+
+ sg_free_table(orig_st);
+
+ *orig_st = new_st;
+}
+
static struct sg_table *
i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
{
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- const unsigned long page_count = obj->base.size / PAGE_SIZE;
- unsigned long i;
+ const unsigned int page_count = obj->base.size / PAGE_SIZE;
+ unsigned int i;
struct address_space *mapping;
struct sg_table *st;
struct scatterlist *sg;
@@ -2371,7 +2395,6 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object
*obj)
if (st == NULL)
return ERR_PTR(-ENOMEM);
-rebuild_st:
if (sg_alloc_table(st, page_count, GFP_KERNEL)) {
kfree(st);
return ERR_PTR(-ENOMEM);
@@ -2429,6 +2452,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object
*obj)
/* Trim unused sg entries to avoid wasting memory. */
i915_sg_trim(st);
+prepare_gtt:
ret = i915_gem_gtt_prepare_pages(obj, st);
if (ret) {
/* DMA remapping failed? One possible cause is that
@@ -2436,16 +2460,12 @@ i915_gem_object_get_pages_gtt(struct
drm_i915_gem_object *obj)
* for PAGE_SIZE chunks instead may be helpful.
*/
if (max_segment > PAGE_SIZE) {
- for_each_sgt_page(page, sgt_iter, st)
- put_page(page);
- sg_free_table(st);
-
+ i915_sg_uncoalesce(st, page_count);
max_segment = PAGE_SIZE;
- goto rebuild_st;
+ goto prepare_gtt;
} else {
dev_warn(&dev_priv->drm.pdev->dev,
-"Failed to DMA remap %lu pages\n",
-page_count);
+"Failed to DMA remap %u pages\n", page_count);
goto err_pages;
}
}
--
2.7.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder
On Mon, 2016-12-19 at 19:28 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Let's clean up the mess we have in the if ladder that assigns the
> .get_cdclk() hooks. The grouping of the platforms by the function
> results in a thing that's not really legible, so let's do it the
> other way around and order the if ladder by platform and duplicate
> whatever assignments we need.
>
> To further avoid confusion with the function names let's rename
> them to just fixed__get_cdclk(). The other option would
> be to duplicate the functions entirely but it seems quite
> pointless to do that since each one just returns a fixed value.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_display.c | 41 +
> ---
> 1 file changed, 24 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index bbfef348783b..29f91e799272 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -7379,22 +7379,22 @@ static int valleyview_get_cdclk(struct
> drm_i915_private *dev_priv)
> CCK_DISPLAY_CLOCK_CONTROL);
> }
>
> -static int ilk_get_cdclk(struct drm_i915_private *dev_priv)
> +static int fixed_450mhz_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 45;
> }
>
> -static int i945_get_cdclk(struct drm_i915_private *dev_priv)
> +static int fixed_400mhz_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 40;
> }
>
> -static int i915_get_cdclk(struct drm_i915_private *dev_priv)
> +static int fixed_333mhz_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 33;
> }
>
> -static int i9xx_misc_get_cdclk(struct drm_i915_private *dev_priv)
> +static int fixed_200mhz_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 20;
> }
> @@ -7444,7 +7444,7 @@ static int i915gm_get_cdclk(struct drm_i915_private
> *dev_priv)
> }
> }
>
> -static int i865_get_cdclk(struct drm_i915_private *dev_priv)
> +static int fixed_266mhz_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 27;
> }
> @@ -7487,7 +7487,7 @@ static int i85x_get_cdclk(struct drm_i915_private
> *dev_priv)
> return 0;
> }
>
> -static int i830_get_cdclk(struct drm_i915_private *dev_priv)
> +static int fixed_133mhz_get_cdclk(struct drm_i915_private *dev_priv)
> {
> return 13;
> }
> @@ -16098,32 +16098,39 @@ void intel_init_display_hooks(struct
> drm_i915_private *dev_priv)
> dev_priv->display.get_cdclk = haswell_get_cdclk;
> else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> dev_priv->display.get_cdclk = valleyview_get_cdclk;
> + else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> else if (IS_GEN5(dev_priv))
> - dev_priv->display.get_cdclk = ilk_get_cdclk;
> - else if (IS_I945G(dev_priv) || IS_I965G(dev_priv) ||
> - IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> - dev_priv->display.get_cdclk = i945_get_cdclk;
> + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
> else if (IS_GM45(dev_priv))
> dev_priv->display.get_cdclk = gm45_get_cdclk;
> + else if (IS_G4X(dev_priv))
> + dev_priv->display.get_cdclk = g33_get_cdclk;
> else if (IS_I965GM(dev_priv))
> dev_priv->display.get_cdclk = i965gm_get_cdclk;
> + else if (IS_I965G(dev_priv))
> + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> else if (IS_PINEVIEW(dev_priv))
> dev_priv->display.get_cdclk = pnv_get_cdclk;
> - else if (IS_G33(dev_priv) || IS_G4X(dev_priv))
> + else if (IS_G33(dev_priv))
> dev_priv->display.get_cdclk = g33_get_cdclk;
> - else if (IS_I915G(dev_priv))
> - dev_priv->display.get_cdclk = i915_get_cdclk;
> - else if (IS_I945GM(dev_priv) || IS_I845G(dev_priv))
> - dev_priv->display.get_cdclk = i9xx_misc_get_cdclk;
> + else if (IS_I945GM(dev_priv))
> + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
> + else if (IS_I945G(dev_priv))
> + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> else if (IS_I915GM(dev_priv))
> dev_priv->display.get_cdclk = i915gm_get_cdclk;
> + else if (IS_I915G(dev_priv))
> + dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk;
> else if (IS_I865G(dev_priv))
> - dev_priv->display.get_cdclk = i865_get_cdclk;
> + dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk;
> else if (IS_I85X(dev_priv))
> dev_priv->display.get_cdclk = i85x_get_cdclk;
> + else if (IS_I845G(dev_priv))
> + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
> else { /* 830 */
> WARN(!IS_I830
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Make intel_guc_recv static.
== Series Details == Series: drm/i915/guc: Make intel_guc_recv static. URL : https://patchwork.freedesktop.org/series/17052/ State : success == Summary == Series 17052v1 drm/i915/guc: Make intel_guc_recv static. https://patchwork.freedesktop.org/api/1.0/series/17052/revisions/1/mbox/ Test gem_sync: Subgroup basic-store-all: fail -> PASS (fi-ivb-3520m) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 b8e68c1d31266b62356d578435246516c39de36b drm-tip: 2016y-12m-20d-12h-47m-27s UTC integration manifest 3a2f809 drm/i915/guc: Make intel_guc_recv static. == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3339/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/6] drm/i915: Make intel_get_pipe_from_connector atomic
On Tue, Dec 20, 2016 at 02:35:40PM +0100, Maarten Lankhorst wrote:
> Op 19-12-16 om 09:24 schreef Daniel Vetter:
> > Drive-by fixup while looking at all the connector_list walkers -
> > holding connection_mutex does actually _not_ give you locking to look
> > at the legacy drm_connector->encoder->crtc pointer chain. That one is
> > solely owned by the atomic commit workers. Instead we must inspect the
> > atomic state.
> >
> > Signed-off-by: Daniel Vetter
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 0b0d7e8be630..438d27f93aca 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -15427,15 +15427,14 @@ static int intel_crtc_init(struct
> > drm_i915_private *dev_priv, enum pipe pipe)
> >
> > enum pipe intel_get_pipe_from_connector(struct intel_connector *connector)
> > {
> > - struct drm_encoder *encoder = connector->base.encoder;
> > struct drm_device *dev = connector->base.dev;
> >
> > WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
> >
> > - if (!encoder || WARN_ON(!encoder->crtc))
> > + if (!connector->base.state->crtc)
> > return INVALID_PIPE;
> >
> > - return to_intel_crtc(encoder->crtc)->pipe;
> > + return to_intel_crtc(connector->base.state->crtc)->pipe;
> > }
> >
> > int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
>
> This patch clashes with the previous patch. intel_panel_set_backlight_acpi is
> called
> from asle_set_backlight. You should probably keep connection_mutex alive for
> it.
Oh, I've forgotten to update the commit message for the previous patch - I
ended up _not_ nuking the locking because it did blow up here ;-)
r-b on both if I fix up the previous commit message that we can't nuke the
locking because the asle_set_backlight thing needs it for the backlight
callbacks?
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On Tue, Dec 20, 2016 at 01:38:16PM +, Tvrtko Ursulin wrote: > > On 20/12/2016 12:36, Chris Wilson wrote: > >On Tue, Dec 20, 2016 at 11:33:27AM +, Chris Wilson wrote: > >>On Tue, Dec 20, 2016 at 11:13:43AM +, Tvrtko Ursulin wrote: > >>>How much is the cost of freeing and re-acquiring pages in the fall > >>>back case? It could be avoidable by using the table and adding > >>>something like sgt = i915_sg_copy(sgt, table_max_segment). But it > >>>depends on how likely is this path to be hit on swiotlb platforms. I > >>>have no idea. Our datasets are much bigger than the swiotlb space - > >>>if that is true on such platforms? > >> > >>It's below my level of care (atm). Platforms hitting this are using > >>swiotlb *bounce* buffers. They will not be able to support a full gfx > >>workload and be going through a copy. We could avoid the additional > >>work, the sg_table is large enough for a 1:1 copy if we do it before the > >>trim, but more importantly we need a simple fix for 4.10. > > > >Pushed this pair as I think this is the safe course of action. Creating > >i915_sg_expand() is a job for a rainy day. > > It would have been very simple and much more elegant in my opinion. I'm ready to be impressed, in my head to do an inplace rewrite was tricky. :) > But I understand Tested-by tag was precious to keep. I'll send a > patch shortly but it won't be very tested due to time constraints. > > Also I don't know why you changed page_count and i to unsigned long > when the sg API can only handle unsigned int for that. Primary concern was moving them out of the way and worrying about our own 64bit object size issues. Hmm, can we reuse if (overflows_type(pgcount, unsigned int)) return -E2BIG; to catch the mismatch? -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/6] drm/i915: use drm_connector_list_iter in intel_opregion.c
On Mon, Dec 19, 2016 at 09:24:20AM +0100, Daniel Vetter wrote:
> One case where I nuked a now unecessary locking, otherwise all just
> boring stuff.
Forgot to update the commit message:
"Note that we can't drop the connection_mutex in asle_set_backlight
because the backlight functions need that (they look at connector->state
to figure out the pipe). Otherwise all boring stuff."
I fixed the patch, but not the original commit message ;-)
-Daniel
>
> Cc: Jani Nikula
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_opregion.c | 15 ---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c
> b/drivers/gpu/drm/i915/intel_opregion.c
> index f4429f67a4e3..d586ff9a66ce 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -434,6 +434,7 @@ int intel_opregion_notify_adapter(struct drm_i915_private
> *dev_priv,
> static u32 asle_set_backlight(struct drm_i915_private *dev_priv, u32 bclp)
> {
> struct intel_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> struct opregion_asle *asle = dev_priv->opregion.asle;
> struct drm_device *dev = &dev_priv->drm;
>
> @@ -458,8 +459,10 @@ static u32 asle_set_backlight(struct drm_i915_private
> *dev_priv, u32 bclp)
>* only one).
>*/
> DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp);
> - for_each_intel_connector(dev, connector)
> + drm_connector_list_iter_get(dev, &conn_iter);
> + for_each_intel_connector_iter(connector, &conn_iter)
> intel_panel_set_backlight_acpi(connector, bclp, 255);
> + drm_connector_list_iter_put(&conn_iter);
> asle->cblv = DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID;
>
> drm_modeset_unlock(&dev->mode_config.connection_mutex);
> @@ -701,6 +704,7 @@ static void intel_didl_outputs(struct drm_i915_private
> *dev_priv)
> {
> struct intel_opregion *opregion = &dev_priv->opregion;
> struct intel_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> int i = 0, max_outputs;
> int display_index[16] = {};
>
> @@ -714,7 +718,8 @@ static void intel_didl_outputs(struct drm_i915_private
> *dev_priv)
> max_outputs = ARRAY_SIZE(opregion->acpi->didl) +
> ARRAY_SIZE(opregion->acpi->did2);
>
> - for_each_intel_connector(&dev_priv->drm, connector) {
> + drm_connector_list_iter_get(&dev_priv->drm, &conn_iter);
> + for_each_intel_connector_iter(connector, &conn_iter) {
> u32 device_id, type;
>
> device_id = acpi_display_type(connector);
> @@ -729,6 +734,7 @@ static void intel_didl_outputs(struct drm_i915_private
> *dev_priv)
> set_did(opregion, i, device_id);
> i++;
> }
> + drm_connector_list_iter_put(&conn_iter);
>
> DRM_DEBUG_KMS("%d outputs detected\n", i);
>
> @@ -745,6 +751,7 @@ static void intel_setup_cadls(struct drm_i915_private
> *dev_priv)
> {
> struct intel_opregion *opregion = &dev_priv->opregion;
> struct intel_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> int i = 0;
>
> /*
> @@ -757,11 +764,13 @@ static void intel_setup_cadls(struct drm_i915_private
> *dev_priv)
>* Note that internal panels should be at the front of the connector
>* list already, ensuring they're not left out.
>*/
> - for_each_intel_connector(&dev_priv->drm, connector) {
> + drm_connector_list_iter_get(&dev_priv->drm, &conn_iter);
> + for_each_intel_connector_iter(connector, &conn_iter) {
> if (i >= ARRAY_SIZE(opregion->acpi->cadl))
> break;
> opregion->acpi->cadl[i++] = connector->acpi_device_id;
> }
> + drm_connector_list_iter_put(&conn_iter);
>
> /* If fewer than 8 active devices, the list must be null terminated */
> if (i < ARRAY_SIZE(opregion->acpi->cadl))
> --
> 2.11.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Use drm_connector_list_iter in debugfs
While at it also try to reduce the locking a bit to what's really just
needed instead of everything that we could possibly lock.
Added a new for_each_intel_connector_iter which includes the cast to
intel_connector.
Otherwise just plain transformation with nothing special going on.
v2: Review from Maarten:
- Stick with modeset_lock_all in sink_crc, it looks at crtc->state.
- Fix up early loop exit in i915_displayport_test_active_write.
Cc: Maarten Lankhorst
Reviewed-by: Maarten Lankhorst
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_debugfs.c | 59 -
drivers/gpu/drm/i915/i915_drv.h | 3 ++
2 files changed, 42 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index a5552a1ca01f..800504fd617a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2617,12 +2617,14 @@ static int i915_sink_crc(struct seq_file *m, void *data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct drm_device *dev = &dev_priv->drm;
struct intel_connector *connector;
+ struct drm_connector_list_iter conn_iter;
struct intel_dp *intel_dp = NULL;
int ret;
u8 crc[6];
drm_modeset_lock_all(dev);
- for_each_intel_connector(dev, connector) {
+ drm_connector_list_iter_get(dev, &conn_iter);
+ for_each_intel_connector_iter(connector, &conn_iter) {
struct drm_crtc *crtc;
if (!connector->base.state->best_encoder)
@@ -2648,6 +2650,7 @@ static int i915_sink_crc(struct seq_file *m, void *data)
}
ret = -ENODEV;
out:
+ drm_connector_list_iter_put(&conn_iter);
drm_modeset_unlock_all(dev);
return ret;
}
@@ -3089,9 +3092,9 @@ static int i915_display_info(struct seq_file *m, void
*unused)
struct drm_device *dev = &dev_priv->drm;
struct intel_crtc *crtc;
struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
intel_runtime_pm_get(dev_priv);
- drm_modeset_lock_all(dev);
seq_printf(m, "CRTC info\n");
seq_printf(m, "-\n");
for_each_intel_crtc(dev, crtc) {
@@ -3099,6 +3102,7 @@ static int i915_display_info(struct seq_file *m, void
*unused)
struct intel_crtc_state *pipe_config;
int x, y;
+ drm_modeset_lock(&crtc->base.mutex, NULL);
pipe_config = to_intel_crtc_state(crtc->base.state);
seq_printf(m, "CRTC %d: pipe: %c, active=%s, (size=%dx%d),
dither=%s, bpp=%d\n",
@@ -3123,15 +3127,19 @@ static int i915_display_info(struct seq_file *m, void
*unused)
seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n",
yesno(!crtc->cpu_fifo_underrun_disabled),
yesno(!crtc->pch_fifo_underrun_disabled));
+ drm_modeset_unlock(&crtc->base.mutex);
}
seq_printf(m, "\n");
seq_printf(m, "Connector info\n");
seq_printf(m, "--\n");
- list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+ mutex_lock(&dev->mode_config.mutex);
+ drm_connector_list_iter_get(dev, &conn_iter);
+ drm_for_each_connector_iter(connector, &conn_iter)
intel_connector_info(m, connector);
- }
- drm_modeset_unlock_all(dev);
+ drm_connector_list_iter_put(&conn_iter);
+ mutex_unlock(&dev->mode_config.mutex);
+
intel_runtime_pm_put(dev_priv);
return 0;
@@ -3452,13 +3460,16 @@ static void drrs_status_per_crtc(struct seq_file *m,
struct i915_drrs *drrs = &dev_priv->drrs;
int vrefresh = 0;
struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
- drm_for_each_connector(connector, dev) {
+ drm_connector_list_iter_get(dev, &conn_iter);
+ drm_for_each_connector_iter(connector, &conn_iter) {
if (connector->state->crtc != &intel_crtc->base)
continue;
seq_printf(m, "%s:\n", connector->name);
}
+ drm_connector_list_iter_put(&conn_iter);
if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
seq_puts(m, "\tVBT: DRRS_type: Static");
@@ -3544,9 +3555,10 @@ static int i915_dp_mst_info(struct seq_file *m, void
*unused)
struct intel_encoder *intel_encoder;
struct intel_digital_port *intel_dig_port;
struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
- drm_modeset_lock_all(dev);
- drm_for_each_connector(connector, dev) {
+ drm_connector_list_iter_get(dev, &conn_iter);
+ drm_for_each_connector_iter(connector, &conn_iter) {
if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
continue;
@@ -3562,7 +
Re: [Intel-gfx] [PATCH] drm/i915: Use the existing pages when retrying to DMA map
On Tue, Dec 20, 2016 at 01:42:47PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Rather than freeing and re-allocating the pages when DMA mapping
> in large chunks fails, we can just rebuild the sg table with no
> coalescing.
You are freeing and reallocating the pages - I thought you meant the
sg_table. The cost for recovering the shmemfs after allocation/swapin
already performed in the first pass should be a look up in the radix tree.
Not worrisome.
> Also change back the page counter to unsigned int because that
> is what the sg API supports.
Rather go the other way and start reporting an error when we overflow.
Being strict all page_counts should be u64. :|
> Signed-off-by: Tvrtko Ursulin
> Cc: Chris Wilson
> ---
> Only compile tested!
> ---
> drivers/gpu/drm/i915/i915_gem.c | 40 ++--
> 1 file changed, 30 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5275f6248ce3..e73f9f5a5d23 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2340,12 +2340,36 @@ static void i915_sg_trim(struct sg_table *orig_st)
> *orig_st = new_st;
> }
>
> +static void i915_sg_uncoalesce(struct sg_table *orig_st, unsigned long nents)
> +{
> + struct sg_table new_st;
> + struct scatterlist *new_sg;
> + struct sgt_iter sgt_iter;
> + struct page *page;
> +
> + if (sg_alloc_table(&new_st, nents, GFP_KERNEL))
> + return;
I was hoping for a way to use the pages already allocated. Feels
possible, just reversing the chain and walking backwards will be fun.
> + new_sg = new_st.sgl;
> + for_each_sgt_page(page, sgt_iter, orig_st) {
> + sg_set_page(new_sg, page, PAGE_SIZE, 0);
> + /* called before being DMA mapped, no need to copy sg->dma_* */
> + new_sg = sg_next(new_sg);
> + }
> +
> + GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
> +
> + sg_free_table(orig_st);
> +
> + *orig_st = new_st;
> +}
--
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On 20/12/2016 13:56, Chris Wilson wrote: On Tue, Dec 20, 2016 at 01:38:16PM +, Tvrtko Ursulin wrote: On 20/12/2016 12:36, Chris Wilson wrote: On Tue, Dec 20, 2016 at 11:33:27AM +, Chris Wilson wrote: On Tue, Dec 20, 2016 at 11:13:43AM +, Tvrtko Ursulin wrote: How much is the cost of freeing and re-acquiring pages in the fall back case? It could be avoidable by using the table and adding something like sgt = i915_sg_copy(sgt, table_max_segment). But it depends on how likely is this path to be hit on swiotlb platforms. I have no idea. Our datasets are much bigger than the swiotlb space - if that is true on such platforms? It's below my level of care (atm). Platforms hitting this are using swiotlb *bounce* buffers. They will not be able to support a full gfx workload and be going through a copy. We could avoid the additional work, the sg_table is large enough for a 1:1 copy if we do it before the trim, but more importantly we need a simple fix for 4.10. Pushed this pair as I think this is the safe course of action. Creating i915_sg_expand() is a job for a rainy day. It would have been very simple and much more elegant in my opinion. I'm ready to be impressed, in my head to do an inplace rewrite was tricky. :) Maybe I've missed something then. We'll see. :) But I understand Tested-by tag was precious to keep. I'll send a patch shortly but it won't be very tested due to time constraints. Also I don't know why you changed page_count and i to unsigned long when the sg API can only handle unsigned int for that. Primary concern was moving them out of the way and worrying about our own 64bit object size issues. Hmm, can we reuse if (overflows_type(pgcount, unsigned int)) return -E2BIG; to catch the mismatch? You have already added that to i915_gem_object_create some time ago! :) Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RFCv2,01/19] drm/i915: Provide a hook for selftests
== Series Details == Series: series starting with [RFCv2,01/19] drm/i915: Provide a hook for selftests URL : https://patchwork.freedesktop.org/series/17057/ State : success == Summary == Series 17057v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/17057/revisions/1/mbox/ Test gem_sync: Subgroup basic-store-all: fail -> PASS (fi-ivb-3520m) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 b8e68c1d31266b62356d578435246516c39de36b drm-tip: 2016y-12m-20d-12h-47m-27s UTC integration manifest c4bb35d kselftests: Exercise hw-independent mock tests for i915.ko 0e5ff42 drm/i915: Provide a hook for selftests == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3340/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm: Improve drm_mm search (and fix topdown allocation) with rbtrees
The drm_mm range manager claimed to support top-down insertion, but it
was neither searching for the top-most hole that could fit the
allocation request nor fitting the request to the hole correctly.
In order to search the range efficiently, we create a secondary index
for the holes using either their size or their address. This index
allows us to find the smallest hole or the hole at the bottom or top of
the range efficiently, whilst keeping the hole stack to rapidly service
evictions.
v2: Search for holes both high and low. Rename flags to mode.
v3: Discover rb_entry_safe() and use it!
Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 16 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 20 +-
drivers/gpu/drm/armada/armada_gem.c | 4 +-
drivers/gpu/drm/drm_mm.c | 511 +++
drivers/gpu/drm/drm_vma_manager.c| 3 +-
drivers/gpu/drm/etnaviv/etnaviv_mmu.c| 8 +-
drivers/gpu/drm/i915/i915_gem.c | 10 +-
drivers/gpu/drm/i915/i915_gem_evict.c| 9 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 39 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 6 +-
drivers/gpu/drm/msm/msm_gem.c| 3 +-
drivers/gpu/drm/msm/msm_gem_vma.c| 3 +-
drivers/gpu/drm/selftests/test-drm_mm.c | 58 ++-
drivers/gpu/drm/sis/sis_mm.c | 6 +-
drivers/gpu/drm/tegra/gem.c | 4 +-
drivers/gpu/drm/ttm/ttm_bo_manager.c | 18 +-
drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
drivers/gpu/drm/vc4/vc4_hvs.c| 3 +-
drivers/gpu/drm/vc4/vc4_plane.c | 6 +-
drivers/gpu/drm/via/via_mm.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c | 10 +-
include/drm/drm_mm.h | 135 +++
23 files changed, 434 insertions(+), 449 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 00f46b0e076d..d841fcb2e709 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -97,8 +97,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
{
struct amdgpu_gtt_mgr *mgr = man->priv;
struct drm_mm_node *node = mem->mm_node;
- enum drm_mm_search_flags sflags = DRM_MM_SEARCH_BEST;
- enum drm_mm_allocator_flags aflags = DRM_MM_CREATE_DEFAULT;
+ enum drm_mm_insert_mode mode;
unsigned long fpfn, lpfn;
int r;
@@ -115,15 +114,14 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
else
lpfn = man->size;
- if (place && place->flags & TTM_PL_FLAG_TOPDOWN) {
- sflags = DRM_MM_SEARCH_BELOW;
- aflags = DRM_MM_CREATE_TOP;
- }
+ mode = DRM_MM_INSERT_BEST;
+ if (place && place->mode & TTM_PL_FLAG_TOPDOWN)
+ mode = DRM_MM_INSERT_HIGH;
spin_lock(&mgr->lock);
- r = drm_mm_insert_node_in_range_generic(&mgr->mm, node, mem->num_pages,
- mem->page_alignment, 0,
- fpfn, lpfn, sflags, aflags);
+ r = drm_mm_insert_node_in_range(&mgr->mm, node,
+ mem->num_pages, mem->page_alignment, 0,
+ fpfn, lpfn, mode);
spin_unlock(&mgr->lock);
if (!r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index d710226a0fff..5f106ad815ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -97,8 +97,7 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager
*man,
struct amdgpu_vram_mgr *mgr = man->priv;
struct drm_mm *mm = &mgr->mm;
struct drm_mm_node *nodes;
- enum drm_mm_search_flags sflags = DRM_MM_SEARCH_DEFAULT;
- enum drm_mm_allocator_flags aflags = DRM_MM_CREATE_DEFAULT;
+ enum drm_mm_insert_mode mode;
unsigned long lpfn, num_nodes, pages_per_node, pages_left;
unsigned i;
int r;
@@ -121,10 +120,9 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager
*man,
if (!nodes)
return -ENOMEM;
- if (place->flags & TTM_PL_FLAG_TOPDOWN) {
- sflags = DRM_MM_SEARCH_BELOW;
- aflags = DRM_MM_CREATE_TOP;
- }
+ mode = DRM_MM_INSERT_BEST;
+ if (place->flags & TTM_PL_FLAG_TOPDOWN)
+ mode = DRM_MM_INSERT_HIGH;
pages_left = mem->num_pages;
@@ -135,13 +133,11 @@ static int amdgpu_vram_mgr_new(struct
ttm_mem_type_manager *man,
if (pages == pages_per_node)
alignment = pages_per_node;
- else
-
Re: [Intel-gfx] [PATCH] drm/i915: Use the existing pages when retrying to DMA map
On 20/12/2016 14:14, Chris Wilson wrote:
On Tue, Dec 20, 2016 at 01:42:47PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Rather than freeing and re-allocating the pages when DMA mapping
in large chunks fails, we can just rebuild the sg table with no
coalescing.
You are freeing and reallocating the pages - I thought you meant the
sg_table. The cost for recovering the shmemfs after allocation/swapin
already performed in the first pass should be a look up in the radix tree.
Not worrisome.
Maybe not, but looks a bit unsightly to me. This is simple enough and
one re-allocation less. From both pages and sg entries, to just the sg
entries.
Also change back the page counter to unsigned int because that
is what the sg API supports.
Rather go the other way and start reporting an error when we overflow.
Being strict all page_counts should be u64. :|
As I wrote in the other thread, that's already in
i915_gem_object_create. Added there at the time when I spotted the
sg_alloc_table unsigned int business.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
Only compile tested!
---
drivers/gpu/drm/i915/i915_gem.c | 40 ++--
1 file changed, 30 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5275f6248ce3..e73f9f5a5d23 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2340,12 +2340,36 @@ static void i915_sg_trim(struct sg_table *orig_st)
*orig_st = new_st;
}
+static void i915_sg_uncoalesce(struct sg_table *orig_st, unsigned long nents)
+{
+ struct sg_table new_st;
+ struct scatterlist *new_sg;
+ struct sgt_iter sgt_iter;
+ struct page *page;
+
+ if (sg_alloc_table(&new_st, nents, GFP_KERNEL))
+ return;
I was hoping for a way to use the pages already allocated. Feels
possible, just reversing the chain and walking backwards will be fun.
For a rainy day as you said. :)
+ new_sg = new_st.sgl;
+ for_each_sgt_page(page, sgt_iter, orig_st) {
+ sg_set_page(new_sg, page, PAGE_SIZE, 0);
+ /* called before being DMA mapped, no need to copy sg->dma_* */
+ new_sg = sg_next(new_sg);
+ }
+
+ GEM_BUG_ON(new_sg); /* Should walk exactly nents and hit the end */
+
+ sg_free_table(orig_st);
+
+ *orig_st = new_st;
+}
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fallback to single PAGE_SIZE segments for DMA remapping
On Tue, Dec 20, 2016 at 02:14:21PM +, Tvrtko Ursulin wrote: > > On 20/12/2016 13:56, Chris Wilson wrote: > >On Tue, Dec 20, 2016 at 01:38:16PM +, Tvrtko Ursulin wrote: > >> > >>On 20/12/2016 12:36, Chris Wilson wrote: > >>>On Tue, Dec 20, 2016 at 11:33:27AM +, Chris Wilson wrote: > On Tue, Dec 20, 2016 at 11:13:43AM +, Tvrtko Ursulin wrote: > >How much is the cost of freeing and re-acquiring pages in the fall > >back case? It could be avoidable by using the table and adding > >something like sgt = i915_sg_copy(sgt, table_max_segment). But it > >depends on how likely is this path to be hit on swiotlb platforms. I > >have no idea. Our datasets are much bigger than the swiotlb space - > >if that is true on such platforms? > > It's below my level of care (atm). Platforms hitting this are using > swiotlb *bounce* buffers. They will not be able to support a full gfx > workload and be going through a copy. We could avoid the additional > work, the sg_table is large enough for a 1:1 copy if we do it before the > trim, but more importantly we need a simple fix for 4.10. > >>> > >>>Pushed this pair as I think this is the safe course of action. Creating > >>>i915_sg_expand() is a job for a rainy day. > >> > >>It would have been very simple and much more elegant in my opinion. > > > >I'm ready to be impressed, in my head to do an inplace rewrite was tricky. > >:) > > Maybe I've missed something then. We'll see. :) > > >>But I understand Tested-by tag was precious to keep. I'll send a > >>patch shortly but it won't be very tested due to time constraints. > >> > >>Also I don't know why you changed page_count and i to unsigned long > >>when the sg API can only handle unsigned int for that. > > > >Primary concern was moving them out of the way and worrying about our > >own 64bit object size issues. Hmm, can we reuse > > > >if (overflows_type(pgcount, unsigned int)) > > return -E2BIG; > > > >to catch the mismatch? > > You have already added that to i915_gem_object_create some time ago! :) I know, I'm thinking ahead of documenting the types around the place so that we can start actually preparing for huge objects. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 1/2] drm: Create new structure for HDMI info
Hi Shashank,
On 20-12-2016 13:47, Shashank Sharma wrote:
> This patch creates a new structure drm_hdmi_info (inspired from
> drm_display_info). Driver will parse HDMI sink's advance capabilities
> from HF-VSDB and populate this structure. This structure will be kept
> and used as a sub-class within drm_display_info.
You populate the structure but I think you should add a helper to
reset it when there is a new EDID or when the previous EDID is no
longer valid. The same applies to other fields in
drm_display_info structure. I've had problems before because of
incorrect values in this structure.
> We are adding parsing of HF-VSDB In the next patch.
>
> Cc: Thierry Reding
> Cc: Daniel Vetter
> Cc: Jose Abreu
> Suggested-by: Thierry Reding
> Signed-off-by: Shashank Sharma
> ---
> drivers/gpu/drm/drm_edid.c | 6 ++--
> include/drm/drm_connector.h | 79
> ++---
> 2 files changed, 77 insertions(+), 8 deletions(-)
>
[snip]
>
> /**
> + * struct drm_hdmi_info - runtime data specific to a connected hdmi sink
> + *
> + * Describes a given hdmi display (e.g. CRT or flat panel) and its
> capabilities.
> + * Mostly refects the advanced features added in HDMI 2.0 specs and the deep
> + * color support. This is a sub-segment of struct drm_display_info and
> should be
> + * used within.
> + *
> + * For sinks which provide an EDID this can be filled out by calling
> + * drm_add_edid_modes().
> + */
> +
> +struct drm_hdmi_info {
[snip]
> +
> + /**
> + * @edid_yuv420_dc_modes: bpc for deep color yuv420 encoding.
> + * various sinks can support 10/12/16 bit per channel deep
> + * color encoding. edid_yuv420_dc_modes = 0 means sink doesn't
> + * support deep color yuv420 encoding.
> + */
> + u8 edid_yuv420_dc_modes;
> +
> +
> +#define DRM_HFVSDB_SCDC_SUPPORT (1<<7)
> +#define DRM_HFVSDB_SCDC_RR_CAP (1<<6)
> +#define DRM_HFVSDB_SCRAMBLING(1<<3)
> +#define DRM_HFVSDB_INDEPENDENT_VIEW (1<<2)
> +#define DRM_HFVSDB_DUAL_VIEW (1<<1)
> +#define DRM_HFVSDB_3D_OSD(1<<0)
> +
> + /**
> + * @scdc_supported: Sink supports SCDC functionality.
> + */
> + bool scdc_supported;
> +
> + /**
> + * @scdc_rr_cap: Sink has SCDC read request capability.
> + */
> + bool scdc_rr_cap;
> +
> + /**
> + * @scrambling: Sync supports scrambling for <=340 Mcsc TMDS
> + * char rates. Above 340 Mcsc rates, scrambling is always reqd.
> + */
> + bool scrambling;
> +
> + /**
> + * @independent_view_3d: Sink supports 3d independent view signaling
> + * in HF-VSIF.
> + */
> + bool independent_view_3d;
> +
> + /**
> + * @dual_view_3d: Sink supports 3d dual view signaling in HF-VSIF.
> + */
> + bool dual_view_3d;
> +
> + /**
> + * @osd_disparity_3d: Sink supports 3d osd disparity indication
> + * in HF-VSIF.
> + */
> + bool osd_disparity_3d;
Maybe you should only add these fields in the second patch.
Best regards,
Jose Miguel Abreu
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Revert ea0000f0 "Roll out the helper nonblock tracking"
On Sun, 27 Nov 2016, Jim Rees wrote:
> Commit eaf0 has been causing multiple problems for i915 users. See for
> example:
>
> https://bugs.freedesktop.org/show_bug.cgi?id=96781
> https://bugs.freedesktop.org/show_bug.cgi?id=97529
> https://bugzilla.redhat.com/show_bug.cgi?id=1385228
> https://forums.opensuse.org/showthread.php/520969-drm-915-Resetting-chip-after-gpu-hang
>
> Those last two are not confirmed but look like the same problem.
>
> This has only been lightly tested and probably shouldn't go upstream yet.
>
> Signed-off-by: Jim Rees
Daniel, any comments on this one?
BR,
Jani.
> ---
> drivers/gpu/drm/i915/intel_display.c | 10 --
> 1 file changed, 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 81c1149..c31c9e4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14346,8 +14346,6 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
> WARN_ON(ret);
> }
>
> - drm_atomic_helper_wait_for_dependencies(state);
> -
> if (intel_state->modeset) {
> memcpy(dev_priv->min_pixclk, intel_state->min_pixclk,
> sizeof(intel_state->min_pixclk));
> @@ -14470,8 +14468,6 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
> if (intel_state->modeset && intel_can_enable_sagv(state))
> intel_enable_sagv(dev_priv);
>
> - drm_atomic_helper_commit_hw_done(state);
> -
> if (intel_state->modeset)
> intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
>
> @@ -14479,8 +14475,6 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
> drm_atomic_helper_cleanup_planes(dev, state);
> mutex_unlock(&dev->struct_mutex);
>
> - drm_atomic_helper_commit_cleanup_done(state);
> -
> drm_atomic_state_free(state);
>
> /* As one of the primary mmio accessors, KMS has a high likelihood
> @@ -14546,10 +14540,6 @@ static int intel_atomic_commit(struct drm_device
> *dev,
> return -EINVAL;
> }
>
> - ret = drm_atomic_helper_setup_commit(state, nonblock);
> - if (ret)
> - return ret;
> -
> INIT_WORK(&state->commit_work, intel_atomic_commit_work);
>
> ret = intel_atomic_prepare_commit(dev, state, nonblock);
--
Jani Nikula, Intel Open Source Technology Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK
On Tue, 2016-12-20 at 12:53 +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK > URL : https://patchwork.freedesktop.org/series/16926/ > State : failure > > == Summary == > > Series 16926v1 Series without cover letter > https://patchwork.freedesktop.org/api/1.0/series/16926/revisions/1/mbox/ > > Test drv_module_reload: > Subgroup basic-reload-inject: > pass -> DMESG-WARN (fi-kbl-7500u) [ 33.108496] WARNING: CPU: 2 PID: 6400 at drivers/gpu/drm/i915/i915_gem.c:4254 i915_gem_suspend+0x181/0x190 [i915] [ 33.108498] WARN_ON(dev_priv->gt.awake) [ 33.108499] Modules linked in: [ 33.108501] i915(-) x86_pkg_temp_thermal intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec snd_hwdep mei_me snd_hda_core mei snd_pcm e1000e ptp pps_core i2c_hid [last unloaded: snd_hda_intel] [ 33.108519] CPU: 2 PID: 6400 Comm: drv_module_relo Tainted: G U 4.9.0-CI-Patchwork_3338+ #1 [ 33.108521] Hardware name: GIGABYTE GB-BKi7A-7500/MFLP7AP-00, BIOS F1 07/27/2016 [ 33.108522] c9547d18 81435b05 c9547d68 [ 33.108527] c9547d58 8107e4d6 109e 88025c62 [ 33.108530] 88025c620068 a013f4c0 [ 33.108534] Call Trace: [ 33.108540] [] dump_stack+0x67/0x92 [ 33.108543] [] __warn+0xc6/0xe0 [ 33.108547] [] warn_slowpath_fmt+0x4a/0x50 [ 33.108572] [] i915_gem_suspend+0x181/0x190 [i915] [ 33.108589] [] i915_driver_unload+0x1e/0x190 [i915] [ 33.108608] [] i915_pci_remove+0x14/0x20 [i915] [ 33.108611] [] pci_device_remove+0x34/0xb0 [ 33.108614] [] __device_release_driver+0x9c/0x150 [ 33.108617] [] driver_detach+0xb6/0xc0 [ 33.108619] [] bus_remove_driver+0x53/0xd0 [ 33.108621] [] driver_unregister+0x27/0x50 [ 33.108623] [] pci_unregister_driver+0x25/0x70 [ 33.108652] [] i915_exit+0x1a/0x71 [i915] [ 33.108655] [] SyS_delete_module+0x193/0x1e0 [ 33.108658] [] entry_SYSCALL_64_fastpath+0x1c/0xb1 [ 33.108660] ---[ end trace 247dfc1ad299c432 ]--- https://bugs.freedesktop.org/show_bug.cgi?id=98670 > Test pm_rpm: > Subgroup basic-pci-d3-state: > pass -> FAIL (fi-kbl-7500u) > Subgroup basic-rte: > pass -> FAIL (fi-kbl-7500u) Out IGT-Version: 1.17-g38bffd9 (x86_64) (Linux: 4.9.0-CI-Patchwork_3338+ x86_64) Runtime PM support: 1 PC8 residency support: 0 Stack trace: #0 [__igt_fail_assert+0x101] #1 [main+0x2514] #2 [__libc_start_main+0xf0] #3 [_start+0x29] #4 [+0x29] Subtest basic-rte: FAIL (10.053s) Err (pm_rpm:9532) CRITICAL: Test assertion failure function basic_subtest, file pm_rpm.c:705: (pm_rpm:9532) CRITICAL: Failed assertion: wait_for_suspended() Subtest basic-rte failed. DEBUG (pm_rpm:9532) CRITICAL: Test assertion failure function basic_subtest, file pm_rpm.c:705: (pm_rpm:9532) CRITICAL: Failed assertion: wait_for_suspended() Is this related to the gt.awake WARN? Looking at CI history, it seems the three tests always fail together. Thanks, Ander > > fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 > fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 > fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 > fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 > fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 > fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 > fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 > fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 > fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 > fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 > fi-kbl-7500u total:247 pass:223 dwarn:1 dfail:0 fail:2 skip:21 > fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 > fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 > fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 > fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 > fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 > fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 > > c0d7a4455b44d48ede0a38af3a1469d28dee10c9 drm-tip: 2016y-12m-20d-10h-01m-56s > UTC integration manifest > 09486c1 drm/i915/glk: Convert a few more IS_BROXTON() to IS_GEN9_LP() > 2ba792e drm/i915/glk: Add missing bits to allow runtime pm suspend on GLK. > 630af86 drm/i915/DMC/GLK: Load DMC on GLK > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3338/ __
Re: [Intel-gfx] [PATCH v2 2/2] drm: parse hf-vsdb
Hi Shashank,
On 20-12-2016 13:47, Shashank Sharma wrote:
> HDMI 2.0 / CEA-861-F specs define a new CEA extension data block,
> called hdmi-forum vendor specific data block (HF-VSDB). This block
> contains information about sink's support for HDMI 2.0 compliant
> features. These features are:
> - Deep color YUV 420 support and BPC
> - 3D flags for
> - OSD Displarity
> - Dual view signaling
> - independent view signaling
> - SCDC support
> - Max TMDS char rate
> - Scrambling support
>
> This patch adds a parser function for this block, and add flags to
> indicate support for new features, in drm_display_info structure
>
> V2:
> - Addressed review comments from Thierry
> - remove len > 31 check
> - remove version check
> - fix duplicate values for macros of 36 and 30-bit depths
> - Added a sub-class for HDMI related information within drm_display_info
> (Thierry, Daniel) and populated it with HF-VSDB specific info.
>
> Cc: Thierry Reding
> Cc: Daniel Vetter
> Cc: Jose Abreu
> Signed-off-by: Shashank Sharma
> ---
> drivers/gpu/drm/drm_edid.c | 70
> ++
> include/drm/drm_edid.h | 5
> include/linux/hdmi.h | 1 +
> 3 files changed, 76 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index b552197..59e04fb 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -3224,6 +3224,23 @@ static int add_3d_struct_modes(struct drm_connector
> *connector, u16 structure,
> return 0;
> }
>
> +static bool cea_db_is_hf_vsdb(const u8 *db)
> +{
> + u8 len;
> + int hfvsdb_id;
> +
> + if (cea_db_tag(db) != VENDOR_BLOCK)
> + return false;
> +
> + len = cea_db_payload_len(db);
> + if (len < 7)
> + return false;
> +
> + hfvsdb_id = db[1] | (db[2] << 8) | (db[3] << 16);
> +
> + return hfvsdb_id == HDMI_IEEE_OUI_HFVSDB;
> +}
> +
> static bool cea_db_is_hdmi_vsdb(const u8 *db)
> {
> int hdmi_id;
> @@ -3768,6 +3785,57 @@ bool drm_rgb_quant_range_selectable(struct edid *edid)
> }
> EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
>
> +static void drm_parse_yuv420_deep_color_info(struct drm_connector *connector,
> + const u8 *db)
> +{
> + struct drm_hdmi_info *info = &connector->display_info.hdmi_info;
> +
> + if (db[7] & DRM_EDID_YUV420_DC_48)
> + info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_48;
> + if (db[7] & DRM_EDID_YUV420_DC_36)
> + info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_36;
> + if (db[7] & DRM_EDID_YUV420_DC_30)
> + info->edid_yuv420_dc_modes |= DRM_EDID_YUV420_DC_30;
> +
> + if (!info->edid_yuv420_dc_modes) {
> + DRM_DEBUG("%s: No YUV 420 deep color support in sink.\n",
> + connector->name);
> + return;
> + }
> +}
> +
> +static void
> +drm_parse_hf_vsdb(struct drm_connector *connector, const u8 *db)
> +{
> + struct drm_display_info *info = &connector->display_info;
> + struct drm_hdmi_info *hdmi_info = &info->hdmi_info;
> +
> + if (db[5]) {
> + /*
> + * If the sink supplies max tmds char rate in db,
> + * the actual max tmds rate = db[5] * 5Mhz.
> + */
> + info->max_tmds_clock = db[5] * 5000;
> + DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n",
> + info->max_tmds_clock);
> + }
> +
> + if (db[6] & DRM_HFVSDB_SCDC_SUPPORT)
> + hdmi_info->scdc_supported = true;
> + if (db[6] & DRM_HFVSDB_SCDC_RR_CAP)
> + hdmi_info->scdc_rr_cap = true;
> + if (db[6] & DRM_HFVSDB_SCRAMBLING)
> + hdmi_info->scrambling = true;
According to spec you should also check if scdc is supported in
order to support scrambling.
> + if (db[6] & DRM_HFVSDB_INDEPENDENT_VIEW)
> + hdmi_info->independent_view_3d = true;
> + if (db[6] & DRM_HFVSDB_DUAL_VIEW)
> + hdmi_info->dual_view_3d = true;
> + if (db[6] & DRM_HFVSDB_3D_OSD)
> + hdmi_info->osd_disparity_3d = true;
> +
> + drm_parse_yuv420_deep_color_info(connector, db);
> +}
> +
> static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
> const u8 *hdmi)
> {
> @@ -3882,6 +3950,8 @@ static void drm_parse_cea_ext(struct drm_connector
> *connector,
>
> if (cea_db_is_hdmi_vsdb(db))
> drm_parse_hdmi_vsdb_video(connector, db);
> + if (cea_db_is_hf_vsdb(db))
> + drm_parse_hf_vsdb(connector, db);
> }
> }
>
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index 38eabf6..df606e3 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -212,6 +212,11 @@ struct detailed_timing {
> #define DRM_EDID_HDMI_DC_30 (1 << 4
Re: [Intel-gfx] i915 regression in kernel 4.10
On Mon, Dec 19, 2016 at 03:16:44PM +0100, Juergen Gross wrote: > On 19/12/16 13:29, Chris Wilson wrote: > > On Mon, Dec 19, 2016 at 12:39:16PM +0100, Juergen Gross wrote: > >> With recent 4.10 kernel the graphics isn't coming up under Xen. First > >> failure message is: > >> > >> [ 46.656649] i915 :00:02.0: swiotlb buffer is full (sz: 1630208 > >> bytes) > > > > Do we get a silent failure? i915_gem_gtt_prepare_pages() is where we > > call dma_map_sg() and pass the sg to swiotlb (in this case) for > > remapping, and we do check for an error value of 0. After that error, > > SWIOTLB_MAP_ERROR is propagated back and converted to 0 for > > dma_map_sg(). That looks valid, and we should report ENOMEM back to the > > caller. > > > >> Later I see splats like: > >> > >> [ 49.393583] general protection fault: [#1] SMP > > > > What was the faulting address? RAX is particularly non-pointer-like so I > > wonder if we walked onto an uninitialised portion of the sgtable. We may > > have tripped over a bug in our sg_page iterator. > > During the bisect process there have been either GP or NULL pointer > dereferences or other page faults. Typical addresses where: > > xen_swiotlb_unmap_sg_attrs+0x1f/0x50: access to 0018 > xen_swiotlb_unmap_sg_attrs+0x1f/0x50: access to 03020118 > > > > > The attached patch should prevent an early ENOMEM following the swiotlb > > allocation failure. But I suspect that we will still be tripping up the > > failure in the sg walker when binding to the GPU. > > -Chris > > > > The patch is working not too bad. :-) > > Still several "swiotlb buffer is full" messages (some with sz:, most > without), but no faults any more (neither GP nor NULL pointer > dereference). Graphical login is working now. I think I know why. The optimization that was added assumes that bus addresses is the same as physical address. Hence it packs all of the virtual addresses in the sg, and hands it off to SWIOTLB which walks each one and realizes that it has to use the bounce buffer. I am wondering if would make sense to pull 'swiotlb_max_size' inside of SWIOTLB and make it an library-ish - so Xen-SWIOTLB can register as well and report say that it can only provide one page (unless it is running under baremtal). Or make the usage of 'max_segement' and 'page_to_pfn(page) != last_pfn + 1' in i915_gem_object_Get_pages_gtt use something similar to xen_biovec_phys_mergeable? ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm: Create new structure for HDMI info
== Series Details == Series: series starting with [v2,1/2] drm: Create new structure for HDMI info URL : https://patchwork.freedesktop.org/series/17059/ State : success == Summary == Series 17059v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/17059/revisions/1/mbox/ Test gem_sync: Subgroup basic-store-all: fail -> PASS (fi-ivb-3520m) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 b8e68c1d31266b62356d578435246516c39de36b drm-tip: 2016y-12m-20d-12h-47m-27s UTC integration manifest ba07cb6 drm: parse hf-vsdb a545ffa drm: Create new structure for HDMI info == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3341/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK
On Tue, Dec 20, 2016 at 04:34:20PM +0200, Ander Conselvan De Oliveira wrote: > On Tue, 2016-12-20 at 12:53 +, Patchwork wrote: > > == Series Details == > > > > Series: series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK > > URL : https://patchwork.freedesktop.org/series/16926/ > > State : failure > > > > == Summary == > > > > Series 16926v1 Series without cover letter > > https://patchwork.freedesktop.org/api/1.0/series/16926/revisions/1/mbox/ > > > > Test drv_module_reload: > > Subgroup basic-reload-inject: > > pass -> DMESG-WARN (fi-kbl-7500u) > > [ 33.108496] WARNING: CPU: 2 PID: 6400 at > drivers/gpu/drm/i915/i915_gem.c:4254 i915_gem_suspend+0x181/0x190 [i915] > [ 33.108498] WARN_ON(dev_priv->gt.awake) > [ 33.108499] Modules linked in: > [ 33.108501] i915(-) x86_pkg_temp_thermal intel_powerclamp coretemp > crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_codec_hdmi > snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec snd_hwdep mei_me > snd_hda_core mei snd_pcm e1000e ptp pps_core i2c_hid [last unloaded: > snd_hda_intel] > [ 33.108519] CPU: 2 PID: 6400 Comm: drv_module_relo Tainted: G U > 4.9.0-CI-Patchwork_3338+ #1 > [ 33.108521] Hardware name: GIGABYTE GB-BKi7A-7500/MFLP7AP-00, BIOS F1 > 07/27/2016 > [ 33.108522] c9547d18 81435b05 c9547d68 > > [ 33.108527] c9547d58 8107e4d6 109e > 88025c62 > [ 33.108530] 88025c620068 a013f4c0 > > [ 33.108534] Call Trace: > [ 33.108540] [] dump_stack+0x67/0x92 > [ 33.108543] [] __warn+0xc6/0xe0 > [ 33.108547] [] warn_slowpath_fmt+0x4a/0x50 > [ 33.108572] [] i915_gem_suspend+0x181/0x190 [i915] > [ 33.108589] [] i915_driver_unload+0x1e/0x190 [i915] > [ 33.108608] [] i915_pci_remove+0x14/0x20 [i915] > [ 33.108611] [] pci_device_remove+0x34/0xb0 > [ 33.108614] [] __device_release_driver+0x9c/0x150 > [ 33.108617] [] driver_detach+0xb6/0xc0 > [ 33.108619] [] bus_remove_driver+0x53/0xd0 > [ 33.108621] [] driver_unregister+0x27/0x50 > [ 33.108623] [] pci_unregister_driver+0x25/0x70 > [ 33.108652] [] i915_exit+0x1a/0x71 [i915] > [ 33.108655] [] SyS_delete_module+0x193/0x1e0 > [ 33.108658] [] entry_SYSCALL_64_fastpath+0x1c/0xb1 > [ 33.108660] ---[ end trace 247dfc1ad299c432 ]--- > > https://bugs.freedesktop.org/show_bug.cgi?id=98670 > > > Test pm_rpm: > > Subgroup basic-pci-d3-state: > > pass -> FAIL (fi-kbl-7500u) > > Subgroup basic-rte: > > pass -> FAIL (fi-kbl-7500u) > > Out > IGT-Version: 1.17-g38bffd9 (x86_64) (Linux: 4.9.0-CI-Patchwork_3338+ x86_64) > Runtime PM support: 1 > PC8 residency support: 0 > Stack trace: > #0 [__igt_fail_assert+0x101] > #1 [main+0x2514] > #2 [__libc_start_main+0xf0] > #3 [_start+0x29] > #4 [+0x29] > Subtest basic-rte: FAIL (10.053s) > Err > (pm_rpm:9532) CRITICAL: Test assertion failure function basic_subtest, file > pm_rpm.c:705: > (pm_rpm:9532) CRITICAL: Failed assertion: wait_for_suspended() > Subtest basic-rte failed. > DEBUG > (pm_rpm:9532) CRITICAL: Test assertion failure function basic_subtest, file > pm_rpm.c:705: > (pm_rpm:9532) CRITICAL: Failed assertion: wait_for_suspended() > > Is this related to the gt.awake WARN? Looking at CI history, it seems the > three > tests always fail together. No. The message is from an earlier incarnation of the module (i.e. if it does correlates, it is a bug in module loading not sanitizing hw state), and https://intel-gfx-ci.01.org/CI/fi-kbl-7500u.html disagrees with you. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK
On Tue, 2016-12-20 at 14:46 +, Chris Wilson wrote: > On Tue, Dec 20, 2016 at 04:34:20PM +0200, Ander Conselvan De Oliveira wrote: > > > > On Tue, 2016-12-20 at 12:53 +, Patchwork wrote: > > > > > > == Series Details == > > > > > > Series: series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK > > > URL : https://patchwork.freedesktop.org/series/16926/ > > > State : failure > > > > > > == Summary == > > > > > > Series 16926v1 Series without cover letter > > > https://patchwork.freedesktop.org/api/1.0/series/16926/revisions/1/mbox/ > > > > > > Test drv_module_reload: > > > Subgroup basic-reload-inject: > > > pass -> DMESG-WARN (fi-kbl-7500u) > > [ 33.108496] WARNING: CPU: 2 PID: 6400 at > > drivers/gpu/drm/i915/i915_gem.c:4254 i915_gem_suspend+0x181/0x190 [i915] > > [ 33.108498] WARN_ON(dev_priv->gt.awake) > > [ 33.108499] Modules linked in: > > [ 33.108501] i915(-) x86_pkg_temp_thermal intel_powerclamp coretemp > > crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_codec_hdmi > > snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec snd_hwdep mei_me > > snd_hda_core mei snd_pcm e1000e ptp pps_core i2c_hid [last unloaded: > > snd_hda_intel] > > [ 33.108519] CPU: 2 PID: 6400 Comm: drv_module_relo Tainted: > > G U 4.9.0-CI-Patchwork_3338+ #1 > > [ 33.108521] Hardware name: GIGABYTE GB-BKi7A-7500/MFLP7AP-00, BIOS F1 > > 07/27/2016 > > [ 33.108522] c9547d18 81435b05 c9547d68 > > > > [ 33.108527] c9547d58 8107e4d6 109e > > 88025c62 > > [ 33.108530] 88025c620068 a013f4c0 > > > > [ 33.108534] Call Trace: > > [ 33.108540] [] dump_stack+0x67/0x92 > > [ 33.108543] [] __warn+0xc6/0xe0 > > [ 33.108547] [] warn_slowpath_fmt+0x4a/0x50 > > [ 33.108572] [] i915_gem_suspend+0x181/0x190 [i915] > > [ 33.108589] [] i915_driver_unload+0x1e/0x190 [i915] > > [ 33.108608] [] i915_pci_remove+0x14/0x20 [i915] > > [ 33.108611] [] pci_device_remove+0x34/0xb0 > > [ 33.108614] [] __device_release_driver+0x9c/0x150 > > [ 33.108617] [] driver_detach+0xb6/0xc0 > > [ 33.108619] [] bus_remove_driver+0x53/0xd0 > > [ 33.108621] [] driver_unregister+0x27/0x50 > > [ 33.108623] [] pci_unregister_driver+0x25/0x70 > > [ 33.108652] [] i915_exit+0x1a/0x71 [i915] > > [ 33.108655] [] SyS_delete_module+0x193/0x1e0 > > [ 33.108658] [] entry_SYSCALL_64_fastpath+0x1c/0xb1 > > [ 33.108660] ---[ end trace 247dfc1ad299c432 ]--- > > > > https://bugs.freedesktop.org/show_bug.cgi?id=98670 > > > > > > > > Test pm_rpm: > > > Subgroup basic-pci-d3-state: > > > pass -> FAIL (fi-kbl-7500u) > > > Subgroup basic-rte: > > > pass -> FAIL (fi-kbl-7500u) > > Out > > IGT-Version: 1.17-g38bffd9 (x86_64) (Linux: 4.9.0-CI-Patchwork_3338+ x86_64) > > Runtime PM support: 1 > > PC8 residency support: 0 > > Stack trace: > > #0 [__igt_fail_assert+0x101] > > #1 [main+0x2514] > > #2 [__libc_start_main+0xf0] > > #3 [_start+0x29] > > #4 [+0x29] > > Subtest basic-rte: FAIL (10.053s) > > Err > > (pm_rpm:9532) CRITICAL: Test assertion failure function basic_subtest, file > > pm_rpm.c:705: > > (pm_rpm:9532) CRITICAL: Failed assertion: wait_for_suspended() > > Subtest basic-rte failed. > > DEBUG > > (pm_rpm:9532) CRITICAL: Test assertion failure function basic_subtest, file > > pm_rpm.c:705: > > (pm_rpm:9532) CRITICAL: Failed assertion: wait_for_suspended() > > > > Is this related to the gt.awake WARN? Looking at CI history, it seems the > > three > > tests always fail together. > No. The message is from an earlier incarnation of the module (i.e. if it > does correlates, it is a bug in module loading not sanitizing hw state), > and https://intel-gfx-ci.01.org/CI/fi-kbl-7500u.html disagrees with you. I shouldn't have said always. I was looking at that page, but only considered the fails of basic-reload-inject that had a dmesg-warn type of fail. And that is very small sample of 2. Anyway, thanks for the explanation. Ander ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gen9+: Rely on VBT DDI port info for eDP detection
There is at least one APL based system using port A in DP mode
(connecting to an on-board DP->VGA adaptor). Atm we'll configure port A
unconditionally as eDP which is incorrect in this case. Fix this by
relying on the VBT DDI port 'internal port' flag instead on all ports
GEN9 onwards. For now chicken out from doing this on earlier DDI
platforms too.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_bios.c | 1 +
drivers/gpu/drm/i915/intel_dp.c | 3 +++
3 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7e94e506..42fb7e9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1669,6 +1669,7 @@ struct ddi_vbt_port_info {
uint8_t supports_dvi:1;
uint8_t supports_hdmi:1;
uint8_t supports_dp:1;
+ uint8_t supports_edp:1;
uint8_t alternate_aux_channel;
uint8_t alternate_ddc_pin;
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 1cf2fa6..60fdd31 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1161,6 +1161,7 @@ static void parse_ddi_port(struct drm_i915_private
*dev_priv, enum port port,
info->supports_dvi = is_dvi;
info->supports_hdmi = is_hdmi;
info->supports_dp = is_dp;
+ info->supports_edp = is_edp;
DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d37cb00..7f3f4fa 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4983,6 +4983,9 @@ bool intel_dp_is_edp(struct drm_i915_private *dev_priv,
enum port port)
if (INTEL_GEN(dev_priv) < 5)
return false;
+ if (INTEL_GEN(dev_priv) >= 9)
+ return dev_priv->vbt.ddi_port_info[port].supports_edp;
+
if (port == PORT_A)
return true;
--
2.5.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 0/4] Introduce drmfs pseudo filesystem for drm subsystem
On Tue, Dec 20, 2016 at 4:44 AM, Jani Nikula wrote: > On Tue, 20 Dec 2016, Laurent Pinchart > wrote: >> Hi Swati, >> >> On Monday 19 Dec 2016 16:12:22 swati.dhin...@intel.com wrote: >>> From: Swati Dhingra >>> >>> Currently, we don't have a stable ABI which can be used for the purpose of >>> providing output debug/loggging/crc and other such data from DRM. >>> The ABI in current use (filesystems, ioctls, et al.) have their own >>> constraints and are intended to output a particular type of data. >>> Few cases in point: >>> sysfs- stable ABI, but constrained to one textual value per file >>> debugfs - unstable ABI, free-for-all >>> ioctls - not as suitable to many single purpose continuous data >>>dumping, we would very quickly run out ioctl space; requires more >>>userspace support than "cat" >>> device nodes - a real possibilty, kernel instantiation is more tricky, >>> requires udev (+udev.rules) or userspace discovery of the >>> dynamic major:minor (via sysfs) [mounting a registered >>> filesystem is easy in comparison] >>> netlink - stream based, therefore involves numerous copies. >>> >>> Debugfs is the lesser among the evils here, thereby we have grown used to >>> the convenience and flexibility in presentation that debugfs gives us >>> (including relayfs inodes) that we want some of that hierachy in stable user >>> ABI form. >> >> Seriously, why ? A subsystem growing its own file system sounds so wrong. It >> seems that you want to have all the benefits of a stable ABI without going >> through the standardization effort that this requires. I can see so many ways >> that drmfs could be abused, with drivers throwing in new data with little or >> no review. You'll need very compelling arguments to convince me. > > This is not unlike my sentiments on the first version posted > [1]. There's also the distinct feeling of [2]. Suffice it to say at this > time that I'm dubious, not convinced enough to defend this. > > Swati, please refrain from posting new versions of the patches until > there's some consensus one way or the other; it's counter-productive to > keep splitting off the discussion into several patch series threads at > this stage. Let's have the discussion here. > I'll echo Laurent's concerns here, seems like the goal is easy to merge, hard to change. I think the problem with this is that easy to merge usually leads to designs which need to change :) Secondly, I'm not sure there's value outside of i915, perhaps I'm missing use cases for other drivers. Sean > > BR, > Jani. > > > [1] 87lgw0xcf4.fsf@intel.com">http://mid.mail-archive.com/87lgw0xcf4.fsf@intel.com > [2] https://xkcd.com/927/ > >> >>> Due to these limitations, there is a need for a new pseudo filesytem, that >>> would act as a stable 'free-for-all' ABI, with the heirarchial structure and >>> thus convenience of debugfs. This will be managed by drm, thus named >>> 'drmfs'. DRM would register this filesystem to manage a canonical >>> mountpoint, but this wouldn't limit everyone to only using that pseudofs >>> underneath. >>> >>> This can serve to hold various kinds of output data from Linux DRM >>> subsystems, for the files which can't truely fit anywhere else with >>> existing ABI's but present so, for the lack of a better place. >>> >>> In this patch series, we have introduced a pseudo filesystem named as >>> 'drmfs' for now. The filesystem is introduced in the first patch, and the >>> subsequent patches make use of the filesystem interfaces, in drm driver, >>> and making them available for use by the drm subsystem components, one of >>> which is i915. We've moved the location of i915 GuC logs from debugfs to >>> drmfs in the last patch. Subsequently, more such files such as pipe_crc, >>> error states, memory stats, etc. can be move to this filesystem, if the >>> idea introduced here is acceptable per se. The filesystem introduced is >>> being used to house the data generated by i915 driver in this patch series, >>> but will hopefully be generic enough to provide scope for usage by any >>> other drm subsystem component. >>> >>> The patch series is being floated as RFC to gather feedback on the idea and >>> infrastructure proposed here and it's suitability to address the specific >>> problem statement/use case. >>> >>> v2: fix the bat failures caused due to missing config check >>> >>> v3: Changes made: >>> - Move the location of drmfs from fs/ to drivers/gpu/drm/ (Chris) >>> - Moving config checks to header (Chris,Daniel) >>> >>> v4: Added the kernel Documentaion (using Sphinx). >>> >>> Sourab Gupta (4): >>> drm: Introduce drmfs pseudo filesystem interfaces >>> drm: Register drmfs filesystem from drm init >>> drm: Create driver specific root directory inside drmfs >>> drm/i915: Creating guc log file in drmfs instead of debugfs >>> >>> Documentation/gpu/drm-uapi.rst | 76 >>> drivers/gpu/drm/Kconfig
Re: [Intel-gfx] [PATCH] drm/i915/gen9+: Rely on VBT DDI port info for eDP detection
On Tue, Dec 20, 2016 at 05:12:49PM +0200, Imre Deak wrote:
> There is at least one APL based system using port A in DP mode
> (connecting to an on-board DP->VGA adaptor). Atm we'll configure port A
> unconditionally as eDP which is incorrect in this case. Fix this by
> relying on the VBT DDI port 'internal port' flag instead on all ports
> GEN9 onwards. For now chicken out from doing this on earlier DDI
> platforms too.
>
> Signed-off-by: Imre Deak
Yeah, I think we should try to move towards using the VBT more
consistently here. Eventually we migth even want to unify everything to
using the pre-parsed port infromation, but going in babt steps is a
little less likely to regress old machines.
Reviewed-by: Ville Syrjälä
At one point when I was monkeying around with this VBT stuff Paulo
suggested that we should just use the pre-parsed stuff more, so presumably
he should be happy with this direction as well. Although I think that
specific case might have been about the DP++ stuff.
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_bios.c | 1 +
> drivers/gpu/drm/i915/intel_dp.c | 3 +++
> 3 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e94e506..42fb7e9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1669,6 +1669,7 @@ struct ddi_vbt_port_info {
> uint8_t supports_dvi:1;
> uint8_t supports_hdmi:1;
> uint8_t supports_dp:1;
> + uint8_t supports_edp:1;
>
> uint8_t alternate_aux_channel;
> uint8_t alternate_ddc_pin;
> diff --git a/drivers/gpu/drm/i915/intel_bios.c
> b/drivers/gpu/drm/i915/intel_bios.c
> index 1cf2fa6..60fdd31 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1161,6 +1161,7 @@ static void parse_ddi_port(struct drm_i915_private
> *dev_priv, enum port port,
> info->supports_dvi = is_dvi;
> info->supports_hdmi = is_hdmi;
> info->supports_dp = is_dp;
> + info->supports_edp = is_edp;
>
> DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
> port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index d37cb00..7f3f4fa 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4983,6 +4983,9 @@ bool intel_dp_is_edp(struct drm_i915_private *dev_priv,
> enum port port)
> if (INTEL_GEN(dev_priv) < 5)
> return false;
>
> + if (INTEL_GEN(dev_priv) >= 9)
> + return dev_priv->vbt.ddi_port_info[port].supports_edp;
> +
> if (port == PORT_A)
> return true;
>
> --
> 2.5.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Move the min_pixclk[] handling to the end of readout
From: Ville Syrjälä
Trying to determine the pixel rate of the pipe can't be done until we
know the clock, which means it can't be done until the encoder
.get_config() hooks have been called. So let's move the min_pixclk[]
stuff to the end of intel_modeset_readout_hw_state() when we actually
have gathered all the required infromation.
Cc: Maarten Lankhorst
Cc: Mika Kahola
Cc: Ander Conselvan de Oliveira
Fixes: 565602d7501a ("drm/i915: Do not acquire crtc state to check clock during
modeset, v4.")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index ef5dde5ab1cf..d8effd4da034 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -17033,7 +17033,6 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
for_each_intel_crtc(dev, crtc) {
struct intel_crtc_state *crtc_state = crtc->config;
- int pixclk = 0;
__drm_atomic_helper_crtc_destroy_state(&crtc_state->base);
memset(crtc_state, 0, sizeof(*crtc_state));
@@ -17045,23 +17044,9 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
crtc->base.enabled = crtc_state->base.enable;
crtc->active = crtc_state->base.active;
- if (crtc_state->base.active) {
+ if (crtc_state->base.active)
dev_priv->active_crtcs |= 1 << crtc->pipe;
- if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
- pixclk = ilk_pipe_pixel_rate(crtc_state);
- else if (IS_VALLEYVIEW(dev_priv) ||
IS_CHERRYVIEW(dev_priv))
- pixclk =
crtc_state->base.adjusted_mode.crtc_clock;
- else
- WARN_ON(dev_priv->display.modeset_calc_cdclk);
-
- /* pixel rate mustn't exceed 95% of cdclk with IPS on
BDW */
- if (IS_BROADWELL(dev_priv) && crtc_state->ips_enabled)
- pixclk = DIV_ROUND_UP(pixclk * 100, 95);
- }
-
- dev_priv->min_pixclk[crtc->pipe] = pixclk;
-
readout_plane_state(crtc);
DRM_DEBUG_KMS("[CRTC:%d:%s] hw state readout: %s\n",
@@ -17134,6 +17119,8 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
}
for_each_intel_crtc(dev, crtc) {
+ int pixclk = 0;
+
crtc->base.hwmode = crtc->config->base.adjusted_mode;
memset(&crtc->base.mode, 0, sizeof(crtc->base.mode));
@@ -17161,10 +17148,23 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
*/
crtc->base.state->mode.private_flags =
I915_MODE_FLAG_INHERITED;
+ if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
+ pixclk = ilk_pipe_pixel_rate(crtc->config);
+ else if (IS_VALLEYVIEW(dev_priv) ||
IS_CHERRYVIEW(dev_priv))
+ pixclk =
crtc->config->base.adjusted_mode.crtc_clock;
+ else
+ WARN_ON(dev_priv->display.modeset_calc_cdclk);
+
+ /* pixel rate mustn't exceed 95% of cdclk with IPS on
BDW */
+ if (IS_BROADWELL(dev_priv) && crtc->config->ips_enabled)
+ pixclk = DIV_ROUND_UP(pixclk * 100, 95);
+
drm_calc_timestamping_constants(&crtc->base,
&crtc->base.hwmode);
update_scanline_offset(crtc);
}
+ dev_priv->min_pixclk[crtc->pipe] = pixclk;
+
intel_pipe_config_sanity_check(dev_priv, crtc->config);
}
}
--
2.10.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Use the existing pages when retrying to DMA map
== Series Details == Series: drm/i915: Use the existing pages when retrying to DMA map URL : https://patchwork.freedesktop.org/series/17061/ State : failure == Summary == Series 17061v1 drm/i915: Use the existing pages when retrying to DMA map https://patchwork.freedesktop.org/api/1.0/series/17061/revisions/1/mbox/ Test drv_module_reload: Subgroup basic-reload-inject: dmesg-warn -> PASS (fi-skl-6260u) Test kms_busy: Subgroup basic-flip-default-b: pass -> INCOMPLETE (fi-bxt-j4205) Test pm_rpm: Subgroup basic-pci-d3-state: fail -> PASS (fi-skl-6260u) Subgroup basic-rte: fail -> PASS (fi-skl-6260u) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:170 pass:156 dwarn:0 dfail:0 fail:0 skip:13 fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 7285204135ffcf095bea64196db6ef900d47e048 drm-tip: 2016y-12m-20d-14h-50m-18s UTC integration manifest d4c3b77 drm/i915: Use the existing pages when retrying to DMA map == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3342/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/gen9+: Rely on VBT DDI port info for eDP detection
On Tue, Dec 20, 2016 at 05:12:49PM +0200, Imre Deak wrote:
> There is at least one APL based system using port A in DP mode
> (connecting to an on-board DP->VGA adaptor). Atm we'll configure port A
> unconditionally as eDP which is incorrect in this case. Fix this by
> relying on the VBT DDI port 'internal port' flag instead on all ports
> GEN9 onwards. For now chicken out from doing this on earlier DDI
> platforms too.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_bios.c | 1 +
> drivers/gpu/drm/i915/intel_dp.c | 3 +++
> 3 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e94e506..42fb7e9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1669,6 +1669,7 @@ struct ddi_vbt_port_info {
> uint8_t supports_dvi:1;
> uint8_t supports_hdmi:1;
> uint8_t supports_dp:1;
> + uint8_t supports_edp:1;
>
> uint8_t alternate_aux_channel;
> uint8_t alternate_ddc_pin;
> diff --git a/drivers/gpu/drm/i915/intel_bios.c
> b/drivers/gpu/drm/i915/intel_bios.c
> index 1cf2fa6..60fdd31 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1161,6 +1161,7 @@ static void parse_ddi_port(struct drm_i915_private
> *dev_priv, enum port port,
> info->supports_dvi = is_dvi;
> info->supports_hdmi = is_hdmi;
> info->supports_dp = is_dp;
> + info->supports_edp = is_edp;
>
> DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
> port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index d37cb00..7f3f4fa 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4983,6 +4983,9 @@ bool intel_dp_is_edp(struct drm_i915_private *dev_priv,
> enum port port)
> if (INTEL_GEN(dev_priv) < 5)
> return false;
>
> + if (INTEL_GEN(dev_priv) >= 9)
> + return dev_priv->vbt.ddi_port_info[port].supports_edp;
> +
We already have intel_bios_is_port_edp() that tries to
discern whether the port is eDP or not.
Wouldn't that function be usable for this purpose?
If so, doing:
if (port == PORT_A && INTEL_GEN(dev_priv) < 9)
return true;
return intel_bios_is_port_edp(dev_priv, port);
should be enough. If not, maybe it should be fixed instead of
introducing a new way of doing things.
> if (port == PORT_A)
> return true;
Kind regards, David
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with drm/i915: Use drm_connector_list_iter in debugfs (rev3)
== Series Details == Series: series starting with drm/i915: Use drm_connector_list_iter in debugfs (rev3) URL : https://patchwork.freedesktop.org/series/16979/ State : warning == Summary == Series 16979v3 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/16979/revisions/3/mbox/ Test drv_module_reload: Subgroup basic-reload: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) Subgroup basic-reload-inject: pass -> DMESG-WARN (fi-snb-2520m) dmesg-warn -> PASS (fi-skl-6260u) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) Test kms_busy: Subgroup basic-flip-default-a: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-default-b: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-default-c: pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-skl-6700k) Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-legacy: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-busy-flip-before-cursor-varying-size: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-after-cursor-legacy: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-after-cursor-varying-size: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-before-cursor-legacy: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-before-cursor-varying-size: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Test kms_flip: Subgroup basic-flip-vs-dpms: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-vs-modeset: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-ivb-3520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-flip-vs-wf_vblank: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup basic-plain-flip: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Test kms_force_connector_basic: Subgroup force-connector-state: pass -> DMESG-WARN (fi-snb-2520m) Subgroup force-load-detect: pass -> DMESG-WARN (fi-snb-2520m) Test kms_frontbuffer_tracking: Subgroup basic: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-skl-6700k) Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-a: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup hang-read-crc-pipe-b: pass -> DMESG-WARN (fi-snb-2520m) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-ilk-650) pass -> DMESG-WARN (fi-skl-6700k) Subgroup hang-read-crc-pipe-c: pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-skl-6700k) Subgroup n
Re: [Intel-gfx] [PATCH] drm/i915/gen9+: Rely on VBT DDI port info for eDP detection
On ti, 2016-12-20 at 18:02 +0200, David Weinehall wrote:
> On Tue, Dec 20, 2016 at 05:12:49PM +0200, Imre Deak wrote:
> > There is at least one APL based system using port A in DP mode
> > (connecting to an on-board DP->VGA adaptor). Atm we'll configure port A
> > unconditionally as eDP which is incorrect in this case. Fix this by
> > relying on the VBT DDI port 'internal port' flag instead on all ports
> > GEN9 onwards. For now chicken out from doing this on earlier DDI
> > platforms too.
> >
> > Signed-off-by: Imre Deak
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_bios.c | 1 +
> > drivers/gpu/drm/i915/intel_dp.c | 3 +++
> > 3 files changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 7e94e506..42fb7e9 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1669,6 +1669,7 @@ struct ddi_vbt_port_info {
> > uint8_t supports_dvi:1;
> > uint8_t supports_hdmi:1;
> > uint8_t supports_dp:1;
> > + uint8_t supports_edp:1;
> >
> > uint8_t alternate_aux_channel;
> > uint8_t alternate_ddc_pin;
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c
> > b/drivers/gpu/drm/i915/intel_bios.c
> > index 1cf2fa6..60fdd31 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -1161,6 +1161,7 @@ static void parse_ddi_port(struct drm_i915_private
> > *dev_priv, enum port port,
> > info->supports_dvi = is_dvi;
> > info->supports_hdmi = is_hdmi;
> > info->supports_dp = is_dp;
> > + info->supports_edp = is_edp;
> >
> > DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
> > port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index d37cb00..7f3f4fa 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -4983,6 +4983,9 @@ bool intel_dp_is_edp(struct drm_i915_private
> > *dev_priv, enum port port)
> > if (INTEL_GEN(dev_priv) < 5)
> > return false;
> >
> > + if (INTEL_GEN(dev_priv) >= 9)
> > + return dev_priv->vbt.ddi_port_info[port].supports_edp;
> > +
>
> We already have intel_bios_is_port_edp() that tries to
> discern whether the port is eDP or not.
>
> Wouldn't that function be usable for this purpose?
>
> If so, doing:
>
> if (port == PORT_A && INTEL_GEN(dev_priv) < 9)
> return true;
>
> return intel_bios_is_port_edp(dev_priv, port);
>
> should be enough. If not, maybe it should be fixed instead of
> introducing a new way of doing things.
intel_bios_is_port_edp() does on old platforms what parse_ddi_port()
for DDI platforms. I find it clearer to have all the platform checks in
one place in intel_dp_is_edp() to decide which info to use.
We could move the parsing in intel_bios_is_port_edp() to happen during
the early VBT parsing on old platforms and use the DDI port info for
those too not sure if it's feasible or if it's worth the effort.
--Imre
>
> > if (port == PORT_A)
> > return true;
>
>
> Kind regards, David
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,01/38] drm/i915: Use the MRU stack search after evicting (rev6)
== Series Details == Series: series starting with [v3,01/38] drm/i915: Use the MRU stack search after evicting (rev6) URL : https://patchwork.freedesktop.org/series/16934/ State : success == Summary == Series 16934v6 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/16934/revisions/6/mbox/ Test drv_module_reload: Subgroup basic-reload-inject: dmesg-warn -> PASS (fi-skl-6260u) Test pm_rpm: Subgroup basic-pci-d3-state: fail -> PASS (fi-skl-6260u) Subgroup basic-rte: fail -> PASS (fi-skl-6260u) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 7285204135ffcf095bea64196db6ef900d47e048 drm-tip: 2016y-12m-20d-14h-50m-18s UTC integration manifest f647118 drm: kselftest for drm_mm and bottom-up allocation 457bcc3 drm: Improve drm_mm search (and fix topdown allocation) with rbtrees 98992f9 drm: Use drm_mm_insert_node_in_range_generic() for everyone 37836f0 drm: Apply range restriction after color adjustment when allocation f9da855 drm: Wrap drm_mm_node.hole_follows 328c23a drm: Apply tight eviction scanning to color_adjust 9ea0bd0 drm: Simplify drm_mm scan-list manipulation 017761c drm: Optimise power-of-two alignments in drm_mm_scan_add_block() 6d874e1 drm: Compute tight evictions for drm_mm_scan 1d16722 drm: Fix application of color vs range restriction when scanning drm_mm ff0ea90 drm: Unconditionally do the range check in drm_mm_scan_add_block() abe5592 drm: Rename prev_node to hole in drm_mm_scan_add_block() fe3ad32 drm: Extract struct drm_mm_scan from struct drm_mm 7c2a427 drm: Add asserts to catch overflow in drm_mm_init() and drm_mm_init_scan() 5f413fd drm: Simplify drm_mm_clean() a6125ad drm: Detect overflow in drm_mm_reserve_node() 7121791 drm: Fix kerneldoc for drm_mm_scan_remove_block() 3071d25 drm: Promote drm_mm alignment to u64 373c154 drm/i915: Build DRM range manager selftests for CI 762f6bf drm: kselftest for drm_mm and restricted color eviction 52a9e87 drm: kselftest for drm_mm and color eviction 5398b2b drm: kselftest for drm_mm and color adjustment 19f9d04 drm: kselftest for drm_mm and top-down allocation b61ae82 drm: kselftest for drm_mm and range restricted eviction fc01f52 drm: kselftest for drm_mm and eviction 1bc5dc1 drm: kselftest for drm_mm and alignment 7d7daa4 drm: kselftest for drm_mm_insert_node_in_range() 1fef227 drm: kselftest for drm_mm_replace_node() 962f7eb drm: kselftest for drm_mm_insert_node() ca0de06 drm: kselftest for drm_mm_reserve_node() 4bf0b3a drm: kselftest for drm_mm_debug() f9a6476f drm: kselftest for drm_mm_init() 7a934bc drm: Add some kselftests for the DRM range manager (struct drm_mm) 2563cec drm: Add a simple generator of random permutations f5d7bf1 lib: Add a simple prime number generator 50c78e1 drm: Compile time enabling for asserts in drm_mm cc78309 drm: Use drm_mm_nodes() as shorthand for the list of nodes under struct drm_mm 87a1493 drm/i915: Use the MRU stack search after evicting == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3344/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Force VDD off on the new power seqeuencer before starting to use it
From: Ville Syrjälä
Apparently some VLV BIOSen like to leave the VDD force bit enabled
even for power seqeuncers that aren't properly hooked up to any
port. That will result in a imbalance in the AUX power domain
refcount when we stat to use said power sequencer as edp_panel_vdd_on()
will not grab the power domain reference if it sees that the VDD is
already on.
To fix this let's make sure we turn off the VDD force bit when we
initialize the power sequencer registers. That is, unless it's
being done from the init path since there we are actually
initializing the registers for the current power sequencer and
we don't want to turn VDD off needlessly as that would require
waiting for the power cycle delay before we turn it back on.
This fixes the following kind of warnings:
WARNING: CPU: 0 PID: 123 at ../drivers/gpu/drm/i915/intel_runtime_pm.c:1455
intel_display_power_put+0x13a/0x170 [i915]()
WARN_ON(!power_domains->domain_use_count[domain])
...
Cc: sta...@vger.kernel.org
Cc: Matwey V. Kornilov
Tested-by: Matwey V. Kornilov
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98695
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 42 ++---
1 file changed, 35 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 66b5bc80b781..4139122704b3 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -383,7 +383,8 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
struct intel_dp *intel_dp);
static void
intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
- struct intel_dp *intel_dp);
+ struct intel_dp *intel_dp,
+ bool force_disable_vdd);
static void
intel_dp_pps_init(struct drm_device *dev, struct intel_dp *intel_dp);
@@ -567,7 +568,7 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
/* init power sequencer on this pipe and port */
intel_dp_init_panel_power_sequencer(dev, intel_dp);
- intel_dp_init_panel_power_sequencer_registers(dev, intel_dp);
+ intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, true);
/*
* Even vdd force doesn't work until we've made
@@ -604,7 +605,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
* Only the HW needs to be reprogrammed, the SW state is fixed and
* has been setup during connector init.
*/
- intel_dp_init_panel_power_sequencer_registers(dev, intel_dp);
+ intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false);
return 0;
}
@@ -687,7 +688,7 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
port_name(port), pipe_name(intel_dp->pps_pipe));
intel_dp_init_panel_power_sequencer(dev, intel_dp);
- intel_dp_init_panel_power_sequencer_registers(dev, intel_dp);
+ intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, false);
}
void intel_power_sequencer_reset(struct drm_i915_private *dev_priv)
@@ -2981,7 +2982,7 @@ static void vlv_init_panel_power_sequencer(struct
intel_dp *intel_dp)
/* init power sequencer on this pipe and port */
intel_dp_init_panel_power_sequencer(dev, intel_dp);
- intel_dp_init_panel_power_sequencer_registers(dev, intel_dp);
+ intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, true);
}
static void vlv_pre_enable_dp(struct intel_encoder *encoder,
@@ -5152,7 +5153,8 @@ intel_dp_init_panel_power_sequencer(struct drm_device
*dev,
static void
intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
- struct intel_dp *intel_dp)
+ struct intel_dp *intel_dp,
+ bool force_disable_vdd)
{
struct drm_i915_private *dev_priv = to_i915(dev);
u32 pp_on, pp_off, pp_div, port_sel = 0;
@@ -5165,6 +5167,32 @@ intel_dp_init_panel_power_sequencer_registers(struct
drm_device *dev,
intel_pps_get_registers(dev_priv, intel_dp, ®s);
+ /*
+* One some VLV machines the BIOS can leave the VDD
+* enabled even on power seqeuencers which aren't
+* even hooked up to any port. This would mess up
+* the power domain tracking the first time we pick
+* one of these power sequencers for use since
+* edp_panel_vdd_on() would notice that the VDD was
+* already on and therefore wouldn't even grab the
+* power domain reference. Disable VDD first to avoid
+* this. This also avoids spuriously turning the VDD
+* on as soon as the new power seqeuencer gets
+* initialized.
+*/
+ if (force_disable_vdd) {
+ u32 pp = ironlake_get_pp
Re: [Intel-gfx] i915 regression in kernel 4.10
On Tue, Dec 20, 2016 at 09:42:46AM -0500, Konrad Rzeszutek Wilk wrote:
> On Mon, Dec 19, 2016 at 03:16:44PM +0100, Juergen Gross wrote:
> > On 19/12/16 13:29, Chris Wilson wrote:
> > > On Mon, Dec 19, 2016 at 12:39:16PM +0100, Juergen Gross wrote:
> > >> With recent 4.10 kernel the graphics isn't coming up under Xen. First
> > >> failure message is:
> > >>
> > >> [ 46.656649] i915 :00:02.0: swiotlb buffer is full (sz: 1630208
> > >> bytes)
> > >
> > > Do we get a silent failure? i915_gem_gtt_prepare_pages() is where we
> > > call dma_map_sg() and pass the sg to swiotlb (in this case) for
> > > remapping, and we do check for an error value of 0. After that error,
> > > SWIOTLB_MAP_ERROR is propagated back and converted to 0 for
> > > dma_map_sg(). That looks valid, and we should report ENOMEM back to the
> > > caller.
> > >
> > >> Later I see splats like:
> > >>
> > >> [ 49.393583] general protection fault: [#1] SMP
> > >
> > > What was the faulting address? RAX is particularly non-pointer-like so I
> > > wonder if we walked onto an uninitialised portion of the sgtable. We may
> > > have tripped over a bug in our sg_page iterator.
> >
> > During the bisect process there have been either GP or NULL pointer
> > dereferences or other page faults. Typical addresses where:
> >
> > xen_swiotlb_unmap_sg_attrs+0x1f/0x50: access to 0018
> > xen_swiotlb_unmap_sg_attrs+0x1f/0x50: access to 03020118
> >
> > >
> > > The attached patch should prevent an early ENOMEM following the swiotlb
> > > allocation failure. But I suspect that we will still be tripping up the
> > > failure in the sg walker when binding to the GPU.
> > > -Chris
> > >
> >
> > The patch is working not too bad. :-)
> >
> > Still several "swiotlb buffer is full" messages (some with sz:, most
> > without), but no faults any more (neither GP nor NULL pointer
> > dereference). Graphical login is working now.
>
>
> I think I know why. The optimization that was added assumes that
> bus addresses is the same as physical address. Hence it packs all
> of the virtual addresses in the sg, and hands it off to SWIOTLB
> which walks each one and realizes that it has to use the bounce
> buffer.
>
> I am wondering if would make sense to pull 'swiotlb_max_size' inside
> of SWIOTLB and make it an library-ish - so Xen-SWIOTLB can register
> as well and report say that it can only provide one page
> (unless it is running under baremtal).
>
> Or make the usage of 'max_segement' and 'page_to_pfn(page) != last_pfn + 1'
> in i915_gem_object_Get_pages_gtt use something similar to
> xen_biovec_phys_mergeable?
Chris,
I was thinking of something like this (which Juergen has already tested).
From f196f1294fd25f1402c3dd1231babb8d7f5db2e7 Mon Sep 17 00:00:00 2001
From: Konrad Rzeszutek Wilk
Date: Tue, 20 Dec 2016 10:02:02 -0500
Subject: [PATCH] swiotlb: Export swiotlb_max_segment to users
So they can figure out what is the optimal number of pages
that can be contingously stitched together without fear of
bounce buffer.
We also expose an mechanism for sub-users of SWIOTLB API, such
as Xen-SWIOTLB to set the max segment value. And lastly
if swiotlb=force is set (which mandates we bounce buffer everything)
we set max_segment so at least we can bounce buffer one 4K page
instead of a giant 512KB one for which we may not have space.
Reported-and-Tested-by: Juergen Gross
Signed-off-by: Konrad Rzeszutek Wilk
---
drivers/gpu/drm/i915/i915_gem.c | 11 +--
drivers/xen/swiotlb-xen.c | 4
include/linux/swiotlb.h | 3 +++
lib/swiotlb.c | 26 ++
4 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d0dcaf3..115fa39 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2290,15 +2290,6 @@ void __i915_gem_object_put_pages(struct
drm_i915_gem_object *obj,
mutex_unlock(&obj->mm.lock);
}
-static unsigned int swiotlb_max_size(void)
-{
-#if IS_ENABLED(CONFIG_SWIOTLB)
- return rounddown(swiotlb_nr_tbl() << IO_TLB_SHIFT, PAGE_SIZE);
-#else
- return 0;
-#endif
-}
-
static void i915_sg_trim(struct sg_table *orig_st)
{
struct sg_table new_st;
@@ -2345,7 +2336,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object
*obj)
GEM_BUG_ON(obj->base.read_domains & I915_GEM_GPU_DOMAINS);
GEM_BUG_ON(obj->base.write_domain & I915_GEM_GPU_DOMAINS);
- max_segment = swiotlb_max_size();
+ max_segment = swiotlb_max_segment();
if (!max_segment)
max_segment = rounddown(UINT_MAX, PAGE_SIZE);
diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c
index aba1200..f905d6e 100644
--- a/drivers/xen/swiotlb-xen.c
+++ b/drivers/xen/swiotlb-xen.c
@@ -275,6 +275,10 @@ int __ref xen_swiotlb_init(int verbose, bool early)
rc = 0;
} else
rc = swiotlb_late_
Re: [Intel-gfx] [PATCH] drm/i915/guc: Make intel_guc_recv static.
On 20/12/2016 11:55, Michal Wajdeczko wrote:
This function is only used by intel_guc_send() and it doesn't
need to be exposed outside of intel_uc.o file. Also when defined
as static, compiler will generate smaller code. Additionally let
it take guc param instead dev_priv to match function name.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Arkadiusz Hiler
---
drivers/gpu/drm/i915/intel_uc.c | 8 +---
drivers/gpu/drm/i915/intel_uc.h | 1 -
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 8ae6795..c6be352 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -34,8 +34,10 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
* Read GuC command/status register (SOFT_SCRATCH_0)
* Return true if it contains a response rather than a command
*/
-bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status)
+static bool intel_guc_recv(struct intel_guc *guc, u32 *status)
{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
u32 val = I915_READ(SOFT_SCRATCH(0));
*status = val;
return INTEL_GUC_RECV_IS_RESPONSE(val);
@@ -69,9 +71,9 @@ int intel_guc_send(struct intel_guc *guc, const u32 *action,
u32 len)
* up to that length of time, then switch to a slower sleep-wait loop.
* No inte_guc_send command should ever take longer than 10ms.
*/
- ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10);
+ ret = wait_for_us(intel_guc_recv(guc, &status), 10);
if (ret)
- ret = wait_for(intel_guc_recv(dev_priv, &status), 10);
+ ret = wait_for(intel_guc_recv(guc, &status), 10);
if (status != INTEL_GUC_STATUS_SUCCESS) {
/*
* Either the GuC explicitly returned an error (which
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 11f5608..406b06a 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -170,7 +170,6 @@ struct intel_guc {
/* intel_uc.c */
void intel_uc_init_early(struct drm_i915_private *dev_priv);
-bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status);
int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len);
int intel_guc_sample_forcewake(struct intel_guc *guc);
int intel_guc_log_flush_complete(struct intel_guc *guc);
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Rely on VBT DDI port info for eDP detection
== Series Details == Series: drm/i915/gen9+: Rely on VBT DDI port info for eDP detection URL : https://patchwork.freedesktop.org/series/17063/ State : warning == Summary == Series 17063v1 drm/i915/gen9+: Rely on VBT DDI port info for eDP detection https://patchwork.freedesktop.org/api/1.0/series/17063/revisions/1/mbox/ Test kms_frontbuffer_tracking: Subgroup basic: dmesg-warn -> PASS (fi-bxt-j4205) Test pm_backlight: Subgroup basic-brightness: pass -> SKIP (fi-bxt-j4205) pass -> SKIP (fi-skl-6700k) fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:223 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 6096aee14ea52e3163729129ee7362e56ff3efb9 drm-tip: 2016y-12m-20d-16h-33m-17s UTC integration manifest 9cbd9f1 drm/i915/gen9+: Rely on VBT DDI port info for eDP detection == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3345/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/bxt: add bxt dsi gpio element support
On Tue, 13 Dec 2016 16:11:20 +0200
Jani Nikula wrote:
> On Mon, 05 Dec 2016, Mika Kahola wrote:
> > From: Jani Nikula
> >
> > Request the GPIO by index through the consumer API. For now, use a quick
> > hack to store the already requested ones, simply because I have no idea
> > whether this actually works or not, and I have no way to test it.
> >
> > v2: switch *NULL* to *"panel"* when requesting gpio for MIPI/DSI panel.
> > (Mika)
> >
Jani, Mika,
I'm working on getting a dual-link MIPI panel working on BXT and have a
problem getting the proper GPIO pins set. This patch gets things
closer, but at least for the platform I'm working on, there's one GPIO
pin (backlight/panel control) that doesn't seem to be available via the
consumer API. If I use the alternate#2 method that Jani posted
(legacy GPIO API) along with the proper defines I can set this pin. I'm
using:
#define BXT_PANEL1_VDDEN_PIN 196
#define BXT_PANEL1_BKLTEN_PIN 197
#define BXT_PANEL1_BKLTCTL_PIN 198
#define BXT_PANEL1_VDDEN_OFFSET366
#define BXT_PANEL1_BKLTEN_OFFSET 367
#define BXT_PANEL1_BKLTCTL_OFFSET 368
to create my GPIO table.
These three pins need to be set VDDEN, BKLTCTL, BKLTEN, in that order
to get the panel to turn on.
For testing, I have a call in the vbt_panel_prepare() to set the pin
and one in vbt_panel_unprepare() to clear it. That works but that
doesn't seem like the right solution. I was wondering if either of you
have any insights?
Bob
> > Signed-off-by: Jani Nikula
> > Signed-off-by: Mika Kahola
>
> Pushed to dinq.
>
> BR,
> Jani.
>
> > ---
> > drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 38
> > +-
> > 1 file changed, 32 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> > b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> > index 0d8ff00..dda678b 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> > @@ -29,6 +29,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -304,19 +305,44 @@ static void chv_exec_gpio(struct drm_i915_private
> > *dev_priv,
> > mutex_unlock(&dev_priv->sb_lock);
> > }
> >
> > +static void bxt_exec_gpio(struct drm_i915_private *dev_priv,
> > + u8 gpio_source, u8 gpio_index, bool value)
> > +{
> > + /* XXX: this table is a quick ugly hack. */
> > + static struct gpio_desc *bxt_gpio_table[U8_MAX + 1];
> > + struct gpio_desc *gpio_desc = bxt_gpio_table[gpio_index];
> > +
> > + if (!gpio_desc) {
> > + gpio_desc = devm_gpiod_get_index(dev_priv->drm.dev,
> > +"panel", gpio_index,
> > +value ? GPIOD_OUT_LOW :
> > +GPIOD_OUT_HIGH);
> > +
> > + if (IS_ERR_OR_NULL(gpio_desc)) {
> > + DRM_ERROR("GPIO index %u request failed (%ld)\n",
> > + gpio_index, PTR_ERR(gpio_desc));
> > + return;
> > + }
> > +
> > + bxt_gpio_table[gpio_index] = gpio_desc;
> > + }
> > +
> > + gpiod_set_value(gpio_desc, value);
> > +}
> > +
> > static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8
> > *data)
> > {
> > struct drm_device *dev = intel_dsi->base.base.dev;
> > struct drm_i915_private *dev_priv = to_i915(dev);
> > - u8 gpio_source, gpio_index;
> > + u8 gpio_source, gpio_index = 0, gpio_number;
> > bool value;
> >
> > DRM_DEBUG_KMS("\n");
> >
> > if (dev_priv->vbt.dsi.seq_version >= 3)
> > - data++;
> > + gpio_index = *data++;
> >
> > - gpio_index = *data++;
> > + gpio_number = *data++;
> >
> > /* gpio source in sequence v2 only */
> > if (dev_priv->vbt.dsi.seq_version == 2)
> > @@ -328,11 +354,11 @@ static const u8 *mipi_exec_gpio(struct intel_dsi
> > *intel_dsi, const u8 *data)
> > value = *data++ & 1;
> >
> > if (IS_VALLEYVIEW(dev_priv))
> > - vlv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
> > + vlv_exec_gpio(dev_priv, gpio_source, gpio_number, value);
> > else if (IS_CHERRYVIEW(dev_priv))
> > - chv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
> > + chv_exec_gpio(dev_priv, gpio_source, gpio_number, value);
> > else
> > - DRM_DEBUG_KMS("GPIO element not supported on this platform\n");
> > + bxt_exec_gpio(dev_priv, gpio_source, gpio_index, value);
> >
> > return data;
> > }
>
--
--
Bob Paauwe
bob.j.paa...@intel.com
IOTG / PED Software Organization
Intel Corp. Folsom, CA
(916) 356-6193
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Move the min_pixclk[] handling to the end of readout
== Series Details == Series: drm/i915: Move the min_pixclk[] handling to the end of readout URL : https://patchwork.freedesktop.org/series/17064/ State : success == Summary == Series 17064v1 drm/i915: Move the min_pixclk[] handling to the end of readout https://patchwork.freedesktop.org/api/1.0/series/17064/revisions/1/mbox/ fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 6096aee14ea52e3163729129ee7362e56ff3efb9 drm-tip: 2016y-12m-20d-16h-33m-17s UTC integration manifest cde8f24 drm/i915: Move the min_pixclk[] handling to the end of readout == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3346/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: use for_each_intel_connector_iter in intel_display.c
On Mon, Dec 19, 2016 at 10:47:25AM +0100, Maarten Lankhorst wrote: > Op 19-12-16 om 10:22 schreef Daniel Vetter: > > On Mon, Dec 19, 2016 at 09:58:28AM +0100, Daniel Vetter wrote: > >> This gets rid of the last users of for_each_intel_connector(), remove > >> that too. > >> > >> The one exception is the loop in verify_encoder_state - that needs to > >> switch over to for_each_connector_in_state. > >> > >> v2: Maarten corrected me that in the state verifier we indeed must > >> only walk connectors in the atomic commit, not all of them! > > Ok, CI just told me this was a stupid idea. Since we don't walk all > > connectors, but still walk all encoders there's not plenty of state > > mismatches (e.g. if you have 2 crtc with different connectors enabled and > > you're doing a modeset on just one). > > > > Not exactly sure how to best fix this, since replacing the encoder > > walking with a connnector walking and then dereferencing > > connector->state->best_encoder to get at only the encoders relevant for us > > defeats the point of the cross check. > Assuming we trust the atomic state, we could fix this by iterating either > state and ORing (old,new)_crtc_state->encoder_mask. > This way we'll have all encoders that we care about. Yeah, I think we have to rely on the correctness of the atomic states. For merging I think it's better to get v1 in to correct the connector_list enumeration, then fix up the encoder checking in a separate patch on top. Does that sound good? -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Force VDD off on the new power seqeuencer before starting to use it
== Series Details == Series: drm/i915: Force VDD off on the new power seqeuencer before starting to use it URL : https://patchwork.freedesktop.org/series/17068/ State : success == Summary == Series 17068v1 drm/i915: Force VDD off on the new power seqeuencer before starting to use it https://patchwork.freedesktop.org/api/1.0/series/17068/revisions/1/mbox/ fi-bdw-5557u total:247 pass:233 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:247 pass:208 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:247 pass:225 dwarn:1 dfail:0 fail:0 skip:21 fi-bxt-t5700 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-j1900 total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:247 pass:228 dwarn:0 dfail:0 fail:0 skip:19 fi-ilk-650 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52 fi-ivb-3520m total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:247 pass:226 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:247 pass:227 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:247 pass:224 dwarn:3 dfail:0 fail:0 skip:20 fi-skl-6770hqtotal:247 pass:234 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:247 pass:216 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:247 pass:215 dwarn:0 dfail:0 fail:0 skip:32 6096aee14ea52e3163729129ee7362e56ff3efb9 drm-tip: 2016y-12m-20d-16h-33m-17s UTC integration manifest 42e3f84 drm/i915: Force VDD off on the new power seqeuencer before starting to use it == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3347/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect
On Tue, 2016-12-20 at 10:08 +0200, Jani Nikula wrote:
> On Tue, 20 Dec 2016, Dhinakaran Pandiyan
> wrote:
> > From: "Navare, Manasi D"
> >
> > The detect_done flag was introduced in the 'commit 7d23e3c37bb3
> > ("drm/i915: Cleaning up intel_dp_hpd_pulse")' in order to avoid multiple
> > detects on hotplug where intel_dp_long_pulse() was called from HPD handler
> > as well as intel_dp_detect(). Later, 'commit 1015811609c0
> > ("drm/i915: Move long hpd handling into the hotplug work")' deferred long
> > hpd handling to hotplug work to avoid handling it twice. But, resetting the
> > flag after long hpd handling leads to the code being executed again during
> > mode enumeration.
> >
> > So, do not reset the detect_done flag to false in intel_dp_detect. The flag
> > is reset in intel_dp_hpd_pulse to allow a full detect and set when the
> > hotplug work does a full DPCD detect. However if .detect() gets called
> > during enumeration we return the cached status.
> >
> > v2:
> > Allow full detect after encoder reset. (Ville)
> > Set the detect_done even connector if disconnected (DK)
> > Commit message changes.
> >
>
> Fixes: ?
>
There have been too many changes here, I don't know which commit to
really blame. Most likely
Fixes: commit 7d23e3c37bb3 ("drm/i915: Cleaning up intel_dp_hpd_pulse")
-DK
> > Cc: Ville Syrjala
> > Cc: Daniel Vetter
> > Cc: Jani Nikula
> > Signed-off-by: Manasi Navare
> > Signed-off-by: Dhinakaran Pandiyan
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 9 +
> > 1 file changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 45ebc96..5689cf3 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -4473,7 +4473,6 @@ intel_dp_long_pulse(struct intel_connector
> > *intel_connector)
> > intel_dp_set_edid(intel_dp);
> > if (is_edp(intel_dp) || intel_connector->detect_edid)
> > status = connector_status_connected;
> > - intel_dp->detect_done = true;
> >
> > /* Try to read the source of the interrupt */
> > if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
> > @@ -4508,10 +4507,10 @@ intel_dp_detect(struct drm_connector *connector,
> > bool force)
> > connector->base.id, connector->name);
> >
> > /* If full detect is not performed yet, do a full detect */
> > - if (!intel_dp->detect_done)
> > + if (!intel_dp->detect_done) {
> > + intel_dp->detect_done = true;
> > status = intel_dp_long_pulse(intel_dp->attached_connector);
> > -
> > - intel_dp->detect_done = false;
> > + }
> >
> > return status;
> > }
> > @@ -4803,6 +4802,8 @@ void intel_dp_encoder_reset(struct drm_encoder
> > *encoder)
> > if (lspcon->active)
> > lspcon_resume(lspcon);
> >
> > + intel_dp->detect_done = false;
> > +
> > if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP)
> > return;
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/5] drm/i915/guc: Introduce intel_uc_init()
>-Original Message-
>From: Hiler, Arkadiusz
>Sent: Thursday, December 15, 2016 7:47 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Srivatsa, Anusha ; Mcgee, Jeff
>; Winiarski, Michal
>Subject: [PATCH 2/5] drm/i915/guc: Introduce intel_uc_init()
>
>We will be able to bulk call all firmware _init() function from single point
>and
>offset some general logic there.
Following this logic shouldn't we call intel_huc_init() as well?
Anusha
>Cc: Anusha Srivatsa
>Cc: Jeff McGee
>Cc: Michal Winiarski
>Signed-off-by: Arkadiusz Hiler
>---
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/intel_uc.c | 5 + drivers/gpu/drm/i915/intel_uc.h |
> 1 +
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>index 6428588..55a5546c 100644
>--- a/drivers/gpu/drm/i915/i915_drv.c
>+++ b/drivers/gpu/drm/i915/i915_drv.c
>@@ -600,7 +600,7 @@ static int i915_load_modeset_init(struct drm_device
>*dev)
> if (ret)
> goto cleanup_irq;
>
>- intel_guc_init(dev_priv);
>+ intel_uc_init(dev_priv);
>
> ret = i915_gem_init(dev_priv);
> if (ret)
>diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
>index 8ae6795..8eec035 100644
>--- a/drivers/gpu/drm/i915/intel_uc.c
>+++ b/drivers/gpu/drm/i915/intel_uc.c
>@@ -30,6 +30,11 @@ void intel_uc_init_early(struct drm_i915_private
>*dev_priv)
> mutex_init(&dev_priv->guc.send_mutex);
> }
>
>+void intel_uc_init(struct drm_i915_private *dev_priv) {
>+ intel_guc_init(dev_priv);
>+}
>+
> /*
> * Read GuC command/status register (SOFT_SCRATCH_0)
> * Return true if it contains a response rather than a command diff --git
>a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index
>7222e6c..ec1a5b2 100644
>--- a/drivers/gpu/drm/i915/intel_uc.h
>+++ b/drivers/gpu/drm/i915/intel_uc.h
>@@ -170,6 +170,7 @@ struct intel_guc {
>
> /* intel_uc.c */
> void intel_uc_init_early(struct drm_i915_private *dev_priv);
>+void intel_uc_init(struct drm_i915_private *dev_priv);
> bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status); int
>intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len); int
>intel_guc_sample_forcewake(struct intel_guc *guc);
>--
>2.9.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 1/2] drm: Create new structure for HDMI info
Hi Shashank,
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.9 next-20161220]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Shashank-Sharma/drm-Create-new-structure-for-HDMI-info/20161221-065128
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: x86_64-randconfig-i0-201651 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
In file included from include/uapi/linux/stddef.h:1:0,
from include/linux/stddef.h:4,
from include/uapi/linux/posix_types.h:4,
from include/uapi/linux/types.h:13,
from include/linux/types.h:5,
from include/linux/list.h:4,
from include/linux/agp_backend.h:33,
from include/drm/drmP.h:35,
from drivers/gpu/drm/radeon/radeon_connectors.c:26:
drivers/gpu/drm/radeon/radeon_connectors.c: In function
'radeon_get_monitor_bpc':
>> drivers/gpu/drm/radeon/radeon_connectors.c:213:33: error: 'struct
>> drm_display_info' has no member named 'edid_hdmi_dc_modes'
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
&&
^
include/linux/compiler.h:149:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^
drivers/gpu/drm/radeon/radeon_connectors.c:213:5: note: in expansion of
macro 'if'
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
&&
^
>> drivers/gpu/drm/radeon/radeon_connectors.c:213:33: error: 'struct
>> drm_display_info' has no member named 'edid_hdmi_dc_modes'
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
&&
^
include/linux/compiler.h:149:42: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^
drivers/gpu/drm/radeon/radeon_connectors.c:213:5: note: in expansion of
macro 'if'
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
&&
^
>> drivers/gpu/drm/radeon/radeon_connectors.c:213:33: error: 'struct
>> drm_display_info' has no member named 'edid_hdmi_dc_modes'
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
&&
^
include/linux/compiler.h:160:16: note: in definition of macro '__trace_if'
__r = !!(cond); \
^
drivers/gpu/drm/radeon/radeon_connectors.c:213:5: note: in expansion of
macro 'if'
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
&&
^
vim +213 drivers/gpu/drm/radeon/radeon_connectors.c
771fe6b9 Jerome Glisse 2009-06-05 20 * ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR
771fe6b9 Jerome Glisse 2009-06-05 21 * OTHER DEALINGS IN THE
SOFTWARE.
771fe6b9 Jerome Glisse 2009-06-05 22 *
771fe6b9 Jerome Glisse 2009-06-05 23 * Authors: Dave Airlie
771fe6b9 Jerome Glisse 2009-06-05 24 * Alex Deucher
771fe6b9 Jerome Glisse 2009-06-05 25 */
760285e7 David Howells 2012-10-02 @26 #include
760285e7 David Howells 2012-10-02 27 #include
760285e7 David Howells 2012-10-02 28 #include
760285e7 David Howells 2012-10-02 29 #include
9843ead0 Dave Airlie 2015-02-24 30 #include
760285e7 David Howells 2012-10-02 31 #include
771fe6b9 Jerome Glisse 2009-06-05 32 #include "radeon.h"
1a626b68 Slava Grigorev2014-12-01 33 #include "radeon_audio.h"
923f6848 Alex Deucher 2009-09-10 34 #include "atom.h"
771fe6b9 Jerome Glisse 2009-06-05 35
10ebc0bc Dave Airlie 2012-09-17 36 #include
47eb8f73 Lukas Wunner 2016-01-11 37 #include
10ebc0bc Dave Airlie 2012-09-17 38
9843ead0 Dave Airlie 2015-02-24 39 static int
radeon_dp_handle_hpd(struct drm_connector *connector)
9843ead0 Dave Airlie 2015-02-24 40 {
9843ead0 Dave Airlie 2015-02-24 41 struct radeon_connector
*radeon_connector = to_radeon_connector(connector);
9843ead0 Dave Airlie 2015-02-24 42 int ret;
9843ead0 Dave Airlie 2015-02-24 43
9843ead0 Dave
