[PATCH v1 1/1] gcc: config: microblaze: fix cpu version check
There is a microblaze cpu version 10.0 included in versal. If the
minor version is only a single digit, then the version comparison
will fail as version 10.0 will appear as 100 compared to version
6.00 or 8.30 which will calculate to values 600 and 830.
The issue can be seen when using the '-mcpu=10.0' option.
With this fix, versions with a single digit minor number such as
10.0 will be calculated as greater than versions with a smaller
major version number, but with two minor version digits.
By applying this fix, several incorrect warning messages will no
longer be printed when building the versal plm application, such
as the warning message below:
warning: '-mxl-multiply-high' can be used only with '-mcpu=v6.00.a' or greater
Signed-off-by: Neal Frager
---
gcc/config/microblaze/microblaze.cc | 164 +---
1 file changed, 76 insertions(+), 88 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..6e1555f6eb3 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,8 +56,6 @@
/* This file should be included last. */
#include "target-def.h"
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
-
/* Classifies an address.
ADDRESS_INVALID
@@ -1297,12 +1295,73 @@ microblaze_expand_block_move (rtx dest, rtx src, rtx
length, rtx align_rtx)
return false;
}
+/* Convert a version number of the form "vX.YY.Z" to an integer encoding
+for easier range comparison. */
+static int
+microblaze_version_to_int (const char *version)
+{
+ const char *p, *v;
+ const char *tmpl = "vXX.YY.Z";
+ int iver1 =0, iver2 =0, iver3 =0;
+
+ p = version;
+ v = tmpl;
+
+ while (*p)
+{
+ if (*v == 'X')
+ { /* Looking for major */
+ if (*p == '.')
+ *v++;
+ else
+ {
+ if (!(*p >= '0' && *p <= '9'))
+ return -1;
+ iver1 += (int) (*p - '0');
+ iver1 *= 1000;
+ }
+ }
+ else if (*v == 'Y')
+ { /* Looking for minor */
+ if (!(*p >= '0' && *p <= '9'))
+ return -1;
+ iver2 += (int) (*p - '0');
+ iver2 *= 10;
+ }
+ else if (*v == 'Z')
+ { /* Looking for compat */
+ if (!(*p >= 'a' && *p <= 'z'))
+ return -1;
+ iver3 = (int) (*p - 'a');
+ }
+ else
+ {
+ if (*p != *v)
+ return -1;
+ }
+
+ v++;
+ p++;
+}
+
+ if (*p)
+return -1;
+
+ return iver1 + iver2 + iver3;
+}
+
static bool
microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code
ATTRIBUTE_UNUSED,
int opno ATTRIBUTE_UNUSED, int *total,
bool speed ATTRIBUTE_UNUSED)
{
int code = GET_CODE (x);
+ int ver, ver_int;
+
+ if (microblaze_select_cpu == NULL)
+microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU;
+
+ ver_int = microblaze_version_to_int (microblaze_select_cpu);
switch (code)
{
@@ -1345,8 +1404,8 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int
outer_code ATTRIBUTE_UNUSED,
{
if (TARGET_BARREL_SHIFT)
{
- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a")
- >= 0)
+ ver = ver_int - microblaze_version_to_int("v5.00.a");
+ if (ver >= 0)
*total = COSTS_N_INSNS (1);
else
*total = COSTS_N_INSNS (2);
@@ -1407,8 +1466,8 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int
outer_code ATTRIBUTE_UNUSED,
}
else if (!TARGET_SOFT_MUL)
{
- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a")
- >= 0)
+ ver = ver_int - microblaze_version_to_int("v5.00.a");
+ if (ver >= 0)
*total = COSTS_N_INSNS (1);
else
*total = COSTS_N_INSNS (3);
@@ -1681,72 +1740,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
return 0;
}
-/* Convert a version number of the form "vX.YY.Z" to an integer encoding
-for easier range comparison. */
-static int
-microblaze_version_to_int (const char *version)
-{
- const char *p, *v;
- const char *tmpl = "vXX.YY.Z";
- int iver = 0;
-
- p = version;
- v = tmpl;
-
- while (*p)
-{
- if (*v == 'X')
- { /* Looking for major */
- if (*p == '.')
-{
- v++;
-}
- else
-{
- if (!(*p >= '0' && *p <= '9&
[PATCH v2 1/1] gcc: config: microblaze: fix cpu version check
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp instead of strverscmp to check the mcpu version against feature options. By simply changing the define to use strverscmp, the new version 10.0 is treated correctly as a higher version than previous versions. Signed-off-by: Neal Frager --- gcc/config/microblaze/microblaze.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc index c9f6c4198cf..60ad55120d2 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc @@ -56,7 +56,7 @@ /* This file should be included last. */ #include "target-def.h" -#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB) +#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB) /* Classifies an address. -- 2.25.1
[PATCH v3 1/1] gcc: config: microblaze: fix cpu version check
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options. By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.
Signed-off-by: Neal Frager
---
V1->V2:
- No need to create a new microblaze specific version check
routine as strverscmp is the correct solution.
V2->V3:
- Changed mcpu define for microblaze isa testsuite examples.
---
gcc/config/microblaze/microblaze.cc| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/bshift.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/div.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcvt.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/float.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mulh.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/nofloat.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 2 +-
gcc/testsuite/gcc.target/microblaze/microblaze.exp | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
/* This file should be included last. */
#include "target-def.h"
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
/* Classifies an address.
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
volatile int m1, m2, m3;
volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */
volatile int m1, m2, m3;
volatile long l1, l2;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
index 4041a241391..b6202e168d6 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
index 3902b839db9..4386c6e6cc3 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
index 8555974dda5..b414e48fe1b 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
index 79cc5f9dd8e..ff137012df4 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float&quo
[PATCH v4 1/1] gcc: config: microblaze: fix cpu version check
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options. By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.
Signed-off-by: Neal Frager
---
V1->V2:
- No need to create a new microblaze specific version check
routine as strverscmp is the correct solution.
V2->V3:
- Changed mcpu define for microblaze isa testsuite examples.
V3->V4:
- Added ChangeLog
---
gcc/ChangeLog | 4
gcc/config/microblaze/microblaze.cc| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/bshift.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/div.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcvt.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/float.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mulh.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/nofloat.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 2 +-
gcc/testsuite/gcc.target/microblaze/microblaze.exp | 2 +-
21 files changed, 24 insertions(+), 20 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d50cd42a7d4..d5fee35bda4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-26 Neal Frager
+
+ * config/microblaze/microblaze.cc: Fix mcpu version check.
+
2023-10-25 Iain Sandoe
* config/darwin.cc (darwin_override_options): Handle fPIE.
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
/* This file should be included last. */
#include "target-def.h"
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
/* Classifies an address.
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
volatile int m1, m2, m3;
volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */
volatile int m1, m2, m3;
volatile long l1, l2;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
index 4041a241391..b6202e168d6 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
index 3902b839db9..4386c6e6cc3 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
index 8555974dda5..b414e48fe1b 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
[PATCH v5 1/1] gcc: config: microblaze: fix cpu version check
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options. By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.
Signed-off-by: Neal Frager
---
V1->V2:
- No need to create a new microblaze specific version check
routine as strverscmp is the correct solution.
V2->V3:
- Changed mcpu define for microblaze isa testsuite examples.
V3->V4:
- Added ChangeLog
V4->V5:
- Added testsuite ChangeLog
---
gcc/ChangeLog | 4
gcc/config/microblaze/microblaze.cc| 2 +-
gcc/testsuite/ChangeLog| 4
gcc/testsuite/gcc.target/microblaze/isa/bshift.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/div.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fcvt.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/float.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/fsqrt.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul-bshift-pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul-bshift.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mulh-bshift-pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mulh.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/nofloat.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/pcmp.c | 2 +-
gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 2 +-
gcc/testsuite/gcc.target/microblaze/microblaze.exp | 2 +-
22 files changed, 28 insertions(+), 20 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4964796c6a6..7f63f39d4cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30 Neal Frager
+
+ * config/microblaze/microblaze.cc: Fix mcpu version check.
+
2023-10-29 Martin Uecker
PR tree-optimization/109334
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
/* This file should be included last. */
#include "target-def.h"
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
/* Classifies an address.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5c18129b4ac..1d7abcf2584 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30 Neal Frager
+
+ * gcc.target/microblaze: Bump tests to mcpu=v10.0.
+
2023-10-29 Iain Buclaw
PR d/110712
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
volatile int m1, m2, m3;
volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */
volatile int m1, m2, m3;
volatile long l1, l2;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
index 4041a241391..b6202e168d6 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
index 3902b839db9..4386c6e6cc3 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mhard-float" } */
volatile float f1, f2, f3;
diff --
[PATCH v6 1/1] gcc: config: microblaze: fix cpu version check
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options. By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.
Signed-off-by: Neal Frager
---
V1->V2:
- No need to create a new microblaze specific version check
routine as strverscmp is the correct solution.
V2->V3:
- Changed mcpu define for microblaze isa testsuite examples.
V3->V4:
- Added ChangeLog
V4->V5:
- Added testsuite ChangeLog
V5->V6:
- Updated testsuite ChangeLog to include all files
---
gcc/ChangeLog | 4
gcc/config/microblaze/microblaze.cc | 2 +-
gcc/testsuite/ChangeLog | 22 +++
.../gcc.target/microblaze/isa/bshift.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/div.c | 2 +-
.../gcc.target/microblaze/isa/fcmp1.c | 2 +-
.../gcc.target/microblaze/isa/fcmp2.c | 2 +-
.../gcc.target/microblaze/isa/fcmp3.c | 2 +-
.../gcc.target/microblaze/isa/fcmp4.c | 2 +-
.../gcc.target/microblaze/isa/fcvt.c | 2 +-
.../gcc.target/microblaze/isa/float.c | 2 +-
.../gcc.target/microblaze/isa/fsqrt.c | 2 +-
.../microblaze/isa/mul-bshift-pcmp.c | 2 +-
.../gcc.target/microblaze/isa/mul-bshift.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul.c | 2 +-
.../microblaze/isa/mulh-bshift-pcmp.c | 2 +-
.../gcc.target/microblaze/isa/mulh.c | 2 +-
.../gcc.target/microblaze/isa/nofcmp.c| 2 +-
.../gcc.target/microblaze/isa/nofloat.c | 2 +-
.../gcc.target/microblaze/isa/pcmp.c | 2 +-
.../gcc.target/microblaze/isa/vanilla.c | 2 +-
.../gcc.target/microblaze/microblaze.exp | 2 +-
22 files changed, 46 insertions(+), 20 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4964796c6a6..7f63f39d4cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30 Neal Frager
+
+ * config/microblaze/microblaze.cc: Fix mcpu version check.
+
2023-10-29 Martin Uecker
PR tree-optimization/109334
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
/* This file should be included last. */
#include "target-def.h"
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
/* Classifies an address.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5c18129b4ac..9be4942b61d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2023-10-30 Neal Frager
+
+ * gcc.target/microblaze/isa/bshift.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/div.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/fcmp1.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/fcmp2.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/fcmp3.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/fcmp4.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/fcvt.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/float.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/fsqrt.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/mul-bshift-pcmp.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/mul-bshift.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/mul.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/mulh-bshift-pcmp.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/mulh.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/nofcmp.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/nofloat.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/pcmp.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/vanilla.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/microblaze.exp: Bump to mcpu=v10.0.
+
2023-10-29 Iain Buclaw
PR d/110712
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
volatile int m1, m2, m3;
volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a
[PATCH v6 1/1] gcc: config: microblaze: fix cpu version check
The MICROBLAZE_VERSION_COMPARE was incorrectly using strcasecmp
instead of strverscmp to check the mcpu version against feature
options. By simply changing the define to use strverscmp,
the new version 10.0 is treated correctly as a higher version
than previous versions.
Signed-off-by: Neal Frager
---
V1->V2:
- No need to create a new microblaze specific version check
routine as strverscmp is the correct solution.
V2->V3:
- Changed mcpu define for microblaze isa testsuite examples.
V3->V4:
- Added ChangeLog
V4->V5:
- Added testsuite ChangeLog
V5->V6:
- Updated testsuite ChangeLog to include all files
---
gcc/ChangeLog | 4
gcc/config/microblaze/microblaze.cc | 2 +-
gcc/testsuite/ChangeLog | 22 +++
.../gcc.target/microblaze/isa/bshift.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/div.c | 2 +-
.../gcc.target/microblaze/isa/fcmp1.c | 2 +-
.../gcc.target/microblaze/isa/fcmp2.c | 2 +-
.../gcc.target/microblaze/isa/fcmp3.c | 2 +-
.../gcc.target/microblaze/isa/fcmp4.c | 2 +-
.../gcc.target/microblaze/isa/fcvt.c | 2 +-
.../gcc.target/microblaze/isa/float.c | 2 +-
.../gcc.target/microblaze/isa/fsqrt.c | 2 +-
.../microblaze/isa/mul-bshift-pcmp.c | 2 +-
.../gcc.target/microblaze/isa/mul-bshift.c| 2 +-
gcc/testsuite/gcc.target/microblaze/isa/mul.c | 2 +-
.../microblaze/isa/mulh-bshift-pcmp.c | 2 +-
.../gcc.target/microblaze/isa/mulh.c | 2 +-
.../gcc.target/microblaze/isa/nofcmp.c| 2 +-
.../gcc.target/microblaze/isa/nofloat.c | 2 +-
.../gcc.target/microblaze/isa/pcmp.c | 2 +-
.../gcc.target/microblaze/isa/vanilla.c | 2 +-
.../gcc.target/microblaze/microblaze.exp | 2 +-
22 files changed, 46 insertions(+), 20 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4964796c6a6..7f63f39d4cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2023-10-30 Neal Frager
+
+ * config/microblaze/microblaze.cc: Fix mcpu version check.
+
2023-10-29 Martin Uecker
PR tree-optimization/109334
diff --git a/gcc/config/microblaze/microblaze.cc
b/gcc/config/microblaze/microblaze.cc
index c9f6c4198cf..60ad55120d2 100644
--- a/gcc/config/microblaze/microblaze.cc
+++ b/gcc/config/microblaze/microblaze.cc
@@ -56,7 +56,7 @@
/* This file should be included last. */
#include "target-def.h"
-#define MICROBLAZE_VERSION_COMPARE(VA,VB) strcasecmp (VA, VB)
+#define MICROBLAZE_VERSION_COMPARE(VA,VB) strverscmp (VA, VB)
/* Classifies an address.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5c18129b4ac..2f0fc3275ae 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2023-10-30 Neal Frager
+
+ * gcc.target/microblaze/isa/bshift.c: Bump to mcpu=v10.0.
+ * gcc.target/microblaze/isa/div.c: Ditto.
+ * gcc.target/microblaze/isa/fcmp1.c: Ditto.
+ * gcc.target/microblaze/isa/fcmp2.c: Ditto.
+ * gcc.target/microblaze/isa/fcmp3.c: Ditto.
+ * gcc.target/microblaze/isa/fcmp4.c: Ditto.
+ * gcc.target/microblaze/isa/fcvt.c: Ditto.
+ * gcc.target/microblaze/isa/float.c: Ditto.
+ * gcc.target/microblaze/isa/fsqrt.c: Ditto.
+ * gcc.target/microblaze/isa/mul-bshift-pcmp.c: Ditto.
+ * gcc.target/microblaze/isa/mul-bshift.c: Ditto.
+ * gcc.target/microblaze/isa/mul.c: Ditto.
+ * gcc.target/microblaze/isa/mulh-bshift-pcmp.c: Ditto.
+ * gcc.target/microblaze/isa/mulh.c: Ditto.
+ * gcc.target/microblaze/isa/nofcmp.c: Ditto.
+ * gcc.target/microblaze/isa/nofloat.c: Ditto.
+ * gcc.target/microblaze/isa/pcmp.c: Ditto.
+ * gcc.target/microblaze/isa/vanilla.c: Ditto.
+ * gcc.target/microblaze/microblaze.exp: Ditto.
+
2023-10-29 Iain Buclaw
PR d/110712
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
index 64cf1e2e59e..664586bff9f 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/bshift.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mxl-barrel-shift" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mxl-barrel-shift" } */
volatile int m1, m2, m3;
volatile unsigned int u1, u2, u3;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/div.c
b/gcc/testsuite/gcc.target/microblaze/isa/div.c
index 25ee42ce5c8..783e7c0f684 100644
--- a/gcc/testsuite/gcc.target/microblaze/isa/div.c
+++ b/gcc/testsuite/gcc.target/microblaze/isa/div.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O3 -mcpu=v6.00.a -mno-xl-soft-div" } */
+/* { dg-options "-O3 -mcpu=v10.0 -mno-xl-soft-div" } */
volatile int m1, m2, m3;
volatile long l1, l2;
diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
b/gcc/testsuite/gcc.target/m
