Re: [PATCH, ARM] Fix stack red zone bug (PR38644) for GCC 4.6
Hi,
this is Jiangning Liu's patch to fix PR38644 in ARM back-end
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644.
intended for the GCC 4.6 branch. Test results:
http://gcc.gnu.org/ml/gcc-testresults/2011-11/msg01619.html
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
ChangeLog:
2011-11-04 Jiangning Liu
PR rtl-optimization/38644
* config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier
for epilogue having stack adjustment.
ChangeLog of testsuite:
2011-11-04 Jiangning Liu
PR rtl-optimization/38644
* gcc.target/arm/stack-red-zone.c: New.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 75174a3..acdfbd5 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -20864,6 +20864,8 @@ thumb1_expand_epilogue (void)
gcc_assert (amount >= 0);
if (amount)
{
+ emit_insn (gen_blockage ());
+
if (amount < 512)
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
GEN_INT (amount)));
diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
new file mode 100644
index 000..b9f0f99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
@@ -0,0 +1,12 @@
+/* No stack red zone. PR38644. */
+/* { dg-options "-mthumb -O2" } */
+/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */
+
+extern int doStreamReadBlock (int *, char *, int size, int);
+
+char readStream (int *s)
+{
+ char c = 0;
+ doStreamReadBlock (s, &c, 1, *s);
+ return c;
+}
Re: [PATCH, ARM] Fix stack red zone bug (PR38644) for GCC 4.5
Hi,
this is Jiangning Liu's patch to fix PR38644 in ARM back-end
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644.
intended for the GCC 4.5 branch. I didn't run the test suite. I only compiled
the arm-eabi-gcc and checked that this patch fixes the test case.
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
ChangeLog:
2011-11-04 Jiangning Liu
PR rtl-optimization/38644
* config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier
for epilogue having stack adjustment.
ChangeLog of testsuite:
2011-11-04 Jiangning Liu
PR rtl-optimization/38644
* gcc.target/arm/stack-red-zone.c: New.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 08208b7..16325bb 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19408,6 +19408,8 @@ thumb1_expand_epilogue (void)
gcc_assert (amount >= 0);
if (amount)
{
+ emit_insn (gen_blockage ());
+
if (amount < 512)
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
GEN_INT (amount)));
diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
new file mode 100644
index 000..b9f0f99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
@@ -0,0 +1,12 @@
+/* No stack red zone. PR38644. */
+/* { dg-options "-mthumb -O2" } */
+/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */
+
+extern int doStreamReadBlock (int *, char *, int size, int);
+
+char readStream (int *s)
+{
+ char c = 0;
+ doStreamReadBlock (s, &c, 1, *s);
+ return c;
+}
Re: [PATCH, ARM] Fix stack red zone bug (PR38644) for GCC 4.4
Hi,
this is Jiangning Liu's patch to fix PR38644 in ARM back-end
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644.
intended for the GCC 4.4 branch. I didn't run the test suite. I only compiled
the arm-eabi-gcc and checked that this patch fixes the test case.
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
ChangeLog:
2011-11-04 Jiangning Liu
PR rtl-optimization/38644
* config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier
for epilogue having stack adjustment.
ChangeLog of testsuite:
2011-11-04 Jiangning Liu
PR rtl-optimization/38644
* gcc.target/arm/stack-red-zone.c: New.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index eed5cfd..69641ef 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17682,6 +17682,8 @@ thumb1_expand_epilogue (void)
gcc_assert (amount >= 0);
if (amount)
{
+ emit_insn (gen_blockage ());
+
if (amount < 512)
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
GEN_INT (amount)));
diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
new file mode 100644
index 000..b9f0f99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c
@@ -0,0 +1,12 @@
+/* No stack red zone. PR38644. */
+/* { dg-options "-mthumb -O2" } */
+/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */
+
+extern int doStreamReadBlock (int *, char *, int size, int);
+
+char readStream (int *s)
+{
+ char c = 0;
+ doStreamReadBlock (s, &c, 1, *s);
+ return c;
+}
Re: [Patch] Fix compilation of libgcc/config/alpha/qrnnd.S on VMS
On Nov 15, 2011, at 5:39 PM, Richard Henderson wrote: > On 11/15/2011 01:58 AM, Tristan Gingold wrote: >>* config/alpha/qrnnd.S: Use specific pseudos for VMS. > > Fine by me. Thanks, committed. > I know nothing about vms. Maybe you're lucky :-)
Re: [ARM] Fix PR49641
On 11/08/2011 09:05 AM, Sebastian Huber wrote: On 10/31/2011 11:39 AM, Sebastian Huber wrote: On 10/25/2011 06:56 PM, Richard Earnshaw wrote: On 24/10/11 14:30, Sebastian Huber wrote: Hello, what about the attached patch based on the original patch provided by Bernd Schmidt with modifications suggested by Richard Earnshaw. pr49641.patch * config/arm/arm.c (store_multiple_sequence): Avoid cases where the base reg is stored iff compiling for Thumb1. * gcc.target/arm/pr49641.c: New test. OK. R. Would someone mind committing it? Thanks. Ping. What needs to be done to get this committed? Here are the test results for a recent GCC 4.6 snapshot with this patch: http://gcc.gnu.org/ml/gcc-testresults/2011-11/msg01619.html -- Sebastian Huber, embedded brains GmbH Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany Phone : +49 89 18 90 80 79-6 Fax : +49 89 18 90 80 79-9 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
[google] Backport r171347 from trunk to google/gcc-4_6 (issue5396043)
This patch backports the upstream fix in r171347 for a problem caused by change in volatile bitfield access. This is tested by building the x86 toolchain with tests and checking that volatile bitfield access worked on ARM. This is a backport for 4.6 only. 2011-11-16 Doug Kwan Backport r171347 from trunk. 2011-03-23 Julian Brown * expr.c (expand_expr_real_1): Only use BLKmode for volatile accesses which are not naturally aligned. Index: gcc/expr.c === --- gcc/expr.c (revision 181400) +++ gcc/expr.c (working copy) @@ -9200,8 +9200,11 @@ && modifier != EXPAND_CONST_ADDRESS && modifier != EXPAND_INITIALIZER) /* If the field is volatile, we always want an aligned - access. */ - || (volatilep && flag_strict_volatile_bitfields > 0) + access. Only do this if the access is not already naturally + aligned, otherwise "normal" (non-bitfield) volatile fields + become non-addressable. */ + || (volatilep && flag_strict_volatile_bitfields > 0 + && (bitpos % GET_MODE_ALIGNMENT (mode) != 0)) /* If the field isn't aligned enough to fetch as a memref, fetch it as a bit field. */ || (mode1 != BLKmode -- This patch is available for review at http://codereview.appspot.com/5396043
Re: [PATCH] reload: Try alternative with swapped operands before going to the next
On 11/15/2011 11:31 PM, Maxim Kuvyrkov wrote: > I have eye-balled this patch for good half-an-hour and couldn't poke any > holes in it. I can't approve this patch, but below are some review comments. > Mostly these are suggested comments to make reload easier to understand for > future generations. Thanks! >> ! /* Restore the constraint pointers to the previous >> ! alternative. */ >> ! for (i = 0; i < noperands; i++) >> !constraints[i] = old_constraints[i]; > > I'm not sure the comment is precise. We are still on the current > alternative, we are just rolling back the advancement constraints[] done ... We are on the current alternative but the constraints array already points to the next and has to be rewinded. But I agree that the comment is confusing. However, I'll remove this anyway since as you said old_constraints is probably not needed at all. >> + /* Make a backup of the old constraint pointer since we >> + will need it when retrying the alternative with >> + swapped operands. */ >> + old_constraints[i] = constraints[i]; >>constraints[i] = p; > > ... here. > > Furthermore, as constraints[i] seem not be used down the function, can't we > just condition constraints[i] update on "if (swapped == (commutative >= 0 ? 1 > : 0))" and avoid old_constraints altogether? Right. I'll remove this. > Future generations would really appreciate comments about what is going on ... Ok. I'll add a comment saying that this just (un)swaps fields in different operand related arrays. Bye, -Andreas-
Re: [PATCH, ARM] Fix stack red zone bug (PR38644) for GCC 4.6
On 16 November 2011 08:23, Sebastian Huber wrote: > Hi, > > this is Jiangning Liu's patch to fix PR38644 in ARM back-end > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644. OK to backports in all release branches. Before committing the backport please modify the changelog entry to indicate that this was a backport in the changelog entry. Something like .. 2011-11-16 Sebastian Huber <...> Backport from mainline. 2011-11-04 Jiangning Liu PR rtl-optimization/38644 * config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier for epilogue having stack adjustment. cheers Ramana > > intended for the GCC 4.6 branch. Test results: > > http://gcc.gnu.org/ml/gcc-testresults/2011-11/msg01619.html > > -- > Sebastian Huber, embedded brains GmbH > > Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany > Phone : +49 89 18 90 80 79-6 > Fax : +49 89 18 90 80 79-9 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. >
[arm-embedded] Revert r179307 and backport mainline r180964
The original solution r179307 of stack red zone issue for PR38644 is completely reverted in ARM/embedded-4_6-branch. And backport mainline 180964 to ARM/embedded-4_6-branch. Committed. Undo changes committed in r179307. 2011-11-16 Jiangning Liu Backport r180964 from mainline 2011-11-04 Jiangning Liu PR rtl-optimization/38644 * config/arm/arm.c (thumb1_expand_epilogue): Add memory barrier for epilogue having stack adjustment. testsuite: 2011-11-16 Jiangning Liu Backport r180964 from mainline 2011-11-04 Jiangning Liu PR rtl-optimization/38644 * gcc.target/arm/stack-red-zone.c: New.
Re: [PATCH] Fold VEC_PERM_EXPR/VEC_INTERLEAVE*EXPR/VEC_EXTRACT*EXPR with VECTOR_CST/CONSTRUCTOR arguments (PR tree-optimization/51074, take 2)
On Fri, Nov 11, 2011 at 5:41 PM, Jakub Jelinek wrote: > On Fri, Nov 11, 2011 at 08:36:36AM -0800, Richard Henderson wrote: >> Ok, except >> >> > + elts[i] >> > + = fold_convert (TREE_TYPE (TREE_TYPE (arg)), integer_zero_node); >> >> build_int_cst. > > That would work for integer modes only, but here the type can be REAL_TYPE > too. I think fold_convert from integer_zero_mode to any time is what is > the most common idiom to create zero > INTEGER_CSTs/COMPLEX_CSTs/REAL_CSTs/FIXED_CSTs of any type. build_zero_cst Richard. > Jakub >
Re: PATCH, PR 50605] Handle MEM_REFs in is_gimple_ip_invariant_address
On Fri, Nov 11, 2011 at 4:21 PM, Martin Jambor wrote:
> Hi,
>
> the problem in PR 50605 is that is_gimple_ip_invariant returns false
> for
>
> &MEM[(struct tRecorderImp *)&recorder + 8B]
>
> where &reorder is an IP gimple invariant. This patch fixes that by
> copying the code that handles MEM_REFs from
> is_gimple_invariant_address (and only changing
> decl_address_invariant_p to decl_address_ip_invariant_p).
>
> Bootstrapped and tested on x86_64-linux. OK for trunk?
Ok.
Thanks,
Richard.
> Thanks,
>
> Martin
>
>
>
> 2011-11-11 Martin Jambor
>
> PR tree-optimization/50605
> * gimple.c (is_gimple_ip_invariant_address): Also handle MEM_REFs
> of IPA invariant decls.
>
> * testsuite/g++.dg/ipa/pr50605.C: New test.
>
>
> Index: src/gcc/testsuite/g++.dg/ipa/pr50605.C
> ===
> --- /dev/null
> +++ src/gcc/testsuite/g++.dg/ipa/pr50605.C
> @@ -0,0 +1,40 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O3 -fno-early-inlining" } */
> +
> +class A
> +{
> +public:
> + int a;
> + void *stuff;
> +};
> +
> +class B
> +{
> +public:
> + int b;
> + void *other_stuff;
> + A array[50];
> +};
> +
> +extern B gb;
> +
> +int process_A (A *a)
> +{
> + return a->a;
> +}
> +
> +int process_A_complex (A *a)
> +{
> + return process_A (a+3);
> +}
> +
> +int process_B (B *b)
> +{
> + return process_A_complex (&b->array[0]);
> +}
> +
> +int foo (void)
> +{
> + return process_B (&gb);
> +}
> +
> Index: src/gcc/gimple.c
> ===
> --- src.orig/gcc/gimple.c
> +++ src/gcc/gimple.c
> @@ -2850,8 +2850,18 @@ is_gimple_ip_invariant_address (const_tr
> return false;
>
> op = strip_invariant_refs (TREE_OPERAND (t, 0));
> + if (!op)
> + return false;
> +
> + if (TREE_CODE (op) == MEM_REF)
> + {
> + const_tree op0 = TREE_OPERAND (op, 0);
> + return (TREE_CODE (op0) == ADDR_EXPR
> + && (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))
> + || decl_address_ip_invariant_p (TREE_OPERAND (op0, 0;
> + }
>
> - return op && (CONSTANT_CLASS_P (op) || decl_address_ip_invariant_p (op));
> + return CONSTANT_CLASS_P (op) || decl_address_ip_invariant_p (op);
> }
>
> /* Return true if T is a GIMPLE minimal invariant. It's a restricted
>
>
Re: [PATCH] Fix PR51030, handle p ? &p->base : 0 in phiopt
On Fri, Nov 11, 2011 at 6:56 AM, Jeff Law wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > On 11/08/11 06:45, Richard Guenther wrote: >> >> This should optimize VEC_BASE that Jakub was patching by teaching >> phiopt to handle some one-statement intermediate basic-blocks. >> >> Bootstrapped and tested on x86_64-unknown-linux-gnu, any comments? >> >> Thanks, Richard. >> >> 2011-11-08 Richard Guenther >> >> PR tree-optimization/51030 * tree-ssa-phiopt.c >> (jump_function_from_stmt): New function. (value_replacement): Use >> it to handle trivial non-empty intermediate blocks. >> >> * gcc.dg/tree-ssa/phi-opt-6.c: New testcase. > Seems like a reasonable extension of the existing value_replacement > capability. We might want to tweak the comment near the top of the > file to indicate the additional case we handle. > > It's pretty specific to the &p->base idiom, but that's probably OK. > You didn't peek to see how often the optimization triggered by chance > did you? No, I didn't. But I think it'll be common enough to be worth the effort. Richard. > jeff > -BEGIN PGP SIGNATURE- > Version: GnuPG v1.4.11 (GNU/Linux) > Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ > > iQEcBAEBAgAGBQJOvLkjAAoJEBRtltQi2kC7hp0H/29hwfGpSdRFaK6JFanakkp1 > HnpEf/YdMr8YieG5dAqR5IzBkb/lRIgwZR9mxPdXnb172IdsHfTaeuX3NyXtVPHD > 0Rt/yXGQJStt0J7n3FUjOnQHvZeE05VRzxK8axSLDsNHGUH3j+FVVOT8/+hhnKi3 > YfZJo6A68mfpeV/0BlPmnQJOTKnE4YSJbeBnqXg3DNcAJcIajNnj6SNUs8cXe4JB > s2ERYcqrje9sWwgEQY4KueTlwqpPu2c+52Sh2JBD8E8fo+S5OWIglg23q5GmZ83i > OIeM3DZaZdjtV8/oJjsSi1viJVyXXQQqiIJfs1U4EcFw+h6gRLp4HDWIoy/tprQ= > =zmj+ > -END PGP SIGNATURE- >
Re: [PATCH] PR target/50038 fix: redundant zero extensions removal
Eric, I will follow up while Ilya is on vacation. I can see only one patch along the dicussion so I will use it, making changes to follow phase renaming and documentation? I am covered by FSF agreement too, on the same Intel's list as Ilya. regards, Sergos On Fri, Nov 11, 2011 at 2:12 PM, Eric Botcazou wrote: >> I have already signed copyright agreement with the FSF. Will I need >> the separate one for this particular commit? > > No, if your contributions are already covered by a copyright agreement with > the > FSF, nothing more needs to be done. > > -- > Eric Botcazou >
Re: [rs6000] Fix PR 50906, eh_frame and other woes
On Nov 9, 2011, at 18:15 , Olivier Hainque wrote: > I'm not convinced that the potential gain is worth the extra > complexity and potential risk of running into another subtle > subcase, with hard to track sporadic runtime failures for > starters. I don't have numbers though. > > That's a port maintainer call, I guess ? David, opinion on this point ? My understanding is that we have two options 1) try to preserve the current attempt at maximizing optimization opportunities with precise stack/frame tie insns, 2) simplify for a slightly more brutal option, with a strong (mem:blk scratch) barrier instead My feeling is that 2 would be a sensible option. Trying to get the precise insns right has caused multiple issues (several PRs about hard to track silent wrong code generated, trickier implementation), and I'm not convinced that the legitimate code efficiency gains are worth the trouble. As I wrote, I don't have numbers to backup the latter point though. Thanks for your feedback, Olivier
Re: [RFA/ARM] Make libgcc use UDIV/SDIV instructions when they are available.
On 15/11/11 16:17, Matthew Gretton-Dann wrote: > All, > > The attached patch causes libgcc to use the UDIV and SDIV instructions > when possible in the implementation of the ARM div/mod functions in libgcc. > > This will benefit Cortex-M3, Cortex-M4, all Cortex-R* CPUs, Cortex-A7, > and Cortex-A15. > > The special case of some Cortex-R* CPUs where the UDIV/SDIV instructions > are only available in Thumb mode, making it beneficial to force these > library functions into Thumb mode to make use of those instructions, is > not handled. > > This was tested by configuring GCC --with-cpu cortex-a15, and then > running the testsuite with -mcpu=cortex-a9. I've also manually > inspected libgcc to make sure the functions are being built as expected. > > Please can someone review? > > Thanks, > > Matt > > libgcc/ChangeLog: > > 2011-11-15 Matthew Gretton-Dann > > * config/arm/lib1funcs.asm (udivsi3): Add support for divide > functions. > (aeabi_uidivmod): Likewise. > (umodsi3): Likewise. > (divsi3): Likewise. > (aeabi_idivmod): Likewise. > (modsi3): Likewise. > OK. R.
Re: [PATCH, ARM] Fix stack red zone bug (PR38644) for GCC 4.5
On 16 November 2011 08:25, Sebastian Huber wrote: > Hi, > > this is Jiangning Liu's patch to fix PR38644 in ARM back-end > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644. > > intended for the GCC 4.5 branch. I didn't run the test suite. I only > compiled the arm-eabi-gcc and checked that this patch fixes the test case. > Please make sure you run the testsuite for both 4.5 and 4.4 in case you want them backported there. Ramana > -- > Sebastian Huber, embedded brains GmbH > > Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany > Phone : +49 89 18 90 80 79-6 > Fax : +49 89 18 90 80 79-9 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > >
Re: [Patch,Fortran] PR39427/37829 - implement F2003's constructors
Dear Tobias, Sorry that I took an extra day over this approval; I kept getting disturbed. [Remark: The delected section in resolve_symbol with gfc_find_symbol(..&ds) was originally added in r133488 for PR fortran/33295] Hah! I plead guilty. I think that it must have been a necessary workaround before we started using TYPE_CANONICAL correctly for derived types. To my amazement, the patch applies cleanly with class arrays in place :-) ... or rather, the class arrays will apply cleanly when constructors are committed. The testcases all work. I have not regtested but have set that in motion and will come back immediately if there is a problem. The patch looks to be correct and consistent with style requirements. I think that a comment is in order every time that you exploit the upper/lower case distinction. OK for trunk. Thanks for the patch. Paul On Mon, Nov 14, 2011 at 10:45 AM, Tobias Burnus wrote: > I would like to *ping*. > > Additionally, I attached an updated patch as the tree-walking patch is now > in. The updated patch is also available at > https://userpage.physik.fu-berlin.de/~tburnus/tmp/constructor.diff > > > On 11/06/2011 04:29 PM, Tobias Burnus wrote: >> >> this patch fixes as collateral effect PR 37829 (alias PR 45190) where >> C_PTR/C_FUNPTR occurred when use associating a module using them, if one >> additionally uses iso_fc_binding directly. >> >> The main part of this patch, however, is for PR 39427 (alias 45190): >> Allowing generic functions to have the same name as a derived type, which is >> a Fortran 2003 feature. In expressions, the generic functions have a higher >> precedence then the structure constructor. Note that the functions are not >> required to return the derived type. >> >> This feature allows one to create something which looks similar to >> constructors in other OOP languages, except that static constructor >> functions do not exist. >> >> This patch implements them by creating for each derived type two symbols >> (symtrees): One for the derived type and one for the generic function, which >> links to the derived type. To distinguish them, the derived type starts with >> a capital letter in the symtree. In order to facilitate the error-message >> handling, the symbol itself remains in lower case. >> >> The main challenges were to ensure that one gets the derived type when >> needed and to store them properly in the module. The most time consuming >> part was to find all the places one had to change that issues with module >> reading could turn up much later; for instance at resolution time of a scope >> which had read that module. In total, it took 18 months between the first >> draft patch (cf. PR39427 comment 6, 12-14) and the final patch. Although, >> the patch looked almost working by then, it took many, many, many hours to >> fix the issues. Also the RFC patch, posted 6 days ago, had more issues than >> I had hoped for. >> >> The attached patch had been build on x86-64-linux and successfully >> regtested (gfortran and libgomp). (A full bootstrap of an almost-ready >> version was done as well; I had to rebuild because I found some left-over >> commented code blocks.) >> >> Additionally, I tried the previous patches with several programs to reduce >> the likelihood that it breaks real-world code. In particular, the very >> latest version of the patch was used to compile FLEUR, Elk, Octopus and the >> Polyhedron benchmark. Yesterday evening's version was used to compile the >> Exciting code (which includes the sensitive FoX Fortran XML library), CP2K, >> PSBLAS and FGSL. With a slightly older version, I also successfully compiled >> Tonto, Quantum Espresso and Abinit. >> >> OK for the trunk? >> >> Tobias >> >> PS: I have also included a patch for the website, i.e. >> http://gcc.gnu.org/gcc-4.7/changes.html#fortran >> >> PPS: As mentioned in the attachment, the patch includes the tree-walking >> patch, which was posted before. It's a really an independent bug, even if it >> only exposed with the constructor patch. I can either commit it before or as >> part of this patch. See also >> http://gcc.gnu.org/ml/fortran/2011-11/msg00026.html > -- The knack of flying is learning how to throw yourself at the ground and miss. --Hitchhikers Guide to the Galaxy
[PATCH, libitm]: FixPR51098, bootstrap failure on AVX target
Hello!
2011-11-16 Uros Bizjak
PR bootstrap/51098
* acinclude.m4 (LIBITM_CHECK_AS_AVX): Fix target selector.
* configure: Regenerate.
Tested on x86_64-pc-linux-gnu, committed to mainline SVN.
Uros.
Index: acinclude.m4
===
--- acinclude.m4(revision 181402)
+++ acinclude.m4(working copy)
@@ -98,7 +98,7 @@
dnl Check if as supports AVX instructions.
AC_DEFUN([LIBITM_CHECK_AS_AVX], [
case "${target_cpu}" in
-i[3456]86 | x86_64)
+i[[34567]]86 | x86_64)
AC_CACHE_CHECK([if the assembler supports AVX], libitm_cv_as_avx, [
AC_TRY_COMPILE([], [asm("vzeroupper");],
[libitm_cv_as_avx=yes], [libitm_cv_as_avx=no])
Index: configure
===
--- configure (revision 181402)
+++ configure (working copy)
@@ -17118,7 +17118,7 @@
fi
case "${target_cpu}" in
-i345686 | x86_64)
+i[34567]86 | x86_64)
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the assembler supports
AVX" >&5
$as_echo_n "checking if the assembler supports AVX... " >&6; }
if test "${libitm_cv_as_avx+set}" = set; then :
[C++ Patch] PR 51150
Hi,
this is an ICE on valid, 4.6/4.7 Regression, which manifests itself as
tree codes unhandled by cxx_eval_constant_expression. The patchlet below
appears to fix the issue and passes testing on x86_64-linux.
Ok for mainline? Branch too?
Thanks,
Paolo.
/cp
2011-11-16 Paolo Carlini
PR c++/51150
* semantics.c (cxx_eval_constant_expression): Handle ARROW_EXPR,
CAST_EXPR, CONST_CAST_EXPR, STATIC_CAST_EXPR, REINTERPRET_CAST_EXPR.
/testsuite
2011-11-16 Paolo Carlini
PR c++/51150
* g++.dg/cpp0x/pr51150.C: New.
Index: testsuite/g++.dg/cpp0x/pr51150.C
===
--- testsuite/g++.dg/cpp0x/pr51150.C(revision 0)
+++ testsuite/g++.dg/cpp0x/pr51150.C(revision 0)
@@ -0,0 +1,20 @@
+// PR c++/51150
+// { dg-options "-std=c++0x" }
+
+struct Clock {
+ double Now();
+};
+template void Foo(Clock* clock) {
+ const int now = clock->Now();
+}
+
+template void Foo(Clock*);
+
+template void Boo(int val) {
+ const int now1 = (double)(val);
+ const int now2 = const_cast(val); // { dg-error "invalid" }
+ const int now3 = static_cast(val);
+ const int now4 = reinterpret_cast(val); // { dg-error "invalid" }
+}
+
+template void Boo(int);
Index: cp/semantics.c
===
--- cp/semantics.c (revision 181407)
+++ cp/semantics.c (working copy)
@@ -7711,6 +7711,11 @@ cxx_eval_constant_expression (const constexpr_call
case THROW_EXPR:
case MODIFY_EXPR:
case MODOP_EXPR:
+case ARROW_EXPR:
+case CAST_EXPR:
+case CONST_CAST_EXPR:
+case STATIC_CAST_EXPR:
+case REINTERPRET_CAST_EXPR:
/* GCC internal stuff. */
case VA_ARG_EXPR:
case OBJ_TYPE_REF:
Re: [google] Backport r171347 from trunk to google/gcc-4_6 (issue5396043)
On Wed, Nov 16, 2011 at 03:51, Doug Kwan wrote: > This patch backports the upstream fix in r171347 for a problem caused by > change in volatile bitfield access. This is tested by building the > x86 toolchain with tests and checking that volatile bitfield access worked > on ARM. This is a backport for 4.6 only. > > 2011-11-16 Doug Kwan > > Backport r171347 from trunk. > > 2011-03-23 Julian Brown > > * expr.c (expand_expr_real_1): Only use BLKmode for volatile > accesses which are not naturally aligned. OK. Were there any testsuite changes for this patch? Diego.
Re: [C++ Patch] PR 51150
On Wed, Nov 16, 2011 at 9:00 AM, Paolo Carlini wrote: > Hi, > > this is an ICE on valid, 4.6/4.7 Regression, which manifests itself as tree > codes unhandled by cxx_eval_constant_expression. The patchlet below appears > to fix the issue and passes testing on x86_64-linux. > > Ok for mainline? Branch too? I effectively forgot about those nodes. It looks good to me. Thansk. > > Thanks, > Paolo. > > >
Re: [rs6000] Fix PR 50906, eh_frame and other woes
On Wed, Nov 16, 2011 at 6:54 AM, Olivier Hainque wrote: > > On Nov 9, 2011, at 18:15 , Olivier Hainque wrote: >> I'm not convinced that the potential gain is worth the extra >> complexity and potential risk of running into another subtle >> subcase, with hard to track sporadic runtime failures for >> starters. I don't have numbers though. >> >> That's a port maintainer call, I guess ? > > David, opinion on this point ? > > My understanding is that we have two options > > 1) try to preserve the current attempt at maximizing > optimization opportunities with precise stack/frame > tie insns, > > 2) simplify for a slightly more brutal option, with > a strong (mem:blk scratch) barrier instead > > My feeling is that 2 would be a sensible option. > > Trying to get the precise insns right has caused multiple > issues (several PRs about hard to track silent wrong code > generated, trickier implementation), and I'm not convinced > that the legitimate code efficiency gains are worth the > trouble. > > As I wrote, I don't have numbers to backup the latter point > though. We can try (2), but we will have to benchmark it to determine the impact on performance. Thanks, David
[PATCH] Add missing atomic macros to libstdc++-v3
Pr 51102 points out that a newish DR added these two macros into the standard. Bootstrapped and no new regressions. Checking in as trivial. Andrew * include/bits/atomic_base.h (ATOMIC_BOOL_LOCK_FREE, ATOMIC_POINTER_LOCK_FREE): New. Add missing macros. Index: include/bits/atomic_base.h === *** include/bits/atomic_base.h (revision 181350) --- include/bits/atomic_base.h (working copy) *** _GLIBCXX_BEGIN_NAMESPACE_VERSION *** 93,98 --- 93,99 #define LOCKFREE_PROP(T) (__atomic_always_lock_free (sizeof (T), 0) ? 2 : 1) + #define ATOMIC_BOOL_LOCK_FREE LOCKFREE_PROP (bool) #define ATOMIC_CHAR_LOCK_FREE LOCKFREE_PROP (char) #define ATOMIC_CHAR16_T_LOCK_FREE LOCKFREE_PROP (char16_t) #define ATOMIC_CHAR32_T_LOCK_FREE LOCKFREE_PROP (char32_t) *** _GLIBCXX_BEGIN_NAMESPACE_VERSION *** 101,107 #define ATOMIC_INT_LOCK_FREE LOCKFREE_PROP (int) #define ATOMIC_LONG_LOCK_FREE LOCKFREE_PROP (long) #define ATOMIC_LLONG_LOCK_FREELOCKFREE_PROP (long long) ! // Base types for atomics. template --- 102,108 #define ATOMIC_INT_LOCK_FREE LOCKFREE_PROP (int) #define ATOMIC_LONG_LOCK_FREE LOCKFREE_PROP (long) #define ATOMIC_LLONG_LOCK_FREELOCKFREE_PROP (long long) ! #define ATOMIC_POINTER_LOCK_FREE LOCKFREE_PROP (void *) // Base types for atomics. template
Re: [trans-mem] XFAIL known failures
What do you suggest, a bug report per failure with nothing but the directory/name of the test? I'd say a bug report for each distinct failure. It can get awful confusing when there's multiple bugs in a single PR... Done. PR numbers below. There is no trans-mem or libitm component, so I had to select other. Thanks for your patience. 51163 nor P3 unassig...@gcc.gnu.org NEW --- gcc.dg/tm/alias-1.c failure 51164 nor P3 unassig...@gcc.gnu.org NEW --- gcc.dg/tm/alias-2.c failure 51165 nor P3 unassig...@gcc.gnu.org NEW --- gcc.dg/tm/memopt-3.c failure 51166 nor P3 unassig...@gcc.gnu.org NEW --- gcc.dg/tm/memopt-4.c failure 51167 nor P3 unassig...@gcc.gnu.org NEW --- gcc.dg/tm/memopt-5.c failure 51168 nor P3 unassig...@gcc.gnu.org NEW --- gcc.dg/tm/memopt-7.c failure 51169 nor P3 unassig...@gcc.gnu.org NEW --- XFAIL: libitm.c/dropref-2.c execution test 51170 nor P3 unassig...@gcc.gnu.org NEW --- XFAIL: libitm.c/dropref.c execution test 51171 nor P3 unassig...@gcc.gnu.org NEW --- XFAIL: libitm.c/reentrant.c execution test 51172 nor P3 unassig...@gcc.gnu.org NEW --- XFAIL: libitm.c++/dropref.C execution test 51173 nor P3 unassig...@gcc.gnu.org NEW --- XFAIL: libitm.c++/static_ctor.C
Re: [google] Backport r171347 from trunk to google/gcc-4_6 (issue5396043)
On 16/11/11 08:51, Doug Kwan wrote: > This patch backports the upstream fix in r171347 for a problem caused by > change in volatile bitfield access. This is tested by building the > x86 toolchain with tests and checking that volatile bitfield access worked > on ARM. This is a backport for 4.6 only. > > 2011-11-16 Doug Kwan > > Backport r171347 from trunk. > > 2011-03-23 Julian Brown > > * expr.c (expand_expr_real_1): Only use BLKmode for volatile > accesses which are not naturally aligned. > So Joey Ye posted the following patch, which I think is needed to fix a regression that that patch introduces. http://gcc.gnu.org/ml/gcc-patches/2011-11/msg01390.html However, it's not been reviewed yet :-( R.
Fix PRs 50644,50741, segfaults in set_is_used
Hi,
this patch fixes both problems by using the same condition as
add_referenced_var uses to guard walking into initializers. I've
considered some other solutions but the real nice one (merging local_decls
and referenced_vars, and not using annotations for the used flag) doesn't
seem appropriate for stage 3, and all the other ones would just look
similar.
I've deviated from richis proposed patch in 50741 in that I guard only
walking into initializers of non-local vars, but still add those vars
itself (so the invariant that all variables that are somehow mentioned in
any instruction are in referenced_vars still holds).
This doesn't fix the fortran PR50640 (select_type_12 segfault). This
testcase shows two problems, one is fixed by this patch, the other
remains. As the audit trail explains the fortran frontend really
should present different code.
Regstrapping for x86_64-linux in progress (all languages+Ada). Okay if
that passes?
Ciao,
Michael.
PR middle-end/50644
PR middle-end/50741
* tree-ssa-live.c (mark_all_vars_used_1): Recurse only for decls of
current function.
(remove_unused_locals): Ditto.
testsuite/
PR middle-end/50644
PR middle-end/50741
* g++.dg/tree-ssa/pr50741.C: New.
Index: tree-ssa-live.c
===
--- tree-ssa-live.c (revision 181172)
+++ tree-ssa-live.c (working copy)
@@ -374,7 +374,8 @@ mark_all_vars_used_1 (tree *tp, int *wal
eliminated as unused. */
if (TREE_CODE (t) == VAR_DECL)
{
- if (data != NULL && bitmap_clear_bit ((bitmap) data, DECL_UID (t)))
+ if (data != NULL && bitmap_clear_bit ((bitmap) data, DECL_UID (t))
+ && DECL_CONTEXT (t) == current_function_decl)
mark_all_vars_used (&DECL_INITIAL (t), data);
set_is_used (t);
}
@@ -836,7 +837,8 @@ remove_unused_locals (void)
if (TREE_CODE (var) == VAR_DECL
&& is_global_var (var)
&& var_ann (var) != NULL
- && is_used_p (var))
+ && is_used_p (var)
+ && DECL_CONTEXT (var) == current_function_decl)
mark_all_vars_used (&DECL_INITIAL (var), global_unused_vars);
num = VEC_length (tree, cfun->local_decls);
Index: testsuite/g++.dg/tree-ssa/pr50741.C
===
--- testsuite/g++.dg/tree-ssa/pr50741.C (revision 0)
+++ testsuite/g++.dg/tree-ssa/pr50741.C (revision 0)
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -g" } */
+/* PR middle-end/50741 */
+
+struct PublishLo
+{
+ const char *functionName;
+ ~PublishLo();
+};
+struct A { A(); };
+A::A()
+{
+ static PublishLo _rL_53 = {__FUNCTION__};
+}
Re: [ARM] Fix PR49641
On 16/11/11 08:43, Sebastian Huber wrote: > On 11/08/2011 09:05 AM, Sebastian Huber wrote: >> On 10/31/2011 11:39 AM, Sebastian Huber wrote: >>> On 10/25/2011 06:56 PM, Richard Earnshaw wrote: On 24/10/11 14:30, Sebastian Huber wrote: > Hello, > > what about the attached patch based on the original patch provided by > Bernd > Schmidt with modifications suggested by Richard Earnshaw. > > > > pr49641.patch > > > * config/arm/arm.c (store_multiple_sequence): Avoid cases where > the base reg is stored iff compiling for Thumb1. > > * gcc.target/arm/pr49641.c: New test. > OK. R. >>> >>> Would someone mind committing it? Thanks. >>> >> >> Ping. >> > > What needs to be done to get this committed? Here are the test results for a > recent GCC 4.6 snapshot with this patch: > > http://gcc.gnu.org/ml/gcc-testresults/2011-11/msg01619.html > Sorry for the delay. Now committed to trunk and 4.6 branch. R.
[libitm] Provide all dummy functions in alloc_cpp.cc, eh_cpp.cc
I must have been dreaming the first time I looked at libitm testsuite
results on Tru64 UNIX. Of course it cannot work to provide only a
single dummy function, but all weak definitions must be backed by dummy
definitions on that platform. The following patch does just that, and
allows at least some libitm execution tests to pass, despite the lack
for named section supported also note in PR other/51174:
=== libitm tests ===
Schedule of variations:
unix
Running target unix
Running /vol/gcc/src/hg/trunk/local/libitm/testsuite/libitm.c/c.exp ...
FAIL: libitm.c/cancel.c (internal compiler error)
FAIL: libitm.c/cancel.c (test for excess errors)
WARNING: libitm.c/cancel.c compilation failed to produce executable
FAIL: libitm.c/clone-1.c (internal compiler error)
FAIL: libitm.c/clone-1.c (test for excess errors)
WARNING: libitm.c/clone-1.c compilation failed to produce executable
PASS: libitm.c/dropref-2.c (test for excess errors)
XFAIL: libitm.c/dropref-2.c execution test
PASS: libitm.c/dropref.c (test for excess errors)
XFAIL: libitm.c/dropref.c execution test
PASS: libitm.c/memcpy-1.c (test for excess errors)
PASS: libitm.c/memcpy-1.c execution test
PASS: libitm.c/memset-1.c (test for excess errors)
PASS: libitm.c/memset-1.c execution test
PASS: libitm.c/notx.c (test for excess errors)
PASS: libitm.c/notx.c execution test
FAIL: libitm.c/reentrant.c (internal compiler error)
FAIL: libitm.c/reentrant.c (test for excess errors)
WARNING: libitm.c/reentrant.c compilation failed to produce executable
PASS: libitm.c/simple-1.c (test for excess errors)
PASS: libitm.c/simple-1.c execution test
PASS: libitm.c/simple-2.c (test for excess errors)
PASS: libitm.c/simple-2.c execution test
PASS: libitm.c/txrelease.c (test for excess errors)
PASS: libitm.c/txrelease.c execution test
Running /vol/gcc/src/hg/trunk/local/libitm/testsuite/libitm.c++/c++.exp ...
PASS: libitm.c++/dropref.C (test for excess errors)
XFAIL: libitm.c++/dropref.C execution test
FAIL: libitm.c++/eh-1.C (internal compiler error)
FAIL: libitm.c++/eh-1.C (test for excess errors)
WARNING: libitm.c++/eh-1.C compilation failed to produce executable
XFAIL: libitm.c++/static_ctor.C (test for excess errors)
WARNING: libitm.c++/static_ctor.C compilation failed to produce executable
FAIL: libitm.c++/throwdown.C (internal compiler error)
FAIL: libitm.c++/throwdown.C (test for excess errors)
=== libitm Summary ===
# of expected passes15
# of unexpected failures10
# of expected failures 4
Ok for mainline?
Rainer
2011-11-16 Rainer Orth
* alloc_cpp.cc [__osf__] (_ZnwX, _ZdlPv, _ZnaX, _ZdaPv,
_ZnwXRKSt9nothrow_t, _ZdlPvRKSt9nothrow_t, _ZdaPvRKSt9nothrow_t):
Dummy functions.
* eh_cpp.cc [__osf__] (__cxa_allocate_exception, __cxa_throw,
__cxa_begin_catch, __cxa_end_catch, __cxa_tm_cleanup): Likewise.
diff --git a/libitm/alloc_cpp.cc b/libitm/alloc_cpp.cc
--- a/libitm/alloc_cpp.cc
+++ b/libitm/alloc_cpp.cc
@@ -61,11 +61,15 @@ extern void *_ZnaXRKSt9nothrow_t (size_t
extern void _ZdaPvRKSt9nothrow_t (void *, c_nothrow_p) __attribute__((weak));
#ifdef __osf__ /* Really: !HAVE_WEAKDEF */
-void *
-_ZnaXRKSt9nothrow_t (size_t, c_nothrow_p)
-{
- return NULL;
-}
+void *_ZnwX (size_t) { return NULL; }
+void _ZdlPv (void *) { return; }
+void *_ZnaX (size_t) { return NULL; }
+void _ZdaPv (void *) { return; }
+
+void *_ZnwXRKSt9nothrow_t (size_t, c_nothrow_p) { return NULL; }
+void _ZdlPvRKSt9nothrow_t (void *, c_nothrow_p) { return; }
+void *_ZnaXRKSt9nothrow_t (size_t, c_nothrow_p) { return NULL; }
+void _ZdaPvRKSt9nothrow_t (void *, c_nothrow_p) { return; }
#endif /* __osf__ */
/* Wrap the delete nothrow symbols for usage with a single argument.
diff --git a/libitm/eh_cpp.cc b/libitm/eh_cpp.cc
--- a/libitm/eh_cpp.cc
+++ b/libitm/eh_cpp.cc
@@ -39,6 +39,14 @@ extern void *__cxa_begin_catch (void *)
extern void *__cxa_end_catch (void) WEAK;
extern void __cxa_tm_cleanup (void *, void *, unsigned int) WEAK;
+#ifdef __osf__ /* Really: !HAVE_WEAKDEF */
+void *__cxa_allocate_exception (size_t) { return NULL; }
+void __cxa_throw (void *, void *, void *) { return; }
+void *__cxa_begin_catch (void *) { return NULL; }
+void *__cxa_end_catch (void) { return NULL; }
+void __cxa_tm_cleanup (void *, void *, unsigned int) { return; }
+#endif
+
}
--
-
Rainer Orth, Center for Biotechnology, Bielefeld University
[testsuite] Skip simulate-thread tests on all alpha targets
Tru64 UNIX suffers from the same problems running the simulate-thread
tests as alpha-linux, even with gdb 7.3.1. To allow bootstraps/tests to
complete, I think those tests should be skipped on all alpha targets as
the following test does.
Ok for mainline?
Rainer
2011-11-16 Rainer Orth
* lib/gcc-simulate-thread.exp (simulate-thread): Skip on
alpha*-*-*.
# HG changeset patch
# Parent c431ad89954909a811a11b0f54ff94eb202dc89d
Skip simulate-thread tests on all alpha targets
diff --git a/gcc/testsuite/lib/gcc-simulate-thread.exp b/gcc/testsuite/lib/gcc-simulate-thread.exp
--- a/gcc/testsuite/lib/gcc-simulate-thread.exp
+++ b/gcc/testsuite/lib/gcc-simulate-thread.exp
@@ -23,9 +23,9 @@
proc simulate-thread { args } {
-# ??? Exit immediately if this is alpha*-*-linux* target, single-stepping
+# ??? Exit immediately if this is alpha*-*-* target, single-stepping
# executable between ldl_l and stl_c insns in gdb breaks LL/SC chaining.
-if { [istarget alpha*-*-linux*] } { return }
+if { [istarget alpha*-*-*] } { return }
if { ![isnative] || [is_remote target] } { return }
--
-
Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [PATCH, i386]: Optimize v2df (x2) -> v4sf,v4si conversion sequences for AVX.
On Tue, Nov 15, 2011 at 8:23 PM, Uros Bizjak wrote:
> Attached patch optimizes v2df (x2) -> v4sf,v4si conversion sequences
> for AVX from:
>
> vroundpd $1, 32(%rsp), %xmm1
> vroundpd $1, 48(%rsp), %xmm0
> vcvttpd2dqx %xmm1, %xmm1
> vcvttpd2dqx %xmm0, %xmm0
> vpunpcklqdq %xmm0, %xmm1, %xmm0
> vmovdqa %xmm0, 16(%rsp)
>
> to
>
> vroundpd $1, 64(%rsp), %xmm1
> vroundpd $1, 80(%rsp), %xmm0
> vinsertf128 $0x1, %xmm0, %ymm1, %ymm0
> vcvttpd2dqy %ymm0, %xmm0
> vmovdqa %xmm0, 32(%rsp)
>
> Ideally, this would be just "vcvtpd2psy 64(%rsp), %xmm0" or "vroundpd
> $1, 64(%rsp), %ymm1", but vectorizer does not (yet) support mixed
> vectorize factors.
Attached patch optimizes above code a step further, generating:
vmovapd 64(%rsp), %xmm0
vinsertf128 $0x1, 80(%rsp), %ymm0, %ymm0
vroundpd$1, %ymm0, %ymm0
vcvttpd2dqy %ymm0, %xmm0
vmovdqa %xmm0, 32(%rsp)
2011-11-16 Uros Bizjak
* config/i386/sse.md (round2_vec_pack_sfix): Optimize V2DFmode
sequence for AVX.
(_round_vec_pack_sfix): Ditto.
Tested on x86_64-pc-linux-gnu {,-m32} AVX target, committed to mainline SVN.
Uros.
Index: sse.md
===
--- sse.md (revision 181402)
+++ sse.md (working copy)
@@ -9962,17 +9962,32 @@
{
rtx tmp0, tmp1;
- tmp0 = gen_reg_rtx (mode);
- tmp1 = gen_reg_rtx (mode);
+ if (mode == V2DFmode
+ && TARGET_AVX && !TARGET_PREFER_AVX128)
+{
+ rtx tmp2 = gen_reg_rtx (V4DFmode);
- emit_insn
-(gen__round (tmp0, operands[1],
- operands[3]));
- emit_insn
-(gen__round (tmp1, operands[2],
- operands[3]));
- emit_insn
-(gen_vec_pack_sfix_trunc_ (operands[0], tmp0, tmp1));
+ tmp0 = gen_reg_rtx (V4DFmode);
+ tmp1 = force_reg (V2DFmode, operands[1]);
+
+ emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
+ emit_insn (gen_avx_roundpd256 (tmp2, tmp0, operands[3]));
+ emit_insn (gen_fix_truncv4dfv4si2 (operands[0], tmp2));
+}
+ else
+{
+ tmp0 = gen_reg_rtx (mode);
+ tmp1 = gen_reg_rtx (mode);
+
+ emit_insn
+ (gen__round (tmp0, operands[1],
+ operands[3]));
+ emit_insn
+ (gen__round (tmp1, operands[2],
+ operands[3]));
+ emit_insn
+ (gen_vec_pack_sfix_trunc_ (operands[0], tmp0, tmp1));
+}
DONE;
})
@@ -10053,14 +10068,29 @@
{
rtx tmp0, tmp1;
- tmp0 = gen_reg_rtx (mode);
- tmp1 = gen_reg_rtx (mode);
+ if (mode == V2DFmode
+ && TARGET_AVX && !TARGET_PREFER_AVX128)
+{
+ rtx tmp2 = gen_reg_rtx (V4DFmode);
- emit_insn (gen_round2 (tmp0, operands[1]));
- emit_insn (gen_round2 (tmp1, operands[2]));
+ tmp0 = gen_reg_rtx (V4DFmode);
+ tmp1 = force_reg (V2DFmode, operands[1]);
- emit_insn
-(gen_vec_pack_sfix_trunc_ (operands[0], tmp0, tmp1));
+ emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2]));
+ emit_insn (gen_roundv4df2 (tmp2, tmp0));
+ emit_insn (gen_fix_truncv4dfv4si2 (operands[0], tmp2));
+}
+ else
+{
+ tmp0 = gen_reg_rtx (mode);
+ tmp1 = gen_reg_rtx (mode);
+
+ emit_insn (gen_round2 (tmp0, operands[1]));
+ emit_insn (gen_round2 (tmp1, operands[2]));
+
+ emit_insn
+ (gen_vec_pack_sfix_trunc_ (operands[0], tmp0, tmp1));
+}
DONE;
})
[libitm] Support Solaris 8 and 9/x86 with Sun as
libitm failed to build on Solaris 8 and 9/x86 with the native assembler, which lacks support for .hidden. The following patch deals with that by explicitly using the PIC code sequence, as inspired by libffi/src/x86/sysv.S. It allows libitm to build on i386-pc-solaris2.8, and testsuite results are even better than those using gas, insofar as PASS: libitm.c++/eh-1.C execution test now passes while it fails with gas. The failure with gas may be due to the fact that 32-bit Solaris/x86 requires datarel encoding in .eh_frame, while the .cfi* directives generate pcrel encoding instead. Ok for mainline? Rainer 2011-11-14 Rainer Orth * config/generic/asmcfi.h: Fix comment. * config/x86/sjlj.S (_ITM_beginTransaction): Provide PIC code sequence without .hidden support. (GTM_longjmp) [__ELF__]: Only use .hidden if HAVE_ATTRIBUTE_VISIBILITY. # HG changeset patch # Parent a4b91d01cafd53f7eb10bf132dea527d85a3e228 Support Solaris 8 and 9/x86 with Sun as diff --git a/libitm/config/generic/asmcfi.h b/libitm/config/generic/asmcfi.h --- a/libitm/config/generic/asmcfi.h +++ b/libitm/config/generic/asmcfi.h @@ -41,4 +41,4 @@ #define cfi_def_cfa(r,n) #define cfi_register(o,n) -#endif /* HAVE_ASM_CFI */ +#endif /* HAVE_AS_CFI_PSEUDO_OP */ diff --git a/libitm/config/x86/sjlj.S b/libitm/config/x86/sjlj.S --- a/libitm/config/x86/sjlj.S +++ b/libitm/config/x86/sjlj.S @@ -60,7 +60,18 @@ _ITM_beginTransaction: movl %edi, 20(%esp) movl %ebp, 24(%esp) leal 8(%esp), %edx +#if defined HAVE_ATTRIBUTE_VISIBILITY || !defined __PIC__ call GTM_begin_transaction +#else + subl $4, %esp + movl %ebx, 24(%esp) + call 1f +1: popl %ebx + addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx + call GTM_begin_transaction@PLT + movl 24(%esp), %ebx + addl $4, %esp +#endif addl $28, %esp cfi_def_cfa_offset(4) ret @@ -108,7 +119,9 @@ GTM_longjmp: #ifdef __ELF__ .type GTM_longjmp, @function +#ifdef HAVE_ATTRIBUTE_VISIBILITY .hidden GTM_longjmp +#endif .size GTM_longjmp, .-GTM_longjmp #endif -- - Rainer Orth, Center for Biotechnology, Bielefeld University
[PATCH, committed] Handle NULL decl in rs6000_xcoff_section_type_flags
This patch fixes part of PR other/51174. rs6000_xcoff_section_type_flags() can be called with a NULL decl. This feature only was used on ELF paths which never called this XCOFF function. Bootstrapped on powerpc-ibm-aix5.3.0.0. - David * config/rs6000/rs6000.c (rs6000_xcoff_section_type_flags): Default to minimum alignment if decl is NULL. Index: rs6000.c === *** rs6000.c(revision 181421) --- rs6000.c(working copy) *** rs6000_xcoff_section_type_flags (tree de *** 25782,25788 unsigned int flags = default_section_type_flags (decl, name, reloc); /* Align to at least UNIT size. */ ! if (flags & SECTION_CODE) align = MIN_UNITS_PER_WORD; else /* Increase alignment of large objects if not already stricter. */ --- 25782,25788 unsigned int flags = default_section_type_flags (decl, name, reloc); /* Align to at least UNIT size. */ ! if (flags & SECTION_CODE || !decl) align = MIN_UNITS_PER_WORD; else /* Increase alignment of large objects if not already stricter. */
Re: [testsuite] Skip simulate-thread tests on all alpha targets
On 11/16/2011 08:31 AM, Rainer Orth wrote: > 2011-11-16 Rainer Orth > > * lib/gcc-simulate-thread.exp (simulate-thread): Skip on > alpha*-*-*. Ok. r~
Re: [libitm] Provide all dummy functions in alloc_cpp.cc, eh_cpp.cc
On 11/16/2011 08:28 AM, Rainer Orth wrote: > 2011-11-16 Rainer Orth > > * alloc_cpp.cc [__osf__] (_ZnwX, _ZdlPv, _ZnaX, _ZdaPv, > _ZnwXRKSt9nothrow_t, _ZdlPvRKSt9nothrow_t, _ZdaPvRKSt9nothrow_t): > Dummy functions. > * eh_cpp.cc [__osf__] (__cxa_allocate_exception, __cxa_throw, > __cxa_begin_catch, __cxa_end_catch, __cxa_tm_cleanup): Likewise. Ok. r~
Re: [patch] trans-mem: Support noexcept specifications for transaction statements and expressions.
Here is a revised version of the patch. It still fails when combined
with transaction expressions (noexcept-4.C and noexcept-1.C) because
gimplify_must_not_throw_expr() calls voidify_wrapper_expr() on a
MUST_NOT_THROW_EXPR which it doesn't know to be a wrapper. What's the
cleanest way to solve that? Adding handling of MUST_NOT_THROW_EXPR
inside voidify_... will include C++ stuff there, right? Or should there
be a C++ version of voidify_...? Or something else?
Jason, I also addressed your other previous comments regarding not
adding MUST_NOT_THROW_EXPR until instantiation time, except...
On Mon, 2011-11-07 at 23:12 -0500, Jason Merrill wrote:
> On 11/07/2011 10:42 PM, Torvald Riegel wrote:
> > + noex = tsubst_copy_and_build (noex, args, complain, in_decl,
> > + /*function_p=*/false,
> > + /*integral_const_expr_p=*/true);
> > + noex = build_noexcept_spec (TREE_PURPOSE (noex),
> > + tf_warning_or_error);
>
> If you're going to pull the TREE_PURPOSE out, you might as well do that
> before tsubsting rather than after.
... this one. I tried that, but this failed when I tried to use the
purpose obtained before tsubst for the call to build_noexcept_spec.
diff --git a/gcc/c-parser.c b/gcc/c-parser.c
index b88b11f..e1ce35f 100644
--- a/gcc/c-parser.c
+++ b/gcc/c-parser.c
@@ -10703,7 +10703,8 @@ c_parser_transaction_expression (c_parser *parser, enum rid keyword)
{
tree expr = c_parser_expression (parser).value;
ret.original_type = TREE_TYPE (expr);
- ret.value = build1 (TRANSACTION_EXPR, ret.original_type, expr);
+ ret.value = build2 (TRANSACTION_EXPR, ret.original_type, expr,
+ NULL_TREE);
if (this_in & TM_STMT_ATTR_RELAXED)
TRANSACTION_EXPR_RELAXED (ret.value) = 1;
SET_EXPR_LOCATION (ret.value, loc);
diff --git a/gcc/c-typeck.c b/gcc/c-typeck.c
index 4a134b0..f015ff6 100644
--- a/gcc/c-typeck.c
+++ b/gcc/c-typeck.c
@@ -10930,7 +10930,7 @@ c_finish_omp_clauses (tree clauses)
tree
c_finish_transaction (location_t loc, tree block, int flags)
{
- tree stmt = build_stmt (loc, TRANSACTION_EXPR, block);
+ tree stmt = build_stmt (loc, TRANSACTION_EXPR, block, NULL_TREE);
if (flags & TM_STMT_ATTR_OUTER)
TRANSACTION_EXPR_OUTER (stmt) = 1;
if (flags & TM_STMT_ATTR_RELAXED)
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index fe50e34..6c5042b 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -5564,8 +5564,8 @@ extern void finish_omp_barrier (void);
extern void finish_omp_flush (void);
extern void finish_omp_taskwait (void);
extern tree begin_transaction_stmt (location_t, tree *, int);
-extern void finish_transaction_stmt (tree, tree, int);
-extern tree build_transaction_expr (location_t, tree, int);
+extern void finish_transaction_stmt (tree, tree, int, tree);
+extern tree build_transaction_expr (location_t, tree, int, tree);
extern void finish_omp_taskyield (void);
extern bool cxx_omp_create_clause_info (tree, tree, bool, bool, bool);
extern tree baselink_for_fns(tree);
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index f839112..a9246e1 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -19482,19 +19482,17 @@ cp_parser_base_specifier (cp_parser* parser)
/* Exception handling [gram.exception] */
-/* Parse an (optional) exception-specification.
+/* Parse an (optional) noexcept-specification.
- exception-specification:
- throw ( type-id-list [opt] )
+ noexcept-specification:
+ noexcept ( constant-expression ) [opt]
- Returns a TREE_LIST representing the exception-specification. The
- TREE_VALUE of each node is a type. */
+ Returns a noexcept specification, or NULL_TREE. */
static tree
-cp_parser_exception_specification_opt (cp_parser* parser)
+cp_parser_noexcept_specification_opt (cp_parser* parser)
{
cp_token *token;
- tree type_id_list;
const char *saved_message;
/* Peek at the next token. */
@@ -19527,6 +19525,32 @@ cp_parser_exception_specification_opt (cp_parser* parser)
return build_noexcept_spec (expr, tf_warning_or_error);
}
+ else
+return NULL_TREE;
+}
+
+/* Parse an (optional) exception-specification.
+
+ exception-specification:
+ throw ( type-id-list [opt] )
+
+ Returns a TREE_LIST representing the exception-specification. The
+ TREE_VALUE of each node is a type. */
+
+static tree
+cp_parser_exception_specification_opt (cp_parser* parser)
+{
+ cp_token *token;
+ tree type_id_list;
+ const char *saved_message;
+
+ /* Peek at the next token. */
+ token = cp_lexer_peek_token (parser->lexer);
+
+ /* Is it a noexcept-specification? */
+ type_id_list = cp_parser_noexcept_specification_opt(parser);
+ if (type_id_list != NULL_TREE)
+return type_id_list;
/* If it's not `throw', then there's no exception-specification. */
if (!cp_parser_is_keyword (token, RID_THROW)
Re: [libitm] Support Solaris 8 and 9/x86 with Sun as
On 11/16/2011 08:38 AM, Rainer Orth wrote: > * config/generic/asmcfi.h: Fix comment. > * config/x86/sjlj.S (_ITM_beginTransaction): Provide PIC code > sequence without .hidden support. > (GTM_longjmp) [__ELF__]: Only use .hidden if > HAVE_ATTRIBUTE_VISIBILITY. Nearly ok. > + subl$4, %esp > + movl%ebx, 24(%esp) > + call1f > +1: popl%ebx > + addl$_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx > + callGTM_begin_transaction@PLT > + movl24(%esp), %ebx > + addl$4, %esp This is overly complicated. We've saved %ebx at 12(%esp) above. This should be as simple as call1f 1: popl%ebx addl$_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx callGTM_begin_transaction@PLT movl12(%esp), %ebx It also needs wrapping like #elif defined(__ELF__) ... #else # error "Unsupported PIC sequence" #endif ... which will almost certainly immediately fail on Darwin, but at least not with some reference to @PLT. r~
Re: [libitm] Support Solaris 8 and 9/x86 with Sun as
On 16 Nov 2011, at 19:12, Richard Henderson wrote: On 11/16/2011 08:38 AM, Rainer Orth wrote: * config/generic/asmcfi.h: Fix comment. * config/x86/sjlj.S (_ITM_beginTransaction): Provide PIC code sequence without .hidden support. (GTM_longjmp) [__ELF__]: Only use .hidden if HAVE_ATTRIBUTE_VISIBILITY. Nearly ok. + subl$4, %esp + movl%ebx, 24(%esp) + call1f +1: popl%ebx + addl$_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx + callGTM_begin_transaction@PLT + movl24(%esp), %ebx + addl$4, %esp This is overly complicated. We've saved %ebx at 12(%esp) above. This should be as simple as call1f 1: popl%ebx addl$_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx callGTM_begin_transaction@PLT movl12(%esp), %ebx It also needs wrapping like #elif defined(__ELF__) ... #else # error "Unsupported PIC sequence" #endif ... which will almost certainly immediately fail on Darwin, but at least not with some reference to @PLT. we have the equivalent of hidden on Darwin : .private_extern I will try and get back to this .. been busy with other stuff at the moment the two things top issues remaining on Darwn are: 1. underscores for the ASM functions. .. Darwin's asm will not add an underscore to functions .. so we end up with unresolved refs to __ITM_beginTransaction/GTM_... 2. providing a section name for .tm_clone_section that is compatible with Mach-o section semantics. I've hacked around this for my tests by making a target macro, but maybe you have some other preference. Iain
C++ Patch for c++/51141
Hi, This patch fixes c++/51141, we simply need to strip the USING_DECL. Tested x86_64-unknown-linux-gnu. OK to commit ? gcc/testsuite/ChangeLog 2011-11-15 Fabien Chêne PR c++/51141 * g++.dg/lookup/using46.C: New. gcc/cp/ChangeLog 2011-11-15 Fabien Chêne PR c++/51141 * pt.c (tsubst_copy_and_build): Call strip_using_decl after looking up a name of an IDENTIFIER_NODE. -- Fabien 51141.patch Description: Binary data
Re: Make x86-elf use DWARF-2 not stabs
On 11/15/2011 02:35 PM, Joseph S. Myers wrote: > 2011-11-15 Joseph Myers > > * config/i386/i386elf.h (PREFERRED_DEBUGGING_TYPE): Remove. Ok. r~
Re: [google] Backport r171347 from trunk to google/gcc-4_6 (issue5396043)
Thanks Richard. I will wait for that patch. -Doug On Wed, Nov 16, 2011 at 8:41 AM, Richard Earnshaw wrote: > On 16/11/11 08:51, Doug Kwan wrote: >> This patch backports the upstream fix in r171347 for a problem caused by >> change in volatile bitfield access. This is tested by building the >> x86 toolchain with tests and checking that volatile bitfield access worked >> on ARM. This is a backport for 4.6 only. >> >> 2011-11-16 Doug Kwan >> >> Backport r171347 from trunk. >> >> 2011-03-23 Julian Brown >> >> * expr.c (expand_expr_real_1): Only use BLKmode for volatile >> accesses which are not naturally aligned. >> > So Joey Ye posted the following patch, which I think is needed to fix a > regression that that patch introduces. > > http://gcc.gnu.org/ml/gcc-patches/2011-11/msg01390.html > > However, it's not been reviewed yet :-( > > R. > >
Re: [Patch,Fortran] PR39427/37829 - implement F2003's constructors
Paul Richard Thomas wrote: I think that a comment is in order every time that you exploit the upper/lower case distinction. OK for trunk. Thanks for the review and thanks for the comment. I have now added some comments to symbol.c's gfc_undo_symbols, decl.c's gfc_match_decl_type_spec and gfc_match_import, and to module.c's dt_lower_string and dt_upper_string. Since the changes were that minor and the patch is that large, I have not included the committed patch here. The commit was Rev. 181425. See also http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=181425 Tobias
[Patch, wwwdocs, committed] Update Fortran section in gcc-4.7/changes.html
I have committed the following patch for http://gcc.gnu.org/gcc-4.7/changes.html#fortran Changes - Link F2003/F2008 sections to the wiki which gives the implementation status - Update backtrace information (Janne's changes from http://gcc.gnu.org/wiki/GFortran#GCC4.7) - Mention the just committed constructor support Tobias Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v retrieving revision 1.56 diff -p -u -r1.56 changes.html --- changes.html 8 Nov 2011 11:49:53 - 1.56 +++ changes.html 16 Nov 2011 22:05:44 - @@ -374,11 +374,22 @@ Ptrip; // decltype(ip) is int* The http://gcc.gnu.org/onlinedocs/gfortran/Debugging-Options.html#index-g_t_0040code_007bfno_002dbacktrace_007d-183"; >-fbacktrace option is now enabled by default. - When encountering a serious error, gfortran will attempt to + When encountering a fatal error, gfortran will attempt to print a backtrace to standard error before aborting. It can be - disabled with -fno-backtrace. Note: GNU Fortran does - not support backtracing on all targets. -Fortran 2008: + disabled with -fno-backtrace. Note: On POSIX targets + with the addr2line utility from GNU binutils, GNU + Fortran can print a backtrace with function name, file name, + line number information in addition to the addresses; otherwise + only the addresses are printed. +http://gcc.gnu.org/wiki/Fortran2003Status";>Fortran 2003: + + Generic interface name which have the same name as derived types + are now supported, which allows to write constructor functions. Note + that Fortran does not support static constructor functions; only + default initialization or an explicit structure-constructor + initialization are available. + +http://gcc.gnu.org/wiki/Fortran2008Status";>Fortran 2008: Support for the DO CONCURRENT construct has been added, which allows the user to specify that individual loop @@ -390,7 +401,7 @@ Ptr ip; // decltype(ip) is int* coarray communication library has been added. Note: Remote coarray access is not yet possible. -TS 29113: +http://gcc.gnu.org/wiki/TS29113Status";>TS 29113: New flag http://gcc.gnu.org/onlinedocs/gfortran/Fortran-Dialect-Options.html#index-g_t_0040code_007bstd_003d_007d_0040var_007bstd_007d-option-53";
[PATCH] Fix __atomic_compare_exchange library call and tests
__atomic_compare_exchange has 6 parameters of which one is a boolean
indicating whether its the weak or strong variation.
The external library doesn't bother with the weak condition, so it only
has 5 parameters. When generating the external call for the size
specific __atomic_compare_exchange_N variations, that parameter wasn't
being removed. It also wasn't being caught by the tests, so I modified
the existing testcases to expect certain values and to make sure they
are right.
Bootstraps on x86_64-unknown-linux-gnu with no new regressions.
Andrew
* builtins.c (expand_builtin): Remove 4th parameter representing
weak/strong mode when __atomic_compare_exchange becomes a library call.
testsuite
* gcc.dg/atomic-generic-aux.c (__atomic_compare_exchange): Fail if
memory model parameters don't match expected values.
* gcc.dg/atomic-generic.c: Pass specific memory model parameters to
__atomic_compare_exchange.
* gcc.dg/atomic-noinline.c: Pass specific memory model parameters to
__atomic_compare_exchange_n.
* gcc.dg/atomic-noinline-aux.c (__atomic_compare_exchange_2): Remove
weak/strong parameter and fail if memory models aren't correct.
Index: builtins.c
===
*** builtins.c (revision 181350)
--- builtins.c (working copy)
*** expand_builtin (tree exp, rtx target, rt
*** 6578,6589
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_4:
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_8:
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_16:
! mode =
! get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_COMPARE_EXCHANGE_1);
! target = expand_builtin_atomic_compare_exchange (mode, exp, target);
! if (target)
! return target;
! break;
case BUILT_IN_ATOMIC_LOAD_1:
case BUILT_IN_ATOMIC_LOAD_2:
--- 6578,6605
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_4:
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_8:
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_16:
! {
! unsigned int nargs, z;
! VEC(tree,gc) *vec;
!
! mode =
! get_builtin_sync_mode (fcode - BUILT_IN_ATOMIC_COMPARE_EXCHANGE_1);
! target = expand_builtin_atomic_compare_exchange (mode, exp, target);
! if (target)
! return target;
!
! /* If this is turned into an external library call, the weak parameter
! must be dropped to match the expected parameter list. */
! nargs = call_expr_nargs (exp);
! vec = VEC_alloc (tree, gc, nargs - 1);
! for (z = 0; z < 3; z++)
! VEC_quick_push (tree, vec, CALL_EXPR_ARG (exp, z));
! /* Skip the boolean weak parameter. */
! for (z = 4; z < 6; z++)
! VEC_quick_push (tree, vec, CALL_EXPR_ARG (exp, z));
! exp = build_call_vec (TREE_TYPE (exp), CALL_EXPR_FN (exp), vec);
! break;
! }
case BUILT_IN_ATOMIC_LOAD_1:
case BUILT_IN_ATOMIC_LOAD_2:
Index: testsuite/gcc.dg/atomic-generic-aux.c
===
*** testsuite/gcc.dg/atomic-generic-aux.c (revision 181350)
--- testsuite/gcc.dg/atomic-generic-aux.c (working copy)
*** __atomic_exchange (size_t size, void *ob
*** 19,35
}
bool
! __atomic_compare_exchange (size_t size, void *obj, void *expected,
void *desired, int model1, int model2)
{
if (!memcmp (obj, expected, size))
{
memcpy (obj, desired, size);
! return true;
}
! memcpy (expected, obj, size);
! return false;
}
--- 19,48
}
+ /* Note that the external version of this routine has the boolean weak/strong
+parameter removed. This is required by teh external library. */
bool
! __atomic_compare_exchange (size_t size, void *obj, void *expected,
void *desired, int model1, int model2)
{
+ bool ret;
if (!memcmp (obj, expected, size))
{
memcpy (obj, desired, size);
! ret = true;
}
! else
! {
! memcpy (expected, obj, size);
! ret = false;
! }
!
! /* Make sure the parameters have been properly adjusted for the external
! function call (no weak/strong parameter. */
! if (model1 != __ATOMIC_SEQ_CST || model2 != __ATOMIC_ACQUIRE)
! ret = !ret;
!
! return ret;
}
Index: testsuite/gcc.dg/atomic-generic.c
===
*** testsuite/gcc.dg/atomic-generic.c (revision 181350)
--- testsuite/gcc.dg/atomic-generic.c (working copy)
*** main ()
*** 41,52
if (memcmp (&b, &ones, size))
abort ();
! if (!__atomic_compare_exchange (&a, &b, &zero, false, __ATOMIC_RELAXED,
__ATOMIC_RELAXED))
abort();
if (memcmp (&a, &zero, size))
abort ();
! if (__atomic_compare_exchange (&a, &b, &ones, false, __ATOMIC_RELAXED,
__
Re: Fix PRs 50644,50741, segfaults in set_is_used
On Wed, Nov 16, 2011 at 6:02 PM, Michael Matz wrote:
> Hi,
>
> this patch fixes both problems by using the same condition as
> add_referenced_var uses to guard walking into initializers. I've
> considered some other solutions but the real nice one (merging local_decls
> and referenced_vars, and not using annotations for the used flag) doesn't
> seem appropriate for stage 3, and all the other ones would just look
> similar.
>
> I've deviated from richis proposed patch in 50741 in that I guard only
> walking into initializers of non-local vars, but still add those vars
> itself (so the invariant that all variables that are somehow mentioned in
> any instruction are in referenced_vars still holds).
>
> This doesn't fix the fortran PR50640 (select_type_12 segfault). This
> testcase shows two problems, one is fixed by this patch, the other
> remains. As the audit trail explains the fortran frontend really
> should present different code.
>
> Regstrapping for x86_64-linux in progress (all languages+Ada). Okay if
> that passes?
Ok.
Thanks,
Richard.
>
> Ciao,
> Michael.
>
> PR middle-end/50644
> PR middle-end/50741
>
> * tree-ssa-live.c (mark_all_vars_used_1): Recurse only for decls of
> current function.
> (remove_unused_locals): Ditto.
>
> testsuite/
> PR middle-end/50644
> PR middle-end/50741
>
> * g++.dg/tree-ssa/pr50741.C: New.
>
> Index: tree-ssa-live.c
> ===
> --- tree-ssa-live.c (revision 181172)
> +++ tree-ssa-live.c (working copy)
> @@ -374,7 +374,8 @@ mark_all_vars_used_1 (tree *tp, int *wal
> eliminated as unused. */
> if (TREE_CODE (t) == VAR_DECL)
> {
> - if (data != NULL && bitmap_clear_bit ((bitmap) data, DECL_UID (t)))
> + if (data != NULL && bitmap_clear_bit ((bitmap) data, DECL_UID (t))
> + && DECL_CONTEXT (t) == current_function_decl)
> mark_all_vars_used (&DECL_INITIAL (t), data);
> set_is_used (t);
> }
> @@ -836,7 +837,8 @@ remove_unused_locals (void)
> if (TREE_CODE (var) == VAR_DECL
> && is_global_var (var)
> && var_ann (var) != NULL
> - && is_used_p (var))
> + && is_used_p (var)
> + && DECL_CONTEXT (var) == current_function_decl)
> mark_all_vars_used (&DECL_INITIAL (var), global_unused_vars);
>
> num = VEC_length (tree, cfun->local_decls);
> Index: testsuite/g++.dg/tree-ssa/pr50741.C
> ===
> --- testsuite/g++.dg/tree-ssa/pr50741.C (revision 0)
> +++ testsuite/g++.dg/tree-ssa/pr50741.C (revision 0)
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -g" } */
> +/* PR middle-end/50741 */
> +
> +struct PublishLo
> +{
> + const char *functionName;
> + ~PublishLo();
> +};
> +struct A { A(); };
> +A::A()
> +{
> + static PublishLo _rL_53 = {__FUNCTION__};
> +}
>
PR 44707 testcase failure
Hi, Uli and Jakub,
I noticed that gcc.c-torture/compile/pr44707.c fails on AIX because it
generates invalid assembly language:
# 12 "/farm/dje/src/src/gcc/testsuite/gcc.c-torture/compile/pr44707.c" 1
/* 0(6) 0(7) 0(8) 0(9) 0(10) */
# 0 "" 2
I'm confused why
__asm__ volatile ("/* %0 %1 %2 %3 %4 */" : : "nro" (e1), "nro" (e2), "nro" (e3
is suppose to be valid on all targets when assembled.
Should this testcase use
/* { dg-do compile } */
to prevent attempt at assembly?
Thanks, David
Fix alias set of memories created for atomic ops
Both Alpha and PPC create aligned memories for sub-word
atomic ops. Neither were updated when ALIAS_SET_MEMORY_BARRIER
was invented.
I've no test case that fails because of this, just found
by inspection.
Built cross-compilers to both targets. Committed.
r~
* config/alpha/alpha.c (alpha_split_compare_and_swap_12): Copy
ALIAS_SET_MEMORY_BARRIER when creating a new memory.
(alpha_split_atomic_exchange_12): Likewise.
* config/rs6000/rs6000.c (rs6000_adjust_atomic_subword): Likewise.
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 78717f9..e970227 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -,6 +,8 @@ alpha_split_compare_and_swap_12 (rtx operands[])
mem = gen_rtx_MEM (DImode, align);
MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
+ if (MEM_ALIAS_SET (orig_mem) == ALIAS_SET_MEMORY_BARRIER)
+set_mem_alias_set (mem, ALIAS_SET_MEMORY_BARRIER);
alpha_pre_atomic_barrier (mod_s);
@@ -4583,6 +4585,8 @@ alpha_split_atomic_exchange_12 (rtx operands[])
mem = gen_rtx_MEM (DImode, align);
MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
+ if (MEM_ALIAS_SET (orig_mem) == ALIAS_SET_MEMORY_BARRIER)
+set_mem_alias_set (mem, ALIAS_SET_MEMORY_BARRIER);
alpha_pre_atomic_barrier (model);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 4436ed0..199c639 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -17244,16 +17244,16 @@ rs6000_post_atomic_barrier (enum memmodel model)
which to shift and mask. */
static rtx
-rs6000_adjust_atomic_subword (rtx mem, rtx *pshift, rtx *pmask)
+rs6000_adjust_atomic_subword (rtx orig_mem, rtx *pshift, rtx *pmask)
{
- rtx addr, align, shift, mask;
+ rtx addr, align, shift, mask, mem;
HOST_WIDE_INT shift_mask;
- enum machine_mode mode = GET_MODE (mem);
+ enum machine_mode mode = GET_MODE (orig_mem);
/* For smaller modes, we have to implement this via SImode. */
shift_mask = (mode == QImode ? 0x18 : 0x10);
- addr = XEXP (mem, 0);
+ addr = XEXP (orig_mem, 0);
addr = force_reg (GET_MODE (addr), addr);
/* Aligned memory containing subword. Generate a new memory. We
@@ -17262,7 +17262,9 @@ rs6000_adjust_atomic_subword (rtx mem, rtx *pshift, rtx
*pmask)
align = expand_simple_binop (Pmode, AND, addr, GEN_INT (-4),
NULL_RTX, 1, OPTAB_LIB_WIDEN);
mem = gen_rtx_MEM (SImode, align);
- MEM_VOLATILE_P (mem) = 1;
+ MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
+ if (MEM_ALIAS_SET (orig_mem) == ALIAS_SET_MEMORY_BARRIER)
+set_mem_alias_set (mem, ALIAS_SET_MEMORY_BARRIER);
/* Shift amount for subword relative to aligned word. */
shift = gen_reg_rtx (SImode);
Re: [PATCH] Fix __atomic_compare_exchange library call and tests
On 11/16/2011 12:10 PM, Andrew MacLeod wrote: > > > * builtins.c (expand_builtin): Remove 4th parameter representing > weak/strong mode when __atomic_compare_exchange becomes a library call. > > testsuite > * gcc.dg/atomic-generic-aux.c (__atomic_compare_exchange): Fail if > memory model parameters don't match expected values. > * gcc.dg/atomic-generic.c: Pass specific memory model parameters to > __atomic_compare_exchange. > * gcc.dg/atomic-noinline.c: Pass specific memory model parameters to > __atomic_compare_exchange_n. > * gcc.dg/atomic-noinline-aux.c (__atomic_compare_exchange_2): Remove > weak/strong parameter and fail if memory models aren't correct. > Ok. r~
[google] fix error caught by TREE_CHECKING (issue5401045)
Fix a regression introduced in r180971. Only applicable to LIPO.
For google branch only.
Tested with internal benchmark suite.
Thanks,
-Rong
2011-11-16 Rong Xu
* gcc/dwarf2out.c: use TYPE_CONTEXT to get the context for types.
Index: gcc/dwarf2out.c
===
--- gcc/dwarf2out.c (revision 181431)
+++ gcc/dwarf2out.c (working copy)
@@ -19764,10 +19764,6 @@
{
struct cgraph_node *node;
-orig_decl = DECL_ORIGIN (decl_context);
-while (orig_decl != DECL_ORIGIN (orig_decl))
- orig_decl = DECL_ORIGIN (orig_decl);
-
/* Refer to cgraph_mark_functions_to_output() in cgraphunit.c,
if cgraph_is_aux_decl_external() is true,
this function will not be output in LIPO mode. */
@@ -19777,6 +19773,16 @@
cgraph_is_aux_decl_external (node))
return;
+if (TREE_CODE_CLASS (TREE_CODE (decl_context)) == tcc_type)
+ {
+decl_context = TYPE_CONTEXT (decl_context);
+continue;
+ }
+
+orig_decl = DECL_ORIGIN (decl_context);
+while (orig_decl != DECL_ORIGIN (orig_decl))
+ orig_decl = DECL_ORIGIN (orig_decl);
+
decl_context = DECL_CONTEXT (orig_decl);
}
}
--
This patch is available for review at http://codereview.appspot.com/5401045
Re: [google] fix error caught by TREE_CHECKING (issue 5401045)
Ok for google branches.
David
http://codereview.appspot.com/5401045/diff/1/gcc/dwarf2out.c
File gcc/dwarf2out.c (right):
http://codereview.appspot.com/5401045/diff/1/gcc/dwarf2out.c#newcode19777
gcc/dwarf2out.c:19777: {
Use TYPE_P (decl_context)
http://codereview.appspot.com/5401045/
[arm-embedded] Backport mainline r178102 and partial r172017
Backport mainline 178102 and partial r172017 to ARM/embedded-4_6-branch. Committed. 2011-11-17 Jiangning Liu Backport r178102 from mainline 2011-08-26 Jiangning Liu * config/arm/arm.md (*ior_scc_scc): Enable for Thumb2 as well. (*ior_scc_scc_cmp): Likewise (*and_scc_scc): Likewise. (*and_scc_scc_cmp): Likewise. (*and_scc_scc_nodom): Likewise. (*cmp_ite0, *cmp_ite1, *cmp_and, *cmp_ior): Handle Thumb2. Partially backport r172017 from mainline 2011-04-06 Wei Guozhi * config/arm/constraints.md (Py): New constraint. testsuite: 2011-11-17 Jiangning Liu Backport r178102 from mainline 2011-08-26 Jiangning Liu * gcc.target/arm/thumb2-cond-cmp-1.c: New. * gcc.target/arm/thumb2-cond-cmp-2.c: Likewise. * gcc.target/arm/thumb2-cond-cmp-3.c: Likewise. * gcc.target/arm/thumb2-cond-cmp-4.c: Likewise.
Re: [PATCH] PR50325 store_bit_field: Fix for big endian targets
Andreas, This patch seems to have introduced a failure for all of the gcc.dg-struct-layout tests on AIX. gcc.dg-struct-layout-1/t001_test.h:8:1: internal compiler error: in int_mode_for_mode, at stor-layout.c:424 After your change, int_mode_for_mode now is passed VOIDmode because the rtx is a CONST_INT. (gdb) where #0 fancy_abort (file=0x112b2628 , line=424, function=0x112b271c ) at /farm/dje/src/src/gcc/diagnostic.c:899 #1 0x1045ff14 in int_mode_for_mode (mode=VOIDmode) at /farm/dje/src/src/gcc/stor-layout.c:424 #2 0x10803734 in extract_bit_field_1 (str_rtx=0x7032cdc0, bitsize=27, bitnum=0, unsignedp=1, packedp=0 ', target=0x0, mode=BLKmode, tmode=SImode, fallback_p=1 ') at /farm/dje/src/src/gcc/expmed.c:1304 #3 0x1080567c in extract_bit_field (str_rtx=0x7032cdc0, bitsize=27, bitnum=0, unsignedp=1, packedp=0 ', target=0x0, mode=BLKmode, tmode=SImode) at /farm/dje/src/src/gcc/expmed.c:1688 #4 0x107fff60 in store_bit_field_1 (str_rtx=0x7032cae0, bitsize=59, bitnum=0, bitregion_start=0, bitregion_end=0, fieldmode=DImode, value=0x7032caf0, fallback_p=1 ') at /farm/dje/src/src/gcc/expmed.c:568 #5 0x10801578 in store_bit_field (str_rtx=0x7032cae0, bitsize=59, bitnum=0, bitregion_start=0, bitregion_end=0, fieldmode=VOIDmode, value=0x7032caf0) at /farm/dje/src/src/gcc/expmed.c:852 #6 0x10624258 in store_field (target=0x7032cae0, bitsize=59, bitpos=0, bitregion_start=0, bitregion_end=0, mode=VOIDmode, exp=0x7015c3a0, type=0x70159360, alias_set=0, nontemporal=0 ') at /farm/dje/src/src/gcc/expr.c:6432 (gdb) up #2 0x10803734 in extract_bit_field_1 (str_rtx=0x7032cdc0, bitsize=27, bitnum=0, unsignedp=1, packedp=0 ', target=0x0, mode=BLKmode, tmode=SImode, fallback_p=1 ') at /farm/dje/src/src/gcc/expmed.c:1304 1304enum machine_mode imode = int_mode_for_mode (GET_MODE (op0)); (gdb) print op0 $5 = (rtx) 0x7032cdc0 (gdb) pr (const_int 3673047 [0x380bd7]) (gdb) up #3 0x1080567c in extract_bit_field (str_rtx=0x7032cdc0, bitsize=27, bitnum=0, unsignedp=1, packedp=0 ', target=0x0, mode=BLKmode, tmode=SImode) at /farm/dje/src/src/gcc/expmed.c:1688 1688 return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp, packedp, (gdb) print str_rtx $6 = (rtx) 0x7032cdc0 (gdb) pr (const_int 3673047 [0x380bd7]) Thanks, David
