[Bug tree-optimization/53114] New: Extra load store/instructions compared to gcc-3.4 on ARM

[mr.kayrick at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53114

 Bug #: 53114
   Summary: Extra load store/instructions compared to gcc-3.4 on
ARM
Classification: Unclassified
   Product: gcc
   Version: unknown
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: tree-optimization
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: mr.kayr...@gmail.com


Created attachment 27236
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27236
Shell sort function

Hi guys,
I have a test case (shell sort, see attached) compiled with different
ARM compilers:
GCC-4.6.3, GCC-3.4.6, and ARMCC.

Both ARMCC and GCC-3.4.6  generate quite optimal assembly while GCC-4.6.3
inserts extra load/store instructions compared to the other compilers.

Can the SSA representation usage in modern GCC be the reason for this?

If so, has anyone tried to do something about it?

% armcc
ARM C/C++ Compiler, 4.1 [Build 713]

The file has been compiled with following options:
for GCC:
-O3
for ARMCC:
-O3 -Otime

[Bug tree-optimization/53114] Extra load store/instructions compared to gcc-3.4 on ARM

[mr.kayrick at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53114

--- Comment #1 from Alexey Kravets  2012-04-25 
13:35:47 UTC ---
Created attachment 27237
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27237
Assembly generated by ARMCC

[Bug tree-optimization/53114] Extra load store/instructions compared to gcc-3.4 on ARM

[mr.kayrick at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53114

--- Comment #2 from Alexey Kravets  2012-04-25 
13:36:35 UTC ---
Created attachment 27238
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27238
Assembly generated by GCC-4.6.3

[Bug tree-optimization/53114] Extra load store/instructions compared to gcc-3.4 on ARM

[mr.kayrick at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53114

--- Comment #3 from Alexey Kravets  2012-04-25 
13:37:02 UTC ---
Created attachment 27239
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27239
Assembly generated by GCC-3.4.6

[Bug tree-optimization/53114] Extra load store/instructions compared to gcc-3.4 on ARM

[mr.kayrick at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53114

--- Comment #4 from Alexey Kravets  2012-04-26 
07:55:25 UTC ---
-fno-ivopts option fixed this issue (thanks to Alexander Monakov ), so there is
an induction variables optimization issue.

http://gcc.gnu.org/ml/gcc/2012-04/msg00815.html

[Bug middle-end/49147] graphite branch ICEs with -fgraphite-opencl-ignore-dep

[mr.kayrick at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49147

Alexey Kravets  changed:

   What|Removed |Added

 CC||mr.kayrick at gmail dot com

--- Comment #1 from Alexey Kravets  2011-05-26 
06:46:00 UTC ---
Confirmed.

This problem is caused by bug in opencl_get_perfect_nested_loop_depth.
This functions ignores  -fgraphite-opencl-ignore-dep flag while
opencl_transform_stmt_list considers this flag.

I have a patch for this issue.