Adding memory write to a sparc fsqrts insn

2010-01-29 Thread k e
Hello everybody,
I'd like to patch gcc's sparc machine descritpion so
that the destination register of a fpu sqareroot operation fsqrts
is stored into memory after each fsqrts.

like this:

fsqrts %f2,%f4
st %f4, -4[%fp]  <= add this after every fsqrts where -4[%fp] is
 a slot allocated on the stack for each fsqrts insn

The sparc.md portion that defines the fsqrts pattern is:

(define_insn "sqrtsf2"
  [(set (match_operand:SF 0 "register_operand" "=f")
(sqrt:SF (match_operand:SF 1 "register_operand" "f")))]
  "TARGET_FPU"
  "fsqrts\t%1, %0"
  [(set_attr "type" "fpsqrts")])

i thought I could add  the "st %f4, -4[%fp]" there. But now
my question:

- Where/when/how can I allocate the stackframe slot to save the
  destination fp reg in (the offset to %fp).

I'm not that familiar with rtl representation and the stages
of compilation. So any help would be apreciated.

Maybe another architecture has a similar construct already
that I could study and use for my purpose. If somebody
can point me to such machine description part ...

-- Greetings Konrad


Generating store after fdivd: how to avoid delay slot

2010-02-09 Thread k e
I try to patch gcc so that after a fdivd the destination register is
stored to the stack.

fdivd %f0,%f2,%f4; std %f4, [%sp]

I generate the rtl for divdf3 using a emit_insn,DONE sequence in a
define_expand pattern (see below).

In the assembler output phase I use a define_insn and write
out "fdivd\t%%1, %%2, %%0; std %%0, %%3" as the expression string.

My question:
  - How can I mark the pattern so that it will not be sheduled into a
delay slot? How can I specify that the output will be 2 instructions
and hint the scheduler about it?
  - Is the (set_attr "length" "2") attribute in define_insn divdf3_store
(below) already sufficient?

-- Greetings Konrad


;; handle divdf3 
(define_expand "divdf3"
  [(parallel [(set (match_operand:DF 0 "register_operand" "=e")
  (div:DF (match_operand:DF 1 "register_operand" "e")
(match_operand:DF 2 "register_operand" "e")))
  (clobber (match_scratch:SI 3 ""))])]
  "TARGET_FPU"
  "{
  output_divdf3_emit (operands[0], operands[1], operands[2], operands[3]);
  DONE;
}")

(define_insn "divdf3_store"
  [(set (match_operand:DF 0 "register_operand" "=e")
  (div:DF (match_operand:DF 1 "register_operand" "e")
(match_operand:DF 2 "register_operand" "e")))
  (clobber (match_operand:DF 3 "memory_operand" ""  ))]
  "TARGET_FPU && TARGET_STORE_AFTER_DIVSQRT"
   {
   return output_divdf3 (operands[0], operands[1], operands[2],
operands[3]);
   }
   [(set_attr "type" "fpdivd")
   (set_attr "fptype" "double")
   (set_attr "length" "2")])

(define_insn "divdf3_nostore"
  [(set (match_operand:DF 0 "register_operand" "=e")
(div:DF (match_operand:DF 1 "register_operand" "e")
(match_operand:DF 2 "register_operand" "e")))]
  "TARGET_FPU && (!TARGET_STORE_AFTER_DIVSQRT)"
  "fdivd\t%1, %2, %0"
  [(set_attr "type" "fpdivd")
   (set_attr "fptype" "double")])




/ handle fdivd /
char *
output_divdf3 (rtx op0, rtx op1, rtx dest, rtx scratch)
{
  static char string[128];
  sprintf(string,"fdivd\t%%1, %%2, %%0; std %%0, %%3 !!!");
  return string;
}

void
output_divdf3_emit (rtx dest, rtx op0, rtx op1, rtx scratch)
{
  rtx slot0, div, divsave;

  div = gen_rtx_SET (VOIDmode,
 dest,
 gen_rtx_DIV (DFmode,
  op0,
  op1));

  if (TARGET_STORE_AFTER_DIVSQRT) {
slot0 = assign_stack_local (DFmode, 8, 8);
divsave = gen_rtx_SET (VOIDmode, slot0, dest);
emit_insn(divsave);
emit_insn (gen_rtx_PARALLEL(VOIDmode,
gen_rtvec (2,
   div,
   gen_rtx_CLOBBER (SImode,
slot0;
  } else {
emit_insn(div);
  }
}


Automatic cast off "union tree" in gdb

2007-09-30 Thread k e
Hi, When stepping through gcc with gdb: is there a way
 to be able to make gdb automatically cast a "union tree" to the
 correct struct depending on the union tree's type?  A "p "
  will print out all unions. I'd not want to do a cast all the time.
 -- Konrad


Re: GCC 7.5 Released

2019-11-14 Thread Lic. Kai Olaf K e t e l h u t
'''bauernkönigin'''

2019-11-14 10:01 GMT+01:00, Richard Biener :
>
> The GNU Compiler Collection version 7.5 has been released.
>
> GCC 7.5 is a bug-fix release from the GCC 7 branch
> containing important fixes for regressions and serious bugs in
> GCC 7.4 with more than 215 bugs fixed since the previous release.
>
> This is also the last release from the GCC 7 branch which will receive
> no further fixes from now on.  GCC continues to be maintained on
> the GCC 8 and GCC 9 branches and the development trunk.
>
> This release is available from the FTP servers listed at:
>
>   http://www.gnu.org/order/ftp.html
>
> Please do not contact me directly regarding questions or comments
> about this release.  Instead, use the resources available from
> http://gcc.gnu.org.
>
> As always, a vast number of people contributed to this GCC release
> -- far too many to thank them individually!
>


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