gcc-4.3-20100516 is now available
Snapshot gcc-4.3-20100516 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/4.3-20100516/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 4.3 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-4_3-branch revision 159467 You'll find: gcc-4.3-20100516.tar.bz2 Complete GCC (includes all of below) gcc-core-4.3-20100516.tar.bz2 C front end and core compiler gcc-ada-4.3-20100516.tar.bz2 Ada front end and runtime gcc-fortran-4.3-20100516.tar.bz2 Fortran front end and runtime gcc-g++-4.3-20100516.tar.bz2 C++ front end and runtime gcc-java-4.3-20100516.tar.bz2 Java front end and runtime gcc-objc-4.3-20100516.tar.bz2 Objective-C front end and runtime gcc-testsuite-4.3-20100516.tar.bz2The GCC testsuite Diffs from 4.3-20100509 are available in the diffs/ subdirectory. When a particular snapshot is ready for public consumption the LATEST-4.3 link is updated and a message is sent to the gcc list. Please do not use a snapshot before it has been announced that way.
Re: Clobbering two registers
On Wed, May 12, 2010 at 6:43 PM, Ian Lance Taylor wrote: > > Yes. > > Also look at match_scratch. > I assume that I only need to setup two match_scratch then, right? -- PMatos
lto and compile flag associations
What is the current LTO design with regards to the retention of compiler flags during the actual link time optimization compilation steps. For example, if one is linking mixed fortran and c object files which have distinct flags passed in FFLAGS and CFLAGS, are these embedded with the LTO information when generating the object files in the initial compilation or do they have to be explicitly passed later? If the latter is the case, how would one deal with the situation of a linkage with mixed fortran and c LTO object files which would require conflicting compilation flags? Thanks in advance for any clarifications. Jack
Performance optimizations for Intel Core 2 and Core i7 processors
CodeSourcery is working on improving performance for Intel's Core 2 and Core i7 families of processors. CodeSourcery plans to add support for unaligned vector instructions, to provide fine-tuned scheduling support and to update instruction selection and instruction cost models for Core i7 and Core 2 families of processors. As usual, CodeSourcery will be contributing its work to GCC. Currently, our target is the end of GCC 4.6 Stage1. If your favorite benchmark significantly under-performs on Core 2 or Core i7 CPUs, don't hesitate asking us to take a look at it. We appreciate Intel sponsoring this project. Thank you, -- Maxim Kuvyrkov CodeSourcery ma...@codesourcery.com (650) 331-3385 x724
