Re: [PATCH 1/5] dt-bindings: display/msm: Document MDSS on QCS8300
On 2024/11/27 20:01, Krzysztof Kozlowski wrote: On 27/11/2024 12:02, Yongxing Mou wrote: doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241127-mdss_qcs8300-v1-1-29b2c3ee9...@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema. Thank you for your checking. I rechecked this file and indeed found some issues. I will fix them in the next patchset. But i did not see issues related to this header file in local. Maybe it is dependency or tool issues. I will and update tool and recheck this issue and fix it in the next patchset. Read the instruction carefully, including statement about base. Thank you very much for your reminder. I will carefully read and execute these suggestions. Best regards, Krzysztof
Re: [PATCH 2/5] dt-bindings: display/msm: Document the DPU for QCS8300
On 2024/11/27 21:56, Dmitry Baryshkov wrote: On Wed, Nov 27, 2024 at 03:05:02PM +0800, Yongxing Mou wrote: Document the DPU for Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 01cf79bd754b491349c52c5aef49ba06e835d0bf..631181df2bcf2752679be4de0dee74e15e2c66c2 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -14,6 +14,7 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: enum: + - qcom,qcs8300-dpu The DPU is the same as the one on SA8775P. Drop it completely. Thanks,got it.The DPU of qcs8300 and sa8775p are exactly the same, but sa8775p has two DPUs, while qcs8300 has only one DPU and has removed intf2, intf4, and intf8. That's their difference.Can qcs8300 reuse sa8775p's dpu driver? if we can reuse it,will drop this patch. - qcom,sa8775p-dpu - qcom,sm8650-dpu - qcom,x1e80100-dpu -- 2.34.1
Re: [PATCH 3/5] drm/msm: mdss: Add QCS8300 support
On 2024/11/27 21:46, Dmitry Baryshkov wrote:
On Wed, Nov 27, 2024 at 03:05:03PM +0800, Yongxing Mou wrote:
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Please mention, why do you need it at all. I see that the UBWC swizzle
and HBB settings are different. Is this really the case? Is it because
of the different memory being used on those platforms?
Thanks, will modify the comment to add more information .QCS8300 UBWC
setting is quite different with SA8775P,it use different memory,so their
recommended configurations are not quite the same.this is really setting.
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
b7bd899ead44bf86998e7295bccb31a334fa6811..90d8fe469d3134ec73f386153509ac257d75930a
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -568,6 +568,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+ .ubwc_enc_version = UBWC_4_0,
+ .ubwc_dec_version = UBWC_4_0,
+ .ubwc_swizzle = 6,
+ .ubwc_static = 1,
+ .highest_bank_bit = 3,
+ .macrotile_mode = 1,
+ .reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -715,6 +725,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+ { .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
Re: [PATCH 4/5] drm/msm/dpu: Add QCS8300 support
On 2024/11/27 21:49, Dmitry Baryshkov wrote: On Wed, Nov 27, 2024 at 03:05:04PM +0800, Yongxing Mou wrote: Add definitions for the display hardware used on the Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- .../drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h| 485 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 + 4 files changed, 488 insertions(+) NAK, there is no need for this. Got it,thanks. will modify it in next patchset.Compared to sa8775p, they use same dpu but qcs8300 has one less intf and two fewer dp intfs. Other configurations are the same.can we reuse it or a new catalog file to show it.
Re: [PATCH 0/5] Display enablement changes for Qualcomm QCS8300 platform
On 2024/11/27 20:01, Krzysztof Kozlowski wrote: On 27/11/2024 11:54, Yongxing Mou wrote: On 2024/11/27 15:13, Krzysztof Kozlowski wrote: On 27/11/2024 08:05, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) and Display Processing Unit (DPU) for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, relevant device tree changes, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2...@quicinc.com/ Above was not part of this merge window, so nothing from your patchset can be merged for this v6.14. If you want things to get merged, I suggest decoupling dependencies. Thanks for reviewing.Can we keep the dependency on above changes and merge our changes after the dependent changes are merged? So merged in 4 months? for v6.15-rc1? You can. Thank you for your reminder.agree with you that should decouple dependencies in next patchset.I will submit the drive changes and the dtsi changes separately. Best regards, Krzysztof
Re: [PATCH 0/5] Display enablement changes for Qualcomm QCS8300 platform
On 2024/11/27 21:51, Dmitry Baryshkov wrote: On Wed, Nov 27, 2024 at 06:54:10PM +0800, Yongxing Mou wrote: On 2024/11/27 15:13, Krzysztof Kozlowski wrote: On 27/11/2024 08:05, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) and Display Processing Unit (DPU) for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, relevant device tree changes, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2...@quicinc.com/ Above was not part of this merge window, so nothing from your patchset can be merged for this v6.14. If you want things to get merged, I suggest decoupling dependencies. Thanks for reviewing.Can we keep the dependency on above changes and merge our changes after the dependent changes are merged? Just drop _all_dependencies from display/msm patches. Otherwise I won't be able to pick them up until 6.15-rc. Use ephemeral DT nodes in the examples. Thanks, got it. will update it in next patchset.
Re: [PATCH 1/4] dt-bindings: phy: Add eDP PHY compatible for qcs8300
On 2024/11/28 2:28, Krzysztof Kozlowski wrote: On 27/11/2024 09:15, Yongxing Mou wrote: Add compatible string for the supported eDP PHY on qcs8300 platform. What is supported eDP PHY? Can it be unsupported? Anyway, this repeats the diff. Say something useful instead, like why this is not compatible with sa8775p. Best regards, Krzysztof Actually,for edp phy,it is same with sa8775p, so will reuse it's driver in next patchset.so this patch should drop it..Thansk for reviewing.
[PATCH 2/5] dt-bindings: display/msm: Document the DPU for QCS8300
Document the DPU for Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 01cf79bd754b491349c52c5aef49ba06e835d0bf..631181df2bcf2752679be4de0dee74e15e2c66c2 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -14,6 +14,7 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: enum: + - qcom,qcs8300-dpu - qcom,sa8775p-dpu - qcom,sm8650-dpu - qcom,x1e80100-dpu -- 2.34.1
[PATCH 4/5] drm/msm/dpu: Add QCS8300 support
Add definitions for the display hardware used on the
Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
.../drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h| 485 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 +
4 files changed, 488 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h
new file mode 100644
index
..4cfbe1a76dec2a93caccd6e2e791bbc6051cd36e
--- /dev/null
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h
@@ -0,0 +1,485 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _DPU_8_4_QCS8300_H
+#define _DPU_8_4_QCS8300_H
+
+static const struct dpu_caps qcs8300_dpu_caps = {
+ .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
+ .max_mixer_blendstages = 0xb,
+ .has_src_split = true,
+ .has_dim_layer = true,
+ .has_idle_pc = true,
+ .has_3d_merge = true,
+ .max_linewidth = 5120,
+ .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
+};
+
+static const struct dpu_mdp_cfg qcs8300_mdp = {
+ .name = "top_0",
+ .base = 0x0, .len = 0x494,
+ .features = BIT(DPU_MDP_PERIPH_0_REMOVED),
+ .clk_ctrls = {
+ [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
+ [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 },
+ [DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
+ [DPU_CLK_CTRL_VIG3] = { .reg_off = 0x2c4, .bit_off = 0 },
+ [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
+ [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
+ [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
+ [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
+ [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
+ [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
+ },
+};
+
+/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL
support */
+static const struct dpu_ctl_cfg qcs8300_ctl[] = {
+ {
+ .name = "ctl_0", .id = CTL_0,
+ .base = 0x15000, .len = 0x204,
+ .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
+ .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
+ }, {
+ .name = "ctl_1", .id = CTL_1,
+ .base = 0x16000, .len = 0x204,
+ .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK,
+ .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
+ }, {
+ .name = "ctl_2", .id = CTL_2,
+ .base = 0x17000, .len = 0x204,
+ .features = CTL_SC7280_MASK,
+ .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),
+ }, {
+ .name = "ctl_3", .id = CTL_3,
+ .base = 0x18000, .len = 0x204,
+ .features = CTL_SC7280_MASK,
+ .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),
+ }, {
+ .name = "ctl_4", .id = CTL_4,
+ .base = 0x19000, .len = 0x204,
+ .features = CTL_SC7280_MASK,
+ .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),
+ }, {
+ .name = "ctl_5", .id = CTL_5,
+ .base = 0x1a000, .len = 0x204,
+ .features = CTL_SC7280_MASK,
+ .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 23),
+ },
+};
+
+static const struct dpu_sspp_cfg qcs8300_sspp[] = {
+ {
+ .name = "sspp_0", .id = SSPP_VIG0,
+ .base = 0x4000, .len = 0x32c,
+ .features = VIG_SDM845_MASK_SDMA,
+ .sblk = &dpu_vig_sblk_qseed3_3_1,
+ .xin_id = 0,
+ .type = SSPP_TYPE_VIG,
+ .clk_ctrl = DPU_CLK_CTRL_VIG0,
+ }, {
+ .name = "sspp_1", .id = SSPP_VIG1,
+ .base = 0x6000, .len = 0x32c,
+ .features = VIG_SDM845_MASK_SDMA,
+ .sblk = &dpu_vig_sblk_qseed3_3_1,
+ .xin_id = 4,
+ .type = SSPP_TYPE_VIG,
+ .clk_ctrl = DPU_CLK_CTRL_VIG1,
+ }, {
+ .name = "sspp_2", .id = SSPP_VIG2,
+ .base = 0x8000, .len = 0x32c,
+ .features = VIG_SDM845_MASK_SDMA,
+ .sblk = &dpu_vig_sblk_qseed3_3_1,
+ .xin_id = 8,
+ .type = SSPP_TYPE_VIG,
+ .clk_ctrl = DPU_CLK_CTRL_VIG2,
+ }, {
+ .name = "sspp_3", .id = SSPP_VIG3,
+ .base
[PATCH 1/5] dt-bindings: display/msm: Document MDSS on QCS8300
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
.../bindings/display/msm/qcom,qcs8300-mdss.yaml| 239 +
1 file changed, 239 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
new file mode 100644
index
..87d6599d30b2b7b689eb31d3690c0de511aecb95
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
@@ -0,0 +1,239 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. QCS8300 Display MDSS
+
+maintainers:
+ - Yongxing Mou
+
+description:
+ QCS8300 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks
like
+ DPU display controller, DP interfaces and EDP etc.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+const: qcom,qcs8300-mdss
+
+ clocks:
+items:
+ - description: Display AHB
+ - description: Display hf AXI
+ - description: Display core
+
+ iommus:
+maxItems: 1
+
+ interconnects:
+maxItems: 3
+
+ interconnect-names:
+maxItems: 3
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+const: qcom,qcs8300-dpu
+
+ "^displayport-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dp
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+mdss: display-subsystem@ae0 {
+compatible = "qcom,qcs8300-mdss";
+reg = <0 0x0ae0 0 0x1000>;
+reg-names = "mdss";
+
+interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG
QCOM_ICC_TAG_ACTIVE_ONLY>;
+interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
+
+power-domains = <&dispcc0 MDSS_DISP_CC_MDSS_CORE_GDSC>;
+
+clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>;
+
+interrupts = ;
+interrupt-controller;
+#interrupt-cells = <1>;
+
+iommus = <&apps_smmu 0x1000 0x402>;
+
+#address-cells = <2>;
+#size-cells = <2>;
+ranges;
+
+status = "disabled";
+
+mdss_mdp: display-controller@ae01000 {
+compatible = "qcom,qcs8300-dpu";
+reg = <0 0x0ae01000 0 0x8f000>,
+ <0 0x0aeb 0 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+operating-points-v2 = <&mdp_opp_table>;
+power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+interrupt-parent = <&mdss>;
+interrupts = <0>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+port@0 {
+reg = <0>;
+dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp0_in>;
+};
+};
+};
+
+mdp_opp_table: opp-table {
+compatible = "operating-point
[PATCH 0/5] Display enablement changes for Qualcomm QCS8300 platform
This series introduces support to enable the Mobile Display Subsystem (MDSS) and Display Processing Unit (DPU) for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, relevant device tree changes, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2...@quicinc.com/ --- Yongxing Mou (5): dt-bindings: display/msm: Document MDSS on QCS8300 dt-bindings: display/msm: Document the DPU for QCS8300 drm/msm: mdss: Add QCS8300 support drm/msm/dpu: Add QCS8300 support arm64: dts: qcom: qcs8300: add display dt nodes for MDSS and DPU .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 239 ++ .../bindings/display/msm/qcom,sm8650-dpu.yaml | 1 + arch/arm64/boot/dts/qcom/qcs8300.dtsi | 87 .../drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h| 485 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 + drivers/gpu/drm/msm/msm_mdss.c | 11 + 8 files changed, 826 insertions(+) --- base-commit: 414c97c966b69e4a6ea7b32970fa166b2f9b9ef0 change-id: 20241121-mdss_qcs8300-c31b52c0d599 prerequisite-message-id: 20240925-qcs8300_initial_dtsi-v2-0-494c40fa2...@quicinc.com prerequisite-patch-id: 73c78f31fa1d504124d4a82b578a6a14126cccd8 prerequisite-patch-id: 5a01283c8654ae7c696d9c69cb21505b71c5ca27 prerequisite-patch-id: dc633d5aaac790776a8a213ea2faa4890a3f665d prerequisite-patch-id: 9ecf4cb8b5842ac64e51d6baa0e6c1fbe449ee66 prerequisite-message-id: 20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com prerequisite-patch-id: 8faad5c6d8ca255935d3e4d317dcbcc32b8261ff Best regards, -- Yongxing Mou
[PATCH 3/5] drm/msm: mdss: Add QCS8300 support
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
b7bd899ead44bf86998e7295bccb31a334fa6811..90d8fe469d3134ec73f386153509ac257d75930a
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -568,6 +568,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+ .ubwc_enc_version = UBWC_4_0,
+ .ubwc_dec_version = UBWC_4_0,
+ .ubwc_swizzle = 6,
+ .ubwc_static = 1,
+ .highest_bank_bit = 3,
+ .macrotile_mode = 1,
+ .reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -715,6 +725,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+ { .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
[PATCH 5/5] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS and DPU
Add devicetree changes to enable MDSS display-subsystem and its
display-controller(DPU) for Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 87 +++
1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index
60f45d8b9d556a5909750fae286fc33dbf77b308..42a578e1f99017b8aafb1e967b8675210957812e
100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -926,6 +926,93 @@ camcc: clock-controller@ade {
#power-domain-cells = <1>;
};
+ mdss: display-subsystem@ae0 {
+ compatible = "qcom,qcs8300-mdss";
+ reg = <0x0 0x0ae0 0x0 0x1000>;
+ reg-names = "mdss";
+
+ interconnects = <&mmss_noc MASTER_MDP0
QCOM_ICC_TAG_ACTIVE_ONLY
+&mc_virt SLAVE_EBI1
QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_MDP1
QCOM_ICC_TAG_ACTIVE_ONLY
+&mc_virt SLAVE_EBI1
QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&gem_noc MASTER_APPSS_PROC
QCOM_ICC_TAG_ACTIVE_ONLY
+&config_noc SLAVE_DISPLAY_CFG
QCOM_ICC_TAG_ACTIVE_ONLY>;
+ interconnect-names = "mdp0-mem",
+"mdp1-mem",
+"cpu-cfg";
+
+ resets = <&dispcc MDSS_DISP_CC_MDSS_CORE_BCR>;
+
+ power-domains = <&dispcc MDSS_DISP_CC_MDSS_CORE_GDSC>;
+
+ clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
+<&gcc GCC_DISP_HF_AXI_CLK>,
+<&dispcc MDSS_DISP_CC_MDSS_MDP_CLK>;
+
+ interrupts = ;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x1000 0x402>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ status = "disabled";
+
+ mdss_mdp: display-controller@ae01000 {
+ compatible = "qcom,qcs8300-dpu";
+ reg = <0x0 0x0ae01000 0x0 0x8f000>,
+ <0x0 0x0aeb 0x0 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+<&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
+<&dispcc
MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+<&dispcc MDSS_DISP_CC_MDSS_MDP_CLK>,
+<&dispcc MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+ assigned-clocks = <&dispcc
MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+ assigned-clock-rates = <1920>;
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ mdp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-37500 {
+ opp-hz = /bits/ 64 <37500>;
+ required-opps =
<&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-5 {
+ opp-hz = /bits/ 64 <5>;
+ required-opps =
<&rpmhpd_opp_nom>;
+ };
+
+ opp-57500 {
+
Re: [PATCH 1/5] dt-bindings: display/msm: Document MDSS on QCS8300
On 2024/11/27 15:15, Krzysztof Kozlowski wrote:
On 27/11/2024 08:05, Yongxing Mou wrote:
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
Will fail testing, so only limited review.
Thanks for reviewing,will fix it in next patchset.
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+mdss: display-subsystem@ae0 {
+compatible = "qcom,qcs8300-mdss";
+reg = <0 0x0ae0 0 0x1000>;
+reg-names = "mdss";
+
+interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG
QCOM_ICC_TAG_ACTIVE_ONLY>;
+interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
+
+power-domains = <&dispcc0 MDSS_DISP_CC_MDSS_CORE_GDSC>;
+
+clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>;
+
+interrupts = ;
+interrupt-controller;
+#interrupt-cells = <1>;
+
+iommus = <&apps_smmu 0x1000 0x402>;
+
+#address-cells = <2>;
+#size-cells = <2>;
+ranges;
+
+status = "disabled";
No, your code cannot be disabled.
Thanks, will remove it.
+
+mdss_mdp: display-controller@ae01000 {
+compatible = "qcom,qcs8300-dpu";
+reg = <0 0x0ae01000 0 0x8f000>,
+ <0 0x0aeb 0 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+operating-points-v2 = <&mdp_opp_table>;
+power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+interrupt-parent = <&mdss>;
+interrupts = <0>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+port@0 {
+reg = <0>;
+dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp0_in>;
+};
+};
+};
+
+mdp_opp_table: opp-table {
+compatible = "operating-points-v2";
+
+opp-37500 {
+opp-hz = /bits/ 64 <37500>;
+required-opps = <&rpmhpd_opp_svs_l1>;
+};
+
+opp-5 {
+opp-hz = /bits/ 64 <5>;
+required-opps = <&rpmhpd_opp_nom>;
+};
+
+opp-57500 {
+opp-hz = /bits/ 64 <57500>;
+required-opps = <&rpmhpd_opp_turbo>;
+};
+
+opp-65000 {
+opp-hz = /bits/ 64 <65000>;
+required-opps = <&rpmhpd_opp_turbo_l1>;
+};
+};
+};
+
+mdss_dp0: displayport-controller@af54000 {
+compatible = "qcom,qcs8300-dp";
+
+pinctrl-0 = <&dp_hot_plug_det>;
+pinctrl-names = "default";
+
+reg = <0 0xaf54000 0 0x104>,
+<0 0xaf54200 0 0x0c0>,
+<0 0xaf55000 0 0x770>,
+<0 0xaf56000 0 0x09c>;
+
+interrupt-parent = <&mdss>;
+interrupts = <12>;
+clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
Messed alignment in multiple places.
Thanks, will fix it in next patchset.
+
[PATCH 1/4] dt-bindings: phy: Add eDP PHY compatible for qcs8300
Add compatible string for the supported eDP PHY on qcs8300 platform. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index 293fb6a9b1c330438bceba15226c91e392c840fb..e249aee9b11d58b8f2a9c8708285e0f2510bafc7 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -17,6 +17,7 @@ description: properties: compatible: enum: + - qcom,qcs8300-edp-phy - qcom,sa8775p-edp-phy - qcom,sc7280-edp-phy - qcom,sc8180x-edp-phy -- 2.34.1
[PATCH 0/4] Add support for DisplayPort on QCS8300 platform
This series adds support for the DisplayPort controller and eDP PHY v5 found on the Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- Yongxing Mou (4): dt-bindings: phy: Add eDP PHY compatible for qcs8300 phy: qcom: edp: Add support for eDP PHY on QCS8300 dt-bindings: display: msm: dp-controller: document QCS8300 compatible drm/msm/dp: Add DisplayPort controller for QCS8300 Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 + Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml | 1 + drivers/gpu/drm/msm/dp/dp_display.c | 6 ++ drivers/phy/qualcomm/phy-qcom-edp.c | 8 4 files changed, 16 insertions(+) --- base-commit: 414c97c966b69e4a6ea7b32970fa166b2f9b9ef0 change-id: 20241127-qcs8300_dp-272c591c3aea Best regards, -- Yongxing Mou
[PATCH 2/4] phy: qcom: edp: Add support for eDP PHY on QCS8300
Add support for eDP PHY v5 found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
drivers/phy/qualcomm/phy-qcom-edp.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c
b/drivers/phy/qualcomm/phy-qcom-edp.c
index
f1b51018683d51df064f60440864c6031638670c..90e0a399c25299ad1b2fb5df8512ba3888661046
100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -532,6 +532,13 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = {
.com_configure_ssc = qcom_edp_com_configure_ssc_v4,
};
+static const struct qcom_edp_phy_cfg qcs8300_dp_phy_cfg = {
+ .is_edp = false,
+ .aux_cfg = edp_phy_aux_cfg_v5,
+ .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v5,
+ .ver_ops = &qcom_edp_phy_ops_v4,
+};
+
static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg = {
.is_edp = false,
.aux_cfg = edp_phy_aux_cfg_v5,
@@ -1133,6 +1140,7 @@ static int qcom_edp_phy_probe(struct platform_device
*pdev)
}
static const struct of_device_id qcom_edp_phy_match_table[] = {
+ { .compatible = "qcom,qcs8300-edp-phy", .data = &qcs8300_dp_phy_cfg, },
{ .compatible = "qcom,sa8775p-edp-phy", .data = &sa8775p_dp_phy_cfg, },
{ .compatible = "qcom,sc7280-edp-phy", .data = &sc7280_dp_phy_cfg, },
{ .compatible = "qcom,sc8180x-edp-phy", .data = &sc7280_dp_phy_cfg, },
--
2.34.1
[PATCH 3/4] dt-bindings: display: msm: dp-controller: document QCS8300 compatible
Add compatible string for the DisplayPort controller found on the Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index a212f335d5ffae545d2e5bacec95299ca45e8405..eb14cf624da6f835523499a619c09a50586ecb30 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - enum: + - qcom,qcs8300-dp - qcom,sa8775p-dp - qcom,sc7180-dp - qcom,sc7280-dp -- 2.34.1
[PATCH 4/4] drm/msm/dp: Add DisplayPort controller for QCS8300
The Qualcomm QCS8300 platform comes with a DisplayPort controller
with same base offset with SA8775P, add support for this in the
DisplayPort driver.
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/dp/dp_display.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index
aba925aab7ad7c6652e81004043864c1cb3ac370..f870faa89f26a8cb5bd7f4caf11f42e919c9efac
100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -118,6 +118,11 @@ struct msm_dp_desc {
bool wide_bus_supported;
};
+static const struct msm_dp_desc msm_dp_desc_qcs8300[] = {
+ { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0,
.wide_bus_supported = true },
+ {}
+};
+
static const struct msm_dp_desc msm_dp_desc_sa8775p[] = {
{ .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0,
.wide_bus_supported = true },
{ .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1,
.wide_bus_supported = true },
@@ -170,6 +175,7 @@ static const struct msm_dp_desc msm_dp_desc_x1e80100[] = {
};
static const struct of_device_id msm_dp_dt_match[] = {
+ { .compatible = "qcom,qcs8300-dp", .data = &msm_dp_desc_qcs8300 },
{ .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
{ .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
{ .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
--
2.34.1
Re: [PATCH 0/5] Display enablement changes for Qualcomm QCS8300 platform
On 2024/11/27 15:13, Krzysztof Kozlowski wrote: On 27/11/2024 08:05, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) and Display Processing Unit (DPU) for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, relevant device tree changes, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2...@quicinc.com/ Above was not part of this merge window, so nothing from your patchset can be merged for this v6.14. If you want things to get merged, I suggest decoupling dependencies. Thanks for reviewing.Can we keep the dependency on above changes and merge our changes after the dependent changes are merged? Best regards, Krzysztof
Re: [PATCH 1/5] dt-bindings: display/msm: Document MDSS on QCS8300
On 2024/11/27 16:21, Rob Herring (Arm) wrote: On Wed, 27 Nov 2024 15:05:01 +0800, Yongxing Mou wrote: Document the MDSS hardware found on the Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 239 + 1 file changed, 239 insertions(+) My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.example.dts:26:18: fatal error: dt-bindings/clock/qcom,qcs8300-gcc.h: No such file or directory 26 | #include | ^~ compilation terminated. make[2]: *** [scripts/Makefile.dtbs:129: Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.example.dtb] Error 1 make[2]: *** Waiting for unfinished jobs make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1442: dt_binding_check] Error 2 make: *** [Makefile:224: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241127-mdss_qcs8300-v1-1-29b2c3ee9...@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema. Thank you for your checking. I rechecked this file and indeed found some issues. I will fix them in the next patchset. But i did not see issues related to this header file in local. Maybe it is dependency or tool issues. I will and update tool and recheck this issue and fix it in the next patchset.
Re: [PATCH 0/5] Display enablement changes for Qualcomm QCS8300 platform
On 2024/11/27 19:06, Tingwei Zhang wrote: On 11/27/2024 6:54 PM, Yongxing Mou wrote: On 2024/11/27 15:13, Krzysztof Kozlowski wrote: On 27/11/2024 08:05, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) and Display Processing Unit (DPU) for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, relevant device tree changes, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch- v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi- v2-0-494c40fa2...@quicinc.com/ Above was not part of this merge window, so nothing from your patchset can be merged for this v6.14. If you want things to get merged, I suggest decoupling dependencies. Thanks for reviewing.Can we keep the dependency on above changes and merge our changes after the dependent changes are merged? You can move device tree changes which have dependency to a separate series and keep binding/driver changes here. They don't have dependency. Got it.we can move this dtsi to the DP enablement DTSI change series in next patchset. Best regards, Krzysztof
Re: [PATCH 2/5] dt-bindings: display/msm: Document the DPU for QCS8300
On 2024/11/29 21:44, Dmitry Baryshkov wrote: On Fri, 29 Nov 2024 at 11:51, Yongxing Mou wrote: On 2024/11/27 21:56, Dmitry Baryshkov wrote: On Wed, Nov 27, 2024 at 03:05:02PM +0800, Yongxing Mou wrote: Document the DPU for Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 01cf79bd754b491349c52c5aef49ba06e835d0bf..631181df2bcf2752679be4de0dee74e15e2c66c2 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -14,6 +14,7 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: enum: + - qcom,qcs8300-dpu The DPU is the same as the one on SA8775P. Drop it completely. Thanks,got it.The DPU of qcs8300 and sa8775p are exactly the same, but sa8775p has two DPUs, while qcs8300 has only one DPU and has removed intf2, intf4, and intf8. That's their difference.Can qcs8300 reuse sa8775p's dpu driver? if we can reuse it,will drop this patch. Are INTF_n blocks implemented in silicon or not? What happens if one reads one of INTF_2 or INTF_4 registers? If they are actually RAZ or cause data aborts, you can not reuse SA8775P catalog entry. Please add corresponding data structures to dpu_8_4_sa8775p.h. Sorry for later reponse,i took some time to confirm the hardware details.For QCS8300,DP1 CTRL/INTF_n is present in silicon.Only DP1 phy is removed in silicon,it not available.so i think we can reuse the sa8775p dpu. - qcom,sa8775p-dpu - qcom,sm8650-dpu - qcom,x1e80100-dpu -- 2.34.1
Re: [PATCH 3/5] drm/msm: mdss: Add QCS8300 support
On 2024/11/30 2:55, Dmitry Baryshkov wrote:
On Wed, Nov 27, 2024 at 03:05:03PM +0800, Yongxing Mou wrote:
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
Once rebased on top of [1]:
Reviewed-by: Dmitry Baryshkov
[1]
https://lore.kernel.org/dri-devel/20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/
got it,thanks
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
b7bd899ead44bf86998e7295bccb31a334fa6811..90d8fe469d3134ec73f386153509ac257d75930a
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -568,6 +568,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+ .ubwc_enc_version = UBWC_4_0,
+ .ubwc_dec_version = UBWC_4_0,
+ .ubwc_swizzle = 6,
+ .ubwc_static = 1,
+ .highest_bank_bit = 3,
+ .macrotile_mode = 1,
+ .reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -715,6 +725,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+ { .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
Re: [PATCH 4/5] drm/msm/dpu: Add QCS8300 support
On 2024/11/29 21:32, Dmitry Baryshkov wrote: On Fri, 29 Nov 2024 at 12:01, Yongxing Mou wrote: On 2024/11/27 21:49, Dmitry Baryshkov wrote: On Wed, Nov 27, 2024 at 03:05:04PM +0800, Yongxing Mou wrote: Add definitions for the display hardware used on the Qualcomm QCS8300 platform. Signed-off-by: Yongxing Mou --- .../drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h| 485 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 + 4 files changed, 488 insertions(+) NAK, there is no need for this. Got it,thanks. will modify it in next patchset.Compared to sa8775p, they use same dpu but qcs8300 has one less intf and two fewer dp intfs. Other configurations are the same.can we reuse it or a new catalog file to show it. Is it actually not populated in the silicon? What happens if one access those INTF_n registers? yes, intf_n and ctrl is present in silicon.it is fine to dump intf/ctrl registers.
Re: [PATCH 3/5] drm/msm: mdss: Add QCS8300 support
On 2024/11/29 21:37, Dmitry Baryshkov wrote:
On Fri, 29 Nov 2024 at 11:56, Yongxing Mou wrote:
On 2024/11/27 21:46, Dmitry Baryshkov wrote:
On Wed, Nov 27, 2024 at 03:05:03PM +0800, Yongxing Mou wrote:
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Please mention, why do you need it at all. I see that the UBWC swizzle
and HBB settings are different. Is this really the case? Is it because
of the different memory being used on those platforms?
Thanks, will modify the comment to add more information .QCS8300 UBWC
setting is quite different with SA8775P,it use different memory,so their
recommended configurations are not quite the same.this is really setting.
We had several cases where the platform should be using different HBB
if it uses different memory type. Is that the case here? If so, rather
than adding another compat entry please extend the msm_mdss to read
memory type and select HBB based on that. This will also fix several
TODO items in the driver.
As a side note, I see that your config has different ubwc_swizzle. If
that's actually different, then maybe you are right and there should
be a separate entry.
yes,ubwc_swizzle is also different with sa8775p for there recommended
setting are different.
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
b7bd899ead44bf86998e7295bccb31a334fa6811..90d8fe469d3134ec73f386153509ac257d75930a
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -568,6 +568,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+.ubwc_enc_version = UBWC_4_0,
+.ubwc_dec_version = UBWC_4_0,
+.ubwc_swizzle = 6,
+.ubwc_static = 1,
+.highest_bank_bit = 3,
+.macrotile_mode = 1,
+.reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -715,6 +725,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+{ .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
Re: [PATCH v2 1/5] dt-bindings: display/msm: Document the DPU for QCS8300
On 2024/12/27 16:41, Krzysztof Kozlowski wrote: On Thu, Dec 26, 2024 at 05:40:45PM +0800, Yongxing Mou wrote: Document the DPU for Qualcomm QCS8300 platform.It use the same DPU Missing space after full stop. Got it. thanks, will fix it in next patch. hardware with SA8775P and reuse it's driver. Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof
Re: [PATCH v2 4/5] dt-bindings: phy: Add eDP PHY compatible for QCS8300
On 2024/12/29 12:42, Dmitry Baryshkov wrote: On Thu, Dec 26, 2024 at 05:40:48PM +0800, Yongxing Mou wrote: Add compatible string for the supported eDP PHY on QCS8300 platform. QCS8300 have the same eDP PHY with SA8775P. Signed-off-by: Yongxing Mou --- .../devicetree/bindings/phy/qcom,edp-phy.yaml | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) Everything else is display, this one is PHY. Consider separating this one to a separate series. Got it. will separate in next version. diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index 293fb6a9b1c330438bceba15226c91e392c840fb..eb97181cbb9579893b4ee26a39c3559ad87b2fba 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -16,13 +16,18 @@ description: properties: compatible: -enum: - - qcom,sa8775p-edp-phy - - qcom,sc7280-edp-phy - - qcom,sc8180x-edp-phy - - qcom,sc8280xp-dp-phy - - qcom,sc8280xp-edp-phy - - qcom,x1e80100-dp-phy +oneOf: + - enum: + - qcom,sa8775p-edp-phy + - qcom,sc7280-edp-phy + - qcom,sc8180x-edp-phy + - qcom,sc8280xp-dp-phy + - qcom,sc8280xp-edp-phy + - qcom,x1e80100-dp-phy + - items: + - enum: + - qcom,qcs8300-edp-phy + - const: qcom,sa8775p-edp-phy reg: items: -- 2.34.1
Re: [PATCH v2 0/5] Display enablement changes for Qualcomm QCS8300 platform
On 2024/12/27 16:39, Krzysztof Kozlowski wrote: On Thu, Dec 26, 2024 at 05:40:44PM +0800, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller and eDP PHY for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241203-qcs8300_initial_dtsi-v4-2-d7c953484...@quicinc.com/ Then why this is not part of initial DTSI? Sorry. it's not part of initial DTSI, These are the dependencies for enabling the display MDSS/DP. Not the real dependency for dt-binds and driver. https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87...@quicinc.com/ https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed...@quicinc.com/ So it cannot be tested? Way too many dependencies for me to review. If we are only running dt-bindings checks or compiling driver files, we actually don't need these dependencies. You can directly running the test. They are all used to enable the display MDSS and DP. So maybe i need to update the cover letter and remove those dependencies. Thanks for point it. Best regards, Krzysztof
Re: [PATCH v2 0/5] Display enablement changes for Qualcomm QCS8300 platform
On 2024/12/29 12:44, Dmitry Baryshkov wrote: On Thu, Dec 26, 2024 at 05:40:44PM +0800, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller and eDP PHY for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241203-qcs8300_initial_dtsi-v4-2-d7c953484...@quicinc.com/ https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87...@quicinc.com/ https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed...@quicinc.com/ How does it depend on all those series? Does it have any intersection point at all? You should have decoupled all bindings from those series. If you did, please update your cover letter. If you didn't, please do your home work. Thanks for point it.Yes, we have decouple all bindings from dts changes.For binding checks or driver, we no longer need these dependencies. I will update the cover letter later. Thanks. --- Changes in v2:Fixed review comments from Krzysztof, Dmitry, Rob. - Decouple the devicetree changes from this series.[Dmitry][Krzysztof] - Drop the dpu driver changes and reuse SA8775P DPU driver.[Dmitry] - Fix compilation issues in MDSS bindings.[Rob][Krzysztof] - Correct formatting errors and remove unnecessary status in MDSS bindings.[Krzysztof] - Add the the necessary information in MDSS changes commit msg.[Dmitry] - Rebase MDSS driver changes to https://lore.kernel.org/dri-devel/ 20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/.[Dmitry] - Package the DisplayPort controller and eDP PHY bindings document to this patch series. - Collecting MDSS changes reviewd-by Dmitry. - Reuse the sa8775p eDP PHY as a fallback compat.[Dmitry] - Reuse the sm8650 DP controller as a fallback compat.[Dmitry] - Link to v1: https://lore.kernel.org/r/20241127-mdss_qcs8300-v1-0-29b2c3ee9...@quicinc.com ~ --- Yongxing Mou (5): dt-bindings: display/msm: Document the DPU for QCS8300 dt-bindings: display: msm: dp-controller: document QCS8300 compatible dt-bindings: display/msm: Document MDSS on QCS8300 dt-bindings: phy: Add eDP PHY compatible for QCS8300 drm/msm: mdss: Add QCS8300 support .../bindings/display/msm/dp-controller.yaml| 4 + .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 + .../bindings/display/msm/qcom,sm8650-dpu.yaml | 13 +- .../devicetree/bindings/phy/qcom,edp-phy.yaml | 19 +- drivers/gpu/drm/msm/msm_mdss.c | 11 + 5 files changed, 280 insertions(+), 11 deletions(-) --- base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2 change-id: 20241224-mdssdt_qcs8300-11b7883dc60b prerequisite-message-id: <20241203-qcs8300_initial_dtsi-v4-2-d7c953484...@quicinc.com> prerequisite-patch-id: 33f2488a8eb133431f200e17aac743598508dcf3 prerequisite-patch-id: 7b653ebeaf1ca3f87620ccf7d876e3d1fe496c4a prerequisite-patch-id: e1b60af8a64332e5f0ecbd3a4ea2b6e090bd97cf prerequisite-patch-id: b823d744d2fb302e2496eaf0cf0c9c66312dcf2a prerequisite-message-id: <20241106-qcs8300-mm-patches-v3-0-f611a8f87...@quicinc.com> prerequisite-patch-id: 367d9c742fe5087cfa6fb8e7b05ebe9bc78d68f3 prerequisite-patch-id: ee0513c070ab96e63766d235b38ee53ca9b19181 prerequisite-patch-id: 970974160bcdc837ccbe5ea3b5dcac582e90bc0d prerequisite-patch-id: 5b2bd9cc44a529b0b9e5d73128dca5d2ff9f2f44 prerequisite-patch-id: 6a0a81242e1d0f051e3102533bf0191615c6e96b prerequisite-patch-id: 322540ce6d45c32f813ecef50e5135c6f08d9019 prerequisite-message-id: <20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com> prerequisite-patch-id: 8faad5c6d8ca255935d3e4d317dcbcc32b8261ff prerequisite-message-id: <20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed...@quicinc.com> prerequisite-patch-id: 81378ec66ab6e569bd828401c43c4f5af55db32c Best regards, -- Yongxing Mou
[PATCH v2 2/5] dt-bindings: display: msm: dp-controller: document QCS8300 compatible
Add compatible string for the DisplayPort controller found on the Qualcomm QCS8300 platform.QCS8300 only support one DisplayPort controller and have the same base offset with sm8650, so we reuse the sm8650 DisplayPort driver. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index a212f335d5ffae545d2e5bacec95299ca45e8405..863ef967e48789d3ca4e5a8a2f198dad4e8ae321 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -36,6 +36,10 @@ properties: - qcom,sm8450-dp - qcom,sm8550-dp - const: qcom,sm8350-dp + - items: + - enum: + - qcom,qcs8300-dp + - const: qcom,sm8650-dp reg: minItems: 4 -- 2.34.1
[PATCH v2 3/5] dt-bindings: display/msm: Document MDSS on QCS8300
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
.../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 +
1 file changed, 244 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
new file mode 100644
index
..eb7f36387f748793ebf662baded4a13a61b3ce39
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
@@ -0,0 +1,244 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. QCS8300 Display MDSS
+
+maintainers:
+ - Yongxing Mou
+
+description:
+ QCS8300 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks
like
+ DPU display controller, DP interfaces and EDP etc.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+const: qcom,qcs8300-mdss
+
+ clocks:
+items:
+ - description: Display AHB
+ - description: Display hf AXI
+ - description: Display core
+
+ iommus:
+maxItems: 1
+
+ interconnects:
+maxItems: 3
+
+ interconnect-names:
+maxItems: 3
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dpu
+ - const: qcom,sa8775p-dpu
+
+ "^displayport-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dp
+ - const: qcom,sm8650-dp
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+mdss: display-subsystem@ae0 {
+compatible = "qcom,qcs8300-mdss";
+reg = <0x0ae0 0x1000>;
+reg-names = "mdss";
+
+interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG
QCOM_ICC_TAG_ACTIVE_ONLY>;
+interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
+
+resets = <&dispcc_core_bcr>;
+power-domains = <&dispcc_gdsc>;
+
+clocks = <&dispcc_ahb_clk>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc_mdp_clk>;
+
+interrupts = ;
+interrupt-controller;
+#interrupt-cells = <1>;
+
+iommus = <&apps_smmu 0x1000 0x402>;
+
+#address-cells = <1>;
+#size-cells = <1>;
+ranges;
+
+display-controller@ae01000 {
+compatible = "qcom,qcs8300-dpu", "qcom,sa8775p-dpu";
+reg = <0x0ae01000 0x8f000>,
+ <0x0aeb 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+operating-points-v2 = <&mdp_opp_table>;
+power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+interrupt-parent = <&mdss>;
+interrupts = <0>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+port@0 {
+reg = <0>;
+
+dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp0_in>;
+};
+};
+};
+
+mdp_opp_table: opp-table {
+compatibl
[PATCH v2 0/5] Display enablement changes for Qualcomm QCS8300 platform
This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller and eDP PHY for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- This series depends on following series: https://lore.kernel.org/all/20241203-qcs8300_initial_dtsi-v4-2-d7c953484...@quicinc.com/ https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87...@quicinc.com/ https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com/ https://lore.kernel.org/all/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed...@quicinc.com/ --- Changes in v2:Fixed review comments from Krzysztof, Dmitry, Rob. - Decouple the devicetree changes from this series.[Dmitry][Krzysztof] - Drop the dpu driver changes and reuse SA8775P DPU driver.[Dmitry] - Fix compilation issues in MDSS bindings.[Rob][Krzysztof] - Correct formatting errors and remove unnecessary status in MDSS bindings.[Krzysztof] - Add the the necessary information in MDSS changes commit msg.[Dmitry] - Rebase MDSS driver changes to https://lore.kernel.org/dri-devel/ 20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/.[Dmitry] - Package the DisplayPort controller and eDP PHY bindings document to this patch series. - Collecting MDSS changes reviewd-by Dmitry. - Reuse the sa8775p eDP PHY as a fallback compat.[Dmitry] - Reuse the sm8650 DP controller as a fallback compat.[Dmitry] - Link to v1: https://lore.kernel.org/r/20241127-mdss_qcs8300-v1-0-29b2c3ee9...@quicinc.com ~ --- Yongxing Mou (5): dt-bindings: display/msm: Document the DPU for QCS8300 dt-bindings: display: msm: dp-controller: document QCS8300 compatible dt-bindings: display/msm: Document MDSS on QCS8300 dt-bindings: phy: Add eDP PHY compatible for QCS8300 drm/msm: mdss: Add QCS8300 support .../bindings/display/msm/dp-controller.yaml| 4 + .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 + .../bindings/display/msm/qcom,sm8650-dpu.yaml | 13 +- .../devicetree/bindings/phy/qcom,edp-phy.yaml | 19 +- drivers/gpu/drm/msm/msm_mdss.c | 11 + 5 files changed, 280 insertions(+), 11 deletions(-) --- base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2 change-id: 20241224-mdssdt_qcs8300-11b7883dc60b prerequisite-message-id: <20241203-qcs8300_initial_dtsi-v4-2-d7c953484...@quicinc.com> prerequisite-patch-id: 33f2488a8eb133431f200e17aac743598508dcf3 prerequisite-patch-id: 7b653ebeaf1ca3f87620ccf7d876e3d1fe496c4a prerequisite-patch-id: e1b60af8a64332e5f0ecbd3a4ea2b6e090bd97cf prerequisite-patch-id: b823d744d2fb302e2496eaf0cf0c9c66312dcf2a prerequisite-message-id: <20241106-qcs8300-mm-patches-v3-0-f611a8f87...@quicinc.com> prerequisite-patch-id: 367d9c742fe5087cfa6fb8e7b05ebe9bc78d68f3 prerequisite-patch-id: ee0513c070ab96e63766d235b38ee53ca9b19181 prerequisite-patch-id: 970974160bcdc837ccbe5ea3b5dcac582e90bc0d prerequisite-patch-id: 5b2bd9cc44a529b0b9e5d73128dca5d2ff9f2f44 prerequisite-patch-id: 6a0a81242e1d0f051e3102533bf0191615c6e96b prerequisite-patch-id: 322540ce6d45c32f813ecef50e5135c6f08d9019 prerequisite-message-id: <20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c...@quicinc.com> prerequisite-patch-id: 8faad5c6d8ca255935d3e4d317dcbcc32b8261ff prerequisite-message-id: <20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed...@quicinc.com> prerequisite-patch-id: 81378ec66ab6e569bd828401c43c4f5af55db32c Best regards, -- Yongxing Mou
[PATCH v2 1/5] dt-bindings: display/msm: Document the DPU for QCS8300
Document the DPU for Qualcomm QCS8300 platform.It use the same DPU hardware with SA8775P and reuse it's driver. Signed-off-by: Yongxing Mou --- .../devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml| 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 01cf79bd754b491349c52c5aef49ba06e835d0bf..61ec4dd029a8de3b0e78fc97c6c0a602f84027ff 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -13,10 +13,15 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: -enum: - - qcom,sa8775p-dpu - - qcom,sm8650-dpu - - qcom,x1e80100-dpu +oneOf: + - enum: + - qcom,sa8775p-dpu + - qcom,sm8650-dpu + - qcom,x1e80100-dpu + - items: + - enum: + - qcom,qcs8300-dpu + - const: qcom,sa8775p-dpu reg: items: -- 2.34.1
[PATCH v2 4/5] dt-bindings: phy: Add eDP PHY compatible for QCS8300
Add compatible string for the supported eDP PHY on QCS8300 platform. QCS8300 have the same eDP PHY with SA8775P. Signed-off-by: Yongxing Mou --- .../devicetree/bindings/phy/qcom,edp-phy.yaml | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index 293fb6a9b1c330438bceba15226c91e392c840fb..eb97181cbb9579893b4ee26a39c3559ad87b2fba 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -16,13 +16,18 @@ description: properties: compatible: -enum: - - qcom,sa8775p-edp-phy - - qcom,sc7280-edp-phy - - qcom,sc8180x-edp-phy - - qcom,sc8280xp-dp-phy - - qcom,sc8280xp-edp-phy - - qcom,x1e80100-dp-phy +oneOf: + - enum: + - qcom,sa8775p-edp-phy + - qcom,sc7280-edp-phy + - qcom,sc8180x-edp-phy + - qcom,sc8280xp-dp-phy + - qcom,sc8280xp-edp-phy + - qcom,x1e80100-dp-phy + - items: + - enum: + - qcom,qcs8300-edp-phy + - const: qcom,sa8775p-edp-phy reg: items: -- 2.34.1
[PATCH v2 5/5] drm/msm: mdss: Add QCS8300 support
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Due to different memory type, it use different mdss_data with SA8775P
although using the same dpu.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
dcb49fd30402b80edd2cb5971f95a78eaad6081f..40c8b476763b8c39434b1448008cfa8ffac7a8ea
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -582,6 +582,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+ .ubwc_enc_version = UBWC_4_0,
+ .ubwc_dec_version = UBWC_4_0,
+ .ubwc_swizzle = 6,
+ .ubwc_bank_spread = true,
+ .highest_bank_bit = 3,
+ .macrotile_mode = true,
+ .reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -737,6 +747,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+ { .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
[PATCH] drm/msm/dpu: Allocate the number of LMs based on max_mixer_width to support 4 streams MST case
In 2x2 mst case, each 2k monitor will use 2 lms, but dpu_8_4 only have 6 lms, so let 2k only use one lm to support such case. Signed-off-by: Abhinav Kumar Signed-off-by: Yongxing Mou --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 5172ab4dea995a154cd88d05c3842d7425fc34ce..e8846bf8edc5f9b2b3b7f093e4d5aad75de53da1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -677,7 +677,8 @@ static struct msm_display_topology dpu_encoder_get_topology( else if (!dpu_kms->catalog->caps->has_3d_merge) topology.num_lm = 1; else - topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; + topology.num_lm = (mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) ? + 2 : 1; if (crtc_state->ctm) topology.num_dspp = topology.num_lm; --- base-commit: df5d6180169ae06a2eac57e33b077ad6f6252440 change-id: 20250211-dp_lm-8f8ef15f5955 Best regards, -- Yongxing Mou
Re: [PATCH 1/4] dt-bindings: display/msm: Redocument the dp-controller for QCS8300
On 2025/2/12 16:35, Krzysztof Kozlowski wrote: On 12/02/2025 08:12, Yongxing Mou wrote: We need to enable mst for qcs8300, dp0 controller will support 2 streams output. So not reuse sm8650 dp controller driver and will add a new driver patch for qcs8300 mst feature. Modify the corresponding dt-bingding file to compatible with the qcs8300-dp. Signed-off-by: Yongxing Mou NAK. You just said qcs8300 is compatible with sm8650. I did not ask about drivers, I asked about hardware. This is messy approach. Describe properly the hardware first, instead of sending two conflicting patchsets. Best regards, Krzysztof Hi, Krzysztof, thanks for reviewing, i want to explain why i submitted this patch. Patch https://lore.kernel.org/all/20250114-dts_qcs8300-v3-1-d114cc5e4...@quicinc.com/ and https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-2-1687e7842...@quicinc.com/ is the qcs8300 display enablement changes. It base on current linux base code and it only support SST mode, so in the SST mode, qcs8300 dp controller driver is quite same with sm8650, struct msm_dp_desc only have 3 members(io_start, id and wide_bus_supported) and they are same both in qcs8300 and sm8650, so we reuse it. BTW, for dp phy hardware version, qcs8300 and sm8650 is different. For this patch series, https://lore.kernel.org/all/20250212-mst_qcs8300-v1-0-38a8aa083...@quicinc.com/ , it is made on top of https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/ which is a new feature for msm platform and not fully reviewed all the code. Currently patch series enable the MST feature for qcs8300, so the dp controller need to support stream 1, and we need add max_streams and intf_map in the struct msm_dp_desc to support MST. So we don't reuse the sm8650 drivers in this patch series. For my understanding, qcs8300 SST changes should merge first(https://lore.kernel.org/all/20250114-dts_qcs8300-v3-0-d114cc5e4...@quicinc.com/ and https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-0-1687e7842...@quicinc.com/), and next is the MST base commits (https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/), and this patch series should merge at last. why i post qcs8300 enablement changes first and then post the MST changes instead of post them together? Because our dependency, i mean this patch series (https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/), it has about 45 changes, so it might take lots of time to merge. we just want to make sure that display can work on DP SST mode first. So I am just understand that the previous commit was not an incorrect commit, but rather two functionalities were changed in the same place. Thanks, Yongxing
[PATCH v4 4/4] drm/msm: mdss: Add QCS8300 support
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Due to different memory type, it use different mdss_data with SA8775P
although using the same dpu.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
dcb49fd30402b80edd2cb5971f95a78eaad6081f..40c8b476763b8c39434b1448008cfa8ffac7a8ea
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -582,6 +582,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+ .ubwc_enc_version = UBWC_4_0,
+ .ubwc_dec_version = UBWC_4_0,
+ .ubwc_swizzle = 6,
+ .ubwc_bank_spread = true,
+ .highest_bank_bit = 3,
+ .macrotile_mode = true,
+ .reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -737,6 +747,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+ { .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
[PATCH v4 2/4] dt-bindings: display/msm: Document the dp-controller for QCS8300
Add compatible string for the DisplayPort controller found on the Qualcomm QCS8300 platform.QCS8300 only support one DisplayPort controller and have the same base offset with sm8650, so we reuse the sm8650 DisplayPort driver. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index e00b88332f2fed2fc33f6d72c5cc3d827cd7594e..3df6f9e278275d8e19fafb4a397d776e0c606c7c 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -37,6 +37,10 @@ properties: - qcom,sm8450-dp - qcom,sm8550-dp - const: qcom,sm8350-dp + - items: + - enum: + - qcom,qcs8300-dp + - const: qcom,sm8650-dp reg: minItems: 4 -- 2.34.1
[PATCH v4 0/4] Display enablement changes for Qualcomm QCS8300 platform
This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- Changes in v4:Fixed review comments from Krzysztof, Dmitry. - Use the common style for the dt-bindings commits.[Dmitry] - Update the commits msg for the mdss binding patch, explain why they reuse different platform drivers.[Krzysztof] - Link to v3: https://lore.kernel.org/r/20250113-mdssdt_qcs8300-v3-0-6c8e93459...@quicinc.com Changes in v3:Fixed review comments from Krzysztof, Dmitry. - Fix the missing space issue in commit message.[Krzysztof] - Separate the patch for the phy from this series.[Dmitry] - Remove unused dependencies and update in the cover letter.[Dmitry][Krzysztof] - Link to v2: https://lore.kernel.org/r/20241226-mdssdt_qcs8300-v2-0-acba0db53...@quicinc.com Changes in v2:Fixed review comments from Krzysztof, Dmitry, Rob. - Decouple the devicetree changes from this series.[Dmitry][Krzysztof] - Drop the dpu driver changes and reuse SA8775P DPU driver.[Dmitry] - Fix compilation issues in MDSS bindings.[Rob][Krzysztof] - Correct formatting errors and remove unnecessary status in MDSS bindings.[Krzysztof] - Add the the necessary information in MDSS changes commit msg.[Dmitry] - Rebase MDSS driver changes to https://lore.kernel.org/dri-devel/ 20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/.[Dmitry] - Package the DisplayPort controller and eDP PHY bindings document to this patch series. - Collecting MDSS changes reviewd-by Dmitry. - Reuse the sa8775p eDP PHY as a fallback compat.[Dmitry] - Reuse the sm8650 DP controller as a fallback compat.[Dmitry] - Link to v1: https://lore.kernel.org/r/20241127-mdss_qcs8300-v1-0-29b2c3ee9...@quicinc.com ~ --- Yongxing Mou (4): dt-bindings: display/msm: Document the DPU for QCS8300 dt-bindings: display/msm: Document the dp-controller for QCS8300 dt-bindings: display/msm: Document MDSS on QCS8300 drm/msm: mdss: Add QCS8300 support .../bindings/display/msm/dp-controller.yaml| 4 + .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 + .../bindings/display/msm/qcom,sm8650-dpu.yaml | 13 +- drivers/gpu/drm/msm/msm_mdss.c | 11 + 4 files changed, 268 insertions(+), 4 deletions(-) --- base-commit: 2b88851f583d3c4e40bcd40cfe1965241ec229dd change-id: 20241224-mdssdt_qcs8300-11b7883dc60b Best regards, -- Yongxing Mou
[PATCH v4 1/4] dt-bindings: display/msm: Document the DPU for QCS8300
Document the DPU for Qualcomm QCS8300 platform. It use the same DPU hardware with SA8775P and reuse it's driver. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yongxing Mou --- .../devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml| 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 01cf79bd754b491349c52c5aef49ba06e835d0bf..61ec4dd029a8de3b0e78fc97c6c0a602f84027ff 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -13,10 +13,15 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: -enum: - - qcom,sa8775p-dpu - - qcom,sm8650-dpu - - qcom,x1e80100-dpu +oneOf: + - enum: + - qcom,sa8775p-dpu + - qcom,sm8650-dpu + - qcom,x1e80100-dpu + - items: + - enum: + - qcom,qcs8300-dpu + - const: qcom,sa8775p-dpu reg: items: -- 2.34.1
[PATCH v4 3/4] dt-bindings: display/msm: Document MDSS on QCS8300
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
QCS8300 use the same DPU hardware version as SA8775P, so we reuse it's
driver. But QCS8300 only have one DP controller, and offset is same with
sm8650, so dp controller reuse the sm8650's driver.
Signed-off-by: Yongxing Mou
---
.../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 +
1 file changed, 244 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
new file mode 100644
index
..eb7f36387f748793ebf662baded4a13a61b3ce39
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
@@ -0,0 +1,244 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. QCS8300 Display MDSS
+
+maintainers:
+ - Yongxing Mou
+
+description:
+ QCS8300 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks
like
+ DPU display controller, DP interfaces and EDP etc.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+const: qcom,qcs8300-mdss
+
+ clocks:
+items:
+ - description: Display AHB
+ - description: Display hf AXI
+ - description: Display core
+
+ iommus:
+maxItems: 1
+
+ interconnects:
+maxItems: 3
+
+ interconnect-names:
+maxItems: 3
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dpu
+ - const: qcom,sa8775p-dpu
+
+ "^displayport-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dp
+ - const: qcom,sm8650-dp
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+mdss: display-subsystem@ae0 {
+compatible = "qcom,qcs8300-mdss";
+reg = <0x0ae0 0x1000>;
+reg-names = "mdss";
+
+interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG
QCOM_ICC_TAG_ACTIVE_ONLY>;
+interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
+
+resets = <&dispcc_core_bcr>;
+power-domains = <&dispcc_gdsc>;
+
+clocks = <&dispcc_ahb_clk>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc_mdp_clk>;
+
+interrupts = ;
+interrupt-controller;
+#interrupt-cells = <1>;
+
+iommus = <&apps_smmu 0x1000 0x402>;
+
+#address-cells = <1>;
+#size-cells = <1>;
+ranges;
+
+display-controller@ae01000 {
+compatible = "qcom,qcs8300-dpu", "qcom,sa8775p-dpu";
+reg = <0x0ae01000 0x8f000>,
+ <0x0aeb 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+operating-points-v2 = <&mdp_opp_table>;
+power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+interrupt-parent = <&mdss>;
+interrupts = <0>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+port@0 {
+reg = <0>;
+
+dpu_intf0_ou
[PATCH v3 1/4] dt-bindings: display/msm: Document the DPU for QCS8300
Document the DPU for Qualcomm QCS8300 platform. It use the same DPU hardware with SA8775P and reuse it's driver. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yongxing Mou --- .../devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml| 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 01cf79bd754b491349c52c5aef49ba06e835d0bf..61ec4dd029a8de3b0e78fc97c6c0a602f84027ff 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -13,10 +13,15 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: -enum: - - qcom,sa8775p-dpu - - qcom,sm8650-dpu - - qcom,x1e80100-dpu +oneOf: + - enum: + - qcom,sa8775p-dpu + - qcom,sm8650-dpu + - qcom,x1e80100-dpu + - items: + - enum: + - qcom,qcs8300-dpu + - const: qcom,sa8775p-dpu reg: items: -- 2.34.1
[PATCH v3 0/4] Display enablement changes for Qualcomm QCS8300 platform
This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- Changes in v3:Fixed review comments from Krzysztof, Dmitry. - Fix the missing space issue in commit message.[Krzysztof] - Separate the patch for the phy from this series.[Dmitry] - Remove unused dependencies and update in the cover letter.[Dmitry][Krzysztof] - Link to v2: https://lore.kernel.org/r/20241226-mdssdt_qcs8300-v2-0-acba0db53...@quicinc.com Changes in v2:Fixed review comments from Krzysztof, Dmitry, Rob. - Decouple the devicetree changes from this series.[Dmitry][Krzysztof] - Drop the dpu driver changes and reuse SA8775P DPU driver.[Dmitry] - Fix compilation issues in MDSS bindings.[Rob][Krzysztof] - Correct formatting errors and remove unnecessary status in MDSS bindings.[Krzysztof] - Add the the necessary information in MDSS changes commit msg.[Dmitry] - Rebase MDSS driver changes to https://lore.kernel.org/dri-devel/ 20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/.[Dmitry] - Package the DisplayPort controller and eDP PHY bindings document to this patch series. - Collecting MDSS changes reviewd-by Dmitry. - Reuse the sa8775p eDP PHY as a fallback compat.[Dmitry] - Reuse the sm8650 DP controller as a fallback compat.[Dmitry] - Link to v1: https://lore.kernel.org/r/20241127-mdss_qcs8300-v1-0-29b2c3ee9...@quicinc.com ~ --- Yongxing Mou (4): dt-bindings: display/msm: Document the DPU for QCS8300 dt-bindings: display: msm: dp-controller: document QCS8300 compatible dt-bindings: display/msm: Document MDSS on QCS8300 drm/msm: mdss: Add QCS8300 support .../bindings/display/msm/dp-controller.yaml| 4 + .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 + .../bindings/display/msm/qcom,sm8650-dpu.yaml | 13 +- drivers/gpu/drm/msm/msm_mdss.c | 11 + 4 files changed, 268 insertions(+), 4 deletions(-) --- base-commit: 2b88851f583d3c4e40bcd40cfe1965241ec229dd change-id: 20241224-mdssdt_qcs8300-11b7883dc60b Best regards, -- Yongxing Mou
[PATCH v3 3/4] dt-bindings: display/msm: Document MDSS on QCS8300
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
.../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 +
1 file changed, 244 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
new file mode 100644
index
..eb7f36387f748793ebf662baded4a13a61b3ce39
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
@@ -0,0 +1,244 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. QCS8300 Display MDSS
+
+maintainers:
+ - Yongxing Mou
+
+description:
+ QCS8300 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks
like
+ DPU display controller, DP interfaces and EDP etc.
+
+$ref: /schemas/display/msm/mdss-common.yaml#
+
+properties:
+ compatible:
+const: qcom,qcs8300-mdss
+
+ clocks:
+items:
+ - description: Display AHB
+ - description: Display hf AXI
+ - description: Display core
+
+ iommus:
+maxItems: 1
+
+ interconnects:
+maxItems: 3
+
+ interconnect-names:
+maxItems: 3
+
+patternProperties:
+ "^display-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dpu
+ - const: qcom,sa8775p-dpu
+
+ "^displayport-controller@[0-9a-f]+$":
+type: object
+additionalProperties: true
+
+properties:
+ compatible:
+items:
+ - const: qcom,qcs8300-dp
+ - const: qcom,sm8650-dp
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+mdss: display-subsystem@ae0 {
+compatible = "qcom,qcs8300-mdss";
+reg = <0x0ae0 0x1000>;
+reg-names = "mdss";
+
+interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG
QCOM_ICC_TAG_ACTIVE_ONLY>;
+interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
+
+resets = <&dispcc_core_bcr>;
+power-domains = <&dispcc_gdsc>;
+
+clocks = <&dispcc_ahb_clk>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc_mdp_clk>;
+
+interrupts = ;
+interrupt-controller;
+#interrupt-cells = <1>;
+
+iommus = <&apps_smmu 0x1000 0x402>;
+
+#address-cells = <1>;
+#size-cells = <1>;
+ranges;
+
+display-controller@ae01000 {
+compatible = "qcom,qcs8300-dpu", "qcom,sa8775p-dpu";
+reg = <0x0ae01000 0x8f000>,
+ <0x0aeb 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+operating-points-v2 = <&mdp_opp_table>;
+power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+interrupt-parent = <&mdss>;
+interrupts = <0>;
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+port@0 {
+reg = <0>;
+
+dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp0_in>;
+};
+};
+};
+
+mdp_opp_table: opp-table {
+compatibl
[PATCH v3 2/4] dt-bindings: display: msm: dp-controller: document QCS8300 compatible
Add compatible string for the DisplayPort controller found on the Qualcomm QCS8300 platform.QCS8300 only support one DisplayPort controller and have the same base offset with sm8650, so we reuse the sm8650 DisplayPort driver. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index e00b88332f2fed2fc33f6d72c5cc3d827cd7594e..3df6f9e278275d8e19fafb4a397d776e0c606c7c 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -37,6 +37,10 @@ properties: - qcom,sm8450-dp - qcom,sm8550-dp - const: qcom,sm8350-dp + - items: + - enum: + - qcom,qcs8300-dp + - const: qcom,sm8650-dp reg: minItems: 4 -- 2.34.1
[PATCH v3 4/4] drm/msm: mdss: Add QCS8300 support
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Due to different memory type, it use different mdss_data with SA8775P
although using the same dpu.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
dcb49fd30402b80edd2cb5971f95a78eaad6081f..40c8b476763b8c39434b1448008cfa8ffac7a8ea
100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -582,6 +582,16 @@ static const struct msm_mdss_data qcm2290_data = {
.reg_bus_bw = 76800,
};
+static const struct msm_mdss_data qcs8300_data = {
+ .ubwc_enc_version = UBWC_4_0,
+ .ubwc_dec_version = UBWC_4_0,
+ .ubwc_swizzle = 6,
+ .ubwc_bank_spread = true,
+ .highest_bank_bit = 3,
+ .macrotile_mode = true,
+ .reg_bus_bw = 74000,
+};
+
static const struct msm_mdss_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_dec_version = UBWC_4_0,
@@ -737,6 +747,7 @@ static const struct of_device_id mdss_dt_match[] = {
{ .compatible = "qcom,mdss" },
{ .compatible = "qcom,msm8998-mdss", .data = &msm8998_data },
{ .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data },
+ { .compatible = "qcom,qcs8300-mdss", .data = &qcs8300_data },
{ .compatible = "qcom,sa8775p-mdss", .data = &sa8775p_data },
{ .compatible = "qcom,sdm670-mdss", .data = &sdm670_data },
{ .compatible = "qcom,sdm845-mdss", .data = &sdm845_data },
--
2.34.1
Re: [PATCH v3 0/4] Display enablement changes for Qualcomm QCS8300 platform
On 2025/1/13 17:36, Dmitry Baryshkov wrote: On Mon, Jan 13, 2025 at 05:26:56PM +0800, Yongxing Mou wrote: On 2025/1/13 17:02, Dmitry Baryshkov wrote: On Mon, Jan 13, 2025 at 04:03:07PM +0800, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- Changes in v3:Fixed review comments from Krzysztof, Dmitry. - Fix the missing space issue in commit message.[Krzysztof] - Separate the patch for the phy from this series.[Dmitry] - Remove unused dependencies and update in the cover letter.[Dmitry][Krzysztof] - Link to v2: https://lore.kernel.org/r/20241226-mdssdt_qcs8300-v2-0-acba0db53...@quicinc.com Changes in v2:Fixed review comments from Krzysztof, Dmitry, Rob. - Decouple the devicetree changes from this series.[Dmitry][Krzysztof] - Drop the dpu driver changes and reuse SA8775P DPU driver.[Dmitry] - Fix compilation issues in MDSS bindings.[Rob][Krzysztof] - Correct formatting errors and remove unnecessary status in MDSS bindings.[Krzysztof] - Add the the necessary information in MDSS changes commit msg.[Dmitry] - Rebase MDSS driver changes to https://lore.kernel.org/dri-devel/ 20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/.[Dmitry] - Package the DisplayPort controller and eDP PHY bindings document to this patch series. - Collecting MDSS changes reviewd-by Dmitry. - Reuse the sa8775p eDP PHY as a fallback compat.[Dmitry] - Reuse the sm8650 DP controller as a fallback compat.[Dmitry] - Link to v1: https://lore.kernel.org/r/20241127-mdss_qcs8300-v1-0-29b2c3ee9...@quicinc.com ~ --- Yongxing Mou (4): dt-bindings: display/msm: Document the DPU for QCS8300 dt-bindings: display: msm: dp-controller: document QCS8300 compatible dt-bindings: display/msm: Document MDSS on QCS8300 Is there any reason for not using a common style for these three commits? Hi，actually, for the dp-controller.yamel file, I just noticed that the previous platforms added the dt-binding files using this format. So, I followed their format to write the commit message. Such as dt-bindings for sm8650/sm8150/sm8250... I don't care about either of the formats, but please be self-consistent. If one patch out of three has a different subject prefix, that looks strange. Got it, it does seem that way. I will revise the commit message format in the next version along with the MDSS binding review comments. Thanks. drm/msm: mdss: Add QCS8300 support .../bindings/display/msm/dp-controller.yaml| 4 + .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 + .../bindings/display/msm/qcom,sm8650-dpu.yaml | 13 +- drivers/gpu/drm/msm/msm_mdss.c | 11 + 4 files changed, 268 insertions(+), 4 deletions(-) --- base-commit: 2b88851f583d3c4e40bcd40cfe1965241ec229dd change-id: 20241224-mdssdt_qcs8300-11b7883dc60b Best regards, -- Yongxing Mou
Re: [PATCH v3 0/4] Display enablement changes for Qualcomm QCS8300 platform
On 2025/1/13 17:02, Dmitry Baryshkov wrote: On Mon, Jan 13, 2025 at 04:03:07PM +0800, Yongxing Mou wrote: This series introduces support to enable the Mobile Display Subsystem (MDSS) , Display Processing Unit (DPU), DisplayPort controller for the Qualcomm QCS8300 target. It includes the addition of the hardware catalog, compatible string, and their YAML bindings. Signed-off-by: Yongxing Mou --- Changes in v3:Fixed review comments from Krzysztof, Dmitry. - Fix the missing space issue in commit message.[Krzysztof] - Separate the patch for the phy from this series.[Dmitry] - Remove unused dependencies and update in the cover letter.[Dmitry][Krzysztof] - Link to v2: https://lore.kernel.org/r/20241226-mdssdt_qcs8300-v2-0-acba0db53...@quicinc.com Changes in v2:Fixed review comments from Krzysztof, Dmitry, Rob. - Decouple the devicetree changes from this series.[Dmitry][Krzysztof] - Drop the dpu driver changes and reuse SA8775P DPU driver.[Dmitry] - Fix compilation issues in MDSS bindings.[Rob][Krzysztof] - Correct formatting errors and remove unnecessary status in MDSS bindings.[Krzysztof] - Add the the necessary information in MDSS changes commit msg.[Dmitry] - Rebase MDSS driver changes to https://lore.kernel.org/dri-devel/ 20241127-msm-mdss-ubwc-v3-0-9782a7c2b...@linaro.org/.[Dmitry] - Package the DisplayPort controller and eDP PHY bindings document to this patch series. - Collecting MDSS changes reviewd-by Dmitry. - Reuse the sa8775p eDP PHY as a fallback compat.[Dmitry] - Reuse the sm8650 DP controller as a fallback compat.[Dmitry] - Link to v1: https://lore.kernel.org/r/20241127-mdss_qcs8300-v1-0-29b2c3ee9...@quicinc.com ~ --- Yongxing Mou (4): dt-bindings: display/msm: Document the DPU for QCS8300 dt-bindings: display: msm: dp-controller: document QCS8300 compatible dt-bindings: display/msm: Document MDSS on QCS8300 Is there any reason for not using a common style for these three commits? Hi，actually, for the dp-controller.yamel file, I just noticed that the previous platforms added the dt-binding files using this format. So, I followed their format to write the commit message. Such as dt-bindings for sm8650/sm8150/sm8250... drm/msm: mdss: Add QCS8300 support .../bindings/display/msm/dp-controller.yaml| 4 + .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 + .../bindings/display/msm/qcom,sm8650-dpu.yaml | 13 +- drivers/gpu/drm/msm/msm_mdss.c | 11 + 4 files changed, 268 insertions(+), 4 deletions(-) --- base-commit: 2b88851f583d3c4e40bcd40cfe1965241ec229dd change-id: 20241224-mdssdt_qcs8300-11b7883dc60b Best regards, -- Yongxing Mou
Re: [PATCH v3 3/4] dt-bindings: display/msm: Document MDSS on QCS8300
On 2025/1/14 18:11, Krzysztof Kozlowski wrote: On 14/01/2025 11:00, Dmitry Baryshkov wrote: On Tue, 14 Jan 2025 at 09:57, Krzysztof Kozlowski wrote: On Mon, Jan 13, 2025 at 04:03:10PM +0800, Yongxing Mou wrote: +patternProperties: + "^display-controller@[0-9a-f]+$": +type: object +additionalProperties: true + +properties: + compatible: +items: + - const: qcom,qcs8300-dpu + - const: qcom,sa8775p-dpu + + "^displayport-controller@[0-9a-f]+$": +type: object +additionalProperties: true + +properties: + compatible: +items: + - const: qcom,qcs8300-dp + - const: qcom,sm8650-dp Parts of qcs8300 display are compatible with sa8775p, other parts with sm8650. That's odd or even not correct. Assuming it is actually correct, it deserves explanation in commit msg. It seems to be correct. These are two different IP blocks with different modifications. QCS8300's DP configuration matches the SM8650 ([1]), though the DPU is the same as the one on the SA8775P platform. [1] https://lore.kernel.org/dri-devel/411626da-7563-48fb-ac7c-94f06e73e...@quicinc.com/ That's the driver, so you claim that qcs8300, which is a sa8775p, is not compatible with sa8775p because of current driver code? You see the contradiction? sa8775p is not compatible with sa8775p because of current driver patch? I don't think it is correct, but let's repeat: if you think otherwise, this should be explain in commit msg. Best regards, Krzysztof Hi,let me explain this: qcs8300 uses the same DPU as sa8775p, which is DPU_8_4. Therefore, for the DPU driver, qcs8300 reuses the driver of sa8775p. However, for the DisplayPort controller of qcs8300, it's different with sa8775p. qcs8300 only supports one DisplayPort output port, while sa8775p has two DPUs and supports four DisplayPort outputs. Therefore, the DisplayPort controller driver of sa8775p cannot be reused for qcs8300. Additionally, the base offset of qcs8300's DisplayPort controller is the same as that of sm8650, so the DisplayPort controller reuses "qcom,sm8650-dp". I explained this in the commit messages of the previous two bindings, but it might not have been explained in the commit message of this patch.i will update the commit msg in next patchset.
[PATCH 0/4] Add MST support for qcs8300 platform
This series of patches introduces how to enable MST functionality on the qcs8300 platform. The qcs8300 platform uses dpu_8_4 hardware, which is the same as the sa8775p, but it only has one DPU. So it only has one DP0 controller, supporting 4-stream MST. This patch only enables 2-stream MST, using intf0 and intf3. The first and second patches are modifications to the correspond dt-bindings, third patch is the dp controller driver after not reuse sm8650, fourth patch is the qcs8300 dts modification which add the clk support for stream 1. Signed-off-by: Yongxing Mou --- This patch depends on following series: https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-0-1687e7842...@quicinc.com/ https://lore.kernel.org/all/20250114-dts_qcs8300-v3-0-d114cc5e4...@quicinc.com/ https://lore.kernel.org/all/20241202-dp_mst_bindings-v1-0-9a9a43b06...@quicinc.com https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/ --- Yongxing Mou (4): dt-bindings: display/msm: Redocument the dp-controller for QCS8300 dt-bindings: display/msm: Add stream 1 pixel clock for QCS8300 drm/msm/dp: Populate the max_streams for qcs8300 mst controller arm64: dts: qcom: qcs8300: Add support for stream 1 clk for DP MST .../devicetree/bindings/display/msm/dp-controller.yaml | 5 + .../devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml | 14 -- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 12 drivers/gpu/drm/msm/dp/dp_display.c| 8 4 files changed, 25 insertions(+), 14 deletions(-) --- base-commit: 7ba9bcc5090556c007d9a718d7176e097fe54f19 change-id: 20250211-mst_qcs8300-4c18a5179165 Best regards, -- Yongxing Mou
[PATCH 4/4] arm64: dts: qcom: qcs8300: Add support for stream 1 clk for DP MST
Add 2 streams MST support for qcs8300. Compatile with qcs8300 dp
controller driver and populate the stream clock for qcs8300 DP0
controller in MST mode.
Signed-off-by: Yongxing Mou
---
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index
e10db7275accf769500abbebf57a6cbbbc4bf167..5166686981617707ba19245723e9215a53300392
100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -2865,12 +2865,13 @@ mdss_dp0_phy: phy@aec2a00 {
};
mdss_dp0: displayport-controller@af54000 {
- compatible = "qcom,qcs8300-dp", "qcom,sm8650-dp";
+ compatible = "qcom,qcs8300-dp";
reg = <0x0 0x0af54000 0x0 0x200>,
<0x0 0x0af54200 0x0 0x200>,
<0x0 0x0af55000 0x0 0xc00>,
- <0x0 0x0af56000 0x0 0x400>;
+ <0x0 0x0af56000 0x0 0x400>,
+ <0x0 0x0af57000 0x0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
@@ -2884,10 +2885,13 @@ mdss_dp0: displayport-controller@af54000 {
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc
MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc
MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ <&dispcc
MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc
MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&mdss_dp0_phy 0>,
+<&mdss_dp0_phy 1>,
<&mdss_dp0_phy 1>;
phys = <&mdss_dp0_phy>;
phy-names = "dp";
--
2.34.1
[PATCH 2/4] dt-bindings: display/msm: Add stream 1 pixel clock for QCS8300
Support mst for qcs8300 and add the stream 1 clock support in the mdss
dt-bindings.
Signed-off-by: Yongxing Mou
---
.../devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
index
eb7f36387f748793ebf662baded4a13a61b3ce39..610742ceebf8ee5e140a409bfeb92d9f43085214
100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
@@ -53,7 +53,6 @@ patternProperties:
compatible:
items:
- const: qcom,qcs8300-dp
- - const: qcom,sm8650-dp
required:
- compatible
@@ -164,7 +163,7 @@ examples:
};
displayport-controller@af54000 {
-compatible = "qcom,qcs8300-dp", "qcom,sm8650-dp";
+compatible = "qcom,qcs8300-dp";
pinctrl-0 = <&dp_hot_plug_det>;
pinctrl-names = "default";
@@ -181,15 +180,18 @@ examples:
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK>,
<&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
- <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>,
+ <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
- "stream_pixel";
+ "stream_pixel",
+ "stream_1_pixel";
assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
- <&dispcc0
MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
-assigned-clock-parents = <&mdss_edp_phy 0>, <&mdss_edp_phy 1>;
+ <&dispcc0
MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>,
+ <&dispcc0
MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>;
+assigned-clock-parents = <&mdss_edp_phy 0>, <&mdss_edp_phy 1>,
<&mdss_edp_phy 1>;
phys = <&mdss_edp_phy>;
phy-names = "dp";
operating-points-v2 = <&dp_opp_table>;
--
2.34.1
[PATCH 3/4] drm/msm/dp: Populate the max_streams for qcs8300 mst controller
Add support to program 2 streams MST for qcs8300. Previously, the
qcs8300 reused the driver of the sm8650's DP controller because they
have the same base address, offset, and number of controllers. However,
now we need to enable the MST feature for the qcs8300, so we need a new
patch The qcs8300 use the same DPU hardware as sa8775p but only have one
DPU and dp controller which supports 4 streams MST, but currently we only
enable 2 streams MST. It use the intf0 and intf3 to output the data
streams of MST0 and MST1.
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/dp/dp_display.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index
fbbd39d1e53ba3172757105937a528b5c58ea290..fbe4658af1be2ec8c02e8f567667f1dc93ee5537
100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -149,6 +149,13 @@ static const unsigned int
stream_intf_map_sa_8775p[][DP_STREAM_MAX] = {
{}
};
+static const struct msm_dp_desc msm_dp_desc_qcs8300[] = {
+ { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0,
.wide_bus_supported = true, .max_streams = 2,
+ .intf_map = stream_intf_map_sa_8775p[MSM_DP_CONTROLLER_0],
+ },
+ {}
+};
+
static const struct msm_dp_desc msm_dp_desc_sa8775p[] = {
{ .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0,
.wide_bus_supported = true, .max_streams = 2,
.intf_map = stream_intf_map_sa_8775p[MSM_DP_CONTROLLER_0],
@@ -205,6 +212,7 @@ static const struct msm_dp_desc msm_dp_desc_x1e80100[] = {
};
static const struct of_device_id msm_dp_dt_match[] = {
+ { .compatible = "qcom,qcs8300-dp", .data = &msm_dp_desc_qcs8300 },
{ .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
{ .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
{ .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
--
2.34.1
[PATCH 1/4] dt-bindings: display/msm: Redocument the dp-controller for QCS8300
We need to enable mst for qcs8300, dp0 controller will support 2 streams output. So not reuse sm8650 dp controller driver and will add a new driver patch for qcs8300 mst feature. Modify the corresponding dt-bingding file to compatible with the qcs8300-dp. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 359e364d79b20469d41cd8416a55b6a5d5c7d8ce..59075d7f05147f1f477f236a76fee6ec5d8c5ad8 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -18,6 +18,7 @@ properties: compatible: oneOf: - enum: + - qcom,qcs8300-dp - qcom,sa8775p-dp - qcom,sc7180-dp - qcom,sc7280-dp @@ -37,10 +38,6 @@ properties: - qcom,sm8450-dp - qcom,sm8550-dp - const: qcom,sm8350-dp - - items: - - enum: - - qcom,qcs8300-dp - - const: qcom,sm8650-dp reg: minItems: 4 -- 2.34.1
Re: [PATCH 0/4] Add MST support for qcs8300 platform
On 2025/2/19 20:07, Krzysztof Kozlowski wrote: On 19/02/2025 11:02, Yongxing Mou wrote: On 2025/2/12 17:06, Krzysztof Kozlowski wrote: On 12/02/2025 08:12, Yongxing Mou wrote: This series of patches introduces how to enable MST functionality on the qcs8300 platform. The qcs8300 platform uses dpu_8_4 hardware, which is the same as the sa8775p, but it only has one DPU. So it only has one DP0 controller, supporting 4-stream MST. This patch only enables 2-stream MST, using intf0 and intf3. The first and second patches are modifications to the correspond dt-bindings, third patch is the dp controller driver after not reuse sm8650, fourth patch is the qcs8300 dts modification which add the clk support for stream 1. Signed-off-by: Yongxing Mou --- This patch depends on following series: https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-0-1687e7842...@quicinc.com/ https://lore.kernel.org/all/20250114-dts_qcs8300-v3-0-d114cc5e4...@quicinc.com/ https://lore.kernel.org/all/20241202-dp_mst_bindings-v1-0-9a9a43b06...@quicinc.com https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/ Buggy patch cannot be the dependency. You need to fix the original patch instead. You are not supposed to wait till knowingly incorrect patches get merged so you can send a fix. You must respond to that patch stopping its merging process. Best regards, Krzysztof Thanks for the reminder. I hadn't noticed that before. We will wait for our dependencies to be ready before sending the new patchset. So this means you intend the knowingly incorrect patch to be applied? If so, all this should be just NAKed. Best regards, Krzysztof Hi, that is not my intention. I will correct the patch after i know it is incorrect. Thanks.
Re: [PATCH 1/4] dt-bindings: display/msm: Redocument the dp-controller for QCS8300
On 2025/2/12 19:28, Krzysztof Kozlowski wrote: On 12/02/2025 12:13, Yongxing Mou wrote: On 2025/2/12 16:35, Krzysztof Kozlowski wrote: On 12/02/2025 08:12, Yongxing Mou wrote: We need to enable mst for qcs8300, dp0 controller will support 2 streams output. So not reuse sm8650 dp controller driver and will add a new driver patch for qcs8300 mst feature. Modify the corresponding dt-bingding file to compatible with the qcs8300-dp. Signed-off-by: Yongxing Mou NAK. You just said qcs8300 is compatible with sm8650. I did not ask about drivers, I asked about hardware. This is messy approach. Describe properly the hardware first, instead of sending two conflicting patchsets. Best regards, Krzysztof Hi, Krzysztof, thanks for reviewing, i want to explain why i submitted this patch. Patch https://lore.kernel.org/all/20250114-dts_qcs8300-v3-1-d114cc5e4...@quicinc.com/ and https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-2-1687e7842...@quicinc.com/ is the qcs8300 display enablement changes. It base on current linux base code and it only support SST mode, so in the SST mode, qcs8300 dp controller driver is quite same with sm8650, struct msm_dp_desc only have 3 members(io_start, id and wide_bus_supported) and they are same both in qcs8300 and sm8650, so we reuse it. BTW, for dp phy hardware version, qcs8300 and sm8650 is different. No. In one patchset you claim hardware is like that, in other patchset you say hardware is different. Sorry, hardware does not change based on your patchsets. Sort out this before posting new versions. Best regards, Krzysztof Got it , thanks . The 4 clocks description will be updated in the new patch. Qcs8300 support 4 intfs in DP0, sm8650 supports 2 intfs in hardware.
Re: [PATCH 1/4] dt-bindings: display/msm: Redocument the dp-controller for QCS8300
On 2025/2/12 21:44, Konrad Dybcio wrote: On 12.02.2025 12:28 PM, Krzysztof Kozlowski wrote: On 12/02/2025 12:13, Yongxing Mou wrote: On 2025/2/12 16:35, Krzysztof Kozlowski wrote: On 12/02/2025 08:12, Yongxing Mou wrote: We need to enable mst for qcs8300, dp0 controller will support 2 streams output. So not reuse sm8650 dp controller driver and will add a new driver patch for qcs8300 mst feature. Modify the corresponding dt-bingding file to compatible with the qcs8300-dp. Signed-off-by: Yongxing Mou NAK. You just said qcs8300 is compatible with sm8650. I did not ask about drivers, I asked about hardware. This is messy approach. Describe properly the hardware first, instead of sending two conflicting patchsets. Best regards, Krzysztof Hi, Krzysztof, thanks for reviewing, i want to explain why i submitted this patch. Patch https://lore.kernel.org/all/20250114-dts_qcs8300-v3-1-d114cc5e4...@quicinc.com/ and https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-2-1687e7842...@quicinc.com/ is the qcs8300 display enablement changes. It base on current linux base code and it only support SST mode, so in the SST mode, qcs8300 dp controller driver is quite same with sm8650, struct msm_dp_desc only have 3 members(io_start, id and wide_bus_supported) and they are same both in qcs8300 and sm8650, so we reuse it. BTW, for dp phy hardware version, qcs8300 and sm8650 is different. No. In one patchset you claim hardware is like that, in other patchset you say hardware is different. Sorry, hardware does not change based on your patchsets. Sort out this before posting new versions. In other words, fallback compatibles must be chosen with features that are present in hardware, but not yet supported upstream in mind. It's totally fine (and even preferred/expected) to describe hardware resources (such as MST clocks here) when initially creating bindings for a piece of hw, even though the drivers don't use them yet at that moment. dt-bindings are supposed to give the OS a complete representation of the hardware and ideally be immutable (which is a struggle, but we're getting better). Driver specifics should not influence your decisions (or at least do so very minimally) when adding these. Now you're in a """good""" position as the display bindings haven't been merged yet, so you can still upload a new patchset where the description is more accurate. If it was merged, we'd have to break the ABI or add some crazy workarounds.. Please coalesce this patchset with the "add 8300 display support" one. Please also describe all 4 MST clocks and whatever other clocks/resets that may be necessary down the line. Konrad Thanks, will update it in this patch "add 8300 display support". Because this will depend on this change: https://patchwork.freedesktop.org/series/142016/. we will first fix our dependecy comments and then repost it.
Re: [PATCH 1/4] dt-bindings: display/msm: Redocument the dp-controller for QCS8300
On 2025/2/12 20:26, Dmitry Baryshkov wrote: On Wed, 12 Feb 2025 at 12:54, Krzysztof Kozlowski wrote: On 12/02/2025 11:41, Dmitry Baryshkov wrote: On Wed, Feb 12, 2025 at 03:12:24PM +0800, Yongxing Mou wrote: We need to enable mst for qcs8300, dp0 controller will support 2 streams output. So not reuse sm8650 dp controller driver and will add a new driver patch for qcs8300 mst feature. Modify the corresponding dt-bingding file to compatible with the qcs8300-dp. NAK for a different reason: QCS8300 is still compatible with SM8650. Enable features instead of randomly reshuffle compats. In this case, enable MST for both architectures. So the original patch was probably correct... I have no idea. I'd let Yongxing Mou to comment on this. It would be nice instead of getting a lengthy explanation of obvious items to get an answer to an actual question: is QCS8300 compatible with SM8650 or not. In other words whether they can support the same number of MST streams on each controller or not. Hi, in hardware, the SM8650's DP controller supports 2 INTFs, while the QCS8300's DP0 controller supports 4 INTFs.In sst mode, only one INTF will be used, they are same, but for MST, sm8650 supports 2 streams while qcs8300 support 4 streams. Thanks.
Re: [PATCH 4/4] arm64: dts: qcom: qcs8300: Add support for stream 1 clk for DP MST
On 2025/2/13 7:41, Konrad Dybcio wrote: On 12.02.2025 8:12 AM, Yongxing Mou wrote: Add 2 streams MST support for qcs8300. Compatile with qcs8300 dp controller driver and populate the stream clock for qcs8300 DP0 controller in MST mode. Signed-off-by: Yongxing Mou --- Please add all required resources for quad-MST operation Konrad Goit it, Thanks.
Re: [PATCH 2/4] dt-bindings: display/msm: Add stream 1 pixel clock for QCS8300
On 2025/2/12 16:34, Krzysztof Kozlowski wrote: Your patchset leads to warnings - it is non-bisectable. Fix original code, don't post buggy patches just to fix them immediately. Got it. Thanks for the reminder, won't do it again.
Re: [PATCH 0/4] Add MST support for qcs8300 platform
On 2025/2/12 17:06, Krzysztof Kozlowski wrote: On 12/02/2025 08:12, Yongxing Mou wrote: This series of patches introduces how to enable MST functionality on the qcs8300 platform. The qcs8300 platform uses dpu_8_4 hardware, which is the same as the sa8775p, but it only has one DPU. So it only has one DP0 controller, supporting 4-stream MST. This patch only enables 2-stream MST, using intf0 and intf3. The first and second patches are modifications to the correspond dt-bindings, third patch is the dp controller driver after not reuse sm8650, fourth patch is the qcs8300 dts modification which add the clk support for stream 1. Signed-off-by: Yongxing Mou --- This patch depends on following series: https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-0-1687e7842...@quicinc.com/ https://lore.kernel.org/all/20250114-dts_qcs8300-v3-0-d114cc5e4...@quicinc.com/ https://lore.kernel.org/all/20241202-dp_mst_bindings-v1-0-9a9a43b06...@quicinc.com https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/ Buggy patch cannot be the dependency. You need to fix the original patch instead. You are not supposed to wait till knowingly incorrect patches get merged so you can send a fix. You must respond to that patch stopping its merging process. Best regards, Krzysztof Thanks for the reminder. I hadn't noticed that before. We will wait for our dependencies to be ready before sending the new patchset.
Re: [PATCH 1/4] dt-bindings: display/msm: Redocument the dp-controller for QCS8300
On 2025/2/12 18:42, Dmitry Baryshkov wrote: On Wed, Feb 12, 2025 at 03:12:24PM +0800, Yongxing Mou wrote: We need to enable mst for qcs8300, dp0 controller will support 2 streams output. So not reuse sm8650 dp controller driver and will add a new driver patch for qcs8300 mst feature. Modify the corresponding dt-bingding file to compatible with the qcs8300-dp. Forgot to mention that in the quick response: please fix usage of capital or lowercase letters in the commit message. If you are unusure, 'git log' will help you. Signed-off-by: Yongxing Mou --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) Got it , thanks. Will correct it in new patch.
Re: [PATCH 0/4] Add MST support for qcs8300 platform
On 2025/2/12 18:51, Dmitry Baryshkov wrote: On Wed, Feb 12, 2025 at 03:12:23PM +0800, Yongxing Mou wrote: This series of patches introduces how to enable MST functionality on the qcs8300 platform. The qcs8300 platform uses dpu_8_4 hardware, which is the same as the sa8775p, but it only has one DPU. So it only has one DP0 controller, supporting 4-stream MST. This is irrelevant, unless you want to point out something else. Got it. This patch only enables 2-stream MST, using intf0 and intf3. The first and second patches are modifications to the correspond dt-bindings, third patch is the dp controller driver after not reuse sm8650, fourth patch is the qcs8300 dts modification which add the clk support for stream 1. This is obvious. Really. Instead you must explain why QCS8300 isn't compatible with SM8650. How many streams are supported by the SM8650? Got it, will update in new patchset. Signed-off-by: Yongxing Mou --- This patch depends on following series: https://lore.kernel.org/all/20250120-mdssdt_qcs8300-v4-0-1687e7842...@quicinc.com/ https://lore.kernel.org/all/20250114-dts_qcs8300-v3-0-d114cc5e4...@quicinc.com/ https://lore.kernel.org/all/20241202-dp_mst_bindings-v1-0-9a9a43b06...@quicinc.com https://lore.kernel.org/all/20241205-dp_mst-v1-0-f8618d42a...@quicinc.com/ Please don't patches against series which were requested to be changed singificantly. Don't spam mailing lists just to be able to 'FROMLIST' them. Instead work with Abhinav to get this patchset integrated into his next iteration of the series. Emmm, got it, thanks for reminder. Will work with Abhinav to modify the MST patchset comments first. And then repost qcs8300 enablement changes. --- Yongxing Mou (4): dt-bindings: display/msm: Redocument the dp-controller for QCS8300 dt-bindings: display/msm: Add stream 1 pixel clock for QCS8300 drm/msm/dp: Populate the max_streams for qcs8300 mst controller arm64: dts: qcom: qcs8300: Add support for stream 1 clk for DP MST .../devicetree/bindings/display/msm/dp-controller.yaml | 5 + .../devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml | 14 -- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 12 drivers/gpu/drm/msm/dp/dp_display.c| 8 4 files changed, 25 insertions(+), 14 deletions(-) --- base-commit: 7ba9bcc5090556c007d9a718d7176e097fe54f19 change-id: 20250211-mst_qcs8300-4c18a5179165 Best regards, -- Yongxing Mou
