[PATCH] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-22 Thread Michael Welling
This patch resolves the following sparse warnings:

  CHECK   drivers/staging/cxt1e1/pmc93x6_eeprom.c
drivers/staging/cxt1e1/pmc93x6_eeprom.c:158:1: warning: symbol 
'eeprom_put_byte' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:183:1: warning: symbol 
'eeprom_get_byte' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:256:1: warning: symbol 
'pmc_eeprom_read' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:296:1: warning: symbol 
'pmc_eeprom_write' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:364:1: warning: symbol 
'pmcGetBuffValue' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:385:1: warning: symbol 
'pmcSetBuffValue' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:403:1: warning: symbol 
'pmc_eeprom_read_buffer' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:416:1: warning: symbol 
'pmc_eeprom_write_buffer' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:433:1: warning: symbol 'pmcCalcCrc_T01' 
was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:452:1: warning: symbol 'pmcCalcCrc_T02' 
was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:489:1: warning: symbol 
'pmc_init_seeprom' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:521:1: warning: symbol 
'pmc_verify_cksum' was not declared. Should it be static?

Also incorporates many indentation and coding style fixes as well as
the removal of a volatile variable.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 78cc170..d0b467f 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -28,6 +28,7 @@
 #include "sbecom_inline_linux.h"
 #include "pmcc4.h"
 #include "sbe_promformat.h"
+#include "pmc93x6_eeprom.h"
 
 #ifndef TRUE
 #define TRUE   1
@@ -43,38 +44,36 @@
  *  using.
  */
 
-#define EE_MFG  (long)0 /* Index to manufacturing record */
-#define EE_FIRST0x28/* Index to start testing at */
-#define EE_LIMIT128 /* Index to end testing at */
+#define EE_MFG  (long)0/* Index to manufacturing record */
+#define EE_FIRST0x28   /* Index to start testing at */
+#define EE_LIMIT128/* Index to end testing at */
 
+/*
+ *  Bit Ordering for Instructions
+ *
+ *  A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB   (lsb, or 1st bit out)
+ *
+ */
 
-/*  Bit Ordering for Instructions
-**
-**  A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB   (lsb, or 1st bit out)
-**
-*/
-
-#define EPROM_EWEN  0x0019  /* Erase/Write enable (reversed) */
-#define EPROM_EWDS  0x0001  /* Erase/Write disable (reversed) */
-#define EPROM_READ  0x0003  /* Read (reversed) */
-#define EPROM_WRITE 0x0005  /* Write (reversed) */
-#define EPROM_ERASE 0x0007  /* Erase (reversed) */
-#define EPROM_ERAL  0x0009  /* Erase All (reversed) */
-#define EPROM_WRAL  0x0011  /* Write All (reversed) */
+#define EPROM_EWEN  0x0019 /* Erase/Write enable (reversed) */
+#define EPROM_EWDS  0x0001 /* Erase/Write disable (reversed) */
+#define EPROM_READ  0x0003 /* Read (reversed) */
+#define EPROM_WRITE 0x0005 /* Write (reversed) */
+#define EPROM_ERASE 0x0007 /* Erase (reversed) */
+#define EPROM_ERAL  0x0009 /* Erase All (reversed) */
+#define EPROM_WRAL  0x0011 /* Write All (reversed) */
 
-#define EPROM_ADR_SZ7   /* Number of bits in offset address */
-#define EPROM_OP_SZ 3   /* Number of bits in command */
+#define EPROM_ADR_SZ7  /* Number of bits in offset address */
+#define EPROM_OP_SZ 3  /* Number of bits in command */
 #define SIZE_ADDR_OP(EPROM_ADR_SZ + EPROM_OP_SZ)
-#define LC46A_MAX_OPS   10  /* Number of bits in Instruction */
-#define NUM_OF_BITS 8   /* Number of bits in data */
-
+#define LC46A_MAX_OPS   10 /* Number of bits in Instruction */
+#define NUM_OF_BITS 8  /* Number of bits in data */
 
 /* EEPROM signal bits */
-#define EPROM_ACTIVE_OUT_BIT0x0001  /* Out data bit */
-#define EPROM_ACTIVE_IN_BIT 0x0002  /* In data bit */
-#define ACTIVE_IN_BIT_SHIFT 0x0001  /* Shift In data bit to LSB */
-#define EPROM_ENCS  0x0004  /* Set EEPROM CS during operation */
-
+#define EPROM_ACTIVE_OUT_BIT0x0001 /* Out data bit */
+#define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */
+#define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */
+#define EPROM_ENCS  0x0004 /* Set EEPROM CS during operation */
 
 /*-

[PATCH r2 0/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
This patch series resolves the following sparse warnings:

  CHECK   drivers/staging/cxt1e1/pmc93x6_eeprom.c
drivers/staging/cxt1e1/pmc93x6_eeprom.c:158:1: warning: symbol 
'eeprom_put_byte' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:183:1: warning: symbol 
'eeprom_get_byte' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:256:1: warning: symbol 
'pmc_eeprom_read' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:296:1: warning: symbol 
'pmc_eeprom_write' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:364:1: warning: symbol 
'pmcGetBuffValue' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:385:1: warning: symbol 
'pmcSetBuffValue' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:403:1: warning: symbol 
'pmc_eeprom_read_buffer' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:416:1: warning: symbol 
'pmc_eeprom_write_buffer' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:433:1: warning: symbol 'pmcCalcCrc_T01' 
was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:452:1: warning: symbol 'pmcCalcCrc_T02' 
was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:489:1: warning: symbol 
'pmc_init_seeprom' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:521:1: warning: symbol 
'pmc_verify_cksum' was not declared. Should it be static?

Also incorporates many indentation and coding style fixes as well as
the removal of a volatile variable.
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[PATCH r2 1/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Removes sparse warnings.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 78cc170..e16f0d6 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -28,6 +28,7 @@
 #include "sbecom_inline_linux.h"
 #include "pmcc4.h"
 #include "sbe_promformat.h"
+#include "pmc93x6_eeprom.h"
 
 #ifndef TRUE
 #define TRUE   1
@@ -154,7 +155,7 @@ eeprom_delay (void)
  *  the data to the EEPROM.
  */
 
-void
+static void
 eeprom_put_byte (long addr, long data, int count)
 {
 u_int32_t output;
@@ -179,7 +180,7 @@ eeprom_put_byte (long addr, long data, int count)
  *  from the  EEPROM.
  */
 
-u_int32_t
+static u_int32_t
 eeprom_get_byte (long addr)
 {
 u_int32_t   input;
@@ -252,7 +253,7 @@ enable_pmc_eeprom (long addr)
  *  the contents of the specified location to the calling routine.
  */
 
-u_int32_t
+static u_int32_t
 pmc_eeprom_read (long addr, long mem_offset)
 {
 u_int32_t   data;   /* Data from chip */
@@ -292,7 +293,7 @@ pmc_eeprom_read (long addr, long mem_offset)
  *  operation succeeded.
  */
 
-int
+static int
 pmc_eeprom_write (long addr, long mem_offset, u_int32_t data)
 {
 volatile u_int32_t temp;
@@ -360,7 +361,7 @@ pmc_eeprom_write (long addr, long mem_offset, u_int32_t 
data)
  *
  */
 
-long
+static long
 pmcGetBuffValue (char *ptr, int size)
 {
 longvalue = 0;
@@ -381,7 +382,7 @@ pmcGetBuffValue (char *ptr, int size)
  *
  */
 
-void
+static void
 pmcSetBuffValue (char *ptr, long value, int size)
 {
 int index = size;
@@ -429,7 +430,7 @@ pmc_eeprom_write_buffer (long addr, long mem_offset, char 
*dest_ptr, int size)
  *
  */
 
-u_int32_t
+static u_int32_t
 pmcCalcCrc_T01 (void *bufp)
 {
 FLD_TYPE2  *buf = bufp;
@@ -448,7 +449,7 @@ pmcCalcCrc_T01 (void *bufp)
 return ~crc;
 }
 
-u_int32_t
+static u_int32_t
 pmcCalcCrc_T02 (void *bufp)
 {
 FLD_TYPE2  *buf = bufp;
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[PATCH r2 2/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Indentation fixes using Lindent.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index e16f0d6..a027708 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -44,10 +44,9 @@
  *  using.
  */
 
-#define EE_MFG  (long)0 /* Index to manufacturing record */
-#define EE_FIRST0x28/* Index to start testing at */
-#define EE_LIMIT128 /* Index to end testing at */
-
+#define EE_MFG  (long)0/* Index to manufacturing record */
+#define EE_FIRST0x28   /* Index to start testing at */
+#define EE_LIMIT128/* Index to end testing at */
 
 /*  Bit Ordering for Instructions
 **
@@ -55,27 +54,25 @@
 **
 */
 
-#define EPROM_EWEN  0x0019  /* Erase/Write enable (reversed) */
-#define EPROM_EWDS  0x0001  /* Erase/Write disable (reversed) */
-#define EPROM_READ  0x0003  /* Read (reversed) */
-#define EPROM_WRITE 0x0005  /* Write (reversed) */
-#define EPROM_ERASE 0x0007  /* Erase (reversed) */
-#define EPROM_ERAL  0x0009  /* Erase All (reversed) */
-#define EPROM_WRAL  0x0011  /* Write All (reversed) */
+#define EPROM_EWEN  0x0019 /* Erase/Write enable (reversed) */
+#define EPROM_EWDS  0x0001 /* Erase/Write disable (reversed) */
+#define EPROM_READ  0x0003 /* Read (reversed) */
+#define EPROM_WRITE 0x0005 /* Write (reversed) */
+#define EPROM_ERASE 0x0007 /* Erase (reversed) */
+#define EPROM_ERAL  0x0009 /* Erase All (reversed) */
+#define EPROM_WRAL  0x0011 /* Write All (reversed) */
 
-#define EPROM_ADR_SZ7   /* Number of bits in offset address */
-#define EPROM_OP_SZ 3   /* Number of bits in command */
+#define EPROM_ADR_SZ7  /* Number of bits in offset address */
+#define EPROM_OP_SZ 3  /* Number of bits in command */
 #define SIZE_ADDR_OP(EPROM_ADR_SZ + EPROM_OP_SZ)
-#define LC46A_MAX_OPS   10  /* Number of bits in Instruction */
-#define NUM_OF_BITS 8   /* Number of bits in data */
-
+#define LC46A_MAX_OPS   10 /* Number of bits in Instruction */
+#define NUM_OF_BITS 8  /* Number of bits in data */
 
 /* EEPROM signal bits */
-#define EPROM_ACTIVE_OUT_BIT0x0001  /* Out data bit */
-#define EPROM_ACTIVE_IN_BIT 0x0002  /* In data bit */
-#define ACTIVE_IN_BIT_SHIFT 0x0001  /* Shift In data bit to LSB */
-#define EPROM_ENCS  0x0004  /* Set EEPROM CS during operation */
-
+#define EPROM_ACTIVE_OUT_BIT0x0001 /* Out data bit */
+#define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */
+#define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */
+#define EPROM_ENCS  0x0004 /* Set EEPROM CS during operation */
 
 /*
  *  The ByteReverse table is used to reverses the 8 bits within a byte
@@ -83,29 +80,26 @@
  */
 
 static unsigned char ByteReverse[256];
-static int  ByteReverseBuilt = FALSE;
-
+static int ByteReverseBuilt = FALSE;
 
 /*
  *  mfg_template - initial serial EEPROM data structure
  *
  */
 
-static u8 mfg_template[sizeof(FLD_TYPE2)] =
-{
-PROM_FORMAT_TYPE2,  /* type; */
-0x00, 0x1A, /* length[2]; */
-0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
-0x11, 0x76, /* Id[2]; */
-0x07, 0x05, /* SubId[2] E1; */
-0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
-0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
-0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
-0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
-0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
+static u8 mfg_template[sizeof(FLD_TYPE2)] = {
+   PROM_FORMAT_TYPE2,  /* type; */
+   0x00, 0x1A, /* length[2]; */
+   0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
+   0x11, 0x76, /* Id[2]; */
+   0x07, 0x05, /* SubId[2] E1; */
+   0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
+   0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
+   0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
+   0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
+   0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
 };
 
-
 /*
  *  BuildByteReverse - build the 8-bit reverse table
  *
@@ -114,39 +108,35 @@ static u8 mfg_template[sizeof(FLD_TYPE2)] =
  *  (the MSB becomes the LSB etc.).
  */
 
-static void
-BuildByteReverse (void)
+static void BuildByteReverse(void)
 {
-longhalf;   /* Used to build by powers to 2 */
-int i;
+   long half

[PATCH r2 3/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Comment block fixes.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index a027708..572bd2e 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -49,10 +49,10 @@
 #define EE_LIMIT128/* Index to end testing at */
 
 /*  Bit Ordering for Instructions
-**
-**  A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB   (lsb, or 1st bit out)
-**
-*/
+ *
+ *  A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB   (lsb, or 1st bit out)
+ *
+ */
 
 #define EPROM_EWEN  0x0019 /* Erase/Write enable (reversed) */
 #define EPROM_EWDS  0x0001 /* Erase/Write disable (reversed) */
@@ -110,7 +110,8 @@ static u8 mfg_template[sizeof(FLD_TYPE2)] = {
 
 static void BuildByteReverse(void)
 {
-   long half;  /* Used to build by powers to 2 */
+   /* Used to build by powers to 2 */
+   long half;
int i;
 
ByteReverse[0] = 0;
@@ -150,12 +151,15 @@ static void eeprom_put_byte(long addr, long data, int 
count)
u_int32_t output;
 
while (--count >= 0) {
-   output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; /* Get next 
data bit */
-   output |= EPROM_ENCS;   /* Add Chip Select */
+   /* Get next data bit */
+   output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0;
+   /* Add Chip Select */
+   output |= EPROM_ENCS;
data >>= 1;
 
eeprom_delay();
-   pci_write_32((u_int32_t *) addr, output);   /* Output it */
+   /* Output it */
+   pci_write_32((u_int32_t *) addr, output);
}
 }
 
@@ -174,10 +178,10 @@ static u_int32_t eeprom_get_byte(long addr)
int count;
 
 /*  Start the Reading of DATA
-**
-**  The first read is a dummy as the data is latched in the
-**  EPLD and read on the next read access to the EEPROM.
-*/
+ *
+ *  The first read is a dummy as the data is latched in the
+ *  EPLD and read on the next read access to the EEPROM.
+ */
 
input = pci_read_32((u_int32_t *) addr);
 
@@ -187,7 +191,8 @@ static u_int32_t eeprom_get_byte(long addr)
eeprom_delay();
input = pci_read_32((u_int32_t *) addr);
 
-   data <<= 1; /* Shift data over */
+   /* Shift data over */
+   data <<= 1;
data |= (input & EPROM_ACTIVE_IN_BIT) ? 1 : 0;
 
}
@@ -206,8 +211,8 @@ static void disable_pmc_eeprom(long addr)
 {
eeprom_put_byte(addr, EPROM_EWDS, SIZE_ADDR_OP);
 
-   pci_write_32((u_int32_t *) addr, 0);/* this removes Chip Select
-* from EEPROM */
+   /* this removes Chip Select from EEPROM */
+   pci_write_32((u_int32_t *) addr, 0);
 }
 
 /*
@@ -221,8 +226,8 @@ static void enable_pmc_eeprom(long addr)
 {
eeprom_put_byte(addr, EPROM_EWEN, SIZE_ADDR_OP);
 
-   pci_write_32((u_int32_t *) addr, 0);/* this removes Chip Select
-* from EEPROM */
+   /* this removes Chip Select from EEPROM */
+   pci_write_32((u_int32_t *) addr, 0);
 }
 
 /*
@@ -235,27 +240,35 @@ static void enable_pmc_eeprom(long addr)
 
 static u_int32_t pmc_eeprom_read(long addr, long mem_offset)
 {
-   u_int32_t data; /* Data from chip */
+   /* Data from chip */
+   u_int32_t data;
 
if (!ByteReverseBuilt)
BuildByteReverse();
 
-   mem_offset = ByteReverse[0x7F & mem_offset];/* Reverse address */
+   /* Reverse address */
+   mem_offset = ByteReverse[0x7F & mem_offset];
+
/*
-* NOTE: The max offset address is 128 or half the reversal table. So 
the
-* LSB is always zero and counts as a built in shift of one bit.  So 
even
-* though we need to shift 3 bits to make room for the command, we only
-* need to shift twice more because of the built in shift.
+* NOTE: The max offset address is 128 or half the reversal table. So
+* the LSB is always zero and counts as a built in shift of one bit.
+* So even though we need to shift 3 bits to make room for the command,
+* we only need to shift twice more because of the built in shift.
 */
-   mem_offset <<= 2;   /* Shift for command */
-   mem_offset |= EPROM_READ;   /* Add command */
 
-   eeprom_put_byte(addr, mem_offset, SIZE_ADDR_OP);/* Output chip 
address */
+   /* Shift for command */
+   mem_offset <<= 2;
+   /* Add command */
+   mem_offset |= EPROM_READ;
 
-   data = eeprom_get_byte(addr);   /* Read chip data */
+   /* Output chip address */
+   eeprom_put_byte(addr, mem_off

[PATCH r2 4/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Removes volatile variable.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 572bd2e..ab6fa73 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -286,7 +286,7 @@ static u_int32_t pmc_eeprom_read(long addr, long mem_offset)
 
 static int pmc_eeprom_write(long addr, long mem_offset, u_int32_t data)
 {
-   volatile u_int32_t temp;
+   u_int32_t temp;
int count;
 
if (!ByteReverseBuilt)
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[PATCH r2 5/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Removes spaces before & where needed.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index ab6fa73..d7d240a 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -425,9 +425,9 @@ static u_int32_t pmcCalcCrc_T01(void *bufp)
u_int32_t crc;
 
/* Calc CRC for type and length fields */
-   sbeCrc((u_int8_t *) & buf->type,
+   sbeCrc((u_int8_t *) &buf->type,
   (u_int32_t) STRUCT_OFFSET(FLD_TYPE1, Crc32),
-  (u_int32_t) 0, (u_int32_t *) & crc);
+  (u_int32_t) 0, (u_int32_t *) &crc);
 
 #ifdef EEPROM_TYPE_DEBUG
/* RLD DEBUG */
@@ -443,14 +443,14 @@ static u_int32_t pmcCalcCrc_T02(void *bufp)
u_int32_t crc;
 
/* Calc CRC for type and length fields */
-   sbeCrc((u_int8_t *) & buf->type,
+   sbeCrc((u_int8_t *) &buf->type,
   (u_int32_t) STRUCT_OFFSET(FLD_TYPE2, Crc32),
-  (u_int32_t) 0, (u_int32_t *) & crc);
+  (u_int32_t) 0, (u_int32_t *) &crc);
 
/* Calc CRC for remaining fields */
-   sbeCrc((u_int8_t *) & buf->Id[0],
+   sbeCrc((u_int8_t *) &buf->Id[0],
   (u_int32_t) (sizeof(FLD_TYPE2) - STRUCT_OFFSET(FLD_TYPE2, Id)),
-  (u_int32_t) crc, (u_int32_t *) & crc);
+  (u_int32_t) crc, (u_int32_t *) &crc);
 
 #ifdef EEPROM_TYPE_DEBUG
/* RLD DEBUG */
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[PATCH r2 6/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Removes parens as are not necessary for return.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index d7d240a..6153499 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -334,7 +334,7 @@ static int pmc_eeprom_write(long addr, long mem_offset, 
u_int32_t data)
if (temp & EPROM_ACTIVE_IN_BIT) {
/* Remove Chip Select from EEPROM */
pci_write_32((u_int32_t *) addr, 0);
-   return (1);
+   return 1;
}
}
count = 1000;
@@ -347,9 +347,9 @@ static int pmc_eeprom_write(long addr, long mem_offset, 
u_int32_t data)
}
 
if (count == -1)
-   return (2);
+   return 2;
 
-   return (0);
+   return 0;
 }
 
 /*
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[PATCH r2 7/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
Removes unncessary curly braces.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 6153499..ba588f1 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -133,9 +133,8 @@ static void eeprom_delay(void)
 {
int timeout;
 
-   for (timeout = 20; timeout; --timeout) {
+   for (timeout = 20; timeout; --timeout)
OS_uwait_dummy();
-   }
 }
 
 /*
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Re: [PATCH r2 0/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
On Sun, Mar 23, 2014 at 08:58:21AM -0700, Greg Kroah-Hartman wrote:
> On Sun, Mar 23, 2014 at 09:01:48AM -0500, Michael Welling wrote:
> > This patch series resolves the following sparse warnings:
> > 
> >   CHECK   drivers/staging/cxt1e1/pmc93x6_eeprom.c
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:158:1: warning: symbol 
> > 'eeprom_put_byte' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:183:1: warning: symbol 
> > 'eeprom_get_byte' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:256:1: warning: symbol 
> > 'pmc_eeprom_read' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:296:1: warning: symbol 
> > 'pmc_eeprom_write' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:364:1: warning: symbol 
> > 'pmcGetBuffValue' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:385:1: warning: symbol 
> > 'pmcSetBuffValue' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:403:1: warning: symbol 
> > 'pmc_eeprom_read_buffer' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:416:1: warning: symbol 
> > 'pmc_eeprom_write_buffer' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:433:1: warning: symbol 
> > 'pmcCalcCrc_T01' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:452:1: warning: symbol 
> > 'pmcCalcCrc_T02' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:489:1: warning: symbol 
> > 'pmc_init_seeprom' was not declared. Should it be static?
> > drivers/staging/cxt1e1/pmc93x6_eeprom.c:521:1: warning: symbol 
> > 'pmc_verify_cksum' was not declared. Should it be static?
> > 
> > Also incorporates many indentation and coding style fixes as well as
> > the removal of a volatile variable.
> 
> Hm, all 7 patches have the same exact subject: line, which isn't good,
> as they can't be told apart when looking at the git log :(
> 
> Can you fix this up and use unique Subject: lines?
Wow I am on a roll here.

Lets try it again.
> 
> thanks,
> 
> greg k-h
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[PATCH v3 0/7] STAGING: cxt1e1: Remove sparse warnings and resolve checkpatch issues

2014-03-23 Thread Michael Welling
This patch series resolves the following sparse warnings:

  CHECK   drivers/staging/cxt1e1/pmc93x6_eeprom.c
drivers/staging/cxt1e1/pmc93x6_eeprom.c:158:1: warning: symbol 
'eeprom_put_byte' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:183:1: warning: symbol 
'eeprom_get_byte' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:256:1: warning: symbol 
'pmc_eeprom_read' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:296:1: warning: symbol 
'pmc_eeprom_write' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:364:1: warning: symbol 
'pmcGetBuffValue' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:385:1: warning: symbol 
'pmcSetBuffValue' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:403:1: warning: symbol 
'pmc_eeprom_read_buffer' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:416:1: warning: symbol 
'pmc_eeprom_write_buffer' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:433:1: warning: symbol 'pmcCalcCrc_T01' 
was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:452:1: warning: symbol 'pmcCalcCrc_T02' 
was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:489:1: warning: symbol 
'pmc_init_seeprom' was not declared. Should it be static?
drivers/staging/cxt1e1/pmc93x6_eeprom.c:521:1: warning: symbol 
'pmc_verify_cksum' was not declared. Should it be static?

Also incorporates many indentation and coding style fixes as well as
the removal of a volatile variable.
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[PATCH v3 1/7] STAGING: cxt1e1: Remove sparse warnings

2014-03-23 Thread Michael Welling
Removes sparse warnings by including a header and adding static to some 
functions.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 78cc170..e16f0d6 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -28,6 +28,7 @@
 #include "sbecom_inline_linux.h"
 #include "pmcc4.h"
 #include "sbe_promformat.h"
+#include "pmc93x6_eeprom.h"
 
 #ifndef TRUE
 #define TRUE   1
@@ -154,7 +155,7 @@ eeprom_delay (void)
  *  the data to the EEPROM.
  */
 
-void
+static void
 eeprom_put_byte (long addr, long data, int count)
 {
 u_int32_t output;
@@ -179,7 +180,7 @@ eeprom_put_byte (long addr, long data, int count)
  *  from the  EEPROM.
  */
 
-u_int32_t
+static u_int32_t
 eeprom_get_byte (long addr)
 {
 u_int32_t   input;
@@ -252,7 +253,7 @@ enable_pmc_eeprom (long addr)
  *  the contents of the specified location to the calling routine.
  */
 
-u_int32_t
+static u_int32_t
 pmc_eeprom_read (long addr, long mem_offset)
 {
 u_int32_t   data;   /* Data from chip */
@@ -292,7 +293,7 @@ pmc_eeprom_read (long addr, long mem_offset)
  *  operation succeeded.
  */
 
-int
+static int
 pmc_eeprom_write (long addr, long mem_offset, u_int32_t data)
 {
 volatile u_int32_t temp;
@@ -360,7 +361,7 @@ pmc_eeprom_write (long addr, long mem_offset, u_int32_t 
data)
  *
  */
 
-long
+static long
 pmcGetBuffValue (char *ptr, int size)
 {
 longvalue = 0;
@@ -381,7 +382,7 @@ pmcGetBuffValue (char *ptr, int size)
  *
  */
 
-void
+static void
 pmcSetBuffValue (char *ptr, long value, int size)
 {
 int index = size;
@@ -429,7 +430,7 @@ pmc_eeprom_write_buffer (long addr, long mem_offset, char 
*dest_ptr, int size)
  *
  */
 
-u_int32_t
+static u_int32_t
 pmcCalcCrc_T01 (void *bufp)
 {
 FLD_TYPE2  *buf = bufp;
@@ -448,7 +449,7 @@ pmcCalcCrc_T01 (void *bufp)
 return ~crc;
 }
 
-u_int32_t
+static u_int32_t
 pmcCalcCrc_T02 (void *bufp)
 {
 FLD_TYPE2  *buf = bufp;
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[PATCH v3 2/7] STAGING: cxt1e1: Indentation fixes

2014-03-23 Thread Michael Welling
Indentation fixes using Lindent.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index e16f0d6..a027708 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -44,10 +44,9 @@
  *  using.
  */
 
-#define EE_MFG  (long)0 /* Index to manufacturing record */
-#define EE_FIRST0x28/* Index to start testing at */
-#define EE_LIMIT128 /* Index to end testing at */
-
+#define EE_MFG  (long)0/* Index to manufacturing record */
+#define EE_FIRST0x28   /* Index to start testing at */
+#define EE_LIMIT128/* Index to end testing at */
 
 /*  Bit Ordering for Instructions
 **
@@ -55,27 +54,25 @@
 **
 */
 
-#define EPROM_EWEN  0x0019  /* Erase/Write enable (reversed) */
-#define EPROM_EWDS  0x0001  /* Erase/Write disable (reversed) */
-#define EPROM_READ  0x0003  /* Read (reversed) */
-#define EPROM_WRITE 0x0005  /* Write (reversed) */
-#define EPROM_ERASE 0x0007  /* Erase (reversed) */
-#define EPROM_ERAL  0x0009  /* Erase All (reversed) */
-#define EPROM_WRAL  0x0011  /* Write All (reversed) */
+#define EPROM_EWEN  0x0019 /* Erase/Write enable (reversed) */
+#define EPROM_EWDS  0x0001 /* Erase/Write disable (reversed) */
+#define EPROM_READ  0x0003 /* Read (reversed) */
+#define EPROM_WRITE 0x0005 /* Write (reversed) */
+#define EPROM_ERASE 0x0007 /* Erase (reversed) */
+#define EPROM_ERAL  0x0009 /* Erase All (reversed) */
+#define EPROM_WRAL  0x0011 /* Write All (reversed) */
 
-#define EPROM_ADR_SZ7   /* Number of bits in offset address */
-#define EPROM_OP_SZ 3   /* Number of bits in command */
+#define EPROM_ADR_SZ7  /* Number of bits in offset address */
+#define EPROM_OP_SZ 3  /* Number of bits in command */
 #define SIZE_ADDR_OP(EPROM_ADR_SZ + EPROM_OP_SZ)
-#define LC46A_MAX_OPS   10  /* Number of bits in Instruction */
-#define NUM_OF_BITS 8   /* Number of bits in data */
-
+#define LC46A_MAX_OPS   10 /* Number of bits in Instruction */
+#define NUM_OF_BITS 8  /* Number of bits in data */
 
 /* EEPROM signal bits */
-#define EPROM_ACTIVE_OUT_BIT0x0001  /* Out data bit */
-#define EPROM_ACTIVE_IN_BIT 0x0002  /* In data bit */
-#define ACTIVE_IN_BIT_SHIFT 0x0001  /* Shift In data bit to LSB */
-#define EPROM_ENCS  0x0004  /* Set EEPROM CS during operation */
-
+#define EPROM_ACTIVE_OUT_BIT0x0001 /* Out data bit */
+#define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */
+#define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */
+#define EPROM_ENCS  0x0004 /* Set EEPROM CS during operation */
 
 /*
  *  The ByteReverse table is used to reverses the 8 bits within a byte
@@ -83,29 +80,26 @@
  */
 
 static unsigned char ByteReverse[256];
-static int  ByteReverseBuilt = FALSE;
-
+static int ByteReverseBuilt = FALSE;
 
 /*
  *  mfg_template - initial serial EEPROM data structure
  *
  */
 
-static u8 mfg_template[sizeof(FLD_TYPE2)] =
-{
-PROM_FORMAT_TYPE2,  /* type; */
-0x00, 0x1A, /* length[2]; */
-0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
-0x11, 0x76, /* Id[2]; */
-0x07, 0x05, /* SubId[2] E1; */
-0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
-0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
-0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
-0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
-0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
+static u8 mfg_template[sizeof(FLD_TYPE2)] = {
+   PROM_FORMAT_TYPE2,  /* type; */
+   0x00, 0x1A, /* length[2]; */
+   0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
+   0x11, 0x76, /* Id[2]; */
+   0x07, 0x05, /* SubId[2] E1; */
+   0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
+   0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
+   0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
+   0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
+   0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
 };
 
-
 /*
  *  BuildByteReverse - build the 8-bit reverse table
  *
@@ -114,39 +108,35 @@ static u8 mfg_template[sizeof(FLD_TYPE2)] =
  *  (the MSB becomes the LSB etc.).
  */
 
-static void
-BuildByteReverse (void)
+static void BuildByteReverse(void)
 {
-longhalf;   /* Used to build by powers to 2 */
-int i;
+   long half

[PATCH v3 3/7] STAGING: cxt1e1: Fixes comment blocks

2014-03-23 Thread Michael Welling
Comment block fixes.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index a027708..572bd2e 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -49,10 +49,10 @@
 #define EE_LIMIT128/* Index to end testing at */
 
 /*  Bit Ordering for Instructions
-**
-**  A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB   (lsb, or 1st bit out)
-**
-*/
+ *
+ *  A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB   (lsb, or 1st bit out)
+ *
+ */
 
 #define EPROM_EWEN  0x0019 /* Erase/Write enable (reversed) */
 #define EPROM_EWDS  0x0001 /* Erase/Write disable (reversed) */
@@ -110,7 +110,8 @@ static u8 mfg_template[sizeof(FLD_TYPE2)] = {
 
 static void BuildByteReverse(void)
 {
-   long half;  /* Used to build by powers to 2 */
+   /* Used to build by powers to 2 */
+   long half;
int i;
 
ByteReverse[0] = 0;
@@ -150,12 +151,15 @@ static void eeprom_put_byte(long addr, long data, int 
count)
u_int32_t output;
 
while (--count >= 0) {
-   output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; /* Get next 
data bit */
-   output |= EPROM_ENCS;   /* Add Chip Select */
+   /* Get next data bit */
+   output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0;
+   /* Add Chip Select */
+   output |= EPROM_ENCS;
data >>= 1;
 
eeprom_delay();
-   pci_write_32((u_int32_t *) addr, output);   /* Output it */
+   /* Output it */
+   pci_write_32((u_int32_t *) addr, output);
}
 }
 
@@ -174,10 +178,10 @@ static u_int32_t eeprom_get_byte(long addr)
int count;
 
 /*  Start the Reading of DATA
-**
-**  The first read is a dummy as the data is latched in the
-**  EPLD and read on the next read access to the EEPROM.
-*/
+ *
+ *  The first read is a dummy as the data is latched in the
+ *  EPLD and read on the next read access to the EEPROM.
+ */
 
input = pci_read_32((u_int32_t *) addr);
 
@@ -187,7 +191,8 @@ static u_int32_t eeprom_get_byte(long addr)
eeprom_delay();
input = pci_read_32((u_int32_t *) addr);
 
-   data <<= 1; /* Shift data over */
+   /* Shift data over */
+   data <<= 1;
data |= (input & EPROM_ACTIVE_IN_BIT) ? 1 : 0;
 
}
@@ -206,8 +211,8 @@ static void disable_pmc_eeprom(long addr)
 {
eeprom_put_byte(addr, EPROM_EWDS, SIZE_ADDR_OP);
 
-   pci_write_32((u_int32_t *) addr, 0);/* this removes Chip Select
-* from EEPROM */
+   /* this removes Chip Select from EEPROM */
+   pci_write_32((u_int32_t *) addr, 0);
 }
 
 /*
@@ -221,8 +226,8 @@ static void enable_pmc_eeprom(long addr)
 {
eeprom_put_byte(addr, EPROM_EWEN, SIZE_ADDR_OP);
 
-   pci_write_32((u_int32_t *) addr, 0);/* this removes Chip Select
-* from EEPROM */
+   /* this removes Chip Select from EEPROM */
+   pci_write_32((u_int32_t *) addr, 0);
 }
 
 /*
@@ -235,27 +240,35 @@ static void enable_pmc_eeprom(long addr)
 
 static u_int32_t pmc_eeprom_read(long addr, long mem_offset)
 {
-   u_int32_t data; /* Data from chip */
+   /* Data from chip */
+   u_int32_t data;
 
if (!ByteReverseBuilt)
BuildByteReverse();
 
-   mem_offset = ByteReverse[0x7F & mem_offset];/* Reverse address */
+   /* Reverse address */
+   mem_offset = ByteReverse[0x7F & mem_offset];
+
/*
-* NOTE: The max offset address is 128 or half the reversal table. So 
the
-* LSB is always zero and counts as a built in shift of one bit.  So 
even
-* though we need to shift 3 bits to make room for the command, we only
-* need to shift twice more because of the built in shift.
+* NOTE: The max offset address is 128 or half the reversal table. So
+* the LSB is always zero and counts as a built in shift of one bit.
+* So even though we need to shift 3 bits to make room for the command,
+* we only need to shift twice more because of the built in shift.
 */
-   mem_offset <<= 2;   /* Shift for command */
-   mem_offset |= EPROM_READ;   /* Add command */
 
-   eeprom_put_byte(addr, mem_offset, SIZE_ADDR_OP);/* Output chip 
address */
+   /* Shift for command */
+   mem_offset <<= 2;
+   /* Add command */
+   mem_offset |= EPROM_READ;
 
-   data = eeprom_get_byte(addr);   /* Read chip data */
+   /* Output chip address */
+   eeprom_put_byte(addr, mem_off

[PATCH v3 4/7] STAGING: cxt1e1: Remove volatile variable

2014-03-23 Thread Michael Welling
Removes volatile variable.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 572bd2e..ab6fa73 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -286,7 +286,7 @@ static u_int32_t pmc_eeprom_read(long addr, long mem_offset)
 
 static int pmc_eeprom_write(long addr, long mem_offset, u_int32_t data)
 {
-   volatile u_int32_t temp;
+   u_int32_t temp;
int count;
 
if (!ByteReverseBuilt)
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[PATCH v3 5/7] STAGING: cxt1e1: Formatting fixes checkpatch issues

2014-03-23 Thread Michael Welling
Removes spaces before & where needed.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index ab6fa73..d7d240a 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -425,9 +425,9 @@ static u_int32_t pmcCalcCrc_T01(void *bufp)
u_int32_t crc;
 
/* Calc CRC for type and length fields */
-   sbeCrc((u_int8_t *) & buf->type,
+   sbeCrc((u_int8_t *) &buf->type,
   (u_int32_t) STRUCT_OFFSET(FLD_TYPE1, Crc32),
-  (u_int32_t) 0, (u_int32_t *) & crc);
+  (u_int32_t) 0, (u_int32_t *) &crc);
 
 #ifdef EEPROM_TYPE_DEBUG
/* RLD DEBUG */
@@ -443,14 +443,14 @@ static u_int32_t pmcCalcCrc_T02(void *bufp)
u_int32_t crc;
 
/* Calc CRC for type and length fields */
-   sbeCrc((u_int8_t *) & buf->type,
+   sbeCrc((u_int8_t *) &buf->type,
   (u_int32_t) STRUCT_OFFSET(FLD_TYPE2, Crc32),
-  (u_int32_t) 0, (u_int32_t *) & crc);
+  (u_int32_t) 0, (u_int32_t *) &crc);
 
/* Calc CRC for remaining fields */
-   sbeCrc((u_int8_t *) & buf->Id[0],
+   sbeCrc((u_int8_t *) &buf->Id[0],
   (u_int32_t) (sizeof(FLD_TYPE2) - STRUCT_OFFSET(FLD_TYPE2, Id)),
-  (u_int32_t) crc, (u_int32_t *) & crc);
+  (u_int32_t) crc, (u_int32_t *) &crc);
 
 #ifdef EEPROM_TYPE_DEBUG
/* RLD DEBUG */
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[PATCH v3 6/7] STAGING: cxt1e1: More formatting fixes

2014-03-23 Thread Michael Welling
Removes parens as are not necessary for return.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index d7d240a..6153499 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -334,7 +334,7 @@ static int pmc_eeprom_write(long addr, long mem_offset, 
u_int32_t data)
if (temp & EPROM_ACTIVE_IN_BIT) {
/* Remove Chip Select from EEPROM */
pci_write_32((u_int32_t *) addr, 0);
-   return (1);
+   return 1;
}
}
count = 1000;
@@ -347,9 +347,9 @@ static int pmc_eeprom_write(long addr, long mem_offset, 
u_int32_t data)
}
 
if (count == -1)
-   return (2);
+   return 2;
 
-   return (0);
+   return 0;
 }
 
 /*
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[PATCH v3 7/7] STAGING: cxt1e1: Remove curly braces

2014-03-23 Thread Michael Welling
Removes unnecessary curly braces from for loop in eeprom_delay.

Signed-off-by: Michael Welling 
---
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c 
b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
index 6153499..ba588f1 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.c
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -133,9 +133,8 @@ static void eeprom_delay(void)
 {
int timeout;
 
-   for (timeout = 20; timeout; --timeout) {
+   for (timeout = 20; timeout; --timeout)
OS_uwait_dummy();
-   }
 }
 
 /*
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