Re: [PATCH v5 11/11] pwm: Add Raspberry Pi Firmware based PWM bus
Hi All, On Mon, 2020-11-23 at 19:38 +0100, Nicolas Saenz Julienne wrote: > Adds support to control the PWM bus available in official Raspberry Pi > PoE HAT. Only RPi's co-processor has access to it, so commands have to > be sent through RPi's firmware mailbox interface. > > Signed-off-by: Nicolas Saenz Julienne > I'll soon send a v6 of this series and was wondering if there is any more feedback for this patch. Regards, Nicolas signature.asc Description: This is a digitally signed message part ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH] Staging: silabs si4455 serial driver
This is a serial port driver for
Silicon Labs Si4455 Sub-GHz transciver.
Signed-off-by: József Horváth
---
.../bindings/staging/serial/silabs,si4455.txt | 39 +
drivers/staging/Kconfig |2 +
drivers/staging/Makefile |1 +
drivers/staging/si4455/Kconfig|8 +
drivers/staging/si4455/Makefile |2 +
drivers/staging/si4455/TODO |3 +
drivers/staging/si4455/si4455.c | 1465 +
drivers/staging/si4455/si4455_api.h | 56 +
8 files changed, 1576 insertions(+)
create mode 100644
Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
create mode 100644 drivers/staging/si4455/Kconfig
create mode 100644 drivers/staging/si4455/Makefile
create mode 100644 drivers/staging/si4455/TODO
create mode 100644 drivers/staging/si4455/si4455.c
create mode 100644 drivers/staging/si4455/si4455_api.h
diff --git
a/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
new file mode 100644
index ..abd659b7b952
--- /dev/null
+++ b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
@@ -0,0 +1,39 @@
+* Silicon Labs Si4455 EASY-TO-USE, LOW-CURRENT OOK/(G)FSK SUB-GHZ
TRANSCEIVER
+
+Required properties:
+- compatible: Should be one of the following:
+ - "silabs,si4455" for Silicon Labs Si4455-B1A or Si4455-C2A (driver
automatically detects the part info),
+ - "silabs,si4455b1a" for Silicon Labs Si4455-B1A,
+ - "silabs,si4455c2a" for Silicon Labs Si4455-C2A,
+- reg: SPI chip select number.
+- interrupts: Specifies the interrupt source of the parent interrupt
+ controller. The format of the interrupt specifier depends on the
+ parent interrupt controller.
+- clocks: phandle to the IC source clock (only external clock source
supported).
+- spi-max-frequency: maximum clock frequency on SPI port
+- shdn-gpios: gpio pin for SDN
+
+Example:
+
+/ {
+ clocks {
+si4455_1_2_osc: si4455_1_2_osc {
+compatible = "fixed-clock";
+#clock-cells = <0>;
+clock-frequency = <3000>;
+};
+ };
+};
+
+&spi0 {
+ si4455: si4455@0 {
+ compatible = "silabs,si4455";
+ reg = <0>;
+ clocks = <&si4455_1_2_osc>;
+ interrupt-parent = <&gpio>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+shdn-gpios = <&gpio 26 1>;
+status = "okay";
+spi-max-frequency = <300>;
+ };
+};
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 9b7cb7c5766a..2cf0c9bfe878 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -118,4 +118,6 @@ source "drivers/staging/wfx/Kconfig"
source "drivers/staging/hikey9xx/Kconfig"
+source "drivers/staging/si4455/Kconfig"
+
endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 38226737c9f3..043c63287bc6 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -49,3 +49,4 @@ obj-$(CONFIG_QLGE)+= qlge/
obj-$(CONFIG_WIMAX)+= wimax/
obj-$(CONFIG_WFX) += wfx/
obj-y += hikey9xx/
+obj-$(CONFIG_SERIAL_SI4455)+= si4455/
diff --git a/drivers/staging/si4455/Kconfig b/drivers/staging/si4455/Kconfig
new file mode 100644
index ..666f726f2583
--- /dev/null
+++ b/drivers/staging/si4455/Kconfig
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+config SERIAL_SI4455
+ tristate "Si4455 support"
+ depends on SPI
+ select SERIAL_CORE
+ help
+ This driver is for Silicon Labs's Si4455 Sub-GHz transciver.
+ Say 'Y' here if you wish to use it as serial port.
diff --git a/drivers/staging/si4455/Makefile
b/drivers/staging/si4455/Makefile
new file mode 100644
index ..1a6474673509
--- /dev/null
+++ b/drivers/staging/si4455/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_SERIAL_SI4455) := si4455.o
diff --git a/drivers/staging/si4455/TODO b/drivers/staging/si4455/TODO
new file mode 100644
index ..aee5c7613b31
--- /dev/null
+++ b/drivers/staging/si4455/TODO
@@ -0,0 +1,3 @@
+TODO:
+- add variable packet length support
+- add firmware patching support in case of Si4455-C2A
diff --git a/drivers/staging/si4455/si4455.c
b/drivers/staging/si4455/si4455.c
new file mode 100644
index ..15f45f19ffdb
--- /dev/null
+++ b/drivers/staging/si4455/si4455.c
@@ -0,0 +1,1465 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 József Horváth
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "si4455_api.h"
+
+#define PORT_SI4455
Re: [PATCH] Staging: silabs si4455 serial driver
On Wed, Dec 09, 2020 at 12:09:58PM +0100, Info wrote: > This is a serial port driver for > Silicon Labs Si4455 Sub-GHz transciver. > > Signed-off-by: József Horváth Note, your From: line does not match this line, so I can't take this. But: > --- > .../bindings/staging/serial/silabs,si4455.txt | 39 + staging drivers need to be self-contained, so this should be here. It needs to be reviewed by the DT maintainers when moving out of staging. > index ..aee5c7613b31 > --- /dev/null > +++ b/drivers/staging/si4455/TODO > @@ -0,0 +1,3 @@ > +TODO: > +- add variable packet length support > +- add firmware patching support in case of Si4455-C2A Why are these a requirement to get it out of staging? Why go into staging at all? Why not go into the 'real' part of the kernel directly? What is keeping that from happening today? These look like new features that you can add later, and shouldn't be a requirement for acceptance into the normal part of the kernel for this driver. Why have you not tried doing that first? thanks, greg k-h ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH] Staging: silabs si4455 serial driver
Change the From email header to say your name.
The patch is corrupted and can't be applied. Please read the first
paragraphs of Documentation/process/email-clients.rst
This driver is pretty small and it might be easier to clean it up first
before merging it into staging. Run checkpatch.pl --strict on the
driver.
> --- /dev/null
> +++ b/drivers/staging/si4455/si4455.c
> @@ -0,0 +1,1465 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 József Horváth
> + *
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "si4455_api.h"
> +
> +#define PORT_SI4455 1096
> +#define SI4455_NAME "si4455"
> +#define SI4455_MAJOR 432
> +#define SI4455_MINOR 567
> +#define SI4455_UART_NRMAX1
> +#define SI4455_FIFO_SIZE 64
> +
> +#define SI4455_CMD_ID_EZCONFIG_CHECK 0x19
> +#define SI4455_CMD_ID_PART_INFO 0x01
> +#define SI4455_CMD_REPLY_COUNT_PART_INFO 9
> +#define SI4455_CMD_ID_GET_INT_STATUS 0x20
> +#define SI4455_CMD_REPLY_COUNT_GET_INT_STATUS8
> +#define SI4455_CMD_ID_FIFO_INFO 0x15
> +#define SI4455_CMD_ARG_COUNT_FIFO_INFO 2
> +#define SI4455_CMD_REPLY_COUNT_FIFO_INFO 2
> +#define SI4455_CMD_FIFO_INFO_ARG_TX_BIT 0x01
> +#define SI4455_CMD_FIFO_INFO_ARG_RX_BIT 0x02
> +#define SI4455_CMD_ID_READ_CMD_BUFF 0x44
> +#define SI4455_CMD_ID_READ_RX_FIFO 0x77
> +#define SI4455_CMD_ID_WRITE_TX_FIFO 0x66
> +#define SI4455_CMD_ID_START_RX 0x32
> +#define SI4455_CMD_ARG_COUNT_START_RX8
> +#define SI4455_CMD_START_RX_ARG_RXTIMEOUT_STATE_ENUM_RX 8
> +#define SI4455_CMD_START_RX_ARG_RXVALID_STATE_ENUM_RX8
> +#define SI4455_CMD_START_RX_ARG_RXINVALID_STATE_ENUM_RX 8
> +#define SI4455_CMD_ID_START_TX 0x31
> +#define SI4455_CMD_ARG_COUNT_START_TX5
> +#define SI4455_CMD_ID_CHANGE_STATE 0x34
> +#define SI4455_CMD_ARG_COUNT_CHANGE_STATE2
> +#define SI4455_CMD_CHANGE_STATE_ARG_NEW_STATE_ENUM_READY 3
> +#define SI4455_CMD_GET_CHIP_STATUS_REP_CMD_ERROR_PEND_MASK 0x08
> +#define SI4455_CMD_GET_CHIP_STATUS_REP_CMD_ERROR_PEND_BIT0x08
> +#define SI4455_CMD_GET_INT_STATUS_REP_PACKET_SENT_PEND_BIT 0x20
> +#define SI4455_CMD_GET_INT_STATUS_REP_PACKET_RX_PEND_BIT 0x10
> +#define SI4455_CMD_GET_INT_STATUS_REP_CRC_ERROR_BIT 0x08
These names are unreadably long and just make the code messy.
> +#define SI4455_CMD_ID_GET_MODEM_STATUS 0x22
> +#define SI4455_CMD_ARG_COUNT_GET_MODEM_STATUS2
> +#define SI4455_CMD_REPLY_COUNT_GET_MODEM_STATUS 8
> +
> +struct si4455_part_info {
> + u8 CHIPREV;
> + u16 PART;
> + u8 PBUILD;
> + u16 ID;
> + u8 CUSTOMER;
> + u8 ROMID;
> + u8 BOND;
Also the huge gap between the type and the struct member makes it
hard to read.
u8 chip_rev;
u16 part;
u8 pbuild;
etc.
> +};
> +
> +struct si4455_int_status {
> + u8 INT_PEND;
> + u8 INT_STATUS;
> + u8 PH_PEND;
> + u8 PH_STATUS;
> + u8 MODEM_PEND;
> + u8 MODEM_STATUS;
> + u8 CHIP_PEND;
> + u8 CHIP_STATUS;
> +};
> +
> +struct si4455_modem_status {
> + u8 MODEM_PEND;
> + u8 MODEM_STATUS;
> + u8 CURR_RSSI;
> + u8 LATCH_RSSI;
> + u8 ANT1_RSSI;
> + u8 ANT2_RSSI;
> + u16 AFC_FREQ_OFFSET;
> +};
> +
> +struct si4455_fifo_info {
> + u8 RX_FIFO_COUNT;
> + u8 TX_FIFO_SPACE;
> +};
> +
> +struct si4455_one {
> + st
RE: ***UNCHECKED*** Re: [PATCH] Staging: silabs si4455 serial driver
> On Wed, Dec 09, 2020 at 12:09:58PM +0100, Info wrote: > > This is a serial port driver for > > Silicon Labs Si4455 Sub-GHz transciver. > > > > Signed-off-by: József Horváth > > Note, your From: line does not match this line, so I can't take this. > > But: > > > --- > > .../bindings/staging/serial/silabs,si4455.txt | 39 + I'll fix this, sorry. > > staging drivers need to be self-contained, so this should be here. It needs > to be reviewed by the DT maintainers when moving out of staging. > > > index ..aee5c7613b31 > > --- /dev/null > > +++ b/drivers/staging/si4455/TODO > > @@ -0,0 +1,3 @@ > > +TODO: > > +- add variable packet length support > > +- add firmware patching support in case of Si4455-C2A > > Why are these a requirement to get it out of staging? Why go into staging at > all? Why not go into the 'real' part of the kernel directly? > What is keeping that from happening today? > > These look like new features that you can add later, and shouldn't be a > requirement for acceptance into the normal part of the kernel for this > driver. Why have you not tried doing that first? Yes, you are right. The TODO list is for me, and the driver can get out of staging without these. The curent state of the driver is completly covers my requirements, but I would complete these functions int he future. The main reason for not implementing the firmware patching feature is, currently I have no Si4455-C2A in my development system. My product is based on Si4455-B1A, but I'm waiting for the Si4455-C2A module. > thanks, > > greg k-h Üdvözlettel / Best regards: József Horváth ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH] staging: rtl8712: check register_netdev() return value
From: "shaojie.dong"
Function register_netdev() can fail, so we should check it's return value
Signed-off-by: shaojie.dong
---
drivers/staging/rtl8712/hal_init.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8712/hal_init.c
b/drivers/staging/rtl8712/hal_init.c
index 715f1fe8b..38a3e3d44 100644
--- a/drivers/staging/rtl8712/hal_init.c
+++ b/drivers/staging/rtl8712/hal_init.c
@@ -45,7 +45,10 @@ static void rtl871x_load_fw_cb(const struct firmware
*firmware, void *context)
}
adapter->fw = firmware;
/* firmware available - start netdev */
- register_netdev(adapter->pnetdev);
+ if (register_netdev(adapter->pnetdev) != 0) {
+ netdev_err(adapter->pnetdev, "register_netdev() failed\n");
+ free_netdev(adapter->pnetdev);
+ }
complete(&adapter->rtl8712_fw_ready);
}
--
2.17.1
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Re: [PATCH] staging: rtl8712: check register_netdev() return value
On Wed, Dec 09, 2020 at 11:01:24PM +0800, shaojie.d...@isrc.iscas.ac.cn wrote:
> From: "shaojie.dong"
>
> Function register_netdev() can fail, so we should check it's return value
>
> Signed-off-by: shaojie.dong
I doubt you sign your name with a '.' in it, right?
Please resend with the correct name, and using Capital letters where
needed.
> ---
> drivers/staging/rtl8712/hal_init.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/staging/rtl8712/hal_init.c
> b/drivers/staging/rtl8712/hal_init.c
> index 715f1fe8b..38a3e3d44 100644
> --- a/drivers/staging/rtl8712/hal_init.c
> +++ b/drivers/staging/rtl8712/hal_init.c
> @@ -45,7 +45,10 @@ static void rtl871x_load_fw_cb(const struct firmware
> *firmware, void *context)
> }
> adapter->fw = firmware;
> /* firmware available - start netdev */
> - register_netdev(adapter->pnetdev);
> + if (register_netdev(adapter->pnetdev) != 0) {
> + netdev_err(adapter->pnetdev, "register_netdev() failed\n");
> + free_netdev(adapter->pnetdev);
> + }
Did you test this to see if this really properly cleans everything up?
And your if statement can be simplified, please do so.
thanks,
greg k-h
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Re: [PATCH] Staging: silabs si4455 serial driver
On Wednesday 9 December 2020 12:09:58 CET Info wrote:
>
> This is a serial port driver for
> Silicon Labs Si4455 Sub-GHz transciver.
Hello József,
Thank you for taking care of support of Silabs products :)
> Signed-off-by: József Horváth
I think you have to use your personal address to sign-off.
> ---
> .../bindings/staging/serial/silabs,si4455.txt | 39 +
> drivers/staging/Kconfig |2 +
> drivers/staging/Makefile |1 +
> drivers/staging/si4455/Kconfig|8 +
> drivers/staging/si4455/Makefile |2 +
> drivers/staging/si4455/TODO |3 +
> drivers/staging/si4455/si4455.c | 1465 +
> drivers/staging/si4455/si4455_api.h | 56 +
> 8 files changed, 1576 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> create mode 100644 drivers/staging/si4455/Kconfig
> create mode 100644 drivers/staging/si4455/Makefile
> create mode 100644 drivers/staging/si4455/TODO
> create mode 100644 drivers/staging/si4455/si4455.c
> create mode 100644 drivers/staging/si4455/si4455_api.h
Since you add a new directory, you should also update MAINTAINERS file
(checkpatch didn't warn you about that?).
> diff --git
> a/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> new file mode 100644
> index ..abd659b7b952
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> @@ -0,0 +1,39 @@
> +* Silicon Labs Si4455 EASY-TO-USE, LOW-CURRENT OOK/(G)FSK SUB-GHZ
> TRANSCEIVER
AFAIK, Si4455 is a programmable product. So I think that this driver only
work if the Si4455 use a specific firmware, isn't? In this case, you
should mention it in the documentation.
> +
> +Required properties:
> +- compatible: Should be one of the following:
> + - "silabs,si4455" for Silicon Labs Si4455-B1A or Si4455-C2A (driver
> automatically detects the part info),
> + - "silabs,si4455b1a" for Silicon Labs Si4455-B1A,
> + - "silabs,si4455c2a" for Silicon Labs Si4455-C2A,
> +- reg: SPI chip select number.
> +- interrupts: Specifies the interrupt source of the parent interrupt
> + controller. The format of the interrupt specifier depends on the
> + parent interrupt controller.
> +- clocks: phandle to the IC source clock (only external clock source
> supported).
> +- spi-max-frequency: maximum clock frequency on SPI port
> +- shdn-gpios: gpio pin for SDN
> +
> +Example:
> +
> +/ {
> + clocks {
> +si4455_1_2_osc: si4455_1_2_osc {
> +compatible = "fixed-clock";
> +#clock-cells = <0>;
> +clock-frequency = <3000>;
> +};
> + };
> +};
> +
> +&spi0 {
> + si4455: si4455@0 {
> + compatible = "silabs,si4455";
> + reg = <0>;
> + clocks = <&si4455_1_2_osc>;
It seems that the driver does not use this clock. So, is the clock
attribute mandatory? What is the purpose of declaring a fixed-clock
for this device?
> + interrupt-parent = <&gpio>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +shdn-gpios = <&gpio 26 1>;
> +status = "okay";
> +spi-max-frequency = <300>;
> + };
> +};
[...]
> diff --git a/drivers/staging/si4455/Kconfig b/drivers/staging/si4455/Kconfig
> new file mode 100644
> index ..666f726f2583
> --- /dev/null
> +++ b/drivers/staging/si4455/Kconfig
> @@ -0,0 +1,8 @@
> +# SPDX-License-Identifier: GPL-2.0
> +config SERIAL_SI4455
> + tristate "Si4455 support"
> + depends on SPI
> + select SERIAL_CORE
> + help
> + This driver is for Silicon Labs's Si4455 Sub-GHz transciver.
> + Say 'Y' here if you wish to use it as serial port.
So, in fact, Si4455 is not a UART. I don't know how this kind of device
should be presented to the userspace. Have you check if similar devices
already exists in the kernel?
I suggest to add linux-w...@vger.kernel.org to the recipients of your
patch.
[...]
> +static int si4455_get_part_info(struct uart_port *port,
> + struct si4455_part_info *result)
> +{
> + int ret;
> + u8 dataOut[] = { SI4455_CMD_ID_PART_INFO };
> + u8 dataIn[SI4455_CMD_REPLY_COUNT_PART_INFO];
> +
> + ret = si4455_send_command_get_response(port,
> + sizeof(dataOut),
> + dataOut,
> + sizeof(dataIn),
> + dataIn);
Why not:
ret = si4455_send_command_get_response(port,
sizeof(*result), result,
sizeof
Re: [PATCH] staging: rtl8712: check register_netdev() return value
On Wed, Dec 09, 2020 at 11:01:24PM +0800, shaojie.d...@isrc.iscas.ac.cn wrote:
> From: "shaojie.dong"
>
> Function register_netdev() can fail, so we should check it's return value
>
> Signed-off-by: shaojie.dong
> ---
> drivers/staging/rtl8712/hal_init.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/staging/rtl8712/hal_init.c
> b/drivers/staging/rtl8712/hal_init.c
> index 715f1fe8b..38a3e3d44 100644
> --- a/drivers/staging/rtl8712/hal_init.c
> +++ b/drivers/staging/rtl8712/hal_init.c
> @@ -45,7 +45,10 @@ static void rtl871x_load_fw_cb(const struct firmware
> *firmware, void *context)
> }
> adapter->fw = firmware;
> /* firmware available - start netdev */
> - register_netdev(adapter->pnetdev);
> + if (register_netdev(adapter->pnetdev) != 0) {
> + netdev_err(adapter->pnetdev, "register_netdev() failed\n");
> + free_netdev(adapter->pnetdev);
> + }
This function should not be calling register_netdev(). What does that
have to do with firmware? It should also not free_netdev() because
that will just lead to a use after free in the caller.
regards,
dan carpenter
> complete(&adapter->rtl8712_fw_ready);
> }
>
> --
> 2.17.1
>
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Re: [PATCH] Staging: silabs si4455 serial driver
On Wed, Dec 09, 2020 at 03:42:06PM +0300, Dan Carpenter wrote:
> Change the From email header to say your name.
>
> The patch is corrupted and can't be applied. Please read the first
> paragraphs of Documentation/process/email-clients.rst
>
> This driver is pretty small and it might be easier to clean it up first
> before merging it into staging. Run checkpatch.pl --strict on the
> driver.
>
> > --- /dev/null
> > +++ b/drivers/staging/si4455/si4455.c
> > @@ -0,0 +1,1465 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2020 József Horváth
> > + *
> > + */
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include "si4455_api.h"
> > +
> > +#define PORT_SI44551096
> > +#define SI4455_NAME"si4455"
> > +#define SI4455_MAJOR 432
> > +#define SI4455_MINOR 567
> > +#define SI4455_UART_NRMAX 1
> > +#define SI4455_FIFO_SIZE 64
> > +
> > +#define SI4455_CMD_ID_EZCONFIG_CHECK 0x19
> > +#define SI4455_CMD_ID_PART_INFO0x01
> > +#define SI4455_CMD_REPLY_COUNT_PART_INFO 9
> > +#define SI4455_CMD_ID_GET_INT_STATUS 0x20
> > +#define SI4455_CMD_REPLY_COUNT_GET_INT_STATUS 8
> > +#define SI4455_CMD_ID_FIFO_INFO0x15
> > +#define SI4455_CMD_ARG_COUNT_FIFO_INFO 2
> > +#define SI4455_CMD_REPLY_COUNT_FIFO_INFO 2
> > +#define SI4455_CMD_FIFO_INFO_ARG_TX_BIT0x01
> > +#define SI4455_CMD_FIFO_INFO_ARG_RX_BIT0x02
> > +#define SI4455_CMD_ID_READ_CMD_BUFF0x44
> > +#define SI4455_CMD_ID_READ_RX_FIFO 0x77
> > +#define SI4455_CMD_ID_WRITE_TX_FIFO0x66
> > +#define SI4455_CMD_ID_START_RX 0x32
> > +#define SI4455_CMD_ARG_COUNT_START_RX 8
> > +#define SI4455_CMD_START_RX_ARG_RXTIMEOUT_STATE_ENUM_RX8
> > +#define SI4455_CMD_START_RX_ARG_RXVALID_STATE_ENUM_RX 8
> > +#define SI4455_CMD_START_RX_ARG_RXINVALID_STATE_ENUM_RX8
> > +#define SI4455_CMD_ID_START_TX 0x31
> > +#define SI4455_CMD_ARG_COUNT_START_TX 5
> > +#define SI4455_CMD_ID_CHANGE_STATE 0x34
> > +#define SI4455_CMD_ARG_COUNT_CHANGE_STATE 2
> > +#define SI4455_CMD_CHANGE_STATE_ARG_NEW_STATE_ENUM_READY 3
> > +#define SI4455_CMD_GET_CHIP_STATUS_REP_CMD_ERROR_PEND_MASK 0x08
> > +#define SI4455_CMD_GET_CHIP_STATUS_REP_CMD_ERROR_PEND_BIT 0x08
> > +#define SI4455_CMD_GET_INT_STATUS_REP_PACKET_SENT_PEND_BIT 0x20
> > +#define SI4455_CMD_GET_INT_STATUS_REP_PACKET_RX_PEND_BIT 0x10
> > +#define SI4455_CMD_GET_INT_STATUS_REP_CRC_ERROR_BIT0x08
>
> These names are unreadably long and just make the code messy.
>
> > +#define SI4455_CMD_ID_GET_MODEM_STATUS 0x22
> > +#define SI4455_CMD_ARG_COUNT_GET_MODEM_STATUS 2
> > +#define SI4455_CMD_REPLY_COUNT_GET_MODEM_STATUS8
> > +
> > +struct si4455_part_info {
> > + u8 CHIPREV;
> > + u16 PART;
> > + u8 PBUILD;
> > + u16 ID;
> > + u8 CUSTOMER;
> > + u8 ROMID;
> > + u8 BOND;
>
> Also the huge gap between the type and the struct member makes it
> hard to read.
>
> u8 chip_rev;
> u16 part;
> u8 pbuild;
>
> etc.
>
> > +};
> > +
> > +struct si4455_int_status {
> > + u8 INT_PEND;
> > + u8 INT_STATUS;
> > + u8 PH_PEND;
> > + u8 PH_STATUS;
> > + u8 MODEM_PEND;
> > + u8 MODEM_STATUS;
> > + u8 CHIP_PEND;
> > + u8 CHIP_STATUS;
> > +};
> > +
> > +struct si4455_modem_status {
> > + u8 MODEM_PEND;
> > + u8 MODEM_STATUS;
> > + u8 CURR_RSSI;
> > + u8 LATCH_RSSI;
> > + u8 ANT1_RSSI;
> > + u8 ANT2_RSSI
Re: [PATCH] Staging: silabs si4455 serial driver
On Wed, Dec 09, 2020 at 06:56:13PM +, József Horváth wrote: > Thank you for your suggestions. I made the canges suggested by you. > > I'll test the driver in my development environment, then I'll come > back with a new patch soon. Take your time. No rush. > > I set up a mail client on my linux dev environment, I hope my > mails/patches/codes will be in proper quality in the future. No problem at all. Part of getting used to the process. regards, dan carpenter ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH] Staging: silabs si4455 serial driver
Hello Jérôme,
On Wed, Dec 09, 2020 at 06:38:08PM +0100, Jérôme Pouiller wrote:
> On Wednesday 9 December 2020 12:09:58 CET Info wrote:
> >
> > This is a serial port driver for
> > Silicon Labs Si4455 Sub-GHz transciver.
>
> Hello József,
>
> Thank you for taking care of support of Silabs products :)
I think great products :) and great support :)
>
>
> > Signed-off-by: József Horváth
>
> I think you have to use your personal address to sign-off.
I'm a self-employed, currently this is my "personal" e-mail address.
>
> > ---
> > .../bindings/staging/serial/silabs,si4455.txt | 39 +
> > drivers/staging/Kconfig |2 +
> > drivers/staging/Makefile |1 +
> > drivers/staging/si4455/Kconfig|8 +
> > drivers/staging/si4455/Makefile |2 +
> > drivers/staging/si4455/TODO |3 +
> > drivers/staging/si4455/si4455.c | 1465 +
> > drivers/staging/si4455/si4455_api.h | 56 +
> > 8 files changed, 1576 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> > create mode 100644 drivers/staging/si4455/Kconfig
> > create mode 100644 drivers/staging/si4455/Makefile
> > create mode 100644 drivers/staging/si4455/TODO
> > create mode 100644 drivers/staging/si4455/si4455.c
> > create mode 100644 drivers/staging/si4455/si4455_api.h
>
> Since you add a new directory, you should also update MAINTAINERS file
> (checkpatch didn't warn you about that?).
>
>
> > diff --git
> > a/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> > b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> > new file mode 100644
> > index ..abd659b7b952
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> > @@ -0,0 +1,39 @@
> > +* Silicon Labs Si4455 EASY-TO-USE, LOW-CURRENT OOK/(G)FSK SUB-GHZ
> > TRANSCEIVER
>
> AFAIK, Si4455 is a programmable product. So I think that this driver only
> work if the Si4455 use a specific firmware, isn't? In this case, you
> should mention it in the documentation.
Si4455 is programmed by silabs.
In case of C2A, it is possible to load patch.
My solution is to loading EZConfig(generated by WDS) and firmware patch with
ioctl calls.
You can see the definitions in si4455_api.h.
A short example for EZConfig loading(patch loading will be exacly the same if
Si4455 is rev C2A):
...
#include "si4455_api.h"
...
#include "radio.h" //< Generated by WDS3
#include "radio_config_Si4455.h"//< Generated by WDS3
...
struct si4455_iocbuff iocbuff = { 0 };
iocbuff.length = sizeof(Radio_Configuration_Data_Array);
memcpy(iocbuff.data, Radio_Configuration_Data_Array, iocbuff.length);
ret = ioctl(portFd, SI4455_IOC_SEZC, &iocbuff);
...
After SI4455_IOC_SEZC or SI4455_IOC_SEZP ioctl calls, the driver resets the
Si4455, and apply the configuration/patch.
>
>
> > +
> > +Required properties:
> > +- compatible: Should be one of the following:
> > + - "silabs,si4455" for Silicon Labs Si4455-B1A or Si4455-C2A (driver
> > automatically detects the part info),
> > + - "silabs,si4455b1a" for Silicon Labs Si4455-B1A,
> > + - "silabs,si4455c2a" for Silicon Labs Si4455-C2A,
> > +- reg: SPI chip select number.
> > +- interrupts: Specifies the interrupt source of the parent interrupt
> > + controller. The format of the interrupt specifier depends on the
> > + parent interrupt controller.
> > +- clocks: phandle to the IC source clock (only external clock source
> > supported).
> > +- spi-max-frequency: maximum clock frequency on SPI port
> > +- shdn-gpios: gpio pin for SDN
> > +
> > +Example:
> > +
> > +/ {
> > + clocks {
> > +si4455_1_2_osc: si4455_1_2_osc {
> > +compatible = "fixed-clock";
> > +#clock-cells = <0>;
> > +clock-frequency = <3000>;
> > +};
> > + };
> > +};
> > +
> > +&spi0 {
> > + si4455: si4455@0 {
> > + compatible = "silabs,si4455";
> > + reg = <0>;
> > + clocks = <&si4455_1_2_osc>;
>
> It seems that the driver does not use this clock. So, is the clock
> attribute mandatory? What is the purpose of declaring a fixed-clock
> for this device?
>
Yes you are right, but the uart subsystem maybe. I'll check it again, and if
does not, I'll remove these definitions.
> > + interrupt-parent = <&gpio>;
> > + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> > +shdn-gpios = <&gpio 26 1>;
> > +status = "okay";
> > +spi-max-frequency = <300>;
> > + };
> > +};
>
> [...]
>
>
> > diff --git a/drivers/staging/si4455/Kconfig b/drivers/staging/si4455/Kconfig
> > new file mode 1006
[PATCH] Staging: ralink-gdma: ralink-gdma: Fix a blank line coding style issue
Fix a coding style issue as identified by checkpatch.pl
Signed-off-by: Triplehx3
---
drivers/staging/ralink-gdma/ralink-gdma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/ralink-gdma/ralink-gdma.c
b/drivers/staging/ralink-gdma/ralink-gdma.c
index 655df317d0ee..a6181a167814 100644
--- a/drivers/staging/ralink-gdma/ralink-gdma.c
+++ b/drivers/staging/ralink-gdma/ralink-gdma.c
@@ -122,6 +122,7 @@ struct gdma_dma_dev {
struct gdma_data *data;
void __iomem *base;
struct tasklet_struct task;
+
volatile unsigned long chan_issued;
atomic_t cnt;
--
2.28.0
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Re: [PATCH] Staging: silabs si4455 serial driver
On Wed, Dec 9, 2020 at 5:17 AM Info wrote:
>
> This is a serial port driver for
> Silicon Labs Si4455 Sub-GHz transciver.
>
> Signed-off-by: József Horváth
> ---
> .../bindings/staging/serial/silabs,si4455.txt | 39 +
Looks straightforward enough to not be in staging. Plus
bindings/staging/serial is not a directory I want.
DT bindings are in DT schema format now. See
Documentation/devicetree/writing-schema.rst.
> drivers/staging/Kconfig |2 +
> drivers/staging/Makefile |1 +
> drivers/staging/si4455/Kconfig|8 +
> drivers/staging/si4455/Makefile |2 +
> drivers/staging/si4455/TODO |3 +
> drivers/staging/si4455/si4455.c | 1465 +
> drivers/staging/si4455/si4455_api.h | 56 +
> 8 files changed, 1576 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> create mode 100644 drivers/staging/si4455/Kconfig
> create mode 100644 drivers/staging/si4455/Makefile
> create mode 100644 drivers/staging/si4455/TODO
> create mode 100644 drivers/staging/si4455/si4455.c
> create mode 100644 drivers/staging/si4455/si4455_api.h
>
> diff --git
> a/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> new file mode 100644
> index ..abd659b7b952
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/staging/serial/silabs,si4455.txt
> @@ -0,0 +1,39 @@
> +* Silicon Labs Si4455 EASY-TO-USE, LOW-CURRENT OOK/(G)FSK SUB-GHZ
> TRANSCEIVER
> +
> +Required properties:
> +- compatible: Should be one of the following:
> + - "silabs,si4455" for Silicon Labs Si4455-B1A or Si4455-C2A (driver
> automatically detects the part info),
Either do this or...
> + - "silabs,si4455b1a" for Silicon Labs Si4455-B1A,
> + - "silabs,si4455c2a" for Silicon Labs Si4455-C2A,
this. Not both. I assume there's an id register or something you can
read to determine which one. That's fine, but consider if there's any
power sequencing differences that you'd need to handle before you can
read that register.
> +- reg: SPI chip select number.
> +- interrupts: Specifies the interrupt source of the parent interrupt
> + controller. The format of the interrupt specifier depends on the
> + parent interrupt controller.
> +- clocks: phandle to the IC source clock (only external clock source
> supported).
> +- spi-max-frequency: maximum clock frequency on SPI port
> +- shdn-gpios: gpio pin for SDN
shutdown-gpios is the semi-standard name.
> +
> +Example:
> +
> +/ {
> + clocks {
> +si4455_1_2_osc: si4455_1_2_osc {
> +compatible = "fixed-clock";
> +#clock-cells = <0>;
> +clock-frequency = <3000>;
> +};
> + };
Don't need to show this for the example.
> +};
> +
> +&spi0 {
> + si4455: si4455@0 {
> + compatible = "silabs,si4455";
> + reg = <0>;
> + clocks = <&si4455_1_2_osc>;
> + interrupt-parent = <&gpio>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +shdn-gpios = <&gpio 26 1>;
> +status = "okay";
Don't show status in examples.
> +spi-max-frequency = <300>;
> + };
> +};
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[staging:staging-testing] BUILD SUCCESS 4996b4610767064807d022dd731584f7ff78c309
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git staging-testing branch HEAD: 4996b4610767064807d022dd731584f7ff78c309 staging: olpc_dcon: Do not call platform_device_unregister() in dcon_probe() elapsed time: 721m configs tested: 104 configs skipped: 3 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig mips gcw0_defconfig sh kfr2r09_defconfig sh se7724_defconfig arc nsimosci_hs_smp_defconfig arm viper_defconfig arm socfpga_defconfig alphaalldefconfig armvexpress_defconfig powerpc makalu_defconfig powerpc tqm8xx_defconfig arc allyesconfig arm imx_v6_v7_defconfig arm tegra_defconfig armmulti_v5_defconfig mips ath79_defconfig openriscdefconfig m68k sun3_defconfig armmulti_v7_defconfig powerpc mpc85xx_cds_defconfig sh rts7751r2d1_defconfig mips bigsur_defconfig mips xway_defconfig mips cobalt_defconfig mipsnlm_xlp_defconfig ia64 allmodconfig ia64defconfig ia64 allyesconfig m68k allmodconfig m68kdefconfig m68k allyesconfig nios2 defconfig nds32 allnoconfig c6x allyesconfig nds32 defconfig nios2allyesconfig cskydefconfig alpha defconfig alphaallyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allyesconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386 tinyconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a004-20201209 i386 randconfig-a005-20201209 i386 randconfig-a001-20201209 i386 randconfig-a002-20201209 i386 randconfig-a006-20201209 i386 randconfig-a003-20201209 i386 randconfig-a001-20201210 i386 randconfig-a004-20201210 i386 randconfig-a003-20201210 i386 randconfig-a002-20201210 i386 randconfig-a005-20201210 i386 randconfig-a006-20201210 x86_64 randconfig-a016-20201209 x86_64 randconfig-a012-20201209 x86_64 randconfig-a013-20201209 x86_64 randconfig-a014-20201209 x86_64 randconfig-a015-20201209 x86_64 randconfig-a011-20201209 i386 randconfig-a013-20201209 i386 randconfig-a014-20201209 i386 randconfig-a011-20201209 i386 randconfig-a015-20201209 i386 randconfig-a012-20201209 i386 randconfig-a016-20201209 riscvnommu_k210_defconfig riscvallyesconfig riscvnommu_virt_defconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64 rhel x86_64 allyesconfig x86_64rhel-7.6-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 kexec clang tested configs: x86_64 randconfig-a004-20201209 x86_64
Re: [PATCH v4 0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621
Hi all, On Sun, Nov 22, 2020 at 10:55 AM Sergio Paracuellos wrote: > > This patchset ports CPU clock detection for MT7621 from OpenWrt > and adds a complete clock plan for the mt7621 SOC. > > The documentation for this SOC only talks about two registers > regarding to the clocks: > * SYSC_REG_CPLL_CLKCFG0 - provides some information about boostrapped > refclock. PLL and dividers used for CPU and some sort of BUS (AHB?). > * SYSC_REG_CPLL_CLKCFG1 - a banch of gates to enable/disable clocks for > all or some ip cores. > > No documentation about a probably existent set of dividers for each ip > core is included in the datasheets. So we cannot make anything better, > AFAICT. > > Looking into driver code, and some openWRT patched there are > another frequences which are used in some drivers (uart, sd...). > According to all of this information the clock plan for this > SoC is set as follows: > - Main top clock "xtal" from where all the rest of the world is >derived. > - CPU clock "cpu" derived from "xtal" frequencies and a bunch of >register reads and predividers. > - BUS clock "bus" derived from "cpu" and with (cpu / 4) MHz. > - Fixed clocks from "xtal": > * "50m": 50 MHz. > * "125m": 125 MHz. > * "150m": 150 MHz. > * "250m": 250 MHz. > * "270m": 270 MHz. > > We also have a buch of gate clocks with their parents: > - "hsdma": "150m" > - "fe": "250m" > - "sp_divtx": "270m" > - "timer": "50m" > - "pcm": "270m" > - "pio": "50m" > - "gdma": "bus" > - "nand": "125m" > - "i2c": "50m" > - "i2s": "270m" > - "spi": "bus" > - "uart1": "50m" > - "uart2": "50m" > - "uart3": "50m" > - "eth": "50m" > - "pcie0": "125m" > - "pcie1": "125m" > - "pcie2": "125m" > - "crypto": "250m" > - "shxc": "50m" > > There was a previous attempt of doing this here[0] but the author > (Chuanhong Guo) did not wanted to make assumptions of a clock plan > for the platform that time. It seems that now he has a better idea of > how the clocks are dispossed for this SoC so he share code[1] where > some frequencies and clock parents for the gates are coded from a > real mediatek private clock plan. > > I do really want this to be upstreamed so according to the comments > in previous attempt[0] from Oleksij Rempel and the frequencies in > code[1] I have tried to do this by myself. > > All of this patches have been tested in a GNUBee PC1 resulting in a > working platform. > > Changes in v4: > - Add Acked-by from Rob Herring for binding headers (PATCH 1/6). > - Convert bindings to not use syscon phandle and declare clock as >a child of the syscon node. Update device tree and binding doc >accordly. > - Make use of 'syscon_node_to_regmap' in driver code instead of >get this using the phandle function. > - Properly unregister clocks for the error path of the function >'mt7621_clk_init'. > - Include ARRAY_SIZE of fixed clocks in the 'count' to kzalloc >of 'clk_data'. > - Add new patch changing invalid vendor 'mtk' in favour of 'mediatek' >which is the one listed in 'vendor-prefixes.yaml'. Update mt7621 code >accordly. I have added this patch inside this series because clk >binding is referring syscon node and the string for that node was >with not listed vendor. Hence update and have all of this correct >in the same series. Any comments on this?? Should I resend the series to get reviewed? Thanks in advance for your time! Best regards, Sergio Paracuellos > > Changes in v3: > - Fix compilation warnings reported by kernel test robot because of >ignoring return values of 'of_clk_hw_register' in functions >'mt7621_register_top_clocks' and 'mt7621_gate_ops_init'. > - Fix dts file and binding documentation 'clock-output-names'. > > Changes in v2: > - Remove the following patches: >* dt: bindings: add mt7621-pll device tree binding documentation. >* MIPS: ralink: add clock device providing cpu/ahb/apb clock for mt7621. > - Move all relevant clock code to 'drivers/clk/ralink/clk-mt7621.c' and >unify there previous 'mt7621-pll' and 'mt7621-clk' into a unique driver >and binding 'mt7621-clk'. > - Driver is not a platform driver anymore and now make use of > 'CLK_OF_DECLARE' >because we need clocks available in 'plat_time_init' before setting up >the timer for the GIC. > - Use new fixed clocks as parents for different gates and deriving from > 'xtal' >using frequencies in[1]. > - Adapt dts file and bindings header and documentation for new changes. > - Change MAINTAINERS file to only contains clk-mt7621.c code and >mediatek,mt7621-clk.yaml file. > > [0]: https://www.lkml.org/lkml/2019/7/23/1044 > [1]: > https://github.com/981213/linux/commit/2eca1f045e4c3db18c941135464c0d7422ad8133 > > > Sergio Paracuellos (6): > dt-bindings: clock: add dt binding header for mt7621 clocks > dt: bindings: add mt7621-clk device tree binding documentation > clk: ralink: add clock driver for mt7621 SoC > staging: mt7621-
[driver-core:driver-core-testing] BUILD SUCCESS WITH WARNING 3577afb0052fca65e67efdfc8e0859bb7bac87a6
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git driver-core-testing branch HEAD: 3577afb0052fca65e67efdfc8e0859bb7bac87a6 dyndbg: fix use before null check Warning ids grouped by kconfigs: gcc_recent_errors `-- arc-randconfig-c004-20201209 `-- drivers-of-property.c:Unneeded-variable:ret-Return-on-line i386-tinyconfig vmlinux size: +---+--+--+ | DELTA | SYMBOL | COMMIT | +---+--+--+ | +481 | TOTAL| f8394f232b1e..3577afb0052f (ALL COMMITS) | | +546 | TEXT | f8394f232b1e..3577afb0052f (ALL COMMITS) | | +218 | __fw_devlink_link_to_suppliers() | f8394f232b1e..3577afb0052f (ALL COMMITS) | | +140 | fwnode_link_add()| f8394f232b1e..3577afb0052f (ALL COMMITS) | | +106 | fw_devlink_create_devlink() | f8394f232b1e..3577afb0052f (ALL COMMITS) | | +84 | fwnode_links_purge() | f8394f232b1e..3577afb0052f (ALL COMMITS) | | +83 | fwnode_links_purge_suppliers() | f8394f232b1e..3577afb0052f (ALL COMMITS) | | +69 | fw_devlink_parse_fwtree()| f8394f232b1e..3577afb0052f (ALL COMMITS) | | +68 | driver_probe_device()| f8394f232b1e..3577afb0052f (ALL COMMITS) | | -68 | driver_probe_device()| f8394f232b1e..3577afb0052f (ALL COMMITS) | | -124 | device_link_add_missing_supplier_links() | f8394f232b1e..3577afb0052f (ALL COMMITS) | | -172 | fw_devlink_resume() | f8394f232b1e..3577afb0052f (ALL COMMITS) | +---+--+--+ elapsed time: 724m configs tested: 145 configs skipped: 3 gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig powerpc mpc837x_mds_defconfig h8300 defconfig xtensa alldefconfig mips loongson3_defconfig powerpc ppa8548_defconfig shedosk7705_defconfig xtensageneric_kc705_defconfig s390 allyesconfig mips mpc30x_defconfig openrisc simple_smp_defconfig m68kstmark2_defconfig powerpcge_imp3a_defconfig arc haps_hs_smp_defconfig powerpc mpc832x_mds_defconfig mips malta_defconfig powerpc eiger_defconfig m68kmvme147_defconfig powerpc tqm8xx_defconfig arcvdk_hs38_defconfig powerpc walnut_defconfig ia64 bigsur_defconfig m68k apollo_defconfig powerpc tqm8555_defconfig riscvallmodconfig mips gcw0_defconfig sh kfr2r09_defconfig sh se7724_defconfig arc nsimosci_hs_smp_defconfig arm viper_defconfig arm socfpga_defconfig alphaalldefconfig armvexpress_defconfig powerpc makalu_defconfig mips tb0219_defconfig mips maltasmvp_eva_defconfig mips cu1000-neo_defconfig powerpc rainier_defconfig arm pcm027_defconfig mips ath25_defconfig powerpc mpc834x_mds_defconfig armoxnas_v6_defconfig s390defconfig armspear6xx_defconfig arm s3c6400_defconfig mips db1xxx_defconfig mipsar7_defconfig arm versatile_defconfig powerpcicon_defconfig powerpc tqm8541_defconfig m68k alldefconfig arm ep93xx_defconfig armcerfcube_defconfig arm multi_v4t_defconfig nios2alldefconfig arm aspeed_g5_defconfig powerpc canyonlands_defconfig sh rts7751r2d1_defconfig mips bigsur_defconfig mips xway_defconfig mips
Re: [PATCH] Staging: ralink-gdma: ralink-gdma: Fix a blank line coding style issue
On Thu, Dec 10, 2020 at 01:32:28AM +, Triplehx3 wrote:
> Fix a coding style issue as identified by checkpatch.pl
>
> Signed-off-by: Triplehx3
> ---
> drivers/staging/ralink-gdma/ralink-gdma.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/staging/ralink-gdma/ralink-gdma.c
> b/drivers/staging/ralink-gdma/ralink-gdma.c
> index 655df317d0ee..a6181a167814 100644
> --- a/drivers/staging/ralink-gdma/ralink-gdma.c
> +++ b/drivers/staging/ralink-gdma/ralink-gdma.c
> @@ -122,6 +122,7 @@ struct gdma_dma_dev {
> struct gdma_data *data;
> void __iomem *base;
> struct tasklet_struct task;
> +
> volatile unsigned long chan_issued;
> atomic_t cnt;
>
Hi,
This is the friendly patch-bot of Greg Kroah-Hartman. You have sent him
a patch that has triggered this response. He used to manually respond
to these common problems, but in order to save his sanity (he kept
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