[PATCH] staging: ccree: remove unused pointer cc_base
From: Colin Ian King
Pointer cc_base is being assigned but is never read, hence it is
redundant and can be removed. Cleans up clang warning:
drivers/staging/ccree/ssi_driver.c:235:2: warning: Value stored to
'cc_base' is never read
Signed-off-by: Colin Ian King
---
drivers/staging/ccree/ssi_driver.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/staging/ccree/ssi_driver.c
b/drivers/staging/ccree/ssi_driver.c
index 1a3c481fa92a..f4c0af8047e4 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -199,7 +199,6 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
static int init_cc_resources(struct platform_device *plat_dev)
{
struct resource *req_mem_cc_regs = NULL;
- void __iomem *cc_base = NULL;
struct ssi_drvdata *new_drvdata;
struct device *dev = &plat_dev->dev;
struct device_node *np = dev->of_node;
@@ -232,8 +231,6 @@ static int init_cc_resources(struct platform_device
*plat_dev)
dev_dbg(dev, "CC registers mapped from %pa to 0x%p\n",
&req_mem_cc_regs->start, new_drvdata->cc_base);
- cc_base = new_drvdata->cc_base;
-
/* Then IRQ */
new_drvdata->irq = platform_get_irq(plat_dev, 0);
if (new_drvdata->irq < 0) {
--
2.14.1
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[PATCH v2 01/10] staging: ccree: fix leak of import() after init()
crypto_ahash_import() may be called either after
crypto_ahash_init() or without such call. Right now
we always internally call init() as part of
import(), thus leaking memory and mappings if the
user has already called init() herself.
Fix this by only calling init() internally if the
state is not already initialized.
Fixes: commit 454527d0d94f ("staging: ccree: fix hash import/export")
Cc: stable
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_hash.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index d79090e..1799d3f 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -1778,9 +1778,12 @@ static int ssi_ahash_import(struct ahash_request *req,
const void *in)
}
in += sizeof(u32);
- rc = ssi_hash_init(state, ctx);
- if (rc)
- goto out;
+ /* call init() to allocate bufs if the user hasn't */
+ if (!state->digest_buff) {
+ rc = ssi_hash_init(state, ctx);
+ if (rc)
+ goto out;
+ }
dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr,
ctx->inter_digestsize, DMA_BIDIRECTIONAL);
--
2.7.4
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[PATCH v2 02/10] staging: ccree: make long func call sites readable
The driver was using a function naming scheme
including common prefixes for driver global
functions based on the code module they came from.
The combination of long names with long common
prefixes made the whole thing too long for a human
to parse.
Switch to simple and shorter function naming
scheme. Where required, realign parameters and
add paranthesis for better code readability.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_aead.c| 32 +--
drivers/staging/ccree/ssi_buffer_mgr.c | 430 ++--
drivers/staging/ccree/ssi_buffer_mgr.h | 49 ++--
drivers/staging/ccree/ssi_cipher.c | 13 +-
drivers/staging/ccree/ssi_driver.c | 18 +-
drivers/staging/ccree/ssi_hash.c| 116 +
drivers/staging/ccree/ssi_ivgen.c | 2 +-
drivers/staging/ccree/ssi_pm.c | 26 +-
drivers/staging/ccree/ssi_pm.h | 12 +-
drivers/staging/ccree/ssi_request_mgr.c | 16 +-
drivers/staging/ccree/ssi_request_mgr.h | 6 +-
drivers/staging/ccree/ssi_sram_mgr.c| 11 +-
drivers/staging/ccree/ssi_sram_mgr.h| 6 +-
13 files changed, 345 insertions(+), 392 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index ba0954e..0b5b230 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -233,7 +233,7 @@ static void ssi_aead_complete(struct device *dev, void
*ssi_req, void __iomem *c
struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
int err = 0;
- ssi_buffer_mgr_unmap_aead_request(dev, areq);
+ cc_unmap_aead_request(dev, areq);
/* Restore ordinary iv pointer */
areq->iv = areq_ctx->backup_iv;
@@ -246,17 +246,20 @@ static void ssi_aead_complete(struct device *dev, void
*ssi_req, void __iomem *c
/* In case of payload authentication failure, MUST NOT
* revealed the decrypted message --> zero its memory.
*/
- ssi_buffer_mgr_zero_sgl(areq->dst, areq_ctx->cryptlen);
+ cc_zero_sgl(areq->dst, areq_ctx->cryptlen);
err = -EBADMSG;
}
} else { /*ENCRYPT*/
- if (unlikely(areq_ctx->is_icv_fragmented))
- ssi_buffer_mgr_copy_scatterlist_portion(
- dev, areq_ctx->mac_buf, areq_ctx->dst_sgl,
- areq->cryptlen + areq_ctx->dst_offset,
- (areq->cryptlen + areq_ctx->dst_offset +
-ctx->authsize),
- SSI_SG_FROM_BUF);
+ if (unlikely(areq_ctx->is_icv_fragmented)) {
+ cc_copy_sg_portion(dev, areq_ctx->mac_buf,
+ areq_ctx->dst_sgl,
+ (areq->cryptlen +
+ areq_ctx->dst_offset),
+ (areq->cryptlen +
+ areq_ctx->dst_offset +
+ ctx->authsize),
+ SSI_SG_FROM_BUF);
+ }
/* If an IV was generated, copy it back to the user provided
buffer. */
if (areq_ctx->backup_giv) {
@@ -2053,7 +2056,7 @@ static int ssi_aead_process(struct aead_request *req,
enum drv_crypto_direction
}
#endif /*SSI_CC_HAS_AES_GCM*/
- rc = ssi_buffer_mgr_map_aead_request(ctx->drvdata, req);
+ rc = cc_map_aead_request(ctx->drvdata, req);
if (unlikely(rc != 0)) {
dev_err(dev, "map_request() failed\n");
goto exit;
@@ -2112,7 +2115,7 @@ static int ssi_aead_process(struct aead_request *req,
enum drv_crypto_direction
#endif
default:
dev_err(dev, "Unsupported authenc (%d)\n", ctx->auth_mode);
- ssi_buffer_mgr_unmap_aead_request(dev, req);
+ cc_unmap_aead_request(dev, req);
rc = -ENOTSUPP;
goto exit;
}
@@ -2123,7 +2126,7 @@ static int ssi_aead_process(struct aead_request *req,
enum drv_crypto_direction
if (unlikely(rc != -EINPROGRESS)) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
- ssi_buffer_mgr_unmap_aead_request(dev, req);
+ cc_unmap_aead_request(dev, req);
}
exit:
@@ -2753,8 +2756,9 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata)
INIT_LIST_HEAD(&aead_handle->aead_list);
drvdata->aead_handle = aead_handle;
- aead_handle->sram_workspace_addr = ssi_sram_mgr_alloc(
- drvdata, MAX_HMAC_DIGEST_SIZE);
+ aead_handle->sram_workspace_addr = cc_sram_alloc(drvdata,
+MAX_HMAC_DIGEST_SIZE);
+
if (aead_handle->sram_workspace_addr == NULL_SR
[PATCH v2 05/10] staging: ccree: fold common code into function
Fold common code copying MAC to/from a temp. buffer
into an inline function instead of keeping multiple
open coded versions of same.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_buffer_mgr.c | 89 ++
1 file changed, 37 insertions(+), 52 deletions(-)
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c
b/drivers/staging/ccree/ssi_buffer_mgr.c
index b3ca249..48c0b02 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -65,6 +65,27 @@ struct buffer_array {
};
/**
+ * cc_copy_mac() - Copy MAC to temporary location
+ *
+ * @dev: device object
+ * @req: aead request object
+ * @dir: [IN] copy from/to sgl
+ */
+static inline void cc_copy_mac(struct device *dev, struct aead_request *req,
+ enum ssi_sg_cpy_direct dir)
+{
+ struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
+ struct crypto_aead *tfm = crypto_aead_reqtfm(req);
+ u32 skip = req->assoclen + req->cryptlen;
+
+ if (areq_ctx->is_gcm4543)
+ skip += crypto_aead_ivsize(tfm);
+
+ cc_copy_sg_portion(dev, areq_ctx->backup_mac, req->src,
+ (skip - areq_ctx->req_authsize), skip, dir);
+}
+
+/**
* cc_get_sgl_nents() - Get scatterlist number of entries.
*
* @sg_list: SG list
@@ -670,19 +691,11 @@ void cc_unmap_aead_request(struct device *dev, struct
aead_request *req)
if (drvdata->coherent &&
(areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
likely(req->src == req->dst)) {
- u32 size_to_skip = req->assoclen;
-
- if (areq_ctx->is_gcm4543)
- size_to_skip += crypto_aead_ivsize(tfm);
- /* copy mac to a temporary location to deal with possible
+ /* copy back mac from temporary location to deal with possible
* data memory overriding that caused by cache coherence
problem.
*/
- cc_copy_sg_portion(dev, areq_ctx->backup_mac, req->src,
- (size_to_skip + req->cryptlen -
- areq_ctx->req_authsize),
- (size_to_skip + req->cryptlen),
- SSI_SG_FROM_BUF);
+ cc_copy_mac(dev, req, SSI_SG_FROM_BUF);
}
}
@@ -918,7 +931,6 @@ static inline int cc_prepare_aead_data_mlli(
enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
unsigned int authsize = areq_ctx->req_authsize;
int rc = 0, icv_nents;
- struct crypto_aead *tfm = crypto_aead_reqtfm(req);
struct device *dev = drvdata_to_dev(drvdata);
if (likely(req->src == req->dst)) {
@@ -943,24 +955,14 @@ static inline int cc_prepare_aead_data_mlli(
* MAC verification upon request completion
*/
if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
- if (!drvdata->coherent) {
/* In coherent platforms (e.g. ACP)
* already copying ICV for any
* INPLACE-DECRYPT operation, hence
* we must neglect this code.
*/
- u32 skip = req->assoclen;
-
- if (areq_ctx->is_gcm4543)
- skip += crypto_aead_ivsize(tfm);
-
- cc_copy_sg_portion(dev,
- areq_ctx->backup_mac,
- req->src,
- (skip +
req->cryptlen - areq_ctx->req_authsize),
- (skip +
req->cryptlen),
- SSI_SG_TO_BUF);
- }
+ if (!drvdata->coherent)
+ cc_copy_mac(dev, req, SSI_SG_TO_BUF);
+
areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
} else {
areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
@@ -996,22 +998,14 @@ static inline int cc_prepare_aead_data_mlli(
goto prepare_data_mlli_exit;
}
+ /* Backup happens only when ICV is fragmented, ICV
+* verification is made by CPU compare in order to simplify
+* MAC verification upon request completion
+*/
if (unlikely(areq_ctx->is_icv_fragmented)) {
- /* Backup happens only when ICV is fragmented, ICV
-* verification is made by CPU compare in orde
[PATCH v2 03/10] staging: ccree: simplify AEAD using local var
Make the code more readable by using a local variable
for commonly use expression in the AEAD part of the driver.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_aead.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 0b5b230..a8e1371 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -251,13 +251,11 @@ static void ssi_aead_complete(struct device *dev, void
*ssi_req, void __iomem *c
}
} else { /*ENCRYPT*/
if (unlikely(areq_ctx->is_icv_fragmented)) {
+ u32 skip = areq->cryptlen + areq_ctx->dst_offset;
+
cc_copy_sg_portion(dev, areq_ctx->mac_buf,
- areq_ctx->dst_sgl,
- (areq->cryptlen +
- areq_ctx->dst_offset),
- (areq->cryptlen +
- areq_ctx->dst_offset +
- ctx->authsize),
+ areq_ctx->dst_sgl, skip,
+ (skip + ctx->authsize),
SSI_SG_FROM_BUF);
}
--
2.7.4
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[PATCH v2 07/10] staging: ccree: remove unneeded cast
Remove unneeded cast of the return value of dev_get_drvdata()
to struct ssi_drvdata * for better readability.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_pm.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index d60143c..d3e9382 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -36,8 +36,7 @@
int cc_pm_suspend(struct device *dev)
{
- struct ssi_drvdata *drvdata =
- (struct ssi_drvdata *)dev_get_drvdata(dev);
+ struct ssi_drvdata *drvdata = dev_get_drvdata(dev);
int rc;
dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
@@ -56,8 +55,7 @@ int cc_pm_suspend(struct device *dev)
int cc_pm_resume(struct device *dev)
{
int rc;
- struct ssi_drvdata *drvdata =
- (struct ssi_drvdata *)dev_get_drvdata(dev);
+ struct ssi_drvdata *drvdata = dev_get_drvdata(dev);
dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE);
@@ -90,8 +88,7 @@ int cc_pm_resume(struct device *dev)
int cc_pm_get(struct device *dev)
{
int rc = 0;
- struct ssi_drvdata *drvdata =
- (struct ssi_drvdata *)dev_get_drvdata(dev);
+ struct ssi_drvdata *drvdata = dev_get_drvdata(dev);
if (cc_req_queue_suspended(drvdata))
rc = pm_runtime_get_sync(dev);
@@ -104,8 +101,7 @@ int cc_pm_get(struct device *dev)
int cc_pm_put_suspend(struct device *dev)
{
int rc = 0;
- struct ssi_drvdata *drvdata =
- (struct ssi_drvdata *)dev_get_drvdata(dev);
+ struct ssi_drvdata *drvdata = dev_get_drvdata(dev);
if (!cc_req_queue_suspended(drvdata)) {
pm_runtime_mark_last_busy(dev);
--
2.7.4
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[PATCH v2 00/10] staging: ccree: fixes and cleanups
This is another batch of ccree fixes & cleanups. The first patch is a bug fix. All others are pure readability and coding style fixes. Changes from v1: - Fix several coding style issues pointed out by Dan Carpenter. - Added two more patches of similar issues that surfaced during the review. Gilad Ben-Yossef (10): staging: ccree: fix leak of import() after init() staging: ccree: make long func call sites readable staging: ccree: simplify AEAD using local var staging: ccree: simplify buf mgr using local vars staging: ccree: fold common code into function staging: ccree: simplify pm manager using local var staging: ccree: remove unneeded cast staging: ccree: remove compare to none zero staging: ccree: remove braces for single statement staging: ccree: remove unused cc_base parameter drivers/staging/ccree/ssi_aead.c| 60 ++-- drivers/staging/ccree/ssi_buffer_mgr.c | 553 ++-- drivers/staging/ccree/ssi_buffer_mgr.h | 49 ++- drivers/staging/ccree/ssi_cipher.c | 39 ++- drivers/staging/ccree/ssi_driver.c | 51 ++- drivers/staging/ccree/ssi_driver.h | 2 +- drivers/staging/ccree/ssi_hash.c| 201 ++-- drivers/staging/ccree/ssi_ivgen.c | 4 +- drivers/staging/ccree/ssi_pm.c | 46 ++- drivers/staging/ccree/ssi_pm.h | 12 +- drivers/staging/ccree/ssi_request_mgr.c | 29 +- drivers/staging/ccree/ssi_request_mgr.h | 6 +- drivers/staging/ccree/ssi_sram_mgr.c| 13 +- drivers/staging/ccree/ssi_sram_mgr.h| 6 +- 14 files changed, 502 insertions(+), 569 deletions(-) -- 2.7.4 ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH v2 10/10] staging: ccree: remove unused cc_base parameter
Remove a common parameter named cc_base with the pointer
to the mapped command registers which was used by the
old register access macros that are not longer in use.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_aead.c| 2 +-
drivers/staging/ccree/ssi_cipher.c | 12 +---
drivers/staging/ccree/ssi_driver.c | 3 ---
drivers/staging/ccree/ssi_driver.h | 2 +-
drivers/staging/ccree/ssi_hash.c| 6 +++---
drivers/staging/ccree/ssi_request_mgr.c | 5 ++---
6 files changed, 12 insertions(+), 18 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index e036168..9e24783 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -225,7 +225,7 @@ static int ssi_aead_init(struct crypto_aead *tfm)
return -ENOMEM;
}
-static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem
*cc_base)
+static void ssi_aead_complete(struct device *dev, void *ssi_req)
{
struct aead_request *areq = (struct aead_request *)ssi_req;
struct aead_req_ctx *areq_ctx = aead_request_ctx(areq);
diff --git a/drivers/staging/ccree/ssi_cipher.c
b/drivers/staging/ccree/ssi_cipher.c
index 4d05b4a..b5bb97c 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -67,7 +67,7 @@ struct ssi_ablkcipher_ctx {
struct crypto_shash *shash_tfm;
};
-static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req, void
__iomem *cc_base);
+static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req);
static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size)
{
@@ -688,8 +688,7 @@ static int ssi_blkcipher_complete(struct device *dev,
struct scatterlist *dst,
struct scatterlist *src,
unsigned int ivsize,
- void *areq,
- void __iomem *cc_base)
+ void *areq)
{
int completion_error = 0;
struct ablkcipher_request *req = (struct ablkcipher_request *)areq;
@@ -832,8 +831,7 @@ static int ssi_blkcipher_process(
dst);
} else {
rc = ssi_blkcipher_complete(dev, ctx_p, req_ctx, dst,
- src, ivsize, NULL,
- ctx_p->drvdata->cc_base);
+ src, ivsize, NULL);
}
}
@@ -849,7 +847,7 @@ static int ssi_blkcipher_process(
return rc;
}
-static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req, void
__iomem *cc_base)
+static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req)
{
struct ablkcipher_request *areq = (struct ablkcipher_request *)ssi_req;
struct blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(areq);
@@ -858,7 +856,7 @@ static void ssi_ablkcipher_complete(struct device *dev,
void *ssi_req, void __io
unsigned int ivsize = crypto_ablkcipher_ivsize(tfm);
ssi_blkcipher_complete(dev, ctx_p, req_ctx, areq->dst, areq->src,
- ivsize, areq, cc_base);
+ ivsize, areq);
}
/* Async wrap functions */
diff --git a/drivers/staging/ccree/ssi_driver.c
b/drivers/staging/ccree/ssi_driver.c
index 7b77f3f..0d5c1a9 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -199,7 +199,6 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
static int init_cc_resources(struct platform_device *plat_dev)
{
struct resource *req_mem_cc_regs = NULL;
- void __iomem *cc_base = NULL;
struct ssi_drvdata *new_drvdata;
struct device *dev = &plat_dev->dev;
struct device_node *np = dev->of_node;
@@ -232,8 +231,6 @@ static int init_cc_resources(struct platform_device
*plat_dev)
dev_dbg(dev, "CC registers mapped from %pa to 0x%p\n",
&req_mem_cc_regs->start, new_drvdata->cc_base);
- cc_base = new_drvdata->cc_base;
-
/* Then IRQ */
new_drvdata->irq = platform_get_irq(plat_dev, 0);
if (new_drvdata->irq < 0) {
diff --git a/drivers/staging/ccree/ssi_driver.h
b/drivers/staging/ccree/ssi_driver.h
index 94c755c..f4967ca 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -100,7 +100,7 @@
#define SSI_MAX_IVGEN_DMA_ADDRESSES3
struct ssi_crypto_req {
- void (*user_cb)(struct device *dev, void *req, void __iomem *cc_base);
+ void (*user_cb)(struct device *dev, void *req);
void *user_arg;
dma_addr_t ivgen_dma_addr[SSI_MAX_IVGEN_DMA_ADDRESSES];
/* For the first 'ivgen_dma_addr_len' addresses of this array,
diff --git a/drivers/staging/ccree/ssi_ha
[PATCH v2 04/10] staging: ccree: simplify buf mgr using local vars
Make the code more readable by using a local variables
for commonly use expressions in the buffer manager part
of the driver.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_buffer_mgr.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 2d971f2..b3ca249 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -225,16 +225,18 @@ static int cc_generate_mlli(
mlli_p = (u32 *)mlli_params->mlli_virt_addr;
/* go over all SG's and link it to one MLLI table */
for (i = 0; i < sg_data->num_of_buffers; i++) {
+ union buffer_array_entry *entry = &sg_data->entry[i];
+ u32 tot_len = sg_data->total_data_len[i];
+ u32 offset = sg_data->offset[i];
+
if (sg_data->type[i] == DMA_SGL_TYPE)
- rc = cc_render_sg_to_mlli(dev, sg_data->entry[i].sgl,
- sg_data->total_data_len[i],
- sg_data->offset[i],
- &total_nents, &mlli_p);
+ rc = cc_render_sg_to_mlli(dev, entry->sgl, tot_len,
+ offset, &total_nents,
+ &mlli_p);
else /*DMA_BUFF_TYPE*/
- rc = cc_render_buff_to_mlli(dev,
-
sg_data->entry[i].buffer_dma,
- sg_data->total_data_len[i],
- &total_nents, &mlli_p);
+ rc = cc_render_buff_to_mlli(dev, entry->buffer_dma,
+ tot_len, &total_nents,
+ &mlli_p);
if (rc != 0)
return rc;
--
2.7.4
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[PATCH v2 09/10] staging: ccree: remove braces for single statement
Remove necessary braces for single statement blocks to
improve code readabilty.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_buffer_mgr.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 29ef046..bfabb5b 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -1491,9 +1491,8 @@ int cc_map_hash_request_final(struct ssi_drvdata
*drvdata, void *ctx,
/* add the src data to the sg_data */
cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes,
0, true, &areq_ctx->mlli_nents);
- if (unlikely(cc_generate_mlli(dev, &sg_data, mlli_params))) {
+ if (unlikely(cc_generate_mlli(dev, &sg_data, mlli_params)))
goto fail_unmap_din;
- }
}
/* change the buffer index for the unmap function */
areq_ctx->buff_index = (areq_ctx->buff_index ^ 1);
@@ -1610,9 +1609,8 @@ int cc_map_hash_request_update(struct ssi_drvdata
*drvdata, void *ctx,
cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src,
(update_data_len - *curr_buff_cnt), 0, true,
&areq_ctx->mlli_nents);
- if (unlikely(cc_generate_mlli(dev, &sg_data, mlli_params))) {
+ if (unlikely(cc_generate_mlli(dev, &sg_data, mlli_params)))
goto fail_unmap_din;
- }
}
areq_ctx->buff_index = (areq_ctx->buff_index ^ swap_index);
--
2.7.4
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[PATCH v2 06/10] staging: ccree: simplify pm manager using local var
Make the code more readable by using a local variable.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_pm.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index e1bc4c5..d60143c 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -90,20 +90,24 @@ int cc_pm_resume(struct device *dev)
int cc_pm_get(struct device *dev)
{
int rc = 0;
+ struct ssi_drvdata *drvdata =
+ (struct ssi_drvdata *)dev_get_drvdata(dev);
- if (cc_req_queue_suspended((struct ssi_drvdata *)dev_get_drvdata(dev)))
{
+ if (cc_req_queue_suspended(drvdata))
rc = pm_runtime_get_sync(dev);
- } else {
+ else
pm_runtime_get_noresume(dev);
- }
+
return rc;
}
int cc_pm_put_suspend(struct device *dev)
{
int rc = 0;
+ struct ssi_drvdata *drvdata =
+ (struct ssi_drvdata *)dev_get_drvdata(dev);
- if (!cc_req_queue_suspended((struct ssi_drvdata
*)dev_get_drvdata(dev))) {
+ if (!cc_req_queue_suspended(drvdata)) {
pm_runtime_mark_last_busy(dev);
rc = pm_runtime_put_autosuspend(dev);
} else {
--
2.7.4
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[PATCH v2 08/10] staging: ccree: remove compare to none zero
The driver was full of code checking "if (x != 0)".
Replace by "if (x)" for better readability.
Signed-off-by: Gilad Ben-Yossef
---
drivers/staging/ccree/ssi_aead.c| 28 +--
drivers/staging/ccree/ssi_buffer_mgr.c | 74 ++---
drivers/staging/ccree/ssi_cipher.c | 14 +++---
drivers/staging/ccree/ssi_driver.c | 34 +++---
drivers/staging/ccree/ssi_hash.c| 82 -
drivers/staging/ccree/ssi_ivgen.c | 2 +-
drivers/staging/ccree/ssi_pm.c | 8 ++--
drivers/staging/ccree/ssi_request_mgr.c | 12 ++---
drivers/staging/ccree/ssi_sram_mgr.c| 2 +-
9 files changed, 128 insertions(+), 128 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index a8e1371..e036168 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -539,10 +539,10 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8
*key, unsigned int keyl
}
rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0);
- if (unlikely(rc != 0))
+ if (unlikely(rc))
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
- if (likely(key_dma_addr != 0))
+ if (likely(key_dma_addr))
dma_unmap_single(dev, key_dma_addr, keylen, DMA_TO_DEVICE);
return rc;
@@ -598,7 +598,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen)
}
rc = validate_keys_sizes(ctx);
- if (unlikely(rc != 0))
+ if (unlikely(rc))
goto badkey;
/* STAT_PHASE_1: Copy key to ctx */
@@ -611,7 +611,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen)
memcpy(ctx->auth_state.xcbc.xcbc_keys, key, ctx->auth_keylen);
} else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC */
rc = ssi_get_plain_hmac_key(tfm, key, ctx->auth_keylen);
- if (rc != 0)
+ if (rc)
goto badkey;
}
@@ -637,7 +637,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen)
if (seq_len > 0) { /* For CCM there is no sequence to setup the key */
rc = send_request(ctx->drvdata, &ssi_req, desc, seq_len, 0);
- if (unlikely(rc != 0)) {
+ if (unlikely(rc)) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
goto setkey_error;
}
@@ -1520,7 +1520,7 @@ static inline int ssi_aead_ccm(
}
/* process the cipher */
- if (req_ctx->cryptlen != 0)
+ if (req_ctx->cryptlen)
ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc,
&idx);
/* Read temporal MAC */
@@ -1602,7 +1602,7 @@ static int config_ccm_adata(struct aead_request *req)
*b0 |= 64; /* Enable bit 6 if Adata exists. */
rc = set_msg_len(b0 + 16 - l, cryptlen, l); /* Write L'. */
- if (rc != 0) {
+ if (rc) {
dev_err(dev, "message len overflow detected");
return rc;
}
@@ -1739,7 +1739,7 @@ static inline void ssi_aead_gcm_setup_gctr_desc(
set_flow_mode(&desc[idx], S_DIN_to_AES);
idx++;
- if ((req_ctx->cryptlen != 0) &&
(!req_ctx->plaintext_authenticate_only)) {
+ if (req_ctx->cryptlen && !req_ctx->plaintext_authenticate_only) {
/* load AES/CTR initial CTR value inc by 2*/
hw_desc_init(&desc[idx]);
set_cipher_mode(&desc[idx], DRV_CIPHER_GCTR);
@@ -1854,7 +1854,7 @@ static inline int ssi_aead_gcm(
ssi_aead_create_assoc_desc(req, DIN_HASH, desc, seq_size);
ssi_aead_gcm_setup_gctr_desc(req, desc, seq_size);
/* process(gctr+ghash) */
- if (req_ctx->cryptlen != 0)
+ if (req_ctx->cryptlen)
ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc,
seq_size);
ssi_aead_process_gcm_result_desc(req, desc, seq_size);
@@ -1984,7 +1984,7 @@ static int ssi_aead_process(struct aead_request *req,
enum drv_crypto_direction
/* STAT_PHASE_0: Init and sanity checks */
/* Check data length according to mode */
- if (unlikely(validate_data_size(ctx, direct, req) != 0)) {
+ if (unlikely(validate_data_size(ctx, direct, req))) {
dev_err(dev, "Unsupported crypt/assoc len %d/%d.\n",
req->cryptlen, req->assoclen);
crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_BLOCK_LEN);
@@ -2031,7 +2031,7 @@ static int ssi_aead_process(struct aead_request *req,
enum drv_crypto_direction
#if SSI_CC_HAS_AES_CCM
if (ctx->cipher_mode == DRV_CIPHER_CCM) {
rc = config_ccm_adata(req);
- if (unlikely(rc != 0)) {
+ if (unlikely(rc)) {
dev_dbg(dev, "config_ccm_adata() returned wit
Re: [PATCH] staging: ccree: remove unused pointer cc_base
Hi Colin, Thank you very much for your patch. On Thu, Nov 9, 2017 at 10:13 AM, Colin King wrote: > From: Colin Ian King > > Pointer cc_base is being assigned but is never read, hence it is > redundant and can be removed. Cleans up clang warning: > > drivers/staging/ccree/ssi_driver.c:235:2: warning: Value stored to > 'cc_base' is never read > > Signed-off-by: Colin Ian King > --- > drivers/staging/ccree/ssi_driver.c | 3 --- > 1 file changed, 3 deletions(-) Your patch is perfectly fine but I just happened to send a patch series that includes this fix but also deals with other occurrences of the same now no-longer needed cc_base variable just a second ago before checking my email... Sorry about that and thanks again. Gilad -- Gilad Ben-Yossef Chief Coffee Drinker "If you take a class in large-scale robotics, can you end up in a situation where the homework eats your dog?" -- Jean-Baptiste Queru ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH] staging: lustre: Replaces 'uint32_t' with '__u32' and 'uint64_t' with '__u64'.
On Nov 3, 2017, at 06:36, Roman Storozhenko wrote: > > On Fri, Nov 03, 2017 at 12:46:18PM +0100, Greg Kroah-Hartman wrote: >> On Sun, Oct 29, 2017 at 08:58:39PM +0300, Roman Storozhenko wrote: >>> There are two reasons for that: >>> 1) As Linus Torvalds said we should use kernel types: >>> http://lkml.iu.edu/hypermail//linux/kernel/1506.0/00160.html >>> >>> 2) There are only few places in the lustre codebase that use such types. >>> In the most cases it uses '__u32' and '__u64'. >> >>> drivers/staging/lustre/lustre/include/lustre_sec.h | 4 ++-- >>> drivers/staging/lustre/lustre/llite/vvp_dev.c | 2 +- >>> drivers/staging/lustre/lustre/lov/lov_internal.h | 12 ++-- >>> drivers/staging/lustre/lustre/osc/osc_internal.h | 6 +++--- >>> 4 files changed, 12 insertions(+), 12 deletions(-) >> >> The __ types are only needed for when you cross the user/kernel boundry. >> Otherwise just use the "normal" types of u32 and u64. >> >> Do the changes you made here all cross that boundry? If not, please fix >> this up. > > Thanks, Greg. > > I have checked lustre repository and it seems that changed ".h" files aren't > used in client code. But I realise that I could be mistaken. That why I want > to ask lustre guys: am I right? Sorry for not getting back to you sooner, I was traveling. I'm not sure what you mean by the .h files aren't used in client code? I checked all of the headers, and all of the structures that were changed, and they all looked to be in use. Cheers, Andreas -- Andreas Dilger Lustre Principal Architect Intel Corporation ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH] staging: lustre: Replaces 'uint32_t' with '__u32' and 'uint64_t' with '__u64'.
On Thu, Nov 9, 2017 at 1:06 PM, Dilger, Andreas wrote: > On Nov 3, 2017, at 06:36, Roman Storozhenko wrote: >> >> On Fri, Nov 03, 2017 at 12:46:18PM +0100, Greg Kroah-Hartman wrote: >>> On Sun, Oct 29, 2017 at 08:58:39PM +0300, Roman Storozhenko wrote: There are two reasons for that: 1) As Linus Torvalds said we should use kernel types: http://lkml.iu.edu/hypermail//linux/kernel/1506.0/00160.html 2) There are only few places in the lustre codebase that use such types. In the most cases it uses '__u32' and '__u64'. >>> drivers/staging/lustre/lustre/include/lustre_sec.h | 4 ++-- drivers/staging/lustre/lustre/llite/vvp_dev.c | 2 +- drivers/staging/lustre/lustre/lov/lov_internal.h | 12 ++-- drivers/staging/lustre/lustre/osc/osc_internal.h | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) >>> >>> The __ types are only needed for when you cross the user/kernel boundry. >>> Otherwise just use the "normal" types of u32 and u64. >>> >>> Do the changes you made here all cross that boundry? If not, please fix >>> this up. >> >> Thanks, Greg. >> >> I have checked lustre repository and it seems that changed ".h" files aren't >> used in client code. But I realise that I could be mistaken. That why I want >> to ask lustre guys: am I right? > > Sorry for not getting back to you sooner, I was traveling. > > I'm not sure what you mean by the .h files aren't used in client code? > I checked all of the headers, and all of the structures that were changed, > and they all looked to be in use. Thanks, Andreas. But let me clarify: did you mean that those structures are being used in userspace code and this patch could be accepted? Or those structures are being used only in the kernel code and I should change it according to Greg's remark? Kind regards, Roman > > Cheers, Andreas > -- > Andreas Dilger > Lustre Principal Architect > Intel Corporation > > > > > > > -- Kind regards, Roman ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH 6/8] staging: ccree: simplify pm manager using local var
On Thu, Nov 09, 2017 at 08:27:28AM +0200, Gilad Ben-Yossef wrote:
> On Tue, Nov 7, 2017 at 12:43 PM, Dan Carpenter
> wrote:
> > On Tue, Nov 07, 2017 at 09:40:02AM +, Gilad Ben-Yossef wrote:
> >> --- a/drivers/staging/ccree/ssi_pm.c
> >> +++ b/drivers/staging/ccree/ssi_pm.c
> >> @@ -90,20 +90,24 @@ int cc_pm_resume(struct device *dev)
> >> int cc_pm_get(struct device *dev)
> >> {
> >> int rc = 0;
> >> + struct ssi_drvdata *drvdata =
> >> + (struct ssi_drvdata *)dev_get_drvdata(dev);
> >
> > No need to cast:
> >
> > struct ssi_drvdata *drvdata = dev_get_drvdata(dev);
> >
>
> The same unneeded cast appears at other places in the file, so I opted
> to add a patch addressing all these location rather then change this one.
>
> I hope it's OK.
I don't care about this one patch, it's fine. But generally and for
future reference, we don't try very hard to use a consistent style
within a driver. The preference is almost always kernel style over
driver style so new code should always be "kernel style" where
we avoid casting from kmalloc() or other functions that return void
pointers.
regards,
dan carpenter
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Re: [PATCH v2 00/10] staging: ccree: fixes and cleanups
Reviewed-by: Dan Carpenter regards, dan carpenter ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH v2 1/5] x86: merge x86_hyper into x86_platform and x86_init
Instead of x86_hyper being either NULL on bare metal or a pointer to a
struct hypervisor_x86 in case of the kernel running as a guest merge
the struct into x86_platform and x86_init.
This will remove the need for wrappers making it hard to find out what
is being called. With dummy functions added for all callbacks testing
for a NULL function pointer can be removed, too.
Cc: k...@microsoft.com
Cc: haiya...@microsoft.com
Cc: sthem...@microsoft.com
Cc: akata...@vmware.com
Cc: pbonz...@redhat.com
Cc: rkrc...@redhat.com
Cc: boris.ostrov...@oracle.com
Cc: ru...@rustcorp.com.au
Cc: de...@linuxdriverproject.org
Cc: virtualizat...@lists.linux-foundation.org
Cc: k...@vger.kernel.org
Cc: xen-de...@lists.xenproject.org
Suggested-by: Ingo Molnar
Signed-off-by: Juergen Gross
---
arch/x86/include/asm/hypervisor.h | 25 --
arch/x86/include/asm/x86_init.h | 24 +
arch/x86/kernel/apic/apic.c | 2 +-
arch/x86/kernel/cpu/hypervisor.c | 54 +++
arch/x86/kernel/cpu/mshyperv.c| 2 +-
arch/x86/kernel/cpu/vmware.c | 4 +--
arch/x86/kernel/kvm.c | 2 +-
arch/x86/kernel/x86_init.c| 9 +++
arch/x86/mm/init.c| 2 +-
arch/x86/xen/enlighten_hvm.c | 8 +++---
arch/x86/xen/enlighten_pv.c | 2 +-
include/linux/hypervisor.h| 8 --
12 files changed, 81 insertions(+), 61 deletions(-)
diff --git a/arch/x86/include/asm/hypervisor.h
b/arch/x86/include/asm/hypervisor.h
index 0ead9dbb9130..0eca7239a7aa 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -23,6 +23,7 @@
#ifdef CONFIG_HYPERVISOR_GUEST
#include
+#include
#include
/*
@@ -35,17 +36,11 @@ struct hypervisor_x86 {
/* Detection routine */
uint32_t(*detect)(void);
- /* Platform setup (run once per boot) */
- void(*init_platform)(void);
+ /* init time callbacks */
+ struct x86_hyper_init init;
- /* X2APIC detection (run once per boot) */
- bool(*x2apic_available)(void);
-
- /* pin current vcpu to specified physical cpu (run rarely) */
- void(*pin_vcpu)(int);
-
- /* called during init_mem_mapping() to setup early mappings. */
- void(*init_mem_mapping)(void);
+ /* runtime callbacks */
+ struct x86_hyper_runtime runtime;
};
extern const struct hypervisor_x86 *x86_hyper;
@@ -58,17 +53,7 @@ extern const struct hypervisor_x86 x86_hyper_xen_hvm;
extern const struct hypervisor_x86 x86_hyper_kvm;
extern void init_hypervisor_platform(void);
-extern bool hypervisor_x2apic_available(void);
-extern void hypervisor_pin_vcpu(int cpu);
-
-static inline void hypervisor_init_mem_mapping(void)
-{
- if (x86_hyper && x86_hyper->init_mem_mapping)
- x86_hyper->init_mem_mapping();
-}
#else
static inline void init_hypervisor_platform(void) { }
-static inline bool hypervisor_x2apic_available(void) { return false; }
-static inline void hypervisor_init_mem_mapping(void) { }
#endif /* CONFIG_HYPERVISOR_GUEST */
#endif /* _ASM_X86_HYPERVISOR_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 8a1ebf9540dd..ad15a0fda917 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -115,6 +115,18 @@ struct x86_init_pci {
};
/**
+ * struct x86_hyper_init - x86 hypervisor init functions
+ * @init_platform: platform setup
+ * @x2apic_available: X2APIC detection
+ * @init_mem_mapping: setup early mappings during init_mem_mapping()
+ */
+struct x86_hyper_init {
+ void (*init_platform)(void);
+ bool (*x2apic_available)(void);
+ void (*init_mem_mapping)(void);
+};
+
+/**
* struct x86_init_ops - functions for platform specific setup
*
*/
@@ -127,6 +139,7 @@ struct x86_init_ops {
struct x86_init_timers timers;
struct x86_init_iommu iommu;
struct x86_init_pci pci;
+ struct x86_hyper_init hyper;
};
/**
@@ -200,6 +213,15 @@ struct x86_legacy_features {
};
/**
+ * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
+ *
+ * @pin_vcpu: pin current vcpu to specified physical cpu (run rarely)
+ */
+struct x86_hyper_runtime {
+ void (*pin_vcpu)(int cpu);
+};
+
+/**
* struct x86_platform_ops - platform specific runtime functions
* @calibrate_cpu: calibrate CPU
* @calibrate_tsc: calibrate TSC, if different from CPU
@@ -218,6 +240,7 @@ struct x86_legacy_features {
* possible in x86_early_init_platform_quirks() by
* only using the current x86_hardware_subarch
* semantics.
+ * @hyper: x86 hypervisor specific runtime callbacks
*/
struct x86_platform_ops {
unsigned long (*calibrate_cpu)
[PATCH v2 0/5] x86/xen: support booting PVH guest via standard boot path
Booting a Xen PVH guest requires a special boot entry as it is mandatory to setup some Xen-specific interfaces rather early. When grub or OVMF are used as boot loaders, however, those will fill the boot parameters in zeropage and there is no longer a need to do something PVH specific in the early boot path. This patch series adds support for that scenario by identifying PVH environment and doing the required init steps via Xen hooks instead of using a dedicated boot entry. The dedicated entry is still mandatory for support of Dom0 running in PVH mode as in this case there is no grub or OVMF involved for filling in the boot parameters. Changes in V2: - added new patches 1 and 2 Cc: k...@microsoft.com Cc: haiya...@microsoft.com Cc: sthem...@microsoft.com Cc: akata...@vmware.com Cc: pbonz...@redhat.com Cc: rkrc...@redhat.com Cc: boris.ostrov...@oracle.com Cc: ru...@rustcorp.com.au Cc: de...@linuxdriverproject.org Cc: virtualizat...@lists.linux-foundation.org Cc: k...@vger.kernel.org Cc: xen-de...@lists.xenproject.org Cc: linux-graphics-maintai...@vmware.com Cc: pv-driv...@vmware.com Cc: dmitry.torok...@gmail.com Cc: xdeguill...@vmware.com Cc: moltm...@vmware.com Cc: a...@arndb.de Cc: gre...@linuxfoundation.org Cc: linux-in...@vger.kernel.org Cc: r...@rjwysocki.net Cc: len.br...@intel.com Cc: pa...@ucw.cz Cc: linux...@vger.kernel.org Juergen Gross (5): x86: merge x86_hyper into x86_platform and x86_init x86: add enum for hypervisors to replace x86_hyper x86/acpi: add test for ACPI_FADT_NO_VGA x86: add guest_late_init hook to hypervisor_x86 structure x86/xen: use guest_late_init to detect Xen PVH guest arch/x86/hyperv/hv_init.c | 2 +- arch/x86/include/asm/hypervisor.h | 46 +++- arch/x86/include/asm/kvm_para.h | 2 -- arch/x86/include/asm/x86_init.h | 27 + arch/x86/kernel/acpi/boot.c | 5 +++ arch/x86/kernel/apic/apic.c | 2 +- arch/x86/kernel/cpu/hypervisor.c | 64 +-- arch/x86/kernel/cpu/mshyperv.c| 6 ++-- arch/x86/kernel/cpu/vmware.c | 8 ++--- arch/x86/kernel/kvm.c | 9 +++--- arch/x86/kernel/setup.c | 2 +- arch/x86/kernel/x86_init.c| 10 ++ arch/x86/mm/init.c| 2 +- arch/x86/xen/enlighten_hvm.c | 36 +- arch/x86/xen/enlighten_pv.c | 6 ++-- arch/x86/xen/enlighten_pvh.c | 9 -- drivers/hv/vmbus_drv.c| 2 +- drivers/input/mouse/vmmouse.c | 10 +++--- drivers/misc/vmw_balloon.c| 2 +- include/linux/hypervisor.h| 8 +++-- 20 files changed, 153 insertions(+), 105 deletions(-) -- 2.12.3 ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH v2 2/5] x86: add enum for hypervisors to replace x86_hyper
The x86_hyper pointer is only used for checking whether a virtual
device is supporting the hypervisor the system is running on.
Use an enum for that purpose instead and drop the x86_hyper pointer.
Cc: k...@microsoft.com
Cc: haiya...@microsoft.com
Cc: sthem...@microsoft.com
Cc: akata...@vmware.com
Cc: pbonz...@redhat.com
Cc: rkrc...@redhat.com
Cc: boris.ostrov...@oracle.com
Cc: de...@linuxdriverproject.org
Cc: virtualizat...@lists.linux-foundation.org
Cc: k...@vger.kernel.org
Cc: xen-de...@lists.xenproject.org
Cc: linux-graphics-maintai...@vmware.com
Cc: pv-driv...@vmware.com
Cc: dmitry.torok...@gmail.com
Cc: xdeguill...@vmware.com
Cc: moltm...@vmware.com
Cc: a...@arndb.de
Cc: gre...@linuxfoundation.org
Cc: linux-in...@vger.kernel.org
Signed-off-by: Juergen Gross
---
arch/x86/hyperv/hv_init.c | 2 +-
arch/x86/include/asm/hypervisor.h | 23 ++-
arch/x86/kernel/cpu/hypervisor.c | 12 +---
arch/x86/kernel/cpu/mshyperv.c| 4 ++--
arch/x86/kernel/cpu/vmware.c | 4 ++--
arch/x86/kernel/kvm.c | 4 ++--
arch/x86/xen/enlighten_hvm.c | 4 ++--
arch/x86/xen/enlighten_pv.c | 4 ++--
drivers/hv/vmbus_drv.c| 2 +-
drivers/input/mouse/vmmouse.c | 10 --
drivers/misc/vmw_balloon.c| 2 +-
11 files changed, 40 insertions(+), 31 deletions(-)
diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index a5db63f728a2..a0b86cf486e0 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -113,7 +113,7 @@ void hyperv_init(void)
u64 guest_id;
union hv_x64_msr_hypercall_contents hypercall_msr;
- if (x86_hyper != &x86_hyper_ms_hyperv)
+ if (x86_hyper_type != X86_HYPER_MS_HYPERV)
return;
/* Allocate percpu VP index */
diff --git a/arch/x86/include/asm/hypervisor.h
b/arch/x86/include/asm/hypervisor.h
index 0eca7239a7aa..1b0a5abcd8ae 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -29,6 +29,16 @@
/*
* x86 hypervisor information
*/
+
+enum x86_hypervisor_type {
+ X86_HYPER_NATIVE = 0,
+ X86_HYPER_VMWARE,
+ X86_HYPER_MS_HYPERV,
+ X86_HYPER_XEN_PV,
+ X86_HYPER_XEN_HVM,
+ X86_HYPER_KVM,
+};
+
struct hypervisor_x86 {
/* Hypervisor name */
const char *name;
@@ -36,6 +46,9 @@ struct hypervisor_x86 {
/* Detection routine */
uint32_t(*detect)(void);
+ /* Hypervisor type */
+ enum x86_hypervisor_type type;
+
/* init time callbacks */
struct x86_hyper_init init;
@@ -43,15 +56,7 @@ struct hypervisor_x86 {
struct x86_hyper_runtime runtime;
};
-extern const struct hypervisor_x86 *x86_hyper;
-
-/* Recognized hypervisors */
-extern const struct hypervisor_x86 x86_hyper_vmware;
-extern const struct hypervisor_x86 x86_hyper_ms_hyperv;
-extern const struct hypervisor_x86 x86_hyper_xen_pv;
-extern const struct hypervisor_x86 x86_hyper_xen_hvm;
-extern const struct hypervisor_x86 x86_hyper_kvm;
-
+extern enum x86_hypervisor_type x86_hyper_type;
extern void init_hypervisor_platform(void);
#else
static inline void init_hypervisor_platform(void) { }
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 6c1bf092..bea8d3e24f50 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -26,6 +26,12 @@
#include
#include
+extern const struct hypervisor_x86 x86_hyper_vmware;
+extern const struct hypervisor_x86 x86_hyper_ms_hyperv;
+extern const struct hypervisor_x86 x86_hyper_xen_pv;
+extern const struct hypervisor_x86 x86_hyper_xen_hvm;
+extern const struct hypervisor_x86 x86_hyper_kvm;
+
static const __initconst struct hypervisor_x86 * const hypervisors[] =
{
#ifdef CONFIG_XEN_PV
@@ -41,8 +47,8 @@ static const __initconst struct hypervisor_x86 * const
hypervisors[] =
#endif
};
-const struct hypervisor_x86 *x86_hyper;
-EXPORT_SYMBOL(x86_hyper);
+enum x86_hypervisor_type x86_hyper_type;
+EXPORT_SYMBOL(x86_hyper_type);
static inline const struct hypervisor_x86 * __init
detect_hypervisor_vendor(void)
@@ -87,6 +93,6 @@ void __init init_hypervisor_platform(void)
copy_array(&h->init, &x86_init.hyper, sizeof(h->init));
copy_array(&h->runtime, &x86_platform.hyper, sizeof(h->runtime));
- x86_hyper = h;
+ x86_hyper_type = h->type;
x86_init.hyper.init_platform();
}
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 6bb84d655e4b..85eb5fc180c8 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -254,9 +254,9 @@ static void __init ms_hyperv_init_platform(void)
#endif
}
-const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
+const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
.name = "Microsoft Hyper-V",
.detect = ms_hyperv_platform,
+ .type
[PATCH] staging: pi433: fix missing break in switch statement.
From: Colin Ian King
The PI433_IOC_WR_RX_CFG case is missing a break and will fall through
to the default case and errorenously return -EINVAL. Fix this by
adding in missing break.
Detected by CoverityScan, CID#1461286 ("Missing break in switch")
Fixes: f81f0b5c9a30 ("pi433: sanitize ioctl")
Signed-off-by: Colin Ian King
---
drivers/staging/pi433/pi433_if.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi433_if.c
index 3bcb59811cdf..a960fe2e7875 100644
--- a/drivers/staging/pi433/pi433_if.c
+++ b/drivers/staging/pi433/pi433_if.c
@@ -811,6 +811,7 @@ pi433_ioctl(struct file *filp, unsigned int cmd, unsigned
long arg)
}
mutex_unlock(&device->rx_lock);
+ break;
default:
retval = -EINVAL;
}
--
2.14.1
___
devel mailing list
de...@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v2 2/5] x86: add enum for hypervisors to replace x86_hyper
Hello Juergen,
The changes to vmw_balloon.c looks good.
Acked-by: Xavier Deguillard
Xavier
On Thu, Nov 09, 2017 at 02:27:36PM +0100, Juergen Gross wrote:
> The x86_hyper pointer is only used for checking whether a virtual
> device is supporting the hypervisor the system is running on.
>
> Use an enum for that purpose instead and drop the x86_hyper pointer.
>
> Cc: k...@microsoft.com
> Cc: haiya...@microsoft.com
> Cc: sthem...@microsoft.com
> Cc: akata...@vmware.com
> Cc: pbonz...@redhat.com
> Cc: rkrc...@redhat.com
> Cc: boris.ostrov...@oracle.com
> Cc: de...@linuxdriverproject.org
> Cc: virtualizat...@lists.linux-foundation.org
> Cc: k...@vger.kernel.org
> Cc: xen-de...@lists.xenproject.org
> Cc: linux-graphics-maintai...@vmware.com
> Cc: pv-driv...@vmware.com
> Cc: dmitry.torok...@gmail.com
> Cc: xdeguill...@vmware.com
> Cc: moltm...@vmware.com
> Cc: a...@arndb.de
> Cc: gre...@linuxfoundation.org
> Cc: linux-in...@vger.kernel.org
>
> Signed-off-by: Juergen Gross
> ---
> arch/x86/hyperv/hv_init.c | 2 +-
> arch/x86/include/asm/hypervisor.h | 23 ++-
> arch/x86/kernel/cpu/hypervisor.c | 12 +---
> arch/x86/kernel/cpu/mshyperv.c| 4 ++--
> arch/x86/kernel/cpu/vmware.c | 4 ++--
> arch/x86/kernel/kvm.c | 4 ++--
> arch/x86/xen/enlighten_hvm.c | 4 ++--
> arch/x86/xen/enlighten_pv.c | 4 ++--
> drivers/hv/vmbus_drv.c| 2 +-
> drivers/input/mouse/vmmouse.c | 10 --
> drivers/misc/vmw_balloon.c| 2 +-
> 11 files changed, 40 insertions(+), 31 deletions(-)
>
> diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
> index a5db63f728a2..a0b86cf486e0 100644
> --- a/arch/x86/hyperv/hv_init.c
> +++ b/arch/x86/hyperv/hv_init.c
> @@ -113,7 +113,7 @@ void hyperv_init(void)
> u64 guest_id;
> union hv_x64_msr_hypercall_contents hypercall_msr;
>
> - if (x86_hyper != &x86_hyper_ms_hyperv)
> + if (x86_hyper_type != X86_HYPER_MS_HYPERV)
> return;
>
> /* Allocate percpu VP index */
> diff --git a/arch/x86/include/asm/hypervisor.h
> b/arch/x86/include/asm/hypervisor.h
> index 0eca7239a7aa..1b0a5abcd8ae 100644
> --- a/arch/x86/include/asm/hypervisor.h
> +++ b/arch/x86/include/asm/hypervisor.h
> @@ -29,6 +29,16 @@
> /*
> * x86 hypervisor information
> */
> +
> +enum x86_hypervisor_type {
> + X86_HYPER_NATIVE = 0,
> + X86_HYPER_VMWARE,
> + X86_HYPER_MS_HYPERV,
> + X86_HYPER_XEN_PV,
> + X86_HYPER_XEN_HVM,
> + X86_HYPER_KVM,
> +};
> +
> struct hypervisor_x86 {
> /* Hypervisor name */
> const char *name;
> @@ -36,6 +46,9 @@ struct hypervisor_x86 {
> /* Detection routine */
> uint32_t(*detect)(void);
>
> + /* Hypervisor type */
> + enum x86_hypervisor_type type;
> +
> /* init time callbacks */
> struct x86_hyper_init init;
>
> @@ -43,15 +56,7 @@ struct hypervisor_x86 {
> struct x86_hyper_runtime runtime;
> };
>
> -extern const struct hypervisor_x86 *x86_hyper;
> -
> -/* Recognized hypervisors */
> -extern const struct hypervisor_x86 x86_hyper_vmware;
> -extern const struct hypervisor_x86 x86_hyper_ms_hyperv;
> -extern const struct hypervisor_x86 x86_hyper_xen_pv;
> -extern const struct hypervisor_x86 x86_hyper_xen_hvm;
> -extern const struct hypervisor_x86 x86_hyper_kvm;
> -
> +extern enum x86_hypervisor_type x86_hyper_type;
> extern void init_hypervisor_platform(void);
> #else
> static inline void init_hypervisor_platform(void) { }
> diff --git a/arch/x86/kernel/cpu/hypervisor.c
> b/arch/x86/kernel/cpu/hypervisor.c
> index 6c1bf092..bea8d3e24f50 100644
> --- a/arch/x86/kernel/cpu/hypervisor.c
> +++ b/arch/x86/kernel/cpu/hypervisor.c
> @@ -26,6 +26,12 @@
> #include
> #include
>
> +extern const struct hypervisor_x86 x86_hyper_vmware;
> +extern const struct hypervisor_x86 x86_hyper_ms_hyperv;
> +extern const struct hypervisor_x86 x86_hyper_xen_pv;
> +extern const struct hypervisor_x86 x86_hyper_xen_hvm;
> +extern const struct hypervisor_x86 x86_hyper_kvm;
> +
> static const __initconst struct hypervisor_x86 * const hypervisors[] =
> {
> #ifdef CONFIG_XEN_PV
> @@ -41,8 +47,8 @@ static const __initconst struct hypervisor_x86 * const
> hypervisors[] =
> #endif
> };
>
> -const struct hypervisor_x86 *x86_hyper;
> -EXPORT_SYMBOL(x86_hyper);
> +enum x86_hypervisor_type x86_hyper_type;
> +EXPORT_SYMBOL(x86_hyper_type);
>
> static inline const struct hypervisor_x86 * __init
> detect_hypervisor_vendor(void)
> @@ -87,6 +93,6 @@ void __init init_hypervisor_platform(void)
> copy_array(&h->init, &x86_init.hyper, sizeof(h->init));
> copy_array(&h->runtime, &x86_platform.hyper, sizeof(h->runtime));
>
> - x86_hyper = h;
> + x86_hyper_type = h->type;
> x86_init.hyper.init_platform();
> }
> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index 6bb84d655e4b..85eb5fc180c8 100644
> --- a/arch/x86/kerne
Re: [PATCH 2/9] staging: wilc1000: add SPDX identifiers to all wilc100 files
On Tue, 7 Nov 2017 21:07:50 +0100 Greg Kroah-Hartman wrote: > It's good to have SPDX identifiers in all files to make it easier to > audit the kernel tree for correct licenses. > > Update the wilc100 driver files with the correct SPDX license identifier > based on the license text in the file itself. The SPDX identifier is a > legally binding shorthand, which can be used instead of the full boiler > plate text. > > This work is based on a script and data from Thomas Gleixner, Philippe > Ombredanne, and Kate Stewart. > > Cc: Aditya Shankar > Cc: Ganesh Krishna > Cc: Thomas Gleixner > Cc: Kate Stewart > Cc: Philippe Ombredanne > Signed-off-by: Greg Kroah-Hartman > --- > drivers/staging/wilc1000/linux_wlan.c | 1 + > drivers/staging/wilc1000/wilc_debugfs.c | 1 + > drivers/staging/wilc1000/wilc_sdio.c| 1 + > drivers/staging/wilc1000/wilc_spi.c | 1 + > drivers/staging/wilc1000/wilc_wlan.c| 1 + > 5 files changed, 5 insertions(+) > > diff --git a/drivers/staging/wilc1000/linux_wlan.c > b/drivers/staging/wilc1000/linux_wlan.c > index 119f3459b5bb..da1fe4390707 100644 > --- a/drivers/staging/wilc1000/linux_wlan.c > +++ b/drivers/staging/wilc1000/linux_wlan.c > @@ -1,3 +1,4 @@ > +// SPDX-License-Identifier: GPL-2.0 > #include "wilc_wfi_cfgoperations.h" > #include "wilc_wlan_if.h" > #include "wilc_wlan.h" > diff --git a/drivers/staging/wilc1000/wilc_debugfs.c > b/drivers/staging/wilc1000/wilc_debugfs.c > index ce54864569c7..0deb61a21b27 100644 > --- a/drivers/staging/wilc1000/wilc_debugfs.c > +++ b/drivers/staging/wilc1000/wilc_debugfs.c > @@ -1,3 +1,4 @@ > +// SPDX-License-Identifier: GPL-2.0 > /* > * NewportMedia WiFi chipset driver test tools - wilc-debug > * Copyright (c) 2012 NewportMedia Inc. > diff --git a/drivers/staging/wilc1000/wilc_sdio.c > b/drivers/staging/wilc1000/wilc_sdio.c > index 0189e3edbbbe..bd2b29b8b356 100644 > --- a/drivers/staging/wilc1000/wilc_sdio.c > +++ b/drivers/staging/wilc1000/wilc_sdio.c > @@ -1,3 +1,4 @@ > +// SPDX-License-Identifier: GPL-2.0 > /* > * Copyright (c) Atmel Corporation. All rights reserved. > * > diff --git a/drivers/staging/wilc1000/wilc_spi.c > b/drivers/staging/wilc1000/wilc_spi.c > index 5ef84410e0f2..ff2ba1057cdf 100644 > --- a/drivers/staging/wilc1000/wilc_spi.c > +++ b/drivers/staging/wilc1000/wilc_spi.c > @@ -1,3 +1,4 @@ > +// SPDX-License-Identifier: GPL-2.0 > /* > * Copyright (c) Atmel Corporation. All rights reserved. > * > diff --git a/drivers/staging/wilc1000/wilc_wlan.c > b/drivers/staging/wilc1000/wilc_wlan.c > index f49dfa82f1b8..999fd09ad1cd 100644 > --- a/drivers/staging/wilc1000/wilc_wlan.c > +++ b/drivers/staging/wilc1000/wilc_wlan.c > @@ -1,3 +1,4 @@ > +// SPDX-License-Identifier: GPL-2.0 > #include > #include "wilc_wlan_if.h" > #include "wilc_wlan.h" Acked-by: Aditya Shankar Thanks, -- adiTya ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v2 0/8] Cavium OCTEON-III network driver.
I need to send v3. With this v2 set, there is a small bug in the RX initialization that causes failure on little-endian kernels. David. On 11/08/2017 04:51 PM, David Daney wrote: We are adding the Cavium OCTEON-III network driver. But since interacting with the input and output queues is done via special CPU local memory, we also need to add support to the MIPS/Octeon architecture code. Aren't SoCs nice in this way? The first six patches add the SoC support needed by the driver, the last two add the driver and an entry in MAINTAINERS. Since these touch several subsystems (mips, staging, netdev), I would propose merging via netdev, but defer to the maintainers if they think something else would work better. A separate pull request was recently done by Steven Hill for the firmware required by the driver. Changes from v1: o Cleanup and use of standard bindings in the device tree bindings document. o Added (hopefully) clarifying comments about several OCTEON architectural peculiarities. o Removed unused testing code from the driver. o Removed some module parameters that already default to the proper values. o KConfig cleanup, including testing on x86_64, arm64 and mips. o Fixed breakage to the driver for previous generation of OCTEON SoCs (in the staging directory still). o Verified bisectability of the patch set. Carlos Munoz (5): dt-bindings: Add Cavium Octeon Common Ethernet Interface. MIPS: Octeon: Enable LMTDMA/LMTST operations. MIPS: Octeon: Add a global resource manager. MIPS: Octeon: Add Free Pointer Unit (FPA) support. netdev: octeon-ethernet: Add Cavium Octeon III support. David Daney (3): MIPS: Octeon: Automatically provision CVMSEG space. staging: octeon: Remove USE_ASYNC_IOBDMA macro. MAINTAINERS: Add entry for drivers/net/ethernet/cavium/octeon/octeon3-* .../devicetree/bindings/net/cavium-bgx.txt | 61 + MAINTAINERS|6 + arch/mips/cavium-octeon/Kconfig| 35 +- arch/mips/cavium-octeon/Makefile |4 +- arch/mips/cavium-octeon/octeon-fpa3.c | 364 arch/mips/cavium-octeon/resource-mgr.c | 371 arch/mips/cavium-octeon/setup.c| 22 +- .../asm/mach-cavium-octeon/kernel-entry-init.h | 20 +- arch/mips/include/asm/mipsregs.h |2 + arch/mips/include/asm/octeon/octeon.h | 47 +- arch/mips/include/asm/processor.h |2 +- arch/mips/kernel/octeon_switch.S |2 - arch/mips/mm/tlbex.c | 29 +- drivers/net/ethernet/cavium/Kconfig| 55 +- drivers/net/ethernet/cavium/octeon/Makefile|6 + .../net/ethernet/cavium/octeon/octeon3-bgx-nexus.c | 698 +++ .../net/ethernet/cavium/octeon/octeon3-bgx-port.c | 2028 +++ drivers/net/ethernet/cavium/octeon/octeon3-core.c | 2068 drivers/net/ethernet/cavium/octeon/octeon3-pki.c | 833 drivers/net/ethernet/cavium/octeon/octeon3-pko.c | 1719 drivers/net/ethernet/cavium/octeon/octeon3-sso.c | 309 +++ drivers/net/ethernet/cavium/octeon/octeon3.h | 411 drivers/staging/octeon/ethernet-defines.h |6 - drivers/staging/octeon/ethernet-rx.c | 25 +- drivers/staging/octeon/ethernet-tx.c | 85 +- 25 files changed, 9065 insertions(+), 143 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/cavium-bgx.txt create mode 100644 arch/mips/cavium-octeon/octeon-fpa3.c create mode 100644 arch/mips/cavium-octeon/resource-mgr.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-bgx-nexus.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-bgx-port.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-core.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-pki.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-pko.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-sso.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3.h ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH v3 1/8] dt-bindings: Add Cavium Octeon Common Ethernet Interface.
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/cavium-bgx.txt
diff --git a/Documentation/devicetree/bindings/net/cavium-bgx.txt
b/Documentation/devicetree/bindings/net/cavium-bgx.txt
new file mode 100644
index ..6b1f8b994c20
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/cavium-bgx.txt
@@ -0,0 +1,61 @@
+* Common Ethernet Interface (BGX) block
+
+Properties:
+
+- compatible: "cavium,octeon-7890-bgx": Compatibility with all cn7xxx SOCs.
+
+- reg: The base address of the BGX block.
+
+- #address-cells: Must be <1>.
+
+- #size-cells: Must be <0>. BGX addresses have no size component.
+
+A BGX block has several children, each representing an Ethernet
+interface.
+
+
+* Ethernet Interface (BGX port) connects to PKI/PKO
+
+Properties:
+
+- compatible: "cavium,octeon-7890-bgx-port": Compatibility with all
+ cn7xxx SOCs.
+
+ "cavium,octeon-7360-xcv": Compatibility with cn73xx SOCs
+ for RGMII.
+
+- reg: The index of the interface within the BGX block.
+
+Optional properties:
+
+- local-mac-address: Mac address for the interface.
+
+- phy-handle: phandle to the phy node connected to the interface.
+
+- phy-mode: described in ethernet.txt.
+
+- fixed-link: described in fixed-link.txt.
+
+Example:
+
+ ethernet-mac-nexus@11800e000 {
+ compatible = "cavium,octeon-7890-bgx";
+ reg = <0x00011800 0xe000 0x 0x0100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-mac@0 {
+ compatible = "cavium,octeon-7360-xcv";
+ reg = <0>;
+ local-mac-address = [ 00 01 23 45 67 89 ];
+ phy-handle = <&phy3>;
+ phy-mode = "rgmii-rxid"
+ };
+ ethernet-mac@1 {
+ compatible = "cavium,octeon-7890-bgx-port";
+ reg = <1>;
+ local-mac-address = [ 00 01 23 45 67 8a ];
+ phy-handle = <&phy4>;
+ phy-mode = "sgmii"
+ };
+ };
--
2.13.6
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[PATCH v3 0/8] Cavium OCTEON-III network driver.
We are adding the Cavium OCTEON-III network driver. But since interacting with the input and output queues is done via special CPU local memory, we also need to add support to the MIPS/Octeon architecture code. Aren't SoCs nice in this way? The first six patches add the SoC support needed by the driver, the last two add the driver and an entry in MAINTAINERS. Since these touch several subsystems (mips, staging, netdev), I would propose merging via netdev, but defer to the maintainers if they think something else would work better. A separate pull request was recently done by Steven Hill for the firmware required by the driver. Changes from v2: o Fix PKI (RX path) initialization to work with little endian kernel. Changes from v1: o Cleanup and use of standard bindings in the device tree bindings document. o Added (hopefully) clarifying comments about several OCTEON architectural peculiarities. o Removed unused testing code from the driver. o Removed some module parameters that already default to the proper values. o KConfig cleanup, including testing on x86_64, arm64 and mips. o Fixed breakage to the driver for previous generation of OCTEON SoCs (in the staging directory still). o Verified bisectability of the patch set. Carlos Munoz (5): dt-bindings: Add Cavium Octeon Common Ethernet Interface. MIPS: Octeon: Enable LMTDMA/LMTST operations. MIPS: Octeon: Add a global resource manager. MIPS: Octeon: Add Free Pointer Unit (FPA) support. netdev: octeon-ethernet: Add Cavium Octeon III support. David Daney (3): MIPS: Octeon: Automatically provision CVMSEG space. staging: octeon: Remove USE_ASYNC_IOBDMA macro. MAINTAINERS: Add entry for drivers/net/ethernet/cavium/octeon/octeon3-* .../devicetree/bindings/net/cavium-bgx.txt | 61 + MAINTAINERS|6 + arch/mips/cavium-octeon/Kconfig| 35 +- arch/mips/cavium-octeon/Makefile |4 +- arch/mips/cavium-octeon/octeon-fpa3.c | 364 arch/mips/cavium-octeon/resource-mgr.c | 371 arch/mips/cavium-octeon/setup.c| 22 +- .../asm/mach-cavium-octeon/kernel-entry-init.h | 20 +- arch/mips/include/asm/mipsregs.h |2 + arch/mips/include/asm/octeon/octeon.h | 47 +- arch/mips/include/asm/processor.h |2 +- arch/mips/kernel/octeon_switch.S |2 - arch/mips/mm/tlbex.c | 29 +- drivers/net/ethernet/cavium/Kconfig| 55 +- drivers/net/ethernet/cavium/octeon/Makefile|6 + .../net/ethernet/cavium/octeon/octeon3-bgx-nexus.c | 698 +++ .../net/ethernet/cavium/octeon/octeon3-bgx-port.c | 2028 +++ drivers/net/ethernet/cavium/octeon/octeon3-core.c | 2068 drivers/net/ethernet/cavium/octeon/octeon3-pki.c | 832 drivers/net/ethernet/cavium/octeon/octeon3-pko.c | 1719 drivers/net/ethernet/cavium/octeon/octeon3-sso.c | 309 +++ drivers/net/ethernet/cavium/octeon/octeon3.h | 411 drivers/staging/octeon/ethernet-defines.h |6 - drivers/staging/octeon/ethernet-rx.c | 25 +- drivers/staging/octeon/ethernet-tx.c | 85 +- 25 files changed, 9064 insertions(+), 143 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/cavium-bgx.txt create mode 100644 arch/mips/cavium-octeon/octeon-fpa3.c create mode 100644 arch/mips/cavium-octeon/resource-mgr.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-bgx-nexus.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-bgx-port.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-core.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-pki.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-pko.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3-sso.c create mode 100644 drivers/net/ethernet/cavium/octeon/octeon3.h -- 2.13.6 ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH v3 2/8] MIPS: Octeon: Enable LMTDMA/LMTST operations.
From: Carlos Munoz
LMTDMA/LMTST operations move data between cores and I/O devices:
* LMTST operations can send an address and a variable length
(up to 128 bytes) of data to an I/O device.
* LMTDMA operations can send an address and a variable length
(up to 128) of data to the I/O device and then return a
variable length (up to 128 bytes) response from the IOI device.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index a8034d0dcade..99e6a68bc652 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -609,6 +609,12 @@ void octeon_user_io_init(void)
#else
cvmmemctl.s.cvmsegenak = 0;
#endif
+ if (OCTEON_IS_OCTEON3()) {
+ /* Enable LMTDMA */
+ cvmmemctl.s.lmtena = 1;
+ /* Scratch line to use for LMT operation */
+ cvmmemctl.s.lmtline = 2;
+ }
/* R/W If set, CVMSEG is available for loads/stores in
* supervisor mode. */
cvmmemctl.s.cvmsegenas = 0;
diff --git a/arch/mips/include/asm/octeon/octeon.h
b/arch/mips/include/asm/octeon/octeon.h
index c99c4b6a79f4..92a17d67c1fa 100644
--- a/arch/mips/include/asm/octeon/octeon.h
+++ b/arch/mips/include/asm/octeon/octeon.h
@@ -179,7 +179,15 @@ union octeon_cvmemctl {
/* RO 1 = BIST fail, 0 = BIST pass */
__BITFIELD_FIELD(uint64_t wbfbist:1,
/* Reserved */
- __BITFIELD_FIELD(uint64_t reserved:17,
+ __BITFIELD_FIELD(uint64_t reserved_52_57:6,
+ /* When set, LMTDMA/LMTST operations are permitted */
+ __BITFIELD_FIELD(uint64_t lmtena:1,
+ /* Selects the CVMSEG LM cacheline used by LMTDMA
+* LMTST and wide atomic store operations.
+*/
+ __BITFIELD_FIELD(uint64_t lmtline:6,
+ /* Reserved */
+ __BITFIELD_FIELD(uint64_t reserved_41_44:4,
/* OCTEON II - TLB replacement policy: 0 = bitmask LRU; 1 = NLU.
* This field selects between the TLB replacement policies:
* bitmask LRU or NLU. Bitmask LRU maintains a mask of
@@ -275,7 +283,7 @@ union octeon_cvmemctl {
/* R/W Size of local memory in cache blocks, 54 (6912
* bytes) is max legal value. */
__BITFIELD_FIELD(uint64_t lmemsz:6,
- ;)
+ ;
} s;
};
--
2.13.6
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[PATCH v3 3/8] MIPS: Octeon: Add a global resource manager.
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Makefile | 3 +-
arch/mips/cavium-octeon/resource-mgr.c | 371 +
arch/mips/include/asm/octeon/octeon.h | 18 ++
3 files changed, 391 insertions(+), 1 deletion(-)
create mode 100644 arch/mips/cavium-octeon/resource-mgr.c
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 7c02e542959a..0a299ab8719f 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -9,7 +9,8 @@
# Copyright (C) 2005-2009 Cavium Networks
#
-obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o
+obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o \
+resource-mgr.o
obj-y += dma-octeon.o
obj-y += octeon-memcpy.o
obj-y += executive/
diff --git a/arch/mips/cavium-octeon/resource-mgr.c
b/arch/mips/cavium-octeon/resource-mgr.c
new file mode 100644
index ..ca25fa953402
--- /dev/null
+++ b/arch/mips/cavium-octeon/resource-mgr.c
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Resource manager for Octeon.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2017 Cavium, Inc.
+ */
+#include
+
+#include
+#include
+
+#define RESOURCE_MGR_BLOCK_NAME"cvmx-global-resources"
+#define MAX_RESOURCES 128
+#define INST_AVAILABLE -88
+#define OWNER 0xbadc0de
+
+struct global_resource_entry {
+ struct global_resource_tag tag;
+ u64 phys_addr;
+ u64 size;
+};
+
+struct global_resources {
+#ifdef __LITTLE_ENDIAN_BITFIELD
+ u32 rlock;
+ u32 pad;
+#else
+ u32 pad;
+ u32 rlock;
+#endif
+ u64 entry_cnt;
+ struct global_resource_entry resource_entry[];
+};
+
+static struct global_resources *res_mgr_info;
+
+
+/*
+ * The resource manager interacts with software running outside of the
+ * Linux kernel, which necessitates locking to maintain data structure
+ * consistency. These custom locking functions implement the locking
+ * protocol, and cannot be replaced by kernel locking functions that
+ * may use different in-memory structures.
+ */
+
+static void res_mgr_lock(void)
+{
+ unsigned int tmp;
+ u64 lock = (u64)&res_mgr_info->rlock;
+
+ __asm__ __volatile__(
+ ".set noreorder\n"
+ "1: ll %[tmp], 0(%[addr])\n"
+ " bnez %[tmp], 1b\n"
+ " li %[tmp], 1\n"
+ " sc %[tmp], 0(%[addr])\n"
+ " beqz %[tmp], 1b\n"
+ " nop\n"
+ ".set reorder\n" :
+ [tmp] "=&r"(tmp) :
+ [addr] "r"(lock) :
+ "memory");
+}
+
+static void res_mgr_unlock(void)
+{
+ u64 lock = (u64)&res_mgr_info->rlock;
+
+ /* Wait until all resource operations finish before unlocking. */
+ mb();
+ __asm__ __volatile__(
+ "sw $0, 0(%[addr])\n" : :
+ [addr] "r"(lock) :
+ "memory");
+
+ /* Force a write buffer flush. */
+ mb();
+}
+
+static int res_mgr_find_resource(struct global_resource_tag tag)
+{
+ struct global_resource_entry *res_entry;
+ int i;
+
+ for (i = 0; i < res_mgr_info->entry_cnt; i++) {
+ res_entry = &res_mgr_info->resource_entry[i];
+ if (res_entry->tag.lo == tag.lo && res_entry->tag.hi == tag.hi)
+ return i;
+ }
+ return -1;
+}
+
+/**
+ * res_mgr_create_resource - Create a resource.
+ * @tag: Identifies the resource.
+ * @inst_cnt: Number of resource instances to create.
+ *
+ * Returns 0 if the source was created successfully.
+ * Returns <0 for error codes.
+ */
+int res_mgr_create_resource(struct global_resource_tag tag, int inst_cnt)
+{
+ struct global_resource_entry *res_entry;
+ u64 size;
+ u64 *res_addr;
+ int res_index, i, rc = 0;
+
+ res_mgr_lock();
+
+ /* Make sure resource doesn't already exist. */
+ res_index = res_mgr_find_resource(tag);
+ if (res_index >= 0) {
+ rc = -1;
+ goto err;
+ }
+
+ if (res_mgr_info->entry_cnt >= MAX_RESOURCES) {
+ pr_err("Resource max limit reached, not created\n");
+ rc = -1;
+ goto err;
+ }
+
+ /*
+* Each instance is kept in an array of u64s. The first array element
+* holds the number of allocated instances.
+*/
+ size = sizeof(u64) * (inst_cnt + 1);
+ res_addr = cvmx_bootm
[PATCH v3 4/8] MIPS: Octeon: Add Free Pointer Unit (FPA) support.
From: Carlos Munoz
>From the hardware user manual: "The FPA is a unit that maintains
pools of pointers to free L2/DRAM memory. To provide QoS, the pools
are referenced indirectly through 1024 auras. Both core software
and hardware units allocate and free pointers."
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Kconfig | 8 +
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon-fpa3.c | 364 ++
arch/mips/include/asm/octeon/octeon.h | 15 ++
4 files changed, 388 insertions(+)
create mode 100644 arch/mips/cavium-octeon/octeon-fpa3.c
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 5c0b56203bae..4dffe78fe6b9 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -86,4 +86,12 @@ config OCTEON_ILM
To compile this driver as a module, choose M here. The module
will be called octeon-ilm
+config OCTEON_FPA3
+ tristate "Octeon III fpa driver"
+ help
+ This option enables a Octeon III driver for the Free Pool Unit (FPA).
+ The FPA is a hardware unit that manages pools of pointers to free
+ L2/DRAM memory. This driver provides an interface to reserve,
+ initialize, and fill fpa pools.
+
endif # CAVIUM_OCTEON_SOC
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 0a299ab8719f..0ef967399702 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_MTD) += flash_setup.o
obj-$(CONFIG_SMP)+= smp.o
obj-$(CONFIG_OCTEON_ILM) += oct_ilm.o
obj-$(CONFIG_USB)+= octeon-usb.o
+obj-$(CONFIG_OCTEON_FPA3)+= octeon-fpa3.o
diff --git a/arch/mips/cavium-octeon/octeon-fpa3.c
b/arch/mips/cavium-octeon/octeon-fpa3.c
new file mode 100644
index ..a7c7decdbc9a
--- /dev/null
+++ b/arch/mips/cavium-octeon/octeon-fpa3.c
@@ -0,0 +1,364 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for the Octeon III Free Pool Unit (fpa).
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2015-2017 Cavium, Inc.
+ */
+
+#include
+
+#include
+
+
+/* Registers are accessed via xkphys */
+#define SET_XKPHYS (1ull << 63)
+#define NODE_OFFSET0x10ull
+#define SET_NODE(node) ((node) * NODE_OFFSET)
+
+#define FPA_BASE 0x12800ull
+#define SET_FPA_BASE(node) (SET_XKPHYS + SET_NODE(node) + FPA_BASE)
+
+#define FPA_GEN_CFG(n) (SET_FPA_BASE(n) + 0x0050)
+
+#define FPA_POOLX_CFG(n, p)(SET_FPA_BASE(n) + (p<<3) + 0x1000)
+#define FPA_POOLX_START_ADDR(n, p) (SET_FPA_BASE(n) + (p<<3) + 0x1050)
+#define FPA_POOLX_END_ADDR(n, p) (SET_FPA_BASE(n) + (p<<3) + 0x1060)
+#define FPA_POOLX_STACK_BASE(n, p) (SET_FPA_BASE(n) + (p<<3) + 0x1070)
+#define FPA_POOLX_STACK_END(n, p) (SET_FPA_BASE(n) + (p<<3) + 0x1080)
+#define FPA_POOLX_STACK_ADDR(n, p) (SET_FPA_BASE(n) + (p<<3) + 0x1090)
+
+#define FPA_AURAX_POOL(n, a) (SET_FPA_BASE(n) + (a<<3) + 0x2000)
+#define FPA_AURAX_CFG(n, a)(SET_FPA_BASE(n) + (a<<3) + 0x2010)
+#define FPA_AURAX_CNT(n, a)(SET_FPA_BASE(n) + (a<<3) + 0x2020)
+#define FPA_AURAX_CNT_LIMIT(n, a) (SET_FPA_BASE(n) + (a<<3) + 0x2040)
+#define FPA_AURAX_CNT_THRESHOLD(n, a) (SET_FPA_BASE(n) + (a<<3) + 0x2050)
+#define FPA_AURAX_POOL_LEVELS(n, a)(SET_FPA_BASE(n) + (a<<3) + 0x2070)
+#define FPA_AURAX_CNT_LEVELS(n, a) (SET_FPA_BASE(n) + (a<<3) + 0x2080)
+
+static inline u64 oct_csr_read(u64 addr)
+{
+ return __raw_readq((void __iomem *)addr);
+}
+
+static inline void oct_csr_write(u64 data, u64 addr)
+{
+ __raw_writeq(data, (void __iomem *)addr);
+}
+
+static DEFINE_MUTEX(octeon_fpa3_lock);
+
+static int get_num_pools(void)
+{
+ if (OCTEON_IS_MODEL(OCTEON_CN78XX))
+ return 64;
+ if (OCTEON_IS_MODEL(OCTEON_CNF75XX) || OCTEON_IS_MODEL(OCTEON_CN73XX))
+ return 32;
+ return 0;
+}
+
+static int get_num_auras(void)
+{
+ if (OCTEON_IS_MODEL(OCTEON_CN78XX))
+ return 1024;
+ if (OCTEON_IS_MODEL(OCTEON_CNF75XX) || OCTEON_IS_MODEL(OCTEON_CN73XX))
+ return 512;
+ return 0;
+}
+
+/**
+ * octeon_fpa3_init - Initialize the fpa to default values.
+ * @node: Node of fpa to initialize.
+ *
+ * Returns 0 if successful.
+ * Returns <0 for error codes.
+ */
+int octeon_fpa3_init(int node)
+{
+ static bool init_done[2];
+ u64 data;
+ int aura_cnt, i;
+
+ mutex_lock(&octeon_fpa3_lock);
+
[PATCH v3 8/8] MAINTAINERS: Add entry for drivers/net/ethernet/cavium/octeon/octeon3-*
Signed-off-by: David Daney --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9a24f56e0451..142af33adc35 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3212,6 +3212,12 @@ W: http://www.cavium.com S: Supported F: drivers/mmc/host/cavium* +CAVIUM OCTEON-III NETWORK DRIVER +M: David Daney +L: net...@vger.kernel.org +S: Supported +F: drivers/net/ethernet/cavium/octeon/octeon3-* + CAVIUM OCTEON-TX CRYPTO DRIVER M: George Cherian L: linux-cry...@vger.kernel.org -- 2.13.6 ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
[PATCH v3 6/8] staging: octeon: Remove USE_ASYNC_IOBDMA macro.
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet-rx.c | 25 -
drivers/staging/octeon/ethernet-tx.c | 85 ++-
3 files changed, 37 insertions(+), 79 deletions(-)
diff --git a/drivers/staging/octeon/ethernet-defines.h
b/drivers/staging/octeon/ethernet-defines.h
index e898df25b87f..21438c804a43 100644
--- a/drivers/staging/octeon/ethernet-defines.h
+++ b/drivers/staging/octeon/ethernet-defines.h
@@ -10,10 +10,6 @@
/*
* A few defines are used to control the operation of this driver:
- * USE_ASYNC_IOBDMA
- * Use asynchronous IO access to hardware. This uses Octeon's asynchronous
- * IOBDMAs to issue IO accesses without stalling. Set this to zero
- * to disable this. Note that IOBDMAs require CVMSEG.
* REUSE_SKBUFFS_WITHOUT_FREE
* Allows the TX path to free an skbuff into the FPA hardware pool. This
* can significantly improve performance for forwarding and bridging, but
@@ -32,8 +28,6 @@
#define REUSE_SKBUFFS_WITHOUT_FREE 1
#endif
-#define USE_ASYNC_IOBDMA 1
-
/* Maximum number of SKBs to try to free per xmit packet. */
#define MAX_OUT_QUEUE_DEPTH 1000
diff --git a/drivers/staging/octeon/ethernet-rx.c
b/drivers/staging/octeon/ethernet-rx.c
index 1a44291318ee..dd76c99d5ae0 100644
--- a/drivers/staging/octeon/ethernet-rx.c
+++ b/drivers/staging/octeon/ethernet-rx.c
@@ -201,11 +201,9 @@ static int cvm_oct_poll(struct oct_rx_group *rx_group, int
budget)
/* Prefetch cvm_oct_device since we know we need it soon */
prefetch(cvm_oct_device);
- if (USE_ASYNC_IOBDMA) {
- /* Save scratch in case userspace is using it */
- CVMX_SYNCIOBDMA;
- old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
- }
+ /* Save scratch in case userspace is using it */
+ CVMX_SYNCIOBDMA;
+ old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
/* Only allow work for our group (and preserve priorities) */
if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
@@ -220,10 +218,8 @@ static int cvm_oct_poll(struct oct_rx_group *rx_group, int
budget)
BIT(rx_group->group));
}
- if (USE_ASYNC_IOBDMA) {
- cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
- did_work_request = 1;
- }
+ cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
+ did_work_request = 1;
while (rx_count < budget) {
struct sk_buff *skb = NULL;
@@ -232,7 +228,7 @@ static int cvm_oct_poll(struct oct_rx_group *rx_group, int
budget)
cvmx_wqe_t *work;
int port;
- if (USE_ASYNC_IOBDMA && did_work_request)
+ if (did_work_request)
work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH);
else
work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT);
@@ -260,7 +256,7 @@ static int cvm_oct_poll(struct oct_rx_group *rx_group, int
budget)
sizeof(void *));
prefetch(pskb);
- if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) {
+ if (rx_count < (budget - 1)) {
cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH,
CVMX_POW_NO_WAIT);
did_work_request = 1;
@@ -403,10 +399,9 @@ static int cvm_oct_poll(struct oct_rx_group *rx_group, int
budget)
cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);
}
- if (USE_ASYNC_IOBDMA) {
- /* Restore the scratch area */
- cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
- }
+ /* Restore the scratch area */
+ cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
+
cvm_oct_rx_refill_pool(0);
return rx_count;
diff --git a/drivers/staging/octeon/ethernet-tx.c
b/drivers/staging/octeon/ethernet-tx.c
index 31f35025d19e..2eede0907924 100644
--- a/drivers/staging/octeon/ethernet-tx.c
+++ b/drivers/staging/octeon/ethernet-tx.c
@@ -179,23 +179,18 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device
*dev)
qos = 0;
}
- if (USE_ASYNC_IOBDMA) {
- /* Save scratch in case userspace is using it */
- CVMX_SYNCIOBDMA;
- old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
- old_scratch2 = cvmx_scratch_read64(CVMX_SCR_SCRATCH + 8);
-
- /*
-* Fetch and increment the number of packets to be
-* freed.
-*/
- cvmx_fau_async_fetch_and_add32(CVMX_SCR_SCRATCH + 8,
-
[PATCH v3 5/8] MIPS: Octeon: Automatically provision CVMSEG space.
Remove CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE and automatically calculate
the amount of CVMSEG space needed.
1st 128-bytes: Use by IOBDMA
2nd 128-bytes: Reserved by kernel for scratch/TLS emulation.
3rd 128-bytes: OCTEON-III LMTLINE
New config variable CONFIG_CAVIUM_OCTEON_EXTRA_CVMSEG provisions
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20 +--
arch/mips/include/asm/mipsregs.h | 2 ++
arch/mips/include/asm/octeon/octeon.h | 2 ++
arch/mips/include/asm/processor.h | 2 +-
arch/mips/kernel/octeon_switch.S | 2 --
arch/mips/mm/tlbex.c | 29 ++
drivers/staging/octeon/ethernet-defines.h | 2 +-
9 files changed, 50 insertions(+), 52 deletions(-)
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 4dffe78fe6b9..a526bb80aa16 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -10,21 +10,26 @@ config CAVIUM_CN63XXP1
non-CN63XXP1 hardware, so it is recommended to select "n"
unless it is known the workarounds are needed.
-config CAVIUM_OCTEON_CVMSEG_SIZE
- int "Number of L1 cache lines reserved for CVMSEG memory"
- range 0 54
- default 1
- help
- CVMSEG LM is a segment that accesses portions of the dcache as a
- local memory; the larger CVMSEG is, the smaller the cache is.
- This selects the size of CVMSEG LM, which is in cache blocks. The
- legally range is from zero to 54 cache blocks (i.e. CVMSEG LM is
- between zero and 6192 bytes).
-
endif # CPU_CAVIUM_OCTEON
if CAVIUM_OCTEON_SOC
+config CAVIUM_OCTEON_EXTRA_CVMSEG
+ int "Number of extra L1 cache lines reserved for CVMSEG memory"
+ range 0 50
+ default 0
+ help
+ CVMSEG LM is a segment that accesses portions of the dcache
+ as a local memory; the larger CVMSEG is, the smaller the
+ cache is. The kernel uses two or three blocks (one for TLB
+ exception handlers, one for driver IOBDMA operations, and on
+ models that need it, one for LMTDMA operations). This
+ selects an optional extra number of CVMSEG lines for use by
+ other software.
+
+ Normally no extra lines are required, and this parameter
+ should be set to zero.
+
config CAVIUM_OCTEON_LOCK_L2
bool "Lock often used kernel code in the L2"
default "y"
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 99e6a68bc652..51c4d3c3cada 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -68,6 +68,12 @@ extern void pci_console_init(const char *arg);
static unsigned long long max_memory = ULLONG_MAX;
static unsigned long long reserve_low_mem;
+/*
+ * modified in hernel-entry-init.h, must have an initial value to keep
+ * it from being clobbered when bss is zeroed.
+ */
+u32 octeon_cvmseg_lines = 2;
+
DEFINE_SEMAPHORE(octeon_bootbus_sem);
EXPORT_SYMBOL(octeon_bootbus_sem);
@@ -604,11 +610,7 @@ void octeon_user_io_init(void)
/* R/W If set, CVMSEG is available for loads/stores in
* kernel/debug mode. */
-#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
cvmmemctl.s.cvmsegenak = 1;
-#else
- cvmmemctl.s.cvmsegenak = 0;
-#endif
if (OCTEON_IS_OCTEON3()) {
/* Enable LMTDMA */
cvmmemctl.s.lmtena = 1;
@@ -626,9 +628,9 @@ void octeon_user_io_init(void)
/* Setup of CVMSEG is done in kernel-entry-init.h */
if (smp_processor_id() == 0)
- pr_notice("CVMSEG size: %d cache lines (%d bytes)\n",
- CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE,
- CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128);
+ pr_notice("CVMSEG size: %u cache lines (%u bytes)\n",
+ octeon_cvmseg_lines,
+ octeon_cvmseg_lines * 128);
if (octeon_has_feature(OCTEON_FEATURE_FAU)) {
union cvmx_iob_fau_timeout fau_timeout;
diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
index c38b38ce5a3d..cdcca60978a2 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
@@ -26,11 +26,18 @@
# a3 = address of boot descriptor block
.set push
.set arch=octeon
+ mfc0v1, CP0_PRID_REG
+ andiv1, 0xff00
+ li v0, 0x9500 # cn78XX or later
+ subuv1, v1, v0
+ li t2, 2 + CONFIG_CAVIUM_OCTEON_EXTRA_CVMSEG
Re: [PATCH] staging: pi433: fix missing break in switch statement.
On Thu, Nov 09, 2017 at 05:19:55PM +, Colin King wrote: > From: Colin Ian King > > The PI433_IOC_WR_RX_CFG case is missing a break and will fall through > to the default case and errorenously return -EINVAL. Fix this by > adding in missing break. Folded and pushed... ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v6 1/2] staging: ion: reorder include
On 11/06/2017 07:59 AM, Benjamin Gaignard wrote: Put include in alphabetic order Acked-by: Laura Abbott Signed-off-by: Benjamin Gaignard --- drivers/staging/android/ion/ion.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/staging/android/ion/ion.c b/drivers/staging/android/ion/ion.c index a7d9b0e..fda9756 100644 --- a/drivers/staging/android/ion/ion.c +++ b/drivers/staging/android/ion/ion.c @@ -15,28 +15,28 @@ * */ +#include +#include #include +#include #include +#include #include #include #include -#include +#include #include #include #include #include -#include #include #include #include -#include +#include #include +#include #include #include -#include -#include -#include -#include #include "ion.h" ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v6 2/2] staging: ion: create one device entry per heap
On 11/06/2017 07:59 AM, Benjamin Gaignard wrote:
Instead a getting only one common device "/dev/ion" for
all the heaps this patch allow to create one device
entry ("/dev/ionX") per heap.
Getting an entry per heap could allow to set security rules
per heap and global ones for all heaps.
Allocation requests will be only allowed if the mask_id
match with device minor.
Query request could be done on any of the devices.
With this patch, sysfs looks like:
$ ls /sys/devices/
breakpoint ion platform software system virtual
From an Ion perspective, you can have
Acked-by: Laura Abbott
Another Ack for the device model stuff would be good but I'll
assume deafening silence means nobody hates it.
Thanks,
Laura
Signed-off-by: Benjamin Gaignard
---
drivers/staging/android/TODO| 1 -
drivers/staging/android/ion/Kconfig | 7
drivers/staging/android/ion/ion-ioctl.c | 18 --
drivers/staging/android/ion/ion.c | 62 +
drivers/staging/android/ion/ion.h | 15 ++--
5 files changed, 91 insertions(+), 12 deletions(-)
diff --git a/drivers/staging/android/TODO b/drivers/staging/android/TODO
index 687e0ea..8a11931 100644
--- a/drivers/staging/android/TODO
+++ b/drivers/staging/android/TODO
@@ -8,7 +8,6 @@ TODO:
ion/
- Add dt-bindings for remaining heaps (chunk and carveout heaps). This would
involve putting appropriate bindings in a memory node for Ion to find.
- - Split /dev/ion up into multiple nodes (e.g. /dev/ion/heap0)
- Better test framework (integration with VGEM was suggested)
Please send patches to Greg Kroah-Hartman and Cc:
diff --git a/drivers/staging/android/ion/Kconfig
b/drivers/staging/android/ion/Kconfig
index a517b2d..cb4666e 100644
--- a/drivers/staging/android/ion/Kconfig
+++ b/drivers/staging/android/ion/Kconfig
@@ -10,6 +10,13 @@ menuconfig ION
If you're not using Android its probably safe to
say N here.
+config ION_LEGACY_DEVICE_API
+ bool "Keep using Ion legacy misc device API"
+ depends on ION
+ help
+ Choose this option to keep using Ion legacy misc device API
+ i.e. /dev/ion
+
config ION_SYSTEM_HEAP
bool "Ion system heap"
depends on ION
diff --git a/drivers/staging/android/ion/ion-ioctl.c
b/drivers/staging/android/ion/ion-ioctl.c
index e26b786..bb5c77b 100644
--- a/drivers/staging/android/ion/ion-ioctl.c
+++ b/drivers/staging/android/ion/ion-ioctl.c
@@ -25,7 +25,8 @@ union ion_ioctl_arg {
struct ion_heap_query query;
};
-static int validate_ioctl_arg(unsigned int cmd, union ion_ioctl_arg *arg)
+static int validate_ioctl_arg(struct file *filp,
+ unsigned int cmd, union ion_ioctl_arg *arg)
{
switch (cmd) {
case ION_IOC_HEAP_QUERY:
@@ -34,6 +35,19 @@ static int validate_ioctl_arg(unsigned int cmd, union
ion_ioctl_arg *arg)
arg->query.reserved2 )
return -EINVAL;
break;
+
+ case ION_IOC_ALLOC:
+ {
+ int mask = 1 << iminor(filp->f_inode);
+
+#ifdef CONFIG_ION_LEGACY_DEVICE_API
+ if (imajor(filp->f_inode) == MISC_MAJOR)
+ return 0;
+#endif
+ if (!(arg->allocation.heap_id_mask & mask))
+ return -EINVAL;
+ break;
+ }
default:
break;
}
@@ -69,7 +83,7 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned
long arg)
if (copy_from_user(&data, (void __user *)arg, _IOC_SIZE(cmd)))
return -EFAULT;
- ret = validate_ioctl_arg(cmd, &data);
+ ret = validate_ioctl_arg(filp, cmd, &data);
if (WARN_ON_ONCE(ret))
return ret;
diff --git a/drivers/staging/android/ion/ion.c b/drivers/staging/android/ion/ion.c
index fda9756..2c2568b 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -40,6 +40,9 @@
#include "ion.h"
+#define ION_DEV_MAX 32
+#define ION_NAME "ion"
+
static struct ion_device *internal_dev;
static int heap_id;
@@ -535,15 +538,38 @@ static int debug_shrink_get(void *data, u64 *val)
DEFINE_SIMPLE_ATTRIBUTE(debug_shrink_fops, debug_shrink_get,
debug_shrink_set, "%llu\n");
-void ion_device_add_heap(struct ion_heap *heap)
+static struct device ion_bus = {
+ .init_name = ION_NAME,
+};
+
+static struct bus_type ion_bus_type = {
+ .name = ION_NAME,
+};
+
+int ion_device_add_heap(struct ion_heap *heap)
{
struct dentry *debug_file;
struct ion_device *dev = internal_dev;
+ int ret = 0;
if (!heap->ops->allocate || !heap->ops->free)
pr_err("%s: can not add heap with invalid ops struct.\n",
__func__);
+ if (heap_id >= ION_DEV_MAX)
+ return -EBUSY;
+
+ heap->ddev.parent = &ion_bus;
+ heap->ddev.bus = &ion_bus_type;
Re: [PATCH] staging: pi433: fix missing break in switch statement.
On Thu, Nov 09, 2017 at 05:19:55PM +, Colin King wrote: > From: Colin Ian King > > The PI433_IOC_WR_RX_CFG case is missing a break and will fall through > to the default case and errorenously return -EINVAL. Fix this by > adding in missing break. > Could you fix PI433_IOC_RD_RX_CFG as well? There is a missing return statement if the copy_to_user() fails we fall through to here and error out. regards, dan carpenter ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v3 7/8] netdev: octeon-ethernet: Add Cavium Octeon III support.
> + priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
> + priv->phy_mode = of_get_phy_mode(pdev->dev.of_node);
> + /* If phy-mode absent, default to SGMII. */
> + if (priv->phy_mode < 0)
> + priv->phy_mode = PHY_INTERFACE_MODE_SGMII;
> +
> + if (priv->phy_mode == PHY_INTERFACE_MODE_1000BASEX)
> + priv->mode_1000basex = true;
> +
> + if (of_phy_is_fixed_link(pdev->dev.of_node))
> + priv->bgx_as_phy = true;
> +
...
> + priv->mode = bgx_port_get_mode(priv->node, priv->bgx, priv->index);
> +
It might be a good idea to verify priv->phy_mode and priv->mode are
compatible.
> + switch (priv->mode) {
> + case PORT_MODE_SGMII:
> + case PORT_MODE_RGMII:
> + priv->get_link = bgx_port_get_sgmii_link;
> + priv->set_link = bgx_port_set_xgmii_link;
> + break;
> + case PORT_MODE_XAUI:
> + case PORT_MODE_RXAUI:
> + case PORT_MODE_XLAUI:
> + case PORT_MODE_XFI:
> + case PORT_MODE_10G_KR:
> + case PORT_MODE_40G_KR4:
> + priv->get_link = bgx_port_get_xaui_link;
> + priv->set_link = bgx_port_set_xaui_link;
> + break;
Andrew
___
devel mailing list
de...@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
Re: [PATCH v3 7/8] netdev: octeon-ethernet: Add Cavium Octeon III support.
> + if (link_changed != 0) {
> + struct port_status status;
> +
> + if (link_changed > 0) {
> + netdev_info(netdev, "Link is up - %d/%s\n",
> + priv->phydev->speed,
> + priv->phydev->duplex == DUPLEX_FULL ?
> + "Full" : "Half");
> + } else {
> + netdev_info(netdev, "Link is down\n");
> + }
phy_print_status()
Andrew
___
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de...@linuxdriverproject.org
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[RFC] hv_netvsc: safer orderly shutdown
Several types of control operations require that the underlying RNDIS
infrastructure be restarted. This patch changes the ordering of the
shutdown to avoid race conditions.
Stop all transmits before doing RNDIS halt. This involves stopping the
network device transmit queues, then waiting for all outstanding
sends before informing host to halt.
Also, check for successful restart of the device when after the
change is done.
For review, not tested on Hyper-V yet.
Signed-off-by: Stephen Hemminger
---
drivers/net/hyperv/netvsc_drv.c | 40 ++-
drivers/net/hyperv/rndis_filter.c | 23 +++---
2 files changed, 42 insertions(+), 21 deletions(-)
diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index da216ca4f2b2..3afa082e093d 100644
--- a/drivers/net/hyperv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -855,8 +855,10 @@ static int netvsc_set_channels(struct net_device *net,
orig = nvdev->num_chn;
was_opened = rndis_filter_opened(nvdev);
- if (was_opened)
+ if (was_opened) {
+ netif_tx_disable(net);
rndis_filter_close(nvdev);
+ }
memset(&device_info, 0, sizeof(device_info));
device_info.num_chn = count;
@@ -881,8 +883,13 @@ static int netvsc_set_channels(struct net_device *net,
}
}
- if (was_opened)
- rndis_filter_open(nvdev);
+ if (was_opened) {
+ ret = rndis_filter_open(nvdev);
+ if (ret)
+ netdev_err(net, "reopening device failed: %d\n", ret);
+ else
+ netif_tx_start_all_queues(net);
+ }
/* We may have missed link change notifications */
net_device_ctx->last_reconfig = 0;
@@ -971,8 +978,10 @@ static int netvsc_change_mtu(struct net_device *ndev, int
mtu)
netif_device_detach(ndev);
was_opened = rndis_filter_opened(nvdev);
- if (was_opened)
+ if (was_opened) {
+ netif_tx_disable(net);
rndis_filter_close(nvdev);
+ }
memset(&device_info, 0, sizeof(device_info));
device_info.ring_size = ring_size;
@@ -1004,8 +1013,13 @@ static int netvsc_change_mtu(struct net_device *ndev,
int mtu)
}
}
- if (was_opened)
- rndis_filter_open(nvdev);
+ if (was_opened) {
+ ret = rndis_filter_open(nvdev);
+ if (ret)
+ netdev_err(net, "reopening device failed: %d\n", ret);
+ else
+ netif_tx_start_all_queues(net);
+ }
netif_device_attach(ndev);
@@ -1547,8 +1561,10 @@ static int netvsc_set_ringparam(struct net_device *ndev,
netif_device_detach(ndev);
was_opened = rndis_filter_opened(nvdev);
- if (was_opened)
+ if (was_opened) {
+ netif_tx_disable(net);
rndis_filter_close(nvdev);
+ }
rndis_filter_device_remove(hdev, nvdev);
@@ -1566,8 +1582,14 @@ static int netvsc_set_ringparam(struct net_device *ndev,
}
}
- if (was_opened)
- rndis_filter_open(nvdev);
+ if (was_opened) {
+ ret = rndis_filter_open(nvdev);
+ if (ret)
+ netdev_err(net, "reopening device failed: %d\n", ret);
+ else
+ netif_tx_start_all_queues(net);
+ }
+
netif_device_attach(ndev);
/* We may have missed link change notifications */
diff --git a/drivers/net/hyperv/rndis_filter.c
b/drivers/net/hyperv/rndis_filter.c
index 0648eebda829..164f5ffe9c50 100644
--- a/drivers/net/hyperv/rndis_filter.c
+++ b/drivers/net/hyperv/rndis_filter.c
@@ -948,11 +948,20 @@ static void rndis_filter_halt_device(struct rndis_device
*dev)
struct net_device_context *net_device_ctx = netdev_priv(dev->ndev);
struct netvsc_device *nvdev = rtnl_dereference(net_device_ctx->nvdev);
+ /* tell bottom half that deice is being closed */
+ nvdev->destroy = true;
+
+ /* Force flag to be ordered before waiting */
+ wmb();
+
+ /* Wait for all send completions */
+ wait_event(nvdev->wait_drain, netvsc_device_idle(nvdev));
+
/* Attempt to do a rndis device halt */
request = get_rndis_request(dev, RNDIS_MSG_HALT,
RNDIS_MESSAGE_SIZE(struct rndis_halt_request));
if (!request)
- goto cleanup;
+ return;
/* Setup the rndis set */
halt = &request->request_msg.msg.halt_req;
@@ -963,17 +972,7 @@ static void rndis_filter_halt_device(struct rndis_device
*dev)
dev->state = RNDIS_DEV_UNINITIALIZED;
-cleanup:
- nvdev->destroy = true;
-
- /* Force flag to be ordered before waiting */
- wmb();
-
- /* Wait for all send completions */
-
Re: [PATCH] drivers: hv: balloon: remove extraneous assignment to region_start
On Wed, 18 Oct 2017 12:52:12 +0100 Colin King wrote: > From: Colin Ian King > > The variable region_start is assigned twice, the first value is > never read and redundant, so can be removed. We can clean up the > code further by assigning rg_start directly rather than using the > temporary variable region_start which can then be removed. Cleans > up the clang warning: > > drivers/hv/hv_balloon.c:976:3: warning: Value stored to 'region_start' > is never read > > Signed-off-by: Colin Ian King LGTM Acked-by: Stephen Hemminger ___ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
