Re: [PATCH] staging: iio: ad7152: Fix deadlock in ad7152_write_raw_samp_freq()

2017-05-28 Thread Lars-Peter Clausen 
On 05/27/2017 12:53 AM, Alexey Khoroshilov wrote:
> ad7152_write_raw_samp_freq() is called by ad7152_write_raw() with
> chip->state_lock held. So, there is unavoidable deadlock when
> ad7152_write_raw_samp_freq() locks the mutex itself.
> 
> The patch removes unneeded locking.
> 
> Found by Linux Driver Verification project (linuxtesting.org).
> 
> Signed-off-by: Alexey Khoroshilov 

Looks good, thanks.

Fixes: 6572389bcc11 ("staging: iio: cdc: ad7152: Implement
IIO_CHAN_INFO_SAMP_FREQ attribute")
Acked-by: Lars-Peter Clausen 


> ---
>  drivers/staging/iio/cdc/ad7152.c | 6 +-
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/staging/iio/cdc/ad7152.c 
> b/drivers/staging/iio/cdc/ad7152.c
> index dc6ecd824365..ff10d1f0a7e4 100644
> --- a/drivers/staging/iio/cdc/ad7152.c
> +++ b/drivers/staging/iio/cdc/ad7152.c
> @@ -231,16 +231,12 @@ static int ad7152_write_raw_samp_freq(struct device 
> *dev, int val)
>   if (i >= ARRAY_SIZE(ad7152_filter_rate_table))
>   i = ARRAY_SIZE(ad7152_filter_rate_table) - 1;
>  
> - mutex_lock(&chip->state_lock);
>   ret = i2c_smbus_write_byte_data(chip->client,
>   AD7152_REG_CFG2, AD7152_CFG2_OSR(i));
> - if (ret < 0) {
> - mutex_unlock(&chip->state_lock);
> + if (ret < 0)
>   return ret;
> - }
>  
>   chip->filter_rate_setup = i;
> - mutex_unlock(&chip->state_lock);
>  
>   return ret;
>  }
> 

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Firmware for staging atomisp driver

2017-05-28 Thread Hans de Goede 

Hi All,

I've been trying to get the atomisp driver from staging to work
on a couple of devices I have.

I started with an Asus T100TA after fixing 2 oopses in the sensor
driver there I found out that the BIOS does not allow to put the
ISP in PCI mode and that there is no code to drive it in ACPI
enumerated mode.

So I moved to a generic Insyde T701 tablet which does allow
this. After fixing some more sensor driver issues there I was
ready to actually load the atomisp driver, but I could not
find the exact firmware required, I did find a version which
is close: "irci_stable_candrpv_0415_20150423_1753"
and tried that but that causes the atomisp driver to explode
in a backtrace which contains atomisp_load_firmware() so that
one seems no good.

Can someone help me to get the right firmware ?

The TODO says: "can also be extracted from the upgrade kit"
about the firmware files, but it is not clear to me what /
where the "upgrade kit" is.

More in general it would be a good idea if someone inside Intel
would try to get permission to add the firmware to linux-firmware.

Anyways I will send out the patches I've currently, once I've
the right firmware I will continue working on this.

Regards,

Hans
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[PATCH 1/7] staging: atomisp: Fix calling efivar_entry_get() with unaligned arguments

2017-05-28 Thread Hans de Goede 
efivar_entry_get has certain alignment requirements and the atomisp
platform code was not honoring these, causing an oops by triggering the
WARN_ON in arch/x86/platform/efi/efi_64.c: virt_to_phys_or_null_size().

This commit fixes this by using the members of the efivar struct embedded
in the efivar_entry struct we kzalloc as arguments to efivar_entry_get(),
which is how all the other callers of efivar_entry_get() do this.

Signed-off-by: Hans de Goede 
---
 .../atomisp/platform/intel-mid/atomisp_gmin_platform.c  | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git 
a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c 
b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c
index 5b4506a71126..104fea2f8697 100644
--- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c
+++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c
@@ -623,9 +623,7 @@ int gmin_get_config_var(struct device *dev, const char 
*var, char *out, size_t *
char var8[CFG_VAR_NAME_MAX];
efi_char16_t var16[CFG_VAR_NAME_MAX];
struct efivar_entry *ev;
-   u32 efiattr_dummy;
int i, j, ret;
-   unsigned long efilen;
 
 if (dev && ACPI_COMPANION(dev))
 dev = &ACPI_COMPANION(dev)->dev;
@@ -684,15 +682,18 @@ int gmin_get_config_var(struct device *dev, const char 
*var, char *out, size_t *
return -ENOMEM;
memcpy(&ev->var.VariableName, var16, sizeof(var16));
ev->var.VendorGuid = GMIN_CFG_VAR_EFI_GUID;
+   ev->var.DataSize = *out_len;
 
-   efilen = *out_len;
-   ret = efivar_entry_get(ev, &efiattr_dummy, &efilen, out);
+   ret = efivar_entry_get(ev, &ev->var.Attributes,
+  &ev->var.DataSize, ev->var.Data);
+   if (ret == 0) {
+   memcpy(out, ev->var.Data, ev->var.DataSize);
+   *out_len = ev->var.DataSize;
+   } else {
+   dev_warn(dev, "Failed to find gmin variable %s\n", var8);
+   }
 
kfree(ev);
-   *out_len = efilen;
-
-   if (ret)
-   dev_warn(dev, "Failed to find gmin variable %s\n", var8);
 
return ret;
 }
-- 
2.13.0

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[PATCH 3/7] staging: atomisp: Set step to 0 for mt9m114 menu control

2017-05-28 Thread Hans de Goede 
menu controls are not allowed to have a step size, set step to 0 to
fix an oops from the WARN_ON in v4l2_ctrl_new_custom() triggering
because of this.

Signed-off-by: Hans de Goede 
---
 drivers/staging/media/atomisp/i2c/mt9m114.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/media/atomisp/i2c/mt9m114.c 
b/drivers/staging/media/atomisp/i2c/mt9m114.c
index ced175c268d1..3fa915313e53 100644
--- a/drivers/staging/media/atomisp/i2c/mt9m114.c
+++ b/drivers/staging/media/atomisp/i2c/mt9m114.c
@@ -1499,7 +1499,7 @@ static struct v4l2_ctrl_config mt9m114_controls[] = {
 .type = V4L2_CTRL_TYPE_MENU,
 .min = 0,
 .max = 3,
-.step = 1,
+.step = 0,
 .def = 1,
 .flags = 0,
 },
-- 
2.13.0

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[PATCH 7/7] staging: atomisp: Make ov2680 driver less chatty

2017-05-28 Thread Hans de Goede 
There is no reason for all this printk spamming and certainly
not at an error log level.

Signed-off-by: Hans de Goede 
---
 drivers/staging/media/atomisp/i2c/ov2680.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/media/atomisp/i2c/ov2680.c 
b/drivers/staging/media/atomisp/i2c/ov2680.c
index 6dd466558701..3cabfe54c669 100644
--- a/drivers/staging/media/atomisp/i2c/ov2680.c
+++ b/drivers/staging/media/atomisp/i2c/ov2680.c
@@ -1191,9 +1191,8 @@ static int ov2680_detect(struct i2c_client *client)
OV2680_SC_CMMN_SUB_ID, &high);
revision = (u8) high & 0x0f;
 
-   dev_err(&client->dev, "sensor_revision id  = 0x%x\n", id);
-   dev_err(&client->dev, "detect ov2680 success\n");
-   dev_err(&client->dev, "5##\n");
+   dev_info(&client->dev, "sensor_revision id = 0x%x\n", id);
+
return 0;
 }
 
@@ -1448,8 +1447,6 @@ static int ov2680_probe(struct i2c_client *client,
void *pdata;
unsigned int i;
 
-   printk("ov2680_probe\n");
-   dev_info(&client->dev, "ov2680_probe\n");
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
dev_err(&client->dev, "out of memory\n");
-- 
2.13.0

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[PATCH 2/7] staging: atomisp: Do not call dev_warn with a NULL device

2017-05-28 Thread Hans de Goede 
Do not call dev_warn with a NULL device, this silence the following 2
warnings:

[   14.392194] (NULL device *): Failed to find gmin variable gmin_V2P8GPIO
[   14.392257] (NULL device *): Failed to find gmin variable gmin_V1P8GPIO

We could switch to using pr_warn for dev == NULL instead, but as comments
in the source indicate, the check for these 2 special gmin variables with
a NULL device is a workaround for 2 specific evaluation boards, so
completely silencing the missing warning for these actually is a good
thing.

Signed-off-by: Hans de Goede 
---
 .../staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c 
b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c
index 104fea2f8697..3fea81ea5dbd 100644
--- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c
+++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c
@@ -689,7 +689,7 @@ int gmin_get_config_var(struct device *dev, const char 
*var, char *out, size_t *
if (ret == 0) {
memcpy(out, ev->var.Data, ev->var.DataSize);
*out_len = ev->var.DataSize;
-   } else {
+   } else if (dev) {
dev_warn(dev, "Failed to find gmin variable %s\n", var8);
}
 
-- 
2.13.0

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[PATCH 6/7] staging: atomisp: Ignore errors from second gpio in ov2680 driver

2017-05-28 Thread Hans de Goede 
As the existing comment in the driver indicates the sensor has only 1 pin,
but some boards may have 2 gpios defined and we toggle both as we we don't
know which one is the right one. However if the ACPI resources table
defines only 1 gpio (as expected) the gpio1_ctrl call will always fail,
causing the probing of the driver to file.

This commit ignore the return value of the gpio1_ctrl call, fixing this.

Signed-off-by: Hans de Goede 
---
 drivers/staging/media/atomisp/i2c/ov2680.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/media/atomisp/i2c/ov2680.c 
b/drivers/staging/media/atomisp/i2c/ov2680.c
index 449aa2aa276f..6dd466558701 100644
--- a/drivers/staging/media/atomisp/i2c/ov2680.c
+++ b/drivers/staging/media/atomisp/i2c/ov2680.c
@@ -885,11 +885,12 @@ static int gpio_ctrl(struct v4l2_subdev *sd, bool flag)
if (flag) {
ret = dev->platform_data->gpio0_ctrl(sd, 1);
usleep_range(1, 15000);
-   ret |= dev->platform_data->gpio1_ctrl(sd, 1);
+   /* Ignore return from second gpio, it may not be there */
+   dev->platform_data->gpio1_ctrl(sd, 1);
usleep_range(1, 15000);
} else {
-   ret = dev->platform_data->gpio1_ctrl(sd, 0);
-   ret |= dev->platform_data->gpio0_ctrl(sd, 0);
+   dev->platform_data->gpio1_ctrl(sd, 0);
+   ret = dev->platform_data->gpio0_ctrl(sd, 0);
}
return ret;
 }
-- 
2.13.0

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[PATCH 4/7] staging: atomisp: Add INT0310 ACPI id to gc0310 driver

2017-05-28 Thread Hans de Goede 
Signed-off-by: Hans de Goede 
---
 drivers/staging/media/atomisp/i2c/gc0310.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/staging/media/atomisp/i2c/gc0310.c 
b/drivers/staging/media/atomisp/i2c/gc0310.c
index 1ec616a15086..350fd7fd5b86 100644
--- a/drivers/staging/media/atomisp/i2c/gc0310.c
+++ b/drivers/staging/media/atomisp/i2c/gc0310.c
@@ -1455,6 +1455,7 @@ static int gc0310_probe(struct i2c_client *client,
 
 static struct acpi_device_id gc0310_acpi_match[] = {
{"XXGC0310"},
+   {"INT0310"},
{},
 };
 
-- 
2.13.0

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[PATCH 5/7] staging: atomisp: Add OVTI2680 ACPI id to ov2680 driver

2017-05-28 Thread Hans de Goede 
Signed-off-by: Hans de Goede 
---
 drivers/staging/media/atomisp/i2c/ov2680.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/staging/media/atomisp/i2c/ov2680.c 
b/drivers/staging/media/atomisp/i2c/ov2680.c
index 566091035c64..449aa2aa276f 100644
--- a/drivers/staging/media/atomisp/i2c/ov2680.c
+++ b/drivers/staging/media/atomisp/i2c/ov2680.c
@@ -1521,6 +1521,7 @@ static int ov2680_probe(struct i2c_client *client,
 
 static struct acpi_device_id ov2680_acpi_match[] = {
{"XXOV2680"},
+   {"OVTI2680"},
{},
 };
 MODULE_DEVICE_TABLE(acpi, ov2680_acpi_match);
-- 
2.13.0

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Re: [PATCH 2/7] staging: atomisp: Do not call dev_warn with a NULL device

2017-05-28 Thread Andy Shevchenko 
On Sun, May 28, 2017 at 3:31 PM, Hans de Goede  wrote:
> Do not call dev_warn with a NULL device, this silence the following 2
> warnings:
>
> [   14.392194] (NULL device *): Failed to find gmin variable gmin_V2P8GPIO
> [   14.392257] (NULL device *): Failed to find gmin variable gmin_V1P8GPIO
>
> We could switch to using pr_warn for dev == NULL instead, but as comments
> in the source indicate, the check for these 2 special gmin variables with
> a NULL device is a workaround for 2 specific evaluation boards, so
> completely silencing the missing warning for these actually is a good
> thing.

Perhaps removing all code related explicitly to Gmin is a right thing to do.


-- 
With Best Regards,
Andy Shevchenko
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[PATCH 00/12] staging: ccree: addtional driver cleanups

2017-05-28 Thread Gilad Ben-Yossef 
This is another batch of clean ups for the ccree driver.
Mostly comprised of:
- Coding Style fixes
- Move to kernel infrastructure from custom constructs
- Removal of dead code

Gilad Ben-Yossef (12):
  staging: ccree: correct coding style violations
  staging: ccree: move to kernel bitfields/bitops
  staging: ccree: remove 48 bit dma addr sim
  staging: ccree: cleanup lli access macro
  staging: ccree: remove cycle count debug support
  staging: ccree: move request_mgr to generic bitfield ops
  staging: ccree remove custom bitfield macros
  staging: ccree: remove unused struct
  staging: ccree: use snake_case for hash enums
  staging: ccree: drop no longer used macro
  staging: ccree: remove dead code
  staging: ccree: whitespace fixes

 drivers/staging/ccree/cc_bitops.h|  35 --
 drivers/staging/ccree/cc_crypto_ctx.h|  66 ++-
 drivers/staging/ccree/cc_hw_queue_defs.h | 770 +
 drivers/staging/ccree/cc_lli_defs.h  |  67 ++-
 drivers/staging/ccree/cc_regs.h  |  74 +--
 drivers/staging/ccree/dx_crys_kernel.h   | 308 +-
 drivers/staging/ccree/dx_host.h  | 256 -
 drivers/staging/ccree/hash_defs.h|  52 +-
 drivers/staging/ccree/ssi_aead.c | 953 ++-
 drivers/staging/ccree/ssi_buffer_mgr.c   | 128 +
 drivers/staging/ccree/ssi_buffer_mgr.h   |  16 -
 drivers/staging/ccree/ssi_cipher.c   | 248 
 drivers/staging/ccree/ssi_config.h   |   6 -
 drivers/staging/ccree/ssi_driver.c   |   8 -
 drivers/staging/ccree/ssi_driver.h   |  30 +-
 drivers/staging/ccree/ssi_fips_ll.c  | 704 +++
 drivers/staging/ccree/ssi_hash.c | 895 ++---
 drivers/staging/ccree/ssi_ivgen.c|  80 ++-
 drivers/staging/ccree/ssi_request_mgr.c  | 152 +
 drivers/staging/ccree/ssi_sram_mgr.c |   8 +-
 20 files changed, 2170 insertions(+), 2686 deletions(-)
 delete mode 100644 drivers/staging/ccree/cc_bitops.h

-- 
2.1.4

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[PATCH 03/12] staging: ccree: remove 48 bit dma addr sim

2017-05-28 Thread Gilad Ben-Yossef 
Remove no longer needed code used to simulate 48 bit dma addresses
on 32 bit platforms for development purposes.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c| 19 
 drivers/staging/ccree/ssi_buffer_mgr.c  | 83 -
 drivers/staging/ccree/ssi_buffer_mgr.h  | 16 ---
 drivers/staging/ccree/ssi_cipher.c  |  4 --
 drivers/staging/ccree/ssi_hash.c| 35 --
 drivers/staging/ccree/ssi_ivgen.c   |  3 --
 drivers/staging/ccree/ssi_request_mgr.c |  3 --
 7 files changed, 163 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 1bb78d10..2a7ec8b 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -99,7 +99,6 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
dev = &ctx->drvdata->plat_dev->dev;
/* Unmap enckey buffer */
if (ctx->enckey != NULL) {
-   SSI_RESTORE_DMA_ADDR_TO_48BIT(ctx->enckey_dma_addr);
dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, 
ctx->enckey_dma_addr);
SSI_LOG_DEBUG("Freed enckey DMA buffer 
enckey_dma_addr=0x%llX\n",
(unsigned long long)ctx->enckey_dma_addr);
@@ -109,8 +108,6 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
 
if (ctx->auth_mode == DRV_HASH_XCBC_MAC) { /* XCBC authetication */
if (ctx->auth_state.xcbc.xcbc_keys != NULL) {
-   SSI_RESTORE_DMA_ADDR_TO_48BIT(
-   ctx->auth_state.xcbc.xcbc_keys_dma_addr);
dma_free_coherent(dev, CC_AES_128_BIT_KEY_SIZE * 3,
ctx->auth_state.xcbc.xcbc_keys,
ctx->auth_state.xcbc.xcbc_keys_dma_addr);
@@ -121,8 +118,6 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
ctx->auth_state.xcbc.xcbc_keys = NULL;
} else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC auth. */
if (ctx->auth_state.hmac.ipad_opad != NULL) {
-   SSI_RESTORE_DMA_ADDR_TO_48BIT(
-   ctx->auth_state.hmac.ipad_opad_dma_addr);
dma_free_coherent(dev, 2 * MAX_HMAC_DIGEST_SIZE,
ctx->auth_state.hmac.ipad_opad,
ctx->auth_state.hmac.ipad_opad_dma_addr);
@@ -132,8 +127,6 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
ctx->auth_state.hmac.ipad_opad = NULL;
}
if (ctx->auth_state.hmac.padded_authkey != NULL) {
-   SSI_RESTORE_DMA_ADDR_TO_48BIT(
-   ctx->auth_state.hmac.padded_authkey_dma_addr);
dma_free_coherent(dev, MAX_HMAC_BLOCK_SIZE,
ctx->auth_state.hmac.padded_authkey,
ctx->auth_state.hmac.padded_authkey_dma_addr);
@@ -171,7 +164,6 @@ static int ssi_aead_init(struct crypto_aead *tfm)
SSI_LOG_ERR("Failed allocating key buffer\n");
goto init_failed;
}
-   SSI_UPDATE_DMA_ADDR_TO_48BIT(ctx->enckey_dma_addr, AES_MAX_KEY_SIZE);
SSI_LOG_DEBUG("Allocated enckey buffer in context ctx->enckey=@%p\n", 
ctx->enckey);
 
/* Set default authlen value */
@@ -186,9 +178,6 @@ static int ssi_aead_init(struct crypto_aead *tfm)
SSI_LOG_ERR("Failed allocating buffer for XCBC keys\n");
goto init_failed;
}
-   SSI_UPDATE_DMA_ADDR_TO_48BIT(
-   ctx->auth_state.xcbc.xcbc_keys_dma_addr,
-   CC_AES_128_BIT_KEY_SIZE * 3);
} else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC authentication */
/* Allocate dma-coherent buffer for IPAD + OPAD */
ctx->auth_state.hmac.ipad_opad = dma_alloc_coherent(dev,
@@ -198,9 +187,6 @@ static int ssi_aead_init(struct crypto_aead *tfm)
SSI_LOG_ERR("Failed allocating IPAD/OPAD buffer\n");
goto init_failed;
}
-   SSI_UPDATE_DMA_ADDR_TO_48BIT(
-   ctx->auth_state.hmac.ipad_opad_dma_addr,
-   2 * MAX_HMAC_DIGEST_SIZE);
SSI_LOG_DEBUG("Allocated authkey buffer in context 
ctx->authkey=@%p\n",
ctx->auth_state.hmac.ipad_opad);
 
@@ -211,9 +197,6 @@ static int ssi_aead_init(struct crypto_aead *tfm)
SSI_LOG_ERR("failed to allocate padded_authkey\n");
goto init_failed;
}
-   SSI_UPDATE_DMA_ADDR_TO_48BIT(
-   ctx->auth_state.hmac.padded_authkey_dma_addr,
-   MAX_HMAC_BLOCK_SIZE);
} else {
ctx->auth_state.hmac.ipad_opad = NULL;
ctx->auth_state.hmac.padded_authkey = NULL;
@@ -4

[PATCH 01/12] staging: ccree: correct coding style violations

2017-05-28 Thread Gilad Ben-Yossef 
cc_crypto_ctx.h had multiple coding style violations reported by
checkpatch. Fix them all.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_crypto_ctx.h | 66 +--
 1 file changed, 32 insertions(+), 34 deletions(-)

diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index ac39d34..0823b0f 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -14,7 +14,6 @@
  * along with this program; if not, see .
  */
 
-
 #ifndef _CC_CRYPTO_CTX_H_
 #define _CC_CRYPTO_CTX_H_
 
@@ -28,7 +27,7 @@
 #define CC_CTX_SIZE_LOG2 7
 #endif
 #endif
-#define CC_CTX_SIZE (1<> 2)
 
 #define CC_DRV_DES_IV_SIZE 8
@@ -54,13 +53,13 @@
 #define CC_AES_KEY_SIZE_MAXCC_AES_256_BIT_KEY_SIZE
 #define CC_AES_KEY_SIZE_WORDS_MAX  (CC_AES_KEY_SIZE_MAX >> 2)
 
-#define CC_MD5_DIGEST_SIZE 16
-#define CC_SHA1_DIGEST_SIZE20
-#define CC_SHA224_DIGEST_SIZE  28
-#define CC_SHA256_DIGEST_SIZE  32
+#define CC_MD5_DIGEST_SIZE 16
+#define CC_SHA1_DIGEST_SIZE 20
+#define CC_SHA224_DIGEST_SIZE 28
+#define CC_SHA256_DIGEST_SIZE 32
 #define CC_SHA256_DIGEST_SIZE_IN_WORDS 8
-#define CC_SHA384_DIGEST_SIZE  48
-#define CC_SHA512_DIGEST_SIZE  64
+#define CC_SHA384_DIGEST_SIZE 48
+#define CC_SHA512_DIGEST_SIZE 64
 
 #define CC_SHA1_BLOCK_SIZE 64
 #define CC_SHA1_BLOCK_SIZE_IN_WORDS 16
@@ -83,18 +82,17 @@
 
 #define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX
 
-#define CC_MULTI2_SYSTEM_KEY_SIZE  32
-#define CC_MULTI2_DATA_KEY_SIZE8
-#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE   (CC_MULTI2_SYSTEM_KEY_SIZE + 
CC_MULTI2_DATA_KEY_SIZE)
-#defineCC_MULTI2_BLOCK_SIZE8
-#defineCC_MULTI2_IV_SIZE   8
-#defineCC_MULTI2_MIN_NUM_ROUNDS8
-#defineCC_MULTI2_MAX_NUM_ROUNDS128
-
+#define CC_MULTI2_SYSTEM_KEY_SIZE 32
+#define CC_MULTI2_DATA_KEY_SIZE8
+#define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + \
+ CC_MULTI2_DATA_KEY_SIZE)
+#defineCC_MULTI2_BLOCK_SIZE 8
+#defineCC_MULTI2_IV_SIZE 8
+#defineCC_MULTI2_MIN_NUM_ROUND 8
+#defineCC_MULTI2_MAX_NUM_ROUND 128
 
 #define CC_DRV_ALG_MAX_BLOCK_SIZE CC_HASH_BLOCK_SIZE_MAX
 
-
 enum drv_engine_type {
DRV_ENGINE_NULL = 0,
DRV_ENGINE_AES = 1,
@@ -178,7 +176,6 @@ enum drv_multi2_mode {
DRV_MULTI2_RESERVE32B = S32_MAX
 };
 
-
 /* drv_crypto_key_type[1:0] is mapped to cipher_do[1:0] */
 /* drv_crypto_key_type[2] is mapped to cipher_config2 */
 enum drv_crypto_key_type {
@@ -208,7 +205,6 @@ struct drv_ctx_generic {
enum drv_crypto_alg alg;
 } __attribute__((__may_alias__));
 
-
 struct drv_ctx_hash {
enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HASH */
enum drv_hash_mode mode;
@@ -218,13 +214,14 @@ struct drv_ctx_hash {
CC_DIGEST_SIZE_MAX];
 };
 
-/*  drv_ctx_hmac should have the same structure as drv_ctx_hash except
-   k0, k0_size fields */
+/* NOTE! drv_ctx_hmac should have the same structure as drv_ctx_hash except
+ * k0, k0_size fields
+ */
 struct drv_ctx_hmac {
enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */
enum drv_hash_mode mode;
u8 digest[CC_DIGEST_SIZE_MAX];
-   u32 k0[CC_HMAC_BLOCK_SIZE_MAX/sizeof(u32)];
+   u32 k0[CC_HMAC_BLOCK_SIZE_MAX / sizeof(u32)];
u32 k0_size;
/* reserve to end of allocated context size */
u8 reserved[CC_CTX_SIZE - 3 * sizeof(u32) -
@@ -240,16 +237,17 @@ struct drv_ctx_cipher {
u32 key_size; /* numeric value in bytes   */
u32 data_unit_size; /* required for XTS */
/* block_state is the AES engine block state.
-   *  It is used by the host to pass IV or counter at initialization.
-   *  It is used by SeP for intermediate block chaining state and for
-   *  returning MAC algorithms results.   */
+*  It is used by the host to pass IV or counter at initialization.
+*  It is used by SeP for intermediate block chaining state and for
+*  returning MAC algorithms results.
+*/
u8 block_state[CC_AES_BLOCK_SIZE];
u8 key[CC_AES_KEY_SIZE_MAX];
u8 xex_key[CC_AES_KEY_SIZE_MAX];
/* reserve to end of allocated context size */
u32 reserved[CC_DRV_CTX_SIZE_WORDS - 7 -
-   CC_AES_BLOCK_SIZE/sizeof(u32) - 2 *
-   (CC_AES_KEY_SIZE_MAX/sizeof(u32))];
+   CC_AES_BLOCK_SIZE / sizeof(u32) - 2 *
+   (CC_AES_KEY_SIZE_MAX / sizeof(u32))];
 };
 
 /* authentication and encryption with associated data class */
@@ -269,20 +267,20 @@ struct drv_ctx_aead {
u8 key[CC_AES_KEY_SIZE_MAX];
/* reserve to end of allocated context size */
u32 reserved[CC

[PATCH 04/12] staging: ccree: cleanup lli access macro

2017-05-28 Thread Gilad Ben-Yossef 
The Linked List Item descriptors were being accessed via
a baroque set of defines and macro. Re-factor for structs
and inline function for readability and sanity.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_lli_defs.h| 65 +++---
 drivers/staging/ccree/ssi_buffer_mgr.c | 45 +--
 2 files changed, 44 insertions(+), 66 deletions(-)

diff --git a/drivers/staging/ccree/cc_lli_defs.h 
b/drivers/staging/ccree/cc_lli_defs.h
index 857b94f..c6b2917 100644
--- a/drivers/staging/ccree/cc_lli_defs.h
+++ b/drivers/staging/ccree/cc_lli_defs.h
@@ -28,36 +28,43 @@
 
 #define CC_MAX_MLLI_ENTRY_SIZE 0x1
 
-#define LLI_SET_ADDR(__lli_p, __addr) do { \
-   u32 *lli_p = (u32 *)__lli_p;\
-   typeof(__addr) addr = __addr;   \
-   \
-   BITFIELD_SET(lli_p[LLI_WORD0_OFFSET],   \
-   LLI_LADDR_BIT_OFFSET,   \
-   LLI_LADDR_BIT_SIZE, (addr & U32_MAX));  \
-   \
-   BITFIELD_SET(lli_p[LLI_WORD1_OFFSET],   \
-   LLI_HADDR_BIT_OFFSET,   \
-   LLI_HADDR_BIT_SIZE, MSB64(addr));   \
-   } while (0)
-
-#define LLI_SET_SIZE(lli_p, size)  \
-   BITFIELD_SET(((u32 *)(lli_p))[LLI_WORD1_OFFSET],\
-   LLI_SIZE_BIT_OFFSET, LLI_SIZE_BIT_SIZE, size)
+#define LLI_MAX_NUM_OF_DATA_ENTRIES 128
+#define LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES 4
+#define MLLI_TABLE_MIN_ALIGNMENT 4 /* 32 bit alignment */
+#define MAX_NUM_OF_BUFFERS_IN_MLLI 4
+#define MAX_NUM_OF_TOTAL_MLLI_ENTRIES (2 * LLI_MAX_NUM_OF_DATA_ENTRIES + \
+  LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)
+
+struct cc_lli_entry {
+#ifndef __LITTLE_ENDIAN__
+   u32 addr_lsb;
+   u16 size;
+   u16 addr_msb;
+#else /* __BIG_ENDIAN__ */
+   u16 addr_msb;
+   u16 size;
+   u32 addr_lsb;
+#endif
+} __packed;
 
 /* Size of entry */
-#define LLI_ENTRY_WORD_SIZE 2
-#define LLI_ENTRY_BYTE_SIZE (LLI_ENTRY_WORD_SIZE * sizeof(u32))
-
-/* Word0[31:0] = ADDR[31:0] */
-#define LLI_WORD0_OFFSET 0
-#define LLI_LADDR_BIT_OFFSET 0
-#define LLI_LADDR_BIT_SIZE 32
-/* Word1[31:16] = ADDR[47:32]; Word1[15:0] = SIZE */
-#define LLI_WORD1_OFFSET 1
-#define LLI_SIZE_BIT_OFFSET 0
-#define LLI_SIZE_BIT_SIZE 16
-#define LLI_HADDR_BIT_OFFSET 16
-#define LLI_HADDR_BIT_SIZE 16
+#define LLI_ENTRY_BYTE_SIZE sizeof(struct cc_lli_entry)
+
+static inline void cc_lli_set_addr(u32 *lli_p, dma_addr_t addr)
+{
+   struct cc_lli_entry *entry = (struct cc_lli_entry *)lli_p;
+
+   entry->addr_lsb = (addr & U32_MAX);
+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
+   entry->addr_msb = (addr >> 16);
+#endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */
+}
+
+static inline void cc_lli_set_size(u32 *lli_p, u32 size)
+{
+   struct cc_lli_entry *entry = (struct cc_lli_entry *)lli_p;
+
+   entry->size = size;
+}
 
 #endif /*_CC_LLI_DEFS_H_*/
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 0affe1f..5de1656 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -33,42 +33,15 @@
 #include "ssi_hash.h"
 #include "ssi_aead.h"
 
-#define LLI_MAX_NUM_OF_DATA_ENTRIES 128
-#define LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES 4
-#define MLLI_TABLE_MIN_ALIGNMENT 4 /*Force the MLLI table to be align to 
uint32 */
-#define MAX_NUM_OF_BUFFERS_IN_MLLI 4
-#define MAX_NUM_OF_TOTAL_MLLI_ENTRIES (2*LLI_MAX_NUM_OF_DATA_ENTRIES + \
-   LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES )
-
 #ifdef CC_DEBUG
-#define DUMP_SGL(sg) \
-   while (sg) { \
-   SSI_LOG_DEBUG("page=%p offset=%u length=%u (dma_len=%u) " \
-"dma_addr=%08x\n", sg_page(sg), (sg)->offset, \
-   (sg)->length, sg_dma_len(sg), (sg)->dma_address); \
-   (sg) = sg_next(sg); \
-   }
-#define DUMP_MLLI_TABLE(mlli_p, nents) \
-   do { \
-   SSI_LOG_DEBUG("mlli=%pK nents=%u\n", (mlli_p), (nents)); \
-   while((nents)--) { \
-   SSI_LOG_DEBUG("addr=0x%08X size=0x%08X\n", \
-(mlli_p)[LLI_WORD0_OFFSET], \
-(mlli_p)[LLI_WORD1_OFFSET]); \
-   (mlli_p) += LLI_ENTRY_WORD_SIZE; \
-   } \
-   } while (0)
 #define GET_DMA_BUFFER_TYPE(buff_type) ( \
((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \
((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \
((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID")
 #else
-#define DX_BUFFER_MGR_DUMP_SGL(sg)
-#

[PATCH 05/12] staging: ccree: remove cycle count debug support

2017-05-28 Thread Gilad Ben-Yossef 
The ccree driver had support for rough performance debugging
via cycle counting which has bit rotted and can easily be
replcaed with perf. Remove it from the driver.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_hw_queue_defs.h |  13 
 drivers/staging/ccree/ssi_aead.c |  33 -
 drivers/staging/ccree/ssi_cipher.c   |  20 --
 drivers/staging/ccree/ssi_config.h   |   6 --
 drivers/staging/ccree/ssi_driver.c   |   8 ---
 drivers/staging/ccree/ssi_driver.h   |  25 ---
 drivers/staging/ccree/ssi_hash.c |  28 
 drivers/staging/ccree/ssi_request_mgr.c  | 115 ---
 8 files changed, 248 deletions(-)

diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h 
b/drivers/staging/ccree/cc_hw_queue_defs.h
index af10850..14126e5 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -29,8 +29,6 @@
 #define HW_DESC_SIZE_WORDS 6
 #define HW_QUEUE_SLOTS_MAX  15 /* Max. available HW queue slots */
 
-#define _HW_DESC_MONITOR_KICK 0x7FFFC00
-
 #define CC_REG_NAME(word, name) DX_DSCRPTR_QUEUE_WORD ## word ## _ ## name
 
 #define CC_REG_LOW(word, name)  \
@@ -606,15 +604,4 @@ static inline void set_cipher_do(struct cc_hw_desc *pdesc,
(config & HW_KEY_MASK_CIPHER_DO));
 }
 
-/*
- * This macro sets the DIN field of a HW descriptors to star/stop monitor 
descriptor.
- * Used for performance measurements and debug purposes.
- *
- * @pdesc: pointer HW descriptor struct
- */
-#define HW_DESC_SET_DIN_MONITOR_CNTR(pDesc)
\
-   do {
\
-   CC_REG_FLD_SET(CRY_KERNEL, DSCRPTR_MEASURE_CNTR, VALUE, 
(pDesc)->word[1], _HW_DESC_MONITOR_KICK);   \
-   } while (0)
-
 #endif /*__CC_HW_QUEUE_DEFS_H__*/
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 2a7ec8b..32206eb 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -217,9 +217,6 @@ static void ssi_aead_complete(struct device *dev, void 
*ssi_req, void __iomem *c
struct crypto_aead *tfm = crypto_aead_reqtfm(ssi_req);
struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
int err = 0;
-   DECL_CYCLE_COUNT_RESOURCES;
-
-   START_CYCLE_COUNT();
 
ssi_buffer_mgr_unmap_aead_request(dev, areq);
 
@@ -253,7 +250,6 @@ static void ssi_aead_complete(struct device *dev, void 
*ssi_req, void __iomem *c
}
}
 
-   END_CYCLE_COUNT(STAT_OP_TYPE_GENERIC, STAT_PHASE_4);
aead_request_complete(areq, err);
 }
 
@@ -518,10 +514,6 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 
*key, unsigned int keyl
idx++;
}
 
-#ifdef ENABLE_CYCLE_COUNT
-   ssi_req.op_type = STAT_OP_TYPE_SETKEY;
-#endif
-
rc = send_request(ctx->drvdata, &ssi_req, desc, idx, 0);
if (unlikely(rc != 0))
SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc);
@@ -543,14 +535,12 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
struct crypto_authenc_key_param *param;
struct cc_hw_desc desc[MAX_AEAD_SETKEY_SEQ];
int seq_len = 0, rc = -EINVAL;
-   DECL_CYCLE_COUNT_RESOURCES;
 
SSI_LOG_DEBUG("Setting key in context @%p for %s. key=%p keylen=%u\n",
ctx, crypto_tfm_alg_name(crypto_aead_tfm(tfm)), key, keylen);
 
CHECK_AND_RETURN_UPON_FIPS_ERROR();
/* STAT_PHASE_0: Init and sanity checks */
-   START_CYCLE_COUNT();
 
if (ctx->auth_mode != DRV_HASH_NULL) { /* authenc() alg. */
if (!RTA_OK(rta, keylen))
@@ -588,9 +578,7 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
if (unlikely(rc != 0))
goto badkey;
 
-   END_CYCLE_COUNT(STAT_OP_TYPE_SETKEY, STAT_PHASE_0);
/* STAT_PHASE_1: Copy key to ctx */
-   START_CYCLE_COUNT();
 
/* Get key material */
memcpy(ctx->enckey, key + ctx->auth_keylen, ctx->enc_keylen);
@@ -604,10 +592,8 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
goto badkey;
}
 
-   END_CYCLE_COUNT(STAT_OP_TYPE_SETKEY, STAT_PHASE_1);
 
/* STAT_PHASE_2: Create sequence */
-   START_CYCLE_COUNT();
 
switch (ctx->auth_mode) {
case DRV_HASH_SHA1:
@@ -625,15 +611,10 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
goto badkey;
}
 
-   END_CYCLE_COUNT(STAT_OP_TYPE_SETKEY, STAT_PHASE_2);
 
/* STAT_PHASE_3: Submit sequence to HW */
-   START_CYCLE_COUNT();
 
if (seq_len > 0) { /* For CCM there is no sequence to setup the key */
-#ifdef ENABLE_CYCLE_COUNT
-

[PATCH 07/12] staging: ccree remove custom bitfield macros

2017-05-28 Thread Gilad Ben-Yossef 
With all users removed or re-factored to use the standard
kernel bit fields ops we can now drop the custom
bit field macros.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_bitops.h| 40 
 drivers/staging/ccree/cc_hw_queue_defs.h |  2 +-
 drivers/staging/ccree/cc_lli_defs.h  |  2 -
 drivers/staging/ccree/cc_regs.h  | 65 +---
 drivers/staging/ccree/ssi_driver.h   |  1 -
 5 files changed, 2 insertions(+), 108 deletions(-)
 delete mode 100644 drivers/staging/ccree/cc_bitops.h

diff --git a/drivers/staging/ccree/cc_bitops.h 
b/drivers/staging/ccree/cc_bitops.h
deleted file mode 100644
index a12a65c..000
--- a/drivers/staging/ccree/cc_bitops.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (C) 2012-2017 ARM Limited or its affiliates.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see .
- */
-
-/*!
- * \file cc_bitops.h
- * Bit fields operations macros.
- */
-#ifndef _CC_BITOPS_H_
-#define _CC_BITOPS_H_
-
-#include 
-#include 
-
-#define BITMASK(mask_size) (((mask_size) < 32) ? \
-   ((1UL << (mask_size)) - 1) : 0xUL)
-
-#define BITMASK_AT(mask_size, mask_offset) \
-   (BITMASK(mask_size) << (mask_offset))
-
-#define BITFIELD_GET(word, bit_offset, bit_size) \
-   (((word) >> (bit_offset)) & BITMASK(bit_size))
-#define BITFIELD_SET(word, bit_offset, bit_size, new_val)   do {\
-   word = ((word) & ~BITMASK_AT(bit_size, bit_offset)) |   \
-   (((new_val) & BITMASK(bit_size)) << (bit_offset));  \
-} while (0)
-
-#endif /*_CC_BITOPS_H_*/
diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h 
b/drivers/staging/ccree/cc_hw_queue_defs.h
index 14126e5..adc9e31 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -19,8 +19,8 @@
 
 #include 
 
-#include "cc_regs.h"
 #include "dx_crys_kernel.h"
+#include 
 
 /*
  * DEFINITIONS
diff --git a/drivers/staging/ccree/cc_lli_defs.h 
b/drivers/staging/ccree/cc_lli_defs.h
index c6b2917..3e08d86 100644
--- a/drivers/staging/ccree/cc_lli_defs.h
+++ b/drivers/staging/ccree/cc_lli_defs.h
@@ -19,8 +19,6 @@
 
 #include 
 
-#include "cc_bitops.h"
-
 /* Max DLLI size
  *  AKA DX_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE
  */
diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index 244bbae..f780ef6 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -23,7 +23,7 @@
 #ifndef _CC_REGS_H_
 #define _CC_REGS_H_
 
-#include "cc_bitops.h"
+#include 
 
 #define AXIM_MON_BASE_OFFSET CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_COMP)
 #define AXIM_MON_COMP_VALUE GENMASK(DX_AXIM_MON_COMP_VALUE_BIT_SIZE + \
@@ -34,67 +34,4 @@
 #define CC_REG_OFFSET(unit_name, reg_name)   \
(DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
 
-#define CC_REG_BIT_SHIFT(reg_name, field_name)   \
-   (DX_ ## reg_name ## _ ## field_name ## _BIT_SHIFT)
-
-/* Read-Modify-Write a field of a register */
-#define MODIFY_REGISTER_FLD(unitName, regName, fldName, fldVal) \
-do {   \
-   u32 regVal; \
-   regVal = READ_REGISTER(CC_REG_ADDR(unitName, regName));   \
-   CC_REG_FLD_SET(unitName, regName, fldName, regVal, fldVal); \
-   WRITE_REGISTER(CC_REG_ADDR(unitName, regName), regVal);   \
-} while (0)
-
-/*! Bit fields get */
-#define CC_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val)   \
-   (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ?  \
-   reg_val /*!< \internal Optimization for 32b fields */ : 
  \
-   BITFIELD_GET(reg_val, DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
-DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-
-/*! Bit fields access */
-#define CC_REG_FLD_GET2(unit_name, reg_name, fld_name, reg_val)  \
-   (CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ?  \
-   reg_val /*!< \internal Optimization for 32b fields */ : 
  \
-   BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
-CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-
-/* yael TBD !!! -

[PATCH 11/12] staging: ccree: remove dead code

2017-05-28 Thread Gilad Ben-Yossef 
Remove some unused macro definitions from hash definitions.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/hash_defs.h | 31 +++
 1 file changed, 3 insertions(+), 28 deletions(-)

diff --git a/drivers/staging/ccree/hash_defs.h 
b/drivers/staging/ccree/hash_defs.h
index 872ed97..f52656f 100644
--- a/drivers/staging/ccree/hash_defs.h
+++ b/drivers/staging/ccree/hash_defs.h
@@ -14,36 +14,11 @@
  * along with this program; if not, see .
  */
 
-#ifndef  _HASH_DEFS_H__
-#define  _HASH_DEFS_H__
+#ifndef _HASH_DEFS_H_
+#define _HASH_DEFS_H_
 
 #include "cc_crypto_ctx.h"
 
-/* this files provides definitions required for hash engine drivers */
-#ifndef CC_CONFIG_HASH_SHA_512_SUPPORTED
-#define SEP_HASH_LENGTH_WORDS  2
-#else
-#define SEP_HASH_LENGTH_WORDS  4
-#endif
-
-#ifdef BIG__ENDIAN
-#define OPAD_CURRENT_LENGTH 0x4000, 0x , 0x, 0x
-#define HASH_LARVAL_MD5  0x76543210, 0xFEDCBA98, 0x89ABCDEF, 0x01234567
-#define HASH_LARVAL_SHA1 0xF0E1D2C3, 0x76543210, 0xFEDCBA98, 0x89ABCDEF, 
0x01234567
-#define HASH_LARVAL_SHA224 0XA44FFABE, 0XA78FF964, 0X11155868, 0X310BC0FF, 
0X39590EF7, 0X17DD7030, 0X07D57C36, 0XD89E05C1
-#define HASH_LARVAL_SHA256 0X19CDE05B, 0XABD9831F, 0X8C68059B, 0X7F520E51, 
0X3AF54FA5, 0X72F36E3C, 0X85AE67BB, 0X67E6096A
-#define HASH_LARVAL_SHA384 0X1D48B547, 0XA44FFABE, 0X0D2E0CDB, 0XA78FF964, 
0X874AB48E, 0X11155868, 0X67263367, 0X310BC0FF, 0XD8EC2F15, 0X39590EF7, 
0X5A015991, 0X17DD7030, 0X2A299A62, 0X07D57C36, 0X5D9DBBCB, 0XD89E05C1
-#define HASH_LARVAL_SHA512 0X19CDE05B, 0X79217E13, 0XABD9831F, 0X6BBD41FB, 
0X8C68059B, 0X1F6C3E2B, 0X7F520E51, 0XD182E6AD, 0X3AF54FA5, 0XF1361D5F, 
0X72F36E3C, 0X2BF894FE, 0X85AE67BB, 0X3BA7CA84, 0X67E6096A, 0X08C9BCF3
-#else
-#define OPAD_CURRENT_LENGTH 0x0040, 0x, 0x, 0x
-#define HASH_LARVAL_MD5  0x10325476, 0x98BADCFE, 0xEFCDAB89, 0x67452301
-#define HASH_LARVAL_SHA1 0xC3D2E1F0, 0x10325476, 0x98BADCFE, 0xEFCDAB89, 
0x67452301
-#define HASH_LARVAL_SHA224 0xbefa4fa4, 0x64f98fa7, 0x68581511, 0xffc00b31, 
0xf70e5939, 0x3070dd17, 0x367cd507, 0xc1059ed8
-#define HASH_LARVAL_SHA256 0x5be0cd19, 0x1f83d9ab, 0x9b05688c, 0x510e527f, 
0xa54ff53a, 0x3c6ef372, 0xbb67ae85, 0x6a09e667
-#define HASH_LARVAL_SHA384 0X47B5481D, 0XBEFA4FA4, 0XDB0C2E0D, 0X64F98FA7, 
0X8EB44A87, 0X68581511, 0X67332667, 0XFFC00B31, 0X152FECD8, 0XF70E5939, 
0X9159015A, 0X3070DD17, 0X629A292A, 0X367CD507, 0XCBBB9D5D, 0XC1059ED8
-#define HASH_LARVAL_SHA512 0x5be0cd19, 0x137e2179, 0x1f83d9ab, 0xfb41bd6b, 
0x9b05688c, 0x2b3e6c1f, 0x510e527f, 0xade682d1, 0xa54ff53a, 0x5f1d36f1, 
0x3c6ef372, 0xfe94f82b, 0xbb67ae85, 0x84caa73b, 0x6a09e667, 0xf3bcc908
-#endif
-
 enum cc_hash_conf_pad {
HASH_PADDING_DISABLED = 0,
HASH_PADDING_ENABLED = 1,
@@ -57,5 +32,5 @@ enum cc_hash_cipher_pad {
HASH_CIPHER_DO_PADDING_RESERVE32 = S32_MAX,
 };
 
-#endif /*_HASH_DEFS_H__*/
+#endif /*_HASH_DEFS_H_*/
 
-- 
2.1.4

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[PATCH 08/12] staging: ccree: remove unused struct

2017-05-28 Thread Gilad Ben-Yossef 
struct SepHashPrivateContext is not used anywhere in the code.
Remove it.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/hash_defs.h | 17 -
 1 file changed, 17 deletions(-)

diff --git a/drivers/staging/ccree/hash_defs.h 
b/drivers/staging/ccree/hash_defs.h
index 6138970..9e01219 100644
--- a/drivers/staging/ccree/hash_defs.h
+++ b/drivers/staging/ccree/hash_defs.h
@@ -57,22 +57,5 @@ enum HashCipherDoPadding {
HASH_CIPHER_DO_PADDING_RESERVE32 = S32_MAX,
 };
 
-typedef struct SepHashPrivateContext {
-   /* The current length is placed at the end of the context buffer 
because the hash
-  context is used for all HMAC operations as well. HMAC context 
includes a 64 bytes
-  K0 field.  The size of struct drv_ctx_hash reserved field is  88/184 
bytes depend if t
-  he SHA512 is supported ( in this case teh context size is 256 bytes).
-  The size of struct drv_ctx_hash reseved field is 20 or 52 depend if 
the SHA512 is supported.
-  This means that this structure size (without the reserved field can 
be up to 20 bytes ,
-  in case sha512 is not suppported it is 20 bytes 
(SEP_HASH_LENGTH_WORDS define to 2 ) and in the other
-  case it is 28 (SEP_HASH_LENGTH_WORDS define to 4) */
-   u32 reserved[(sizeof(struct drv_ctx_hash)/sizeof(u32)) - 
SEP_HASH_LENGTH_WORDS - 3];
-   u32 CurrentDigestedLength[SEP_HASH_LENGTH_WORDS];
-   u32 KeyType;
-   u32 dataCompleted;
-   u32 hmacFinalization;
-   /* no space left */
-} SepHashPrivateContext_s;
-
 #endif /*_HASH_DEFS_H__*/
 
-- 
2.1.4

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[PATCH 06/12] staging: ccree: move request_mgr to generic bitfield ops

2017-05-28 Thread Gilad Ben-Yossef 
request_mgr was using custom bit field macros. move over to
standard kernel bitfield ops.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_regs.h |  5 +
 drivers/staging/ccree/ssi_request_mgr.c | 19 +--
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index 8b89f06..244bbae 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -25,6 +25,11 @@
 
 #include "cc_bitops.h"
 
+#define AXIM_MON_BASE_OFFSET CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_COMP)
+#define AXIM_MON_COMP_VALUE GENMASK(DX_AXIM_MON_COMP_VALUE_BIT_SIZE + \
+   DX_AXIM_MON_COMP_VALUE_BIT_SHIFT, \
+   DX_AXIM_MON_COMP_VALUE_BIT_SHIFT)
+
 /* Register Offset macro */
 #define CC_REG_OFFSET(unit_name, reg_name)   \
(DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index 683140a..453d731 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -35,8 +35,6 @@
 
 #define SSI_MAX_POLL_ITER  10
 
-#define AXIM_MON_BASE_OFFSET CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_COMP)
-
 struct ssi_request_mgr_handle {
/* Request manager resources */
unsigned int hw_queue_size; /* HW capability */
@@ -516,24 +514,25 @@ static void comp_handler(unsigned long devarg)
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), 
SSI_COMP_IRQ_MASK);
 
/* Avoid race with above clear: Test completion counter once 
more */
-   request_mgr_handle->axi_completed += CC_REG_FLD_GET(CRY_KERNEL, 
AXIM_MON_COMP, VALUE,
-   CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
+   request_mgr_handle->axi_completed +=
+   FIELD_GET(AXIM_MON_COMP_VALUE,
+ CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
 
while (request_mgr_handle->axi_completed) {
do {
proc_completions(drvdata);
-   /* At this point (after proc_completions()), 
request_mgr_handle->axi_completed is always 0.
-  The following assignment was changed to = 
(previously was +=) to conform KW restrictions. */
-   request_mgr_handle->axi_completed = 
CC_REG_FLD_GET(CRY_KERNEL, AXIM_MON_COMP, VALUE,
-   
CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
+   request_mgr_handle->axi_completed =
+   FIELD_GET(AXIM_MON_COMP_VALUE,
+ 
CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
} while (request_mgr_handle->axi_completed > 0);
 
/* To avoid the interrupt from firing as we unmask it, 
we clear it now */
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, 
HOST_ICR), SSI_COMP_IRQ_MASK);
 
/* Avoid race with above clear: Test completion counter 
once more */
-   request_mgr_handle->axi_completed += 
CC_REG_FLD_GET(CRY_KERNEL, AXIM_MON_COMP, VALUE,
-   CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
+   request_mgr_handle->axi_completed +=
+   FIELD_GET(AXIM_MON_COMP_VALUE,
+ 
CC_HAL_READ_REGISTER(AXIM_MON_BASE_OFFSET));
}
 
}
-- 
2.1.4

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[PATCH 09/12] staging: ccree: use snake_case for hash enums

2017-05-28 Thread Gilad Ben-Yossef 
Hash enum were named using CamelCase, move over to snake_case.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_hw_queue_defs.h | 4 ++--
 drivers/staging/ccree/hash_defs.h| 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h 
b/drivers/staging/ccree/cc_hw_queue_defs.h
index adc9e31..ec2113a 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -505,7 +505,7 @@ static inline void set_cipher_config0(struct cc_hw_desc 
*pdesc,
  * @config: Any one of the modes defined in [CC7x-DESC]
  */
 static inline void set_cipher_config1(struct cc_hw_desc *pdesc,
- enum HashConfig1Padding config)
+ enum cc_hash_conf_pad config)
 {
pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_CONF1, config);
 }
@@ -598,7 +598,7 @@ static inline void set_setup_mode(struct cc_hw_desc *pdesc,
  * @config: Any one of the cipher do defined in [CC7x-DESC]
  */
 static inline void set_cipher_do(struct cc_hw_desc *pdesc,
-enum HashCipherDoPadding config)
+enum cc_hash_cipher_pad config)
 {
pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_DO,
(config & HW_KEY_MASK_CIPHER_DO));
diff --git a/drivers/staging/ccree/hash_defs.h 
b/drivers/staging/ccree/hash_defs.h
index 9e01219..872ed97 100644
--- a/drivers/staging/ccree/hash_defs.h
+++ b/drivers/staging/ccree/hash_defs.h
@@ -44,14 +44,14 @@
 #define HASH_LARVAL_SHA512 0x5be0cd19, 0x137e2179, 0x1f83d9ab, 0xfb41bd6b, 
0x9b05688c, 0x2b3e6c1f, 0x510e527f, 0xade682d1, 0xa54ff53a, 0x5f1d36f1, 
0x3c6ef372, 0xfe94f82b, 0xbb67ae85, 0x84caa73b, 0x6a09e667, 0xf3bcc908
 #endif
 
-enum HashConfig1Padding {
+enum cc_hash_conf_pad {
HASH_PADDING_DISABLED = 0,
HASH_PADDING_ENABLED = 1,
HASH_DIGEST_RESULT_LITTLE_ENDIAN = 2,
HASH_CONFIG1_PADDING_RESERVE32 = S32_MAX,
 };
 
-enum HashCipherDoPadding {
+enum cc_hash_cipher_pad {
DO_NOT_PAD = 0,
DO_PAD = 1,
HASH_CIPHER_DO_PADDING_RESERVE32 = S32_MAX,
-- 
2.1.4

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[PATCH 12/12] staging: ccree: whitespace fixes

2017-05-28 Thread Gilad Ben-Yossef 
A bunch of whitespace fixes pointed to by checkpatch.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_regs.h|   4 +-
 drivers/staging/ccree/dx_crys_kernel.h | 308 -
 drivers/staging/ccree/dx_host.h| 256 +--
 3 files changed, 284 insertions(+), 284 deletions(-)

diff --git a/drivers/staging/ccree/cc_regs.h b/drivers/staging/ccree/cc_regs.h
index f780ef6..a82625f 100644
--- a/drivers/staging/ccree/cc_regs.h
+++ b/drivers/staging/ccree/cc_regs.h
@@ -14,10 +14,10 @@
  * along with this program; if not, see .
  */
 
-
 /*!
  * @file
- * @brief This file contains macro definitions for accessing ARM TrustZone 
CryptoCell register space.
+ * @brief This file contains macro definitions for accessing ARM TrustZone
+ * CryptoCell register space.
  */
 
 #ifndef _CC_REGS_H_
diff --git a/drivers/staging/ccree/dx_crys_kernel.h 
b/drivers/staging/ccree/dx_crys_kernel.h
index a776e24..2196030 100644
--- a/drivers/staging/ccree/dx_crys_kernel.h
+++ b/drivers/staging/ccree/dx_crys_kernel.h
@@ -20,161 +20,161 @@
 // --
 // BLOCK: DSCRPTR
 // --
-#define DX_DSCRPTR_COMPLETION_COUNTER_REG_OFFSET   0xE00UL
-#define DX_DSCRPTR_COMPLETION_COUNTER_COMPLETION_COUNTER_BIT_SHIFT 0x0UL
-#define DX_DSCRPTR_COMPLETION_COUNTER_COMPLETION_COUNTER_BIT_SIZE  0x6UL
-#define DX_DSCRPTR_COMPLETION_COUNTER_OVERFLOW_COUNTER_BIT_SHIFT   0x6UL
-#define DX_DSCRPTR_COMPLETION_COUNTER_OVERFLOW_COUNTER_BIT_SIZE0x1UL
-#define DX_DSCRPTR_SW_RESET_REG_OFFSET 0xE40UL
-#define DX_DSCRPTR_SW_RESET_VALUE_BIT_SHIFT0x0UL
-#define DX_DSCRPTR_SW_RESET_VALUE_BIT_SIZE 0x1UL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_REG_OFFSET  0xE60UL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_NUM_OF_DSCRPTR_BIT_SHIFT0x0UL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_NUM_OF_DSCRPTR_BIT_SIZE 0xAUL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_DSCRPTR_SRAM_SIZE_BIT_SHIFT 0xAUL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_DSCRPTR_SRAM_SIZE_BIT_SIZE  0xCUL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_SRAM_SIZE_BIT_SHIFT 0x16UL
-#define DX_DSCRPTR_QUEUE_SRAM_SIZE_SRAM_SIZE_BIT_SIZE  0x3UL
-#define DX_DSCRPTR_SINGLE_ADDR_EN_REG_OFFSET   0xE64UL
-#define DX_DSCRPTR_SINGLE_ADDR_EN_VALUE_BIT_SHIFT  0x0UL
-#define DX_DSCRPTR_SINGLE_ADDR_EN_VALUE_BIT_SIZE   0x1UL
-#define DX_DSCRPTR_MEASURE_CNTR_REG_OFFSET 0xE68UL
-#define DX_DSCRPTR_MEASURE_CNTR_VALUE_BIT_SHIFT0x0UL
-#define DX_DSCRPTR_MEASURE_CNTR_VALUE_BIT_SIZE 0x20UL
-#define DX_DSCRPTR_QUEUE_WORD0_REG_OFFSET  0xE80UL
-#define DX_DSCRPTR_QUEUE_WORD0_VALUE_BIT_SHIFT 0x0UL
-#define DX_DSCRPTR_QUEUE_WORD0_VALUE_BIT_SIZE  0x20UL
-#define DX_DSCRPTR_QUEUE_WORD1_REG_OFFSET  0xE84UL
-#define DX_DSCRPTR_QUEUE_WORD1_DIN_DMA_MODE_BIT_SHIFT  0x0UL
-#define DX_DSCRPTR_QUEUE_WORD1_DIN_DMA_MODE_BIT_SIZE   0x2UL
-#define DX_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SHIFT  0x2UL
-#define DX_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE   0x18UL
-#define DX_DSCRPTR_QUEUE_WORD1_NS_BIT_BIT_SHIFT0x1AUL
-#define DX_DSCRPTR_QUEUE_WORD1_NS_BIT_BIT_SIZE 0x1UL
-#define DX_DSCRPTR_QUEUE_WORD1_DIN_CONST_VALUE_BIT_SHIFT   0x1BUL
-#define DX_DSCRPTR_QUEUE_WORD1_DIN_CONST_VALUE_BIT_SIZE0x1UL
-#define DX_DSCRPTR_QUEUE_WORD1_NOT_LAST_BIT_SHIFT  0x1CUL
-#define DX_DSCRPTR_QUEUE_WORD1_NOT_LAST_BIT_SIZE   0x1UL
-#define DX_DSCRPTR_QUEUE_WORD1_LOCK_QUEUE_BIT_SHIFT0x1DUL
-#define DX_DSCRPTR_QUEUE_WORD1_LOCK_QUEUE_BIT_SIZE 0x1UL
-#define DX_DSCRPTR_QUEUE_WORD1_NOT_USED_BIT_SHIFT  0x1EUL
-#define DX_DSCRPTR_QUEUE_WORD1_NOT_USED_BIT_SIZE   0x2UL
-#define DX_DSCRPTR_QUEUE_WORD2_REG_OFFSET  0xE88UL
-#define DX_DSCRPTR_QUEUE_WORD2_VALUE_BIT_SHIFT 0x0UL
-#define DX_DSCRPTR_QUEUE_WORD2_VALUE_BIT_SIZE  0x20UL
-#define DX_DSCRPTR_QUEUE_WORD3_REG_OFFSET  0xE8CUL
-#define DX_DSCRPTR_QUEUE_WORD3_DOUT_DMA_MODE_BIT_SHIFT 0x0UL
-#define DX_DSCRPTR_QUEUE_WORD3_DOUT_DMA_MODE_BIT_SIZE  0x2UL
-#define DX_DSCRPTR_QUEUE_WORD3_DOUT_SIZE_BIT_SHIFT 0x2UL
-#define DX_DSCRPTR_QUEUE_WORD3_DOUT_SIZE_BIT_SIZE  0x18UL
-#define DX_DSCRPTR_QUEUE_WORD3_NS_BIT_BIT_SHIFT0x1AUL
-#define DX_DSCRPTR_QUEUE_WORD3_NS_BIT_BIT_SIZE 0x1UL
-#define DX_DSCRPTR_QUEUE_WORD3_DOUT_LAST_IND_BIT_SHIFT 0x1BUL
-#define DX_DSCRPTR_QUEUE_WORD3_DOUT_LAST_IND_BIT_SIZE  0x1UL
-#define DX_DSCRPTR_QUEUE_WORD3_HASH_XOR_BIT_BIT_SHIFT  0x1DUL
-#define DX_DSCRPTR_QUEUE_WORD3_HASH_XOR_BIT_BIT_SIZE   0x1UL
-#define DX_DSCRPTR_QUEUE_WORD3_NOT_USED_BIT_SHIFT  0x1EUL
-#define DX_DSCRPTR_QUEUE_WORD3_NOT_USED_BIT_SIZE   0x1UL
-#define DX_DSCRPTR_QUEUE_WORD3_QUEUE_LAST_IND_BIT_SHIFT0x1FUL
-#define DX_DSCRPTR_QUEUE_WORD3_QUEUE_LAST_IND_BIT_SIZE 0x1UL
-#define DX_DSCRPTR_QUEUE_WORD4_REG_OFFSET  0xE90UL
-#define DX_DSCRPTR_QUEUE_WORD4_DATA_FLOW_MODE_BIT_SHIFT0x0UL
-#define

[PATCH 10/12] staging: ccree: drop no longer used macro

2017-05-28 Thread Gilad Ben-Yossef 
MSB64 macro is no longer used or needed. Drop it.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_hw_queue_defs.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h 
b/drivers/staging/ccree/cc_hw_queue_defs.h
index ec2113a..f12761a 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -237,8 +237,6 @@ static inline void set_ack_last(struct cc_hw_desc *pdesc)
pdesc->word[4] |= FIELD_PREP(WORD4_ACK_NEEDED, 1);
 }
 
-#define MSB64(_addr) (sizeof(_addr) == 4 ? 0 : ((_addr) >> 32) & U16_MAX)
-
 /*
  * Set the DIN field of a HW descriptors
  *
-- 
2.1.4

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Re: [PATCH] staging: iio: ad7152: Fix deadlock in ad7152_write_raw_samp_freq()

2017-05-28 Thread Jonathan Cameron 
On Sun, 28 May 2017 11:47:04 +0200
Lars-Peter Clausen  wrote:

> On 05/27/2017 12:53 AM, Alexey Khoroshilov wrote:
> > ad7152_write_raw_samp_freq() is called by ad7152_write_raw() with
> > chip->state_lock held. So, there is unavoidable deadlock when
> > ad7152_write_raw_samp_freq() locks the mutex itself.
> > 
> > The patch removes unneeded locking.
> > 
> > Found by Linux Driver Verification project (linuxtesting.org).
> > 
> > Signed-off-by: Alexey Khoroshilov   
> 
> Looks good, thanks.
> 
> Fixes: 6572389bcc11 ("staging: iio: cdc: ad7152: Implement
> IIO_CHAN_INFO_SAMP_FREQ attribute")
> Acked-by: Lars-Peter Clausen 
Applied to the fixes-togreg branch of iio.git.

Thanks,

Jonathan
> 
> 
> > ---
> >  drivers/staging/iio/cdc/ad7152.c | 6 +-
> >  1 file changed, 1 insertion(+), 5 deletions(-)
> > 
> > diff --git a/drivers/staging/iio/cdc/ad7152.c 
> > b/drivers/staging/iio/cdc/ad7152.c
> > index dc6ecd824365..ff10d1f0a7e4 100644
> > --- a/drivers/staging/iio/cdc/ad7152.c
> > +++ b/drivers/staging/iio/cdc/ad7152.c
> > @@ -231,16 +231,12 @@ static int ad7152_write_raw_samp_freq(struct device 
> > *dev, int val)
> > if (i >= ARRAY_SIZE(ad7152_filter_rate_table))
> > i = ARRAY_SIZE(ad7152_filter_rate_table) - 1;
> >  
> > -   mutex_lock(&chip->state_lock);
> > ret = i2c_smbus_write_byte_data(chip->client,
> > AD7152_REG_CFG2, AD7152_CFG2_OSR(i));
> > -   if (ret < 0) {
> > -   mutex_unlock(&chip->state_lock);
> > +   if (ret < 0)
> > return ret;
> > -   }
> >  
> > chip->filter_rate_setup = i;
> > -   mutex_unlock(&chip->state_lock);
> >  
> > return ret;
> >  }
> >   
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

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[PATCH] staging: atomisp: lm3554: fix sparse warnings(was not declared. Should it be static?)

2017-05-28 Thread Chen Guanqiao 
Fix "symbol 'xxx' was not declared. Should it be static?" sparse warnings.

Signed-off-by: Chen Guanqiao 
---
 drivers/staging/media/atomisp/i2c/lm3554.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/media/atomisp/i2c/lm3554.c 
b/drivers/staging/media/atomisp/i2c/lm3554.c
index dd9c9c37..2b170c07aaba 100644
--- a/drivers/staging/media/atomisp/i2c/lm3554.c
+++ b/drivers/staging/media/atomisp/i2c/lm3554.c
@@ -497,7 +497,7 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
.g_volatile_ctrl = lm3554_g_volatile_ctrl
 };
 
-struct v4l2_ctrl_config lm3554_controls[] = {
+static const struct v4l2_ctrl_config lm3554_controls[] = {
{
 .ops = &ctrl_ops,
 .id = V4L2_CID_FLASH_TIMEOUT,
@@ -825,7 +825,7 @@ static int lm3554_gpio_uninit(struct i2c_client *client)
return 0;
 }
 
-void *lm3554_platform_data_func(struct i2c_client *client)
+static void *lm3554_platform_data_func(struct i2c_client *client)
 {
static struct lm3554_platform_data platform_data;
 
-- 
2.11.0



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[PATCH 09/11] Staging: android: fix sizeof style issue

2017-05-28 Thread Mateusz Nowotyński 
Converts sizeof(type) to sizeof(variable) in android/ion/ion_system_heap.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion_system_heap.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/android/ion/ion_system_heap.c 
b/drivers/staging/android/ion/ion_system_heap.c
index 2c5bfbf..4dc5d7a 100644
--- a/drivers/staging/android/ion/ion_system_heap.c
+++ b/drivers/staging/android/ion/ion_system_heap.c
@@ -152,7 +152,7 @@ static int ion_system_heap_allocate(struct ion_heap *heap,
max_order = compound_order(page);
i++;
}
-   table = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
+   table = kmalloc(sizeof(*table), GFP_KERNEL);
if (!table)
goto free_pages;
 
@@ -381,7 +381,7 @@ static int ion_system_contig_heap_allocate(struct ion_heap 
*heap,
for (i = len >> PAGE_SHIFT; i < (1 << order); i++)
__free_page(page + i);
 
-   table = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
+   table = kmalloc(sizeof(*table), GFP_KERNEL);
if (!table) {
ret = -ENOMEM;
goto free_pages;
@@ -431,7 +431,7 @@ static struct ion_heap 
*__ion_system_contig_heap_create(void)
 {
struct ion_heap *heap;
 
-   heap = kzalloc(sizeof(struct ion_heap), GFP_KERNEL);
+   heap = kzalloc(sizeof(*heap), GFP_KERNEL);
if (!heap)
return ERR_PTR(-ENOMEM);
heap->ops = &kmalloc_ops;
-- 
2.10.2

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[PATCH 07/11] Staging: android: fix sizeof style issue

2017-05-28 Thread Mateusz Nowotyński 
Converts sizeof(type) to sizeof(variable) in android/ion/ion_cma_heap.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion_cma_heap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/android/ion/ion_cma_heap.c 
b/drivers/staging/android/ion/ion_cma_heap.c
index b06f4ce..bb2c144 100644
--- a/drivers/staging/android/ion/ion_cma_heap.c
+++ b/drivers/staging/android/ion/ion_cma_heap.c
@@ -45,7 +45,7 @@ static int ion_cma_allocate(struct ion_heap *heap, struct 
ion_buffer *buffer,
if (!pages)
return -ENOMEM;
 
-   table = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
+   table = kmalloc(sizeof(*table), GFP_KERNEL);
if (!table)
goto err;
 
-- 
2.10.2

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[PATCH 06/11] Staging: android: remove unnecessary blank lines

2017-05-28 Thread Mateusz Nowotyński 
Removes unnecessary blank lines in android/ion/ion_cma_heap.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion_cma_heap.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/android/ion/ion_cma_heap.c 
b/drivers/staging/android/ion/ion_cma_heap.c
index a0949bc..b06f4ce 100644
--- a/drivers/staging/android/ion/ion_cma_heap.c
+++ b/drivers/staging/android/ion/ion_cma_heap.c
@@ -31,7 +31,6 @@ struct ion_cma_heap {
 
 #define to_cma_heap(x) container_of(x, struct ion_cma_heap, heap)
 
-
 /* ION CMA heap operations functions */
 static int ion_cma_allocate(struct ion_heap *heap, struct ion_buffer *buffer,
unsigned long len,
-- 
2.10.2

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[PATCH 08/11] Staging: android: Remove unnecessary blank lines

2017-05-28 Thread Mateusz Nowotyński 
Removes unnecessary blank lines in android/ion/ion_system_heap.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion_system_heap.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/staging/android/ion/ion_system_heap.c 
b/drivers/staging/android/ion/ion_system_heap.c
index c50f2d9..2c5bfbf 100644
--- a/drivers/staging/android/ion/ion_system_heap.c
+++ b/drivers/staging/android/ion/ion_system_heap.c
@@ -98,7 +98,6 @@ static void free_buffer_page(struct ion_system_heap *heap,
ion_page_pool_free(pool, page);
 }
 
-
 static struct page *alloc_largest_available(struct ion_system_heap *heap,
struct ion_buffer *buffer,
unsigned long size,
@@ -256,7 +255,6 @@ static struct ion_heap_ops system_heap_ops = {
 static int ion_system_heap_debug_show(struct ion_heap *heap, struct seq_file 
*s,
  void *unused)
 {
-
struct ion_system_heap *sys_heap = container_of(heap,
struct ion_system_heap,
heap);
-- 
2.10.2

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[PATCH 04/11] Staging: android: remove unnecessary blank lines

2017-05-28 Thread Mateusz Nowotyński 
Removes unnecessary blank lines in android/ion/ion.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/staging/android/ion/ion.c 
b/drivers/staging/android/ion/ion.c
index e10c696..11acbe2 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -264,7 +264,6 @@ static void ion_dma_buf_detatch(struct dma_buf *dmabuf,
kfree(a);
 }
 
-
 static struct sg_table *ion_map_dma_buf(struct dma_buf_attachment *attachment,
enum dma_data_direction direction)
 {
@@ -354,7 +353,6 @@ static int ion_dma_buf_begin_cpu_access(struct dma_buf 
*dmabuf,
mutex_unlock(&buffer->lock);
}
 
-
mutex_lock(&buffer->lock);
list_for_each_entry(a, &buffer->attachments, list) {
dma_sync_sg_for_cpu(a->dev, a->table->sgl, a->table->nents,
-- 
2.10.2

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[PATCH 02/11] Staging: android: NULL comparasion in ion.c file

2017-05-28 Thread Mateusz Nowotyński 
Fixes NULL comparison coding style issues in
android/ion/ion.c file
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/android/ion/ion.c 
b/drivers/staging/android/ion/ion.c
index 03d3a4f..73f90e6 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -103,7 +103,7 @@ static struct ion_buffer *ion_buffer_create(struct ion_heap 
*heap,
goto err2;
}
 
-   if (buffer->sg_table == NULL) {
+   if (!buffer->sg_table) {
WARN_ONCE(1, "This heap needs to set the sgtable");
ret = -EINVAL;
goto err1;
@@ -163,7 +163,7 @@ static void *ion_buffer_kmap_get(struct ion_buffer *buffer)
return buffer->vaddr;
}
vaddr = buffer->heap->ops->map_kernel(buffer->heap, buffer);
-   if (WARN_ONCE(vaddr == NULL,
+   if (WARN_ONCE(!vaddr,
  "heap->ops->map_kernel should return ERR_PTR on error"))
return ERR_PTR(-EINVAL);
if (IS_ERR(vaddr))
@@ -435,7 +435,7 @@ int ion_alloc(size_t len, unsigned int heap_id_mask, 
unsigned int flags)
}
up_read(&dev->lock);
 
-   if (buffer == NULL)
+   if (!buffer)
return -ENODEV;
 
if (IS_ERR(buffer))
-- 
2.10.2

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[PATCH 03/11] Staging: android: Fix alignment issue in ion.c

2017-05-28 Thread Mateusz Nowotyński 
Fixes code alignment style issues in android/ion/ion.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/android/ion/ion.c 
b/drivers/staging/android/ion/ion.c
index 73f90e6..e10c696 100644
--- a/drivers/staging/android/ion/ion.c
+++ b/drivers/staging/android/ion/ion.c
@@ -221,7 +221,7 @@ struct ion_dma_buf_attachment {
 };
 
 static int ion_dma_buf_attach(struct dma_buf *dmabuf, struct device *dev,
-   struct dma_buf_attachment *attachment)
+ struct dma_buf_attachment *attachment)
 {
struct ion_dma_buf_attachment *a;
struct sg_table *table;
@@ -358,7 +358,7 @@ static int ion_dma_buf_begin_cpu_access(struct dma_buf 
*dmabuf,
mutex_lock(&buffer->lock);
list_for_each_entry(a, &buffer->attachments, list) {
dma_sync_sg_for_cpu(a->dev, a->table->sgl, a->table->nents,
-   DMA_BIDIRECTIONAL);
+   DMA_BIDIRECTIONAL);
}
mutex_unlock(&buffer->lock);
 
@@ -380,7 +380,7 @@ static int ion_dma_buf_end_cpu_access(struct dma_buf 
*dmabuf,
mutex_lock(&buffer->lock);
list_for_each_entry(a, &buffer->attachments, list) {
dma_sync_sg_for_device(a->dev, a->table->sgl, a->table->nents,
-   DMA_BIDIRECTIONAL);
+  DMA_BIDIRECTIONAL);
}
mutex_unlock(&buffer->lock);
 
-- 
2.10.2

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[PATCH 01/11] Staging: android: Fix style issue in ion-ioctl.c

2017-05-28 Thread Mateusz Nowotyński 
This is patch fixing code alignment style issue in
android/ion/ion-ioctl.c file
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion-ioctl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/android/ion/ion-ioctl.c 
b/drivers/staging/android/ion/ion-ioctl.c
index 76427e4..d9f8b14 100644
--- a/drivers/staging/android/ion/ion-ioctl.c
+++ b/drivers/staging/android/ion/ion-ioctl.c
@@ -83,8 +83,8 @@ long ion_ioctl(struct file *filp, unsigned int cmd, unsigned 
long arg)
int fd;
 
fd = ion_alloc(data.allocation.len,
-   data.allocation.heap_id_mask,
-   data.allocation.flags);
+  data.allocation.heap_id_mask,
+  data.allocation.flags);
if (fd < 0)
return fd;
 
-- 
2.10.2

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[PATCH 10/11] Staging: android: Fix code alignment issue

2017-05-28 Thread Mateusz Nowotyński 
Fixes code alignment issue in ion/ion.h
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/android/ion/ion.h 
b/drivers/staging/android/ion/ion.h
index ace8416..4f04f65 100644
--- a/drivers/staging/android/ion/ion.h
+++ b/drivers/staging/android/ion/ion.h
@@ -240,8 +240,8 @@ int ion_heap_buffer_zero(struct ion_buffer *buffer);
 int ion_heap_pages_zero(struct page *page, size_t size, pgprot_t pgprot);
 
 int ion_alloc(size_t len,
-   unsigned int heap_id_mask,
-   unsigned int flags);
+ unsigned int heap_id_mask,
+ unsigned int flags);
 
 /**
  * ion_heap_init_shrinker
@@ -305,7 +305,7 @@ size_t ion_heap_freelist_drain(struct ion_heap *heap, 
size_t size);
  * flag.
  */
 size_t ion_heap_freelist_shrink(struct ion_heap *heap,
-   size_t size);
+   size_t size);
 
 /**
  * ion_heap_freelist_size - returns the size of the freelist in bytes
@@ -366,7 +366,7 @@ void ion_page_pool_free(struct ion_page_pool *pool, struct 
page *page);
  * returns the number of items freed in pages
  */
 int ion_page_pool_shrink(struct ion_page_pool *pool, gfp_t gfp_mask,
- int nr_to_scan);
+int nr_to_scan);
 
 long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
 
-- 
2.10.2

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[PATCH 11/11] Staging: android: use BIT macro

2017-05-28 Thread Mateusz Nowotyński 
Use BIT macro instead of left shifting in android/ion/ion.h
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/android/ion/ion.h 
b/drivers/staging/android/ion/ion.h
index 4f04f65..6cc720b 100644
--- a/drivers/staging/android/ion/ion.h
+++ b/drivers/staging/android/ion/ion.h
@@ -149,7 +149,7 @@ struct ion_heap_ops {
 /**
  * heap flags - flags between the heaps and core ion code
  */
-#define ION_HEAP_FLAG_DEFER_FREE (1 << 0)
+#define ION_HEAP_FLAG_DEFER_FREE BIT(0)
 
 /**
  * private flags - flags internal to ion
@@ -160,7 +160,7 @@ struct ion_heap_ops {
  * any buffer storage that came from the system allocator will be
  * returned to the system allocator.
  */
-#define ION_PRIV_FLAG_SHRINKER_FREE (1 << 0)
+#define ION_PRIV_FLAG_SHRINKER_FREE BIT(0)
 
 /**
  * struct ion_heap - represents a heap in the system
-- 
2.10.2

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[PATCH 05/11] Staging: android: Fix code alignment issue

2017-05-28 Thread Mateusz Nowotyński 
Fixes code alignment issue in ion/ion_carveout_heap.c
Signed-off-by: Mateusz Nowotyński 
---
 drivers/staging/android/ion/ion_carveout_heap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/android/ion/ion_carveout_heap.c 
b/drivers/staging/android/ion/ion_carveout_heap.c
index 5fdc1f3..fee7650 100644
--- a/drivers/staging/android/ion/ion_carveout_heap.c
+++ b/drivers/staging/android/ion/ion_carveout_heap.c
@@ -33,7 +33,7 @@ struct ion_carveout_heap {
 };
 
 static phys_addr_t ion_carveout_allocate(struct ion_heap *heap,
-unsigned long size)
+unsigned long size)
 {
struct ion_carveout_heap *carveout_heap =
container_of(heap, struct ion_carveout_heap, heap);
-- 
2.10.2

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Re: [PATCH] staging: atomisp: lm3554: fix sparse warnings(was not declared. Should it be static?)

2017-05-28 Thread Alan Cox 
On Mon, 29 May 2017 02:06:41 +0800
Chen Guanqiao  wrote:

> Fix "symbol 'xxx' was not declared. Should it be static?" sparse warnings.
> 
> Signed-off-by: Chen Guanqiao 
> ---

Reviewed-by: Alan Cox 

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