drm: imx: multi-display support questions
Hi all, After a few days of experimentation on multi-display support on i.MX6, I have some questions regarding the status of the imx-drm driver. Here is description of my testing setup: - Nitrogen6x (a SabreLite would work the same) - Mainline kernel 4.1-rc2 + a few patches for display support (some are pending, other are scheduled for 4.2) https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=132811 https://patchwork.kernel.org/patch/6439221/ https://patchwork.kernel.org/patch/6439231/ https://patchwork.kernel.org/patch/6212451/ - Available displays: - 1 LVDS 10" Hannstar HSD100PXN1 display - 1 LCD 7" Okaya display - 1 HDMI 1080p TV - U-boot script used to boot the mainline kernel properly: https://github.com/boundarydevices/u-boot-imx6/blob/staging/board/boundary/nitrogen6x/6x_bootscript-mainline.txt - Basic Buildroot filesystem with libdrm and its test binaries First of all, using the standard imx_v6_v7_defconfig, everything runs fine with a single-display setup, no matter if it is using LVDS, RGB or HDMI interface. But in multi-display setup, the first observation is that CONFIG_DRM_IMX_FB_HELPER seems to be problematic. When this option is set, only one display can be used either using the /dev/fb0 or 'modetest -s' from libdrm test binaries. As soon as the option is removed, every display can be used properly with the following commands: # modetest -M imx-drm -s 32:800x480 # modetest -M imx-drm -s 34:1920x1080 # modetest -M imx-drm -s 36:1024x768 Is this option only meant for single-display setup? Has it been tested in multi-display? It seems limited to fb0 creation, would it be possible to make the driver create as many fbs as the number of monitors? Also, when trying to display different patterns on each and every display at once, I have been using the example provided by David Herrmann: https://github.com/dvdhrm/docs/blob/master/drm-howto/modeset.c This shows a clocking issue when using both DRM_IMX_PARALLEL_DISPLAY and DRM_IMX_LDB at the same time. Although the driver is smart enough to connect ipu1_di0 to the RGB interface and ipu1_di1 to the LVDS interface, the clock set by the LDB driver (65MHz) is overwritten when the parallel interface is enabled as they both share pll5_video. Has anyone successfully tried using both drivers, LVDS and parallel, at the same time? Then I've run into Steve's series that seems to address some clocking issues. http://lists.freedesktop.org/archives/dri-devel/2014-October/070996.html Is there the equivalent series for the driver since it has moved from staging? Hope the above description is sufficient, if needed I can provide modeprint/modetest/clk_summary outputs. Regards, Gary
drm: imx: multi-display support questions
Philipp, All, On Wed, May 27, 2015 at 11:38 AM, Philipp Zabel wrote: > Hi Gary, > > Am Dienstag, den 26.05.2015, 16:47 +0200 schrieb Gary Bisson: >> Hi all, >> >> After a few days of experimentation on multi-display support on i.MX6, I >> have some questions regarding the status of the imx-drm driver. >> >> Here is description of my testing setup: >> - Nitrogen6x (a SabreLite would work the same) >> - Mainline kernel 4.1-rc2 + a few patches for display support (some are >> pending, other are scheduled for 4.2) >> https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=132811 >> https://patchwork.kernel.org/patch/6439221/ >> https://patchwork.kernel.org/patch/6439231/ >> https://patchwork.kernel.org/patch/6212451/ >> - Available displays: >> - 1 LVDS 10" Hannstar HSD100PXN1 display >> - 1 LCD 7" Okaya display >> - 1 HDMI 1080p TV >> - U-boot script used to boot the mainline kernel properly: >> https://github.com/boundarydevices/u-boot-imx6/blob/staging/board/boundary/nitrogen6x/6x_bootscript-mainline.txt >> - Basic Buildroot filesystem with libdrm and its test binaries >> >> First of all, using the standard imx_v6_v7_defconfig, everything runs >> fine with a single-display setup, no matter if it is using LVDS, RGB or >> HDMI interface. >> >> But in multi-display setup, the first observation is that >> CONFIG_DRM_IMX_FB_HELPER seems to be problematic. When this option is >> set, only one display can be used either using the /dev/fb0 or 'modetest >> -s' from libdrm test binaries. As soon as the option is removed, every >> display can be used properly with the following commands: >> # modetest -M imx-drm -s 32:800x480 >> # modetest -M imx-drm -s 34:1920x1080 >> # modetest -M imx-drm -s 36:1024x768 >> >> Is this option only meant for single-display setup? Has it been tested >> in multi-display? >> >> It seems limited to fb0 creation, would it be possible to make the >> driver create as many fbs as the number of monitors? > > According to the kerneldoc comment for drm_fb_helper_initial_config > (which is used by imx-drm via drm_fbdev_cma_init), it should set up a > single /dev/fb cloned over all connectors. This works here with LVDS and > HDMI. Does it require the two displays to have the exact same resolution? I'm wondering what is wrong with my setup but with a 1024x768 LVDS and a 1920x1080 HDMI display no image is shown on the HDMI (no signal). The CRTC settings show that both have the same origin (0,0) so I expected the LVDS to display a part of what the HDMI *should* display. I get the following traces when trying to display something on HDMI: # modetest -M imx-drm -s 34:1920x1080 setting mode 1920x1080-50Hz at XR24 on connectors 34, crtc 18 [ 350.915681] imx-ipuv3 240.ipu: DC stop timeout after 50 ms Then trying to display something through the fbdev results in the LVDS being updated but still no signal on HDMI. # cat /dev/urandom > /dev/fb0 Once again, as soon as I remove the IMX_FB_HELPER configuration everything runs fine. >> Also, when trying to display different patterns on each and every >> display at once, I have been using the example provided by David >> Herrmann: >> https://github.com/dvdhrm/docs/blob/master/drm-howto/modeset.c >> This shows a clocking issue when using both DRM_IMX_PARALLEL_DISPLAY and >> DRM_IMX_LDB at the same time. Although the driver is smart enough to >> connect ipu1_di0 to the RGB interface and ipu1_di1 to the LVDS >> interface, the clock set by the LDB driver (65MHz) is overwritten when >> the parallel interface is enabled as they both share pll5_video. >> >> Has anyone successfully tried using both drivers, LVDS and parallel, at >> the same time? > > For parallel and LVDS we'd either need to force the parallel panel to be > clocked by the IPU internal clock, or move one or the other external > clock source off of pll5_video. Do you have a preference for one solution over the other? > I have used a LVDS panel which could be driven from the mmdc_ch1_axi > clock, but there are some issues when switching the LDB_DI clock > parents: > http://marc.info/?l=linux-arm-kernel&m=142055950831840&w=2 I will look into this approach. >> Then I've run into Steve's series that seems to address some clocking >> issues. >> http://lists.freedesktop.org/archives/dri-devel/2014-October/070996.html >> >> Is there the equivalent series for the driver since it has moved from >> staging? > > A few of the patches have been reposted and some of them applied. > I'm not aware of a rebased version of the DI clock parent patch. Ok, thanks, I'll check and see what I need to get all the displays to work together. Regards, Gary
[PATCH] drm/panel: Add display timing for Okaya RS800480T-7X0GP
Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
driver.
The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
LCD interface. It supports pixel clocks in the range of 30-40 MHz.
This panel details can be found at:
http://boundarydevices.com/product/7-800x480-display/
Signed-off-by: Gary Bisson
---
Hi all,
This patch is the follow-up of a request from Philipp to add the Okaya display
to the simple panel driver.
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/346657.html
Regards,
Gary
---
.../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 ++
.../devicetree/bindings/vendor-prefixes.txt| 1 +
drivers/gpu/drm/panel/panel-simple.c | 27 ++
3 files changed, 35 insertions(+)
create mode 100644
Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
diff --git a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
new file mode 100644
index 000..f7c729d
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
@@ -0,0 +1,7 @@
+OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
+
+Required properties:
+- compatible: should be "okaya,rs800480t_7x0gp"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 4f35a00..06ce91c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -145,6 +145,7 @@ nintendoNintendo
nokia Nokia
nvidia NVIDIA
nxpNXP Semiconductors
+okaya OKAYA Electric America, Inc.
onnn ON Semiconductor Corp.
opencores OpenCores.org
ortustech Ortus Technology Co., Ltd.
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index 97b66b8..e511a22 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -942,6 +942,30 @@ static const struct panel_desc lg_lp129qe = {
},
};
+static const struct display_timing okaya_rs800480t_7x0gp_timing = {
+ .pixelclock = { 3000, 3000, 4000 },
+ .hactive = { 800, 800, 800 },
+ .hfront_porch = { 40, 40, 40 },
+ .hback_porch = { 40, 40, 40 },
+ .hsync_len = { 1, 48, 48 },
+ .vactive = { 480, 480, 480 },
+ .vfront_porch = { 13, 13, 13 },
+ .vback_porch = { 29, 29, 29 },
+ .vsync_len = { 3, 3, 3 },
+ .flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc okaya_rs800480t_7x0gp = {
+ .timings = &okaya_rs800480t_7x0gp_timing,
+ .num_timings = 1,
+ .bpc = 6,
+ .size = {
+ .width = 154,
+ .height = 87,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
.clock = 25000,
.hdisplay = 480,
@@ -1112,6 +1136,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "lg,lp129qe",
.data = &lg_lp129qe,
}, {
+ .compatible = "okaya,rs800480t_7x0gp",
+ .data = &okaya_rs800480t_7x0gp,
+ }, {
.compatible = "ortustech,com43h4m85ulc",
.data = &ortustech_com43h4m85ulc,
}, {
--
2.1.4
[PATCH 0/2] Add support for Tianma TM070JDHG30 display
Hi all, This series adds support for the Tianma TM070JDHG30 7" display (1280x800). http://usa.tianma.com/products-technology/product/tm070jdhg30-00 https://boundarydevices.com/product/bd070lic2/ The first patch adds Tianma as a new vendor prefix whereas the second patch adds the display to the simple panel driver. Regards, Gary Gary Bisson (2): of: Add vendor prefix for Tianma Micro-electronics drm/panel: simple: Add support for Tianma TM070JDHG30 .../bindings/display/panel/tianma,tm070jdhg30.txt | 7 ++ .../devicetree/bindings/vendor-prefixes.txt| 1 + drivers/gpu/drm/panel/panel-simple.c | 27 ++ 3 files changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/tianma,tm070jdhg30.txt -- 2.9.3
[PATCH 1/2] of: Add vendor prefix for Tianma Micro-electronics
Tianma Micro-electronics Co., Ltd. (Tianma) specializes in providing display solutions and efficient support services worldwide. More info: http://en.tianma.com/about.shtml Signed-off-by: Gary Bisson --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 163f84b..3d1ec68 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -291,6 +291,7 @@ technologic Technologic Systems terasicTerasic Inc. thine THine Electronics, Inc. ti Texas Instruments +tianma Tianma Micro-electronics Co., Ltd. tlmTrusted Logic Mobility topeet Topeet toradexToradex AG -- 2.9.3
[PATCH 2/2] drm/panel: simple: Add support for Tianma TM070JDHG30
The Tianma TM070JDHG30 is a 7" LVDS display with a resolution of
1280x800.
http://usa.tianma.com/products-technology/product/tm070jdhg30-00
You can also find this product along with a FT5x06 touch controller
from Boundary Devices:
https://boundarydevices.com/product/bd070lic2/
Signed-off-by: Gary Bisson
---
.../bindings/display/panel/tianma,tm070jdhg30.txt | 7 ++
drivers/gpu/drm/panel/panel-simple.c | 27 ++
2 files changed, 34 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/tianma,tm070jdhg30.txt
diff --git
a/Documentation/devicetree/bindings/display/panel/tianma,tm070jdhg30.txt
b/Documentation/devicetree/bindings/display/panel/tianma,tm070jdhg30.txt
new file mode 100644
index 000..eb9501a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/tianma,tm070jdhg30.txt
@@ -0,0 +1,7 @@
+Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel
+
+Required properties:
+- compatible: should be "tianma,tm070jdhg30"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index 113db3c..bc3dd46 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1471,6 +1471,30 @@ static const struct panel_desc starry_kr122ea0sra = {
},
};
+static const struct display_timing tianma_tm070jdhg30_timing = {
+ .pixelclock = { 6260, 6820, 7810 },
+ .hactive = { 1280, 1280, 1280 },
+ .hfront_porch = { 15, 64, 159 },
+ .hback_porch = { 5, 5, 5 },
+ .hsync_len = { 1, 1, 256 },
+ .vactive = { 800, 800, 800 },
+ .vfront_porch = { 3, 40, 99 },
+ .vback_porch = { 2, 2, 2 },
+ .vsync_len = { 1, 1, 128 },
+ .flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc tianma_tm070jdhg30 = {
+ .timings = &tianma_tm070jdhg30_timing,
+ .num_timings = 1,
+ .bpc = 8,
+ .size = {
+ .width = 151,
+ .height = 95,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+};
+
static const struct drm_display_mode tpk_f07a_0102_mode = {
.clock = 33260,
.hdisplay = 800,
@@ -1689,6 +1713,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "starry,kr122ea0sra",
.data = &starry_kr122ea0sra,
}, {
+ .compatible = "tianma,tm070jdhg30",
+ .data = &tianma_tm070jdhg30,
+ }, {
.compatible = "tpk,f07a-0102",
.data = &tpk_f07a_0102,
}, {
--
2.9.3
[PATCH v3 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP
Hi Thierry, On Thu, Aug 13, 2015 at 2:32 PM, Thierry Reding wrote: > On Wed, Jun 10, 2015 at 06:44:23PM +0200, Gary Bisson wrote: >> Add support for the Okaya RS800480T-7X0GP to the DRM simple panel >> driver. >> >> The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel >> LCD interface. It supports pixel clocks in the range of 30-40 MHz. >> >> This panel details can be found at: >> http://boundarydevices.com/product/7-800x480-display/ >> >> Signed-off-by: Gary Bisson >> --- >> .../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 + >> drivers/gpu/drm/panel/panel-simple.c | 33 >> ++ >> 2 files changed, 40 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt >> >> diff --git >> a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt >> b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt >> new file mode 100644 >> index 000..f7c729d >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt >> @@ -0,0 +1,7 @@ >> +OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel >> + >> +Required properties: >> +- compatible: should be "okaya,rs800480t_7x0gp" > > Underscores are not typically used in compatible strings, so I've > changed this to "okaya,rs800480t-7x0gp". Thanks! I'll make sure not to use underscores for such names in the future. Regards, Gary
[PATCH] drm/imx: parallel-display: allow to determine bus format from the connected panel
Philipp, All,
On Fri, Nov 20, 2015 at 01:46:39PM +0100, Philipp Zabel wrote:
> Similarly to commit 5e501ed7253b3 ("drm/imx: imx-ldb: allow to determine
> bus format from the connected panel"), if a panel is connected to the ldb
> output port via the of_graph bindings, the data mapping is determined from
> the display_info.bus_format field provided by the panel instead of from the
> optional interface_pix_fmt device tree property.
Tested with a SabreLite + Okaya rs800480t LCD display on 4.4-rc1 kernel.
Tested-by: Gary Bisson
One question though, do you want people to remove the interface_pix_fmt
property from the device trees to make it clear the interface depends on
the panel selected?
Regards,
Gary
[PATCH] drm/panel: Add display timing for Okaya RS800480T-7X0GP
Thierry, All,
On Fri, Jun 5, 2015 at 2:28 PM, Thierry Reding
wrote:
> On Thu, May 28, 2015 at 05:37:46PM +0200, Gary Bisson wrote:
>> Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
>> driver.
>>
>> The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
>> LCD interface. It supports pixel clocks in the range of 30-40 MHz.
>>
>> This panel details can be found at:
>> http://boundarydevices.com/product/7-800x480-display/
>>
>> Signed-off-by: Gary Bisson
>> ---
>> Hi all,
>>
>> This patch is the follow-up of a request from Philipp to add the Okaya
>> display
>> to the simple panel driver.
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/346657.html
>>
>> Regards,
>> Gary
>> ---
>> .../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 ++
>> .../devicetree/bindings/vendor-prefixes.txt| 1 +
>> drivers/gpu/drm/panel/panel-simple.c | 27
>> ++
>> 3 files changed, 35 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>>
>> diff --git
>> a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> new file mode 100644
>> index 000..f7c729d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> @@ -0,0 +1,7 @@
>> +OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
>> +
>> +Required properties:
>> +- compatible: should be "okaya,rs800480t_7x0gp"
>> +
>> +This binding is compatible with the simple-panel binding, which is specified
>> +in simple-panel.txt in this directory.
>> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
>> b/Documentation/devicetree/bindings/vendor-prefixes.txt
>> index 4f35a00..06ce91c 100644
>> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
>> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
>> @@ -145,6 +145,7 @@ nintendo Nintendo
>> nokiaNokia
>> nvidia NVIDIA
>> nxp NXP Semiconductors
>> +okayaOKAYA Electric America, Inc.
>> onnn ON Semiconductor Corp.
>> opencoresOpenCores.org
>> ortustechOrtus Technology Co., Ltd.
>
> Can you split this change into a separate patch? It needs an Acked-by
> from one of the device tree binding maintainers, so make sure to Cc them
> when you repost. scripts/get_maintainer.pl will list them for you.
Sure, will do.
>> +static const struct display_timing okaya_rs800480t_7x0gp_timing = {
>> + .pixelclock = { 3000, 3000, 4000 },
>> + .hactive = { 800, 800, 800 },
>> + .hfront_porch = { 40, 40, 40 },
>> + .hback_porch = { 40, 40, 40 },
>> + .hsync_len = { 1, 48, 48 },
>> + .vactive = { 480, 480, 480 },
>> + .vfront_porch = { 13, 13, 13 },
>> + .vback_porch = { 29, 29, 29 },
>> + .vsync_len = { 3, 3, 3 },
>
> It strikes me as odd that the porches and VSYNC width should be fixed
> for the panel. Is this really the case?
Well this is the values provided by Okaya. Here is a link to the
datasheet, details are located in page 8:
http://boundarydevices.com/datasheets/RS800480T-7X0GP-A.pdf
Thanks for the feedback,
Gary
[PATCH v2 0/2] Add display timing for Okaya RS800480T-7X0
Hi all, This patch is the follow-up of a request from Philipp to add the Okaya display to the simple panel driver. http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/346657.html v2: - split into 2 patches, adding Okaya to the vendor prefixes should be its own patch as suggested by Thierry https://patchwork.kernel.org/patch/6503261/ Regards, Gary Gary Bisson (2): of: add Okaya Electric America vendor prefix drm/panel: Add display timing for Okaya RS800480T-7X0GP .../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 ++ .../devicetree/bindings/vendor-prefixes.txt| 1 + drivers/gpu/drm/panel/panel-simple.c | 27 ++ 3 files changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt -- 2.1.4
[PATCH v2 1/2] of: add Okaya Electric America vendor prefix
This patch adds vendor prefix for Okaya Electronic America, a provider of LCD modules and display technologies. Signed-off-by: Gary Bisson --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index ee2ce7b..37d2de79 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -148,6 +148,7 @@ nintendoNintendo nokia Nokia nvidia NVIDIA nxpNXP Semiconductors +okaya Okaya Electric America, Inc. onnn ON Semiconductor Corp. opencores OpenCores.org ortustech Ortus Technology Co., Ltd. -- 2.1.4
[PATCH v2 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP
Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
driver.
The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
LCD interface. It supports pixel clocks in the range of 30-40 MHz.
This panel details can be found at:
http://boundarydevices.com/product/7-800x480-display/
Signed-off-by: Gary Bisson
---
.../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 ++
drivers/gpu/drm/panel/panel-simple.c | 27 ++
2 files changed, 34 insertions(+)
create mode 100644
Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
diff --git a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
new file mode 100644
index 000..f7c729d
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
@@ -0,0 +1,7 @@
+OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
+
+Required properties:
+- compatible: should be "okaya,rs800480t_7x0gp"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index 97b66b8..e511a22 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -942,6 +942,30 @@ static const struct panel_desc lg_lp129qe = {
},
};
+static const struct display_timing okaya_rs800480t_7x0gp_timing = {
+ .pixelclock = { 3000, 3000, 4000 },
+ .hactive = { 800, 800, 800 },
+ .hfront_porch = { 40, 40, 40 },
+ .hback_porch = { 40, 40, 40 },
+ .hsync_len = { 1, 48, 48 },
+ .vactive = { 480, 480, 480 },
+ .vfront_porch = { 13, 13, 13 },
+ .vback_porch = { 29, 29, 29 },
+ .vsync_len = { 3, 3, 3 },
+ .flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc okaya_rs800480t_7x0gp = {
+ .timings = &okaya_rs800480t_7x0gp_timing,
+ .num_timings = 1,
+ .bpc = 6,
+ .size = {
+ .width = 154,
+ .height = 87,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
.clock = 25000,
.hdisplay = 480,
@@ -1112,6 +1136,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "lg,lp129qe",
.data = &lg_lp129qe,
}, {
+ .compatible = "okaya,rs800480t_7x0gp",
+ .data = &okaya_rs800480t_7x0gp,
+ }, {
.compatible = "ortustech,com43h4m85ulc",
.data = &ortustech_com43h4m85ulc,
}, {
--
2.1.4
[PATCH v2 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP
Hi Philipp,
On Tue, Jun 9, 2015 at 7:39 PM, Philipp Zabel wrote:
> Hi Gary,
>
> Am Dienstag, den 09.06.2015, 17:59 +0200 schrieb Gary Bisson:
>> Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
>> driver.
>>
>> The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
>> LCD interface. It supports pixel clocks in the range of 30-40 MHz.
>>
>> This panel details can be found at:
>> http://boundarydevices.com/product/7-800x480-display/
>>
>> Signed-off-by: Gary Bisson
>> ---
>> .../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 ++
>> drivers/gpu/drm/panel/panel-simple.c | 27
>> ++
>> 2 files changed, 34 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>>
>> diff --git
>> a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> new file mode 100644
>> index 000..f7c729d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
>> @@ -0,0 +1,7 @@
>> +OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
>> +
>> +Required properties:
>> +- compatible: should be "okaya,rs800480t_7x0gp"
>> +
>> +This binding is compatible with the simple-panel binding, which is specified
>> +in simple-panel.txt in this directory.
>> diff --git a/drivers/gpu/drm/panel/panel-simple.c
>> b/drivers/gpu/drm/panel/panel-simple.c
>> index 97b66b8..e511a22 100644
>> --- a/drivers/gpu/drm/panel/panel-simple.c
>> +++ b/drivers/gpu/drm/panel/panel-simple.c
>> @@ -942,6 +942,30 @@ static const struct panel_desc lg_lp129qe = {
>> },
>> };
>>
>> +static const struct display_timing okaya_rs800480t_7x0gp_timing = {
>> + .pixelclock = { 3000, 3000, 4000 },
>> + .hactive = { 800, 800, 800 },
>> + .hfront_porch = { 40, 40, 40 },
>> + .hback_porch = { 40, 40, 40 },
>> + .hsync_len = { 1, 48, 48 },
>> + .vactive = { 480, 480, 480 },
>> + .vfront_porch = { 13, 13, 13 },
>> + .vback_porch = { 29, 29, 29 },
>> + .vsync_len = { 3, 3, 3 },
>> + .flags = DISPLAY_FLAGS_DE_HIGH,
>> +};
>> +
>> +static const struct panel_desc okaya_rs800480t_7x0gp = {
>> + .timings = &okaya_rs800480t_7x0gp_timing,
>> + .num_timings = 1,
>> + .bpc = 6,
>> + .size = {
>> + .width = 154,
>> + .height = 87,
>> + },
>
> Are there any poweron/poweroff sequencing delays in the datasheet that
> should be met? Parallel displays often specify a few ms delay after the
> voltage supply is stable and before pixel data should be driven on the
> bus (.delay.prepare), as well as afterwards, before activating the
> backlight (.delay.enable).
You are right I forgot to add those delays. I will submit a v3.
That gives prepare = unprepare = 40.5ms (rounded up to 41) and enable
= disable = 50ms based on the values provided at page 6/20 of the
following doc:
http://boundarydevices.com/datasheets/RS800480T-7X0GP-A.pdf
Regards,
Gary
[PATCH v3 0/2] Add display timing for Okaya RS800480T-7X0
Hi all, This patch is the follow-up of a request from Philipp to add the Okaya display to the simple panel driver. http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/346657.html v2: - split into 2 patches, adding Okaya to the vendor prefixes should be its own patch as suggested by Thierry https://patchwork.kernel.org/patch/6503261/ v3: - add poweron/poweroff sequencing delays as suggested by Philipp. Values are based on datasheet available at: http://boundarydevices.com/datasheets/RS800480T-7X0GP-A.pdf Regards, Gary Gary Bisson (2): of: add Okaya Electric America vendor prefix drm/panel: Add display timing for Okaya RS800480T-7X0GP .../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 + .../devicetree/bindings/vendor-prefixes.txt| 1 + drivers/gpu/drm/panel/panel-simple.c | 33 ++ 3 files changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt -- 2.1.4
[PATCH v3 1/2] of: add Okaya Electric America vendor prefix
This patch adds vendor prefix for Okaya Electronic America, a provider of LCD modules and display technologies. Signed-off-by: Gary Bisson --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index ee2ce7b..37d2de79 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -148,6 +148,7 @@ nintendoNintendo nokia Nokia nvidia NVIDIA nxpNXP Semiconductors +okaya Okaya Electric America, Inc. onnn ON Semiconductor Corp. opencores OpenCores.org ortustech Ortus Technology Co., Ltd. -- 2.1.4
[PATCH v3 2/2] drm/panel: Add display timing for Okaya RS800480T-7X0GP
Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
driver.
The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
LCD interface. It supports pixel clocks in the range of 30-40 MHz.
This panel details can be found at:
http://boundarydevices.com/product/7-800x480-display/
Signed-off-by: Gary Bisson
---
.../bindings/panel/okaya,rs800480t_7x0gp.txt | 7 +
drivers/gpu/drm/panel/panel-simple.c | 33 ++
2 files changed, 40 insertions(+)
create mode 100644
Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
diff --git a/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
new file mode 100644
index 000..f7c729d
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t_7x0gp.txt
@@ -0,0 +1,7 @@
+OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
+
+Required properties:
+- compatible: should be "okaya,rs800480t_7x0gp"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index f94201b..5262be1 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -943,6 +943,36 @@ static const struct panel_desc lg_lp129qe = {
},
};
+static const struct display_timing okaya_rs800480t_7x0gp_timing = {
+ .pixelclock = { 3000, 3000, 4000 },
+ .hactive = { 800, 800, 800 },
+ .hfront_porch = { 40, 40, 40 },
+ .hback_porch = { 40, 40, 40 },
+ .hsync_len = { 1, 48, 48 },
+ .vactive = { 480, 480, 480 },
+ .vfront_porch = { 13, 13, 13 },
+ .vback_porch = { 29, 29, 29 },
+ .vsync_len = { 3, 3, 3 },
+ .flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc okaya_rs800480t_7x0gp = {
+ .timings = &okaya_rs800480t_7x0gp_timing,
+ .num_timings = 1,
+ .bpc = 6,
+ .size = {
+ .width = 154,
+ .height = 87,
+ },
+ .delay = {
+ .prepare = 41,
+ .enable = 50,
+ .unprepare = 41,
+ .disable = 50,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
.clock = 25000,
.hdisplay = 480,
@@ -1113,6 +1143,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "lg,lp129qe",
.data = &lg_lp129qe,
}, {
+ .compatible = "okaya,rs800480t_7x0gp",
+ .data = &okaya_rs800480t_7x0gp,
+ }, {
.compatible = "ortustech,com43h4m85ulc",
.data = &ortustech_com43h4m85ulc,
}, {
--
2.1.4
drm: imx: multi-display support questions
Hi Fabio, On Mon, Jun 29, 2015 at 6:08 PM, Fabio Estevam wrote: > Hi Gary, > > On Mon, Jun 29, 2015 at 1:04 PM, Gary Bisson > wrote: > >> Thank you for your e-mail and sorry for the delay in my response. I >> confirm this patch, ported over to my dtsi file, makes the HDMI and >> LVDS work together. >> >> I'll check with Eric but we will most likely use the same >> configuration for our platforms. > > What do you mean by "use the same configuration for our platforms"? I meant the clock tree configuration, having LDB under the PLL3. > I was planning to send the two attached patches. I am ok with it but I'd like Eric to ack it too as he might have some remarks. Regards, Gary
drm: imx: multi-display support questions
Hi Fabio, On Tue, Jun 23, 2015 at 7:50 PM, Fabio Estevam wrote: > On Tue, Jun 23, 2015 at 2:49 PM, Fabio Estevam wrote: >> Hi Gary, >> >> On Wed, May 27, 2015 at 10:31 AM, Gary Bisson >> wrote: >> >>> Ok, thanks, I'll check and see what I need to get all the displays to >>> work together. >> >> With this patch: >> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352189.html >> >> I am able to get HDMI and LVDS working on a mx6q-sabresd. > > Sorry, the correct URL is: > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/352179.html Thank you for your e-mail and sorry for the delay in my response. I confirm this patch, ported over to my dtsi file, makes the HDMI and LVDS work together. I'll check with Eric but we will most likely use the same configuration for our platforms. Regards, Gary
drm: imx: multi-display support questions
Fabio, Eric, On Mon, Jun 29, 2015 at 6:22 PM, Eric Nelson wrote: > Thanks Fabio, > > On 06/29/2015 09:08 AM, Fabio Estevam wrote: >> Hi Gary, >> >> On Mon, Jun 29, 2015 at 1:04 PM, Gary Bisson >> wrote: >> >>> Thank you for your e-mail and sorry for the delay in my response. I >>> confirm this patch, ported over to my dtsi file, makes the HDMI and >>> LVDS work together. >>> >>> I'll check with Eric but we will most likely use the same >>> configuration for our platforms. >> >> What do you mean by "use the same configuration for our platforms"? >> >> I was planning to send the two attached patches. >> >> Are you and Eric OK with them? >> > > These look good to me. > > Gary, did you test one of these against either of our 1280x800 panels? Yes I've tested with both Hannstar 10" 1024x768 and 7" 1280x800. I will answer to the patches sent for Sabrelite and Nitrogen6x. Regards, Gary
drm/imx: parallel-display: fix drm_panel support
Hi Philipp
On Tue, May 19, 2015 at 04:28:12PM +0200, Philipp Zabel wrote:
> The parallel-display driver used an undocumented, non-standard property
> "fsl,panel" to optionally associate with a drm_panel device. This patch
> fixes the driver to use the same OF graph bindings as the LDB driver
> instead:
>
> parallel-display {
> compatible = "fsl,imx-parallel-display";
> ...
>
> port at 1 {
> reg = <1>;
>
> parallel_out: endpoint {
> remote_endpoint = <&panel_in>;
> };
> };
> };
>
> panel {
> ...
>
> port {
> panel_in: endpoint {
> remote-endpoint = <¶llel_out>;
> };
> };
> };
>
> Signed-off-by: Philipp Zabel
>
> ---
Tested on Nitrogen6x and Sabrelite using a Okaya RS800480T-7X0GP
display. Below are the different patches submitted that make use of this
change:
https://patchwork.kernel.org/patch/6585541/
https://patchwork.kernel.org/patch/6585551/
https://patchwork.kernel.org/patch/6504711/
https://patchwork.kernel.org/patch/6504731/
Tested-by: Gary Bisson
Regards,
Gary
[PATCH v3 0/2] Add display timing for Okaya RS800480T-7X0
Hi all, On Wed, Jun 10, 2015 at 6:44 PM, Gary Bisson wrote: > Hi all, > > This patch is the follow-up of a request from Philipp to add the Okaya display > to the simple panel driver. > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/346657.html > > v2: > - split into 2 patches, adding Okaya to the vendor prefixes should be its own > patch as suggested by Thierry > https://patchwork.kernel.org/patch/6503261/ > > v3: > - add poweron/poweroff sequencing delays as suggested by Philipp. Values are > based on datasheet available at: > http://boundarydevices.com/datasheets/RS800480T-7X0GP-A.pdf Now that Philipp's change that fixes the drm_panel support in the parallel-display has been merged, would it be ok to merge the okaya timings? http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=553a59fc Regards, Gary
